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external/llvm/test/CodeGen/ARM/2012-05-04-vmov.ll
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18
external/llvm/test/CodeGen/ARM/2012-05-04-vmov.ll
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; RUN: llc -O1 -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - \
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; RUN: | FileCheck -check-prefix=A9-CHECK %s
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; RUN: llc -O1 -mtriple=arm-eabi -mcpu=swift %s -o - \
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; RUN: | FileCheck -check-prefix=SWIFT-CHECK %s
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; Check that swift doesn't use vmov.32. <rdar://problem/10453003>.
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define <2 x i32> @testuvec(<2 x i32> %A, <2 x i32> %B) nounwind {
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entry:
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%div = udiv <2 x i32> %A, %B
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ret <2 x i32> %div
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; A9-CHECK: vmov.32
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; vmov.32 should not be used to get a lane:
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; vmov.32 <dst>, <src>[<lane>].
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; but vmov.32 <dst>[<lane>], <src> is fine.
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; SWIFT-CHECK-NOT: vmov.32 {{r[0-9]+}}, {{d[0-9]\[[0-9]+\]}}
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}
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