Imported Upstream version 6.10.0.49

Former-commit-id: 1d6753294b2993e1fbf92de9366bb9544db4189b
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
2020-01-16 16:38:04 +00:00
parent d94e79959b
commit 468663ddbb
48518 changed files with 2789335 additions and 61176 deletions

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# RUN: llvm-mc -triple s390x-linux-gnu -filetype=obj %s | \
# RUN: llvm-objdump -mcpu=zEC12 -disassemble - | FileCheck %s
# Test the .insn directive which provides a way of encoding an instruction
# directly. It takes a format, encoding, and operands based on the format.
#CHECK: 01 01 pr
.insn e,0x0101
#CHECK: a7 18 12 34 lhi %r1, 4660
.insn ri,0xa7080000,%r1,0x1234
# GAS considers this instruction's immediate operand to be PC relative.
#CHECK: ec 12 00 06 00 76 crj %r1, %r2, 0, 0x12
.insn rie,0xec0000000076,%r1,%r2,12
#CHECK: ec 12 00 03 00 64 cgrj %r1, %r2, 0, 0x12
.insn rie,0xec0000000064,%r1,%r2,label.rie
#CHECK: label.rie:
label.rie:
# GAS considers this instruction's immediate operand to be PC relative.
#CHECK: c6 1d 00 00 00 06 crl %r1, 0x1e
.insn ril,0xc60d00000000,%r1,12
#CHECK: c6 18 00 00 00 03 cgrl %r1, 0x1e
.insn ril,0xc60800000000,%r1,label.ril
#CHECK: label.ril:
label.ril:
#CHECK: c2 2b 80 00 00 00 alfi %r2, 2147483648
.insn rilu,0xc20b00000000,%r2,0x80000000
#CHECK: ec 1c f0 a0 34 fc cgible %r1, 52, 160(%r15)
.insn ris,0xec00000000fc,%r1,0x34,0xc,160(%r15)
# Test using an integer in place of a register.
#CHECK: 18 23 lr %r2, %r3
.insn rr,0x1800,2,3
#CHECK: b9 14 00 45 lgfr %r4, %r5
.insn rre,0xb9140000,%r4,%r5
# Test FP and GR registers in a single directive.
#CHECK: b3 c1 00 fe ldgr %f15, %r14
.insn rre,0xb3c10000,%f15,%r14
# Test using an integer in place of a register.
#CHECK: b3 44 34 12 ledbra %f1, 3, %f2, 4
.insn rrf,0xb3440000,%f1,2,%f3,4
#CHECK: ec 34 f0 b4 a0 e4 cgrbhe %r3, %r4, 180(%r15)
.insn rrs,0xec00000000e4,%r3,%r4,0xa,180(%r15)
#CHECK: ba 01 f0 a0 cs %r0, %r1, 160(%r15)
.insn rs,0xba000000,%r0,%r1,160(%r15)
# GAS considers this instruction's immediate operand to be PC relative.
#CHECK: 84 13 00 04 brxh %r1, %r3, 0x4a
.insn rsi,0x84000000,%r1,%r3,8
#CHECK: 84 13 00 02 brxh %r1, %r3, 0x4a
.insn rsi,0x84000000,%r1,%r3,label.rsi
#CHECK: label.rsi:
label.rsi:
# RSE formats are short displacement versions of the RSY formats.
#CHECK: eb 12 f0 a0 00 f8 laa %r1, %r2, 160(%r15)
.insn rse,0xeb00000000f8,%r1,%r2,160(%r15)
#CHECK: eb 12 f3 45 12 30 csg %r1, %r2, 74565(%r15)
.insn rsy,0xeb0000000030,%r1,%r2,74565(%r15)
#CHECK: 59 13 f0 a0 c %r1, 160(%r3,%r15)
.insn rx,0x59000000,%r1,160(%r3,%r15)
#CHECK: ed 13 f0 a0 00 19 cdb %f1, 160(%r3,%r15)
.insn rxe,0xed0000000019,%f1,160(%r3,%r15)
#CHECK: ed 23 f0 a0 10 1e madb %f1, %f2, 160(%r3,%r15)
.insn rxf,0xed000000001e,%f1,%f2,160(%r3,%r15)
#CHECK: ed 12 f1 23 90 65 ldy %f1, -458461(%r2,%r15)
.insn rxy,0xed0000000065,%f1,-458461(%r2,%r15)
#CHECK: b2 fc f0 a0 tabort 160(%r15)
.insn s,0xb2fc0000,160(%r15)
#CHECK: 91 34 f0 a0 tm 160(%r15), 52
.insn si,0x91000000,160(%r15),52
#CHECK: eb f0 fc de ab 51 tmy -344866(%r15), 240
.insn siy,0xeb0000000051,-344866(%r15),240
#CHECK: e5 60 f0 a0 12 34 tbegin 160(%r15), 4660
.insn sil,0xe56000000000,160(%r15),0x1234
#CHECK: d9 13 f1 23 e4 56 mvck 291(%r1,%r15), 1110(%r14), %r3
.insn ss,0xd90000000000,291(%r1,%r15),1110(%r14),%r3
#CHECK: e5 02 10 a0 21 23 strag 160(%r1), 291(%r2)
.insn sse,0xe50200000000,160(%r1),291(%r2)
#CHECK: c8 31 f0 a0 e2 34 ectg 160(%r15), 564(%r14), %r3
.insn ssf,0xc80100000000,160(%r15),564(%r14),%r3

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# RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=zEC12 --show-encoding %s | FileCheck %s
# RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=zEC12 -filetype=obj %s | \
# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
# CHECK: bpp 12, branch, 0 # encoding: [0xc7,0xc0,0x00,0x00,A,A]
# CHECK: # fixup A - offset: 4, value: branch+4, kind: FK_390_PC16DBL
# CHECK-REL: 0x{{[0-9A-F]*4}} R_390_PC16DBL branch 0x4
.align 16
bpp 12, branch, 0
# CHECK: bpp 12, branch@PLT, 0 # encoding: [0xc7,0xc0,0x00,0x00,A,A]
# CHECK: # fixup A - offset: 4, value: branch@PLT+4, kind: FK_390_PC16DBL
# CHECK-REL: 0x{{[0-9A-F]*4}} R_390_PLT16DBL branch 0x4
.align 16
bpp 12, branch@plt, 0
# CHECK: bprp 12, branch, target # encoding: [0xc5,0b1100AAAA,A,B,B,B]
# CHECK-NEXT: # fixup A - offset: 1, value: branch+1, kind: FK_390_PC12DBL
# CHECK-NEXT: # fixup B - offset: 3, value: target+3, kind: FK_390_PC24DBL
# CHECK-REL: 0x{{[0-9A-F]*1}} R_390_PC12DBL branch 0x1
# CHECK-REL: 0x{{[0-9A-F]*3}} R_390_PC24DBL target 0x3
.align 16
bprp 12, branch, target
# CHECK: bprp 12, branch@PLT, target@PLT # encoding: [0xc5,0b1100AAAA,A,B,B,B]
# CHECK-NEXT: # fixup A - offset: 1, value: branch@PLT+1, kind: FK_390_PC12DBL
# CHECK-NEXT: # fixup B - offset: 3, value: target@PLT+3, kind: FK_390_PC24DBL
# CHECK-REL: 0x{{[0-9A-F]*1}} R_390_PLT12DBL branch 0x1
# CHECK-REL: 0x{{[0-9A-F]*3}} R_390_PLT24DBL target 0x3
.align 16
bprp 12, branch@plt, target@plt

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# RUN: llvm-mc -triple s390x-unknown-unknown --show-encoding %s | FileCheck %s
# RUN: llvm-mc -triple s390x-unknown-unknown -filetype=obj %s | \
# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
# CHECK: larl %r14, target # encoding: [0xc0,0xe0,A,A,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target+2, kind: FK_390_PC32DBL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PC32DBL target 0x2
.align 16
larl %r14, target
# CHECK: larl %r14, target@GOT # encoding: [0xc0,0xe0,A,A,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@GOT+2, kind: FK_390_PC32DBL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_GOTENT target 0x2
.align 16
larl %r14, target@got
# CHECK: larl %r14, target@INDNTPOFF # encoding: [0xc0,0xe0,A,A,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@INDNTPOFF+2, kind: FK_390_PC32DBL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_TLS_IEENT target 0x2
.align 16
larl %r14, target@indntpoff
# CHECK: brasl %r14, target # encoding: [0xc0,0xe5,A,A,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target+2, kind: FK_390_PC32DBL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PC32DBL target 0x2
.align 16
brasl %r14, target
# CHECK: brasl %r14, target@PLT # encoding: [0xc0,0xe5,A,A,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
.align 16
brasl %r14, target@plt
# CHECK: brasl %r14, target@PLT:tls_gdcall:sym # encoding: [0xc0,0xe5,A,A,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
# CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSGD, kind: FK_390_TLS_CALL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GDCALL sym 0x0
.align 16
brasl %r14, target@plt:tls_gdcall:sym
# CHECK: brasl %r14, target@PLT:tls_ldcall:sym # encoding: [0xc0,0xe5,A,A,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
# CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSLDM, kind: FK_390_TLS_CALL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDCALL sym 0x0
.align 16
brasl %r14, target@plt:tls_ldcall:sym
# CHECK: bras %r14, target # encoding: [0xa7,0xe5,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target+2, kind: FK_390_PC16DBL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PC16DBL target 0x2
.align 16
bras %r14, target
# CHECK: bras %r14, target@PLT # encoding: [0xa7,0xe5,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
.align 16
bras %r14, target@plt
# CHECK: bras %r14, target@PLT:tls_gdcall:sym # encoding: [0xa7,0xe5,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
# CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSGD, kind: FK_390_TLS_CALL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GDCALL sym 0x0
.align 16
bras %r14, target@plt:tls_gdcall:sym
# CHECK: bras %r14, target@PLT:tls_ldcall:sym # encoding: [0xa7,0xe5,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
# CHECK-NEXT: # fixup B - offset: 0, value: sym@TLSLDM, kind: FK_390_TLS_CALL
# CHECK-REL: 0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDCALL sym 0x0
.align 16
bras %r14, target@plt:tls_ldcall:sym
# Data relocs
# llvm-mc does not show any "encoding" string for data, so we just check the relocs
# CHECK-REL: .rela.data
.data
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LE64 target 0x0
.align 16
.quad target@ntpoff
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDO64 target 0x0
.align 16
.quad target@dtpoff
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDM64 target 0x0
.align 16
.quad target@tlsldm
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GD64 target 0x0
.align 16
.quad target@tlsgd
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LE32 target 0x0
.align 16
.long target@ntpoff
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDO32 target 0x0
.align 16
.long target@dtpoff
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDM32 target 0x0
.align 16
.long target@tlsldm
# CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GD32 target 0x0
.align 16
.long target@tlsgd

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57c69f60361bf13cf00acef4114cace626690161

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6a4beff7638cb9f7e620df25e6859fc0c3545996

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1fcdcb4ccab08509c1d7f97a9f562b1ecbc0e00c

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5b93ef917fd321c5128c37bd079c274896ef96c8

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# RUN: not llvm-mc -triple=systemz -mcpu=z13 -show-encoding < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -triple=systemz -mcpu=zEC12 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ZEC12
# This tests the mnemonic spell checker.
# First check what happens when an instruction is omitted:
%r1, %r2, %r3
# CHECK: error: unexpected token at start of statement
# CHECK-NEXT: %r1, %r2, %r3
# CHECK-NEXT: ^
# We don't want to see a suggestion here; the edit distance is too large to
# give sensible suggestions:
aaaaaaaaaaaaaaa %r1, %r2, %r3
# CHECK: error: invalid instruction
# CHECK-NEXT: aaaaaaaaaaaaaaa %r1, %r2, %r3
# CHECK-NEXT: ^
# Check that we get one suggestion: 'cpdt' is 1 edit away, i.e. an deletion.
cpdtX %r1, 0(4, %r15), 0
#CHECK: error: invalid instruction, did you mean: cpdt
#CHECK-NEXT: cpdtX %r1, 0(4, %r15), 0
#CHECK-NEXT: ^
# Check edit distance 1 and 2
ltTr %r1, %r2
# CHECK: error: invalid instruction, did you mean: lr, lt, ltdr, ltdtr, lter, ltgr, ltr, ltxr, ltxtr, tr, trtr?
# CHECK-NEXT: ltTr %r1, %r2
# CHECK-NEXT: ^
# Check edit distance 1 and 2, just insertions:
begin 0, 65292
# CHECK: error: invalid instruction, did you mean: tbegin, tbeginc?
# CHECK-NEXT: begin 0, 65292
# CHECK-NEXT: ^
# Check an instruction that is 2 edits away, and also has a lot of candidates:
adt %r1, 244(%r15)
# CHECK: error: invalid instruction, did you mean: a, ad, adb, adr, adtr, adtra, d, lat, mad, qadtr?
# CHECK-NEXT: adt %r1, 244(%r15)
# CHECK-NEXT: ^
# Here it is checked that we don't suggest instructions that are not supported.
# For example, in pre-z13 mode we don't want to see suggestions for vector instructions.
vlvggp %v1, %r2, %r3
# CHECK-ZEC12: error: invalid instruction
# CHECK-ZEC12: vlvggp
# CHECK-ZEC12: ^
# CHECK: error: invalid instruction, did you mean: vlvg, vlvgg, vlvgp?
# CHECK-NEXT: vlvggp %v1, %r2, %r3
# CHECK-NEXT: ^

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if not 'SystemZ' in config.root.targets:
config.unsupported = True

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# RUN: not llvm-mc -triple s390x-linux-gnu < %s 2> %t
# RUN: FileCheck < %t %s
# Test GR32 operands
#
#CHECK: error: invalid operand for instruction
#CHECK: lr %f0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: lr %a0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: lr %c0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: lr %r0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: lr %r0,%a1
#CHECK: error: invalid operand for instruction
#CHECK: lr %r0,%c1
#CHECK: error: invalid operand for instruction
#CHECK: lr %r0,0
#CHECK: error: invalid operand for instruction
#CHECK: lr %r0,0(%r1)
lr %f0,%r1
lr %a0,%r1
lr %c0,%r1
lr %r0,%f1
lr %r0,%a1
lr %r0,%c1
lr %r0,0
lr %r0,0(%r1)
# Test GR64 operands
#
#CHECK: error: invalid operand for instruction
#CHECK: lgr %f0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: lgr %a0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: lgr %c0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: lgr %r0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: lgr %r0,%a1
#CHECK: error: invalid operand for instruction
#CHECK: lgr %r0,%c1
#CHECK: error: invalid operand for instruction
#CHECK: lgr %r0,0
#CHECK: error: invalid operand for instruction
#CHECK: lgr %r0,0(%r1)
lgr %f0,%r1
lgr %a0,%r1
lgr %c0,%r1
lgr %r0,%f1
lgr %r0,%a1
lgr %r0,%c1
lgr %r0,0
lgr %r0,0(%r1)
# Test GR128 operands
#
#CHECK: error: invalid register pair
#CHECK: dlr %r1,%r0
#CHECK: error: invalid register pair
#CHECK: dlr %r3,%r0
#CHECK: error: invalid register pair
#CHECK: dlr %r5,%r0
#CHECK: error: invalid register pair
#CHECK: dlr %r7,%r0
#CHECK: error: invalid register pair
#CHECK: dlr %r9,%r0
#CHECK: error: invalid register pair
#CHECK: dlr %r11,%r0
#CHECK: error: invalid register pair
#CHECK: dlr %r13,%r0
#CHECK: error: invalid register pair
#CHECK: dlr %r15,%r0
#CHECK: error: invalid operand for instruction
#CHECK: dlr %f0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: dlr %a0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: dlr %c0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: dlr %r0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: dlr %r0,%a1
#CHECK: error: invalid operand for instruction
#CHECK: dlr %r0,%c1
#CHECK: error: invalid operand for instruction
#CHECK: dlr %r0,0
#CHECK: error: invalid operand for instruction
#CHECK: dlr %r0,0(%r1)
dlr %r1,%r0
dlr %r3,%r0
dlr %r5,%r0
dlr %r7,%r0
dlr %r9,%r0
dlr %r11,%r0
dlr %r13,%r0
dlr %r15,%r0
dlr %f0,%r1
dlr %a0,%r1
dlr %c0,%r1
dlr %r0,%f1
dlr %r0,%a1
dlr %r0,%c1
dlr %r0,0
dlr %r0,0(%r1)
# Test FP32 operands
#
#CHECK: error: invalid operand for instruction
#CHECK: ler %r0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: ler %a0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: ler %c0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: ler %f0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: ler %f0,%a1
#CHECK: error: invalid operand for instruction
#CHECK: ler %f0,%c1
#CHECK: error: invalid operand for instruction
#CHECK: ler %f0,0
#CHECK: error: invalid operand for instruction
#CHECK: ler %f0,0(%r1)
ler %r0,%f1
ler %a0,%f1
ler %c0,%f1
ler %f0,%r1
ler %f0,%a1
ler %f0,%c1
ler %f0,0
ler %f0,0(%r1)
# Test FP64 operands
#
#CHECK: error: invalid operand for instruction
#CHECK: ldr %r0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: ldr %a0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: ldr %c0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: ldr %f0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: ldr %f0,%a1
#CHECK: error: invalid operand for instruction
#CHECK: ldr %f0,%c1
#CHECK: error: invalid operand for instruction
#CHECK: ldr %f0,0
#CHECK: error: invalid operand for instruction
#CHECK: ldr %f0,0(%r1)
ldr %r0,%f1
ldr %a0,%f1
ldr %c0,%f1
ldr %f0,%r1
ldr %f0,%a1
ldr %f0,%c1
ldr %f0,0
ldr %f0,0(%r1)
# Test FP128 operands
#
#CHECK: error: invalid register pair
#CHECK: lxr %f2,%f0
#CHECK: error: invalid register pair
#CHECK: lxr %f0,%f3
#CHECK: error: invalid register pair
#CHECK: lxr %f6,%f0
#CHECK: error: invalid register pair
#CHECK: lxr %f0,%f7
#CHECK: error: invalid register pair
#CHECK: lxr %f10,%f0
#CHECK: error: invalid register pair
#CHECK: lxr %f0,%f11
#CHECK: error: invalid register pair
#CHECK: lxr %f14,%f0
#CHECK: error: invalid register pair
#CHECK: lxr %f0,%f15
#CHECK: error: invalid operand for instruction
#CHECK: lxr %r0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: lxr %a0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: lxr %c0,%f1
#CHECK: error: invalid operand for instruction
#CHECK: lxr %f0,%r1
#CHECK: error: invalid operand for instruction
#CHECK: lxr %f0,%a1
#CHECK: error: invalid operand for instruction
#CHECK: lxr %f0,%c1
#CHECK: error: invalid operand for instruction
#CHECK: lxr %f0,0
#CHECK: error: invalid operand for instruction
#CHECK: lxr %f0,0(%r1)
lxr %f2,%f0
lxr %f0,%f3
lxr %f6,%f0
lxr %f0,%f7
lxr %f10,%f0
lxr %f0,%f11
lxr %f14,%f0
lxr %f0,%f15
lxr %r0,%f1
lxr %a0,%f1
lxr %c0,%f1
lxr %f0,%r1
lxr %f0,%a1
lxr %f0,%c1
lxr %f0,0
lxr %f0,0(%r1)
# Test access register operands
#
#CHECK: error: invalid operand for instruction
#CHECK: ear %r0,%r0
#CHECK: error: invalid operand for instruction
#CHECK: ear %r0,%f0
#CHECK: error: invalid operand for instruction
#CHECK: ear %r0,%c0
#CHECK: error: invalid operand for instruction
#CHECK: ear %r0,0
#CHECK: error: invalid operand for instruction
#CHECK: ear %r0,0(%r1)
ear %r0,%r0
ear %r0,%f0
ear %r0,%c0
ear %r0,0
ear %r0,0(%r1)
# Test control register operands
#
#CHECK: error: invalid operand for instruction
#CHECK: lctl %c0,%r0,0
#CHECK: lctl %c0,%f0,0
#CHECK: lctl %c0,%a0,0
#CHECK: lctl %c0,0,0
#CHECK: lctl %c0,0(%r1),0
lctl %c0,%r0,0
lctl %c0,%f0,0
lctl %c0,%a0,0
lctl %c0,0,0
lctl %c0,0(%r1),0
.cfi_startproc
# Test general register parsing, with no predetermined class in mind.
#
#CHECK: error: register expected
#CHECK: .cfi_offset r0,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %r,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %f,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %a,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %c,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %0,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %r16,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %f16,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %a16,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %c16,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %reef,0
#CHECK: error: invalid register
#CHECK: .cfi_offset %arid,0
.cfi_offset r0,0
.cfi_offset %,0
.cfi_offset %r,0
.cfi_offset %f,0
.cfi_offset %a,0
.cfi_offset %c,0
.cfi_offset %0,0
.cfi_offset %r16,0
.cfi_offset %f16,0
.cfi_offset %a16,0
.cfi_offset %c16,0
.cfi_offset %reef,0
.cfi_offset %arid,0
.cfi_endproc
#CHECK: error: %r0 used in an address
#CHECK: sll %r2,8(%r0)
#CHECK: error: %r0 used in an address
#CHECK: br %r0
#CHECK: error: %r0 used in an address
#CHECK: l %r1,8(%r0)
#CHECK: error: %r0 used in an address
#CHECK: l %r1,8(%r0,%r15)
#CHECK: error: %r0 used in an address
#CHECK: l %r1,8(%r15,%r0)
sll %r2,8(%r0)
br %r0
l %r1,8(%r0)
l %r1,8(%r0,%r15)
l %r1,8(%r15,%r0)

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@@ -0,0 +1,270 @@
# RUN: llvm-mc -triple s390x-linux-gnu -show-encoding %s | FileCheck %s
#CHECK: lr %r0, %r1 # encoding: [0x18,0x01]
#CHECK: lr %r2, %r3 # encoding: [0x18,0x23]
#CHECK: lr %r4, %r5 # encoding: [0x18,0x45]
#CHECK: lr %r6, %r7 # encoding: [0x18,0x67]
#CHECK: lr %r8, %r9 # encoding: [0x18,0x89]
#CHECK: lr %r10, %r11 # encoding: [0x18,0xab]
#CHECK: lr %r12, %r13 # encoding: [0x18,0xcd]
#CHECK: lr %r14, %r15 # encoding: [0x18,0xef]
lr %r0,%r1
lr %r2,%r3
lr %r4,%r5
lr %r6,%r7
lr %r8,%r9
lr %r10,%r11
lr %r12,%r13
lr %r14,%r15
#CHECK: lgr %r0, %r1 # encoding: [0xb9,0x04,0x00,0x01]
#CHECK: lgr %r2, %r3 # encoding: [0xb9,0x04,0x00,0x23]
#CHECK: lgr %r4, %r5 # encoding: [0xb9,0x04,0x00,0x45]
#CHECK: lgr %r6, %r7 # encoding: [0xb9,0x04,0x00,0x67]
#CHECK: lgr %r8, %r9 # encoding: [0xb9,0x04,0x00,0x89]
#CHECK: lgr %r10, %r11 # encoding: [0xb9,0x04,0x00,0xab]
#CHECK: lgr %r12, %r13 # encoding: [0xb9,0x04,0x00,0xcd]
#CHECK: lgr %r14, %r15 # encoding: [0xb9,0x04,0x00,0xef]
lgr %r0,%r1
lgr %r2,%r3
lgr %r4,%r5
lgr %r6,%r7
lgr %r8,%r9
lgr %r10,%r11
lgr %r12,%r13
lgr %r14,%r15
#CHECK: dlr %r0, %r0 # encoding: [0xb9,0x97,0x00,0x00]
#CHECK: dlr %r2, %r0 # encoding: [0xb9,0x97,0x00,0x20]
#CHECK: dlr %r4, %r0 # encoding: [0xb9,0x97,0x00,0x40]
#CHECK: dlr %r6, %r0 # encoding: [0xb9,0x97,0x00,0x60]
#CHECK: dlr %r8, %r0 # encoding: [0xb9,0x97,0x00,0x80]
#CHECK: dlr %r10, %r0 # encoding: [0xb9,0x97,0x00,0xa0]
#CHECK: dlr %r12, %r0 # encoding: [0xb9,0x97,0x00,0xc0]
#CHECK: dlr %r14, %r0 # encoding: [0xb9,0x97,0x00,0xe0]
dlr %r0,%r0
dlr %r2,%r0
dlr %r4,%r0
dlr %r6,%r0
dlr %r8,%r0
dlr %r10,%r0
dlr %r12,%r0
dlr %r14,%r0
#CHECK: ler %f0, %f1 # encoding: [0x38,0x01]
#CHECK: ler %f2, %f3 # encoding: [0x38,0x23]
#CHECK: ler %f4, %f5 # encoding: [0x38,0x45]
#CHECK: ler %f6, %f7 # encoding: [0x38,0x67]
#CHECK: ler %f8, %f9 # encoding: [0x38,0x89]
#CHECK: ler %f10, %f11 # encoding: [0x38,0xab]
#CHECK: ler %f12, %f13 # encoding: [0x38,0xcd]
#CHECK: ler %f14, %f15 # encoding: [0x38,0xef]
ler %f0,%f1
ler %f2,%f3
ler %f4,%f5
ler %f6,%f7
ler %f8,%f9
ler %f10,%f11
ler %f12,%f13
ler %f14,%f15
#CHECK: ldr %f0, %f1 # encoding: [0x28,0x01]
#CHECK: ldr %f2, %f3 # encoding: [0x28,0x23]
#CHECK: ldr %f4, %f5 # encoding: [0x28,0x45]
#CHECK: ldr %f6, %f7 # encoding: [0x28,0x67]
#CHECK: ldr %f8, %f9 # encoding: [0x28,0x89]
#CHECK: ldr %f10, %f11 # encoding: [0x28,0xab]
#CHECK: ldr %f12, %f13 # encoding: [0x28,0xcd]
#CHECK: ldr %f14, %f15 # encoding: [0x28,0xef]
ldr %f0,%f1
ldr %f2,%f3
ldr %f4,%f5
ldr %f6,%f7
ldr %f8,%f9
ldr %f10,%f11
ldr %f12,%f13
ldr %f14,%f15
#CHECK: lxr %f0, %f1 # encoding: [0xb3,0x65,0x00,0x01]
#CHECK: lxr %f4, %f5 # encoding: [0xb3,0x65,0x00,0x45]
#CHECK: lxr %f8, %f9 # encoding: [0xb3,0x65,0x00,0x89]
#CHECK: lxr %f12, %f13 # encoding: [0xb3,0x65,0x00,0xcd]
lxr %f0,%f1
lxr %f4,%f5
lxr %f8,%f9
lxr %f12,%f13
#CHECK: cpya %a0, %a1 # encoding: [0xb2,0x4d,0x00,0x01]
#CHECK: cpya %a2, %a3 # encoding: [0xb2,0x4d,0x00,0x23]
#CHECK: cpya %a4, %a5 # encoding: [0xb2,0x4d,0x00,0x45]
#CHECK: cpya %a6, %a7 # encoding: [0xb2,0x4d,0x00,0x67]
#CHECK: cpya %a8, %a9 # encoding: [0xb2,0x4d,0x00,0x89]
#CHECK: cpya %a10, %a11 # encoding: [0xb2,0x4d,0x00,0xab]
#CHECK: cpya %a12, %a13 # encoding: [0xb2,0x4d,0x00,0xcd]
#CHECK: cpya %a14, %a15 # encoding: [0xb2,0x4d,0x00,0xef]
cpya %a0,%a1
cpya %a2,%a3
cpya %a4,%a5
cpya %a6,%a7
cpya %a8,%a9
cpya %a10,%a11
cpya %a12,%a13
cpya %a14,%a15
#CHECK: lctl %c0, %c1, 0 # encoding: [0xb7,0x01,0x00,0x00]
#CHECK: lctl %c2, %c3, 0 # encoding: [0xb7,0x23,0x00,0x00]
#CHECK: lctl %c4, %c5, 0 # encoding: [0xb7,0x45,0x00,0x00]
#CHECK: lctl %c6, %c7, 0 # encoding: [0xb7,0x67,0x00,0x00]
#CHECK: lctl %c8, %c9, 0 # encoding: [0xb7,0x89,0x00,0x00]
#CHECK: lctl %c10, %c11, 0 # encoding: [0xb7,0xab,0x00,0x00]
#CHECK: lctl %c12, %c13, 0 # encoding: [0xb7,0xcd,0x00,0x00]
#CHECK: lctl %c14, %c15, 0 # encoding: [0xb7,0xef,0x00,0x00]
lctl %c0,%c1,0
lctl %c2,%c3,0
lctl %c4,%c5,0
lctl %c6,%c7,0
lctl %c8,%c9,0
lctl %c10,%c11,0
lctl %c12,%c13,0
lctl %c14,%c15,0
#CHECK: .cfi_offset %r0, 0
#CHECK: .cfi_offset %r1, 8
#CHECK: .cfi_offset %r2, 16
#CHECK: .cfi_offset %r3, 24
#CHECK: .cfi_offset %r4, 32
#CHECK: .cfi_offset %r5, 40
#CHECK: .cfi_offset %r6, 48
#CHECK: .cfi_offset %r7, 56
#CHECK: .cfi_offset %r8, 64
#CHECK: .cfi_offset %r9, 72
#CHECK: .cfi_offset %r10, 80
#CHECK: .cfi_offset %r11, 88
#CHECK: .cfi_offset %r12, 96
#CHECK: .cfi_offset %r13, 104
#CHECK: .cfi_offset %r14, 112
#CHECK: .cfi_offset %r15, 120
#CHECK: .cfi_offset %f0, 128
#CHECK: .cfi_offset %f1, 136
#CHECK: .cfi_offset %f2, 144
#CHECK: .cfi_offset %f3, 152
#CHECK: .cfi_offset %f4, 160
#CHECK: .cfi_offset %f5, 168
#CHECK: .cfi_offset %f6, 176
#CHECK: .cfi_offset %f7, 184
#CHECK: .cfi_offset %f8, 192
#CHECK: .cfi_offset %f9, 200
#CHECK: .cfi_offset %f10, 208
#CHECK: .cfi_offset %f11, 216
#CHECK: .cfi_offset %f12, 224
#CHECK: .cfi_offset %f13, 232
#CHECK: .cfi_offset %f14, 240
#CHECK: .cfi_offset %f15, 248
#CHECK: .cfi_offset %a0, 256
#CHECK: .cfi_offset %a1, 260
#CHECK: .cfi_offset %a2, 264
#CHECK: .cfi_offset %a3, 268
#CHECK: .cfi_offset %a4, 272
#CHECK: .cfi_offset %a5, 276
#CHECK: .cfi_offset %a6, 280
#CHECK: .cfi_offset %a7, 284
#CHECK: .cfi_offset %a8, 288
#CHECK: .cfi_offset %r9, 292
#CHECK: .cfi_offset %a10, 296
#CHECK: .cfi_offset %a11, 300
#CHECK: .cfi_offset %a12, 304
#CHECK: .cfi_offset %a13, 308
#CHECK: .cfi_offset %a14, 312
#CHECK: .cfi_offset %a15, 316
#CHECK: .cfi_offset %c0, 318
#CHECK: .cfi_offset %c1, 326
#CHECK: .cfi_offset %c2, 334
#CHECK: .cfi_offset %c3, 342
#CHECK: .cfi_offset %c4, 350
#CHECK: .cfi_offset %c5, 358
#CHECK: .cfi_offset %c6, 366
#CHECK: .cfi_offset %c7, 374
#CHECK: .cfi_offset %c8, 382
#CHECK: .cfi_offset %c9, 390
#CHECK: .cfi_offset %c10, 398
#CHECK: .cfi_offset %c11, 406
#CHECK: .cfi_offset %c12, 414
#CHECK: .cfi_offset %c13, 422
#CHECK: .cfi_offset %c14, 430
#CHECK: .cfi_offset %c15, 438
.cfi_startproc
.cfi_offset %r0,0
.cfi_offset %r1,8
.cfi_offset %r2,16
.cfi_offset %r3,24
.cfi_offset %r4,32
.cfi_offset %r5,40
.cfi_offset %r6,48
.cfi_offset %r7,56
.cfi_offset %r8,64
.cfi_offset %r9,72
.cfi_offset %r10,80
.cfi_offset %r11,88
.cfi_offset %r12,96
.cfi_offset %r13,104
.cfi_offset %r14,112
.cfi_offset %r15,120
.cfi_offset %f0,128
.cfi_offset %f1,136
.cfi_offset %f2,144
.cfi_offset %f3,152
.cfi_offset %f4,160
.cfi_offset %f5,168
.cfi_offset %f6,176
.cfi_offset %f7,184
.cfi_offset %f8,192
.cfi_offset %f9,200
.cfi_offset %f10,208
.cfi_offset %f11,216
.cfi_offset %f12,224
.cfi_offset %f13,232
.cfi_offset %f14,240
.cfi_offset %f15,248
.cfi_offset %a0,256
.cfi_offset %a1,260
.cfi_offset %a2,264
.cfi_offset %a3,268
.cfi_offset %a4,272
.cfi_offset %a5,276
.cfi_offset %a6,280
.cfi_offset %a7,284
.cfi_offset %a8,288
.cfi_offset %r9,292
.cfi_offset %a10,296
.cfi_offset %a11,300
.cfi_offset %a12,304
.cfi_offset %a13,308
.cfi_offset %a14,312
.cfi_offset %a15,316
.cfi_offset %c0,318
.cfi_offset %c1,326
.cfi_offset %c2,334
.cfi_offset %c3,342
.cfi_offset %c4,350
.cfi_offset %c5,358
.cfi_offset %c6,366
.cfi_offset %c7,374
.cfi_offset %c8,382
.cfi_offset %c9,390
.cfi_offset %c10,398
.cfi_offset %c11,406
.cfi_offset %c12,414
.cfi_offset %c13,422
.cfi_offset %c14,430
.cfi_offset %c15,438
.cfi_endproc

View File

@@ -0,0 +1,97 @@
# RUN: not llvm-mc -triple s390x-linux-gnu < %s 2> %t
# RUN: FileCheck < %t %s
#CHECK: error: invalid instruction
#CHECK: foo 100, 200
#CHECK: error: unknown token in expression
#CHECK: foo 100(, 200
#CHECK: error: invalid instruction
#CHECK: foo 100(200), 300
#CHECK: error: register expected
#CHECK: foo 100(200,), 300
#CHECK: error: %r0 used in an address
#CHECK: foo 100(200,%r0), 300
#CHECK: error: invalid instruction
#CHECK: foo 100(200,%r1), 300
#CHECK: error: invalid address register
#CHECK: foo 100(%a0), 200
#CHECK: error: invalid instruction
#CHECK: foo 100(%r0), 200
#CHECK: error: %r0 used in an address
#CHECK: foo 100(%v1,%r0), 200
#CHECK: error: invalid instruction
#CHECK: foo 100(%v0,%r1), 200
#CHECK: error: invalid instruction
#CHECK: foo 100(%v31), 200
#CHECK: error: invalid address register
#CHECK: foo 100(%r1,%a0), 200
#CHECK: error: %r0 used in an address
#CHECK: foo 100(%r1,%r0), 200
#CHECK: error: unexpected token in address
#CHECK: foo 100(%r1,%r2, 200
#CHECK: error: invalid instruction
#CHECK: foo 100(%r1,%r2), 200
#CHECK: error: unexpected token in argument list
#CHECK: foo 100(%r1,%r2)(, 200
#CHECK: error: invalid instruction
#CHECK: foo %r0, 200
#CHECK: error: invalid instruction
#CHECK: foo %r15, 200
#CHECK: error: invalid register
#CHECK: foo %r16, 200
#CHECK: error: invalid instruction
#CHECK: foo %f0, 200
#CHECK: error: invalid instruction
#CHECK: foo %f15, 200
#CHECK: error: invalid register
#CHECK: foo %f16, 200
#CHECK: error: invalid instruction
#CHECK: foo %a0, 200
#CHECK: error: invalid instruction
#CHECK: foo %a15, 200
#CHECK: error: invalid register
#CHECK: foo %a16, 200
#CHECK: error: invalid instruction
#CHECK: foo %v0, 200
#CHECK: error: invalid instruction
#CHECK: foo %v31, 200
#CHECK: error: invalid register
#CHECK: foo %v32, 200
#CHECK: error: invalid register
#CHECK: foo %c, 200
#CHECK: error: invalid register
#CHECK: foo %, 200
#CHECK: error: unknown token in expression
#CHECK: foo {, 200
foo 100, 200
foo 100(, 200
foo 100(200), 300
foo 100(200,), 300
foo 100(200,%r0), 300
foo 100(200,%r1), 300
foo 100(%a0), 200
foo 100(%r0), 200
foo 100(%v1,%r0), 200
foo 100(%v0,%r1), 200
foo 100(%v31), 200
foo 100(%r1,%a0), 200
foo 100(%r1,%r0), 200
foo 100(%r1,%r2, 200
foo 100(%r1,%r2), 200
foo 100(%r1,%r2)(, 200
foo %r0, 200
foo %r15, 200
foo %r16, 200
foo %f0, 200
foo %f15, 200
foo %f16, 200
foo %a0, 200
foo %a15, 200
foo %a16, 200
foo %v0, 200
foo %v31, 200
foo %v32, 200
foo %c, 200
foo %, 200
foo {, 200

View File

@@ -0,0 +1,24 @@
# RUN: llvm-mc -triple s390x-linux-gnu -filetype=obj %s | \
# RUN: llvm-readobj -s -sd | FileCheck %s
.section word, "aw"
.word 0xabcd
# CHECK: Section {
# CHECK: Name: word
# CHECK-NEXT: Type: SHT_PROGBITS
# CHECK-NEXT: Flags [
# CHECK-NEXT: SHF_ALLOC
# CHECK-NEXT: SHF_WRITE
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
# CHECK-NEXT: Offset:
# CHECK-NEXT: Size: 2
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
# CHECK-NEXT: AddressAlignment:
# CHECK-NEXT: EntrySize: 0
# CHECK-NEXT: SectionData (
# CHECK-NEXT: 0000: ABCD
# CHECK-NEXT: )
# CHECK-NEXT: }