Imported Upstream version 6.10.0.49

Former-commit-id: 1d6753294b2993e1fbf92de9366bb9544db4189b
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Xamarin Public Jenkins (auto-signing)
2020-01-16 16:38:04 +00:00
parent d94e79959b
commit 468663ddbb
48518 changed files with 2789335 additions and 61176 deletions

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@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-D32
@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null -mattr=+d16 %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-D16
// First operand must be a GPR
vldm s0, {s1, s2}
// CHECK: error: operand must be a register in range [r0, r15]
// CHECK-NEXT: vldm s0, {s1, s2}
vstm s0, {s1, s2}
// CHECK: error: operand must be a register in range [r0, r15]
// CHECK-NEXT: vstm s0, {s1, s2}
// Second operand must be a list of SPRs or DPRs
vldm r0, {r1, r2}
// CHECK: error: invalid instruction, any one of the following would fix this:
// CHECK-NEXT: vldm r0, {r1, r2}
// CHECK: note: operand must be a list of registers in range [s0, s31]
// CHECK-D32: note: operand must be a list of registers in range [d0, d31]
// CHECK-D16: note: operand must be a list of registers in range [d0, d15]
vldm r0, #42
// CHECK: error: invalid instruction, any one of the following would fix this:
// CHECK-NEXT: vldm r0, #42
// CHECK: note: operand must be a list of registers in range [s0, s31]
// CHECK-D32: note: operand must be a list of registers in range [d0, d31]
// CHECK-D16: note: operand must be a list of registers in range [d0, d15]
vldm r0, {s1, d2}
// CHECK: error: invalid register in register list
// CHECK-NEXT: vldm r0, {s1, d2}
vstm r0, {r1, r2}
// CHECK: error: invalid instruction, any one of the following would fix this:
// CHECK-NEXT: vstm r0, {r1, r2}
// CHECK: note: operand must be a list of registers in range [s0, s31]
// CHECK-D32: note: operand must be a list of registers in range [d0, d31]
// CHECK-D16: note: operand must be a list of registers in range [d0, d15]
vstm r0, #42
// CHECK: error: invalid instruction, any one of the following would fix this:
// CHECK-NEXT: vstm r0, #42
// CHECK: note: operand must be a list of registers in range [s0, s31]
// CHECK-D32: note: operand must be a list of registers in range [d0, d31]
// CHECK-D16: note: operand must be a list of registers in range [d0, d15]
vstm r0, {s1, d2}
// CHECK: error: invalid register in register list
// CHECK-NEXT: vstm r0, {s1, d2}