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Imported Upstream version 6.10.0.49

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Former-commit-id: 1d6753294b2993e1fbf92de9366bb9544db4189b
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Xamarin Public Jenkins (auto-signing)
2020-01-16 16:38:04 +00:00
parent d94e79959b
commit 468663ddbb
48518 changed files with 2789335 additions and 61176 deletions
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36
external/llvm-project/llvm/test/MC/ARM/armv8.2a-dotprod-error.s vendored Normal file
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// RUN: not llvm-mc -triple arm -mattr=+dotprod -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
// RUN: not llvm-mc -triple thumb -mattr=+dotprod -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
// Only indices 0 an 1 should be accepted:
vudot.u8 d0, d1, d2[2]
vsdot.s8 d0, d1, d2[2]
vudot.u8 q0, q1, d4[2]
vsdot.s8 q0, q1, d4[2]
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: vudot.u8 d0, d1, d2[2]
// CHECK-ERROR: ^
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: vsdot.s8 d0, d1, d2[2]
// CHECK-ERROR: ^
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: vudot.u8 q0, q1, d4[2]
// CHECK-ERROR: ^
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: vsdot.s8 q0, q1, d4[2]
// CHECK-ERROR: ^
// Only the lower 16 D-registers should be accepted:
vudot.u8 q0, q1, d16[0]
vsdot.s8 q0, q1, d16[0]
// CHECK-ERROR: error: operand must be a register in range [d0, d15]
// CHECK-ERROR: vudot.u8 q0, q1, d16[0]
// CHECK-ERROR: ^
// CHECK-ERROR: error: operand must be a register in range [d0, d15]
// CHECK-ERROR: vsdot.s8 q0, q1, d16[0]
// CHECK-ERROR: ^