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Imported Upstream version 6.10.0.49

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Former-commit-id: 1d6753294b2993e1fbf92de9366bb9544db4189b
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Xamarin Public Jenkins (auto-signing)
2020-01-16 16:38:04 +00:00
parent d94e79959b
commit 468663ddbb
48518 changed files with 2789335 additions and 61176 deletions
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1
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/align-128b.ll.REMOVED.git-id vendored Normal file
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8048dc43404243fda219f44bf68169a9113ddae9

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external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/align-64b.ll vendored Normal file
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external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/arith.ll vendored Normal file
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; RUN: llc -march=hexagon < %s | FileCheck %s
; --- and
; CHECK-LABEL: andb_64:
; CHECK: vand(v0,v1)
define <64 x i8> @andb_64(<64 x i8> %v0, <64 x i8> %v1) #0 {
%p = and <64 x i8> %v0, %v1
ret <64 x i8> %p
}
; CHECK-LABEL: andb_128:
; CHECK: vand(v0,v1)
define <128 x i8> @andb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
%p = and <128 x i8> %v0, %v1
ret <128 x i8> %p
}
; CHECK-LABEL: andh_64:
; CHECK: vand(v0,v1)
define <32 x i16> @andh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = and <32 x i16> %v0, %v1
ret <32 x i16> %p
}
; CHECK-LABEL: andh_128:
; CHECK: vand(v0,v1)
define <64 x i16> @andh_128(<64 x i16> %v0, <64 x i16> %v1) #1 {
%p = and <64 x i16> %v0, %v1
ret <64 x i16> %p
}
; CHECK-LABEL: andw_64:
; CHECK: vand(v0,v1)
define <16 x i32> @andw_64(<16 x i32> %v0, <16 x i32> %v1) #0 {
%p = and <16 x i32> %v0, %v1
ret <16 x i32> %p
}
; CHECK-LABEL: andw_128:
; CHECK: vand(v0,v1)
define <32 x i32> @andw_128(<32 x i32> %v0, <32 x i32> %v1) #1 {
%p = and <32 x i32> %v0, %v1
ret <32 x i32> %p
}
; --- or
; CHECK-LABEL: orb_64:
; CHECK: vor(v0,v1)
define <64 x i8> @orb_64(<64 x i8> %v0, <64 x i8> %v1) #0 {
%p = or <64 x i8> %v0, %v1
ret <64 x i8> %p
}
; CHECK-LABEL: orb_128:
; CHECK: vor(v0,v1)
define <128 x i8> @orb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
%p = or <128 x i8> %v0, %v1
ret <128 x i8> %p
}
; CHECK-LABEL: orh_64:
; CHECK: vor(v0,v1)
define <32 x i16> @orh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = or <32 x i16> %v0, %v1
ret <32 x i16> %p
}
; CHECK-LABEL: orh_128:
; CHECK: vor(v0,v1)
define <64 x i16> @orh_128(<64 x i16> %v0, <64 x i16> %v1) #1 {
%p = or <64 x i16> %v0, %v1
ret <64 x i16> %p
}
; CHECK-LABEL: orw_64:
; CHECK: vor(v0,v1)
define <16 x i32> @orw_64(<16 x i32> %v0, <16 x i32> %v1) #0 {
%p = or <16 x i32> %v0, %v1
ret <16 x i32> %p
}
; CHECK-LABEL: orw_128:
; CHECK: vor(v0,v1)
define <32 x i32> @orw_128(<32 x i32> %v0, <32 x i32> %v1) #1 {
%p = or <32 x i32> %v0, %v1
ret <32 x i32> %p
}
; --- xor
; CHECK-LABEL: xorb_64:
; CHECK: vxor(v0,v1)
define <64 x i8> @xorb_64(<64 x i8> %v0, <64 x i8> %v1) #0 {
%p = xor <64 x i8> %v0, %v1
ret <64 x i8> %p
}
; CHECK-LABEL: xorb_128:
; CHECK: vxor(v0,v1)
define <128 x i8> @xorb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
%p = xor <128 x i8> %v0, %v1
ret <128 x i8> %p
}
; CHECK-LABEL: xorh_64:
; CHECK: vxor(v0,v1)
define <32 x i16> @xorh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = xor <32 x i16> %v0, %v1
ret <32 x i16> %p
}
; CHECK-LABEL: xorh_128:
; CHECK: vxor(v0,v1)
define <64 x i16> @xorh_128(<64 x i16> %v0, <64 x i16> %v1) #1 {
%p = xor <64 x i16> %v0, %v1
ret <64 x i16> %p
}
; CHECK-LABEL: xorw_64:
; CHECK: vxor(v0,v1)
define <16 x i32> @xorw_64(<16 x i32> %v0, <16 x i32> %v1) #0 {
%p = xor <16 x i32> %v0, %v1
ret <16 x i32> %p
}
; CHECK-LABEL: xorw_128:
; CHECK: vxor(v0,v1)
define <32 x i32> @xorw_128(<32 x i32> %v0, <32 x i32> %v1) #1 {
%p = xor <32 x i32> %v0, %v1
ret <32 x i32> %p
}
; --- add
; CHECK-LABEL: addb_64:
; CHECK: vadd(v0.b,v1.b)
define <64 x i8> @addb_64(<64 x i8> %v0, <64 x i8> %v1) #0 {
%p = add <64 x i8> %v0, %v1
ret <64 x i8> %p
}
; CHECK-LABEL: addb_128:
; CHECK: vadd(v0.b,v1.b)
define <128 x i8> @addb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
%p = add <128 x i8> %v0, %v1
ret <128 x i8> %p
}
; CHECK-LABEL: addh_64:
; CHECK: vadd(v0.h,v1.h)
define <32 x i16> @addh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = add <32 x i16> %v0, %v1
ret <32 x i16> %p
}
; CHECK-LABEL: addh_128:
; CHECK: vadd(v0.h,v1.h)
define <64 x i16> @addh_128(<64 x i16> %v0, <64 x i16> %v1) #1 {
%p = add <64 x i16> %v0, %v1
ret <64 x i16> %p
}
; CHECK-LABEL: addw_64:
; CHECK: vadd(v0.w,v1.w)
define <16 x i32> @addw_64(<16 x i32> %v0, <16 x i32> %v1) #0 {
%p = add <16 x i32> %v0, %v1
ret <16 x i32> %p
}
; CHECK-LABEL: addw_128:
; CHECK: vadd(v0.w,v1.w)
define <32 x i32> @addw_128(<32 x i32> %v0, <32 x i32> %v1) #1 {
%p = add <32 x i32> %v0, %v1
ret <32 x i32> %p
}
; --- sub
; CHECK-LABEL: subb_64:
; CHECK: vsub(v0.b,v1.b)
define <64 x i8> @subb_64(<64 x i8> %v0, <64 x i8> %v1) #0 {
%p = sub <64 x i8> %v0, %v1
ret <64 x i8> %p
}
; CHECK-LABEL: subb_128:
; CHECK: vsub(v0.b,v1.b)
define <128 x i8> @subb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
%p = sub <128 x i8> %v0, %v1
ret <128 x i8> %p
}
; CHECK-LABEL: subh_64:
; CHECK: vsub(v0.h,v1.h)
define <32 x i16> @subh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = sub <32 x i16> %v0, %v1
ret <32 x i16> %p
}
; CHECK-LABEL: subh_128:
; CHECK: vsub(v0.h,v1.h)
define <64 x i16> @subh_128(<64 x i16> %v0, <64 x i16> %v1) #1 {
%p = sub <64 x i16> %v0, %v1
ret <64 x i16> %p
}
; CHECK-LABEL: subw_64:
; CHECK: vsub(v0.w,v1.w)
define <16 x i32> @subw_64(<16 x i32> %v0, <16 x i32> %v1) #0 {
%p = sub <16 x i32> %v0, %v1
ret <16 x i32> %p
}
; CHECK-LABEL: subw_128:
; CHECK: vsub(v0.w,v1.w)
define <32 x i32> @subw_128(<32 x i32> %v0, <32 x i32> %v1) #1 {
%p = sub <32 x i32> %v0, %v1
ret <32 x i32> %p
}
; --- mul
; CHECK-LABEL: mpyb_64:
; CHECK: v[[H00:[0-9]+]]:[[L00:[0-9]+]].h = vmpy(v0.b,v1.b)
; CHECK: vshuffe(v[[H00]].b,v[[L00]].b)
define <64 x i8> @mpyb_64(<64 x i8> %v0, <64 x i8> %v1) #0 {
%p = mul <64 x i8> %v0, %v1
ret <64 x i8> %p
}
; CHECK-LABEL: mpyb_128:
; CHECK: v[[H10:[0-9]+]]:[[L10:[0-9]+]].h = vmpy(v0.b,v1.b)
; CHECK: vshuffe(v[[H10]].b,v[[L10]].b)
define <128 x i8> @mpyb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
%p = mul <128 x i8> %v0, %v1
ret <128 x i8> %p
}
; CHECK-LABEL: mpyh_64:
; CHECK: v[[H01:[0-9]+]]:[[L01:[0-9]+]].w = vmpy(v0.h,v1.h)
; CHECK: vshuffe(v[[H01]].h,v[[L01]].h)
define <32 x i16> @mpyh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = mul <32 x i16> %v0, %v1
ret <32 x i16> %p
}
; CHECK-LABEL: mpyh_128:
; CHECK: v[[H11:[0-9]+]]:[[L11:[0-9]+]].w = vmpy(v0.h,v1.h)
; CHECK: vshuffe(v[[H11]].h,v[[L11]].h)
define <64 x i16> @mpyh_128(<64 x i16> %v0, <64 x i16> %v1) #1 {
%p = mul <64 x i16> %v0, %v1
ret <64 x i16> %p
}
; CHECK-LABEL: mpyw_64:
; CHECK-DAG: r[[T00:[0-9]+]] = #16
; CHECK-DAG: v[[T01:[0-9]+]].w = vmpyio(v0.w,v1.h)
; CHECK: v[[T02:[0-9]+]].w = vasl(v[[T01]].w,r[[T00]])
; CHECK: v[[T02]].w += vmpyie(v0.w,v1.uh)
define <16 x i32> @mpyw_64(<16 x i32> %v0, <16 x i32> %v1) #0 {
%p = mul <16 x i32> %v0, %v1
ret <16 x i32> %p
}
; CHECK-LABEL: mpyw_128:
; CHECK-DAG: r[[T10:[0-9]+]] = #16
; CHECK-DAG: v[[T11:[0-9]+]].w = vmpyio(v0.w,v1.h)
; CHECK: v[[T12:[0-9]+]].w = vasl(v[[T11]].w,r[[T10]])
; CHECK: v[[T12]].w += vmpyie(v0.w,v1.uh)
define <32 x i32> @mpyw_128(<32 x i32> %v0, <32 x i32> %v1) #1 {
%p = mul <32 x i32> %v0, %v1
ret <32 x i32> %p
}
attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
attributes #1 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }

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external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/build-vector-i32-type.ll vendored Normal file
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; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that this doesn't crash.
; CHECK: sfcmp
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon"
define void @fred() #0 {
b0:
%v1 = load <16 x float>, <16 x float>* null, align 8
%v2 = fcmp olt <16 x float> undef, %v1
%v3 = select <16 x i1> %v2, <16 x i16> undef, <16 x i16> zeroinitializer
%v4 = sext <16 x i16> %v3 to <16 x i32>
store <16 x i32> %v4, <16 x i32>* undef, align 64
unreachable
}
attributes #0 = { noinline norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }

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external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/concat-vectors-128b.ll vendored Normal file
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external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/concat-vectors-64b.ll vendored Normal file
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; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-LABEL: concat_8:
; CHECK: v[[H00:[0-9]+]]:[[L00:[0-9]+]] = vcombine(v0,v1)
; CHECK: v1:0 = vcombine(v[[H00]],v[[L00]])
define <128 x i8> @concat_8(<64 x i8> %v0, <64 x i8> %v1) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> %v1, <128 x i32> <i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
ret <128 x i8> %p
}
; CHECK-LABEL: concat_16:
; CHECK: v[[H10:[0-9]+]]:[[L10:[0-9]+]] = vcombine(v0,v1)
; CHECK: v1:0 = vcombine(v[[H10]],v[[L10]])
define <64 x i16> @concat_16(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = shufflevector <32 x i16> %v0, <32 x i16> %v1, <64 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
ret <64 x i16> %p
}
; CHECK-LABEL: concat_32:
; CHECK: v[[H20:[0-9]+]]:[[L20:[0-9]+]] = vcombine(v0,v1)
; CHECK: v1:0 = vcombine(v[[H20]],v[[L20]])
define <32 x i32> @concat_32(<16 x i32> %v0, <16 x i32> %v1) #0 {
%p = shufflevector <16 x i32> %v0, <16 x i32> %v1, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
ret <32 x i32> %p
}
attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }

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external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/contract-128b.ll vendored Normal file
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external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/contract-64b.ll vendored Normal file
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; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-LABEL: test_0000
; CHECK: v0.b = vshuffe(v1.b,v0.b)
define <128 x i8> @test_0000(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0001
; CHECK: v0.b = vshuffo(v1.b,v0.b)
define <128 x i8> @test_0001(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0002
; CHECK: v0.h = vshuffe(v1.h,v0.h)
define <128 x i8> @test_0002(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0003
; CHECK: v0.h = vshuffo(v1.h,v0.h)
define <128 x i8> @test_0003(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0004
; CHECK: v0.b = vpacke(v1.h,v0.h)
define <128 x i8> @test_0004(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0005
; CHECK: v0.b = vpacko(v1.h,v0.h)
define <128 x i8> @test_0005(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0006
; CHECK: v0.h = vpacke(v1.w,v0.w)
define <128 x i8> @test_0006(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0007
; CHECK: v0.h = vpacko(v1.w,v0.w)
define <128 x i8> @test_0007(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0008
; CHECK: v0.b = vdeale(v1.b,v0.b)
define <128 x i8> @test_0008(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 32, i32 36, i32 40, i32 44, i32 48, i32 52, i32 56, i32 60, i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30, i32 34, i32 38, i32 42, i32 46, i32 50, i32 54, i32 58, i32 62, i32 64, i32 68, i32 72, i32 76, i32 80, i32 84, i32 88, i32 92, i32 96, i32 100, i32 104, i32 108, i32 112, i32 116, i32 120, i32 124, i32 66, i32 70, i32 74, i32 78, i32 82, i32 86, i32 90, i32 94, i32 98, i32 102, i32 106, i32 110, i32 114, i32 118, i32 122, i32 126, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <128 x i8> %p
}
attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }

1
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/deal-128b.ll.REMOVED.git-id vendored Normal file
View File

@@ -0,0 +1 @@
429ead4a47f76670f3873b08ffb8793e38cca15d

519
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/deal-64b.ll vendored Normal file
View File

File diff suppressed because it is too large Load Diff

115
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/delta-128b.ll vendored Normal file
View File

@@ -0,0 +1,115 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-LABEL: test_0000
; CHECK: vdelta
define <128 x i8> @test_0000(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 127, i32 127, i32 57, i32 57, i32 35, i32 35, i32 21, i32 21, i32 71, i32 71, i32 65, i32 65, i32 27, i32 27, i32 109, i32 109, i32 109, i32 109, i32 27, i32 27, i32 65, i32 65, i32 71, i32 71, i32 21, i32 21, i32 35, i32 35, i32 57, i32 57, i32 127, i32 127, i32 17, i32 17, i32 23, i32 23, i32 23, i32 23, i32 77, i32 77, i32 53, i32 53, i32 53, i32 53, i32 43, i32 43, i32 53, i32 53, i32 53, i32 53, i32 23, i32 23, i32 53, i32 53, i32 23, i32 23, i32 35, i32 35, i32 35, i32 35, i32 23, i32 23, i32 23, i32 23, i32 119, i32 119, i32 119, i32 119, i32 19, i32 19, i32 65, i32 65, i32 19, i32 19, i32 19, i32 19, i32 9, i32 9, i32 9, i32 9, i32 95, i32 95, i32 25, i32 25, i32 25, i32 25, i32 11, i32 11, i32 25, i32 25, i32 25, i32 25, i32 13, i32 13, i32 13, i32 13, i32 119, i32 119, i32 33, i32 33, i32 61, i32 61, i32 61, i32 61, i32 117, i32 117, i32 117, i32 117, i32 19, i32 19, i32 117, i32 117, i32 79, i32 79, i32 79, i32 79, i32 79, i32 79, i32 79, i32 79, i32 17, i32 17, i32 17, i32 17, i32 69, i32 69, i32 79, i32 79>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0001
; CHECK: vdelta
define <128 x i8> @test_0001(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 5, i32 5, i32 75, i32 75, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 55, i32 55, i32 9, i32 9, i32 75, i32 75, i32 109, i32 109, i32 81, i32 81, i32 83, i32 83, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 81, i32 81, i32 75, i32 75, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 87, i32 87, i32 87, i32 87, i32 3, i32 3, i32 29, i32 29, i32 101, i32 101, i32 123, i32 123, i32 73, i32 73, i32 73, i32 73, i32 123, i32 123, i32 93, i32 93, i32 33, i32 33, i32 119, i32 119, i32 21, i32 21, i32 3, i32 3, i32 21, i32 21, i32 79, i32 79, i32 3, i32 3, i32 21, i32 21, i32 79, i32 79, i32 21, i32 21, i32 69, i32 69, i32 39, i32 39, i32 69, i32 69, i32 27, i32 27, i32 69, i32 69, i32 63, i32 63, i32 25, i32 25, i32 25, i32 25, i32 11, i32 11, i32 25, i32 25, i32 25, i32 25, i32 63, i32 63, i32 63, i32 63, i32 63, i32 63, i32 83, i32 83, i32 65, i32 65>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0002
; CHECK: vdelta
define <128 x i8> @test_0002(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 95, i32 95, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 15, i32 15, i32 41, i32 41, i32 15, i32 15, i32 15, i32 15, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 39, i32 39, i32 39, i32 39, i32 39, i32 39, i32 25, i32 25, i32 35, i32 35, i32 35, i32 35, i32 101, i32 101, i32 101, i32 101, i32 107, i32 107, i32 61, i32 61, i32 65, i32 65, i32 65, i32 65, i32 39, i32 39, i32 39, i32 39, i32 107, i32 107, i32 107, i32 107, i32 93, i32 93, i32 43, i32 43, i32 33, i32 33, i32 33, i32 33, i32 53, i32 53, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 33, i32 33, i32 33, i32 33, i32 37, i32 37, i32 35, i32 35, i32 33, i32 33, i32 33, i32 33, i32 13, i32 13, i32 31, i32 31, i32 53, i32 53, i32 53, i32 53, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 33, i32 33, i32 33, i32 33, i32 51, i32 51, i32 25, i32 25, i32 31, i32 31, i32 25, i32 25, i32 53, i32 53, i32 53, i32 53, i32 51, i32 51, i32 51, i32 51>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0003
; CHECK: vdelta
define <128 x i8> @test_0003(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 89, i32 89, i32 89, i32 89, i32 109, i32 109, i32 7, i32 7, i32 99, i32 99, i32 99, i32 99, i32 109, i32 109, i32 31, i32 31, i32 111, i32 111, i32 111, i32 111, i32 99, i32 99, i32 5, i32 5, i32 9, i32 9, i32 99, i32 99, i32 99, i32 99, i32 5, i32 5, i32 59, i32 59, i32 21, i32 21, i32 59, i32 59, i32 59, i32 59, i32 17, i32 17, i32 15, i32 15, i32 99, i32 99, i32 17, i32 17, i32 99, i32 99, i32 99, i32 99, i32 9, i32 9, i32 9, i32 9, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 99, i32 99, i32 41, i32 41, i32 41, i32 41, i32 47, i32 47, i32 41, i32 41, i32 41, i32 41, i32 47, i32 47, i32 41, i32 41, i32 41, i32 41, i32 109, i32 109, i32 109, i32 109, i32 109, i32 109, i32 109, i32 109, i32 59, i32 59, i32 89, i32 89, i32 47, i32 47, i32 47, i32 47, i32 89, i32 89, i32 55, i32 55, i32 69, i32 69, i32 69, i32 69, i32 69, i32 69, i32 69, i32 69, i32 89, i32 89, i32 89, i32 89, i32 89, i32 89, i32 89, i32 89, i32 55, i32 55, i32 29, i32 29, i32 117, i32 117, i32 55, i32 55, i32 89, i32 89, i32 55, i32 55>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0004
; CHECK: vdelta
define <128 x i8> @test_0004(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 27, i32 27, i32 69, i32 69, i32 27, i32 27, i32 27, i32 27, i32 79, i32 79, i32 93, i32 93, i32 79, i32 79, i32 79, i32 79, i32 99, i32 99, i32 105, i32 105, i32 99, i32 99, i32 99, i32 99, i32 85, i32 85, i32 39, i32 39, i32 85, i32 85, i32 27, i32 27, i32 69, i32 69, i32 69, i32 69, i32 55, i32 55, i32 55, i32 55, i32 55, i32 55, i32 55, i32 55, i32 55, i32 55, i32 55, i32 55, i32 57, i32 57, i32 57, i32 57, i32 51, i32 51, i32 13, i32 13, i32 107, i32 107, i32 107, i32 107, i32 85, i32 85, i32 85, i32 85, i32 87, i32 87, i32 87, i32 87, i32 11, i32 11, i32 49, i32 49, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 49, i32 49, i32 95, i32 95, i32 49, i32 49, i32 95, i32 95, i32 51, i32 51, i32 53, i32 53, i32 95, i32 95, i32 95, i32 95, i32 51, i32 51, i32 51, i32 51, i32 25, i32 25, i32 51, i32 51, i32 25, i32 25, i32 25, i32 25, i32 87, i32 87, i32 87, i32 87, i32 81, i32 81, i32 81, i32 81, i32 81, i32 81, i32 107, i32 107, i32 93, i32 93, i32 51, i32 51, i32 81, i32 81, i32 81, i32 81>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0005
; CHECK: vdelta
define <128 x i8> @test_0005(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 29, i32 29, i32 29, i32 29, i32 79, i32 79, i32 79, i32 79, i32 9, i32 9, i32 27, i32 27, i32 79, i32 79, i32 29, i32 29, i32 31, i32 31, i32 69, i32 69, i32 9, i32 9, i32 31, i32 31, i32 9, i32 9, i32 31, i32 31, i32 31, i32 31, i32 9, i32 9, i32 57, i32 57, i32 57, i32 57, i32 51, i32 51, i32 109, i32 109, i32 79, i32 79, i32 79, i32 79, i32 79, i32 79, i32 21, i32 21, i32 27, i32 27, i32 21, i32 21, i32 27, i32 27, i32 27, i32 27, i32 31, i32 31, i32 105, i32 105, i32 31, i32 31, i32 31, i32 31, i32 21, i32 21, i32 79, i32 79, i32 79, i32 79, i32 79, i32 79, i32 49, i32 49, i32 119, i32 119, i32 119, i32 119, i32 21, i32 21, i32 107, i32 107, i32 107, i32 107, i32 21, i32 21, i32 71, i32 71, i32 71, i32 71, i32 71, i32 71, i32 21, i32 21, i32 21, i32 21, i32 119, i32 119, i32 119, i32 119, i32 67, i32 67, i32 37, i32 37, i32 37, i32 37, i32 37, i32 37, i32 67, i32 67, i32 41, i32 41, i32 81, i32 81, i32 81, i32 81, i32 71, i32 71, i32 71, i32 71, i32 71, i32 71, i32 71, i32 71, i32 81, i32 81, i32 81, i32 81>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0006
; CHECK: vdelta
define <128 x i8> @test_0006(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 45, i32 45, i32 47, i32 47, i32 47, i32 47, i32 47, i32 47, i32 25, i32 25, i32 3, i32 3, i32 21, i32 21, i32 21, i32 21, i32 103, i32 103, i32 103, i32 103, i32 125, i32 125, i32 125, i32 125, i32 75, i32 75, i32 25, i32 25, i32 25, i32 25, i32 75, i32 75, i32 55, i32 55, i32 55, i32 55, i32 69, i32 69, i32 69, i32 69, i32 55, i32 55, i32 55, i32 55, i32 25, i32 25, i32 25, i32 25, i32 99, i32 99, i32 99, i32 99, i32 17, i32 17, i32 55, i32 55, i32 55, i32 55, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 41, i32 41, i32 41, i32 41, i32 103, i32 103, i32 93, i32 93, i32 83, i32 83, i32 83, i32 83, i32 93, i32 93, i32 93, i32 93, i32 43, i32 43, i32 43, i32 43, i32 25, i32 25, i32 25, i32 25, i32 25, i32 25, i32 43, i32 43, i32 103, i32 103, i32 25, i32 25, i32 91, i32 91, i32 33, i32 33, i32 91, i32 91, i32 13, i32 13, i32 33, i32 33, i32 33, i32 33, i32 33, i32 33, i32 91, i32 91, i32 37, i32 37, i32 63, i32 63, i32 33, i32 33, i32 33, i32 33, i32 3, i32 3, i32 41, i32 41, i32 93, i32 93, i32 93, i32 93>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0007
; CHECK: vdelta
define <128 x i8> @test_0007(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 85, i32 85, i32 11, i32 11, i32 119, i32 119, i32 119, i32 119, i32 81, i32 81, i32 11, i32 11, i32 111, i32 111, i32 81, i32 81, i32 13, i32 13, i32 111, i32 111, i32 27, i32 27, i32 81, i32 81, i32 27, i32 27, i32 13, i32 13, i32 27, i32 27, i32 13, i32 13, i32 39, i32 39, i32 39, i32 39, i32 81, i32 81, i32 27, i32 27, i32 85, i32 85, i32 35, i32 35, i32 85, i32 85, i32 85, i32 85, i32 39, i32 39, i32 13, i32 13, i32 39, i32 39, i32 39, i32 39, i32 83, i32 83, i32 83, i32 83, i32 83, i32 83, i32 83, i32 83, i32 21, i32 21, i32 103, i32 103, i32 21, i32 21, i32 103, i32 103, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 29, i32 29, i32 29, i32 29, i32 1, i32 1, i32 1, i32 1, i32 29, i32 29, i32 29, i32 29, i32 73, i32 73, i32 73, i32 73, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 71, i32 71, i32 77, i32 77, i32 71, i32 71, i32 71, i32 71, i32 35, i32 35, i32 35, i32 35, i32 21, i32 21, i32 79, i32 79, i32 59, i32 59, i32 59, i32 59, i32 17, i32 17, i32 17, i32 17>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0008
; CHECK: vdelta
define <128 x i8> @test_0008(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 99, i32 99, i32 53, i32 53, i32 111, i32 111, i32 65, i32 65, i32 71, i32 71, i32 71, i32 71, i32 71, i32 71, i32 71, i32 71, i32 95, i32 95, i32 95, i32 95, i32 25, i32 25, i32 95, i32 95, i32 25, i32 25, i32 71, i32 71, i32 77, i32 77, i32 77, i32 77, i32 25, i32 25, i32 25, i32 25, i32 87, i32 87, i32 25, i32 25, i32 115, i32 115, i32 65, i32 65, i32 115, i32 115, i32 115, i32 115, i32 45, i32 45, i32 45, i32 45, i32 99, i32 99, i32 99, i32 99, i32 71, i32 71, i32 71, i32 71, i32 11, i32 11, i32 11, i32 11, i32 67, i32 67, i32 45, i32 45, i32 45, i32 45, i32 45, i32 45, i32 49, i32 49, i32 49, i32 49, i32 49, i32 49, i32 71, i32 71, i32 55, i32 55, i32 55, i32 55, i32 1, i32 1, i32 1, i32 1, i32 59, i32 59, i32 59, i32 59, i32 55, i32 55, i32 55, i32 55, i32 89, i32 89, i32 89, i32 89, i32 89, i32 89, i32 89, i32 89, i32 45, i32 45, i32 75, i32 75, i32 17, i32 17, i32 17, i32 17, i32 1, i32 1, i32 67, i32 67, i32 63, i32 63, i32 1, i32 1, i32 59, i32 59, i32 89, i32 89, i32 89, i32 89, i32 63, i32 63>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0009
; CHECK: vdelta
define <128 x i8> @test_0009(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 57, i32 57, i32 59, i32 59, i32 59, i32 59, i32 57, i32 57, i32 93, i32 93, i32 93, i32 93, i32 57, i32 57, i32 95, i32 95, i32 55, i32 55, i32 105, i32 105, i32 105, i32 105, i32 105, i32 105, i32 21, i32 21, i32 21, i32 21, i32 67, i32 67, i32 67, i32 67, i32 61, i32 61, i32 59, i32 59, i32 33, i32 33, i32 33, i32 33, i32 115, i32 115, i32 115, i32 115, i32 33, i32 33, i32 33, i32 33, i32 67, i32 67, i32 67, i32 67, i32 67, i32 67, i32 67, i32 67, i32 33, i32 33, i32 67, i32 67, i32 61, i32 61, i32 61, i32 61, i32 79, i32 79, i32 45, i32 45, i32 33, i32 33, i32 79, i32 79, i32 41, i32 41, i32 91, i32 91, i32 79, i32 79, i32 45, i32 45, i32 107, i32 107, i32 61, i32 61, i32 107, i32 107, i32 107, i32 107, i32 55, i32 55, i32 5, i32 5, i32 107, i32 107, i32 107, i32 107, i32 39, i32 39, i32 39, i32 39, i32 5, i32 5, i32 5, i32 5, i32 51, i32 51, i32 45, i32 45, i32 45, i32 45, i32 45, i32 45, i32 47, i32 47, i32 47, i32 47, i32 45, i32 45, i32 45, i32 45, i32 5, i32 5, i32 11, i32 11, i32 5, i32 5, i32 11, i32 11>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000a
; CHECK: vdelta
define <128 x i8> @test_000a(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 87, i32 87, i32 87, i32 87, i32 45, i32 45, i32 45, i32 45, i32 57, i32 57, i32 57, i32 57, i32 87, i32 87, i32 87, i32 87, i32 15, i32 15, i32 15, i32 15, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 43, i32 43, i32 81, i32 81, i32 81, i32 81, i32 39, i32 39, i32 77, i32 77, i32 33, i32 33, i32 33, i32 33, i32 9, i32 9, i32 9, i32 9, i32 37, i32 37, i32 37, i32 37, i32 9, i32 9, i32 9, i32 9, i32 77, i32 77, i32 77, i32 77, i32 31, i32 31, i32 31, i32 31, i32 43, i32 43, i32 33, i32 33, i32 125, i32 125, i32 125, i32 125, i32 105, i32 105, i32 105, i32 105, i32 5, i32 5, i32 39, i32 39, i32 39, i32 39, i32 39, i32 39, i32 111, i32 111, i32 25, i32 25, i32 25, i32 25, i32 99, i32 99, i32 99, i32 99, i32 99, i32 99, i32 77, i32 77, i32 99, i32 99, i32 33, i32 33, i32 33, i32 33, i32 19, i32 19, i32 19, i32 19, i32 7, i32 7, i32 125, i32 125, i32 7, i32 7, i32 7, i32 7, i32 59, i32 59, i32 59, i32 59, i32 7, i32 7, i32 57, i32 57, i32 111, i32 111, i32 111, i32 111, i32 109, i32 109, i32 109, i32 109>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000b
; CHECK: vdelta
define <128 x i8> @test_000b(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 7, i32 7, i32 7, i32 7, i32 41, i32 41, i32 7, i32 7, i32 41, i32 41, i32 41, i32 41, i32 7, i32 7, i32 41, i32 41, i32 41, i32 41, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 15, i32 15, i32 113, i32 113, i32 123, i32 123, i32 113, i32 113, i32 35, i32 35, i32 73, i32 73, i32 73, i32 73, i32 35, i32 35, i32 73, i32 73, i32 63, i32 63, i32 69, i32 69, i32 35, i32 35, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 21, i32 21, i32 77, i32 77, i32 77, i32 77, i32 77, i32 77, i32 77, i32 77, i32 51, i32 51, i32 51, i32 51, i32 89, i32 89, i32 89, i32 89, i32 103, i32 103, i32 103, i32 103, i32 97, i32 97, i32 123, i32 123, i32 31, i32 31, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 51, i32 51, i32 113, i32 113, i32 113, i32 113, i32 113, i32 113, i32 113, i32 113, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 89, i32 89, i32 55, i32 55, i32 97, i32 97, i32 55, i32 55, i32 29, i32 29, i32 69, i32 69, i32 51, i32 51, i32 55, i32 55, i32 55, i32 55>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000c
; CHECK: vdelta
define <128 x i8> @test_000c(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 101, i32 101, i32 31, i32 31, i32 97, i32 97, i32 31, i32 31, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 97, i32 97, i32 97, i32 97, i32 97, i32 97, i32 97, i32 97, i32 97, i32 97, i32 87, i32 87, i32 125, i32 125, i32 125, i32 125, i32 39, i32 39, i32 65, i32 65, i32 19, i32 19, i32 19, i32 19, i32 5, i32 5, i32 43, i32 43, i32 5, i32 5, i32 5, i32 5, i32 15, i32 15, i32 21, i32 21, i32 15, i32 15, i32 15, i32 15, i32 43, i32 43, i32 43, i32 43, i32 13, i32 13, i32 13, i32 13, i32 31, i32 31, i32 31, i32 31, i32 9, i32 9, i32 9, i32 9, i32 117, i32 117, i32 43, i32 43, i32 31, i32 31, i32 117, i32 117, i32 93, i32 93, i32 35, i32 35, i32 65, i32 65, i32 65, i32 65, i32 65, i32 65, i32 65, i32 65, i32 59, i32 59, i32 93, i32 93, i32 125, i32 125, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 49, i32 49, i32 49, i32 49, i32 23, i32 23, i32 5, i32 5, i32 57, i32 57, i32 57, i32 57, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 5, i32 5>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000d
; CHECK: vdelta
define <128 x i8> @test_000d(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 59, i32 59, i32 41, i32 41, i32 125, i32 125, i32 59, i32 59, i32 41, i32 41, i32 63, i32 63, i32 63, i32 63, i32 41, i32 41, i32 41, i32 41, i32 107, i32 107, i32 7, i32 7, i32 7, i32 7, i32 107, i32 107, i32 107, i32 107, i32 41, i32 41, i32 41, i32 41, i32 37, i32 37, i32 37, i32 37, i32 11, i32 11, i32 11, i32 11, i32 81, i32 81, i32 81, i32 81, i32 95, i32 95, i32 45, i32 45, i32 93, i32 93, i32 93, i32 93, i32 93, i32 93, i32 35, i32 35, i32 57, i32 57, i32 95, i32 95, i32 95, i32 95, i32 37, i32 37, i32 97, i32 97, i32 19, i32 19, i32 19, i32 19, i32 97, i32 97, i32 53, i32 53, i32 53, i32 53, i32 43, i32 43, i32 43, i32 43, i32 101, i32 101, i32 101, i32 101, i32 99, i32 99, i32 99, i32 99, i32 99, i32 99, i32 99, i32 99, i32 97, i32 97, i32 23, i32 23, i32 89, i32 89, i32 51, i32 51, i32 51, i32 51, i32 89, i32 89, i32 45, i32 45, i32 51, i32 51, i32 51, i32 51, i32 113, i32 113, i32 89, i32 89, i32 89, i32 89, i32 75, i32 75, i32 75, i32 75, i32 89, i32 89, i32 89, i32 89, i32 63, i32 63, i32 63, i32 63>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000e
; CHECK: vdelta
define <128 x i8> @test_000e(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 63, i32 63, i32 63, i32 63, i32 35, i32 35, i32 13, i32 13, i32 35, i32 35, i32 25, i32 25, i32 13, i32 13, i32 13, i32 13, i32 53, i32 53, i32 53, i32 53, i32 7, i32 7, i32 7, i32 7, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 51, i32 51, i32 125, i32 125, i32 125, i32 125, i32 25, i32 25, i32 25, i32 25, i32 59, i32 59, i32 37, i32 37, i32 37, i32 37, i32 37, i32 37, i32 41, i32 41, i32 41, i32 41, i32 19, i32 19, i32 53, i32 53, i32 53, i32 53, i32 53, i32 53, i32 53, i32 53, i32 53, i32 53, i32 51, i32 51, i32 69, i32 69, i32 113, i32 113, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 73, i32 73, i32 51, i32 51, i32 3, i32 3, i32 3, i32 3, i32 121, i32 121, i32 3, i32 3, i32 121, i32 121, i32 3, i32 3, i32 121, i32 121, i32 31, i32 31, i32 41, i32 41, i32 55, i32 55, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 31, i32 31, i32 117, i32 117, i32 41, i32 41, i32 41, i32 41, i32 69, i32 69, i32 69, i32 69, i32 31, i32 31, i32 31, i32 31, i32 51, i32 51, i32 109, i32 109>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000f
; CHECK: vdelta
define <128 x i8> @test_000f(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 119, i32 119, i32 119, i32 119, i32 123, i32 123, i32 123, i32 123, i32 119, i32 119, i32 61, i32 61, i32 61, i32 61, i32 61, i32 61, i32 19, i32 19, i32 19, i32 19, i32 73, i32 73, i32 19, i32 19, i32 109, i32 109, i32 109, i32 109, i32 63, i32 63, i32 63, i32 63, i32 53, i32 53, i32 53, i32 53, i32 51, i32 51, i32 51, i32 51, i32 65, i32 65, i32 65, i32 65, i32 87, i32 87, i32 87, i32 87, i32 65, i32 65, i32 65, i32 65, i32 65, i32 65, i32 65, i32 65, i32 43, i32 43, i32 43, i32 43, i32 53, i32 53, i32 53, i32 53, i32 47, i32 47, i32 47, i32 47, i32 35, i32 35, i32 57, i32 57, i32 35, i32 35, i32 35, i32 35, i32 47, i32 47, i32 47, i32 47, i32 83, i32 83, i32 1, i32 1, i32 55, i32 55, i32 29, i32 29, i32 83, i32 83, i32 83, i32 83, i32 55, i32 55, i32 55, i32 55, i32 125, i32 125, i32 125, i32 125, i32 11, i32 11, i32 11, i32 11, i32 125, i32 125, i32 125, i32 125, i32 57, i32 57, i32 115, i32 115, i32 127, i32 127, i32 53, i32 53, i32 35, i32 35, i32 35, i32 35, i32 57, i32 57, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35>
ret <128 x i8> %p
}
attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }

115
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/delta-64b.ll vendored Normal file
View File

@@ -0,0 +1,115 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-LABEL: test_0000
; CHECK: vdelta
define <64 x i8> @test_0000(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 41, i32 41, i32 11, i32 11, i32 53, i32 53, i32 7, i32 7, i32 63, i32 63, i32 53, i32 53, i32 11, i32 11, i32 17, i32 17, i32 35, i32 35, i32 29, i32 29, i32 55, i32 55, i32 29, i32 29, i32 55, i32 55, i32 55, i32 55, i32 17, i32 17, i32 35, i32 35, i32 25, i32 25, i32 39, i32 39, i32 25, i32 25, i32 25, i32 25, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 27, i32 27, i32 39, i32 39, i32 53, i32 53, i32 25, i32 25, i32 25, i32 25, i32 43, i32 43, i32 45, i32 45, i32 25, i32 25, i32 25, i32 25>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0001
; CHECK: vdelta
define <64 x i8> @test_0001(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 33, i32 33, i32 33, i32 33, i32 63, i32 63, i32 61, i32 61, i32 19, i32 19, i32 19, i32 19, i32 55, i32 55, i32 61, i32 61, i32 61, i32 61, i32 7, i32 7, i32 61, i32 61, i32 3, i32 3, i32 33, i32 33, i32 33, i32 33, i32 7, i32 7, i32 61, i32 61, i32 21, i32 21, i32 21, i32 21, i32 27, i32 27, i32 21, i32 21, i32 63, i32 63, i32 63, i32 63, i32 41, i32 41, i32 19, i32 19, i32 3, i32 3, i32 3, i32 3, i32 37, i32 37, i32 37, i32 37, i32 3, i32 3, i32 3, i32 3, i32 55, i32 55, i32 41, i32 41>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0002
; CHECK: vdelta
define <64 x i8> @test_0002(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 55, i32 55, i32 59, i32 59, i32 13, i32 13, i32 9, i32 9, i32 9, i32 9, i32 19, i32 19, i32 19, i32 19, i32 61, i32 61, i32 19, i32 19, i32 61, i32 61, i32 61, i32 61, i32 15, i32 15, i32 61, i32 61, i32 1, i32 1, i32 35, i32 35, i32 1, i32 1, i32 15, i32 15, i32 27, i32 27, i32 27, i32 27, i32 27, i32 27, i32 27, i32 27, i32 53, i32 53, i32 53, i32 53, i32 41, i32 41, i32 15, i32 15, i32 35, i32 35, i32 53, i32 53, i32 35, i32 35, i32 35, i32 35>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0003
; CHECK: vdelta
define <64 x i8> @test_0003(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 37, i32 37, i32 35, i32 35, i32 45, i32 45, i32 45, i32 45, i32 35, i32 35, i32 35, i32 35, i32 27, i32 27, i32 45, i32 45, i32 45, i32 45, i32 39, i32 39, i32 15, i32 15, i32 15, i32 15, i32 37, i32 37, i32 37, i32 37, i32 15, i32 15, i32 15, i32 15, i32 43, i32 43, i32 37, i32 37, i32 7, i32 7, i32 37, i32 37, i32 7, i32 7, i32 37, i32 37, i32 29, i32 29, i32 43, i32 43, i32 33, i32 33, i32 7, i32 7>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0004
; CHECK: vdelta
define <64 x i8> @test_0004(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 21, i32 21, i32 21, i32 21, i32 31, i32 31, i32 31, i32 31, i32 9, i32 9, i32 31, i32 31, i32 9, i32 9, i32 31, i32 31, i32 49, i32 49, i32 27, i32 27, i32 31, i32 31, i32 21, i32 21, i32 55, i32 55, i32 55, i32 55, i32 27, i32 27, i32 9, i32 9, i32 17, i32 17, i32 11, i32 11, i32 17, i32 17, i32 17, i32 17, i32 11, i32 11, i32 17, i32 17, i32 15, i32 15, i32 29, i32 29, i32 25, i32 25, i32 27, i32 27, i32 27, i32 27, i32 27, i32 27, i32 37, i32 37, i32 27, i32 27, i32 27, i32 27, i32 25, i32 25>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0005
; CHECK: vdelta
define <64 x i8> @test_0005(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 13, i32 13, i32 43, i32 43, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 13, i32 13, i32 13, i32 13, i32 43, i32 43, i32 39, i32 39, i32 9, i32 9, i32 9, i32 9, i32 39, i32 39, i32 43, i32 43, i32 9, i32 9, i32 61, i32 61, i32 43, i32 43, i32 53, i32 53, i32 63, i32 63, i32 53, i32 53, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 19, i32 53, i32 53, i32 27, i32 27, i32 53, i32 53, i32 15, i32 15, i32 53, i32 53, i32 17, i32 17, i32 39, i32 39, i32 39, i32 39, i32 39, i32 39>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0006
; CHECK: vdelta
define <64 x i8> @test_0006(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 29, i32 29, i32 31, i32 31, i32 29, i32 29, i32 29, i32 29, i32 11, i32 11, i32 37, i32 37, i32 11, i32 11, i32 11, i32 11, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 21, i32 29, i32 29, i32 7, i32 7, i32 35, i32 35, i32 25, i32 25, i32 15, i32 15, i32 49, i32 49, i32 21, i32 21, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 49, i32 49, i32 7, i32 7, i32 41, i32 41, i32 41, i32 41, i32 7, i32 7, i32 41, i32 41, i32 7, i32 7, i32 41, i32 41, i32 41, i32 41>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0007
; CHECK: vdelta
define <64 x i8> @test_0007(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 43, i32 43, i32 43, i32 43, i32 47, i32 47, i32 47, i32 47, i32 7, i32 7, i32 57, i32 57, i32 45, i32 45, i32 45, i32 45, i32 23, i32 23, i32 33, i32 33, i32 23, i32 23, i32 45, i32 45, i32 31, i32 31, i32 31, i32 31, i32 45, i32 45, i32 31, i32 31, i32 43, i32 43, i32 37, i32 37, i32 25, i32 25, i32 15, i32 15, i32 37, i32 37, i32 37, i32 37, i32 37, i32 37, i32 37, i32 37, i32 15, i32 15, i32 1, i32 1, i32 15, i32 15, i32 15, i32 15, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0008
; CHECK: vdelta
define <64 x i8> @test_0008(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 37, i32 37, i32 63, i32 63, i32 37, i32 37, i32 35, i32 35, i32 63, i32 63, i32 63, i32 63, i32 37, i32 37, i32 37, i32 37, i32 63, i32 63, i32 63, i32 63, i32 37, i32 37, i32 35, i32 35, i32 63, i32 63, i32 37, i32 37, i32 63, i32 63, i32 37, i32 37, i32 37, i32 37, i32 63, i32 63, i32 9, i32 9, i32 63, i32 63, i32 13, i32 13, i32 39, i32 39, i32 19, i32 19, i32 13, i32 13, i32 49, i32 49, i32 49, i32 49, i32 21, i32 21, i32 21, i32 21, i32 19, i32 19, i32 49, i32 49, i32 63, i32 63, i32 63, i32 63>
ret <64 x i8> %p
}
; CHECK-LABEL: test_0009
; CHECK: vdelta
define <64 x i8> @test_0009(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 25, i32 25, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 25, i32 25, i32 25, i32 25, i32 19, i32 19, i32 25, i32 25, i32 35, i32 35, i32 41, i32 41, i32 41, i32 41, i32 41, i32 41, i32 35, i32 35, i32 35, i32 35, i32 35, i32 35, i32 29, i32 29, i32 11, i32 11, i32 11, i32 11, i32 47, i32 47, i32 21, i32 21, i32 33, i32 33, i32 47, i32 47, i32 11, i32 11, i32 33, i32 33, i32 29, i32 29, i32 55, i32 55, i32 33, i32 33, i32 59, i32 59, i32 35, i32 35, i32 35, i32 35, i32 29, i32 29, i32 35, i32 35>
ret <64 x i8> %p
}
; CHECK-LABEL: test_000a
; CHECK: vdelta
define <64 x i8> @test_000a(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 17, i32 17, i32 17, i32 17, i32 3, i32 3, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 43, i32 43, i32 33, i32 33, i32 33, i32 33, i32 19, i32 19, i32 5, i32 5, i32 13, i32 13, i32 27, i32 27, i32 7, i32 7, i32 33, i32 33, i32 1, i32 1, i32 1, i32 1, i32 13, i32 13, i32 13, i32 13, i32 25, i32 25, i32 15, i32 15, i32 15, i32 15, i32 25, i32 25, i32 35, i32 35, i32 25, i32 25, i32 25, i32 25, i32 35, i32 35, i32 1, i32 1, i32 7, i32 7, i32 5, i32 5, i32 7, i32 7>
ret <64 x i8> %p
}
; CHECK-LABEL: test_000b
; CHECK: vdelta
define <64 x i8> @test_000b(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 29, i32 29, i32 15, i32 15, i32 63, i32 63, i32 63, i32 63, i32 11, i32 11, i32 11, i32 11, i32 53, i32 53, i32 53, i32 53, i32 39, i32 39, i32 53, i32 53, i32 59, i32 59, i32 49, i32 49, i32 39, i32 39, i32 13, i32 13, i32 59, i32 59, i32 59, i32 59, i32 57, i32 57, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 59, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 9, i32 9>
ret <64 x i8> %p
}
; CHECK-LABEL: test_000c
; CHECK: vdelta
define <64 x i8> @test_000c(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 41, i32 41, i32 63, i32 63, i32 45, i32 45, i32 63, i32 63, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 43, i32 43, i32 53, i32 53, i32 23, i32 23, i32 23, i32 23, i32 35, i32 35, i32 41, i32 41, i32 35, i32 35, i32 35, i32 35, i32 31, i32 31, i32 17, i32 17, i32 17, i32 17, i32 35, i32 35, i32 41, i32 41, i32 41, i32 41, i32 37, i32 37, i32 37, i32 37, i32 33, i32 33, i32 31, i32 31, i32 13, i32 13, i32 31, i32 31>
ret <64 x i8> %p
}
; CHECK-LABEL: test_000d
; CHECK: vdelta
define <64 x i8> @test_000d(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 47, i32 47, i32 47, i32 47, i32 47, i32 47, i32 53, i32 53, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 11, i32 11, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 9, i32 9, i32 27, i32 27, i32 9, i32 9, i32 27, i32 27, i32 9, i32 9, i32 9, i32 9, i32 27, i32 27, i32 27, i32 27, i32 35, i32 35, i32 35, i32 35, i32 17, i32 17, i32 35, i32 35, i32 21, i32 21, i32 21, i32 21, i32 35, i32 35, i32 57, i32 57>
ret <64 x i8> %p
}
; CHECK-LABEL: test_000e
; CHECK: vdelta
define <64 x i8> @test_000e(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 27, i32 27, i32 13, i32 13, i32 13, i32 13, i32 7, i32 7, i32 63, i32 63, i32 13, i32 13, i32 27, i32 27, i32 13, i32 13, i32 13, i32 13, i32 63, i32 63, i32 43, i32 43, i32 9, i32 9, i32 21, i32 21, i32 19, i32 19, i32 21, i32 21, i32 55, i32 55, i32 5, i32 5, i32 19, i32 19, i32 63, i32 63, i32 5, i32 5, i32 49, i32 49, i32 11, i32 11, i32 63, i32 63, i32 63, i32 63, i32 33, i32 33, i32 33, i32 33, i32 59, i32 59, i32 33, i32 33, i32 5, i32 5, i32 59, i32 59, i32 55, i32 55, i32 5, i32 5>
ret <64 x i8> %p
}
; CHECK-LABEL: test_000f
; CHECK: vdelta
define <64 x i8> @test_000f(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32><i32 19, i32 19, i32 61, i32 61, i32 61, i32 61, i32 61, i32 61, i32 15, i32 15, i32 15, i32 15, i32 57, i32 57, i32 19, i32 19, i32 19, i32 19, i32 61, i32 61, i32 23, i32 23, i32 61, i32 61, i32 5, i32 5, i32 5, i32 5, i32 41, i32 41, i32 41, i32 41, i32 51, i32 51, i32 1, i32 1, i32 29, i32 29, i32 29, i32 29, i32 29, i32 29, i32 7, i32 7, i32 29, i32 29, i32 7, i32 7, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 29, i32 29, i32 21, i32 21, i32 43, i32 43, i32 43, i32 43, i32 43, i32 43>
ret <64 x i8> %p
}
attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }

195
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/delta2-64b.ll vendored Normal file
View File

@@ -0,0 +1,195 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-LABEL: test_0000
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0000(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 89, i32 94, i32 119, i32 64, i32 85, i32 34, i32 91, i32 60, i32 33, i32 102, i32 79, i32 88, i32 13, i32 26, i32 35, i32 68, i32 48, i32 81, i32 39, i32 48, i32 48, i32 81, i32 106, i32 106, i32 81, i32 106, i32 76, i32 81, i32 106, i32 106, i32 76, i32 61, i32 81, i32 81, i32 82, i32 81, i32 115, i32 6, i32 61, i32 76, i32 81, i32 81, i32 82, i32 81, i32 82, i32 115, i32 82, i32 115, i32 68, i32 68, i32 85, i32 68, i32 67, i32 67, i32 68, i32 1, i32 82, i32 1, i32 82, i32 1, i32 67, i32 67, i32 67, i32 67, i32 9, i32 106, i32 68, i32 9, i32 68, i32 87, i32 106, i32 87, i32 79, i32 79, i32 126, i32 126, i32 32, i32 35, i32 35, i32 35, i32 79, i32 82, i32 79, i32 104, i32 104, i32 117, i32 79, i32 104, i32 110, i32 117, i32 79, i32 110, i32 117, i32 117, i32 117, i32 110, i32 24, i32 24, i32 24, i32 33, i32 63, i32 28, i32 63, i32 63, i32 119, i32 74, i32 68, i32 33, i32 118, i32 33, i32 112, i32 33, i32 83, i32 104, i32 83, i32 70, i32 58, i32 58, i32 49, i32 49, i32 77, i32 104, i32 70, i32 70, i32 11, i32 11, i32 104, i32 11>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0001
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0001(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 122, i32 122, i32 12, i32 12, i32 93, i32 88, i32 115, i32 115, i32 88, i32 65, i32 88, i32 88, i32 115, i32 34, i32 65, i32 65, i32 92, i32 92, i32 82, i32 65, i32 82, i32 82, i32 82, i32 82, i32 92, i32 65, i32 92, i32 75, i32 65, i32 82, i32 82, i32 63, i32 95, i32 95, i32 114, i32 95, i32 95, i32 72, i32 72, i32 95, i32 16, i32 23, i32 65, i32 114, i32 65, i32 65, i32 35, i32 35, i32 102, i32 102, i32 36, i32 36, i32 23, i32 23, i32 57, i32 57, i32 93, i32 36, i32 93, i32 36, i32 102, i32 102, i32 102, i32 23, i32 95, i32 86, i32 86, i32 95, i32 19, i32 19, i32 19, i32 96, i32 95, i32 95, i32 72, i32 21, i32 94, i32 94, i32 36, i32 36, i32 94, i32 69, i32 19, i32 92, i32 34, i32 19, i32 19, i32 19, i32 94, i32 113, i32 113, i32 94, i32 123, i32 94, i32 120, i32 120, i32 115, i32 104, i32 104, i32 104, i32 95, i32 95, i32 104, i32 104, i32 17, i32 17, i32 74, i32 107, i32 29, i32 29, i32 95, i32 86, i32 71, i32 74, i32 77, i32 77, i32 91, i32 60, i32 60, i32 60, i32 69, i32 69, i32 14, i32 69, i32 14, i32 73, i32 14, i32 73>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0002
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0002(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 76, i32 73, i32 76, i32 87, i32 73, i32 76, i32 94, i32 73, i32 113, i32 113, i32 76, i32 76, i32 113, i32 113, i32 2, i32 2, i32 124, i32 124, i32 124, i32 37, i32 87, i32 124, i32 87, i32 87, i32 4, i32 123, i32 37, i32 2, i32 123, i32 2, i32 1, i32 2, i32 2, i32 2, i32 51, i32 51, i32 95, i32 95, i32 62, i32 117, i32 89, i32 89, i32 38, i32 38, i32 38, i32 38, i32 117, i32 38, i32 22, i32 109, i32 109, i32 109, i32 22, i32 22, i32 95, i32 22, i32 114, i32 114, i32 95, i32 114, i32 40, i32 40, i32 107, i32 114, i32 45, i32 45, i32 64, i32 35, i32 28, i32 28, i32 90, i32 90, i32 2, i32 2, i32 2, i32 2, i32 119, i32 119, i32 45, i32 64, i32 89, i32 89, i32 89, i32 89, i32 69, i32 69, i32 108, i32 63, i32 126, i32 91, i32 91, i32 91, i32 56, i32 56, i32 63, i32 56, i32 101, i32 84, i32 2, i32 103, i32 2, i32 103, i32 2, i32 97, i32 103, i32 103, i32 46, i32 46, i32 45, i32 84, i32 46, i32 46, i32 30, i32 30, i32 79, i32 88, i32 88, i32 73, i32 73, i32 88, i32 106, i32 106, i32 106, i32 73, i32 79, i32 106, i32 73, i32 73>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0003
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0003(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 101, i32 101, i32 71, i32 71, i32 58, i32 101, i32 43, i32 43, i32 71, i32 71, i32 56, i32 56, i32 116, i32 116, i32 125, i32 125, i32 30, i32 30, i32 56, i32 33, i32 87, i32 58, i32 125, i32 125, i32 64, i32 33, i32 33, i32 64, i32 38, i32 33, i32 38, i32 38, i32 77, i32 77, i32 77, i32 48, i32 59, i32 28, i32 77, i32 77, i32 79, i32 48, i32 79, i32 79, i32 62, i32 41, i32 48, i32 48, i32 86, i32 86, i32 86, i32 71, i32 56, i32 56, i32 99, i32 56, i32 113, i32 4, i32 74, i32 74, i32 59, i32 64, i32 62, i32 113, i32 14, i32 97, i32 55, i32 14, i32 3, i32 3, i32 125, i32 125, i32 91, i32 91, i32 91, i32 0, i32 86, i32 37, i32 108, i32 37, i32 82, i32 82, i32 24, i32 24, i32 57, i32 82, i32 57, i32 57, i32 0, i32 0, i32 30, i32 39, i32 30, i32 13, i32 91, i32 91, i32 30, i32 25, i32 25, i32 25, i32 25, i32 30, i32 25, i32 12, i32 24, i32 75, i32 30, i32 30, i32 39, i32 39, i32 39, i32 39, i32 98, i32 98, i32 79, i32 79, i32 93, i32 86, i32 79, i32 79, i32 30, i32 30, i32 85, i32 85, i32 30, i32 30, i32 40, i32 40>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0004
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0004(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 82, i32 9, i32 82, i32 82, i32 35, i32 102, i32 35, i32 84, i32 81, i32 81, i32 82, i32 81, i32 85, i32 82, i32 80, i32 80, i32 106, i32 106, i32 47, i32 47, i32 80, i32 85, i32 80, i32 51, i32 84, i32 125, i32 125, i32 84, i32 125, i32 125, i32 84, i32 84, i32 13, i32 13, i32 106, i32 106, i32 51, i32 44, i32 13, i32 13, i32 56, i32 56, i32 56, i32 56, i32 70, i32 85, i32 56, i32 56, i32 70, i32 51, i32 51, i32 51, i32 70, i32 70, i32 70, i32 70, i32 92, i32 92, i32 14, i32 14, i32 107, i32 92, i32 14, i32 14, i32 105, i32 105, i32 105, i32 105, i32 74, i32 74, i32 68, i32 68, i32 118, i32 118, i32 31, i32 118, i32 31, i32 31, i32 98, i32 98, i32 94, i32 94, i32 94, i32 94, i32 67, i32 12, i32 12, i32 67, i32 43, i32 24, i32 94, i32 81, i32 125, i32 125, i32 82, i32 125, i32 42, i32 42, i32 113, i32 113, i32 23, i32 42, i32 24, i32 24, i32 24, i32 24, i32 2, i32 45, i32 67, i32 67, i32 105, i32 105, i32 82, i32 45, i32 45, i32 82, i32 8, i32 8, i32 63, i32 63, i32 75, i32 75, i32 6, i32 6, i32 63, i32 8, i32 8, i32 63>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0005
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0005(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 22, i32 22, i32 22, i32 29, i32 72, i32 29, i32 72, i32 29, i32 67, i32 67, i32 97, i32 22, i32 22, i32 22, i32 39, i32 72, i32 97, i32 97, i32 97, i32 72, i32 70, i32 70, i32 72, i32 72, i32 78, i32 78, i32 78, i32 78, i32 27, i32 27, i32 27, i32 27, i32 27, i32 60, i32 29, i32 74, i32 64, i32 64, i32 27, i32 64, i32 84, i32 41, i32 74, i32 41, i32 46, i32 41, i32 51, i32 51, i32 67, i32 67, i32 67, i32 46, i32 97, i32 74, i32 97, i32 97, i32 29, i32 98, i32 98, i32 29, i32 76, i32 95, i32 98, i32 98, i32 25, i32 25, i32 42, i32 42, i32 80, i32 80, i32 42, i32 42, i32 50, i32 71, i32 71, i32 68, i32 33, i32 22, i32 71, i32 22, i32 50, i32 85, i32 115, i32 115, i32 25, i32 25, i32 6, i32 6, i32 108, i32 108, i32 108, i32 115, i32 50, i32 71, i32 108, i32 93, i32 81, i32 82, i32 81, i32 81, i32 91, i32 91, i32 81, i32 68, i32 81, i32 58, i32 58, i32 58, i32 102, i32 69, i32 69, i32 69, i32 48, i32 93, i32 48, i32 48, i32 81, i32 62, i32 48, i32 115, i32 81, i32 81, i32 118, i32 81, i32 118, i32 118, i32 118, i32 81>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0006
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0006(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 125, i32 125, i32 28, i32 28, i32 15, i32 26, i32 26, i32 15, i32 86, i32 86, i32 55, i32 55, i32 86, i32 86, i32 86, i32 55, i32 127, i32 127, i32 85, i32 85, i32 89, i32 89, i32 80, i32 107, i32 127, i32 24, i32 127, i32 34, i32 107, i32 107, i32 109, i32 109, i32 86, i32 33, i32 33, i32 4, i32 51, i32 10, i32 10, i32 10, i32 10, i32 10, i32 33, i32 10, i32 33, i32 33, i32 10, i32 33, i32 60, i32 51, i32 85, i32 60, i32 6, i32 85, i32 60, i32 85, i32 6, i32 6, i32 85, i32 24, i32 24, i32 24, i32 33, i32 33, i32 16, i32 16, i32 11, i32 16, i32 42, i32 101, i32 60, i32 101, i32 71, i32 94, i32 81, i32 94, i32 42, i32 101, i32 115, i32 115, i32 120, i32 95, i32 34, i32 34, i32 101, i32 20, i32 20, i32 20, i32 6, i32 6, i32 64, i32 64, i32 64, i32 64, i32 3, i32 6, i32 11, i32 11, i32 11, i32 11, i32 20, i32 20, i32 42, i32 42, i32 93, i32 112, i32 42, i32 93, i32 11, i32 76, i32 76, i32 76, i32 57, i32 38, i32 68, i32 111, i32 57, i32 112, i32 57, i32 57, i32 110, i32 1, i32 110, i32 110, i32 68, i32 3, i32 101, i32 101>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0007
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0007(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 106, i32 106, i32 106, i32 106, i32 80, i32 25, i32 25, i32 25, i32 119, i32 119, i32 119, i32 119, i32 28, i32 28, i32 77, i32 62, i32 108, i32 77, i32 77, i32 77, i32 108, i32 108, i32 77, i32 108, i32 36, i32 36, i32 25, i32 36, i32 15, i32 15, i32 15, i32 15, i32 65, i32 90, i32 104, i32 65, i32 60, i32 60, i32 123, i32 123, i32 65, i32 65, i32 111, i32 36, i32 111, i32 111, i32 65, i32 65, i32 65, i32 65, i32 50, i32 50, i32 65, i32 64, i32 64, i32 65, i32 125, i32 125, i32 60, i32 11, i32 14, i32 14, i32 60, i32 125, i32 108, i32 108, i32 109, i32 108, i32 112, i32 109, i32 95, i32 112, i32 55, i32 108, i32 55, i32 55, i32 26, i32 75, i32 26, i32 75, i32 54, i32 54, i32 40, i32 51, i32 109, i32 109, i32 108, i32 108, i32 21, i32 54, i32 108, i32 108, i32 55, i32 55, i32 54, i32 21, i32 30, i32 1, i32 30, i32 30, i32 1, i32 1, i32 1, i32 24, i32 2, i32 2, i32 24, i32 24, i32 55, i32 55, i32 13, i32 100, i32 24, i32 24, i32 24, i32 51, i32 54, i32 54, i32 51, i32 100, i32 17, i32 17, i32 55, i32 55, i32 108, i32 17, i32 51, i32 108>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0008
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0008(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 105, i32 105, i32 76, i32 76, i32 50, i32 50, i32 105, i32 50, i32 107, i32 107, i32 107, i32 107, i32 80, i32 80, i32 31, i32 31, i32 29, i32 78, i32 78, i32 29, i32 34, i32 34, i32 34, i32 29, i32 5, i32 90, i32 120, i32 5, i32 90, i32 89, i32 15, i32 90, i32 33, i32 33, i32 110, i32 87, i32 110, i32 125, i32 48, i32 48, i32 67, i32 70, i32 84, i32 84, i32 122, i32 122, i32 47, i32 48, i32 28, i32 28, i32 28, i32 28, i32 28, i32 47, i32 101, i32 28, i32 110, i32 110, i32 33, i32 33, i32 13, i32 13, i32 110, i32 13, i32 83, i32 74, i32 74, i32 74, i32 17, i32 64, i32 64, i32 64, i32 17, i32 17, i32 39, i32 39, i32 93, i32 116, i32 66, i32 66, i32 78, i32 78, i32 101, i32 101, i32 9, i32 9, i32 91, i32 100, i32 127, i32 24, i32 82, i32 17, i32 24, i32 24, i32 118, i32 118, i32 107, i32 107, i32 100, i32 100, i32 82, i32 17, i32 82, i32 17, i32 23, i32 48, i32 26, i32 26, i32 26, i32 17, i32 48, i32 48, i32 74, i32 61, i32 61, i32 61, i32 17, i32 22, i32 17, i32 24, i32 17, i32 22, i32 22, i32 22, i32 74, i32 74, i32 61, i32 61>
ret <128 x i8> %p
}
; CHECK-LABEL: test_0009
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_0009(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 120, i32 19, i32 25, i32 120, i32 25, i32 25, i32 71, i32 71, i32 110, i32 71, i32 25, i32 120, i32 117, i32 117, i32 59, i32 59, i32 100, i32 33, i32 33, i32 33, i32 33, i32 33, i32 15, i32 120, i32 41, i32 98, i32 41, i32 41, i32 120, i32 87, i32 87, i32 120, i32 61, i32 64, i32 6, i32 61, i32 64, i32 64, i32 27, i32 42, i32 2, i32 73, i32 2, i32 2, i32 61, i32 61, i32 4, i32 61, i32 19, i32 2, i32 5, i32 124, i32 2, i32 5, i32 80, i32 19, i32 2, i32 2, i32 2, i32 2, i32 86, i32 73, i32 103, i32 103, i32 86, i32 86, i32 103, i32 86, i32 86, i32 103, i32 52, i32 52, i32 52, i32 52, i32 2, i32 2, i32 73, i32 73, i32 72, i32 111, i32 30, i32 83, i32 13, i32 13, i32 83, i32 83, i32 13, i32 13, i32 70, i32 13, i32 13, i32 56, i32 83, i32 83, i32 83, i32 83, i32 88, i32 65, i32 18, i32 65, i32 103, i32 88, i32 103, i32 103, i32 122, i32 103, i32 21, i32 21, i32 52, i32 52, i32 65, i32 52, i32 63, i32 92, i32 92, i32 92, i32 0, i32 63, i32 0, i32 0, i32 109, i32 52, i32 63, i32 2, i32 2, i32 63, i32 2, i32 63>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000a
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_000a(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 24, i32 24, i32 102, i32 102, i32 103, i32 103, i32 103, i32 116, i32 116, i32 103, i32 21, i32 21, i32 102, i32 102, i32 19, i32 116, i32 126, i32 109, i32 95, i32 100, i32 109, i32 126, i32 126, i32 126, i32 104, i32 104, i32 19, i32 19, i32 109, i32 126, i32 109, i32 109, i32 63, i32 94, i32 94, i32 94, i32 48, i32 48, i32 48, i32 48, i32 99, i32 68, i32 94, i32 77, i32 17, i32 17, i32 17, i32 17, i32 34, i32 63, i32 34, i32 34, i32 99, i32 94, i32 94, i32 99, i32 101, i32 94, i32 94, i32 94, i32 94, i32 25, i32 56, i32 63, i32 96, i32 97, i32 97, i32 96, i32 62, i32 19, i32 97, i32 97, i32 19, i32 19, i32 19, i32 19, i32 29, i32 29, i32 29, i32 29, i32 40, i32 40, i32 67, i32 40, i32 67, i32 40, i32 67, i32 46, i32 53, i32 53, i32 59, i32 26, i32 73, i32 73, i32 70, i32 59, i32 22, i32 43, i32 97, i32 97, i32 88, i32 37, i32 88, i32 88, i32 29, i32 29, i32 108, i32 108, i32 67, i32 67, i32 62, i32 105, i32 29, i32 29, i32 0, i32 29, i32 81, i32 108, i32 108, i32 81, i32 43, i32 108, i32 81, i32 98, i32 7, i32 22, i32 81, i32 81>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000b
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_000b(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 100, i32 127, i32 98, i32 25, i32 98, i32 25, i32 127, i32 80, i32 28, i32 7, i32 7, i32 28, i32 67, i32 98, i32 67, i32 67, i32 25, i32 25, i32 119, i32 119, i32 100, i32 100, i32 78, i32 78, i32 113, i32 113, i32 80, i32 80, i32 78, i32 47, i32 78, i32 78, i32 100, i32 100, i32 100, i32 101, i32 104, i32 95, i32 101, i32 6, i32 50, i32 119, i32 109, i32 50, i32 97, i32 6, i32 6, i32 6, i32 12, i32 12, i32 53, i32 66, i32 53, i32 12, i32 123, i32 66, i32 66, i32 66, i32 66, i32 97, i32 66, i32 53, i32 7, i32 7, i32 70, i32 71, i32 70, i32 9, i32 71, i32 50, i32 50, i32 50, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 10, i32 10, i32 65, i32 65, i32 65, i32 65, i32 15, i32 15, i32 5, i32 5, i32 52, i32 52, i32 52, i32 15, i32 13, i32 52, i32 13, i32 70, i32 96, i32 96, i32 71, i32 96, i32 71, i32 71, i32 126, i32 71, i32 11, i32 11, i32 92, i32 92, i32 11, i32 11, i32 105, i32 92, i32 49, i32 49, i32 122, i32 49, i32 122, i32 11, i32 122, i32 49, i32 92, i32 92, i32 35, i32 102, i32 125, i32 88, i32 122, i32 122>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000c
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_000c(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 108, i32 85, i32 85, i32 108, i32 73, i32 73, i32 75, i32 108, i32 90, i32 99, i32 13, i32 90, i32 47, i32 126, i32 126, i32 73, i32 126, i32 5, i32 75, i32 120, i32 2, i32 2, i32 5, i32 4, i32 125, i32 125, i32 125, i32 126, i32 81, i32 81, i32 4, i32 47, i32 25, i32 25, i32 55, i32 55, i32 42, i32 42, i32 116, i32 53, i32 25, i32 25, i32 42, i32 25, i32 13, i32 80, i32 80, i32 13, i32 88, i32 88, i32 13, i32 13, i32 36, i32 91, i32 91, i32 36, i32 88, i32 88, i32 73, i32 73, i32 5, i32 118, i32 5, i32 118, i32 84, i32 125, i32 84, i32 125, i32 22, i32 125, i32 56, i32 56, i32 64, i32 64, i32 19, i32 19, i32 19, i32 46, i32 46, i32 46, i32 31, i32 31, i32 85, i32 126, i32 31, i32 31, i32 98, i32 85, i32 60, i32 60, i32 126, i32 77, i32 126, i32 23, i32 23, i32 23, i32 54, i32 54, i32 105, i32 54, i32 85, i32 85, i32 85, i32 85, i32 103, i32 103, i32 98, i32 103, i32 29, i32 64, i32 29, i32 29, i32 60, i32 60, i32 11, i32 102, i32 103, i32 103, i32 98, i32 29, i32 15, i32 60, i32 105, i32 102, i32 105, i32 102, i32 105, i32 105>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000d
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_000d(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 24, i32 24, i32 24, i32 83, i32 70, i32 93, i32 70, i32 70, i32 37, i32 37, i32 37, i32 80, i32 98, i32 27, i32 68, i32 37, i32 68, i32 68, i32 54, i32 54, i32 27, i32 27, i32 54, i32 54, i32 79, i32 79, i32 89, i32 89, i32 89, i32 68, i32 68, i32 79, i32 108, i32 108, i32 127, i32 127, i32 127, i32 14, i32 127, i32 80, i32 73, i32 70, i32 73, i32 73, i32 122, i32 122, i32 7, i32 7, i32 111, i32 106, i32 49, i32 52, i32 54, i32 54, i32 8, i32 83, i32 52, i32 49, i32 106, i32 59, i32 59, i32 59, i32 32, i32 32, i32 40, i32 95, i32 95, i32 95, i32 53, i32 118, i32 95, i32 40, i32 64, i32 64, i32 71, i32 71, i32 50, i32 71, i32 50, i32 50, i32 53, i32 53, i32 118, i32 95, i32 16, i32 81, i32 16, i32 16, i32 81, i32 106, i32 106, i32 106, i32 106, i32 106, i32 100, i32 53, i32 71, i32 71, i32 109, i32 86, i32 66, i32 66, i32 109, i32 108, i32 66, i32 66, i32 19, i32 19, i32 19, i32 62, i32 105, i32 105, i32 66, i32 71, i32 64, i32 64, i32 66, i32 53, i32 66, i32 66, i32 88, i32 19, i32 61, i32 88, i32 26, i32 71, i32 71, i32 71>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000e
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_000e(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 70, i32 70, i32 70, i32 70, i32 95, i32 95, i32 95, i32 95, i32 92, i32 92, i32 92, i32 92, i32 96, i32 96, i32 51, i32 98, i32 88, i32 49, i32 111, i32 88, i32 69, i32 69, i32 107, i32 107, i32 9, i32 96, i32 9, i32 54, i32 10, i32 10, i32 10, i32 87, i32 61, i32 61, i32 52, i32 61, i32 127, i32 127, i32 18, i32 18, i32 18, i32 18, i32 56, i32 97, i32 60, i32 11, i32 97, i32 86, i32 51, i32 51, i32 9, i32 66, i32 9, i32 9, i32 56, i32 56, i32 21, i32 56, i32 70, i32 70, i32 51, i32 51, i32 97, i32 97, i32 36, i32 36, i32 10, i32 67, i32 10, i32 67, i32 36, i32 1, i32 104, i32 21, i32 21, i32 10, i32 124, i32 124, i32 118, i32 103, i32 113, i32 124, i32 91, i32 34, i32 91, i32 34, i32 34, i32 34, i32 34, i32 79, i32 79, i32 124, i32 113, i32 113, i32 124, i32 124, i32 124, i32 124, i32 124, i32 21, i32 124, i32 21, i32 21, i32 21, i32 78, i32 78, i32 81, i32 78, i32 79, i32 78, i32 21, i32 21, i32 123, i32 78, i32 80, i32 123, i32 123, i32 10, i32 10, i32 10, i32 80, i32 80, i32 80, i32 33, i32 12, i32 103, i32 18, i32 33>
ret <128 x i8> %p
}
; CHECK-LABEL: test_000f
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vdelta
; CHECK-DAG: vmux
; CHECK-DAG: vmux
define <128 x i8> @test_000f(<128 x i8> %v0) #0 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32><i32 29, i32 0, i32 75, i32 82, i32 0, i32 75, i32 75, i32 75, i32 29, i32 29, i32 82, i32 103, i32 75, i32 70, i32 75, i32 44, i32 33, i32 33, i32 33, i32 33, i32 104, i32 83, i32 54, i32 54, i32 10, i32 10, i32 104, i32 104, i32 92, i32 92, i32 92, i32 92, i32 104, i32 104, i32 54, i32 54, i32 90, i32 90, i32 90, i32 90, i32 41, i32 41, i32 83, i32 44, i32 34, i32 103, i32 104, i32 104, i32 31, i32 31, i32 1, i32 82, i32 92, i32 92, i32 82, i32 59, i32 59, i32 59, i32 100, i32 100, i32 77, i32 77, i32 100, i32 59, i32 67, i32 68, i32 68, i32 13, i32 13, i32 13, i32 127, i32 22, i32 106, i32 106, i32 127, i32 127, i32 37, i32 37, i32 68, i32 68, i32 107, i32 107, i32 53, i32 53, i32 50, i32 107, i32 50, i32 50, i32 107, i32 70, i32 53, i32 53, i32 47, i32 68, i32 47, i32 68, i32 57, i32 57, i32 87, i32 87, i32 87, i32 72, i32 72, i32 72, i32 83, i32 32, i32 83, i32 62, i32 32, i32 85, i32 32, i32 83, i32 116, i32 116, i32 116, i32 57, i32 95, i32 38, i32 95, i32 95, i32 98, i32 98, i32 95, i32 95, i32 95, i32 95, i32 98, i32 95>
ret <128 x i8> %p
}
attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }

73
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/extract-element.ll vendored Normal file
View File

@@ -0,0 +1,73 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that extract-element is handled.
; CHECK-LABEL: ext_00:
; CHECK: r[[R000:[0-9]+]] = and(r0,#3)
; CHECK: r[[R001:[0-9]+]] = vextract(v0,r0)
; CHECK-DAG: r[[R002:[0-9]+]] = asl(r[[R000]],#3)
; CHECK-DAG: r[[R003:[0-9]+]] = #8
; CHECK: r0 = extractu(r[[R001]],r[[R003]]:[[R002]])
define i8 @ext_00(<64 x i8> %a0, i32 %a1) #0 {
b2:
%v3 = extractelement <64 x i8> %a0, i32 %a1
ret i8 %v3
}
; CHECK-LABEL: ext_10:
; CHECK: r[[R100:[0-9]+]] = and(r0,#3)
; CHECK: r[[R101:[0-9]+]] = vextract(v0,r0)
; CHECK-DAG: r[[R102:[0-9]+]] = asl(r[[R100]],#3)
; CHECK-DAG: r[[R103:[0-9]+]] = #8
; CHECK: r0 = extractu(r[[R101]],r[[R103]]:[[R102]])
define i8 @ext_10(<128 x i8> %a0, i32 %a1) #1 {
b2:
%v3 = extractelement <128 x i8> %a0, i32 %a1
ret i8 %v3
}
; CHECK-LABEL: ext_01:
; CHECK-DAG: r[[R010:[0-9]+]] = asl(r0,#1)
; CHECK-DAG: r[[R011:[0-9]+]] = and(r0,#1)
; CHECK-DAG: r[[R012:[0-9]+]] = #16
; CHECK: r[[R013:[0-9]+]] = asl(r[[R011]],#4)
; CHECK: r[[R014:[0-9]+]] = vextract(v0,r[[R010]])
; CHECK: r0 = extractu(r[[R014]],r[[R012]]:[[R013]])
define i16 @ext_01(<32 x i16> %a0, i32 %a1) #0 {
b2:
%v3 = extractelement <32 x i16> %a0, i32 %a1
ret i16 %v3
}
; CHECK-LABEL: ext_11:
; CHECK-DAG: r[[R110:[0-9]+]] = asl(r0,#1)
; CHECK-DAG: r[[R111:[0-9]+]] = and(r0,#1)
; CHECK-DAG: r[[R112:[0-9]+]] = #16
; CHECK: r[[R113:[0-9]+]] = asl(r[[R111]],#4)
; CHECK: r[[R114:[0-9]+]] = vextract(v0,r[[R110]])
; CHECK: r0 = extractu(r[[R114]],r[[R112]]:[[R113]])
define i16 @ext_11(<64 x i16> %a0, i32 %a1) #1 {
b2:
%v3 = extractelement <64 x i16> %a0, i32 %a1
ret i16 %v3
}
; CHECK-LABEL: ext_02:
; CHECK: [[R020:r[0-9]+]] = asl(r0,#2)
; CHECK: r0 = vextract(v0,[[R020]])
define i32 @ext_02(<16 x i32> %a0, i32 %a1) #0 {
b2:
%v3 = extractelement <16 x i32> %a0, i32 %a1
ret i32 %v3
}
; CHECK-LABEL: ext_12:
; CHECK: [[R120:r[0-9]+]] = asl(r0,#2)
; CHECK: r0 = vextract(v0,[[R120]])
define i32 @ext_12(<32 x i32> %a0, i32 %a1) #1 {
b2:
%v3 = extractelement <32 x i32> %a0, i32 %a1
ret i32 %v3
}
attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
attributes #1 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }

18
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/isel-bool-vector.ll vendored Normal file
View File

@@ -0,0 +1,18 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that this testcase doesn't crash.
; CHECK: sfcmp
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon"
define void @fred() #0 {
b0:
%v1 = fcmp olt <16 x float> zeroinitializer, undef
%v2 = select <16 x i1> %v1, <16 x i16> undef, <16 x i16> zeroinitializer
%v3 = sext <16 x i16> %v2 to <16 x i32>
store <16 x i32> %v3, <16 x i32>* undef, align 128
unreachable
}
attributes #0 = { noinline norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b" }

28
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/isel-concat-vectors.ll vendored Normal file
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@@ -0,0 +1,28 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check for a non-crashing output.
; CHECK: vsplat
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown--elf"
declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #0
declare <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32>, <16 x i32>, i32) #0
declare <16 x i32> @llvm.hexagon.V6.lvsplatw(i32) #0
define void @crash() #1 {
b0:
%v1 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 0) #0
%v2 = bitcast <16 x i32> %v1 to <32 x i16>
%v3 = shufflevector <32 x i16> %v2, <32 x i16> undef, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%v4 = shufflevector <128 x i16> %v3, <128 x i16> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%v5 = bitcast <64 x i16> %v4 to <32 x i32>
%v6 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v5) #0
%v7 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> undef, <16 x i32> %v6, i32 -2) #0
%v8 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v7)
store <16 x i32> %v8, <16 x i32>* undef, align 2
unreachable
}
attributes #0 = { nounwind readnone }
attributes #1 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }

32
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/isel-select-const.ll vendored Normal file
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@@ -0,0 +1,32 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that this doesn't crash.
; CHECK: vlut32
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown--elf"
define void @fred() #0 {
b0:
%v1 = tail call <16 x i32> @llvm.hexagon.V6.vlutvvb.oracc(<16 x i32> undef, <16 x i32> <i32 151388928, i32 353505036, i32 555621144, i32 757737252, i32 959853360, i32 1161969468, i32 1364085576, i32 1566201684, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> undef, i32 3)
%v2 = bitcast <16 x i32> %v1 to <64 x i8>
%v3 = shufflevector <64 x i8> %v2, <64 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%v4 = shufflevector <32 x i8> zeroinitializer, <32 x i8> %v3, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%v5 = bitcast <64 x i8> %v4 to <16 x i32>
%v6 = tail call <16 x i32> @llvm.hexagon.V6.vshuffb(<16 x i32> %v5)
store <16 x i32> %v6, <16 x i32>* undef, align 1
%v7 = tail call <16 x i32> @llvm.hexagon.V6.vlutvvb.oracc(<16 x i32> undef, <16 x i32> <i32 151388928, i32 353505036, i32 555621144, i32 757737252, i32 959853360, i32 1161969468, i32 1364085576, i32 1566201684, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> zeroinitializer, i32 3)
%v8 = bitcast <16 x i32> %v7 to <64 x i8>
%v9 = shufflevector <64 x i8> %v8, <64 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%v10 = shufflevector <32 x i8> %v9, <32 x i8> zeroinitializer, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%v11 = bitcast <64 x i8> %v10 to <16 x i32>
%v12 = tail call <16 x i32> @llvm.hexagon.V6.vshuffb(<16 x i32> %v11)
store <16 x i32> %v12, <16 x i32>* undef, align 1
unreachable
}
declare <16 x i32> @llvm.hexagon.V6.vshuffb(<16 x i32>) #1
declare <16 x i32> @llvm.hexagon.V6.vlutvvb.oracc(<16 x i32>, <16 x i32>, <16 x i32>, i32) #1
attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
attributes #1 = { nounwind readnone }

30
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/isel-vec-ext.ll vendored Normal file
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@@ -0,0 +1,30 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon"
; CHECK-LABEL: danny:
; CHECK: vsxt
; CHECK-NOT: vinsert
define void @danny() local_unnamed_addr #0 {
b2:
%v16 = select <16 x i1> undef, <16 x i16> undef, <16 x i16> zeroinitializer
%v17 = sext <16 x i16> %v16 to <16 x i32>
store <16 x i32> %v17, <16 x i32>* undef, align 128
unreachable
}
; CHECK-LABEL: sammy:
; CHECK: vsxt
; CHECK-NOT: vinsert
define void @sammy() local_unnamed_addr #1 {
b2:
%v16 = select <32 x i1> undef, <32 x i16> undef, <32 x i16> zeroinitializer
%v17 = sext <32 x i16> %v16 to <32 x i32>
store <32 x i32> %v17, <32 x i32>* undef, align 128
unreachable
}
attributes #0 = { noinline norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }
attributes #1 = { noinline norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length128b,+hvxv60" }

23
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/lower-insert-elt.ll vendored Normal file
View File

@@ -0,0 +1,23 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; REQUIRES: asserts
; Check that this testcase compiles successfully.
; CHECK: vextract
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown--elf"
define void @fred() local_unnamed_addr #0 {
b0:
%v1 = load <64 x i8>, <64 x i8>* undef, align 64
%v2 = insertelement <64 x i8> %v1, i8 0, i32 0
br label %b3
b3: ; preds = %b3, %b0
%v4 = phi <64 x i8> [ %v2, %b0 ], [ %v6, %b3 ]
%v5 = extractelement <64 x i8> %v4, i32 0
%v6 = insertelement <64 x i8> %v4, i8 undef, i32 0
br label %b3
}
attributes #0 = { "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }

20
external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/perfect-single.ll vendored Normal file
View File

@@ -0,0 +1,20 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-LABEL: perfect_single_64:
; CHECK: vdeal
; CHECK-NOT: delta
define <64 x i8> @perfect_single_64(<64 x i8> %v0) #0 {
%p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> <i32 0, i32 32, i32 2, i32 34, i32 4, i32 36, i32 6, i32 38, i32 8, i32 40, i32 10, i32 42, i32 12, i32 44, i32 14, i32 46, i32 16, i32 48, i32 18, i32 50, i32 20, i32 52, i32 22, i32 54, i32 24, i32 56, i32 26, i32 58, i32 28, i32 60, i32 30, i32 62, i32 1, i32 33, i32 3, i32 35, i32 5, i32 37, i32 7, i32 39, i32 9, i32 41, i32 11, i32 43, i32 13, i32 45, i32 15, i32 47, i32 17, i32 49, i32 19, i32 51, i32 21, i32 53, i32 23, i32 55, i32 25, i32 57, i32 27, i32 59, i32 29, i32 61, i32 31, i32 63>
ret <64 x i8> %p
}
; CHECK-LABEL: perfect_single_128:
; CHECK: vdeal
; CHECK-NOT: delta
define <128 x i8> @perfect_single_128(<128 x i8> %v0) #1 {
%p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> <i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127>
ret <128 x i8> %p
}
attributes #0 = { readnone nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
attributes #1 = { readnone nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }

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