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Imported Upstream version 5.18.0.246

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Former-commit-id: 0c7ce5b1a7851e13f22acfd379b7f9fb304e4833
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Xamarin Public Jenkins (auto-signing)
2019-01-23 08:21:40 +00:00
parent a7724cd563
commit 279aa8f685
28482 changed files with 3866972 additions and 44 deletions
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13
external/llvm/test/MC/Hexagon/bug20416.s vendored Normal file
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# RUN: not llvm-mc -triple=hexagon -mv60 -mhvx -filetype=asm %s 2>%t; FileCheck %s --check-prefix=CHECK-V60-ERROR <%t
# RUN: llvm-mc -triple=hexagon -mv62 -mhvx -filetype=asm %s | FileCheck %s
// for this a v60+/hvx instruction sequence, make sure fails with v60
// but passes with v62. this is because this instruction uses different
// itinerary between v60 and v62
{
v0.h=vsat(v5.w,v9.w)
v16.h=vsat(v6.w,v26.w)
}
# CHECK-V60-ERROR: rror: invalid instruction packet: slot error
# CHECK: v0.h = vsat(v5.w,v9.w)
# CHECK: v16.h = vsat(v6.w,v26.w)