Imported Upstream version 5.18.0.246

Former-commit-id: 0c7ce5b1a7851e13f22acfd379b7f9fb304e4833

external/llvm/test/MC/Disassembler/SystemZ/insns-z13-bad.txt

@@ -0,0 +1,39 @@
+# Test z13 instructions that don't have PC-relative operands.
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu -mcpu=z13 2>&1 \
+# RUN:   | FileCheck %s
+
+# This would be "vlef %v0, 0, 4", but element 4 is invalid.
+#
+#CHECK: warning: invalid instruction encoding
+#CHECK-NEXT: 0xe7 0x00 0x00 0x00 0x40 0x03
+0xe7 0x00 0x00 0x00 0x40 0x03
+
+# ...and again with element 15
+#
+#CHECK: warning: invalid instruction encoding
+#CHECK-NEXT: 0xe7 0x00 0x00 0x00 0xf0 0x03
+0xe7 0x00 0x00 0x00 0xf0 0x03
+
+# This would be "vleg %v0, 0, 2", but element 2 is invalid.
+#
+#CHECK: warning: invalid instruction encoding
+#CHECK-NEXT: 0xe7 0x00 0x00 0x00 0x20 0x02
+0xe7 0x00 0x00 0x00 0x20 0x02
+
+# ...and again with element 15
+#
+#CHECK: warning: invalid instruction encoding
+#CHECK-NEXT: 0xe7 0x00 0x00 0x00 0xf0 0x02
+0xe7 0x00 0x00 0x00 0xf0 0x02
+
+# This would be "vleh %v0, 0, 8", but element 8 is invalid.
+#
+#CHECK: warning: invalid instruction encoding
+#CHECK-NEXT: 0xe7 0x00 0x00 0x00 0x80 0x01
+0xe7 0x00 0x00 0x00 0x80 0x01
+
+# ...and again with element 15
+#
+#CHECK: warning: invalid instruction encoding
+#CHECK-NEXT: 0xe7 0x00 0x00 0x00 0xf0 0x01
+0xe7 0x00 0x00 0x00 0xf0 0x01

external/llvm/test/MC/Disassembler/SystemZ/insns.txt.REMOVED.git-id

@@ -0,0 +1 @@
+2ca19363c46b1553d5f8cbf41f6a87140cbeadd7

external/llvm/test/MC/Disassembler/SystemZ/invalid-regs.txt

@@ -0,0 +1,22 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu < %s 2>&1 | FileCheck %s
+
+# This would be "axbr %f14, %f0", but %r14 is invalid.
+#
+# CHECK: warning: invalid instruction encoding
+# CHECK-NEXT: 0xb3 0x4a 0x00 0xe0
+# CHECK-NEXT: ^
+0xb3 0x4a 0x00 0xe0
+
+# This would be "axbr %f0, %f2", but %f2 is invalid.
+#
+# CHECK-NEXT: warning: invalid instruction encoding
+# CHECK-NEXT: 0xb3 0x4a 0x00 0x02
+# CHECK-NEXT: ^
+0xb3 0x4a 0x00 0x02
+
+# This would be "dlr %r1, %r8", but %r1 is invalid.
+#
+# CHECK-NEXT: warning: invalid instruction encoding
+# CHECK-NEXT: 0xb9 0x97 0x00 0x18
+# CHECK-NEXT: ^
+0xb9 0x97 0x00 0x18

external/llvm/test/MC/Disassembler/SystemZ/lit.local.cfg

@@ -0,0 +1,3 @@
+if not 'SystemZ' in config.root.targets:
+    config.unsupported = True
+

external/llvm/test/MC/Disassembler/SystemZ/trunc-01.txt

@@ -0,0 +1,5 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu 2>&1 | FileCheck %s
+# Every instruction must be at least two bytes long.
+# CHECK: warning: invalid instruction encoding
+# CHECK-NEXT: 0xc4
+0xc4

external/llvm/test/MC/Disassembler/SystemZ/trunc-02.txt

@@ -0,0 +1,5 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu 2>&1 | FileCheck %s
+# If the top bits are 0b10, the instruction must be 4 bytes long.
+# CHECK: warning: invalid instruction encoding
+# CHECK-NEXT: 0xb9 0x08 0x00
+0xb9 0x08 0x00

external/llvm/test/MC/Disassembler/SystemZ/trunc-03.txt

@@ -0,0 +1,5 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu 2>&1 | FileCheck %s
+# If the top bits are 0b11, the instruction must be 6 bytes long.
+# CHECK: warning: invalid instruction encoding
+# CHECK-NEXT: 0xed 0x00 0x00 0x00 0x00
+0xed 0x00 0x00 0x00 0x00

external/llvm/test/MC/Disassembler/SystemZ/unmapped.txt

@@ -0,0 +1,32 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu 2>&1 | FileCheck %s
+
+# An unmapped 2-byte instruction
+#
+# CHECK: warning: invalid instruction encoding
+# CHECK-NEXT: 0x01
+# CHECK-NEXT: ^
+0x01
+0x10
+
+# An unmapped 4-byte instruction
+#
+# CHECK-NEXT: warning: invalid instruction encoding
+# CHECK-NEXT: 0x53
+# CHECK-NEXT: ^
+0x53
+0x00 0x00 0x00
+
+# An unmapped 6-byte instruction
+#
+# CHECK-NEXT: warning: invalid instruction encoding
+# CHECK-NEXT: 0xff
+# CHECK-NEXT: ^
+0xff
+0x00 0x00 0x00 0x00 0x00
+
+# A trailing zero (also unmapped)
+#
+# CHECK-NEXT: warning: invalid instruction encoding
+# CHECK-NEXT: 0x00
+# CHECK-NEXT: ^
+0x00