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Imported Upstream version 5.18.0.246
Former-commit-id: 0c7ce5b1a7851e13f22acfd379b7f9fb304e4833
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external/llvm/test/CodeGen/X86/vec_set-6.ll
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external/llvm/test/CodeGen/X86/vec_set-6.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X64
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define <4 x float> @test(float %a, float %b, float %c) nounwind {
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; X86-LABEL: test:
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; X86: # %bb.0:
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; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
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; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0],xmm1[0,1]
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; X86-NEXT: retl
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;
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; X64-LABEL: test:
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; X64: # %bb.0:
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; X64-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
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; X64-NEXT: xorps %xmm2, %xmm2
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; X64-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
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; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0],xmm1[0,1]
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; X64-NEXT: retq
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%tmp = insertelement <4 x float> zeroinitializer, float %a, i32 1
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%tmp8 = insertelement <4 x float> %tmp, float %b, i32 2
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%tmp10 = insertelement <4 x float> %tmp8, float %c, i32 3
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ret <4 x float> %tmp10
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}
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