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Imported Upstream version 5.18.0.246

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Former-commit-id: 0c7ce5b1a7851e13f22acfd379b7f9fb304e4833
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Xamarin Public Jenkins (auto-signing)
2019-01-23 08:21:40 +00:00
parent a7724cd563
commit 279aa8f685
28482 changed files with 3866972 additions and 44 deletions
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29
external/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll vendored Normal file
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; RUN: llc -march=amdgcn -mcpu=fiji -show-mc-encoding < %s | FileCheck -check-prefix=VI %s
declare void @llvm.amdgcn.s.dcache.wb.vol() #0
declare void @llvm.amdgcn.s.waitcnt(i32) #0
; VI-LABEL: {{^}}test_s_dcache_wb_vol:
; VI-NEXT: ; %bb.0:
; VI-NEXT: s_dcache_wb_vol ; encoding: [0x00,0x00,0x8c,0xc0,0x00,0x00,0x00,0x00]
; VI-NEXT: s_endpgm
define amdgpu_kernel void @test_s_dcache_wb_vol() #0 {
call void @llvm.amdgcn.s.dcache.wb.vol()
ret void
}
; VI-LABEL: {{^}}test_s_dcache_wb_vol_insert_wait:
; VI-NEXT: ; %bb.0:
; VI-NEXT: s_dcache_wb_vol
; VI: s_waitcnt lgkmcnt(0) ; encoding
define amdgpu_kernel void @test_s_dcache_wb_vol_insert_wait() #0 {
call void @llvm.amdgcn.s.dcache.wb.vol()
call void @llvm.amdgcn.s.waitcnt(i32 127)
br label %end
end:
store volatile i32 3, i32 addrspace(1)* undef
ret void
}
attributes #0 = { nounwind }