Imported Upstream version 5.18.0.234

Former-commit-id: 8071ec1a8c5eaa9be24b41745add19297608001f

external/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir

@@ -1,53 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
-
---- |
-  define void @test_constant() {
-  entry:
-    ret void
-  }
-
-  define void @test_fconstant() {
-  entry:
-    ret void
-  }
-
-  declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
-
-  attributes #1 = { nounwind }
-
-...
-
----
-name:            test_constant
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-body: |
-  bb.0.entry:
-
-    ; CHECK-LABEL: name: test_constant
-    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
-    ; CHECK: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
-    ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C1]](s1), [[C1]](s1)
-    %0(s32) = G_CONSTANT i32 5
-    %1(s1) = G_CONSTANT i1 0
-    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.f32), %0, %0, %0, %0, %0, %0, %1, %1;
-...
-
----
-name:            test_fconstant
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-body: |
-  bb.0.entry:
-
-    ; CHECK-LABEL: name: test_fconstant
-    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
-    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 7.500000e+00
-    %0(s32) = G_FCONSTANT float 1.0
-    %vgpr0 = COPY %0
-    %1(s32) = G_FCONSTANT float 7.5
-    %vgpr0 = COPY %1
-...