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658 lines
23 KiB
LLVM
658 lines
23 KiB
LLVM
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; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s
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; RUN: llc -march=amdgcn -mcpu=fiji -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s
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; GCN-LABEL: {{^}}load_local_hi_v2i16_undeflo:
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; GCN: s_waitcnt
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; GFX9-NEXT: ds_read_u16_d16_hi v0, v0
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_u16 v
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define <2 x i16> @load_local_hi_v2i16_undeflo(i16 addrspace(3)* %in) #0 {
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entry:
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%load = load i16, i16 addrspace(3)* %in
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%build = insertelement <2 x i16> undef, i16 %load, i32 1
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ret <2 x i16> %build
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}
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; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo:
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; GCN: s_waitcnt
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; GFX9-NEXT: ds_read_u16_d16_hi v1, v0
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: v_mov_b32_e32 v0, v1
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_u16 v
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define <2 x i16> @load_local_hi_v2i16_reglo(i16 addrspace(3)* %in, i16 %reg) #0 {
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entry:
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%load = load i16, i16 addrspace(3)* %in
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
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ret <2 x i16> %build1
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}
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; Show that we get reasonable regalloc without physreg constraints.
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; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX9-NEXT: ds_read_u16_d16_hi v1, v0
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}}
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_u16 v
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define void @load_local_hi_v2i16_reglo_vreg(i16 addrspace(3)* %in, i16 %reg) #0 {
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entry:
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%load = load i16, i16 addrspace(3)* %in
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_local_hi_v2i16_zerolo:
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; GCN: s_waitcnt
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; GFX9-NEXT: v_mov_b32_e32 v1, 0
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; GFX9-NEXT: ds_read_u16_d16_hi v1, v0
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: v_mov_b32_e32 v0, v1
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_u16 v
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define <2 x i16> @load_local_hi_v2i16_zerolo(i16 addrspace(3)* %in) #0 {
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entry:
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%load = load i16, i16 addrspace(3)* %in
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%build = insertelement <2 x i16> zeroinitializer, i16 %load, i32 1
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ret <2 x i16> %build
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}
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; FIXME: Remove m0 initialization
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; GCN-LABEL: {{^}}load_local_hi_v2i16_zerolo_shift:
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; GCN: s_waitcnt
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; GFX9-NEXT: ds_read_u16 v0, v0
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_u16 v
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; VI: v_lshlrev_b32_e32 v0, 16, v0
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define i32 @load_local_hi_v2i16_zerolo_shift(i16 addrspace(3)* %in) #0 {
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entry:
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%load = load i16, i16 addrspace(3)* %in
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%zext = zext i16 %load to i32
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%shift = shl i32 %zext, 16
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ret i32 %shift
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}
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; GCN-LABEL: {{^}}load_local_hi_v2f16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX9-NEXT: ds_read_u16_d16_hi v1, v0
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}}
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_u16 v
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define void @load_local_hi_v2f16_reglo_vreg(half addrspace(3)* %in, half %reg) #0 {
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entry:
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%load = load half, half addrspace(3)* %in
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %load, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX9-NEXT: ds_read_u8_d16_hi v1, v0
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}}
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_u8 v
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define void @load_local_hi_v2i16_reglo_vreg_zexti8(i8 addrspace(3)* %in, i16 %reg) #0 {
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entry:
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%load = load i8, i8 addrspace(3)* %in
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%ext = zext i8 %load to i16
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX9-NEXT: ds_read_i8_d16_hi v1, v0
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}}
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: ds_read_i8 v
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define void @load_local_hi_v2i16_reglo_vreg_sexti8(i8 addrspace(3)* %in, i16 %reg) #0 {
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entry:
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%load = load i8, i8 addrspace(3)* %in
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%ext = sext i8 %load to i16
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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define void @load_global_hi_v2i16_reglo_vreg(i16 addrspace(1)* %in, i16 %reg) #0 {
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entry:
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%gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 -2047
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%load = load i16, i16 addrspace(1)* %gep
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_global_hi_v2f16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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define void @load_global_hi_v2f16_reglo_vreg(half addrspace(1)* %in, half %reg) #0 {
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entry:
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%gep = getelementptr inbounds half, half addrspace(1)* %in, i64 -2047
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%load = load half, half addrspace(1)* %gep
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %load, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX9-NEXT: global_load_ubyte_d16_hi v2, v[0:1], off offset:-4095
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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define void @load_global_hi_v2i16_reglo_vreg_zexti8(i8 addrspace(1)* %in, i16 %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095
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%load = load i8, i8 addrspace(1)* %gep
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%ext = zext i8 %load to i16
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX9-NEXT: global_load_sbyte_d16_hi v2, v[0:1], off offset:-4095
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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define void @load_global_hi_v2i16_reglo_vreg_sexti8(i8 addrspace(1)* %in, i16 %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095
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%load = load i8, i8 addrspace(1)* %gep
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%ext = sext i8 %load to i16
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: load_flat_hi_v2i16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX9-NEXT: flat_load_short_d16_hi v2, v[0:1]
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v2
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: flat_load_ushort v{{[0-9]+}}
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; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16,
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; VI: v_or_b32_sdwa
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define void @load_flat_hi_v2i16_reglo_vreg(i16 addrspace(4)* %in, i16 %reg) #0 {
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entry:
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%load = load i16, i16 addrspace(4)* %in
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_flat_hi_v2f16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX9-NEXT: flat_load_short_d16_hi v2, v[0:1]
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v2
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: flat_load_ushort v{{[0-9]+}}
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; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16,
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; VI: v_or_b32_sdwa
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define void @load_flat_hi_v2f16_reglo_vreg(half addrspace(4)* %in, half %reg) #0 {
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entry:
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%load = load half, half addrspace(4)* %in
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %load, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_flat_hi_v2i16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX9-NEXT: flat_load_ubyte_d16_hi v2, v[0:1]
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v2
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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; VI: flat_load_ubyte v{{[0-9]+}}
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; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16,
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; VI: v_or_b32_sdwa
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define void @load_flat_hi_v2i16_reglo_vreg_zexti8(i8 addrspace(4)* %in, i16 %reg) #0 {
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entry:
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%load = load i8, i8 addrspace(4)* %in
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%ext = zext i8 %load to i16
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_flat_hi_v2i16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX9-NEXT: flat_load_sbyte_d16_hi v2, v[0:1]
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: global_store_dword v[0:1], v2
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; GFX9-NEXT: s_waitcnt
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; GFX9-NEXT: s_setpc_b64
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|
|
; VI: flat_load_sbyte v{{[0-9]+}}
|
||
|
|
; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16,
|
||
|
|
; VI: v_or_b32_sdwa
|
||
|
|
define void @load_flat_hi_v2i16_reglo_vreg_sexti8(i8 addrspace(4)* %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%load = load i8, i8 addrspace(4)* %in
|
||
|
|
%ext = sext i8 %load to i16
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:4094{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}}
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg(i16* byval %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i16, i16* %in, i64 2045
|
||
|
|
%load = load i16, i16* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:4094{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}}
|
||
|
|
define void @load_private_hi_v2f16_reglo_vreg(half* byval %in, half %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds half, half* %in, i64 2045
|
||
|
|
%load = load half, half* %gep
|
||
|
|
%build0 = insertelement <2 x half> undef, half %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x half> %build0, half %load, i32 1
|
||
|
|
store <2 x half> %build1, <2 x half> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_nooff:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9: buffer_load_short_d16_hi v0, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
; GFX9: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_nooff(i16* byval %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%load = load volatile i16, i16* inttoptr (i32 4094 to i16*)
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg_nooff:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: buffer_load_short_d16_hi v1, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
define void @load_private_hi_v2f16_reglo_vreg_nooff(half* %in, half %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%load = load volatile half, half* inttoptr (i32 4094 to half*)
|
||
|
|
%build0 = insertelement <2 x half> undef, half %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x half> %build0, half %load, i32 1
|
||
|
|
store <2 x half> %build1, <2 x half> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_zexti8:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9: buffer_load_ubyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_ubyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}}
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_zexti8(i8* byval %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i8, i8* %in, i64 4091
|
||
|
|
%load = load i8, i8* %gep
|
||
|
|
%ext = zext i8 %load to i16
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_sexti8:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9: buffer_load_sbyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_sbyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}}
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_sexti8(i8* byval %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i8, i8* %in, i64 4091
|
||
|
|
%load = load i8, i8* %gep
|
||
|
|
%ext = sext i8 %load to i16
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_nooff_zexti8:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: buffer_load_ubyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_nooff_zexti8(i8* %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%load = load volatile i8, i8* inttoptr (i32 4094 to i8*)
|
||
|
|
%ext = zext i8 %load to i16
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_nooff_sexti8:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: buffer_load_sbyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_sbyte v0, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_nooff_sexti8(i8* %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%load = load volatile i8, i8* inttoptr (i32 4094 to i8*)
|
||
|
|
%ext = sext i8 %load to i16
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg_nooff_zexti8:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: buffer_load_ubyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}}
|
||
|
|
define void @load_private_hi_v2f16_reglo_vreg_nooff_zexti8(i8* %in, half %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%load = load volatile i8, i8* inttoptr (i32 4094 to i8*)
|
||
|
|
%ext = zext i8 %load to i16
|
||
|
|
%bc.ext = bitcast i16 %ext to half
|
||
|
|
%build0 = insertelement <2 x half> undef, half %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x half> %build0, half %bc.ext, i32 1
|
||
|
|
store <2 x half> %build1, <2 x half> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_constant_hi_v2i16_reglo_vreg:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: flat_load_ushort
|
||
|
|
define void @load_constant_hi_v2i16_reglo_vreg(i16 addrspace(2)* %in, i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i16, i16 addrspace(2)* %in, i64 -2047
|
||
|
|
%load = load i16, i16 addrspace(2)* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: load_constant_hi_v2f16_reglo_vreg
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_store_dword
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
|
||
|
|
; VI: flat_load_ushort
|
||
|
|
define void @load_constant_hi_v2f16_reglo_vreg(half addrspace(2)* %in, half %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds half, half addrspace(2)* %in, i64 -2047
|
||
|
|
%load = load half, half addrspace(2)* %gep
|
||
|
|
%build0 = insertelement <2 x half> undef, half %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x half> %build0, half %load, i32 1
|
||
|
|
store <2 x half> %build1, <2 x half> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Local object gives known offset, so requires converting from offen
|
||
|
|
; to offset variant.
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_to_offset:
|
||
|
|
; GFX9: buffer_store_dword
|
||
|
|
; GFX9-NEXT: buffer_load_short_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4094
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_to_offset(i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%obj0 = alloca [10 x i32], align 4
|
||
|
|
%obj1 = alloca [4096 x i16], align 2
|
||
|
|
%bc = bitcast [10 x i32]* %obj0 to i32*
|
||
|
|
store volatile i32 123, i32* %bc
|
||
|
|
%gep = getelementptr inbounds [4096 x i16], [4096 x i16]* %obj1, i32 0, i32 2025
|
||
|
|
%load = load i16, i16* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_sexti8_to_offset:
|
||
|
|
; GFX9: buffer_store_dword
|
||
|
|
; GFX9-NEXT: buffer_load_sbyte_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4095
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_sexti8_to_offset(i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%obj0 = alloca [10 x i32], align 4
|
||
|
|
%obj1 = alloca [4096 x i8], align 2
|
||
|
|
%bc = bitcast [10 x i32]* %obj0 to i32*
|
||
|
|
store volatile i32 123, i32* %bc
|
||
|
|
%gep = getelementptr inbounds [4096 x i8], [4096 x i8]* %obj1, i32 0, i32 4051
|
||
|
|
%load = load i8, i8* %gep
|
||
|
|
%ext = sext i8 %load to i16
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_zexti8_to_offset:
|
||
|
|
; GFX9: buffer_store_dword
|
||
|
|
; GFX9-NEXT: buffer_load_ubyte_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4095
|
||
|
|
define void @load_private_hi_v2i16_reglo_vreg_zexti8_to_offset(i16 %reg) #0 {
|
||
|
|
entry:
|
||
|
|
%obj0 = alloca [10 x i32], align 4
|
||
|
|
%obj1 = alloca [4096 x i8], align 2
|
||
|
|
%bc = bitcast [10 x i32]* %obj0 to i32*
|
||
|
|
store volatile i32 123, i32* %bc
|
||
|
|
%gep = getelementptr inbounds [4096 x i8], [4096 x i8]* %obj1, i32 0, i32 4051
|
||
|
|
%load = load i8, i8* %gep
|
||
|
|
%ext = zext i8 %load to i16
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %ext, i32 1
|
||
|
|
store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; FIXME: Remove m0 init and waitcnt between reads
|
||
|
|
; FIXME: Is there a cost to using the extload over not?
|
||
|
|
; GCN-LABEL: {{^}}load_local_v2i16_split:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: ds_read_u16 v1, v0
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: ds_read_u16_d16_hi v1, v0 offset:2
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: v_mov_b32_e32 v0, v1
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
define <2 x i16> @load_local_v2i16_split(i16 addrspace(3)* %in) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 1
|
||
|
|
%load0 = load volatile i16, i16 addrspace(3)* %in
|
||
|
|
%load1 = load volatile i16, i16 addrspace(3)* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %load0, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
|
||
|
|
ret <2 x i16> %build1
|
||
|
|
}
|
||
|
|
|
||
|
|
; FIXME: Remove waitcnt between reads
|
||
|
|
; GCN-LABEL: {{^}}load_global_v2i16_split:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_load_ushort v2
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_load_short_d16_hi v2
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: v_mov_b32_e32 v0, v2
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
define <2 x i16> @load_global_v2i16_split(i16 addrspace(1)* %in) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 1
|
||
|
|
%load0 = load volatile i16, i16 addrspace(1)* %in
|
||
|
|
%load1 = load volatile i16, i16 addrspace(1)* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %load0, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
|
||
|
|
ret <2 x i16> %build1
|
||
|
|
}
|
||
|
|
|
||
|
|
; FIXME: Remove waitcnt between reads
|
||
|
|
; GCN-LABEL: {{^}}load_flat_v2i16_split:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: flat_load_ushort v2
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: flat_load_short_d16_hi v2
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: v_mov_b32_e32 v0, v2
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
define <2 x i16> @load_flat_v2i16_split(i16 addrspace(4)* %in) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i16, i16 addrspace(4)* %in, i64 1
|
||
|
|
%load0 = load volatile i16, i16 addrspace(4)* %in
|
||
|
|
%load1 = load volatile i16, i16 addrspace(4)* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %load0, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
|
||
|
|
ret <2 x i16> %build1
|
||
|
|
}
|
||
|
|
|
||
|
|
; FIXME: Remove waitcnt between reads
|
||
|
|
; GCN-LABEL: {{^}}load_constant_v2i16_split:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_load_ushort v2
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: global_load_short_d16_hi v2
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: v_mov_b32_e32 v0, v2
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
define <2 x i16> @load_constant_v2i16_split(i16 addrspace(2)* %in) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i16, i16 addrspace(2)* %in, i64 1
|
||
|
|
%load0 = load volatile i16, i16 addrspace(2)* %in
|
||
|
|
%load1 = load volatile i16, i16 addrspace(2)* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %load0, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
|
||
|
|
ret <2 x i16> %build1
|
||
|
|
}
|
||
|
|
|
||
|
|
; FIXME: Remove m0 init and waitcnt between reads
|
||
|
|
; FIXME: Is there a cost to using the extload over not?
|
||
|
|
; GCN-LABEL: {{^}}load_private_v2i16_split:
|
||
|
|
; GCN: s_waitcnt
|
||
|
|
; GFX9: buffer_load_ushort v0, off, s[0:3], s5 offset:4{{$}}
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:6
|
||
|
|
; GFX9-NEXT: s_waitcnt
|
||
|
|
; GFX9-NEXT: s_setpc_b64
|
||
|
|
define <2 x i16> @load_private_v2i16_split(i16* byval %in) #0 {
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr inbounds i16, i16* %in, i32 1
|
||
|
|
%load0 = load volatile i16, i16* %in
|
||
|
|
%load1 = load volatile i16, i16* %gep
|
||
|
|
%build0 = insertelement <2 x i16> undef, i16 %load0, i32 0
|
||
|
|
%build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
|
||
|
|
ret <2 x i16> %build1
|
||
|
|
}
|
||
|
|
|
||
|
|
attributes #0 = { nounwind }
|