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73 lines
3.0 KiB
LLVM
73 lines
3.0 KiB
LLVM
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; RUN: opt %loadPolly -polly-scops -analyze -polly-print-instructions \
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; RUN: < %s | FileCheck %s
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; CHECK: Statements {
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; CHECK: Stmt_bb46
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; CHECK: Domain :=
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; CHECK: [tmp44, tmp9] -> { Stmt_bb46[] : tmp9 = tmp44 };
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; CHECK: Schedule :=
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; CHECK: [tmp44, tmp9] -> { Stmt_bb46[] -> [0, 0] };
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK: [tmp44, tmp9] -> { Stmt_bb46[] -> MemRef_tmp47[] };
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; CHECK: Instructions {
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; CHECK: %tmp47 = or i64 1, %tmp14
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; CHECK: }
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; CHECK: Stmt_bb48__TO__bb56
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; CHECK: Domain :=
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; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] : tmp9 = tmp44 and 0 <= i0 < tmp44 };
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; CHECK: Schedule :=
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; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> [1, i0] };
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_A[i0] };
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_A[i0] };
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_tmp47[] };
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; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_A[i0] };
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; CHECK: Instructions {
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; CHECK: %tmp51 = load i64, i64* %tmp50, align 8
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; CHECK: %tmp52 = and i64 %tmp51, %tmp26
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; CHECK: %tmp53 = icmp eq i64 %tmp52, %tmp26
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; CHECK: store i64 42, i64* %tmp50, align 8
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; CHECK: }
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; CHECK: }
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @quux(i32 %arg, i32 %arg1, i64* %A, i64 %tmp9, i64 %tmp24, i64 %tmp14, i64 %tmp22, i64 %tmp44) {
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bb:
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%tmp26 = or i64 %tmp22, %tmp24
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br label %bb39
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bb39: ; preds = %bb39, %bb38
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%tmp45 = icmp eq i64 %tmp44, %tmp9
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br i1 %tmp45, label %bb46, label %bb81
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bb46: ; preds = %bb39
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%tmp47 = or i64 1, %tmp14
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br label %bb48
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bb48: ; preds = %bb56, %bb46
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%tmp49 = phi i64 [ 0, %bb46 ], [ %tmp57, %bb56 ]
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%tmp50 = getelementptr inbounds i64, i64* %A, i64 %tmp49
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%tmp51 = load i64, i64* %tmp50, align 8
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%tmp52 = and i64 %tmp51, %tmp26
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%tmp53 = icmp eq i64 %tmp52, %tmp26
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store i64 42, i64* %tmp50, align 8
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br i1 %tmp53, label %bb54, label %bb56
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bb54: ; preds = %bb48
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%tmp55 = xor i64 %tmp51, %tmp47
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store i64 %tmp55, i64* %tmp50, align 8
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br label %bb56
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bb56: ; preds = %bb54, %bb48
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%tmp57 = add nuw nsw i64 %tmp49, 1
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%tmp58 = icmp eq i64 %tmp57, %tmp9
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br i1 %tmp58, label %bb81, label %bb48
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bb81: ; preds = %bb74, %bb56
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ret void
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}
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