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59 lines
1.7 KiB
LLVM
59 lines
1.7 KiB
LLVM
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; RUN: llc -march=hexagon < %s
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; REQUIRES: asserts
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; The two loads based on %struct.0, loading two different data types
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; cause LSR to assume type "void" for the memory type. This would then
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; cause an assert in isLegalAddressingMode. Make sure we no longer crash.
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target triple = "hexagon"
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%struct.0 = type { i8*, i8, %union.anon.0 }
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%union.anon.0 = type { i8* }
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define hidden fastcc void @fred() unnamed_addr #0 {
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entry:
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br i1 undef, label %while.end, label %while.body.lr.ph
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while.body.lr.ph: ; preds = %entry
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br label %while.body
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while.body: ; preds = %exit.2, %while.body.lr.ph
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%lsr.iv = phi %struct.0* [ %cgep22, %exit.2 ], [ undef, %while.body.lr.ph ]
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switch i32 undef, label %exit [
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i32 1, label %sw.bb.i
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i32 2, label %sw.bb3.i
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]
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sw.bb.i: ; preds = %while.body
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unreachable
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sw.bb3.i: ; preds = %while.body
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unreachable
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exit: ; preds = %while.body
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switch i32 undef, label %exit.2 [
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i32 1, label %sw.bb.i17
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i32 2, label %sw.bb3.i20
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]
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sw.bb.i17: ; preds = %.exit
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%0 = bitcast %struct.0* %lsr.iv to i32*
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%1 = load i32, i32* %0, align 4
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unreachable
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sw.bb3.i20: ; preds = %exit
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%2 = bitcast %struct.0* %lsr.iv to i8**
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%3 = load i8*, i8** %2, align 4
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unreachable
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exit.2: ; preds = %exit
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%cgep22 = getelementptr %struct.0, %struct.0* %lsr.iv, i32 1
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br label %while.body
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while.end: ; preds = %entry
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ret void
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}
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attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }
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