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274 lines
9.0 KiB
C++
274 lines
9.0 KiB
C++
![]() |
//===-- AMDGPUTargetStreamer.cpp - Mips Target Streamer Methods -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides AMDGPU specific target streamer methods.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUTargetStreamer.h"
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#include "AMDGPU.h"
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#include "SIDefines.h"
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#include "Utils/AMDGPUBaseInfo.h"
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#include "Utils/AMDKernelCodeTUtils.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Metadata.h"
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#include "llvm/IR/Module.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCELFStreamer.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/Support/FormattedStream.h"
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namespace llvm {
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#include "AMDGPUPTNote.h"
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}
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using namespace llvm;
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using namespace llvm::AMDGPU;
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//===----------------------------------------------------------------------===//
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// AMDGPUTargetStreamer
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//===----------------------------------------------------------------------===//
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bool AMDGPUTargetStreamer::EmitHSAMetadata(StringRef HSAMetadataString) {
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HSAMD::Metadata HSAMetadata;
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if (HSAMD::fromString(HSAMetadataString, HSAMetadata))
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return false;
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return EmitHSAMetadata(HSAMetadata);
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}
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//===----------------------------------------------------------------------===//
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// AMDGPUTargetAsmStreamer
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//===----------------------------------------------------------------------===//
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AMDGPUTargetAsmStreamer::AMDGPUTargetAsmStreamer(MCStreamer &S,
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formatted_raw_ostream &OS)
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: AMDGPUTargetStreamer(S), OS(OS) { }
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void
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AMDGPUTargetAsmStreamer::EmitDirectiveHSACodeObjectVersion(uint32_t Major,
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uint32_t Minor) {
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OS << "\t.hsa_code_object_version " <<
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Twine(Major) << "," << Twine(Minor) << '\n';
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}
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void
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AMDGPUTargetAsmStreamer::EmitDirectiveHSACodeObjectISA(uint32_t Major,
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uint32_t Minor,
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uint32_t Stepping,
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StringRef VendorName,
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StringRef ArchName) {
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OS << "\t.hsa_code_object_isa " <<
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Twine(Major) << "," << Twine(Minor) << "," << Twine(Stepping) <<
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",\"" << VendorName << "\",\"" << ArchName << "\"\n";
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}
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void
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AMDGPUTargetAsmStreamer::EmitAMDKernelCodeT(const amd_kernel_code_t &Header) {
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OS << "\t.amd_kernel_code_t\n";
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dumpAmdKernelCode(&Header, OS, "\t\t");
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OS << "\t.end_amd_kernel_code_t\n";
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}
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void AMDGPUTargetAsmStreamer::EmitAMDGPUSymbolType(StringRef SymbolName,
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unsigned Type) {
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switch (Type) {
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default: llvm_unreachable("Invalid AMDGPU symbol type");
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case ELF::STT_AMDGPU_HSA_KERNEL:
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OS << "\t.amdgpu_hsa_kernel " << SymbolName << '\n' ;
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break;
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}
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}
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bool AMDGPUTargetAsmStreamer::EmitISAVersion(StringRef IsaVersionString) {
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OS << "\t.amd_amdgpu_isa \"" << IsaVersionString << "\"\n";
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return true;
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}
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bool AMDGPUTargetAsmStreamer::EmitHSAMetadata(
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const AMDGPU::HSAMD::Metadata &HSAMetadata) {
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std::string HSAMetadataString;
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if (HSAMD::toString(HSAMetadata, HSAMetadataString))
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return false;
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OS << '\t' << HSAMD::AssemblerDirectiveBegin << '\n';
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OS << HSAMetadataString << '\n';
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OS << '\t' << HSAMD::AssemblerDirectiveEnd << '\n';
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return true;
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}
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bool AMDGPUTargetAsmStreamer::EmitPALMetadata(
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const PALMD::Metadata &PALMetadata) {
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std::string PALMetadataString;
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if (PALMD::toString(PALMetadata, PALMetadataString))
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return false;
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OS << '\t' << PALMD::AssemblerDirective << PALMetadataString << '\n';
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return true;
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}
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//===----------------------------------------------------------------------===//
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// AMDGPUTargetELFStreamer
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//===----------------------------------------------------------------------===//
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AMDGPUTargetELFStreamer::AMDGPUTargetELFStreamer(MCStreamer &S)
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: AMDGPUTargetStreamer(S), Streamer(S) {}
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MCELFStreamer &AMDGPUTargetELFStreamer::getStreamer() {
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return static_cast<MCELFStreamer &>(Streamer);
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}
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void AMDGPUTargetELFStreamer::EmitAMDGPUNote(
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const MCExpr *DescSZ, unsigned NoteType,
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function_ref<void(MCELFStreamer &)> EmitDesc) {
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auto &S = getStreamer();
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auto &Context = S.getContext();
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auto NameSZ = sizeof(ElfNote::NoteName);
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S.PushSection();
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S.SwitchSection(Context.getELFSection(
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ElfNote::SectionName, ELF::SHT_NOTE, ELF::SHF_ALLOC));
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S.EmitIntValue(NameSZ, 4); // namesz
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S.EmitValue(DescSZ, 4); // descz
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S.EmitIntValue(NoteType, 4); // type
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S.EmitBytes(StringRef(ElfNote::NoteName, NameSZ)); // name
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S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
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EmitDesc(S); // desc
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S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
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S.PopSection();
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}
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void
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AMDGPUTargetELFStreamer::EmitDirectiveHSACodeObjectVersion(uint32_t Major,
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uint32_t Minor) {
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EmitAMDGPUNote(
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MCConstantExpr::create(8, getContext()),
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ElfNote::NT_AMDGPU_HSA_CODE_OBJECT_VERSION,
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[&](MCELFStreamer &OS){
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OS.EmitIntValue(Major, 4);
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OS.EmitIntValue(Minor, 4);
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}
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);
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}
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void
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AMDGPUTargetELFStreamer::EmitDirectiveHSACodeObjectISA(uint32_t Major,
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uint32_t Minor,
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uint32_t Stepping,
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StringRef VendorName,
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StringRef ArchName) {
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uint16_t VendorNameSize = VendorName.size() + 1;
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uint16_t ArchNameSize = ArchName.size() + 1;
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unsigned DescSZ = sizeof(VendorNameSize) + sizeof(ArchNameSize) +
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sizeof(Major) + sizeof(Minor) + sizeof(Stepping) +
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VendorNameSize + ArchNameSize;
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EmitAMDGPUNote(
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MCConstantExpr::create(DescSZ, getContext()),
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ElfNote::NT_AMDGPU_HSA_ISA,
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[&](MCELFStreamer &OS) {
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OS.EmitIntValue(VendorNameSize, 2);
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OS.EmitIntValue(ArchNameSize, 2);
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OS.EmitIntValue(Major, 4);
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OS.EmitIntValue(Minor, 4);
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OS.EmitIntValue(Stepping, 4);
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OS.EmitBytes(VendorName);
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OS.EmitIntValue(0, 1); // NULL terminate VendorName
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OS.EmitBytes(ArchName);
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OS.EmitIntValue(0, 1); // NULL terminte ArchName
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}
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);
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}
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void
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AMDGPUTargetELFStreamer::EmitAMDKernelCodeT(const amd_kernel_code_t &Header) {
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MCStreamer &OS = getStreamer();
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OS.PushSection();
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OS.EmitBytes(StringRef((const char*)&Header, sizeof(Header)));
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OS.PopSection();
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}
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void AMDGPUTargetELFStreamer::EmitAMDGPUSymbolType(StringRef SymbolName,
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unsigned Type) {
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MCSymbolELF *Symbol = cast<MCSymbolELF>(
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getStreamer().getContext().getOrCreateSymbol(SymbolName));
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Symbol->setType(ELF::STT_AMDGPU_HSA_KERNEL);
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}
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bool AMDGPUTargetELFStreamer::EmitISAVersion(StringRef IsaVersionString) {
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// Create two labels to mark the beginning and end of the desc field
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// and a MCExpr to calculate the size of the desc field.
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auto &Context = getContext();
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auto *DescBegin = Context.createTempSymbol();
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auto *DescEnd = Context.createTempSymbol();
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auto *DescSZ = MCBinaryExpr::createSub(
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MCSymbolRefExpr::create(DescEnd, Context),
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MCSymbolRefExpr::create(DescBegin, Context), Context);
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EmitAMDGPUNote(
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DescSZ,
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ELF::NT_AMD_AMDGPU_ISA,
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[&](MCELFStreamer &OS) {
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OS.EmitLabel(DescBegin);
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OS.EmitBytes(IsaVersionString);
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OS.EmitLabel(DescEnd);
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}
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);
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return true;
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}
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bool AMDGPUTargetELFStreamer::EmitHSAMetadata(
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const AMDGPU::HSAMD::Metadata &HSAMetadata) {
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std::string HSAMetadataString;
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if (HSAMD::toString(HSAMetadata, HSAMetadataString))
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return false;
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// Create two labels to mark the beginning and end of the desc field
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// and a MCExpr to calculate the size of the desc field.
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auto &Context = getContext();
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auto *DescBegin = Context.createTempSymbol();
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auto *DescEnd = Context.createTempSymbol();
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auto *DescSZ = MCBinaryExpr::createSub(
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MCSymbolRefExpr::create(DescEnd, Context),
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MCSymbolRefExpr::create(DescBegin, Context), Context);
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EmitAMDGPUNote(
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DescSZ,
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ELF::NT_AMD_AMDGPU_HSA_METADATA,
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[&](MCELFStreamer &OS) {
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OS.EmitLabel(DescBegin);
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OS.EmitBytes(HSAMetadataString);
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OS.EmitLabel(DescEnd);
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}
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);
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return true;
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}
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bool AMDGPUTargetELFStreamer::EmitPALMetadata(
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const PALMD::Metadata &PALMetadata) {
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EmitAMDGPUNote(
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MCConstantExpr::create(PALMetadata.size() * sizeof(uint32_t), getContext()),
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ELF::NT_AMD_AMDGPU_PAL_METADATA,
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[&](MCELFStreamer &OS){
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for (auto I : PALMetadata)
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OS.EmitIntValue(I, sizeof(uint32_t));
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}
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);
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return true;
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}
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