You've already forked linux-packaging-mono
acceptance-tests
data
debian
docs
external
Newtonsoft.Json
api-doc-tools
api-snapshot
aspnetwebstack
binary-reference-assemblies
bockbuild
boringssl
cecil
cecil-legacy
corefx
corert
helix-binaries
ikdasm
ikvm
illinker-test-assets
linker
llvm
bindings
cmake
docs
examples
include
lib
Analysis
AsmParser
BinaryFormat
Bitcode
CodeGen
DebugInfo
Demangle
ExecutionEngine
FuzzMutate
Fuzzer
IR
IRReader
LTO
LineEditor
Linker
MC
Object
ObjectYAML
Option
Passes
ProfileData
Support
TableGen
Target
AArch64
AMDGPU
AsmParser
Disassembler
InstPrinter
MCTargetDesc
TargetInfo
Utils
AMDGPU.h
AMDGPU.td
AMDGPUAliasAnalysis.cpp
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp
AMDGPUArgumentUsageInfo.cpp
AMDGPUArgumentUsageInfo.h
AMDGPUAsmPrinter.cpp
AMDGPUAsmPrinter.h
AMDGPUCallLowering.cpp
AMDGPUCallLowering.h
AMDGPUCallingConv.td
AMDGPUCodeGenPrepare.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGenRegisterBankInfo.def
AMDGPUISelDAGToDAG.cpp
AMDGPUISelLowering.cpp.REMOVED.git-id
AMDGPUISelLowering.h
AMDGPUInline.cpp
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructionSelector.cpp
AMDGPUInstructionSelector.h
AMDGPUInstructions.td
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPULegalizerInfo.cpp
AMDGPULegalizerInfo.h
AMDGPULibCalls.cpp
AMDGPULibFunc.cpp
AMDGPULibFunc.h
AMDGPULowerIntrinsics.cpp
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUMachineCFGStructurizer.cpp.REMOVED.git-id
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUOpenCLEnqueuedBlockLowering.cpp
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPUPTNote.h
AMDGPUPromoteAlloca.cpp
AMDGPURegAsmNames.inc.cpp
AMDGPURegisterBankInfo.cpp
AMDGPURegisterBankInfo.h
AMDGPURegisterBanks.td
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPURewriteOutArguments.cpp
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPUUnifyMetadata.cpp
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
BUFInstructions.td
CMakeLists.txt
CaymanInstructions.td
DSInstructions.td
EvergreenInstructions.td
FLATInstructions.td
GCNHazardRecognizer.cpp
GCNHazardRecognizer.h
GCNILPSched.cpp
GCNIterativeScheduler.cpp
GCNIterativeScheduler.h
GCNMinRegStrategy.cpp
GCNProcessors.td
GCNRegPressure.cpp
GCNRegPressure.h
GCNSchedStrategy.cpp
GCNSchedStrategy.h
LLVMBuild.txt
MIMGInstructions.td
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600FrameLowering.cpp
R600FrameLowering.h
R600ISelLowering.cpp
R600ISelLowering.h
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td
R600Intrinsics.td
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600Processors.td
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDebuggerInsertNops.cpp
SIDefines.h
SIFixSGPRCopies.cpp
SIFixVGPRCopies.cpp
SIFixWWMLiveness.cpp
SIFoldOperands.cpp
SIFrameLowering.cpp
SIFrameLowering.h
SIISelLowering.cpp.REMOVED.git-id
SIISelLowering.h
SIInsertSkips.cpp
SIInsertWaitcnts.cpp
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp.REMOVED.git-id
SIInstrInfo.h
SIInstrInfo.td
SIInstructions.td
SIIntrinsics.td
SILoadStoreOptimizer.cpp
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIMachineScheduler.cpp
SIMachineScheduler.h
SIMemoryLegalizer.cpp
SIOptimizeExecMasking.cpp
SIOptimizeExecMaskingPreRA.cpp
SIPeepholeSDWA.cpp
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SIShrinkInstructions.cpp
SIWholeQuadMode.cpp
SMInstructions.td
SOPInstructions.td
VIInstrFormats.td
VIInstructions.td
VOP1Instructions.td
VOP2Instructions.td
VOP3Instructions.td
VOP3PInstructions.td
VOPCInstructions.td
VOPInstructions.td
ARC
ARM
AVR
BPF
Hexagon
Lanai
MSP430
Mips
NVPTX
Nios2
PowerPC
RISCV
Sparc
SystemZ
WebAssembly
X86
XCore
CMakeLists.txt
LLVMBuild.txt
README.txt
Target.cpp
TargetIntrinsicInfo.cpp
TargetLoweringObjectFile.cpp
TargetMachine.cpp
TargetMachineC.cpp
Testing
ToolDrivers
Transforms
WindowsManifest
XRay
CMakeLists.txt
LLVMBuild.txt
projects
resources
runtimes
scripts
test
tools
unittests
utils
.arcconfig
.clang-format
.clang-tidy
.gitattributes
.gitignore
CMakeLists.txt
CODE_OWNERS.TXT
CREDITS.TXT
LICENSE.TXT
LLVMBuild.txt
README.txt
RELEASE_TESTERS.TXT
configure
llvm.spec.in
nuget-buildtasks
nunit-lite
roslyn-binaries
rx
xunit-binaries
how-to-bump-roslyn-binaries.md
ikvm-native
libgc
llvm
m4
man
mcs
mk
mono
msvc
po
runtime
samples
scripts
support
tools
COPYING.LIB
LICENSE
Makefile.am
Makefile.in
NEWS
README.md
acinclude.m4
aclocal.m4
autogen.sh
code_of_conduct.md
compile
config.guess
config.h.in
config.rpath
config.sub
configure.REMOVED.git-id
configure.ac.REMOVED.git-id
depcomp
install-sh
ltmain.sh.REMOVED.git-id
missing
mkinstalldirs
mono-uninstalled.pc.in
test-driver
winconfig.h
233 lines
8.2 KiB
C++
233 lines
8.2 KiB
C++
![]() |
//===- AMDGPUUnifyDivergentExitNodes.cpp ----------------------------------===//
|
||
|
//
|
||
|
// The LLVM Compiler Infrastructure
|
||
|
//
|
||
|
// This file is distributed under the University of Illinois Open Source
|
||
|
// License. See LICENSE.TXT for details.
|
||
|
//
|
||
|
//===----------------------------------------------------------------------===//
|
||
|
//
|
||
|
// This is a variant of the UnifyDivergentExitNodes pass. Rather than ensuring
|
||
|
// there is at most one ret and one unreachable instruction, it ensures there is
|
||
|
// at most one divergent exiting block.
|
||
|
//
|
||
|
// StructurizeCFG can't deal with multi-exit regions formed by branches to
|
||
|
// multiple return nodes. It is not desirable to structurize regions with
|
||
|
// uniform branches, so unifying those to the same return block as divergent
|
||
|
// branches inhibits use of scalar branching. It still can't deal with the case
|
||
|
// where one branch goes to return, and one unreachable. Replace unreachable in
|
||
|
// this case with a return.
|
||
|
//
|
||
|
//===----------------------------------------------------------------------===//
|
||
|
|
||
|
#include "AMDGPU.h"
|
||
|
#include "llvm/ADT/ArrayRef.h"
|
||
|
#include "llvm/ADT/SmallPtrSet.h"
|
||
|
#include "llvm/ADT/SmallVector.h"
|
||
|
#include "llvm/ADT/StringRef.h"
|
||
|
#include "llvm/Analysis/DivergenceAnalysis.h"
|
||
|
#include "llvm/Analysis/PostDominators.h"
|
||
|
#include "llvm/Analysis/TargetTransformInfo.h"
|
||
|
#include "llvm/IR/BasicBlock.h"
|
||
|
#include "llvm/IR/CFG.h"
|
||
|
#include "llvm/IR/Constants.h"
|
||
|
#include "llvm/IR/Function.h"
|
||
|
#include "llvm/IR/InstrTypes.h"
|
||
|
#include "llvm/IR/Instructions.h"
|
||
|
#include "llvm/IR/Intrinsics.h"
|
||
|
#include "llvm/IR/Type.h"
|
||
|
#include "llvm/Pass.h"
|
||
|
#include "llvm/Support/Casting.h"
|
||
|
#include "llvm/Transforms/Scalar.h"
|
||
|
#include "llvm/Transforms/Utils/Local.h"
|
||
|
|
||
|
using namespace llvm;
|
||
|
|
||
|
#define DEBUG_TYPE "amdgpu-unify-divergent-exit-nodes"
|
||
|
|
||
|
namespace {
|
||
|
|
||
|
class AMDGPUUnifyDivergentExitNodes : public FunctionPass {
|
||
|
public:
|
||
|
static char ID; // Pass identification, replacement for typeid
|
||
|
|
||
|
AMDGPUUnifyDivergentExitNodes() : FunctionPass(ID) {
|
||
|
initializeAMDGPUUnifyDivergentExitNodesPass(*PassRegistry::getPassRegistry());
|
||
|
}
|
||
|
|
||
|
// We can preserve non-critical-edgeness when we unify function exit nodes
|
||
|
void getAnalysisUsage(AnalysisUsage &AU) const override;
|
||
|
bool runOnFunction(Function &F) override;
|
||
|
};
|
||
|
|
||
|
} // end anonymous namespace
|
||
|
|
||
|
char AMDGPUUnifyDivergentExitNodes::ID = 0;
|
||
|
|
||
|
char &llvm::AMDGPUUnifyDivergentExitNodesID = AMDGPUUnifyDivergentExitNodes::ID;
|
||
|
|
||
|
INITIALIZE_PASS_BEGIN(AMDGPUUnifyDivergentExitNodes, DEBUG_TYPE,
|
||
|
"Unify divergent function exit nodes", false, false)
|
||
|
INITIALIZE_PASS_DEPENDENCY(PostDominatorTreeWrapperPass)
|
||
|
INITIALIZE_PASS_DEPENDENCY(DivergenceAnalysis)
|
||
|
INITIALIZE_PASS_END(AMDGPUUnifyDivergentExitNodes, DEBUG_TYPE,
|
||
|
"Unify divergent function exit nodes", false, false)
|
||
|
|
||
|
void AMDGPUUnifyDivergentExitNodes::getAnalysisUsage(AnalysisUsage &AU) const{
|
||
|
// TODO: Preserve dominator tree.
|
||
|
AU.addRequired<PostDominatorTreeWrapperPass>();
|
||
|
|
||
|
AU.addRequired<DivergenceAnalysis>();
|
||
|
|
||
|
// No divergent values are changed, only blocks and branch edges.
|
||
|
AU.addPreserved<DivergenceAnalysis>();
|
||
|
|
||
|
// We preserve the non-critical-edgeness property
|
||
|
AU.addPreservedID(BreakCriticalEdgesID);
|
||
|
|
||
|
// This is a cluster of orthogonal Transforms
|
||
|
AU.addPreservedID(LowerSwitchID);
|
||
|
FunctionPass::getAnalysisUsage(AU);
|
||
|
|
||
|
AU.addRequired<TargetTransformInfoWrapperPass>();
|
||
|
}
|
||
|
|
||
|
/// \returns true if \p BB is reachable through only uniform branches.
|
||
|
/// XXX - Is there a more efficient way to find this?
|
||
|
static bool isUniformlyReached(const DivergenceAnalysis &DA,
|
||
|
BasicBlock &BB) {
|
||
|
SmallVector<BasicBlock *, 8> Stack;
|
||
|
SmallPtrSet<BasicBlock *, 8> Visited;
|
||
|
|
||
|
for (BasicBlock *Pred : predecessors(&BB))
|
||
|
Stack.push_back(Pred);
|
||
|
|
||
|
while (!Stack.empty()) {
|
||
|
BasicBlock *Top = Stack.pop_back_val();
|
||
|
if (!DA.isUniform(Top->getTerminator()))
|
||
|
return false;
|
||
|
|
||
|
for (BasicBlock *Pred : predecessors(Top)) {
|
||
|
if (Visited.insert(Pred).second)
|
||
|
Stack.push_back(Pred);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return true;
|
||
|
}
|
||
|
|
||
|
static BasicBlock *unifyReturnBlockSet(Function &F,
|
||
|
ArrayRef<BasicBlock *> ReturningBlocks,
|
||
|
const TargetTransformInfo &TTI,
|
||
|
StringRef Name) {
|
||
|
// Otherwise, we need to insert a new basic block into the function, add a PHI
|
||
|
// nodes (if the function returns values), and convert all of the return
|
||
|
// instructions into unconditional branches.
|
||
|
BasicBlock *NewRetBlock = BasicBlock::Create(F.getContext(), Name, &F);
|
||
|
|
||
|
PHINode *PN = nullptr;
|
||
|
if (F.getReturnType()->isVoidTy()) {
|
||
|
ReturnInst::Create(F.getContext(), nullptr, NewRetBlock);
|
||
|
} else {
|
||
|
// If the function doesn't return void... add a PHI node to the block...
|
||
|
PN = PHINode::Create(F.getReturnType(), ReturningBlocks.size(),
|
||
|
"UnifiedRetVal");
|
||
|
NewRetBlock->getInstList().push_back(PN);
|
||
|
ReturnInst::Create(F.getContext(), PN, NewRetBlock);
|
||
|
}
|
||
|
|
||
|
// Loop over all of the blocks, replacing the return instruction with an
|
||
|
// unconditional branch.
|
||
|
for (BasicBlock *BB : ReturningBlocks) {
|
||
|
// Add an incoming element to the PHI node for every return instruction that
|
||
|
// is merging into this new block...
|
||
|
if (PN)
|
||
|
PN->addIncoming(BB->getTerminator()->getOperand(0), BB);
|
||
|
|
||
|
BB->getInstList().pop_back(); // Remove the return insn
|
||
|
BranchInst::Create(NewRetBlock, BB);
|
||
|
}
|
||
|
|
||
|
for (BasicBlock *BB : ReturningBlocks) {
|
||
|
// Cleanup possible branch to unconditional branch to the return.
|
||
|
simplifyCFG(BB, TTI, {2});
|
||
|
}
|
||
|
|
||
|
return NewRetBlock;
|
||
|
}
|
||
|
|
||
|
bool AMDGPUUnifyDivergentExitNodes::runOnFunction(Function &F) {
|
||
|
auto &PDT = getAnalysis<PostDominatorTreeWrapperPass>().getPostDomTree();
|
||
|
if (PDT.getRoots().size() <= 1)
|
||
|
return false;
|
||
|
|
||
|
DivergenceAnalysis &DA = getAnalysis<DivergenceAnalysis>();
|
||
|
|
||
|
// Loop over all of the blocks in a function, tracking all of the blocks that
|
||
|
// return.
|
||
|
SmallVector<BasicBlock *, 4> ReturningBlocks;
|
||
|
SmallVector<BasicBlock *, 4> UnreachableBlocks;
|
||
|
|
||
|
for (BasicBlock *BB : PDT.getRoots()) {
|
||
|
if (isa<ReturnInst>(BB->getTerminator())) {
|
||
|
if (!isUniformlyReached(DA, *BB))
|
||
|
ReturningBlocks.push_back(BB);
|
||
|
} else if (isa<UnreachableInst>(BB->getTerminator())) {
|
||
|
if (!isUniformlyReached(DA, *BB))
|
||
|
UnreachableBlocks.push_back(BB);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
if (!UnreachableBlocks.empty()) {
|
||
|
BasicBlock *UnreachableBlock = nullptr;
|
||
|
|
||
|
if (UnreachableBlocks.size() == 1) {
|
||
|
UnreachableBlock = UnreachableBlocks.front();
|
||
|
} else {
|
||
|
UnreachableBlock = BasicBlock::Create(F.getContext(),
|
||
|
"UnifiedUnreachableBlock", &F);
|
||
|
new UnreachableInst(F.getContext(), UnreachableBlock);
|
||
|
|
||
|
for (BasicBlock *BB : UnreachableBlocks) {
|
||
|
BB->getInstList().pop_back(); // Remove the unreachable inst.
|
||
|
BranchInst::Create(UnreachableBlock, BB);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
if (!ReturningBlocks.empty()) {
|
||
|
// Don't create a new unreachable inst if we have a return. The
|
||
|
// structurizer/annotator can't handle the multiple exits
|
||
|
|
||
|
Type *RetTy = F.getReturnType();
|
||
|
Value *RetVal = RetTy->isVoidTy() ? nullptr : UndefValue::get(RetTy);
|
||
|
UnreachableBlock->getInstList().pop_back(); // Remove the unreachable inst.
|
||
|
|
||
|
Function *UnreachableIntrin =
|
||
|
Intrinsic::getDeclaration(F.getParent(), Intrinsic::amdgcn_unreachable);
|
||
|
|
||
|
// Insert a call to an intrinsic tracking that this is an unreachable
|
||
|
// point, in case we want to kill the active lanes or something later.
|
||
|
CallInst::Create(UnreachableIntrin, {}, "", UnreachableBlock);
|
||
|
|
||
|
// Don't create a scalar trap. We would only want to trap if this code was
|
||
|
// really reached, but a scalar trap would happen even if no lanes
|
||
|
// actually reached here.
|
||
|
ReturnInst::Create(F.getContext(), RetVal, UnreachableBlock);
|
||
|
ReturningBlocks.push_back(UnreachableBlock);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
// Now handle return blocks.
|
||
|
if (ReturningBlocks.empty())
|
||
|
return false; // No blocks return
|
||
|
|
||
|
if (ReturningBlocks.size() == 1)
|
||
|
return false; // Already has a single return block
|
||
|
|
||
|
const TargetTransformInfo &TTI
|
||
|
= getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
|
||
|
|
||
|
unifyReturnBlockSet(F, ReturningBlocks, TTI, "UnifiedReturnBlock");
|
||
|
return true;
|
||
|
}
|