206 lines
5.8 KiB
C
206 lines
5.8 KiB
C
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//===-- EmulateInstructionARM64.h -------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef EmulateInstructionARM64_h_
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#define EmulateInstructionARM64_h_
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// C Includes
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// C++ Includes
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// Other libraries and framework includes
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// Project includes
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#include "Plugins/Process/Utility/ARMDefines.h"
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#include "lldb/Core/EmulateInstruction.h"
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#include "lldb/Interpreter/OptionValue.h"
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#include "lldb/Utility/Status.h"
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class EmulateInstructionARM64 : public lldb_private::EmulateInstruction {
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public:
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EmulateInstructionARM64(const lldb_private::ArchSpec &arch)
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: EmulateInstruction(arch), m_opcode_pstate(), m_emulated_pstate(),
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m_ignore_conditions(false) {}
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static void Initialize();
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static void Terminate();
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static lldb_private::ConstString GetPluginNameStatic();
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static const char *GetPluginDescriptionStatic();
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static lldb_private::EmulateInstruction *
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CreateInstance(const lldb_private::ArchSpec &arch,
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lldb_private::InstructionType inst_type);
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static bool SupportsEmulatingInstructionsOfTypeStatic(
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lldb_private::InstructionType inst_type) {
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switch (inst_type) {
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case lldb_private::eInstructionTypeAny:
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case lldb_private::eInstructionTypePrologueEpilogue:
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return true;
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case lldb_private::eInstructionTypePCModifying:
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case lldb_private::eInstructionTypeAll:
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return false;
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}
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return false;
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}
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lldb_private::ConstString GetPluginName() override;
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uint32_t GetPluginVersion() override { return 1; }
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bool SetTargetTriple(const lldb_private::ArchSpec &arch) override;
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bool SupportsEmulatingInstructionsOfType(
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lldb_private::InstructionType inst_type) override {
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return SupportsEmulatingInstructionsOfTypeStatic(inst_type);
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}
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bool ReadInstruction() override;
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bool EvaluateInstruction(uint32_t evaluate_options) override;
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bool TestEmulation(lldb_private::Stream *out_stream,
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lldb_private::ArchSpec &arch,
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lldb_private::OptionValueDictionary *test_data) override {
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return false;
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}
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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lldb_private::RegisterInfo ®_info) override;
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bool
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CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
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typedef enum { AddrMode_OFF, AddrMode_PRE, AddrMode_POST } AddrMode;
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typedef enum {
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BranchType_CALL,
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BranchType_ERET,
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BranchType_DRET,
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BranchType_RET,
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BranchType_JMP
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} BranchType;
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typedef enum { CountOp_CLZ, CountOp_CLS, CountOp_CNT } CountOp;
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typedef enum { RevOp_RBIT, RevOp_REV16, RevOp_REV32, RevOp_REV64 } RevOp;
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typedef enum { BitwiseOp_NOT, BitwiseOp_RBIT } BitwiseOp;
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typedef enum { EL0 = 0, EL1 = 1, EL2 = 2, EL3 = 3 } ExceptionLevel;
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typedef enum {
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ExtendType_SXTB,
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ExtendType_SXTH,
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ExtendType_SXTW,
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ExtendType_SXTX,
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ExtendType_UXTB,
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ExtendType_UXTH,
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ExtendType_UXTW,
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ExtendType_UXTX
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} ExtendType;
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typedef enum { ExtractType_LEFT, ExtractType_RIGHT } ExtractType;
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typedef enum { LogicalOp_AND, LogicalOp_EOR, LogicalOp_ORR } LogicalOp;
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typedef enum { MemOp_LOAD, MemOp_STORE, MemOp_PREFETCH, MemOp_NOP } MemOp;
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typedef enum { MoveWideOp_N, MoveWideOp_Z, MoveWideOp_K } MoveWideOp;
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typedef enum {
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ShiftType_LSL,
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ShiftType_LSR,
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ShiftType_ASR,
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ShiftType_ROR
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} ShiftType;
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typedef enum { SP0 = 0, SPx = 1 } StackPointerSelection;
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typedef enum {
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Unpredictable_WBOVERLAP,
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Unpredictable_LDPOVERLAP
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} Unpredictable;
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typedef enum {
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Constraint_NONE,
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Constraint_UNKNOWN,
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Constraint_SUPPRESSWB,
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Constraint_NOP
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} ConstraintType;
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typedef enum {
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AccType_NORMAL,
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AccType_UNPRIV,
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AccType_STREAM,
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AccType_ALIGNED,
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AccType_ORDERED
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} AccType;
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typedef struct {
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uint32_t N : 1, V : 1, C : 1,
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Z : 1, // condition code flags – can also be accessed as
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// PSTATE.[N,Z,C,V]
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Q : 1, // AArch32 only – CSPR.Q bit
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IT : 8, // AArch32 only – CPSR.IT bits
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J : 1, // AArch32 only – CSPR.J bit
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T : 1, // AArch32 only – CPSR.T bit
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SS : 1, // Single step process state bit
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IL : 1, // Illegal state bit
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D : 1, A : 1, I : 1,
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F : 1, // Interrupt masks – can also be accessed as PSTATE.[D,A,I,F]
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E : 1, // AArch32 only – CSPR.E bit
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M : 5, // AArch32 only – mode encodings
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RW : 1, // Current register width – 0 is AArch64, 1 is AArch32
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EL : 2, // Current exception level (see ExceptionLevel enum)
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SP : 1; // AArch64 only - Stack Pointer selection (see
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// StackPointerSelection enum)
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} ProcState;
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protected:
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typedef struct {
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uint32_t mask;
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uint32_t value;
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uint32_t vfp_variants;
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bool (EmulateInstructionARM64::*callback)(const uint32_t opcode);
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const char *name;
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} Opcode;
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static Opcode *GetOpcodeForInstruction(const uint32_t opcode);
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uint32_t GetFramePointerRegisterNumber() const;
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bool BranchTo(const Context &context, uint32_t N, lldb::addr_t target);
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bool ConditionHolds(const uint32_t cond);
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bool UsingAArch32();
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bool EmulateADDSUBImm(const uint32_t opcode);
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template <AddrMode a_mode> bool EmulateLDPSTP(const uint32_t opcode);
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template <AddrMode a_mode> bool EmulateLDRSTRImm(const uint32_t opcode);
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bool EmulateB(const uint32_t opcode);
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bool EmulateBcond(const uint32_t opcode);
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bool EmulateCBZ(const uint32_t opcode);
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bool EmulateTBZ(const uint32_t opcode);
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ProcState m_opcode_pstate;
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ProcState m_emulated_pstate; // This can get updated by the opcode.
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bool m_ignore_conditions;
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};
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#endif // EmulateInstructionARM64_h_
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