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Marcus Calhoun-LopezandMarcusCalhoun-Lopez
719053401b
Update dependencies due to library name change. See https://trac.macports.org/ticket/57871
47 lines
1.4 KiB
Plaintext
47 lines
1.4 KiB
Plaintext
PortSystem 1.0
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name veriwell
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version 2.8.7
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revision 2
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categories science
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license GPL-2+
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maintainers nomaintainer
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description VeriWell Verilog Simulator
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long_description \
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VeriWell is a full Verilog simulator. It supports nearly all of the \
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IEEE1364-1995 standard, as well as PLI 1.0. VeriWell is the \
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same simulator that was sold by Wellspring Solutions in the mid-1990 \
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and was included with the Thomas and Moorby book
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homepage http://sourceforge.net/projects/veriwell
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platforms darwin
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master_sites sourceforge
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checksums md5 bf686d4f96d3ff8fb08616da157888fb \
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sha1 9ef4e6a25a4fd65db325a89ed89b199547fabbd6 \
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rmd160 3d86c40b353f701d61cab301e0f7c3ec136c88e7
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depends_build port:help2man
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depends_lib port:bzip2 \
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port:readline \
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port:zlib
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use_parallel_build yes
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# The following prevent conflicts with other Verilog simulators
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# that may have installed their own copies of:
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# acc_user.h veriuser.c veriuser.h
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configure.args --includedir=${prefix}/include/veriwell
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post-destroot {
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set docdir ${destroot}${prefix}/share/doc/${name}
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xinstall -d ${docdir}
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xinstall -m 644 -W ${worksrcpath} \
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ChangeLog AUTHORS COPYING NEWS README TODO \
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lxt/LXT_Explained.html \
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${docdir}
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}
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livecheck.regex "/veriwell-(\\d+(?:\\.\\d+)*).tar.gz"
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