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renletao
59 lines
2.5 KiB
C
59 lines
2.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2024 M5Stack Technology CO LTD
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef __FLASH_H
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#define __FLASH_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx.h"
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#include <stdbool.h>
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#include "stm32f0xx_hal_flash_ex.h"
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// Flash page head
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#define STM32F0xx_PAGE_SIZE (0x400)
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#define STM32F0xx_FLASH_PAGE0_STARTADDR (0x8000000)
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#define STM32F0xx_FLASH_PAGE1_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE2_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+2*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE3_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+3*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE4_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+4*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE5_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+5*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE6_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+6*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE7_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+7*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE8_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+8*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE9_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+9*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE10_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+10*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE11_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+11*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE12_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+12*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE13_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+13*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE14_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+14*STM32F0xx_PAGE_SIZE)
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#define STM32F0xx_FLASH_PAGE15_STARTADDR (STM32F0xx_FLASH_PAGE0_STARTADDR+15*STM32F0xx_PAGE_SIZE)
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#define FAN_CONTROL_ADDR (STM32F0xx_FLASH_PAGE15_STARTADDR+0)
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#define PWM_FREQUENCY_ADDR (STM32F0xx_FLASH_PAGE15_STARTADDR+1)
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#define PWM_DUTY_CYCLE_ADDR (STM32F0xx_FLASH_PAGE15_STARTADDR+2)
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#define I2C_ADDR (STM32F0xx_FLASH_PAGE15_STARTADDR+3)
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bool set_fan_control(uint8_t data);
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uint8_t get_fan_control(void);
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bool set_pwm_freq(uint8_t data);
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uint8_t get_pwm_freq(void);
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bool set_pwm_duty_cycle(uint8_t data);
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uint8_t get_pwm_duty_cycle(void);
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bool set_i2c_addr(uint8_t data);
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uint8_t get_i2c_addr(void);
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bool write_flash(uint8_t control,uint8_t frequency,uint8_t duty);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __FLASH_H */
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