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Kenta IDA
17 lines
847 B
XML
17 lines
847 B
XML
<?xml version="1" encoding="UTF-8"?>
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<!DOCTYPE gowin-fpga-project>
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<Project>
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<Template>FPGA</Template>
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<Version>5</Version>
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<Device name="GW1NR-9C" pn="GW1NR-LV9QN88C6/I5">gw1nr9c-000</Device>
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<FileList>
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<File path="ip/SDRAM_controller_top_SIP/SDRAM_controller_top_SIP.v" type="file.verilog" enable="1"/>
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<File path="ip/sdram_rpll/sdram_rpll.v" type="file.verilog" enable="1"/>
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<File path="src/top.sv" type="file.verilog" enable="1"/>
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<File path="/home/kenta/repos/atom_display_fpga/rtl/m5stack_hdmi/video_generator.v" type="file.verilog" enable="1"/>
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<File path="src/spi2hdmi_jtag.cst" type="file.cst" enable="1"/>
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<File path="src/m5stack_display.sdc" type="file.sdc" enable="1"/>
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<File path="src/m5stack_display.rao" type="file.gao" enable="1"/>
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</FileList>
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</Project>
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