Caleb Connolly dba496951e WIP: send magic srst that keeps EUD on rather than also TRST ...

This in theory should reset the CPU (restarting from PBL) while keeping
EUD enabled, thus allowing early parts of the bootloader to be debugged.
However it seems to cause sbl1 to crash on the op6 :(

maybe works better on SB-off devices.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>

2025-04-10 12:23:40 +02:00

..

board

tcl/board: Add TI AM261 launchpad config

2025-03-15 10:16:03 +00:00

chip

tcl/chip/st/spear: fix syntax errors

2024-06-08 08:44:04 +00:00

cpld

cpld: update warning to suggest virtex2 refresh

2024-09-07 11:39:22 +00:00

cpu

tcl/arc: Fix ARC v2 registers r22/r23

2023-09-02 10:40:34 +00:00

fpga

pld/intel: remove idcodes from intel.c

2024-06-15 14:25:05 +00:00

interface

EUD code dump

2025-04-01 14:14:07 +02:00

target

WIP: send magic srst that keeps EUD on rather than also TRST

2025-04-10 12:23:40 +02:00

test

tcl: add SPDX tag

2022-06-24 21:54:12 +00:00

tools

tcl/tools/test_cpu_speed: Fix register name

2023-03-18 21:59:47 +00:00

bitsbytes.tcl

tcl: add SPDX tag

2022-06-24 21:54:12 +00:00

mem_helper.tcl

tcl: add SPDX tag

2022-06-24 21:54:12 +00:00

memory.tcl

tcl/memory: fix syntax errors

2024-06-08 08:42:34 +00:00

mmr_helpers.tcl

tcl: add SPDX tag

2022-06-24 21:54:12 +00:00