Commit Graph

89 Commits

Author SHA1 Message Date
oharboe
dc871f422d first stab at imx35 reset init script
git-svn-id: svn://svn.berlios.de/openocd/trunk@2817 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-07 12:21:58 +00:00
oharboe
71bca7640a remove recrusive reset invocation from reset init callback
git-svn-id: svn://svn.berlios.de/openocd/trunk@2816 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-07 12:20:06 +00:00
dbrownell
0da2f750a1 Add basic support for DM6446 EVM board.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2808 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 22:56:52 +00:00
dbrownell
7d78021efa Dragonite target script
From: Nicolas Pitre <nico@fluxnic.net>


git-svn-id: svn://svn.berlios.de/openocd/trunk@2806 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 22:55:04 +00:00
oharboe
a2886fe3c6 stop using targetnum
git-svn-id: svn://svn.berlios.de/openocd/trunk@2804 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 08:10:05 +00:00
dbrownell
7c7467b34f Add a new JTAG "setup" event; use for better DaVinci ICEpick support.
The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME".  So it will fire as part of
non-error paths of "init" and "reset" command processing.  However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.

ALSO:
 - switch DaVinci chips to use this new mechanism
 - log TAP activation/deactivation, since their IDCODEs aren't verified
 - unify "enum jtag_event" scripted event notifications
 - remove duplicative JTAG_TAP_EVENT_POST_RESET


git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:20:28 +00:00
dbrownell
c6b24fb4f0 Get rid of needless OMAP and Davinci target config options
so they provide better examples and are easier to maintain.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2797 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:13:00 +00:00
mlu
f87985b614 Updated reset event handling in omap3530 cfg
git-svn-id: svn://svn.berlios.de/openocd/trunk@2796 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02 16:52:02 +00:00
dbrownell
32599fab1a Remove annoying EOL whitespace (again, sigh).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2781 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 23:02:15 +00:00
oharboe
54c16fc56e strip gdb config options
git-svn-id: svn://svn.berlios.de/openocd/trunk@2779 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 05:40:40 +00:00
oharboe
642519649e michal smulski <michal.smulski@ooma.com> reset now works
git-svn-id: svn://svn.berlios.de/openocd/trunk@2778 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 05:37:32 +00:00
dbrownell
fbbd3066ff Don't provide invalid OMAP5912 IR capture value/mask attributes
git-svn-id: svn://svn.berlios.de/openocd/trunk@2762 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-27 07:59:10 +00:00
dbrownell
5c3c4af88f On DM355 EVM board, associate NAND chips with $_TARGETNAME
instead of a target number.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2761 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-26 22:08:50 +00:00
dbrownell
ad43374c7f Update DM355 target config to know about ICEpick.
Still defaults to nonstandard EMU0/EMU1 settings.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2757 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25 17:02:59 +00:00
oharboe
43b3807878 Michael Hasselberg <mh@open-engineering.de> target configuration files for Toshiba TX09 familiy
git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25 16:48:15 +00:00
dbrownell
71af49ca7f Remove annoying end-of-line whitespace from tcl/* files
git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 18:48:22 +00:00
oharboe
0bcf5a6b76 Ethan Eade <ethan@evolution.com> board config script for Cogent CSB732 i.MX35 (arm1136)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2741 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 09:25:52 +00:00
dbrownell
108028112f Ensure that DaVinci chips can't start with a too-fast JTAG clock.
It can be sped up later, once it's known the PLLs are active.

Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 00:37:58 +00:00
mlu
01735c515f Reduced sleep time after reset
git-svn-id: svn://svn.berlios.de/openocd/trunk@2732 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-19 14:47:53 +00:00
mlu
7b3be0e21e Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-18 15:11:46 +00:00
oharboe
9542318312 Rolf Meeser <rolfm_9dq@yahoo.de> adds flash support for NXP's LPC2900 family (ARM968E).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-16 12:38:26 +00:00
oharboe
772d8d06ea Magnus Lundin <lundin@mlu.mine.nu> Disable poll while core register initialization
git-svn-id: svn://svn.berlios.de/openocd/trunk@2703 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-13 20:07:13 +00:00
oharboe
40f361dd94 David Brownell <david-b@pacbell.net>
Update the board config for the DaVinci DM355 EVM so the reset-init
event handler does the rest of the work it should do:

 - minor PLL setup bugfixes
 - initialize the DDR2 controller
 - probe both NAND banks
 - initialize UART0
 - enable the icache


git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-12 08:11:45 +00:00
oharboe
4f7761828c tap post reset event added. Allows omap3530 to send 100 runtest idle tickle's after a TAP_RESET.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2696 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 18:34:15 +00:00
ntfreak
ec3015db1a - revert change made to sheevaplug.cfg in rev2573
git-svn-id: svn://svn.berlios.de/openocd/trunk@2695 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 14:08:28 +00:00