Commit Graph

84 Commits

Author SHA1 Message Date
David Brownell
6881c1b6d6 target.cfg: (re)move some bogus reset_config lines
General rule, this is all board-specific and doesn't belong
in target config files.  Some of these were just cosmetic.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-10 09:25:26 -08:00
Thomas Kindler
85944d4144 stm32.cfg: remove reset_config
Here's a patch for the double-reset problem on STM32.  I've tested
downloading and debugging with GDB and Eclipse, and everything seems
to work fine.

This effectively sets reset_config to none. trst_only would also
be ok, but that's better left to a board configuration file since
not all boards wire it up.

The NVIC is used to trigger reset, which at least on this chip also
pulses nSRST so the whole system does get rest -- exactly once.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-10 09:16:12 -08:00
Øyvind Harboe
c202ba7d34 ARM11: remove old mrc/mcr commands
Switch to new commands in config scripts

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-11-10 13:13:13 +01:00
Øyvind Harboe
1f357869c1 telo.cfg: fix search paths
Add the missing "target/" prefix for scripts in the
target folder.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-11-10 13:11:17 +01:00
David Brownell
3e6f9e8d1e target.cfg: remove "-work-area-virt 0"
The semantics of "-work-area-virt 0" (or phys) changed with
the patch to require specifying physical or virtrual work
area addresses.  Specifying zero was previously a NOP.  Now
it means that address zero is valid.

This patch addresses three related issues:

 - MMU-less processors should never specify work-area-virt;
   remove those specifications.  Such processors include
   ARM7TDMI, Cortex-M3, and ARM966.

 - MMU-equipped processors *can* specify work-area-virt...
   but zero won't be appropriate, except in mischievous
   contexts (which hide null pointer exceptions).

   Remove those specs from those processors too.  If any of
   those mappings is valid, someone will need to submit a
   patch adding it ... along with a comment saying what OS
   provides the mapping, and in which context.  Example,
   say "works with Linux 2.6.30+, in kernel mode".  (Note
   that ARM Linux doesn't map kernel memory to zero ...)

 - Clarify docs on that "-virt" and other work area stuff.

Seems to me work-area-virt is quite problematic; not every
operating system provides such static mappings; if they do,
they're not in every MMU context...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-08 08:52:40 -08:00
Freddie Chopin
2120231afd remove "-ircapture 0x1 -irmask 0x1" from stm32.cfg
Gets rid of the runtime warning "stm32.bs: nonstandard IR mask"

[dbrownell@users.sourceforge.net: line lengths, note issue, section ref]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-01 07:02:23 -08:00
Freddie Chopin
0da0bfd40a target.cfg: use $_TARGETNAME for flash
This gets rid of runtime warnings from the use of numbers.
STM32 and LPC2103 were tested.  Other LPC updates are the
same, and so are safe.  The CFI updates match other tested
changes now in the tree.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-31 11:13:10 -07:00
David Brownell
4a26390eec PXA255: force reset config
These chips need both SRST and TRST when debugging,
and SRST doesn't gate JTAG.
2009-10-26 22:59:46 -07:00
David Brownell
4a91b070ff omap3530: target reset/init improvements
Now I can issue "reset halt" and have everything act smoothly;
the vector_catch hardware is obviously not kicking in, but the
rest of the reset sequence acts sanely.

 - TAP "setup" event enables the DAP, not omap3_dbginit
   (resolving a chicken/egg bug I noted a while back)
 - Remove stuff from omap3_dbginit which should never be
   used in event handlers
 - Cope better with slow clocking during reset

Also, stop hard-wiring the target name: use the input params in
the standard way, and set up $_TARGETNAME as an output param.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-26 22:53:18 -07:00
Øyvind Harboe
a07422c26c fix syntax of mww phys. 2009-10-25 22:15:57 +01:00
Øyvind Harboe
fcf1301e52 mww_phys retired. Replaced by generic mww phys in target.c 2009-10-21 22:25:33 +02:00
Øyvind Harboe
79e257a209 Added the faux flash driver and target. Used for testing. 2009-10-20 12:23:56 +02:00
David Brownell
c70073ef67 davinci: add watchdog reset method
Lightly tested on dm365.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-19 22:50:51 -07:00
Øyvind Harboe
44e9200d0a iMX target config script's ported from Freescale BSP. 2009-10-14 11:04:44 +02:00
David Brownell
7afc181e42 omap2420.cfg updates
Remove ircapture/mask attributes.  Add "srst_nogate".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-14 02:00:34 -07:00
Øyvind Harboe
f8cd850c4d arm11 seems to gate JTAG when srst is asserted 2009-10-13 12:10:23 +02:00
Øyvind Harboe
026559068d Merge commit 'origin/master' 2009-10-12 09:28:56 +02:00
Øyvind Harboe
b23b096c8e Supply default reset_config statement to make target scripts useful standalone and provide sensible default 2009-10-12 09:25:08 +02:00
Wookey
456ec36795 Fix reset delays and tinker with ID's 2009-10-10 09:08:06 +02:00
David Brownell
60e24aa597 make PXA255 targets enumerate sort-of-OK
Startup now mostly works, except that the initial target state
is "unknown" ... previously, it refused to even start.

Getting that far required fixing the ircapture value (which
can never have been correct!) and the default JTAG clock rate,
then providing custom reset script.

The "reset" command is still iffy.  DCSR updates, and loading
the debug handler, report numerous DR/IR capture failures.
But once that's done, "poll" reports that the CPU is halted
(which it shouldn't be, this was "reset run"!), due to the
rather curious reason "target-not-halted".

Summary:  you still can't debug these parts, but it's closer.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-08 23:51:50 -07:00
David Brownell
6efaa95c44 make OMAP5912 resets more reliable
Without some extra delay after releasing SRST, we seemed to
be trying to talk to the TAP before it was ready to respond.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07 23:29:18 -07:00
John Rigby
37e9f65f5a iMX25 target support
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07 21:49:36 -07:00
dbrownell
7d78021efa Dragonite target script
From: Nicolas Pitre <nico@fluxnic.net>


git-svn-id: svn://svn.berlios.de/openocd/trunk@2806 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 22:55:04 +00:00
dbrownell
7c7467b34f Add a new JTAG "setup" event; use for better DaVinci ICEpick support.
The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME".  So it will fire as part of
non-error paths of "init" and "reset" command processing.  However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.

ALSO:
 - switch DaVinci chips to use this new mechanism
 - log TAP activation/deactivation, since their IDCODEs aren't verified
 - unify "enum jtag_event" scripted event notifications
 - remove duplicative JTAG_TAP_EVENT_POST_RESET


git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:20:28 +00:00
dbrownell
c6b24fb4f0 Get rid of needless OMAP and Davinci target config options
so they provide better examples and are easier to maintain.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2797 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:13:00 +00:00