Commit Graph

1498 Commits

Author SHA1 Message Date
David Brownell
e7acbdf5db target: move 'extern' decls to *.h files
The exception being declarations for drivers.  Those should
be split out in some clean way -- like driver add/remove calls
made by initialization code -- but that's for another day.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-08 13:06:41 -08:00
David Brownell
ac19fc0da7 ARM: cygwin complile fixes
It's as if despite integers being 32-bits, GCC refuses to
convert a "uint32_t" to one of them.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-08 02:00:35 -08:00
Øyvind Harboe
eb1bc657ae build: add build/src to include path
This allows including generated include files.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-08 10:16:10 +01:00
David Brownell
456ec016c2 ARM: cope with stupidheaded compiler
Some versions of GCC don't understand that if you mask with 0x3
then have cases 0-3, it's not possible for a variable assigned in
all those branches to have no value at end-of-case.  Feh.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 18:14:46 -08:00
David Brownell
81aec6be04 ARM: list number of HW breakpoints/watchpoints
When starting up, say how many hardware breakpoints and watchpoints
are available on various targets.

This makes it easier to tell GDB how many of those resources exist.
Its remote protocol currently has no way to ask OpenOCD for that
information, so it must configured by hand (or not at all).

Update the docs to mention this; remove obsolete "don't do this" info.
Presentation of GDB setup information is still a mess, but at least
it calls out the three components that need setup.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:44 -08:00
David Brownell
bbb754aa39 target: add debug_reason_name()
Provide and use debug_reason_name() instead of expecting targets
to call Jim_Nvp_value2name_simple().  Less dependency on Jim, and
the code becomes more clear too.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:44 -08:00
David Brownell
19ad7f828b ARM: don't clone arm_arch_state() code
Have various ARM cores delegate to arm_arch_state() to display
basic information, instead of duplicating that logic.

This shrinks the code, makes them all report when semihosting
is active, and highlights which data are specific to this core.
(Like ARM720 not having separate instruction and data caches.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:44 -08:00
David Brownell
0a1b7dcfc4 ARM: use <target/arm.h> not armv4_5.h
Move most declarations in <target/armv4_5.h> to <target/arm.h>
and update users.

What's left in the older file is stuff that I think should be
removed ... the old register cache access stuff, which makes it
awkward to support microcontroller profile (Cortex-M) cores.

The armv4_5_run_algorithm() declaration was moved too, even
though it's not yet as generic as it probably ought to be.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:44 -08:00
David Brownell
0529c14bfe ARM: rename some generic routines
Rename some (mostly) generic ARM functions:

    armv4_5_arch_state()       --> arm_arch_state()
    armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list()
    armv4_5_init_arch_info()   --> arm_init_arch_info()

Cores using the microcontroller profile may want a different
arch_state() routine though.

(Also fix strange indentation in arm_arch_state: use tabs only!
And update a call to it, removing assignment-in-conditional.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:44 -08:00
David Brownell
a4a2808c2a ARM: move opcode macros to <target/arm_opcodes.h>
Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.

Removed duplicate opcodes from that v7m/Thumb2 set.  Protected
a few macro argument references by adding missing parentheses.

Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:43 -08:00
David Brownell
7b0314c377 ARM: remove mrc_opcode(), use MRC() or MCR()
Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where
arm*20t should have used it, ARMV4_5_MCR() instead.

Basically, *writing* coprocessor registers shouldn't have
used the *read* opcode ... and both should stick to standard
opcode constructors, not rearranging parameter sequence any
more than already needed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:43 -08:00
David Brownell
7936ab16da ARM: disassemble two more v6+ instructions
The SRS and RFE instructions speed exception entry/exit by
making it easy to save and restore PC and SPSR.  This handles
both ARM and Thumb2 encodings.

Fix minor PLD goofage; that "should never reach this point"
can't happen, so remove it.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:43 -08:00
David Brownell
efb93efd6f ARM DPM: don't write low bits of watchpoint value
The low two bits are defined as should-be-zero-or-presereved.
We'll take the zero option, it's easier to enforce.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:43 -08:00
Nicolas Pitre
ec8c3b5a67 ARM semihosting: use breakpoint on ARM7
Fall back to software breakpoint when vector catch isn't available.

Possible enhancements:

 - add extra optional command parameter to select high vectors
 - add extra optional command parameter to select hardware breakpoint

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 23:07:10 -08:00
Nicolas Pitre
e8599cc3d8 ARM semihosting: work with both low and high vectors
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 23:07:10 -08:00
David Brownell
af1d7590ed ARM: doc updates for main header
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:44:29 -08:00
David Brownell
3edcff8b8e ARM: rename armv4_5_build_reg_cache() as arm_*()
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:33:02 -08:00
David Brownell
c2cc677056 ARM: rename armv4_5_algorithm as arm_algorithm
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:19:49 -08:00
David Brownell
340e2eb762 ARM: misc generic cleanup
Remove an undesirable use of the CPSR symbol ... it needs to vanish.
Flag mode-to-number stuff as obsolete; say why ... should also vanish.

Get rid of no-longer-used mode and state typedefs.

Comment a few of the implicit ties to "classic ARM".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:14:46 -08:00
David Brownell
e51b9a4ac7 ARM: ARMV4_5_COMMON_MAGIC --> ARM_COMMON_MAGIC
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:46:44 -08:00
David Brownell
87589043fa ARM: switch target_to_armv4_5() to target_to_arm()
And remove that old symbol.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:43:03 -08:00
David Brownell
56e0171420 ARM: rename armv4_5_state_* as arm_state_*
And make arm_state_strings[] be const.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:39:25 -08:00
David Brownell
d4d16f1036 ARM: rename armv4_5_mode_* AS arm_mode_*
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:33:33 -08:00
David Brownell
0073e7a69e ARM: rename ARMV4_5_MODE_* as ARM_MODE_*
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:21:14 -08:00
David Brownell
31e3ea7c19 ARM: rename ARMV4_5_STATE_* as ARM_STATE_*
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:14:48 -08:00