Commit Graph

2546 Commits

Author SHA1 Message Date
oharboe
25f9a466ca Nicolas Pitre <nico@cam.org> put feroceon target definition at the end so to avoid a
bunch of useless forward declarations.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2694 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 08:04:50 +00:00
oharboe
00e900f8a1 Nicolas Pitre <nico@cam.org> Dragonite support
git-svn-id: svn://svn.berlios.de/openocd/trunk@2693 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 08:03:46 +00:00
oharboe
f89d1cbfd6 spelling mistake
git-svn-id: svn://svn.berlios.de/openocd/trunk@2692 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 07:46:50 +00:00
oharboe
0dcfbec7fb do not use dynamically sized stack arrays, not compatible with embedded OS's
git-svn-id: svn://svn.berlios.de/openocd/trunk@2691 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 07:43:36 +00:00
oharboe
58b78818e0 registering a target event twice caused infinite loop. Same bug as in jtag/core.c copy & pasted.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2690 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 06:58:49 +00:00
oharboe
6dd8f37e6d syntax error fix
git-svn-id: svn://svn.berlios.de/openocd/trunk@2689 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 06:08:51 +00:00
oharboe
9b1a938a22 Alexei Babich <a.babich@rez.ru> cleanup
git-svn-id: svn://svn.berlios.de/openocd/trunk@2688 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 06:01:28 +00:00
oharboe
c5f54c5333 Nicolas Pitre <nico@cam.org> tighten error checking in bulk_write
git-svn-id: svn://svn.berlios.de/openocd/trunk@2687 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 05:57:51 +00:00
oharboe
49d0ea2126 eol-style:native
git-svn-id: svn://svn.berlios.de/openocd/trunk@2686 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-10 13:35:08 +00:00
oharboe
9262e0dbdf Alexei Babich <a.babich@rez.ru> imx31 nand flash controller support
git-svn-id: svn://svn.berlios.de/openocd/trunk@2685 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-10 13:17:25 +00:00
oharboe
3bade442b1 Alexei Babich <a.babich@rez.ru> fix problems with unecessary tailend byte accesses. Use 16 bit access on tailend of a memory read if possible.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2684 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-10 13:17:05 +00:00
oharboe
b4acbee47f michal smulski <michal.smulski@ooma.com> telo target/board scripts
git-svn-id: svn://svn.berlios.de/openocd/trunk@2683 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-10 08:06:22 +00:00
oharboe
7b5ddb4a58 Rolf Meeser <rolfm_9dq@yahoo.de>
This patch adds target algorithm support for those flash devices that do not support DQ5 polling. So far they could only be programmed with host algorithm, but this was way too slow.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2682 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-09 16:11:33 +00:00
oharboe
983f5a1ae9 - Fix bug-in-waiting when adding more than one TAP event type
- Infinite loop bugfix when running tap configure a second time


git-svn-id: svn://svn.berlios.de/openocd/trunk@2681 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-09 07:09:14 +00:00
oharboe
aa46b15377 David Brownell <david-b@pacbell.net>
Optionally shave time off the armv4_5 run_algorithm() code:  let
them terminate using software breakpoints, avoiding roundtrips
to manage hardware ones.

Enable this by using BKPT to terminate execution instead of "branch
to here" loops.  Then pass zero as the exit address, except when
running on an ARMv4 core.  ARM7TDMI, ARM9TDMI, and derived cores
now set a flag saying they're ARMv4.

Use that mechanism in arm_nandwrite(), for about 3% speedup on a
DaVinci ARM926 core; not huge, but it helps.  Some other algorithms
could use this too (mostly flavors of flash operation).

git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-09 06:28:49 +00:00
oharboe
8b2b0071a9 David Brownell <david-b@pacbell.net>
Fix docs on ARM11 MCR and MRC coprocessor commands:
correct read-vs-write; and describe the params.

(ARM920 and ARM926 have cp15-specific commands; this
approach is more generic.  MCR2, MRC2, MCRR, MCRR2,
MRRC, and MRRC2 instructions could also get exposed.)

git-svn-id: svn://svn.berlios.de/openocd/trunk@2679 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-09 06:27:47 +00:00
mlu
857c06ca8b Report correct core instruction state for ARMv/A targets
git-svn-id: svn://svn.berlios.de/openocd/trunk@2678 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08 15:32:18 +00:00
mlu
f6a5749c1b Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2677 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08 15:31:24 +00:00
oharboe
5dae4753ff David Brownell <david-b@pacbell.net>
Provide an "armv7a disassemble" command.  Current omissions include
VFP (except as coprocessor instructions), Neon, and various Thumb2
opcodes that are not available in ARMv7-M processors.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08 06:18:45 +00:00
oharboe
57e12b7e45 David Brownell <david-b@pacbell.net>
lean up some loose ends with the ARM disassembler

 - Add a header comment describing its current state and uses
   and referencing the now-generally-available V7 arch spec

 - Support some mode switch instructions:
    * Thumb to Jazelle (BXJ)
    * Thumb to ThumbEE (ENTERX)
    * ThumbEE to Thumb (LEAVEX)

 - Improve that recent warning fix (and associated whitespace goof)

 - Declare the rest of the internal code and data "static".  A
   compiler may use this, and it helps clarify the scope of these
   routines (e.g. what changes to them could affect).


git-svn-id: svn://svn.berlios.de/openocd/trunk@2675 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08 06:17:33 +00:00
mlu
2c76cd7171 Improved handling of instruction set state, helps for debugging Thumb state.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2674 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-07 20:19:17 +00:00
oharboe
a690ee3c0c Mahr, Stefan <Stefan.Mahr@sphairon.com> removes the endianness swapping in mips_m4k.c Swapping is already done in target.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@2673 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 19:35:10 +00:00
oharboe
0b11e4dbb4 use "armv4_5 core_state arm" instead of soft_reset_halt, fewer side effects
git-svn-id: svn://svn.berlios.de/openocd/trunk@2672 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 11:03:26 +00:00
oharboe
b13dbc80e0 Dirk Behme <dirk.behme@googlemail.com> retire jtag_speed usage
git-svn-id: svn://svn.berlios.de/openocd/trunk@2671 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 08:27:27 +00:00
oharboe
982ac083f0 Dirk Behme <dirk.behme@googlemail.com> Add default fall back freqency.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2670 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 08:27:08 +00:00