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Cadence virtual debug interface (vdebug) integration

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Change-Id: I1bc105b3addc3f34161c2356c482ff3011e3f2cc
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6097
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Jacek Wuwer
2021-04-06 20:08:11 +02:00
committed by Antonio Borneo
parent 2a2636f138
commit f998a2aaf1
13 changed files with 1364 additions and 2 deletions
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doc/openocd.texi
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@@ -588,6 +588,12 @@ produced, PDF schematics are easily found and it is easy to make.
@* A JTAG driver acting as a client for the JTAG VPI server interface.
@* Link: @url{http://github.com/fjullien/jtag_vpi}
@item @b{vdebug}
@* A driver for Cadence virtual Debug Interface to emulated or simulated targets.
It implements a client connecting to the vdebug server, which in turn communicates
with the emulated or simulated RTL model through a transactor. The current version
supports only JTAG as a transport, but other virtual transports, like DAP are planned.
@item @b{jtag_dpi}
@* A JTAG driver acting as a client for the SystemVerilog Direct Programming
Interface (DPI) for JTAG devices. DPI allows OpenOCD to connect to the JTAG
@@ -3345,6 +3351,41 @@ This value is only used with the standard variant.
@end deffn
@deffn {Interface Driver} {vdebug}
Cadence Virtual Debug Interface driver.
@deffn {Config Command} {vdebug server} host:port
Specifies the host and TCP port number where the vdebug server runs.
@end deffn
@deffn {Config Command} {vdebug batching} value
Specifies the batching method for the vdebug request. Possible values are
0 for no batching
1 or wr to batch write transactions together (default)
2 or rw to batch both read and write transactions
@end deffn
@deffn {Config Command} {vdebug polling} min max
Takes two values, representing the polling interval in ms. Lower values mean faster
debugger responsiveness, but lower emulation performance. The minimum should be
around 10, maximum should not exceed 1000, which is the default gdb and keepalive
timeout value.
@end deffn
@deffn {Config Command} {vdebug bfm_path} path clk_period
Specifies the hierarchical path and input clk period of the vdebug BFM in the design.
The hierarchical path uses Verilog notation top.inst.inst
The clock period must include the unit, for instance 40ns.
@end deffn
@deffn {Config Command} {vdebug mem_path} path base size
Specifies the hierarchical path to the design memory instance for backdoor access.
Up to 4 memories can be specified. The hierarchical path uses Verilog notation.
The base specifies start address in the design address space, size its size in bytes.
Both values can use hexadecimal notation with prefix 0x.
@end deffn
@end deffn
@deffn {Interface Driver} {jtag_dpi}
SystemVerilog Direct Programming Interface (DPI) compatible driver for
JTAG devices in emulation. The driver acts as a client for the SystemVerilog