# SPDX-License-Identifier: GPL-2.0-or-later
# Cadence virtual debug interface
# Arm v8 64b Cortex A

if {![info exists CORES]} {
	set CORES 1
}
if {![info exists CHIPNAME]} {
	set CHIPNAME aarch64
}
if {[info exists ACCESSPORT]} {
	set _APNUM "-ap-num $ACCESSPORT"
	if { $ACCESSPORT > 0xff } {
		set _DAP6 "-adiv6"
	} else {
		set _DAP6 "-adiv5"
	}
} else {
	set _APNUM ""
}

set _TARGETNAME $CHIPNAME.cpu
set _CTINAME $CHIPNAME.cti
set _DAPNAME $CHIPNAME.dap

dap create $_DAPNAME $_DAP6 -chain-position $_TARGETNAME

for { set _core 0 } { $_core < $CORES } { incr _core } \
{
	set _cmd "cti create $_CTINAME.$_core -dap $_DAPNAME $_APNUM -baseaddr [lindex $CTIBASE $_core]"
	eval $_cmd
	set _cmd "target create $_TARGETNAME.$_core aarch64 -dap $_DAPNAME $_APNUM -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core -coreid $_core"
	if { $_core != 0 } {
		# non-boot core examination may fail
		set _cmd "$_cmd -defer-examine"
		set _smp_cmd "$_smp_cmd $_TARGETNAME.$_core"
	} else {
		set _smp_cmd "target smp $_TARGETNAME.$_core"
	}
	eval $_cmd
}
eval $_smp_cmd

set _TARGETCUR $_TARGETNAME.0
targets $_TARGETCUR
