# SPDX-License-Identifier: GPL-2.0-or-later

#
# Nordic nRF54L series
#
# Arm Cortex-M33 processor with RISC-V coprocessor
#
# The device uses resistive RAM (RRAM) as non-volatile memory.
#

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME nrf54l
}

# Work-area is a space in RAM used for flash programming, by default use 16 KiB.
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x4000
}

if { [info exists CPUTAPID] } {
	set _CPUTAPID $CPUTAPID
} else {
	set _CPUTAPID 0x6ba02477
}

# Multidrop instance ID should be configurable by FW in TAD TINSTANCE register.
# Writes to the register are ignored due to a silicon erratum.
if { [info exists SWD_INSTANCE_ID] } {
	set _SWD_INSTANCE_ID $SWD_INSTANCE_ID
} else {
	set _SWD_INSTANCE_ID 0
}

transport select swd

swd newdap $_CHIPNAME cpu -expected-id $_CPUTAPID

if { [info exists SWD_MULTIDROP] } {
	dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu -dp-id 0x001c0289 -instance-id $_SWD_INSTANCE_ID
} else {
	dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
}

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap -ap-num 0

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

# Create target for the AUX access port (AUX-AP).
target create $_CHIPNAME.aux mem_ap -dap $_CHIPNAME.dap -ap-num 1

# AUX-AP is accessible only if CSW Prot[0] bit (Data Access) is set
$_CHIPNAME.dap apsel 1
$_CHIPNAME.dap apcsw 0x01000000 0x01000000

adapter speed 1000

# Use main processor as default target.
targets $_TARGETNAME

if {![using_hla]} {
	$_TARGETNAME cortex_m reset_config sysresetreq
}
