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Before XO refclk is distributed to PCIe/USB/eDP PHYs, it passes through a QREF block. QREF is powered by dedicated LDO rails, and the clkref_en register controls whether refclk is gated through to the PHY side. These clkref controls are different from typical GCC branch clocks: - only a single enable bit is present, without branch-style config bits - regulators must be voted before enable and unvoted after disable Model this as a dedicated clk_ref clock type with custom clk_ops instead of reusing struct clk_branch semantics. Also provide a common registration/probe API so the same clkref model can be reused regardless of where clkref_en registers are placed, e.g. TCSR on glymur and TLMM on SM8750. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
68 lines
1.7 KiB
C
68 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2026, Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#ifndef __LINUX_CLK_QCOM_H
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#define __LINUX_CLK_QCOM_H
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#include <linux/clk-provider.h>
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#include <linux/errno.h>
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#include <linux/kconfig.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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struct device;
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struct platform_device;
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struct regulator_bulk_data;
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/**
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* struct qcom_clk_ref_desc - descriptor for a clkref_en gate clock
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* @name: clock name exposed to the common clock framework
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* @offset: clkref_en register offset from the block base
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* @regulator_names: optional supply names enabled while preparing the clock
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* @num_regulators: number of entries in @regulator_names
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*/
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struct qcom_clk_ref_desc {
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const char *name;
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u32 offset;
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const char * const *regulator_names;
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unsigned int num_regulators;
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};
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/**
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* struct qcom_clk_ref - per-clock data for a clkref_en gate clock
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* @hw: common clock framework hardware clock handle
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* @regmap: register map backing the clkref_en register
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* @desc: clock descriptor copied at registration time
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* @regulators: optional bulk regulator handles for @desc.regulator_names
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*/
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struct qcom_clk_ref {
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struct clk_hw hw;
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struct regmap *regmap;
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struct qcom_clk_ref_desc desc;
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struct regulator_bulk_data *regulators;
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};
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#if IS_ENABLED(CONFIG_COMMON_CLK_QCOM)
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int qcom_clk_ref_probe(struct platform_device *pdev,
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const struct regmap_config *config,
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const struct qcom_clk_ref_desc * const *descs,
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size_t num_clk_refs);
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#else
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static inline int
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qcom_clk_ref_probe(struct platform_device *pdev,
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const struct regmap_config *config,
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const struct qcom_clk_ref_desc * const *descs,
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size_t num_clk_refs)
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{
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return -EOPNOTSUPP;
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}
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#endif
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#endif
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