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Jishnu PrakashandAbel Vesa
5840a45c41
Add support for ADC_TM part of PMIC5 Gen3 in an auxiliary driver under the Gen3 ADC driver. Its functionality is similar to that of PMIC5 Gen2 ADC_TM, which implements the threshold setting and interrupt generating functions, used to support thermal trip points. In Gen3 ADC, the register interface is implemented on one or more SDAM (Shared Direct Access Memory) peripherals instead of dedicated ADC peripherals. Each ADC SDAM has eight channels which can be configured for either immediate reads (main ADC driver's functionality) or ADC_TM reads. By convention, the first channel of the first ADC SDAM is reserved for all immediate reads and remaining channels across all SDAMs are used for ADC_TM functionality. On the first SDAM, the interrupt line and configuration registers are shared between the main ADC and auxiliary ADC_TM drivers. Access to the registers is protected through a mutex shared between the drivers. The ADC_TM driver accesses this mutex and some other functions shared from the main driver (like adc5_gen3_get_scaled_reading() for immediate channel reads in the .get_temp() callback) through APIs exported into a shared namespace. Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Link: https://patch.msgid.link/20260722-gen3_adc_tm-v4-3-011981f756c8@oss.qualcomm.com Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>