Files
James Clark 6c75940eb7 coresight: Extend width of timestamp format attribute
'timestamp' is currently 1 bit wide for on/off. To enable setting
different intervals, extend it to 4 bits wide. Keep the old bit position
for backward compatibility ("deprecated_timestamp") but don't publish in
the format/ folder. It will be removed from the documentation and can be
removed completely after enough time has passed.

ETM3x doesn't support different intervals, so validate that the value is
either 0 or 1.

Tools that read the bit positions from the format/ folder will continue
to work as before, setting either 0 or 1 for off/on. Tools that
incorrectly didn't do this and set the ETM_OPT_TS bit directly will also
continue to work because that old bit is still checked.

This avoids adding a second timestamp attribute for setting the
interval. This would be awkward to use because tools would have to be
updated to ensure that the timestamps are always enabled when an
interval is set, and the driver would have to validate that both options
are provided together. All this does is implement the semantics of a
single enum but spread over multiple fields.

Reviewed-by: Leo Yan <leo.yan@arm.com>
Tested-by: Leo Yan <leo.yan@arm.com>
Tested-by: Jie Gan <jie.gan@oss.qualcomm.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-12-4d319764cc58@linaro.org
2025-12-22 15:30:54 +00:00

121 lines
3.8 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright(C) 2015 Linaro Limited. All rights reserved.
* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
*/
#ifndef _CORESIGHT_ETM_PERF_H
#define _CORESIGHT_ETM_PERF_H
#include <linux/percpu-defs.h>
#include "coresight-priv.h"
struct coresight_device;
struct cscfg_config_desc;
/*
* In both ETMv3 and v4 the maximum number of address comparator implentable
* is 8. The actual number is implementation specific and will be checked
* when filters are applied.
*/
#define ETM_ADDR_CMP_MAX 8
#define ATTR_CFG_FLD_preset_CFG config
#define ATTR_CFG_FLD_preset_LO 0
#define ATTR_CFG_FLD_preset_HI 3
#define ATTR_CFG_FLD_timestamp_CFG config
#define ATTR_CFG_FLD_timestamp_LO 4
#define ATTR_CFG_FLD_timestamp_HI 7
#define ATTR_CFG_FLD_branch_broadcast_CFG config
#define ATTR_CFG_FLD_branch_broadcast_LO 8
#define ATTR_CFG_FLD_branch_broadcast_HI 8
#define ATTR_CFG_FLD_cycacc_CFG config
#define ATTR_CFG_FLD_cycacc_LO 12
#define ATTR_CFG_FLD_cycacc_HI 12
#define ATTR_CFG_FLD_contextid1_CFG config
#define ATTR_CFG_FLD_contextid1_LO 14
#define ATTR_CFG_FLD_contextid1_HI 14
#define ATTR_CFG_FLD_contextid2_CFG config
#define ATTR_CFG_FLD_contextid2_LO 15
#define ATTR_CFG_FLD_contextid2_HI 15
/*
* Old position of 'timestamp' and not published in sysfs. Remove at a later
* date if necessary.
*/
#define ATTR_CFG_FLD_deprecated_timestamp_CFG config
#define ATTR_CFG_FLD_deprecated_timestamp_LO 28
#define ATTR_CFG_FLD_deprecated_timestamp_HI 28
#define ATTR_CFG_FLD_retstack_CFG config
#define ATTR_CFG_FLD_retstack_LO 29
#define ATTR_CFG_FLD_retstack_HI 29
#define ATTR_CFG_FLD_sinkid_CFG config2
#define ATTR_CFG_FLD_sinkid_LO 0
#define ATTR_CFG_FLD_sinkid_HI 31
#define ATTR_CFG_FLD_configid_CFG config2
#define ATTR_CFG_FLD_configid_LO 32
#define ATTR_CFG_FLD_configid_HI 63
#define ATTR_CFG_FLD_cc_threshold_CFG config3
#define ATTR_CFG_FLD_cc_threshold_LO 0
#define ATTR_CFG_FLD_cc_threshold_HI 11
/**
* struct etm_filter - single instruction range or start/stop configuration.
* @start_addr: The address to start tracing on.
* @stop_addr: The address to stop tracing on.
* @type: Is this a range or start/stop filter.
*/
struct etm_filter {
unsigned long start_addr;
unsigned long stop_addr;
enum etm_addr_type type;
};
/**
* struct etm_filters - set of filters for a session
* @etm_filter: All the filters for this session.
* @nr_filters: Number of filters
* @ssstatus: Status of the start/stop logic.
*/
struct etm_filters {
struct etm_filter etm_filter[ETM_ADDR_CMP_MAX];
unsigned int nr_filters;
bool ssstatus;
};
/**
* struct etm_event_data - Coresight specifics associated to an event
* @work: Handle to free allocated memory outside IRQ context.
* @mask: Hold the CPU(s) this event was set for.
* @aux_hwid_done: Whether a CPU has emitted the TraceID packet or not.
* @snk_config: The sink configuration.
* @cfg_hash: The hash id of any coresight config selected.
* @path: An array of path, each slot for one CPU.
*/
struct etm_event_data {
struct work_struct work;
cpumask_t mask;
cpumask_t aux_hwid_done;
void *snk_config;
u32 cfg_hash;
struct coresight_path * __percpu *path;
};
int etm_perf_symlink(struct coresight_device *csdev, bool link);
int etm_perf_add_symlink_sink(struct coresight_device *csdev);
void etm_perf_del_symlink_sink(struct coresight_device *csdev);
static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
{
struct etm_event_data *data = perf_get_aux(handle);
if (data)
return data->snk_config;
return NULL;
}
int etm_perf_add_symlink_cscfg(struct device *dev,
struct cscfg_config_desc *config_desc);
void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc);
int __init etm_perf_init(void);
void etm_perf_exit(void);
#endif