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115 Commits
Author SHA1 Message Date
Lijo LazarandAlex Deucher b2d5512471 drm/amdgpu: Move pcie lock to register block 
Move pcie register access lock to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2026-03-02 16:46:41 -05:00
Lijo LazarandAlex Deucher e84d7e717b drm/amdgpu: Add pcie indirect to register block 
Move pcie indirect access to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2026-03-02 16:46:28 -05:00
Lijo LazarandAlex Deucher 5d82f451b0 drm/amdgpu: Add pciep method to register block 
Move pcie port method to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2026-03-02 16:46:19 -05:00
Lijo LazarandAlex Deucher 4780a26a96 drm/amdgpu: Add didt method to register block 
Move didt callbacks to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2026-03-02 16:46:03 -05:00
Lijo LazarandAlex Deucher 366201e790 drm/amdgpu: Add uvd indirect to register block 
Add uvd indirect method to register access block and replace the
existing calls from adev.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2026-03-02 16:43:10 -05:00
Lijo LazarandAlex Deucher f4eb08f8b2 drm/amdgpu: Add smc method to register block 
Define register access block which consolidates different register access
methods. Add smc method to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2026-03-02 16:42:38 -05:00
Mario Limonciello (AMD)andAlex Deucher e291729873 drm/amd: Convert DRM_*() to drm_*() 
The drm_*() macros include the device which is helpful for debugging
issues in multi-GPU systems.

Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2026-01-05 16:59:55 -05:00
Lijo LazarandAlex Deucher 018fd6d7d9 drm/amdgpu: Make pre_asic_init optional 
pre_asic_init is not required for all SOCs. Make it optional and remove
empty implementations.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-12-08 13:56:42 -05:00
Timur KristófandAlex Deucher baefc7cdac drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000 
Sometimes the VCE PLL times out waiting for CTLACK/CTLACK2.
When it happens, the VCE still works, but much slower.
Observed on a Tahiti GPU, but not all:
- FirePro W9000 has the issue
- Radeon R9 280X not affected
- Radeon HD 7990 not affected

As a workaround, on the affected chip just don't put the
VCE PLL in sleep mode. Leaving the VCE PLL in bypass mode
or reset mode both work. Using bypass mode is simpler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-11-11 21:54:19 -05:00
Timur KristófandAlex Deucher eabc71661f drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUs 
Add the VCE1 IP block to the SI GPUs that have it.
Advertise the encoder capabilities corresponding to VCE1,
so the userspace applications can detect and use it.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Co-developed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-11-11 21:54:18 -05:00
Alexandre DemersandAlex Deucher 9cfb230210 drm/amdgpu: still cleanup sid.h 
The defines, shifts and masks are already available in dce_6_0_d.h,
dce_6_0_sh_mask.h.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-04-08 16:48:14 -04:00
Alexandre DemersandAlex Deucher d3cd9565c6 drm/amdgpu: move si.c away from sid.h 
Replace defines by the ones added earlier to GFX6, SMU6 and DCE6

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-04-07 15:18:59 -04:00
Alexandre DemersandAlex Deucher 14f15aa054 drm/amdgpu: move si_dma.c away from sid.h and si_enums.h 
Replace defines for the ones in oss_1_0_d.h and oss_1_0_sh_mask.h

Taking the opportunity to add some comments taken from cik_sdma.c

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-04-07 15:18:33 -04:00
Alexandre DemersandAlex Deucher de81b86e96 drm/amdgpu: wire up defines, shifts and masks through SI code 
To be able to remove as much duplicated defines, the different files
containing definitions, shifts and masks must be properly included.

Once done, the code will be migrated where needed to shifts and masks and
proper defines, before removing useless defines in the end.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-04-07 15:18:32 -04:00
Alexandre DemersandAlex Deucher 20fb56dfd8 drm/amdgpu: prepare DCE6 uniformisation with DCE8 and DCE10 
Let's begin the cleanup in sid.h to prevent warnings and errors when wiring
sid.h into dce_v6_0.c.

This is a bigger cleanup.
Many defines found under sid.h have already been properly moved
into the different "_d.h" and "_sh_mask.h", so they should have been
already removed from sid.h and properly linked in where needed.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-03-11 12:36:42 -04:00
Alexandre DemersandAlex Deucher 899634a57a drm/amdgpu: fix spelling typos in SI 
Fix typos

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-03-05 10:37:23 -05:00
Sunil KhatriandAlex Deucher 7dc3405403 drm/amdgpu: update the handle ptr in is_idle 
Update the *handle to amdgpu_ip_block ptr for all
functions pointers of is_idle.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-02-25 11:43:58 -05:00
Boyuan ZhangandAlex Deucher f2ba8c3d51 drm/amdgpu: pass ip_block in set_clockgating_state 
Pass ip_block instead of adev in set_clockgating_state() callback
functions. Modify set_clockgating_state()for all correspoding ip blocks.

v2: remove all changes for is_idle(), remove type casting

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-12-10 10:26:47 -05:00
Boyuan ZhangandAlex Deucher 80d8051124 drm/amdgpu: pass ip_block in set_powergating_state 
Pass ip_block instead of adev in set_powergating_state callback function.
Modify set_powergating_state ip functions for all correspoding ip blocks.

v2: fix a ip block index error.

v3: remove type casting

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-12-10 10:26:47 -05:00
Sunil KhatriandAlex Deucher 0016e87054 drm/amdgpu: Clean the functions pointer set as NULL 
We dont need to set the functions to NULL which arent
needed as global structure members are by default
set to zero or NULL for pointers.

Cc: Leo Liu <leo.liu@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-10-22 17:50:39 -04:00
Sunil KhatriandAlex Deucher 8231e3af96 drm/amdgpu: clean the dummy soft_reset functions 
Remove the dummy soft_reset functions for all
ip blocks.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-10-22 17:50:39 -04:00
Sunil KhatriandAlex Deucher f13c7da118 drm/amdgpu: clean the dummy wait_for_idle functions 
Remove the dummy wait_for_idle functions for all
ip blocks.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-10-22 17:50:39 -04:00
Sunil KhatriandAlex Deucher aa980de3b5 drm/amdgpu: clean the dummy suspend functions 
Remove the dummy suspend functions for all
ip blocks.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-10-22 17:50:39 -04:00
Sunil KhatriandAlex Deucher 5ebdb6fd60 drm/amdgpu: clean the dummy sw_fini functions 
Remove the dummy sw_fini functions for all
ip blocks.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-10-22 17:50:37 -04:00
Sunil KhatriandAlex Deucher 7fd12379bd drm/amdgpu: clean the dummy sw_init functions 
Remove the dummy sw_init functions for all
IP blocks.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-10-22 17:50:37 -04:00