mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
ARM: imx: Remove i.MX31 board files
i.MX31 has basic device tree support. To achieve the goal of converting all i.MX SoCs to a devicetree-only platform, remove imx31 board files. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
@@ -15,20 +15,11 @@ CONFIG_PERF_EVENTS=y
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# CONFIG_COMPAT_BRK is not set
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CONFIG_ARCH_MULTI_V6=y
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CONFIG_ARCH_MXC=y
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CONFIG_MACH_MX31LILLY=y
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CONFIG_MACH_MX31LITE=y
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CONFIG_MACH_PCM037=y
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CONFIG_MACH_PCM037_EET=y
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CONFIG_MACH_MX31_3DS=y
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CONFIG_MACH_MX31MOBOARD=y
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CONFIG_MACH_QONG=y
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CONFIG_MACH_ARMADILLO5X0=y
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CONFIG_MACH_KZM_ARM11_01=y
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CONFIG_MACH_IMX31_DT=y
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CONFIG_MACH_IMX35_DT=y
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CONFIG_MACH_PCM043=y
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CONFIG_MACH_MX35_3DS=y
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CONFIG_MACH_VPR200=y
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CONFIG_SOC_IMX31=y
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CONFIG_SOC_IMX50=y
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CONFIG_SOC_IMX51=y
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CONFIG_SOC_IMX53=y
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+5
-176
@@ -53,11 +53,6 @@ config IMX_HAVE_IOMUX_V1
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config ARCH_MXC_IOMUX_V3
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bool
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config SOC_IMX31
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bool
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select CPU_V6
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select MXC_AVIC
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config SOC_IMX35
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bool
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select ARCH_MXC_IOMUX_V3
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@@ -66,178 +61,12 @@ config SOC_IMX35
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if ARCH_MULTI_V6
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comment "MX31 platforms:"
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config MACH_MX31ADS
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bool "Support MX31ADS platforms"
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default y
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_SSI
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select IMX_HAVE_PLATFORM_IMX_UART
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select SOC_IMX31
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config SOC_IMX31
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bool "i.MX31 support"
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select CPU_V6
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select MXC_AVIC
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help
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Include support for MX31ADS platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_MX31ADS_WM1133_EV1
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bool "Support Wolfson Microelectronics 1133-EV1 module"
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depends on MACH_MX31ADS
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depends on MFD_WM8350_I2C
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depends on REGULATOR_WM8350 = y
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help
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Include support for the Wolfson Microelectronics 1133-EV1 PMU
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and audio module for the MX31ADS platform.
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config MACH_MX31LILLY
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bool "Support MX31 LILLY-1131 platforms (INCO startec)"
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_IPU_CORE
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_SPI_IMX
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX31
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help
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Include support for mx31 based LILLY1131 modules. This includes
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specific configurations for the board and its peripherals.
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config MACH_MX31LITE
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bool "Support MX31 LITEKIT (LogicPD)"
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select IMX_HAVE_PLATFORM_IMX2_WDT
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_MXC_NAND
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select IMX_HAVE_PLATFORM_MXC_RTC
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select IMX_HAVE_PLATFORM_SPI_IMX
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select LEDS_GPIO_REGISTER
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX31
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help
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Include support for MX31 LITEKIT platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_PCM037
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bool "Support Phytec pcm037 (i.MX31) platforms"
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select IMX_HAVE_PLATFORM_FSL_USB2_UDC
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select IMX_HAVE_PLATFORM_IMX2_WDT
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_IPU_CORE
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_MXC_NAND
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select IMX_HAVE_PLATFORM_MXC_W1
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX31
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help
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Include support for Phytec pcm037 platform. This includes
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specific configurations for the board and its peripherals.
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config MACH_PCM037_EET
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bool "Support pcm037 EET board extensions"
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depends on MACH_PCM037
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select IMX_HAVE_PLATFORM_GPIO_KEYS
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select IMX_HAVE_PLATFORM_SPI_IMX
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help
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Add support for PCM037 EET baseboard extensions. If you are using the
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OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel
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command-line parameter.
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config MACH_MX31_3DS
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bool "Support MX31PDK (3DS)"
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select IMX_HAVE_PLATFORM_FSL_USB2_UDC
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select IMX_HAVE_PLATFORM_IMX2_WDT
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_KEYPAD
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select IMX_HAVE_PLATFORM_IMX_SSI
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_IPU_CORE
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_MXC_NAND
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select IMX_HAVE_PLATFORM_SPI_IMX
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select MXC_DEBUG_BOARD
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX31
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help
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Include support for MX31PDK (3DS) platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_MX31_3DS_MXC_NAND_USE_BBT
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bool "Make the MXC NAND driver use the in flash Bad Block Table"
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depends on MACH_MX31_3DS
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depends on MTD_NAND_MXC
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help
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Enable this if you want that the MXC NAND driver uses the in flash
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Bad Block Table to know what blocks are bad instead of scanning the
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entire flash looking for bad block markers.
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config MACH_MX31MOBOARD
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bool "Support mx31moboard platforms (EPFL Mobots group)"
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select IMX_HAVE_PLATFORM_FSL_USB2_UDC
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select IMX_HAVE_PLATFORM_IMX2_WDT
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_SSI
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_IPU_CORE
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_SPI_IMX
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select LEDS_GPIO_REGISTER
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX31
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help
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Include support for mx31moboard platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_QONG
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bool "Support Dave/DENX QongEVB-LITE platform"
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select IMX_HAVE_PLATFORM_IMX2_WDT
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select IMX_HAVE_PLATFORM_IMX_UART
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select SOC_IMX31
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help
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Include support for Dave/DENX QongEVB-LITE platform. This includes
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specific configurations for the board and its peripherals.
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config MACH_ARMADILLO5X0
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bool "Support Atmark Armadillo-500 Development Base Board"
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select IMX_HAVE_PLATFORM_GPIO_KEYS
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_IPU_CORE
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_MXC_NAND
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX31
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help
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Include support for Atmark Armadillo-500 platform. This includes
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specific configurations for the board and its peripherals.
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config MACH_KZM_ARM11_01
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bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
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select IMX_HAVE_PLATFORM_IMX_UART
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select SOC_IMX31
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help
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Include support for KZM-ARM11-01. This includes specific
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configurations for the board and its peripherals.
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config MACH_BUG
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bool "Support Buglabs BUGBase platform"
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default y
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select IMX_HAVE_PLATFORM_IMX_UART
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select SOC_IMX31
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help
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Include support for BUGBase 1.3 platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_IMX31_DT
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bool "Support i.MX31 platforms from device tree"
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select SOC_IMX31
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help
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Include support for Freescale i.MX31 based platforms
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using the device tree for discovery.
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This enables support for Freescale i.MX31 processor
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comment "MX35 platforms:"
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@@ -6,7 +6,7 @@ obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o
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obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
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obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o
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obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o
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obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o mach-imx31.o
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obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o
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imx5-pm-$(CONFIG_PM) += pm-imx5.o
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@@ -35,21 +35,6 @@ obj-y += ssi-fiq.o
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obj-y += ssi-fiq-ksym.o
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endif
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# i.MX31 based machines
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obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
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obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
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obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
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obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
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obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
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obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
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obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
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mx31moboard-marxbot.o mx31moboard-smartbot.o
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obj-$(CONFIG_MACH_QONG) += mach-qong.o
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obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
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obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
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obj-$(CONFIG_MACH_BUG) += mach-bug.o
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obj-$(CONFIG_MACH_IMX31_DT) += imx31-dt.o
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# i.MX35 based machines
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obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
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obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
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File diff suppressed because it is too large
Load Diff
@@ -1,54 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2011 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <asm/mach/time.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include "common.h"
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#include "devices-imx31.h"
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#include "hardware.h"
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#include "iomux-mx3.h"
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static const struct imxuart_platform_data uart_pdata __initconst = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static const unsigned int bug_pins[] __initconst = {
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MX31_PIN_PC_RST__CTS5,
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MX31_PIN_PC_VS2__RTS5,
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MX31_PIN_PC_BVD2__TXD5,
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MX31_PIN_PC_BVD1__RXD5,
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};
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static void __init bug_board_init(void)
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{
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imx31_soc_init();
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mxc_iomux_setup_multiple_pins(bug_pins,
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ARRAY_SIZE(bug_pins), "uart-4");
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imx31_add_imx_uart4(&uart_pdata);
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}
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static void __init bug_timer_init(void)
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{
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mx31_clocks_init(26000000);
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}
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MACHINE_START(BUG, "BugLabs BUGBase")
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.map_io = mx31_map_io,
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.init_early = imx31_init_early,
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.init_irq = mx31_init_irq,
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.init_time = bug_timer_init,
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.init_machine = bug_board_init,
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.restart = mxc_restart,
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MACHINE_END
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@@ -1,291 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* KZM-ARM11-01 support
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* Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
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*
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* based on code for MX31ADS,
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/smsc911x.h>
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#include <linux/types.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <asm/memory.h>
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#include <asm/setup.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include "common.h"
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#include "devices-imx31.h"
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#include "hardware.h"
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#include "iomux-mx3.h"
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#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
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IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
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IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \
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MX31_IO_ADDRESS(x))
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/*
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* KZM-ARM11-01 Board Control Registers on FPGA
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*/
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#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
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#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
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#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
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#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
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#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
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#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
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#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
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#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
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/*
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* External UART for touch panel on FPGA
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*/
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#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
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#if IS_ENABLED(CONFIG_SERIAL_8250)
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/*
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* KZM-ARM11-01 has an external UART on FPGA
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*/
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
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.mapbase = KZM_ARM11_16550,
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/* irq number is run-time assigned */
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.irqflags = IRQ_TYPE_EDGE_RISING,
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.uartclk = 14745600,
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.regshift = 0,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
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UPF_BUGGY_UART,
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},
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{},
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};
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static struct resource serial8250_resources[] = {
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{
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.start = KZM_ARM11_16550,
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.end = KZM_ARM11_16550 + 0x10,
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.flags = IORESOURCE_MEM,
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},
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{
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/* irq number is run-time assigned */
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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.num_resources = ARRAY_SIZE(serial8250_resources),
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.resource = serial8250_resources,
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};
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static int __init kzm_init_ext_uart(void)
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{
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u8 tmp;
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/*
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* GPIO 1-1: external UART interrupt line
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*/
|
||||
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
|
||||
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
|
||||
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
|
||||
|
||||
/*
|
||||
* Unmask UART interrupt
|
||||
*/
|
||||
tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
|
||||
tmp |= 0x2;
|
||||
__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
|
||||
|
||||
serial_platform_data[0].irq =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
|
||||
serial8250_resources[1].start =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
|
||||
serial8250_resources[1].end =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
|
||||
|
||||
return platform_device_register(&serial_device);
|
||||
}
|
||||
#else
|
||||
static inline int kzm_init_ext_uart(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SMSC LAN9118
|
||||
*/
|
||||
#if IS_ENABLED(CONFIG_SMSC911X)
|
||||
static struct smsc911x_platform_config kzm_smsc9118_config = {
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
|
||||
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
|
||||
.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
|
||||
};
|
||||
|
||||
static struct resource kzm_smsc9118_resources[] = {
|
||||
{
|
||||
.start = MX31_CS5_BASE_ADDR,
|
||||
.end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* irq number is run-time assigned */
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device kzm_smsc9118_device = {
|
||||
.name = "smsc911x",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(kzm_smsc9118_resources),
|
||||
.resource = kzm_smsc9118_resources,
|
||||
.dev = {
|
||||
.platform_data = &kzm_smsc9118_config,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply dummy_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
|
||||
REGULATOR_SUPPLY("vddvario", "smsc911x"),
|
||||
};
|
||||
|
||||
static int __init kzm_init_smsc9118(void)
|
||||
{
|
||||
/*
|
||||
* GPIO 1-2: SMSC9118 interrupt line
|
||||
*/
|
||||
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
|
||||
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
|
||||
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
|
||||
|
||||
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
||||
|
||||
kzm_smsc9118_resources[1].start =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
|
||||
kzm_smsc9118_resources[1].end =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
|
||||
|
||||
return platform_device_register(&kzm_smsc9118_device);
|
||||
}
|
||||
#else
|
||||
static inline int kzm_init_smsc9118(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_SERIAL_IMX)
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
static void __init kzm_init_imx_uart(void)
|
||||
{
|
||||
imx31_add_imx_uart0(&uart_pdata);
|
||||
imx31_add_imx_uart1(&uart_pdata);
|
||||
}
|
||||
#else
|
||||
static inline void kzm_init_imx_uart(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static int kzm_pins[] __initdata = {
|
||||
MX31_PIN_CTS1__CTS1,
|
||||
MX31_PIN_RTS1__RTS1,
|
||||
MX31_PIN_TXD1__TXD1,
|
||||
MX31_PIN_RXD1__RXD1,
|
||||
MX31_PIN_DCD_DCE1__DCD_DCE1,
|
||||
MX31_PIN_RI_DCE1__RI_DCE1,
|
||||
MX31_PIN_DSR_DCE1__DSR_DCE1,
|
||||
MX31_PIN_DTR_DCE1__DTR_DCE1,
|
||||
MX31_PIN_CTS2__CTS2,
|
||||
MX31_PIN_RTS2__RTS2,
|
||||
MX31_PIN_TXD2__TXD2,
|
||||
MX31_PIN_RXD2__RXD2,
|
||||
MX31_PIN_DCD_DTE1__DCD_DTE2,
|
||||
MX31_PIN_RI_DTE1__RI_DTE2,
|
||||
MX31_PIN_DSR_DTE1__DSR_DTE2,
|
||||
MX31_PIN_DTR_DTE1__DTR_DTE2,
|
||||
};
|
||||
|
||||
/*
|
||||
* Board specific initialization.
|
||||
*/
|
||||
static void __init kzm_board_init(void)
|
||||
{
|
||||
imx31_soc_init();
|
||||
|
||||
mxc_iomux_setup_multiple_pins(kzm_pins,
|
||||
ARRAY_SIZE(kzm_pins), "kzm");
|
||||
kzm_init_imx_uart();
|
||||
|
||||
pr_info("Clock input source is 26MHz\n");
|
||||
}
|
||||
|
||||
static void __init kzm_late_init(void)
|
||||
{
|
||||
kzm_init_ext_uart();
|
||||
kzm_init_smsc9118();
|
||||
}
|
||||
|
||||
/*
|
||||
* This structure defines static mappings for the kzm-arm11-01 board.
|
||||
*/
|
||||
static struct map_desc kzm_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
|
||||
.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
|
||||
.length = MX31_CS4_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
{
|
||||
.virtual = (unsigned long)MX31_CS5_BASE_ADDR_VIRT,
|
||||
.pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
|
||||
.length = MX31_CS5_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Set up static virtual mappings.
|
||||
*/
|
||||
static void __init kzm_map_io(void)
|
||||
{
|
||||
mx31_map_io();
|
||||
iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
|
||||
}
|
||||
|
||||
static void __init kzm_timer_init(void)
|
||||
{
|
||||
mx31_clocks_init(26000000);
|
||||
}
|
||||
|
||||
MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
|
||||
.atag_offset = 0x100,
|
||||
.map_io = kzm_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
.init_time = kzm_timer_init,
|
||||
.init_machine = kzm_board_init,
|
||||
.init_late = kzm_late_init,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,312 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* LILLY-1131 module support
|
||||
*
|
||||
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
|
||||
*
|
||||
* based on code for other MX31 boards,
|
||||
*
|
||||
* Copyright 2005-2007 Freescale Semiconductor
|
||||
* Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
|
||||
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/mfd/mc13783.h>
|
||||
#include <linux/usb/otg.h>
|
||||
#include <linux/usb/ulpi.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "board-mx31lilly.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "ehci.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx3.h"
|
||||
#include "ulpi.h"
|
||||
|
||||
/*
|
||||
* This file contains module-specific initialization routines for LILLY-1131.
|
||||
* Initialization of peripherals found on the baseboard is implemented in the
|
||||
* appropriate baseboard support code.
|
||||
*/
|
||||
|
||||
static unsigned int mx31lilly_pins[] __initdata = {
|
||||
MX31_PIN_CTS1__CTS1,
|
||||
MX31_PIN_RTS1__RTS1,
|
||||
MX31_PIN_TXD1__TXD1,
|
||||
MX31_PIN_RXD1__RXD1,
|
||||
MX31_PIN_CTS2__CTS2,
|
||||
MX31_PIN_RTS2__RTS2,
|
||||
MX31_PIN_TXD2__TXD2,
|
||||
MX31_PIN_RXD2__RXD2,
|
||||
MX31_PIN_CSPI3_MOSI__RXD3,
|
||||
MX31_PIN_CSPI3_MISO__TXD3,
|
||||
MX31_PIN_CSPI3_SCLK__RTS3,
|
||||
MX31_PIN_CSPI3_SPI_RDY__CTS3,
|
||||
};
|
||||
|
||||
/* UART */
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
/* SMSC ethernet support */
|
||||
|
||||
static struct resource smsc91x_resources[] = {
|
||||
{
|
||||
.start = MX31_CS4_BASE_ADDR,
|
||||
.end = MX31_CS4_BASE_ADDR + 0xffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* irq number is run-time assigned */
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
|
||||
}
|
||||
};
|
||||
|
||||
static struct smsc911x_platform_config smsc911x_config = {
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
|
||||
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
|
||||
.flags = SMSC911X_USE_32BIT |
|
||||
SMSC911X_SAVE_MAC_ADDRESS |
|
||||
SMSC911X_FORCE_INTERNAL_PHY,
|
||||
};
|
||||
|
||||
static struct platform_device smsc91x_device = {
|
||||
.name = "smsc911x",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(smsc91x_resources),
|
||||
.resource = smsc91x_resources,
|
||||
.dev = {
|
||||
.platform_data = &smsc911x_config,
|
||||
}
|
||||
};
|
||||
|
||||
/* NOR flash */
|
||||
static struct physmap_flash_data nor_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource nor_flash_resource = {
|
||||
.start = 0xa0000000,
|
||||
.end = 0xa1ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device physmap_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &nor_flash_data,
|
||||
},
|
||||
.resource = &nor_flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
/* USB */
|
||||
|
||||
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
|
||||
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
|
||||
|
||||
static int usbh1_init(struct platform_device *pdev)
|
||||
{
|
||||
int pins[] = {
|
||||
MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
|
||||
MX31_PIN_CSPI1_MISO__USBH1_RXDP,
|
||||
MX31_PIN_CSPI1_SS0__USBH1_TXDM,
|
||||
MX31_PIN_CSPI1_SS1__USBH1_TXDP,
|
||||
MX31_PIN_CSPI1_SS2__USBH1_RCV,
|
||||
MX31_PIN_CSPI1_SCLK__USBH1_OEB,
|
||||
MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
|
||||
};
|
||||
|
||||
mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
|
||||
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
|
||||
|
||||
mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
|
||||
MXC_EHCI_INTERFACE_SINGLE_UNI);
|
||||
}
|
||||
|
||||
static int usbh2_init(struct platform_device *pdev)
|
||||
{
|
||||
int pins[] = {
|
||||
MX31_PIN_USBH2_DATA0__USBH2_DATA0,
|
||||
MX31_PIN_USBH2_DATA1__USBH2_DATA1,
|
||||
MX31_PIN_USBH2_CLK__USBH2_CLK,
|
||||
MX31_PIN_USBH2_DIR__USBH2_DIR,
|
||||
MX31_PIN_USBH2_NXT__USBH2_NXT,
|
||||
MX31_PIN_USBH2_STP__USBH2_STP,
|
||||
};
|
||||
|
||||
mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
|
||||
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
|
||||
|
||||
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
|
||||
|
||||
/* chip select */
|
||||
mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
|
||||
"USBH2_CS");
|
||||
gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
|
||||
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
|
||||
}
|
||||
|
||||
static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
|
||||
.init = usbh1_init,
|
||||
.portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
|
||||
};
|
||||
|
||||
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
|
||||
.init = usbh2_init,
|
||||
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
|
||||
};
|
||||
|
||||
static void __init lilly1131_usb_init(void)
|
||||
{
|
||||
imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
|
||||
|
||||
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
||||
ULPI_OTG_DRVVBUS_EXT);
|
||||
if (usbh2_pdata.otg)
|
||||
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
|
||||
}
|
||||
|
||||
static struct mc13xxx_platform_data mc13783_pdata __initdata = {
|
||||
.flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
|
||||
};
|
||||
|
||||
static struct spi_board_info mc13783_dev __initdata = {
|
||||
.modalias = "mc13783",
|
||||
.max_speed_hz = 1000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
.platform_data = &mc13783_pdata,
|
||||
/* irq number is run-time assigned */
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
&smsc91x_device,
|
||||
&physmap_flash_device,
|
||||
};
|
||||
|
||||
static int mx31lilly_baseboard;
|
||||
core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
|
||||
|
||||
static struct regulator_consumer_supply dummy_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
|
||||
REGULATOR_SUPPLY("vddvario", "smsc911x"),
|
||||
};
|
||||
|
||||
static void __init mx31lilly_board_init(void)
|
||||
{
|
||||
imx31_soc_init();
|
||||
|
||||
mxc_iomux_setup_multiple_pins(mx31lilly_pins,
|
||||
ARRAY_SIZE(mx31lilly_pins), "mx31lily");
|
||||
|
||||
imx31_add_imx_uart0(&uart_pdata);
|
||||
imx31_add_imx_uart1(&uart_pdata);
|
||||
imx31_add_imx_uart2(&uart_pdata);
|
||||
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
|
||||
|
||||
/* SPI */
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
|
||||
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
|
||||
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
|
||||
|
||||
imx31_add_spi_imx0(NULL);
|
||||
imx31_add_spi_imx1(NULL);
|
||||
|
||||
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
||||
}
|
||||
|
||||
static void __init mx31lilly_late_init(void)
|
||||
{
|
||||
if (mx31lilly_baseboard == MX31LILLY_DB)
|
||||
mx31lilly_db_init();
|
||||
|
||||
mc13783_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
|
||||
spi_register_board_info(&mc13783_dev, 1);
|
||||
|
||||
smsc91x_resources[1].start =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
|
||||
smsc91x_resources[1].end =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
||||
/* USB */
|
||||
lilly1131_usb_init();
|
||||
}
|
||||
|
||||
static void __init mx31lilly_timer_init(void)
|
||||
{
|
||||
mx31_clocks_init(26000000);
|
||||
}
|
||||
|
||||
MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
.init_time = mx31lilly_timer_init,
|
||||
.init_machine = mx31lilly_board_init,
|
||||
.init_late = mx31lilly_late_init,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
@@ -1,290 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2000 Deep Blue Solutions Ltd
|
||||
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
|
||||
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
* Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/memory.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/mfd/mc13783.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/usb/otg.h>
|
||||
#include <linux/usb/ulpi.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include "board-mx31lite.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "ehci.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx3.h"
|
||||
#include "ulpi.h"
|
||||
|
||||
/*
|
||||
* This file contains the module-specific initialization routines.
|
||||
*/
|
||||
|
||||
static unsigned int mx31lite_pins[] = {
|
||||
/* UART1 */
|
||||
MX31_PIN_CTS1__CTS1,
|
||||
MX31_PIN_RTS1__RTS1,
|
||||
MX31_PIN_TXD1__TXD1,
|
||||
MX31_PIN_RXD1__RXD1,
|
||||
/* SPI 0 */
|
||||
MX31_PIN_CSPI1_SCLK__SCLK,
|
||||
MX31_PIN_CSPI1_MOSI__MOSI,
|
||||
MX31_PIN_CSPI1_MISO__MISO,
|
||||
MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
|
||||
MX31_PIN_CSPI1_SS0__SS0,
|
||||
MX31_PIN_CSPI1_SS1__SS1,
|
||||
MX31_PIN_CSPI1_SS2__SS2,
|
||||
/* LAN9117 IRQ pin */
|
||||
IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
|
||||
/* SPI 1 */
|
||||
MX31_PIN_CSPI2_SCLK__SCLK,
|
||||
MX31_PIN_CSPI2_MOSI__MOSI,
|
||||
MX31_PIN_CSPI2_MISO__MISO,
|
||||
MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
|
||||
MX31_PIN_CSPI2_SS0__SS0,
|
||||
MX31_PIN_CSPI2_SS1__SS1,
|
||||
MX31_PIN_CSPI2_SS2__SS2,
|
||||
};
|
||||
|
||||
/* UART */
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
static const struct mxc_nand_platform_data
|
||||
mx31lite_nand_board_info __initconst = {
|
||||
.width = 1,
|
||||
.hw_ecc = 1,
|
||||
};
|
||||
|
||||
static struct smsc911x_platform_config smsc911x_config = {
|
||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
|
||||
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
|
||||
.flags = SMSC911X_USE_16BIT,
|
||||
};
|
||||
|
||||
static struct resource smsc911x_resources[] = {
|
||||
{
|
||||
.start = MX31_CS4_BASE_ADDR,
|
||||
.end = MX31_CS4_BASE_ADDR + 0x100,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
/* irq number is run-time assigned */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device smsc911x_device = {
|
||||
.name = "smsc911x",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(smsc911x_resources),
|
||||
.resource = smsc911x_resources,
|
||||
.dev = {
|
||||
.platform_data = &smsc911x_config,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mc13xxx_platform_data mc13783_pdata __initdata = {
|
||||
.flags = MC13XXX_USE_RTC,
|
||||
};
|
||||
|
||||
static struct spi_board_info mc13783_spi_dev __initdata = {
|
||||
.modalias = "mc13783",
|
||||
.max_speed_hz = 1000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
.platform_data = &mc13783_pdata,
|
||||
/* irq number is run-time assigned */
|
||||
};
|
||||
|
||||
/*
|
||||
* USB
|
||||
*/
|
||||
|
||||
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
|
||||
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
|
||||
|
||||
static int usbh2_init(struct platform_device *pdev)
|
||||
{
|
||||
int pins[] = {
|
||||
MX31_PIN_USBH2_DATA0__USBH2_DATA0,
|
||||
MX31_PIN_USBH2_DATA1__USBH2_DATA1,
|
||||
MX31_PIN_USBH2_CLK__USBH2_CLK,
|
||||
MX31_PIN_USBH2_DIR__USBH2_DIR,
|
||||
MX31_PIN_USBH2_NXT__USBH2_NXT,
|
||||
MX31_PIN_USBH2_STP__USBH2_STP,
|
||||
};
|
||||
|
||||
mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
|
||||
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
|
||||
|
||||
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
|
||||
|
||||
/* chip select */
|
||||
mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
|
||||
"USBH2_CS");
|
||||
gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
|
||||
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
|
||||
}
|
||||
|
||||
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
|
||||
.init = usbh2_init,
|
||||
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
|
||||
};
|
||||
|
||||
/*
|
||||
* NOR flash
|
||||
*/
|
||||
|
||||
static struct physmap_flash_data nor_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource nor_flash_resource = {
|
||||
.start = 0xa0000000,
|
||||
.end = 0xa1ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device physmap_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &nor_flash_data,
|
||||
},
|
||||
.resource = &nor_flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* This structure defines the MX31 memory map.
|
||||
*/
|
||||
static struct map_desc mx31lite_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
|
||||
.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
|
||||
.length = MX31_CS4_SIZE,
|
||||
.type = MT_DEVICE
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* Set up static virtual mappings.
|
||||
*/
|
||||
static void __init mx31lite_map_io(void)
|
||||
{
|
||||
mx31_map_io();
|
||||
iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
|
||||
}
|
||||
|
||||
static int mx31lite_baseboard;
|
||||
core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
|
||||
|
||||
static struct regulator_consumer_supply dummy_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
|
||||
REGULATOR_SUPPLY("vddvario", "smsc911x"),
|
||||
};
|
||||
|
||||
static void __init mx31lite_init(void)
|
||||
{
|
||||
imx31_soc_init();
|
||||
|
||||
mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
|
||||
"mx31lite");
|
||||
|
||||
imx31_add_imx_uart0(&uart_pdata);
|
||||
imx31_add_spi_imx0(NULL);
|
||||
|
||||
/* NOR and NAND flash */
|
||||
platform_device_register(&physmap_flash_device);
|
||||
imx31_add_mxc_nand(&mx31lite_nand_board_info);
|
||||
|
||||
imx31_add_spi_imx1(NULL);
|
||||
|
||||
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
||||
}
|
||||
|
||||
static void __init mx31lite_late(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (mx31lite_baseboard == MX31LITE_DB)
|
||||
mx31lite_db_init();
|
||||
|
||||
mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
|
||||
spi_register_board_info(&mc13783_spi_dev, 1);
|
||||
|
||||
/* USB */
|
||||
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
||||
ULPI_OTG_DRVVBUS_EXT);
|
||||
if (usbh2_pdata.otg)
|
||||
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
|
||||
|
||||
/* SMSC9117 IRQ pin */
|
||||
ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
|
||||
if (ret)
|
||||
pr_warn("could not get LAN irq gpio\n");
|
||||
else {
|
||||
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
|
||||
smsc911x_resources[1].start =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
|
||||
smsc911x_resources[1].end =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
|
||||
platform_device_register(&smsc911x_device);
|
||||
}
|
||||
}
|
||||
|
||||
static void __init mx31lite_timer_init(void)
|
||||
{
|
||||
mx31_clocks_init(26000000);
|
||||
}
|
||||
|
||||
MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
|
||||
/* Maintainer: Freescale Semiconductor, Inc. */
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31lite_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
.init_time = mx31lite_timer_init,
|
||||
.init_machine = mx31lite_init,
|
||||
.init_late = mx31lite_late,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,166 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (C) 2009
|
||||
* Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
|
||||
*/
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include "pcm037.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "iomux-mx3.h"
|
||||
|
||||
static unsigned int pcm037_eet_pins[] = {
|
||||
/* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
|
||||
IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_GPIO),
|
||||
/* GPIO keys */
|
||||
IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO), /* 0 */
|
||||
IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), /* 1 */
|
||||
IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO), /* 2 */
|
||||
IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), /* 3 */
|
||||
IOMUX_MODE(MX31_PIN_SVEN0, IOMUX_CONFIG_GPIO), /* 32 */
|
||||
IOMUX_MODE(MX31_PIN_STX0, IOMUX_CONFIG_GPIO), /* 33 */
|
||||
IOMUX_MODE(MX31_PIN_SRX0, IOMUX_CONFIG_GPIO), /* 34 */
|
||||
IOMUX_MODE(MX31_PIN_SIMPD0, IOMUX_CONFIG_GPIO), /* 35 */
|
||||
IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO), /* 38 */
|
||||
IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_GPIO), /* 39 */
|
||||
IOMUX_MODE(MX31_PIN_KEY_ROW4, IOMUX_CONFIG_GPIO), /* 50 */
|
||||
IOMUX_MODE(MX31_PIN_KEY_ROW5, IOMUX_CONFIG_GPIO), /* 51 */
|
||||
IOMUX_MODE(MX31_PIN_KEY_ROW6, IOMUX_CONFIG_GPIO), /* 52 */
|
||||
IOMUX_MODE(MX31_PIN_KEY_ROW7, IOMUX_CONFIG_GPIO), /* 53 */
|
||||
|
||||
/* LEDs */
|
||||
IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_CONFIG_GPIO), /* 44 */
|
||||
IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_GPIO), /* 45 */
|
||||
IOMUX_MODE(MX31_PIN_KEY_COL5, IOMUX_CONFIG_GPIO), /* 55 */
|
||||
IOMUX_MODE(MX31_PIN_KEY_COL6, IOMUX_CONFIG_GPIO), /* 56 */
|
||||
};
|
||||
|
||||
/* SPI */
|
||||
static struct spi_board_info pcm037_spi_dev[] = {
|
||||
{
|
||||
.modalias = "dac124s085",
|
||||
.max_speed_hz = 400000,
|
||||
.bus_num = 0,
|
||||
.chip_select = 1, /* Index in pcm037_spi1_cs[] */
|
||||
.mode = SPI_CPHA,
|
||||
},
|
||||
};
|
||||
|
||||
/* GPIO-keys input device */
|
||||
static struct gpio_keys_button pcm037_gpio_keys[] = {
|
||||
{
|
||||
.type = EV_KEY,
|
||||
.code = KEY_L,
|
||||
.gpio = 0,
|
||||
.desc = "Wheel Manual",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_A,
|
||||
.gpio = 1,
|
||||
.desc = "Wheel AF",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_V,
|
||||
.gpio = 2,
|
||||
.desc = "Wheel View",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_M,
|
||||
.gpio = 3,
|
||||
.desc = "Wheel Menu",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_UP,
|
||||
.gpio = 32,
|
||||
.desc = "Nav Pad Up",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_RIGHT,
|
||||
.gpio = 33,
|
||||
.desc = "Nav Pad Right",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_DOWN,
|
||||
.gpio = 34,
|
||||
.desc = "Nav Pad Down",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_LEFT,
|
||||
.gpio = 35,
|
||||
.desc = "Nav Pad Left",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_ENTER,
|
||||
.gpio = 38,
|
||||
.desc = "Nav Pad Ok",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = KEY_O,
|
||||
.gpio = 39,
|
||||
.desc = "Wheel Off",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = BTN_FORWARD,
|
||||
.gpio = 50,
|
||||
.desc = "Focus Forward",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = BTN_BACK,
|
||||
.gpio = 51,
|
||||
.desc = "Focus Backward",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = BTN_MIDDLE,
|
||||
.gpio = 52,
|
||||
.desc = "Release Half",
|
||||
.wakeup = 0,
|
||||
}, {
|
||||
.type = EV_KEY,
|
||||
.code = BTN_EXTRA,
|
||||
.gpio = 53,
|
||||
.desc = "Release Full",
|
||||
.wakeup = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct gpio_keys_platform_data
|
||||
pcm037_gpio_keys_platform_data __initconst = {
|
||||
.buttons = pcm037_gpio_keys,
|
||||
.nbuttons = ARRAY_SIZE(pcm037_gpio_keys),
|
||||
.rep = 0, /* No auto-repeat */
|
||||
};
|
||||
|
||||
int __init pcm037_eet_init_devices(void)
|
||||
{
|
||||
if (pcm037_variant() != PCM037_EET)
|
||||
return 0;
|
||||
|
||||
mxc_iomux_setup_multiple_pins(pcm037_eet_pins,
|
||||
ARRAY_SIZE(pcm037_eet_pins), "pcm037_eet");
|
||||
|
||||
/* SPI */
|
||||
spi_register_board_info(pcm037_spi_dev, ARRAY_SIZE(pcm037_spi_dev));
|
||||
imx31_add_spi_imx0(NULL);
|
||||
|
||||
imx_add_gpio_keys(&pcm037_gpio_keys_platform_data);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1,262 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/memory.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/mtd/platnand.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx3.h"
|
||||
|
||||
/* FPGA defines */
|
||||
#define QONG_FPGA_VERSION(major, minor, rev) \
|
||||
(((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
|
||||
|
||||
#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
|
||||
#define QONG_FPGA_PERIPH_SIZE (1 << 24)
|
||||
|
||||
#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
|
||||
#define QONG_FPGA_CTRL_SIZE 0x10
|
||||
/* FPGA control registers */
|
||||
#define QONG_FPGA_CTRL_VERSION 0x00
|
||||
|
||||
#define QONG_DNET_ID 1
|
||||
#define QONG_DNET_BASEADDR \
|
||||
(QONG_FPGA_BASEADDR + QONG_DNET_ID * QONG_FPGA_PERIPH_SIZE)
|
||||
#define QONG_DNET_SIZE 0x00001000
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
static int uart_pins[] = {
|
||||
MX31_PIN_CTS1__CTS1,
|
||||
MX31_PIN_RTS1__RTS1,
|
||||
MX31_PIN_TXD1__TXD1,
|
||||
MX31_PIN_RXD1__RXD1
|
||||
};
|
||||
|
||||
static inline void __init mxc_init_imx_uart(void)
|
||||
{
|
||||
mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins),
|
||||
"uart-0");
|
||||
imx31_add_imx_uart0(&uart_pdata);
|
||||
}
|
||||
|
||||
static struct resource dnet_resources[] = {
|
||||
{
|
||||
.name = "dnet-memory",
|
||||
.start = QONG_DNET_BASEADDR,
|
||||
.end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
/* irq number is run-time assigned */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device dnet_device = {
|
||||
.name = "dnet",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(dnet_resources),
|
||||
.resource = dnet_resources,
|
||||
};
|
||||
|
||||
static int __init qong_init_dnet(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
dnet_resources[1].start =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1));
|
||||
dnet_resources[1].end =
|
||||
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1));
|
||||
ret = platform_device_register(&dnet_device);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* MTD NOR flash */
|
||||
|
||||
static struct physmap_flash_data qong_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource qong_flash_resource = {
|
||||
.start = MX31_CS0_BASE_ADDR,
|
||||
.end = MX31_CS0_BASE_ADDR + SZ_128M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device qong_nor_mtd_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &qong_flash_data,
|
||||
},
|
||||
.resource = &qong_flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
static void qong_init_nor_mtd(void)
|
||||
{
|
||||
(void)platform_device_register(&qong_nor_mtd_device);
|
||||
}
|
||||
|
||||
/*
|
||||
* Hardware specific access to control-lines
|
||||
*/
|
||||
static void qong_nand_cmd_ctrl(struct nand_chip *nand_chip, int cmd,
|
||||
unsigned int ctrl)
|
||||
{
|
||||
if (cmd == NAND_CMD_NONE)
|
||||
return;
|
||||
|
||||
if (ctrl & NAND_CLE)
|
||||
writeb(cmd, nand_chip->legacy.IO_ADDR_W + (1 << 24));
|
||||
else
|
||||
writeb(cmd, nand_chip->legacy.IO_ADDR_W + (1 << 23));
|
||||
}
|
||||
|
||||
/*
|
||||
* Read the Device Ready pin.
|
||||
*/
|
||||
static int qong_nand_device_ready(struct nand_chip *chip)
|
||||
{
|
||||
return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_NFRB));
|
||||
}
|
||||
|
||||
static void qong_nand_select_chip(struct nand_chip *chip, int cs)
|
||||
{
|
||||
if (cs >= 0)
|
||||
gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0);
|
||||
else
|
||||
gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 1);
|
||||
}
|
||||
|
||||
static struct platform_nand_data qong_nand_data = {
|
||||
.chip = {
|
||||
.nr_chips = 1,
|
||||
.chip_delay = 20,
|
||||
.options = 0,
|
||||
},
|
||||
.ctrl = {
|
||||
.cmd_ctrl = qong_nand_cmd_ctrl,
|
||||
.dev_ready = qong_nand_device_ready,
|
||||
.select_chip = qong_nand_select_chip,
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource qong_nand_resource = {
|
||||
.start = MX31_CS3_BASE_ADDR,
|
||||
.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device qong_nand_device = {
|
||||
.name = "gen_nand",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &qong_nand_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &qong_nand_resource,
|
||||
};
|
||||
|
||||
static void __init qong_init_nand_mtd(void)
|
||||
{
|
||||
/* init CS */
|
||||
imx_writel(0x00004f00, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(3)));
|
||||
imx_writel(0x20013b31, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(3)));
|
||||
imx_writel(0x00020800, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(3)));
|
||||
|
||||
mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
|
||||
|
||||
/* enable pin */
|
||||
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFCE_B, IOMUX_CONFIG_GPIO));
|
||||
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), "nand_enable"))
|
||||
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0);
|
||||
|
||||
/* ready/busy pin */
|
||||
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFRB, IOMUX_CONFIG_GPIO));
|
||||
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFRB), "nand_rdy"))
|
||||
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFRB));
|
||||
|
||||
/* write protect pin */
|
||||
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFWP_B, IOMUX_CONFIG_GPIO));
|
||||
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFWP_B), "nand_wp"))
|
||||
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFWP_B));
|
||||
|
||||
platform_device_register(&qong_nand_device);
|
||||
}
|
||||
|
||||
static void __init qong_init_fpga(void)
|
||||
{
|
||||
void __iomem *regs;
|
||||
u32 fpga_ver;
|
||||
|
||||
regs = ioremap(QONG_FPGA_CTRL_BASEADDR, QONG_FPGA_CTRL_SIZE);
|
||||
if (!regs) {
|
||||
printk(KERN_ERR "%s: failed to map registers, aborting.\n",
|
||||
__func__);
|
||||
return;
|
||||
}
|
||||
|
||||
fpga_ver = readl(regs + QONG_FPGA_CTRL_VERSION);
|
||||
iounmap(regs);
|
||||
printk(KERN_INFO "Qong FPGA version %d.%d.%d\n",
|
||||
(fpga_ver & 0xF000) >> 12,
|
||||
(fpga_ver & 0x0F00) >> 8, fpga_ver & 0x00FF);
|
||||
if (fpga_ver < QONG_FPGA_VERSION(0, 8, 7)) {
|
||||
printk(KERN_ERR "qong: Unexpected FPGA version, FPGA-based "
|
||||
"devices won't be registered!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* register FPGA-based devices */
|
||||
qong_init_nand_mtd();
|
||||
qong_init_dnet();
|
||||
}
|
||||
|
||||
/*
|
||||
* Board specific initialization.
|
||||
*/
|
||||
static void __init qong_init(void)
|
||||
{
|
||||
imx31_soc_init();
|
||||
|
||||
mxc_init_imx_uart();
|
||||
qong_init_nor_mtd();
|
||||
imx31_add_imx2_wdt();
|
||||
}
|
||||
|
||||
static void __init qong_timer_init(void)
|
||||
{
|
||||
mx31_clocks_init(26000000);
|
||||
}
|
||||
|
||||
MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
|
||||
/* Maintainer: DENX Software Engineering GmbH */
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
.init_time = qong_timer_init,
|
||||
.init_machine = qong_init,
|
||||
.init_late = qong_init_fpga,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
@@ -1,182 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* LILLY-1131 development board support
|
||||
*
|
||||
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
|
||||
*
|
||||
* based on code for other MX31 boards,
|
||||
*
|
||||
* Copyright 2005-2007 Freescale Semiconductor
|
||||
* Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
|
||||
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "board-mx31lilly.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx3.h"
|
||||
|
||||
/*
|
||||
* This file contains board-specific initialization routines for the
|
||||
* LILLY-1131 development board. If you design an own baseboard for the
|
||||
* module, use this file as base for support code.
|
||||
*/
|
||||
|
||||
static unsigned int lilly_db_board_pins[] __initdata = {
|
||||
MX31_PIN_SD1_DATA3__SD1_DATA3,
|
||||
MX31_PIN_SD1_DATA2__SD1_DATA2,
|
||||
MX31_PIN_SD1_DATA1__SD1_DATA1,
|
||||
MX31_PIN_SD1_DATA0__SD1_DATA0,
|
||||
MX31_PIN_SD1_CLK__SD1_CLK,
|
||||
MX31_PIN_SD1_CMD__SD1_CMD,
|
||||
MX31_PIN_LD0__LD0,
|
||||
MX31_PIN_LD1__LD1,
|
||||
MX31_PIN_LD2__LD2,
|
||||
MX31_PIN_LD3__LD3,
|
||||
MX31_PIN_LD4__LD4,
|
||||
MX31_PIN_LD5__LD5,
|
||||
MX31_PIN_LD6__LD6,
|
||||
MX31_PIN_LD7__LD7,
|
||||
MX31_PIN_LD8__LD8,
|
||||
MX31_PIN_LD9__LD9,
|
||||
MX31_PIN_LD10__LD10,
|
||||
MX31_PIN_LD11__LD11,
|
||||
MX31_PIN_LD12__LD12,
|
||||
MX31_PIN_LD13__LD13,
|
||||
MX31_PIN_LD14__LD14,
|
||||
MX31_PIN_LD15__LD15,
|
||||
MX31_PIN_LD16__LD16,
|
||||
MX31_PIN_LD17__LD17,
|
||||
MX31_PIN_VSYNC3__VSYNC3,
|
||||
MX31_PIN_HSYNC__HSYNC,
|
||||
MX31_PIN_FPSHIFT__FPSHIFT,
|
||||
MX31_PIN_DRDY0__DRDY0,
|
||||
MX31_PIN_CONTRAST__CONTRAST,
|
||||
};
|
||||
|
||||
/* MMC support */
|
||||
|
||||
static int mxc_mmc1_get_ro(struct device *dev)
|
||||
{
|
||||
return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
|
||||
}
|
||||
|
||||
static int gpio_det, gpio_wp;
|
||||
|
||||
#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
|
||||
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
|
||||
|
||||
static int mxc_mmc1_init(struct device *dev,
|
||||
irq_handler_t detect_irq, void *data)
|
||||
{
|
||||
int ret;
|
||||
|
||||
gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
|
||||
gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);
|
||||
|
||||
mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
|
||||
|
||||
ret = gpio_request(gpio_det, "MMC detect");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = gpio_request(gpio_wp, "MMC w/p");
|
||||
if (ret)
|
||||
goto exit_free_det;
|
||||
|
||||
gpio_direction_input(gpio_det);
|
||||
gpio_direction_input(gpio_wp);
|
||||
|
||||
ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)),
|
||||
detect_irq, IRQF_TRIGGER_FALLING,
|
||||
"MMC detect", data);
|
||||
if (ret)
|
||||
goto exit_free_wp;
|
||||
|
||||
return 0;
|
||||
|
||||
exit_free_wp:
|
||||
gpio_free(gpio_wp);
|
||||
|
||||
exit_free_det:
|
||||
gpio_free(gpio_det);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void mxc_mmc1_exit(struct device *dev, void *data)
|
||||
{
|
||||
gpio_free(gpio_det);
|
||||
gpio_free(gpio_wp);
|
||||
free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)), data);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data mmc_pdata __initconst = {
|
||||
.get_ro = mxc_mmc1_get_ro,
|
||||
.init = mxc_mmc1_init,
|
||||
.exit = mxc_mmc1_exit,
|
||||
};
|
||||
|
||||
/* Framebuffer support */
|
||||
static const struct fb_videomode fb_modedb = {
|
||||
/* 640x480 TFT panel (IPS-056T) */
|
||||
.name = "CRT-VGA",
|
||||
.refresh = 64,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.pixclock = 30000,
|
||||
.left_margin = 200,
|
||||
.right_margin = 2,
|
||||
.upper_margin = 2,
|
||||
.lower_margin = 2,
|
||||
.hsync_len = 3,
|
||||
.vsync_len = 1,
|
||||
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
.flag = 0,
|
||||
};
|
||||
|
||||
static struct mx3fb_platform_data fb_pdata __initdata = {
|
||||
.name = "CRT-VGA",
|
||||
.mode = &fb_modedb,
|
||||
.num_modes = 1,
|
||||
};
|
||||
|
||||
#define LCD_VCC_EN_GPIO (7)
|
||||
|
||||
static void __init mx31lilly_init_fb(void)
|
||||
{
|
||||
if (gpio_request(LCD_VCC_EN_GPIO, "LCD enable") != 0) {
|
||||
printk(KERN_WARNING "unable to request LCD_VCC_EN pin.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
imx31_add_ipu_core();
|
||||
imx31_add_mx3_sdc_fb(&fb_pdata);
|
||||
gpio_direction_output(LCD_VCC_EN_GPIO, 1);
|
||||
}
|
||||
|
||||
void __init mx31lilly_db_init(void)
|
||||
{
|
||||
mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
|
||||
ARRAY_SIZE(lilly_db_board_pins),
|
||||
"development board pins");
|
||||
imx31_add_mxc_mmc(0, &mmc_pdata);
|
||||
mx31lilly_init_fb();
|
||||
}
|
||||
@@ -1,238 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
|
||||
*/
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <linux/usb/otg.h>
|
||||
|
||||
#include "board-mx31moboard.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "ehci.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx3.h"
|
||||
#include "ulpi.h"
|
||||
|
||||
static unsigned int devboard_pins[] = {
|
||||
/* UART1 */
|
||||
MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
|
||||
MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
|
||||
/* SDHC2 */
|
||||
MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
|
||||
MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
|
||||
MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
|
||||
MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
|
||||
/* USB H1 */
|
||||
MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
|
||||
MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
|
||||
MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
|
||||
MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
|
||||
MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
|
||||
/* SEL */
|
||||
MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
|
||||
MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
|
||||
};
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
|
||||
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
|
||||
|
||||
static int devboard_sdhc2_get_ro(struct device *dev)
|
||||
{
|
||||
return !gpio_get_value(SDHC2_WP);
|
||||
}
|
||||
|
||||
static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
|
||||
void *data)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(SDHC2_CD, "sdhc-detect");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
gpio_direction_input(SDHC2_CD);
|
||||
|
||||
ret = gpio_request(SDHC2_WP, "sdhc-wp");
|
||||
if (ret)
|
||||
goto err_gpio_free;
|
||||
gpio_direction_input(SDHC2_WP);
|
||||
|
||||
ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
|
||||
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
|
||||
"sdhc2-card-detect", data);
|
||||
if (ret)
|
||||
goto err_gpio_free_2;
|
||||
|
||||
return 0;
|
||||
|
||||
err_gpio_free_2:
|
||||
gpio_free(SDHC2_WP);
|
||||
err_gpio_free:
|
||||
gpio_free(SDHC2_CD);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void devboard_sdhc2_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(gpio_to_irq(SDHC2_CD), data);
|
||||
gpio_free(SDHC2_WP);
|
||||
gpio_free(SDHC2_CD);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
|
||||
.get_ro = devboard_sdhc2_get_ro,
|
||||
.init = devboard_sdhc2_init,
|
||||
.exit = devboard_sdhc2_exit,
|
||||
};
|
||||
|
||||
#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
|
||||
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
|
||||
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
|
||||
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
|
||||
|
||||
static void devboard_init_sel_gpios(void)
|
||||
{
|
||||
if (!gpio_request(SEL0, "sel0")) {
|
||||
gpio_direction_input(SEL0);
|
||||
gpio_export(SEL0, true);
|
||||
}
|
||||
|
||||
if (!gpio_request(SEL1, "sel1")) {
|
||||
gpio_direction_input(SEL1);
|
||||
gpio_export(SEL1, true);
|
||||
}
|
||||
|
||||
if (!gpio_request(SEL2, "sel2")) {
|
||||
gpio_direction_input(SEL2);
|
||||
gpio_export(SEL2, true);
|
||||
}
|
||||
|
||||
if (!gpio_request(SEL3, "sel3")) {
|
||||
gpio_direction_input(SEL3);
|
||||
gpio_export(SEL3, true);
|
||||
}
|
||||
}
|
||||
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
|
||||
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
|
||||
|
||||
static int devboard_usbh1_hw_init(struct platform_device *pdev)
|
||||
{
|
||||
mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
|
||||
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
|
||||
MXC_EHCI_INTERFACE_SINGLE_UNI);
|
||||
}
|
||||
|
||||
#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
|
||||
#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
|
||||
|
||||
static int devboard_isp1105_init(struct usb_phy *otg)
|
||||
{
|
||||
int ret = gpio_request(USBH1_MODE, "usbh1-mode");
|
||||
if (ret)
|
||||
return ret;
|
||||
/* single ended */
|
||||
gpio_direction_output(USBH1_MODE, 0);
|
||||
|
||||
ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
|
||||
if (ret) {
|
||||
gpio_free(USBH1_MODE);
|
||||
return ret;
|
||||
}
|
||||
gpio_direction_output(USBH1_VBUSEN_B, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
|
||||
{
|
||||
if (on)
|
||||
gpio_set_value(USBH1_VBUSEN_B, 0);
|
||||
else
|
||||
gpio_set_value(USBH1_VBUSEN_B, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
|
||||
.init = devboard_usbh1_hw_init,
|
||||
.portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
|
||||
};
|
||||
|
||||
static int __init devboard_usbh1_init(void)
|
||||
{
|
||||
struct usb_phy *phy;
|
||||
struct platform_device *pdev;
|
||||
|
||||
phy = kzalloc(sizeof(*phy), GFP_KERNEL);
|
||||
if (!phy)
|
||||
return -ENOMEM;
|
||||
|
||||
phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
|
||||
if (!phy->otg) {
|
||||
kfree(phy);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
phy->label = "ISP1105";
|
||||
phy->init = devboard_isp1105_init;
|
||||
phy->otg->set_vbus = devboard_isp1105_set_vbus;
|
||||
|
||||
usbh1_pdata.otg = phy;
|
||||
|
||||
pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
|
||||
|
||||
return PTR_ERR_OR_ZERO(pdev);
|
||||
}
|
||||
|
||||
|
||||
static const struct fsl_usb2_platform_data usb_pdata __initconst = {
|
||||
.operating_mode = FSL_USB2_DR_DEVICE,
|
||||
.phy_mode = FSL_USB2_PHY_ULPI,
|
||||
};
|
||||
|
||||
/*
|
||||
* system init for baseboard usage. Will be called by mx31moboard init.
|
||||
*/
|
||||
void __init mx31moboard_devboard_init(void)
|
||||
{
|
||||
printk(KERN_INFO "Initializing mx31devboard peripherals\n");
|
||||
|
||||
mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
|
||||
"devboard");
|
||||
|
||||
imx31_add_imx_uart1(&uart_pdata);
|
||||
|
||||
imx31_add_mxc_mmc(1, &sdhc2_pdata);
|
||||
|
||||
devboard_init_sel_gpios();
|
||||
|
||||
imx31_add_fsl_usb2_udc(&usb_pdata);
|
||||
|
||||
devboard_usbh1_init();
|
||||
}
|
||||
@@ -1,270 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <linux/usb/otg.h>
|
||||
|
||||
#include "board-mx31moboard.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "ehci.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx3.h"
|
||||
#include "ulpi.h"
|
||||
|
||||
static unsigned int marxbot_pins[] = {
|
||||
/* SDHC2 */
|
||||
MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
|
||||
MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
|
||||
MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
|
||||
MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
|
||||
/* dsPIC resets */
|
||||
MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22,
|
||||
/*battery detection */
|
||||
MX31_PIN_LCS0__GPIO3_23,
|
||||
/* USB H1 */
|
||||
MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
|
||||
MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
|
||||
MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
|
||||
MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
|
||||
MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
|
||||
/* SEL */
|
||||
MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
|
||||
MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
|
||||
};
|
||||
|
||||
#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
|
||||
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
|
||||
|
||||
static int marxbot_sdhc2_get_ro(struct device *dev)
|
||||
{
|
||||
return !gpio_get_value(SDHC2_WP);
|
||||
}
|
||||
|
||||
static int marxbot_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
|
||||
void *data)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(SDHC2_CD, "sdhc-detect");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
gpio_direction_input(SDHC2_CD);
|
||||
|
||||
ret = gpio_request(SDHC2_WP, "sdhc-wp");
|
||||
if (ret)
|
||||
goto err_gpio_free;
|
||||
gpio_direction_input(SDHC2_WP);
|
||||
|
||||
ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
|
||||
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
|
||||
"sdhc2-card-detect", data);
|
||||
if (ret)
|
||||
goto err_gpio_free_2;
|
||||
|
||||
return 0;
|
||||
|
||||
err_gpio_free_2:
|
||||
gpio_free(SDHC2_WP);
|
||||
err_gpio_free:
|
||||
gpio_free(SDHC2_CD);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void marxbot_sdhc2_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(gpio_to_irq(SDHC2_CD), data);
|
||||
gpio_free(SDHC2_WP);
|
||||
gpio_free(SDHC2_CD);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
|
||||
.get_ro = marxbot_sdhc2_get_ro,
|
||||
.init = marxbot_sdhc2_init,
|
||||
.exit = marxbot_sdhc2_exit,
|
||||
};
|
||||
|
||||
#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_STXD5)
|
||||
#define DSPICS_RST_B IOMUX_TO_GPIO(MX31_PIN_SRXD5)
|
||||
|
||||
static void dspics_resets_init(void)
|
||||
{
|
||||
if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
|
||||
gpio_direction_output(TRSLAT_RST_B, 0);
|
||||
gpio_export(TRSLAT_RST_B, false);
|
||||
}
|
||||
|
||||
if (!gpio_request(DSPICS_RST_B, "dspics-rst")) {
|
||||
gpio_direction_output(DSPICS_RST_B, 0);
|
||||
gpio_export(DSPICS_RST_B, false);
|
||||
}
|
||||
}
|
||||
|
||||
static struct spi_board_info marxbot_spi_board_info[] __initdata = {
|
||||
{
|
||||
.modalias = "spidev",
|
||||
.max_speed_hz = 300000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 1, /* according spi1_cs[] ! */
|
||||
},
|
||||
};
|
||||
|
||||
#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
|
||||
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
|
||||
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
|
||||
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
|
||||
|
||||
static void marxbot_init_sel_gpios(void)
|
||||
{
|
||||
if (!gpio_request(SEL0, "sel0")) {
|
||||
gpio_direction_input(SEL0);
|
||||
gpio_export(SEL0, true);
|
||||
}
|
||||
|
||||
if (!gpio_request(SEL1, "sel1")) {
|
||||
gpio_direction_input(SEL1);
|
||||
gpio_export(SEL1, true);
|
||||
}
|
||||
|
||||
if (!gpio_request(SEL2, "sel2")) {
|
||||
gpio_direction_input(SEL2);
|
||||
gpio_export(SEL2, true);
|
||||
}
|
||||
|
||||
if (!gpio_request(SEL3, "sel3")) {
|
||||
gpio_direction_input(SEL3);
|
||||
gpio_export(SEL3, true);
|
||||
}
|
||||
}
|
||||
|
||||
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
|
||||
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
|
||||
|
||||
static int marxbot_usbh1_hw_init(struct platform_device *pdev)
|
||||
{
|
||||
mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
|
||||
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
|
||||
mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
|
||||
MXC_EHCI_INTERFACE_SINGLE_UNI);
|
||||
}
|
||||
|
||||
#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
|
||||
#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
|
||||
|
||||
static int marxbot_isp1105_init(struct usb_phy *otg)
|
||||
{
|
||||
int ret = gpio_request(USBH1_MODE, "usbh1-mode");
|
||||
if (ret)
|
||||
return ret;
|
||||
/* single ended */
|
||||
gpio_direction_output(USBH1_MODE, 0);
|
||||
|
||||
ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
|
||||
if (ret) {
|
||||
gpio_free(USBH1_MODE);
|
||||
return ret;
|
||||
}
|
||||
gpio_direction_output(USBH1_VBUSEN_B, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int marxbot_isp1105_set_vbus(struct usb_otg *otg, bool on)
|
||||
{
|
||||
if (on)
|
||||
gpio_set_value(USBH1_VBUSEN_B, 0);
|
||||
else
|
||||
gpio_set_value(USBH1_VBUSEN_B, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
|
||||
.init = marxbot_usbh1_hw_init,
|
||||
.portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
|
||||
};
|
||||
|
||||
static int __init marxbot_usbh1_init(void)
|
||||
{
|
||||
struct usb_phy *phy;
|
||||
struct platform_device *pdev;
|
||||
|
||||
phy = kzalloc(sizeof(*phy), GFP_KERNEL);
|
||||
if (!phy)
|
||||
return -ENOMEM;
|
||||
|
||||
phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
|
||||
if (!phy->otg) {
|
||||
kfree(phy);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
phy->label = "ISP1105";
|
||||
phy->init = marxbot_isp1105_init;
|
||||
phy->otg->set_vbus = marxbot_isp1105_set_vbus;
|
||||
|
||||
usbh1_pdata.otg = phy;
|
||||
|
||||
pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
|
||||
|
||||
return PTR_ERR_OR_ZERO(pdev);
|
||||
}
|
||||
|
||||
static const struct fsl_usb2_platform_data usb_pdata __initconst = {
|
||||
.operating_mode = FSL_USB2_DR_DEVICE,
|
||||
.phy_mode = FSL_USB2_PHY_ULPI,
|
||||
};
|
||||
|
||||
/*
|
||||
* system init for baseboard usage. Will be called by mx31moboard init.
|
||||
*/
|
||||
void __init mx31moboard_marxbot_init(void)
|
||||
{
|
||||
printk(KERN_INFO "Initializing mx31marxbot peripherals\n");
|
||||
|
||||
mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
|
||||
"marxbot");
|
||||
|
||||
marxbot_init_sel_gpios();
|
||||
|
||||
dspics_resets_init();
|
||||
|
||||
imx31_add_mxc_mmc(1, &sdhc2_pdata);
|
||||
|
||||
spi_register_board_info(marxbot_spi_board_info,
|
||||
ARRAY_SIZE(marxbot_spi_board_info));
|
||||
|
||||
/* battery present pin */
|
||||
gpio_request(IOMUX_TO_GPIO(MX31_PIN_LCS0), "bat-present");
|
||||
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0));
|
||||
gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false);
|
||||
|
||||
imx31_add_fsl_usb2_udc(&usb_pdata);
|
||||
|
||||
marxbot_usbh1_init();
|
||||
}
|
||||
@@ -1,124 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <linux/usb/otg.h>
|
||||
#include <linux/usb/ulpi.h>
|
||||
|
||||
#include "board-mx31moboard.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx31.h"
|
||||
#include "ehci.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx3.h"
|
||||
#include "ulpi.h"
|
||||
|
||||
static unsigned int smartbot_pins[] = {
|
||||
/* UART1 */
|
||||
MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
|
||||
MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
|
||||
/* ENABLES */
|
||||
MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
|
||||
MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
|
||||
};
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
static const struct fsl_usb2_platform_data usb_pdata __initconst = {
|
||||
.operating_mode = FSL_USB2_DR_DEVICE,
|
||||
.phy_mode = FSL_USB2_PHY_ULPI,
|
||||
};
|
||||
|
||||
#if defined(CONFIG_USB_ULPI)
|
||||
|
||||
static int smartbot_otg_init(struct platform_device *pdev)
|
||||
{
|
||||
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
|
||||
}
|
||||
|
||||
static struct mxc_usbh_platform_data otg_host_pdata __initdata = {
|
||||
.init = smartbot_otg_init,
|
||||
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
|
||||
};
|
||||
|
||||
static int __init smartbot_otg_host_init(void)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
|
||||
otg_host_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
||||
ULPI_OTG_DRVVBUS_EXT);
|
||||
if (!otg_host_pdata.otg)
|
||||
return -ENODEV;
|
||||
|
||||
pdev = imx31_add_mxc_ehci_otg(&otg_host_pdata);
|
||||
|
||||
return PTR_ERR_OR_ZERO(pdev);
|
||||
}
|
||||
#else
|
||||
static inline int smartbot_otg_host_init(void) { return 0; }
|
||||
#endif
|
||||
|
||||
#define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
|
||||
#define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
|
||||
#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
|
||||
#define TRSLAT_SRC_CHOICE IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
|
||||
|
||||
static void smartbot_resets_init(void)
|
||||
{
|
||||
if (!gpio_request(POWER_EN, "power-enable")) {
|
||||
gpio_direction_output(POWER_EN, 0);
|
||||
gpio_export(POWER_EN, false);
|
||||
}
|
||||
|
||||
if (!gpio_request(DSPIC_RST_B, "dspic-rst")) {
|
||||
gpio_direction_output(DSPIC_RST_B, 0);
|
||||
gpio_export(DSPIC_RST_B, false);
|
||||
}
|
||||
|
||||
if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
|
||||
gpio_direction_output(TRSLAT_RST_B, 0);
|
||||
gpio_export(TRSLAT_RST_B, false);
|
||||
}
|
||||
|
||||
if (!gpio_request(TRSLAT_SRC_CHOICE, "translator-src-choice")) {
|
||||
gpio_direction_output(TRSLAT_SRC_CHOICE, 0);
|
||||
gpio_export(TRSLAT_SRC_CHOICE, false);
|
||||
}
|
||||
}
|
||||
/*
|
||||
* system init for baseboard usage. Will be called by mx31moboard init.
|
||||
*/
|
||||
void __init mx31moboard_smartbot_init(int board)
|
||||
{
|
||||
printk(KERN_INFO "Initializing mx31smartbot peripherals\n");
|
||||
|
||||
mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins),
|
||||
"smartbot");
|
||||
|
||||
imx31_add_imx_uart1(&uart_pdata);
|
||||
|
||||
switch (board) {
|
||||
case MX31SMARTBOT:
|
||||
imx31_add_fsl_usb2_udc(&usb_pdata);
|
||||
break;
|
||||
case MX31EYEBOT:
|
||||
smartbot_otg_host_init();
|
||||
break;
|
||||
default:
|
||||
printk(KERN_WARNING "Unknown board %d, USB OTG not initialized",
|
||||
board);
|
||||
}
|
||||
|
||||
smartbot_resets_init();
|
||||
}
|
||||
Reference in New Issue
Block a user