From 684339e80a9392cf8d331479d0942682ba0bb5ac Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 1 Aug 2025 15:07:27 -0500 Subject: [PATCH 01/81] dt-bindings: PCI: Add missing "#address-cells" to interrupt controllers An interrupt-controller node which is the parent provider for "interrupt-map" needs an "#address-cells" property. This fixes "interrupt_map" warnings in new dtc. Acked-by: Bjorn Helgaas Link: https://lore.kernel.org/r/20250801200728.3252036-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml | 1 + .../devicetree/bindings/pci/marvell,armada-3700-pcie.yaml | 4 ++++ .../devicetree/bindings/pci/marvell,kirkwood-pcie.yaml | 3 +++ .../devicetree/bindings/pci/socionext,uniphier-pcie.yaml | 4 ++++ Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml | 3 +++ 5 files changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml index 5434c144d2ec..18e7981241b5 100644 --- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml @@ -108,6 +108,7 @@ examples: #include gic: interrupt-controller { + #address-cells = <0>; interrupt-controller; #interrupt-cells = <3>; }; diff --git a/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml b/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml index 68090b3ca419..8403c79634ed 100644 --- a/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml @@ -42,6 +42,9 @@ properties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': @@ -92,6 +95,7 @@ examples: reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; pcie_intc: interrupt-controller { + #address-cells = <0>; interrupt-controller; #interrupt-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml b/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml index 7be695320ddf..3d68bfbe6feb 100644 --- a/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml @@ -101,6 +101,9 @@ patternProperties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml index 638b99db0433..c07b0ed51613 100644 --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml @@ -56,6 +56,9 @@ properties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': @@ -109,6 +112,7 @@ examples: <0 0 0 4 &pcie_intc 3>; pcie_intc: interrupt-controller { + #address-cells = <0>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&gic>; diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 69b499c96c71..c704099f134b 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -99,6 +99,9 @@ properties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': From c072d2b49507420edd57ba3d87690ab81ef5273a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 25 Jul 2025 15:06:26 -0500 Subject: [PATCH 02/81] scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c This adds the following commits from upstream: 52f07dcca47c dtc: Add informative error for stray identifier 9cabae6b0351 checks: Fix detection of 'i2c-bus' node 605dc044c3fe New helper to add markers 7da5d106c740 fdtput: Fix documentation about existing nodes 53c63dd421d7 dtdiff: Use input format dtb for dtbo files 84d9dd2fcbc8 dtc: Add data_insert_data function 97011d1f4e98 meson: use override_find_program/override_dependency b841391bbd08 srcpos: Define srcpos_free e0b7749c26a9 Add alloc_marker ecb21febfdd3 meson: port python bindings to build natively via meson and meson-python 7ebfcac8520e Makefile: deprecate in favor of Meson f4c53f4ebf78 Use __ASSEMBLER__ instead of __ASSEMBLY__ 205fbef17b7b Fix some typos da85f91931e5 Remove duplicated words in documentation and comments dd1b3e532d22 meson: support building libfdt without static library 1ccd232709d4 meson: don't build test programs by default ce1d8588880a tests: When building .so from -O asm output mark as non-executable stack 915daadbb62d Start with empty __local_fixups__ and __fixups__ nodes 4ea851f5a44d Let get_subnode() not return deleted nodes 175d2a564c47 Use build_root_node() instead of open-coding it 18f4f305fdd7 build: fix -Dtools=false build 267efc7d4694 checks: Warn about missing #address-cells for interrupt parents 755db115355b libfdt: Add fdt_setprop_namelen_string() bdca8612009e libfdt: Add fdt_setprop_namelen() 0f69cedc08fc libfdt_internal: fdt_find_string_len_() 56b2b30c5bd0 libfdt: add fdt_get_property_namelen_w() 1e8c5f60e127 Add clang-format config 6f183c7d9246 checks: Relax avoid_unnecessary_addr_size check to allow child ranges properties 66c7d0e6f4f3 tests/sw_tree1.c: fix unitialized saveptr 9a969f3b70b0 pylibfdt/libfdt.i: fix backwards compatibility of return values 4292b072a23a .github/workflows: update ubuntu runner to supported version 1c745a9bd169 libfdt: Remove fdt parameter from overlay_fixup_one_phandle b3bbee6b1242 libfdt: Move the SBOM authors section d1656730abfb Add a SBOM file in CycloneDX format b75515af4576 libfdt: Remove extra semi-colons outside functions 2d10aa2afe35 Bump version to v1.7.2 48795c82bdb6 pylibfdt: Don't emit warnings from swig generate C code 838f11e830e3 fdtoverlay: provide better error message for missing `/__symbols__` d1e2384185c5 pylibfdt/libfdt.i: Use SWIG_AppendOutput 18aa49a9f68d Escape spaces in depfile with backslashes. f9968fa06921 libfdt.h: whitespace consistency fixups 9b5f65fb3d8d libfdt.h: typo and consistency fixes 99031e3a4a6e Bump version to v1.7.1 3d5e376925fd setup: Move setting of srcdir down to the bottom e277553b9880 setup: Collect top-level code together 7e5a88984081 setup: Move version and full_description into a function 78b6a85c113b Tidy up some pylint warnings 3501d373f0a2 Require Python 3 The added include of string.h in libfdt_internal.h breaks the kernel overriding libfdt_env.h with its own string functions, so it is dropped. An upstream fix is pending. Signed-off-by: Rob Herring (Arm) --- scripts/Makefile.dtbs | 1 + scripts/dtc/checks.c | 23 ++-- scripts/dtc/data.c | 47 ++++++- scripts/dtc/dtc-lexer.l | 15 +++ scripts/dtc/dtc.c | 6 +- scripts/dtc/dtc.h | 5 +- scripts/dtc/fdtoverlay.c | 8 ++ scripts/dtc/flattree.c | 2 +- scripts/dtc/libfdt/fdt.c | 8 +- scripts/dtc/libfdt/fdt.h | 4 +- scripts/dtc/libfdt/fdt_overlay.c | 8 +- scripts/dtc/libfdt/fdt_rw.c | 41 +++--- scripts/dtc/libfdt/libfdt.h | 181 +++++++++++++++++++++------ scripts/dtc/libfdt/libfdt_internal.h | 14 ++- scripts/dtc/livetree.c | 25 ++-- scripts/dtc/srcpos.c | 17 ++- scripts/dtc/srcpos.h | 1 + scripts/dtc/treesource.c | 52 +++++--- scripts/dtc/util.c | 16 +++ scripts/dtc/util.h | 5 + scripts/dtc/version_gen.h | 2 +- 21 files changed, 373 insertions(+), 108 deletions(-) diff --git a/scripts/Makefile.dtbs b/scripts/Makefile.dtbs index 8d56c0815f33..2d321b813600 100644 --- a/scripts/Makefile.dtbs +++ b/scripts/Makefile.dtbs @@ -97,6 +97,7 @@ DTC_FLAGS += -Wno-unit_address_vs_reg \ -Wno-avoid_unnecessary_addr_size \ -Wno-alias_paths \ -Wno-graph_child_address \ + -Wno-interrupt_map \ -Wno-simple_bus_reg else DTC_FLAGS += -Wunique_unit_address_if_enabled diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c index 6e06aeab5503..7e3fed5005b3 100644 --- a/scripts/dtc/checks.c +++ b/scripts/dtc/checks.c @@ -1024,7 +1024,7 @@ static void check_i2c_bus_bridge(struct check *c, struct dt_info *dti, struct no } else if (strprefixeq(node->name, node->basenamelen, "i2c")) { struct node *child; for_each_child(node, child) { - if (strprefixeq(child->name, node->basenamelen, "i2c-bus")) + if (strprefixeq(child->name, child->basenamelen, "i2c-bus")) return; } node->bus = &i2c_bus; @@ -1217,9 +1217,7 @@ WARNING(avoid_default_addr_size, check_avoid_default_addr_size, NULL, static void check_avoid_unnecessary_addr_size(struct check *c, struct dt_info *dti, struct node *node) { - struct property *prop; struct node *child; - bool has_reg = false; if (!node->parent || node->addr_cells < 0 || node->size_cells < 0) return; @@ -1228,13 +1226,18 @@ static void check_avoid_unnecessary_addr_size(struct check *c, struct dt_info *d return; for_each_child(node, child) { - prop = get_property(child, "reg"); - if (prop) - has_reg = true; + /* + * Even if the child devices' address space is not mapped into + * the parent bus (no 'ranges' property on node), children can + * still have registers on a local bus, or map local addresses + * to another subordinate address space. The properties on the + * child nodes then make #address-cells/#size-cells necessary: + */ + if (get_property(child, "reg") || get_property(child, "ranges")) + return; } - if (!has_reg) - FAIL(c, dti, node, "unnecessary #address-cells/#size-cells without \"ranges\", \"dma-ranges\" or child \"reg\" property"); + FAIL(c, dti, node, "unnecessary #address-cells/#size-cells without \"ranges\", \"dma-ranges\" or child \"reg\" or \"ranges\" property"); } WARNING(avoid_unnecessary_addr_size, check_avoid_unnecessary_addr_size, NULL, &avoid_default_addr_size); @@ -1673,6 +1676,10 @@ static void check_interrupt_map(struct check *c, cellprop = get_property(provider_node, "#address-cells"); if (cellprop) parent_cellsize += propval_cell(cellprop); + else + FAIL_PROP(c, dti, node, irq_map_prop, + "Missing property '#address-cells' in node %s, using 0 as fallback", + provider_node->fullpath); cell += 1 + parent_cellsize; if (cell > map_cells) diff --git a/scripts/dtc/data.c b/scripts/dtc/data.c index 14734233ad8b..5b25aa060416 100644 --- a/scripts/dtc/data.c +++ b/scripts/dtc/data.c @@ -228,11 +228,7 @@ struct data data_add_marker(struct data d, enum markertype type, char *ref) { struct marker *m; - m = xmalloc(sizeof(*m)); - m->offset = d.len; - m->type = type; - m->ref = ref; - m->next = NULL; + m = alloc_marker(d.len, type, ref); return data_append_markers(d, m); } @@ -254,3 +250,44 @@ bool data_is_one_string(struct data d) return true; } + +struct data data_insert_data(struct data d, struct marker *m, struct data old) +{ + unsigned int offset = m->offset; + struct marker *next = m->next; + struct marker *marker; + struct data new_data; + char *ref; + + new_data = data_insert_at_marker(d, m, old.val, old.len); + + /* Copy all markers from old value */ + marker = old.markers; + for_each_marker(marker) { + ref = NULL; + + if (marker->ref) + ref = xstrdup(marker->ref); + + m->next = alloc_marker(marker->offset + offset, marker->type, + ref); + m = m->next; + } + m->next = next; + + return new_data; +} + +struct marker *alloc_marker(unsigned int offset, enum markertype type, + char *ref) +{ + struct marker *m; + + m = xmalloc(sizeof(*m)); + m->offset = offset; + m->type = type; + m->ref = ref; + m->next = NULL; + + return m; +} diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l index de60a70b6bdb..15d585c80798 100644 --- a/scripts/dtc/dtc-lexer.l +++ b/scripts/dtc/dtc-lexer.l @@ -151,6 +151,21 @@ static void PRINTF(1, 2) lexical_error(const char *fmt, ...); return DT_LABEL; } +{LABEL} { + /* Missed includes or macro definitions while + * preprocessing can lead to unexpected identifiers in + * the input. Report a slightly more informative error + * in this case */ + + lexical_error("Unexpected '%s'", yytext); + + /* Treat it as a literal which often generates further + * useful error messages */ + + yylval.integer = 0; + return DT_LITERAL; + } + ([0-9]+|0[xX][0-9a-fA-F]+)(U|L|UL|LL|ULL)? { char *e; DPRINT("Integer Literal: '%s'\n", yytext); diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c index 0655c2e2c362..b3445b7d6473 100644 --- a/scripts/dtc/dtc.c +++ b/scripts/dtc/dtc.c @@ -15,7 +15,7 @@ int quiet; /* Level of quietness */ unsigned int reservenum;/* Number of memory reservation slots */ int minsize; /* Minimum blob size */ int padsize; /* Additional padding to blob */ -int alignsize; /* Additional padding to blob accroding to the alignsize */ +int alignsize; /* Additional padding to blob according to the alignsize */ int phandle_format = PHANDLE_EPAPR; /* Use linux,phandle or phandle properties */ int generate_symbols; /* enable symbols & fixup support */ int generate_fixups; /* suppress generation of fixups on symbol support */ @@ -289,7 +289,9 @@ int main(int argc, char *argv[]) if (!depfile) die("Couldn't open dependency file %s: %s\n", depname, strerror(errno)); - fprintf(depfile, "%s:", outname); + + fprint_path_escaped(depfile, outname); + fputc(':', depfile); } if (inform == NULL) diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h index 4c4aaca1fc41..3a220b9afc99 100644 --- a/scripts/dtc/dtc.h +++ b/scripts/dtc/dtc.h @@ -38,7 +38,7 @@ extern int quiet; /* Level of quietness */ extern unsigned int reservenum; /* Number of memory reservation slots */ extern int minsize; /* Minimum blob size */ extern int padsize; /* Additional padding to blob */ -extern int alignsize; /* Additional padding to blob accroding to the alignsize */ +extern int alignsize; /* Additional padding to blob according to the alignsize */ extern int phandle_format; /* Use linux,phandle or phandle properties */ extern int generate_symbols; /* generate symbols for nodes with labels */ extern int generate_fixups; /* generate fixups */ @@ -182,7 +182,10 @@ struct data data_append_addr(struct data d, uint64_t addr); struct data data_append_byte(struct data d, uint8_t byte); struct data data_append_zeroes(struct data d, int len); struct data data_append_align(struct data d, int align); +struct data data_insert_data(struct data d, struct marker *m, struct data old); +struct marker *alloc_marker(unsigned int offset, enum markertype type, + char *ref); struct data data_add_marker(struct data d, enum markertype type, char *ref); bool data_is_one_string(struct data d); diff --git a/scripts/dtc/fdtoverlay.c b/scripts/dtc/fdtoverlay.c index 699b4f616502..ee1eb8f3ad28 100644 --- a/scripts/dtc/fdtoverlay.c +++ b/scripts/dtc/fdtoverlay.c @@ -46,6 +46,7 @@ static void *apply_one(char *base, const char *overlay, size_t *buf_len, char *tmp = NULL; char *tmpo; int ret; + bool has_symbols; /* * We take copies first, because a failed apply can trash @@ -62,6 +63,8 @@ static void *apply_one(char *base, const char *overlay, size_t *buf_len, fdt_strerror(ret)); goto fail; } + ret = fdt_path_offset(tmp, "/__symbols__"); + has_symbols = ret >= 0; memcpy(tmpo, overlay, fdt_totalsize(overlay)); @@ -74,6 +77,11 @@ static void *apply_one(char *base, const char *overlay, size_t *buf_len, if (ret) { fprintf(stderr, "\nFailed to apply '%s': %s\n", name, fdt_strerror(ret)); + if (!has_symbols) { + fprintf(stderr, + "base blob does not have a '/__symbols__' node, " + "make sure you have compiled the base blob with '-@' option\n"); + } goto fail; } diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c index 1bcd8089c5b9..30e6de2044b2 100644 --- a/scripts/dtc/flattree.c +++ b/scripts/dtc/flattree.c @@ -503,7 +503,7 @@ void dt_to_asm(FILE *f, struct dt_info *dti, int version) * Reserve map entries. * Align the reserve map to a doubleword boundary. * Each entry is an (address, size) pair of u64 values. - * Always supply a zero-sized temination entry. + * Always supply a zero-sized termination entry. */ asm_emit_align(f, 8); emit_label(f, symprefix, "reserve_map"); diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c index 20c6415b9ced..95f644c31f94 100644 --- a/scripts/dtc/libfdt/fdt.c +++ b/scripts/dtc/libfdt/fdt.c @@ -312,14 +312,14 @@ int fdt_next_subnode(const void *fdt, int offset) return offset; } -const char *fdt_find_string_(const char *strtab, int tabsize, const char *s) +const char *fdt_find_string_len_(const char *strtab, int tabsize, const char *s, + int slen) { - int len = strlen(s) + 1; - const char *last = strtab + tabsize - len; + const char *last = strtab + tabsize - (slen + 1); const char *p; for (p = strtab; p <= last; p++) - if (memcmp(p, s, len) == 0) + if (memcmp(p, s, slen) == 0 && p[slen] == '\0') return p; return NULL; } diff --git a/scripts/dtc/libfdt/fdt.h b/scripts/dtc/libfdt/fdt.h index 0c91aa7f67b5..a07abfcc7108 100644 --- a/scripts/dtc/libfdt/fdt.h +++ b/scripts/dtc/libfdt/fdt.h @@ -7,7 +7,7 @@ * Copyright 2012 Kim Phillips, Freescale Semiconductor. */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct fdt_header { fdt32_t magic; /* magic word FDT_MAGIC */ @@ -45,7 +45,7 @@ struct fdt_property { char data[]; }; -#endif /* !__ASSEMBLY */ +#endif /* !__ASSEMBLER__ */ #define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */ #define FDT_TAGSIZE sizeof(fdt32_t) diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c index 28b667ffc490..e6b9eb643958 100644 --- a/scripts/dtc/libfdt/fdt_overlay.c +++ b/scripts/dtc/libfdt/fdt_overlay.c @@ -307,7 +307,6 @@ static int overlay_update_local_references(void *fdto, uint32_t delta) /** * overlay_fixup_one_phandle - Set an overlay phandle to the base one - * @fdt: Base Device Tree blob * @fdto: Device tree overlay blob * @symbols_off: Node offset of the symbols node in the base device tree * @path: Path to a node holding a phandle in the overlay @@ -328,8 +327,7 @@ static int overlay_update_local_references(void *fdto, uint32_t delta) * 0 on success * Negative error code on failure */ -static int overlay_fixup_one_phandle(void *fdt, void *fdto, - int symbols_off, +static int overlay_fixup_one_phandle(void *fdto, int symbols_off, const char *path, uint32_t path_len, const char *name, uint32_t name_len, int poffset, uint32_t phandle) @@ -351,7 +349,7 @@ static int overlay_fixup_one_phandle(void *fdt, void *fdto, name, name_len, poffset, &phandle_prop, sizeof(phandle_prop)); -}; +} /** * overlay_fixup_phandle - Set an overlay phandle to the base one @@ -443,7 +441,7 @@ static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off, if ((*endptr != '\0') || (endptr <= (sep + 1))) return -FDT_ERR_BADOVERLAY; - ret = overlay_fixup_one_phandle(fdt, fdto, symbols_off, + ret = overlay_fixup_one_phandle(fdto, symbols_off, path, path_len, name, name_len, poffset, phandle); if (ret) diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c index 3621d3651d3f..7475cafce071 100644 --- a/scripts/dtc/libfdt/fdt_rw.c +++ b/scripts/dtc/libfdt/fdt_rw.c @@ -124,31 +124,33 @@ static int fdt_splice_string_(void *fdt, int newlen) * allocated. Ignored if can_assume(NO_ROLLBACK) * @return offset of string in the string table (whether found or added) */ -static int fdt_find_add_string_(void *fdt, const char *s, int *allocated) +static int fdt_find_add_string_(void *fdt, const char *s, int slen, + int *allocated) { char *strtab = (char *)fdt + fdt_off_dt_strings(fdt); const char *p; char *new; - int len = strlen(s) + 1; int err; if (!can_assume(NO_ROLLBACK)) *allocated = 0; - p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s); + p = fdt_find_string_len_(strtab, fdt_size_dt_strings(fdt), s, slen); if (p) /* found it */ return (p - strtab); new = strtab + fdt_size_dt_strings(fdt); - err = fdt_splice_string_(fdt, len); + err = fdt_splice_string_(fdt, slen + 1); if (err) return err; if (!can_assume(NO_ROLLBACK)) *allocated = 1; - memcpy(new, s, len); + memcpy(new, s, slen); + new[slen] = '\0'; + return (new - strtab); } @@ -181,13 +183,15 @@ int fdt_del_mem_rsv(void *fdt, int n) return fdt_splice_mem_rsv_(fdt, re, 1, 0); } -static int fdt_resize_property_(void *fdt, int nodeoffset, const char *name, +static int fdt_resize_property_(void *fdt, int nodeoffset, + const char *name, int namelen, int len, struct fdt_property **prop) { int oldlen; int err; - *prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen); + *prop = fdt_get_property_namelen_w(fdt, nodeoffset, name, namelen, + &oldlen); if (!*prop) return oldlen; @@ -200,7 +204,7 @@ static int fdt_resize_property_(void *fdt, int nodeoffset, const char *name, } static int fdt_add_property_(void *fdt, int nodeoffset, const char *name, - int len, struct fdt_property **prop) + int namelen, int len, struct fdt_property **prop) { int proplen; int nextoffset; @@ -211,7 +215,7 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name, if ((nextoffset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) return nextoffset; - namestroff = fdt_find_add_string_(fdt, name, &allocated); + namestroff = fdt_find_add_string_(fdt, name, namelen, &allocated); if (namestroff < 0) return namestroff; @@ -255,17 +259,18 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name) return 0; } -int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, - int len, void **prop_data) +int fdt_setprop_placeholder_namelen(void *fdt, int nodeoffset, const char *name, + int namelen, int len, void **prop_data) { struct fdt_property *prop; int err; FDT_RW_PROBE(fdt); - err = fdt_resize_property_(fdt, nodeoffset, name, len, &prop); + err = fdt_resize_property_(fdt, nodeoffset, name, namelen, len, &prop); if (err == -FDT_ERR_NOTFOUND) - err = fdt_add_property_(fdt, nodeoffset, name, len, &prop); + err = fdt_add_property_(fdt, nodeoffset, name, namelen, len, + &prop); if (err) return err; @@ -273,13 +278,14 @@ int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, return 0; } -int fdt_setprop(void *fdt, int nodeoffset, const char *name, - const void *val, int len) +int fdt_setprop_namelen(void *fdt, int nodeoffset, const char *name, + int namelen, const void *val, int len) { void *prop_data; int err; - err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data); + err = fdt_setprop_placeholder_namelen(fdt, nodeoffset, name, namelen, + len, &prop_data); if (err) return err; @@ -307,7 +313,8 @@ int fdt_appendprop(void *fdt, int nodeoffset, const char *name, prop->len = cpu_to_fdt32(newlen); memcpy(prop->data + oldlen, val, len); } else { - err = fdt_add_property_(fdt, nodeoffset, name, len, &prop); + err = fdt_add_property_(fdt, nodeoffset, name, strlen(name), + len, &prop); if (err) return err; memcpy(prop->data, val, len); diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h index 2d409d8e829b..914bf90785ab 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -14,7 +14,7 @@ extern "C" { #endif #define FDT_FIRST_SUPPORTED_VERSION 0x02 -#define FDT_LAST_COMPATIBLE_VERSION 0x10 +#define FDT_LAST_COMPATIBLE_VERSION 0x10 #define FDT_LAST_SUPPORTED_VERSION 0x11 /* Error codes: informative error codes */ @@ -263,16 +263,16 @@ int fdt_next_subnode(const void *fdt, int offset); struct fdt_header *fdth = (struct fdt_header *)fdt; \ fdth->name = cpu_to_fdt32(val); \ } -fdt_set_hdr_(magic); -fdt_set_hdr_(totalsize); -fdt_set_hdr_(off_dt_struct); -fdt_set_hdr_(off_dt_strings); -fdt_set_hdr_(off_mem_rsvmap); -fdt_set_hdr_(version); -fdt_set_hdr_(last_comp_version); -fdt_set_hdr_(boot_cpuid_phys); -fdt_set_hdr_(size_dt_strings); -fdt_set_hdr_(size_dt_struct); +fdt_set_hdr_(magic) +fdt_set_hdr_(totalsize) +fdt_set_hdr_(off_dt_struct) +fdt_set_hdr_(off_dt_strings) +fdt_set_hdr_(off_mem_rsvmap) +fdt_set_hdr_(version) +fdt_set_hdr_(last_comp_version) +fdt_set_hdr_(boot_cpuid_phys) +fdt_set_hdr_(size_dt_strings) +fdt_set_hdr_(size_dt_struct) #undef fdt_set_hdr_ /** @@ -285,7 +285,7 @@ size_t fdt_header_size(const void *fdt); /** * fdt_header_size_ - internal function to get header size from a version number - * @version: devicetree version number + * @version: device tree version number * * Return: size of DTB header in bytes */ @@ -554,7 +554,7 @@ int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen); * -FDT_ERR_BADPATH, given path does not begin with '/' and the first * component is not a valid alias * -FDT_ERR_NOTFOUND, if the requested node does not exist - * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, * -FDT_ERR_BADSTATE, * -FDT_ERR_BADSTRUCTURE, @@ -599,7 +599,7 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp); * structure block offset of the property (>=0), on success * -FDT_ERR_NOTFOUND, if the requested node has no properties * -FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_BEGIN_NODE tag - * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, * -FDT_ERR_BADSTATE, * -FDT_ERR_BADSTRUCTURE, @@ -620,7 +620,7 @@ int fdt_first_property_offset(const void *fdt, int nodeoffset); * structure block offset of the next property (>=0), on success * -FDT_ERR_NOTFOUND, if the given property is the last in its node * -FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_PROP tag - * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, * -FDT_ERR_BADSTATE, * -FDT_ERR_BADSTRUCTURE, @@ -712,6 +712,13 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, int nodeoffset, const char *name, int namelen, int *lenp); +static inline struct fdt_property * +fdt_get_property_namelen_w(void *fdt, int nodeoffset, const char *name, + int namelen, int *lenp) +{ + return (struct fdt_property *)(uintptr_t)fdt_get_property_namelen( + fdt, nodeoffset, name, namelen, lenp); +} #endif /** @@ -764,7 +771,7 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset, * to within the device blob itself, not a copy of the value). If * lenp is non-NULL, the length of the property value is also * returned, in the integer pointed to by lenp. If namep is non-NULL, - * the property's namne will also be returned in the char * pointed to + * the property's name will also be returned in the char * pointed to * by namep (this will be a pointer to within the device tree's string * block, not a new copy of the name). * @@ -772,7 +779,7 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset, * pointer to the property's value * if lenp is non-NULL, *lenp contains the length of the property * value (>=0) - * if namep is non-NULL *namep contiains a pointer to the property + * if namep is non-NULL *namep contains a pointer to the property * name. * NULL, on error * if lenp is non-NULL, *lenp contains an error code (<0): @@ -866,7 +873,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset); /** * fdt_get_alias_namelen - get alias based on substring * @fdt: pointer to the device tree blob - * @name: name of the alias th look up + * @name: name of the alias to look up * @namelen: number of characters of name to consider * * Identical to fdt_get_alias(), but only examine the first @namelen @@ -883,7 +890,7 @@ const char *fdt_get_alias_namelen(const void *fdt, /** * fdt_get_alias - retrieve the path referenced by a given alias * @fdt: pointer to the device tree blob - * @name: name of the alias th look up + * @name: name of the alias to look up * * fdt_get_alias() retrieves the value of a given alias. That is, the * value of the property named @name in the node /aliases. @@ -1259,8 +1266,8 @@ const char *fdt_stringlist_get(const void *fdt, int nodeoffset, * * returns: * 0 <= n < FDT_MAX_NCELLS, on success - * 2, if the node has no #address-cells property - * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid + * 2, if the node has no #address-cells property + * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid * #address-cells property * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, @@ -1280,8 +1287,8 @@ int fdt_address_cells(const void *fdt, int nodeoffset); * * returns: * 0 <= n < FDT_MAX_NCELLS, on success - * 1, if the node has no #size-cells property - * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid + * 1, if the node has no #size-cells property + * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid * #size-cells property * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, @@ -1562,7 +1569,7 @@ static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val) * @fdt: pointer to the device tree blob * @name: name of property to add * @len: length of property value in bytes - * @valp: returns a pointer to where where the value should be placed + * @valp: returns a pointer to where the value should be placed * * returns: * 0, on success @@ -1659,6 +1666,38 @@ int fdt_del_mem_rsv(void *fdt, int n); */ int fdt_set_name(void *fdt, int nodeoffset, const char *name); +/** + * fdt_setprop_namelen - create or change a property + * @fdt: pointer to the device tree blob + * @nodeoffset: offset of the node whose property to change + * @name: name of the property to change + * @namelen: length of the name + * @val: pointer to data to set the property value to + * @len: length of the property value + * + * fdt_setprop_namelen() sets the value of the named property in the given + * node to the given value and length, creating the property if it + * does not already exist. + * + * This function may insert or delete data from the blob, and will + * therefore change the offsets of some existing nodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to + * contain the new property value + * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_TRUNCATED, standard meanings + */ +int fdt_setprop_namelen(void *fdt, int nodeoffset, const char *name, + int namelen, const void *val, int len); + /** * fdt_setprop - create or change a property * @fdt: pointer to the device tree blob @@ -1687,18 +1726,23 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name); * -FDT_ERR_BADLAYOUT, * -FDT_ERR_TRUNCATED, standard meanings */ -int fdt_setprop(void *fdt, int nodeoffset, const char *name, - const void *val, int len); +static inline int fdt_setprop(void *fdt, int nodeoffset, const char *name, + const void *val, int len) +{ + return fdt_setprop_namelen(fdt, nodeoffset, name, strlen(name), val, + len); +} /** - * fdt_setprop_placeholder - allocate space for a property + * fdt_setprop_placeholder_namelen - allocate space for a property * @fdt: pointer to the device tree blob * @nodeoffset: offset of the node whose property to change * @name: name of the property to change + * @namelen: length of the name * @len: length of the property value * @prop_data: return pointer to property data * - * fdt_setprop_placeholer() allocates the named property in the given node. + * fdt_setprop_placeholder_namelen() allocates the named property in the given node. * If the property exists it is resized. In either case a pointer to the * property data is returned. * @@ -1718,8 +1762,44 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name, * -FDT_ERR_BADLAYOUT, * -FDT_ERR_TRUNCATED, standard meanings */ -int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, - int len, void **prop_data); +int fdt_setprop_placeholder_namelen(void *fdt, int nodeoffset, const char *name, + int namelen, int len, void **prop_data); + +/** + * fdt_setprop_placeholder - allocate space for a property + * @fdt: pointer to the device tree blob + * @nodeoffset: offset of the node whose property to change + * @name: name of the property to change + * @len: length of the property value + * @prop_data: return pointer to property data + * + * fdt_setprop_placeholder() allocates the named property in the given node. + * If the property exists it is resized. In either case a pointer to the + * property data is returned. + * + * This function may insert or delete data from the blob, and will + * therefore change the offsets of some existing nodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to + * contain the new property value + * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_TRUNCATED, standard meanings + */ +static inline int fdt_setprop_placeholder(void *fdt, int nodeoffset, + const char *name, int len, + void **prop_data) +{ + return fdt_setprop_placeholder_namelen(fdt, nodeoffset, name, + strlen(name), len, prop_data); +} /** * fdt_setprop_u32 - set a property to a 32-bit integer @@ -1839,6 +1919,38 @@ static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, #define fdt_setprop_string(fdt, nodeoffset, name, str) \ fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) +/** + * fdt_setprop_namelen_string - set a property to a string value + * @fdt: pointer to the device tree blob + * @nodeoffset: offset of the node whose property to change + * @name: name of the property to change + * @namelen: number of characters of name to consider + * @str: string value for the property + * + * fdt_setprop_namelen_string() sets the value of the named property in the + * given node to the given string value (using the length of the + * string to determine the new length of the property), or creates a + * new property with that value if it does not already exist. + * + * This function may insert or delete data from the blob, and will + * therefore change the offsets of some existing nodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to + * contain the new property value + * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_TRUNCATED, standard meanings + */ +#define fdt_setprop_namelen_string(fdt, nodeoffset, name, namelen, str) \ + fdt_setprop_namelen((fdt), (nodeoffset), (name), (namelen), (str), \ + strlen(str) + 1) /** * fdt_setprop_empty - set a property to an empty value @@ -2059,7 +2171,7 @@ int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset, * @nodeoffset: offset of the node whose property to nop * @name: name of the property to nop * - * fdt_del_property() will delete the given property. + * fdt_delprop() will delete the given property. * * This function will delete data from the blob, and will therefore * change the offsets of some existing nodes. @@ -2111,8 +2223,7 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset, * change the offsets of some existing nodes. * * returns: - * structure block offset of the created nodeequested subnode (>=0), on - * success + * structure block offset of the created subnode (>=0), on success * -FDT_ERR_NOTFOUND, if the requested subnode does not exist * -FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE * tag @@ -2122,7 +2233,7 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset, * blob to contain the new node * -FDT_ERR_NOSPACE * -FDT_ERR_BADLAYOUT - * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, * -FDT_ERR_BADSTATE, * -FDT_ERR_BADSTRUCTURE, @@ -2167,7 +2278,7 @@ int fdt_del_node(void *fdt, int nodeoffset); * returns: * 0, on success * -FDT_ERR_NOSPACE, there's not enough space in the base device tree - * -FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or + * -FDT_ERR_NOTFOUND, the overlay points to some nonexistent nodes or * properties in the base DT * -FDT_ERR_BADPHANDLE, * -FDT_ERR_BADOVERLAY, diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h index 16bda1906a7b..b60b5456f596 100644 --- a/scripts/dtc/libfdt/libfdt_internal.h +++ b/scripts/dtc/libfdt/libfdt_internal.h @@ -20,7 +20,15 @@ int32_t fdt_ro_probe_(const void *fdt); int fdt_check_node_offset_(const void *fdt, int offset); int fdt_check_prop_offset_(const void *fdt, int offset); -const char *fdt_find_string_(const char *strtab, int tabsize, const char *s); + +const char *fdt_find_string_len_(const char *strtab, int tabsize, const char *s, + int s_len); +static inline const char *fdt_find_string_(const char *strtab, int tabsize, + const char *s) +{ + return fdt_find_string_len_(strtab, tabsize, s, strlen(s)); +} + int fdt_node_end_offset_(void *fdt, int nodeoffset); static inline const void *fdt_offset_ptr_(const void *fdt, int offset) @@ -47,8 +55,8 @@ static inline struct fdt_reserve_entry *fdt_mem_rsv_w_(void *fdt, int n) } /* - * Internal helpers to access tructural elements of the device tree - * blob (rather than for exaple reading integers from within property + * Internal helpers to access structural elements of the device tree + * blob (rather than for example reading integers from within property * values). We assume that we are either given a naturally aligned * address for the platform or if we are not, we are on a platform * where unaligned memory reads will be handled in a graceful manner. diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c index 49f723002f85..d51d05830b18 100644 --- a/scripts/dtc/livetree.c +++ b/scripts/dtc/livetree.c @@ -174,7 +174,7 @@ struct node *merge_nodes(struct node *old_node, struct node *new_node) old_prop->val = new_prop->val; old_prop->deleted = 0; - free(old_prop->srcpos); + srcpos_free(old_prop->srcpos); old_prop->srcpos = new_prop->srcpos; free(new_prop); new_prop = NULL; @@ -504,7 +504,7 @@ struct node *get_subnode(struct node *node, const char *nodename) struct node *child; for_each_child(node, child) - if (streq(child->name, nodename)) + if (streq(child->name, nodename) && !child->deleted) return child; return NULL; @@ -1014,9 +1014,7 @@ static void add_local_fixup_entry(struct dt_info *dti, /* walk the path components creating nodes if they don't exist */ for (wn = lfn, i = 1; i < depth; i++, wn = nwn) { /* if no node exists, create it */ - nwn = get_subnode(wn, compp[i]); - if (!nwn) - nwn = build_and_name_child_node(wn, compp[i]); + nwn = build_root_node(wn, compp[i]); } free(compp); @@ -1058,16 +1056,29 @@ void generate_label_tree(struct dt_info *dti, const char *name, bool allocph) void generate_fixups_tree(struct dt_info *dti, const char *name) { + struct node *n = get_subnode(dti->dt, name); + + /* Start with an empty __fixups__ node to not get duplicates */ + if (n) + n->deleted = true; + if (!any_fixup_tree(dti, dti->dt)) return; - generate_fixups_tree_internal(dti, build_root_node(dti->dt, name), + generate_fixups_tree_internal(dti, + build_and_name_child_node(dti->dt, name), dti->dt); } void generate_local_fixups_tree(struct dt_info *dti, const char *name) { + struct node *n = get_subnode(dti->dt, name); + + /* Start with an empty __local_fixups__ node to not get duplicates */ + if (n) + n->deleted = true; if (!any_local_fixup_tree(dti, dti->dt)) return; - generate_local_fixups_tree_internal(dti, build_root_node(dti->dt, name), + generate_local_fixups_tree_internal(dti, + build_and_name_child_node(dti->dt, name), dti->dt); } diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c index 8e4d18a90b47..5bb57bf6856c 100644 --- a/scripts/dtc/srcpos.c +++ b/scripts/dtc/srcpos.c @@ -160,8 +160,10 @@ FILE *srcfile_relative_open(const char *fname, char **fullnamep) strerror(errno)); } - if (depfile) - fprintf(depfile, " %s", fullname); + if (depfile) { + fputc(' ', depfile); + fprint_path_escaped(depfile, fullname); + } if (fullnamep) *fullnamep = fullname; @@ -285,6 +287,17 @@ struct srcpos *srcpos_extend(struct srcpos *pos, struct srcpos *newtail) return pos; } +void srcpos_free(struct srcpos *pos) +{ + struct srcpos *p_next; + + while (pos) { + p_next = pos->next; + free(pos); + pos = p_next; + } +} + char * srcpos_string(struct srcpos *pos) { diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h index 4318d7ad34d9..4d60b50e3119 100644 --- a/scripts/dtc/srcpos.h +++ b/scripts/dtc/srcpos.h @@ -88,6 +88,7 @@ extern void srcpos_update(struct srcpos *pos, const char *text, int len); extern struct srcpos *srcpos_copy(struct srcpos *pos); extern struct srcpos *srcpos_extend(struct srcpos *new_srcpos, struct srcpos *old_srcpos); +extern void srcpos_free(struct srcpos *pos); extern char *srcpos_string(struct srcpos *pos); extern char *srcpos_string_first(struct srcpos *pos, int level); extern char *srcpos_string_last(struct srcpos *pos, int level); diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c index ae15839ba6a5..d25f01fc6937 100644 --- a/scripts/dtc/treesource.c +++ b/scripts/dtc/treesource.c @@ -139,26 +139,48 @@ static const char *delim_end[] = { [TYPE_STRING] = "", }; +/* + * The invariants in the marker list are: + * - offsets are non-strictly monotonically increasing + * - for a single offset there is at most one type marker + * - for a single offset that has both a type marker and non-type markers, the + * type marker appears before the others. + */ +static struct marker **add_marker(struct marker **mi, + enum markertype type, unsigned int offset, char *ref) +{ + struct marker *nm; + + while (*mi && (*mi)->offset < offset) + mi = &(*mi)->next; + + if (*mi && (*mi)->offset == offset && is_type_marker((*mi)->type)) { + if (is_type_marker(type)) + return mi; + mi = &(*mi)->next; + } + + if (*mi && (*mi)->offset == offset && type == (*mi)->type) + return mi; + + nm = xmalloc(sizeof(*nm)); + nm->type = type; + nm->offset = offset; + nm->ref = ref; + nm->next = *mi; + *mi = nm; + + return &nm->next; +} + static void add_string_markers(struct property *prop) { int l, len = prop->val.len; const char *p = prop->val.val; + struct marker **mi = &prop->val.markers; - for (l = strlen(p) + 1; l < len; l += strlen(p + l) + 1) { - struct marker *m, **nextp; - - m = xmalloc(sizeof(*m)); - m->offset = l; - m->type = TYPE_STRING; - m->ref = NULL; - m->next = NULL; - - /* Find the end of the markerlist */ - nextp = &prop->val.markers; - while (*nextp) - nextp = &((*nextp)->next); - *nextp = m; - } + for (l = strlen(p) + 1; l < len; l += strlen(p + l) + 1) + mi = add_marker(mi, TYPE_STRING, l, NULL); } static enum markertype guess_value_type(struct property *prop) diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c index 507f0120cd13..412592320265 100644 --- a/scripts/dtc/util.c +++ b/scripts/dtc/util.c @@ -23,6 +23,22 @@ #include "util.h" #include "version_gen.h" +void fprint_path_escaped(FILE *fp, const char *path) +{ + const char *p = path; + + while (*p) { + if (*p == ' ') { + fputc('\\', fp); + fputc(' ', fp); + } else { + fputc(*p, fp); + } + + p++; + } +} + char *xstrdup(const char *s) { int len = strlen(s) + 1; diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h index b448cd79efd3..800f2e2c55b1 100644 --- a/scripts/dtc/util.h +++ b/scripts/dtc/util.h @@ -42,6 +42,11 @@ static inline void NORETURN PRINTF(1, 2) die(const char *str, ...) exit(1); } +/** + * Writes path to fp, escaping spaces with a backslash. + */ +void fprint_path_escaped(FILE *fp, const char *path); + static inline void *xmalloc(size_t len) { void *new = malloc(len); diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h index bf81ce593685..226c48bf75dc 100644 --- a/scripts/dtc/version_gen.h +++ b/scripts/dtc/version_gen.h @@ -1 +1 @@ -#define DTC_VERSION "DTC 1.7.0-gbcd02b52" +#define DTC_VERSION "DTC 1.7.2-g52f07dcc" From da8dd0a9378ebfec9fbc813a963203ad0cb94ce2 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 31 Jul 2025 17:12:21 -0500 Subject: [PATCH 03/81] MAINTAINERS: Add FSI bindings to FSI subsystem entry Maintainers of a subsystem should also be the maintainer for corresponding DT bindings. Add the FSI bindings to the FSI subsystem entry. Acked-by: Eddie James Link: https://lore.kernel.org/r/20250731-dt-fsi-cleanups-v1-4-e7b695a29fc3@kernel.org Signed-off-by: Rob Herring (Arm) --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index fe168477caa4..c2cf508e6379 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9962,6 +9962,7 @@ R: Ninad Palsule L: linux-fsi@lists.ozlabs.org S: Supported Q: http://patchwork.ozlabs.org/project/linux-fsi/list/ +F: Documentation/devicetree/bindings/fsi/ F: drivers/fsi/ F: include/linux/fsi*.h F: include/trace/events/fsi*.h From 17c66b1037aa52277d42c942db76672a1298858e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 31 Jul 2025 17:12:22 -0500 Subject: [PATCH 04/81] dt-bindings: fsi: Convert fsi-master-gpio to DT schema Convert the GPIO-based FSI master binding to DT schema format. Drop the "fsi-master" compatible as it has not be used consistently and doesn't represent anything. Acked-by: Eddie James Link: https://lore.kernel.org/r/20250731-dt-fsi-cleanups-v1-5-e7b695a29fc3@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/fsi/fsi-master-gpio.txt | 28 --------- .../bindings/fsi/fsi-master-gpio.yaml | 63 +++++++++++++++++++ 2 files changed, 63 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt create mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt deleted file mode 100644 index 1e442450747f..000000000000 --- a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt +++ /dev/null @@ -1,28 +0,0 @@ -Device-tree bindings for gpio-based FSI master driver ------------------------------------------------------ - -Required properties: - - compatible = "fsi-master-gpio"; - - clock-gpios = ; : GPIO for FSI clock - - data-gpios = ; : GPIO for FSI data signal - -Optional properties: - - enable-gpios = ; : GPIO for enable signal - - trans-gpios = ; : GPIO for voltage translator enable - - mux-gpios = ; : GPIO for pin multiplexing with other - functions (eg, external FSI masters) - - no-gpio-delays; : Don't add extra delays between GPIO - accesses. This is useful when the HW - GPIO block is running at a low enough - frequency. - -Examples: - - fsi-master { - compatible = "fsi-master-gpio", "fsi-master"; - clock-gpios = <&gpio 0>; - data-gpios = <&gpio 1>; - enable-gpios = <&gpio 2>; - trans-gpios = <&gpio 3>; - mux-gpios = <&gpio 4>; - } diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml new file mode 100644 index 000000000000..21bfbad595b3 --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/fsi-master-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: fsi-master-gpio + +maintainers: + - Eddie James + +allOf: + - $ref: /schemas/fsi/fsi-controller.yaml + +properties: + compatible: + items: + - const: fsi-master-gpio + + clock-gpios: + description: GPIO for FSI clock + maxItems: 1 + + data-gpios: + description: GPIO for FSI data signal + maxItems: 1 + + enable-gpios: + description: GPIO for enable signal + maxItems: 1 + + trans-gpios: + description: GPIO for voltage translator enable + maxItems: 1 + + mux-gpios: + description: GPIO for pin multiplexing with other functions (eg, external + FSI masters) + maxItems: 1 + + no-gpio-delays: + description: + Don't add extra delays between GPIO accesses. This is useful when the HW + GPIO block is running at a low enough frequency. + type: boolean + +required: + - compatible + - clock-gpios + - data-gpios + +unevaluatedProperties: false + +examples: + - | + fsi-master { + compatible = "fsi-master-gpio"; + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + }; From a678ec17f57c97e9bdcb81f67f9af73ae72b3422 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 31 Jul 2025 17:12:23 -0500 Subject: [PATCH 05/81] dt-bindings: fsi: Convert aspeed,ast2400-cf-fsi-master to DT schema Convert the ASpeed Coldfire offloaded GPIO FSI master. Drop the "fsi-master" compatible as it has not be used consistently and doesn't represent anything. Acked-by: Eddie James Link: https://lore.kernel.org/r/20250731-dt-fsi-cleanups-v1-6-e7b695a29fc3@kernel.org Signed-off-by: Rob Herring (Arm) --- .../fsi/aspeed,ast2400-cf-fsi-master.yaml | 81 +++++++++++++++++++ .../bindings/fsi/fsi-master-ast-cf.txt | 36 --------- 2 files changed, 81 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt diff --git a/Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml b/Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml new file mode 100644 index 000000000000..690b6c936f18 --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/aspeed,ast2400-cf-fsi-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASpeed ColdFire offloaded GPIO-based FSI master + +maintainers: + - Eddie James + +allOf: + - $ref: /schemas/fsi/fsi-controller.yaml# + +properties: + compatible: + enum: + - aspeed,ast2400-cf-fsi-master + - aspeed,ast2500-cf-fsi-master + + clock-gpios: + maxItems: 1 + description: GPIO for FSI clock + + data-gpios: + maxItems: 1 + description: GPIO for FSI data signal + + enable-gpios: + maxItems: 1 + description: GPIO for enable signal + + trans-gpios: + maxItems: 1 + description: GPIO for voltage translator enable + + mux-gpios: + maxItems: 1 + description: + GPIO for pin multiplexing with other functions (eg, external FSI masters) + + memory-region: + maxItems: 1 + description: + Reference to the reserved memory for the ColdFire. Must be 2M aligned on + AST2400 and 1M aligned on AST2500. + + aspeed,cvic: + description: Reference to the CVIC node. + $ref: /schemas/types.yaml#/definitions/phandle + + aspeed,sram: + description: Reference to the SRAM node. + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - clock-gpios + - data-gpios + - enable-gpios + - trans-gpios + - mux-gpios + - memory-region + - aspeed,cvic + - aspeed,sram + +unevaluatedProperties: false + +examples: + - | + fsi-master { + compatible = "aspeed,ast2500-cf-fsi-master"; + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + memory-region = <&coldfire_memory>; + aspeed,cvic = <&cvic>; + aspeed,sram = <&sram>; + }; diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt b/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt deleted file mode 100644 index 3dc752db748b..000000000000 --- a/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt +++ /dev/null @@ -1,36 +0,0 @@ -Device-tree bindings for ColdFire offloaded gpio-based FSI master driver ------------------------------------------------------------------------- - -Required properties: - - compatible = - "aspeed,ast2400-cf-fsi-master" for an AST2400 based system - or - "aspeed,ast2500-cf-fsi-master" for an AST2500 based system - - - clock-gpios = ; : GPIO for FSI clock - - data-gpios = ; : GPIO for FSI data signal - - enable-gpios = ; : GPIO for enable signal - - trans-gpios = ; : GPIO for voltage translator enable - - mux-gpios = ; : GPIO for pin multiplexing with other - functions (eg, external FSI masters) - - memory-region = ; : Reference to the reserved memory for - the ColdFire. Must be 2M aligned on - AST2400 and 1M aligned on AST2500 - - aspeed,sram = ; : Reference to the SRAM node. - - aspeed,cvic = ; : Reference to the CVIC node. - -Examples: - - fsi-master { - compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; - - clock-gpios = <&gpio 0>; - data-gpios = <&gpio 1>; - enable-gpios = <&gpio 2>; - trans-gpios = <&gpio 3>; - mux-gpios = <&gpio 4>; - - memory-region = <&coldfire_memory>; - aspeed,sram = <&sram>; - aspeed,cvic = <&cvic>; - } From 59304e7b80b4554fae6f1df0f518bd341a0fedc9 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 6 Aug 2025 01:03:08 +0200 Subject: [PATCH 06/81] dt-bindings: arm: Spell out acronym When I authored these bindings I had no idea what "AEM" stood for. Now I know: it means "Architecture Envelope Model". Detail this in the bindings. Signed-off-by: Linus Walleij Acked-by: Conor Dooley Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/r/20250806-aem-dt-bind-v1-1-d14676dfb027@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 8dd6b6446394..89298b39903f 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -103,8 +103,9 @@ properties: - const: arm,juno-r2 - const: arm,juno - const: arm,vexpress - - description: Arm AEMv8a Versatile Express Real-Time System Model - (VE RTSM) is a programmers view of the Versatile Express with Arm + - description: Arm AEMv8a (Architecture Envelope Model) + Versatile Express Real-Time System Model (VE RTSM) + is a programmers view of the Versatile Express with Arm v8A hardware. See ARM DUI 0575D. items: - const: arm,rtsm_ve,aemv8a From f93dd842719b123cfad6385a32acf6386a3c7659 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 16:45:07 -0500 Subject: [PATCH 07/81] dt-bindings: display: Drop duplicate ti,opa362 binding The "ti,opa362" binding is already supported in simple-bridge.yaml, so remove the old binding doc. Acked-by: Conor Dooley Reviewed-by: Tomi Valkeinen Link: https://lore.kernel.org/r/20250807214508.4174167-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/display/ti/ti,opa362.txt | 38 ------------------- 1 file changed, 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/ti/ti,opa362.txt diff --git a/Documentation/devicetree/bindings/display/ti/ti,opa362.txt b/Documentation/devicetree/bindings/display/ti/ti,opa362.txt deleted file mode 100644 index f96083c0bd17..000000000000 --- a/Documentation/devicetree/bindings/display/ti/ti,opa362.txt +++ /dev/null @@ -1,38 +0,0 @@ -OPA362 analog video amplifier - -Required properties: -- compatible: "ti,opa362" -- enable-gpios: enable/disable output gpio - -Required node: -- Video port 0 for opa362 input -- Video port 1 for opa362 output - -Example: - -tv_amp: opa362 { - compatible = "ti,opa362"; - enable-gpios = <&gpio1 23 0>; /* GPIO to enable video out amplifier */ - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - opa_in: endpoint@0 { - remote-endpoint = <&venc_out>; - }; - }; - - port@1 { - reg = <1>; - opa_out: endpoint@0 { - remote-endpoint = <&tv_connector_in>; - }; - }; - }; -}; - - - From 6b8c52b41be4b3940f38b037cc953505aeb5768c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 6 Aug 2025 16:27:40 -0500 Subject: [PATCH 08/81] dt-bindings: arm: Convert cavium,thunder-88xx to DT schema Convert Cavium Thunder-88xx boards to DT schema format. There's not any defined board compatibles in this case. Link: https://lore.kernel.org/r/20250806212741.1633917-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/cavium,thunder-88xx.yaml | 19 +++++++++++++++++++ .../bindings/arm/cavium-thunder.txt | 10 ---------- 2 files changed, 19 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml delete mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder.txt diff --git a/Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml b/Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml new file mode 100644 index 000000000000..d7c813118c1c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/cavium,thunder-88xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cavium Thunder 88xx SoC + +maintainers: + - Robert Richter + +properties: + $nodename: + const: '/' + compatible: + items: + - const: cavium,thunder-88xx + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder.txt b/Documentation/devicetree/bindings/arm/cavium-thunder.txt deleted file mode 100644 index 6f63a5866902..000000000000 --- a/Documentation/devicetree/bindings/arm/cavium-thunder.txt +++ /dev/null @@ -1,10 +0,0 @@ -Cavium Thunder platform device tree bindings --------------------------------------------- - -Boards with Cavium's Thunder SoC shall have following properties. - -Root Node ---------- -Required root node properties: - - - compatible = "cavium,thunder-88xx"; From f56fbb6a1b36da1d481d7ce8245f7bedad3aa863 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 6 Aug 2025 16:28:11 -0500 Subject: [PATCH 09/81] dt-bindings: arm: Drop obsolete cavium-thunder2.txt The binding is already converted to schema and is located in Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml. Link: https://lore.kernel.org/r/20250806212812.1634740-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 -------- MAINTAINERS | 2 +- 2 files changed, 1 insertion(+), 9 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt deleted file mode 100644 index dc5dd65cbce7..000000000000 --- a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt +++ /dev/null @@ -1,8 +0,0 @@ -Cavium ThunderX2 CN99XX platform tree bindings ----------------------------------------------- - -Boards with Cavium ThunderX2 CN99XX SoC shall have the root property: - compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc"; - -These SoC uses the "cavium,thunder2" core which will be compatible -with "brcm,vulcan". diff --git a/MAINTAINERS b/MAINTAINERS index c2cf508e6379..7969d09dff17 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5545,7 +5545,7 @@ CAVIUM THUNDERX2 ARM64 SOC M: Robert Richter L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Odd Fixes -F: Documentation/devicetree/bindings/arm/cavium-thunder2.txt +F: Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml F: arch/arm64/boot/dts/cavium/thunder2-99xx* CBS/ETF/TAPRIO QDISCS From 5de28cf4ae21aebb6a5af09c96d1fad9eb03f2f8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:27 -0500 Subject: [PATCH 10/81] dt-bindings: arm/cpus: Add missing Applied Micro CPU compatibles "apm,potenza" and "apm,strega" CPU compatibles have been in use for some time. Link: https://lore.kernel.org/r/20250812181428.69490-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 5bd517befb68..bb1ab514924d 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -80,6 +80,8 @@ properties: compatible: enum: + - apm,potenza + - apm,strega - apple,avalanche - apple,blizzard - apple,cyclone From 01ce6aa56caa9dc7b240828ed40df8180df7afb7 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:33:25 -0500 Subject: [PATCH 11/81] dt-bindings: interrupt-controller: Convert hisilicon,mbigen-v2 to DT schema Convert the HiSilicon MBIGEN binding to DT schema format. It's a straight-forward conversion. Link: https://lore.kernel.org/r/20250812203327.730393-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../hisilicon,mbigen-v2.txt | 84 ------------------- .../hisilicon,mbigen-v2.yaml | 76 +++++++++++++++++ 2 files changed, 76 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt deleted file mode 100644 index a6813a071f15..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt +++ /dev/null @@ -1,84 +0,0 @@ -Hisilicon mbigen device tree bindings. -======================================= - -Mbigen means: message based interrupt generator. - -MBI is kind of msi interrupt only used on Non-PCI devices. - -To reduce the wired interrupt number connected to GIC, -Hisilicon designed mbigen to collect and generate interrupt. - - -Non-pci devices can connect to mbigen and generate the -interrupt by writing ITS register. - -The mbigen chip and devices connect to mbigen have the following properties: - -Mbigen main node required properties: -------------------------------------------- -- compatible: Should be "hisilicon,mbigen-v2" - -- reg: Specifies the base physical address and size of the Mbigen - registers. - -Mbigen sub node required properties: ------------------------------------------- -- interrupt controller: Identifies the node as an interrupt controller - -- msi-parent: Specifies the MSI controller this mbigen use. - For more detail information,please refer to the generic msi-parent binding in - Documentation/devicetree/bindings/interrupt-controller/msi.txt. - -- num-pins: the total number of pins implemented in this Mbigen - instance. - -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value must be 2. - - The 1st cell is hardware pin number of the interrupt.This number is local to - each mbigen chip and in the range from 0 to the maximum interrupts number - of the mbigen. - - The 2nd cell is the interrupt trigger type. - The value of this cell should be: - 1: rising edge triggered - or - 4: high level triggered - -Examples: - - mbigen_chip_dsa { - compatible = "hisilicon,mbigen-v2"; - reg = <0x0 0xc0080000 0x0 0x10000>; - - mbigen_gmac:intc_gmac { - interrupt-controller; - msi-parent = <&its_dsa 0x40b1c>; - num-pins = <9>; - #interrupt-cells = <2>; - }; - - mbigen_i2c:intc_i2c { - interrupt-controller; - msi-parent = <&its_dsa 0x40b0e>; - num-pins = <2>; - #interrupt-cells = <2>; - }; - }; - -Devices connect to mbigen required properties: ----------------------------------------------------- --interrupts:Specifies the interrupt source. - For the specific information of each cell in this property,please refer to - the "interrupt-cells" description mentioned above. - -Examples: - gmac0: ethernet@c2080000 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0xc2080000 0 0x20000>, - <0 0xc0000000 0 0x1000>; - interrupt-parent = <&mbigen_device_gmac>; - interrupts = <656 1>, - <657 1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml new file mode 100644 index 000000000000..326424e6e02a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/hisilicon,mbigen-v2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon mbigen v2 + +maintainers: + - Wei Xu + +description: > + Mbigen means: message based interrupt generator. + + MBI is kind of msi interrupt only used on Non-PCI devices. + + To reduce the wired interrupt number connected to GIC, Hisilicon designed + mbigen to collect and generate interrupt. + + Non-pci devices can connect to mbigen and generate the interrupt by writing + ITS register. + +properties: + compatible: + const: hisilicon,mbigen-v2 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + additionalProperties: false + + properties: + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + msi-parent: + maxItems: 1 + + num-pins: + description: The total number of pins implemented in this Mbigen instance. + $ref: /schemas/types.yaml#/definitions/uint32 + + required: + - interrupt-controller + - "#interrupt-cells" + - msi-parent + - num-pins + +examples: + - | + mbigen@c0080000 { + compatible = "hisilicon,mbigen-v2"; + reg = <0xc0080000 0x10000>; + + mbigen_gmac: intc_gmac { + interrupt-controller; + #interrupt-cells = <2>; + msi-parent = <&its_dsa 0x40b1c>; + num-pins = <9>; + }; + + mbigen_i2c: intc_i2c { + interrupt-controller; + #interrupt-cells = <2>; + msi-parent = <&its_dsa 0x40b0e>; + num-pins = <2>; + }; + }; From 38f9f4f5f8828e43c549fd07b70fe5bc4c2ef2f6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 6 Aug 2025 16:27:32 -0500 Subject: [PATCH 12/81] dt-bindings: arm: Convert marvell,berlin to DT schema Reviewed-by: Jisheng Zhang Link: https://lore.kernel.org/r/20250806212733.1633662-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell,berlin.yaml | 45 ++++++++++ .../devicetree/bindings/arm/syna.txt | 89 ------------------- 2 files changed, 45 insertions(+), 89 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/marvell,berlin.yaml delete mode 100644 Documentation/devicetree/bindings/arm/syna.txt diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.yaml b/Documentation/devicetree/bindings/arm/marvell,berlin.yaml new file mode 100644 index 000000000000..4e8442980dcb --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell,berlin.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell,berlin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synaptics/Marvell Berlin SoC + +maintainers: + - Jisheng Zhang + +description: + According to https://www.synaptics.com/company/news/conexant-marvell + Synaptics has acquired the Multimedia Solutions Business of Marvell, so + Berlin SoCs are now Synaptics' SoCs. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - sony,nsz-gs7 + - const: marvell,berlin2 + - const: marvell,berlin + - items: + - enum: + - google,chromecast + - valve,steamlink + - const: marvell,berlin2cd + - const: marvell,berlin + - items: + - enum: + - marvell,berlin2q-dmp + - const: marvell,berlin2q + - const: marvell,berlin + - items: + - enum: + - marvell,berlin4ct-dmp + - marvell,berlin4ct-stb + - const: marvell,berlin4ct + - const: marvell,berlin + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/syna.txt b/Documentation/devicetree/bindings/arm/syna.txt deleted file mode 100644 index f53c430f648c..000000000000 --- a/Documentation/devicetree/bindings/arm/syna.txt +++ /dev/null @@ -1,89 +0,0 @@ -Synaptics SoC Device Tree Bindings - -According to https://www.synaptics.com/company/news/conexant-marvell -Synaptics has acquired the Multimedia Solutions Business of Marvell, so -berlin SoCs are now Synaptics' SoCs now. - ---------------------------------------------------------------- - -Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 -shall have the following properties: - -* Required root node properties: -compatible: must contain "marvell,berlin" - -In addition, the above compatible shall be extended with the specific -SoC and board used. Currently known SoC compatibles are: - "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100), - "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005) - "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????) - "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114) - "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????) - -* Example: - -/ { - model = "Sony NSZ-GS7"; - compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin"; - - ... -} - -* Marvell Berlin CPU control bindings - -CPU control register allows various operations on CPUs, like resetting them -independently. - -Required properties: -- compatible: should be "marvell,berlin-cpu-ctrl" -- reg: address and length of the register set - -Example: - -cpu-ctrl@f7dd0000 { - compatible = "marvell,berlin-cpu-ctrl"; - reg = <0xf7dd0000 0x10000>; -}; - -* Marvell Berlin2 chip control binding - -Marvell Berlin SoCs have a chip control register set providing several -individual registers dealing with pinmux, padmux, clock, reset, and secondary -CPU boot address. Unfortunately, the individual registers are spread among the -chip control registers, so there should be a single DT node only providing the -different functions which are described below. - -Required properties: -- compatible: - * the first and second values must be: - "simple-mfd", "syscon" -- reg: address and length of following register sets for - BG2/BG2CD: chip control register set - BG2Q: chip control register set and cpu pll registers - -* Marvell Berlin2 system control binding - -Marvell Berlin SoCs have a system control register set providing several -individual registers dealing with pinmux, padmux, and reset. - -Required properties: -- compatible: - * the first and second values must be: - "simple-mfd", "syscon" -- reg: address and length of the system control register set - -Example: - -chip: chip-control@ea0000 { - compatible = "simple-mfd", "syscon"; - reg = <0xea0000 0x400>; - - /* sub-device nodes */ -}; - -sysctrl: system-controller@d000 { - compatible = "simple-mfd", "syscon"; - reg = <0xd000 0x100>; - - /* sub-device nodes */ -}; From 47829efa1cf42993e5bea2b4aea7e1cfcf8bd438 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:20 -0500 Subject: [PATCH 13/81] dt-bindings: perf: Convert apm,xgene-pmu to DT schema Convert the Applied Micro X-Gene PMU binding to DT schema format. It is a straightforward conversion. Link: https://lore.kernel.org/r/20250812181422.68286-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/perf/apm,xgene-pmu.yaml | 142 ++++++++++++++++++ .../bindings/perf/apm-xgene-pmu.txt | 112 -------------- MAINTAINERS | 2 +- 3 files changed, 143 insertions(+), 113 deletions(-) create mode 100644 Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml delete mode 100644 Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt diff --git a/Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml b/Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml new file mode 100644 index 000000000000..314048a2a134 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml @@ -0,0 +1,142 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/apm,xgene-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC PMU + +maintainers: + - Khuong Dinh + +description: | + This is APM X-Gene SoC PMU (Performance Monitoring Unit) module. + The following PMU devices are supported: + + L3C - L3 cache controller + IOB - IO bridge + MCB - Memory controller bridge + MC - Memory controller + +properties: + compatible: + enum: + - apm,xgene-pmu + - apm,xgene-pmu-v2 + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + regmap-csw: + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcba: + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcbb: + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - regmap-csw + - regmap-mcba + - regmap-mcbb + - reg + - interrupts + +additionalProperties: + type: object + additionalProperties: false + + properties: + compatible: + enum: + - apm,xgene-pmu-l3c + - apm,xgene-pmu-iob + - apm,xgene-pmu-mcb + - apm,xgene-pmu-mc + + reg: + maxItems: 1 + + enable-bit-index: + description: + Specifies which bit enables the associated resource in MCB or MC subnodes. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 31 + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pmu@78810000 { + compatible = "apm,xgene-pmu-v2"; + reg = <0x0 0x78810000 0x0 0x1000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + interrupts = <0x0 0x22 0x4>; + + pmul3c@7e610000 { + compatible = "apm,xgene-pmu-l3c"; + reg = <0x0 0x7e610000 0x0 0x1000>; + }; + + pmuiob@7e940000 { + compatible = "apm,xgene-pmu-iob"; + reg = <0x0 0x7e940000 0x0 0x1000>; + }; + + pmucmcb@7e710000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e710000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmcb@7e730000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e730000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e810000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e810000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmc@7e850000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e850000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e890000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e890000 0x0 0x1000>; + enable-bit-index = <2>; + }; + + pmucmc@7e8d0000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e8d0000 0x0 0x1000>; + enable-bit-index = <3>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt b/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt deleted file mode 100644 index afb11cf693c0..000000000000 --- a/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt +++ /dev/null @@ -1,112 +0,0 @@ -* APM X-Gene SoC PMU bindings - -This is APM X-Gene SoC PMU (Performance Monitoring Unit) module. -The following PMU devices are supported: - - L3C - L3 cache controller - IOB - IO bridge - MCB - Memory controller bridge - MC - Memory controller - -The following section describes the SoC PMU DT node binding. - -Required properties: -- compatible : Shall be "apm,xgene-pmu" for revision 1 or - "apm,xgene-pmu-v2" for revision 2. -- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. -- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. -- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. -- reg : First resource shall be the CPU bus PMU resource. -- interrupts : Interrupt-specifier for PMU IRQ. - -Required properties for L3C subnode: -- compatible : Shall be "apm,xgene-pmu-l3c". -- reg : First resource shall be the L3C PMU resource. - -Required properties for IOB subnode: -- compatible : Shall be "apm,xgene-pmu-iob". -- reg : First resource shall be the IOB PMU resource. - -Required properties for MCB subnode: -- compatible : Shall be "apm,xgene-pmu-mcb". -- reg : First resource shall be the MCB PMU resource. -- enable-bit-index : The bit indicates if the according MCB is enabled. - -Required properties for MC subnode: -- compatible : Shall be "apm,xgene-pmu-mc". -- reg : First resource shall be the MC PMU resource. -- enable-bit-index : The bit indicates if the according MC is enabled. - -Example: - csw: csw@7e200000 { - compatible = "apm,xgene-csw", "syscon"; - reg = <0x0 0x7e200000 0x0 0x1000>; - }; - - mcba: mcba@7e700000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e700000 0x0 0x1000>; - }; - - mcbb: mcbb@7e720000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e720000 0x0 0x1000>; - }; - - pmu: pmu@78810000 { - compatible = "apm,xgene-pmu-v2"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - regmap-csw = <&csw>; - regmap-mcba = <&mcba>; - regmap-mcbb = <&mcbb>; - reg = <0x0 0x78810000 0x0 0x1000>; - interrupts = <0x0 0x22 0x4>; - - pmul3c@7e610000 { - compatible = "apm,xgene-pmu-l3c"; - reg = <0x0 0x7e610000 0x0 0x1000>; - }; - - pmuiob@7e940000 { - compatible = "apm,xgene-pmu-iob"; - reg = <0x0 0x7e940000 0x0 0x1000>; - }; - - pmucmcb@7e710000 { - compatible = "apm,xgene-pmu-mcb"; - reg = <0x0 0x7e710000 0x0 0x1000>; - enable-bit-index = <0>; - }; - - pmucmcb@7e730000 { - compatible = "apm,xgene-pmu-mcb"; - reg = <0x0 0x7e730000 0x0 0x1000>; - enable-bit-index = <1>; - }; - - pmucmc@7e810000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e810000 0x0 0x1000>; - enable-bit-index = <0>; - }; - - pmucmc@7e850000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e850000 0x0 0x1000>; - enable-bit-index = <1>; - }; - - pmucmc@7e890000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e890000 0x0 0x1000>; - enable-bit-index = <2>; - }; - - pmucmc@7e8d0000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e8d0000 0x0 0x1000>; - enable-bit-index = <3>; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 7969d09dff17..4e6fa336ff70 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1895,7 +1895,7 @@ APPLIED MICRO (APM) X-GENE SOC PMU M: Khuong Dinh S: Supported F: Documentation/admin-guide/perf/xgene-pmu.rst -F: Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt +F: Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml F: drivers/perf/xgene_pmu.c APPLIED MICRO QT2025 PHY DRIVER From 326d2519811200da0e301dce3e93389dadd197a4 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 14 Aug 2025 08:51:56 -0500 Subject: [PATCH 14/81] dt-bindings: powerpc: Drop duplicate fsl/mpic.txt The chrp,open-pic binding schema already supports the "fsl,mpic" compatible. Add a couple of missing properties and support for 4 "#interrupt-cells" to the chrp,open-pic binding, so fsl/mpic.txt can be removed. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250814135157.2747346-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/chrp,open-pic.yaml | 17 +- .../devicetree/bindings/powerpc/fsl/mpic.txt | 231 ------------------ 2 files changed, 16 insertions(+), 232 deletions(-) delete mode 100644 Documentation/devicetree/bindings/powerpc/fsl/mpic.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml index f0d9bbd7d510..642738512f3c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml @@ -36,12 +36,27 @@ properties: const: 0 '#interrupt-cells': - const: 2 + description: + A value of 4 means that interrupt specifiers contain the interrupt-type or + type-specific information cells. + enum: [ 2, 4 ] pic-no-reset: description: Indicates the PIC shall not be reset during runtime initialization. type: boolean + single-cpu-affinity: + description: + If present, non-IPI interrupts will be routed to a single CPU at a time. + type: boolean + + last-interrupt-source: + description: + Some MPICs do not correctly report the number of hardware sources in the + global feature registers. This value, if specified, overrides the value + read from MPIC_GREG_FEATURE_LAST_SRC. + $ref: /schemas/types.yaml#/definitions/uint32 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt deleted file mode 100644 index dc5744636a57..000000000000 --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt +++ /dev/null @@ -1,231 +0,0 @@ -===================================================================== -Freescale MPIC Interrupt Controller Node -Copyright (C) 2010,2011 Freescale Semiconductor Inc. -===================================================================== - -The Freescale MPIC interrupt controller is found on all PowerQUICC -and QorIQ processors and is compatible with the Open PIC. The -notable difference from Open PIC binding is the addition of 2 -additional cells in the interrupt specifier defining interrupt type -information. - -PROPERTIES - - - compatible - Usage: required - Value type: - Definition: Shall include "fsl,mpic". Freescale MPIC - controllers compatible with this binding have Block - Revision Registers BRR1 and BRR2 at offset 0x0 and - 0x10 in the MPIC. - - - reg - Usage: required - Value type: - Definition: A standard property. Specifies the physical - offset and length of the device's registers within the - CCSR address space. - - - interrupt-controller - Usage: required - Value type: - Definition: Specifies that this node is an interrupt - controller - - - #interrupt-cells - Usage: required - Value type: - Definition: Shall be 2 or 4. A value of 2 means that interrupt - specifiers do not contain the interrupt-type or type-specific - information cells. - - - #address-cells - Usage: required - Value type: - Definition: Shall be 0. - - - pic-no-reset - Usage: optional - Value type: - Definition: The presence of this property specifies that the - MPIC must not be reset by the client program, and that - the boot program has initialized all interrupt source - configuration registers to a sane state-- masked or - directed at other cores. This ensures that the client - program will not receive interrupts for sources not belonging - to the client. The presence of this property also mandates - that any initialization related to interrupt sources shall - be limited to sources explicitly referenced in the device tree. - - - big-endian - Usage: optional - Value type: - If present the MPIC will be assumed to be big-endian. Some - device-trees omit this property on MPIC nodes even when the MPIC is - in fact big-endian, so certain boards override this property. - - - single-cpu-affinity - Usage: optional - Value type: - If present the MPIC will be assumed to only be able to route - non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC). - - - last-interrupt-source - Usage: optional - Value type: - Some MPICs do not correctly report the number of hardware sources - in the global feature registers. If specified, this field will - override the value read from MPIC_GREG_FEATURE_LAST_SRC. - -INTERRUPT SPECIFIER DEFINITION - - Interrupt specifiers consists of 4 cells encoded as - follows: - - <1st-cell> interrupt-number - - Identifies the interrupt source. The meaning - depends on the type of interrupt. - - Note: If the interrupt-type cell is undefined - (i.e. #interrupt-cells = 2), this cell - should be interpreted the same as for - interrupt-type 0-- i.e. an external or - normal SoC device interrupt. - - <2nd-cell> level-sense information, encoded as follows: - 0 = low-to-high edge triggered - 1 = active low level-sensitive - 2 = active high level-sensitive - 3 = high-to-low edge triggered - - <3rd-cell> interrupt-type - - The following types are supported: - - 0 = external or normal SoC device interrupt - - The interrupt-number cell contains - the SoC device interrupt number. The - type-specific cell is undefined. The - interrupt-number is derived from the - MPIC a block of registers referred to as - the "Interrupt Source Configuration Registers". - Each source has 32-bytes of registers - (vector/priority and destination) in this - region. So interrupt 0 is at offset 0x0, - interrupt 1 is at offset 0x20, and so on. - - 1 = error interrupt - - The interrupt-number cell contains - the SoC device interrupt number for - the error interrupt. The type-specific - cell identifies the specific error - interrupt number. - - 2 = MPIC inter-processor interrupt (IPI) - - The interrupt-number cell identifies - the MPIC IPI number. The type-specific - cell is undefined. - - 3 = MPIC timer interrupt - - The interrupt-number cell identifies - the MPIC timer number. The type-specific - cell is undefined. - - <4th-cell> type-specific information - - The type-specific cell is encoded as follows: - - - For interrupt-type 1 (error interrupt), - the type-specific cell contains the - bit number of the error interrupt in the - Error Interrupt Summary Register. - -EXAMPLE 1 - /* - * mpic interrupt controller with 4 cells per specifier - */ - mpic: pic@40000 { - compatible = "fsl,mpic"; - interrupt-controller; - #interrupt-cells = <4>; - #address-cells = <0>; - reg = <0x40000 0x40000>; - }; - -EXAMPLE 2 - /* - * The MPC8544 I2C controller node has an internal - * interrupt number of 27. As per the reference manual - * this corresponds to interrupt source configuration - * registers at 0x5_0560. - * - * The interrupt source configuration registers begin - * at 0x5_0000. - * - * To compute the interrupt specifier interrupt number - * - * 0x560 >> 5 = 43 - * - * The interrupt source configuration registers begin - * at 0x5_0000, and so the i2c vector/priority registers - * are at 0x5_0560. - */ - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - -EXAMPLE 3 - /* - * Definition of a node defining the 4 - * MPIC IPI interrupts. Note the interrupt - * type of 2. - */ - ipi@410a0 { - compatible = "fsl,mpic-ipi"; - reg = <0x40040 0x10>; - interrupts = <0 0 2 0 - 1 0 2 0 - 2 0 2 0 - 3 0 2 0>; - }; - -EXAMPLE 4 - /* - * Definition of a node defining the MPIC - * global timers. Note the interrupt - * type of 3. - */ - timer0: timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x100 0x41300 4>; - interrupts = <0 0 3 0 - 1 0 3 0 - 2 0 3 0 - 3 0 3 0>; - }; - -EXAMPLE 5 - /* - * Definition of an error interrupt (interrupt type 1). - * SoC interrupt number is 16 and the specific error - * interrupt bit in the error interrupt summary register - * is 23. - */ - memory-controller@8000 { - compatible = "fsl,p4080-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; From 835bdddd028ff57afaee28eb5e4b260f714fd555 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 19 Aug 2025 12:53:16 -0400 Subject: [PATCH 15/81] dt-bindings: soc: add vf610 reboot syscon controller Add vf610 reboot controller, which used to reboot whole system. Fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/vf/vf610-bk4.dtb: /soc/bus@40000000/src@4006e000: failed to match any schema with compatible: ['fsl,vf610-src', 'syscon'] IC reference manual calls it as system reset controller(SRC), but it is not module as reset controller, which used to reset individual device. SRC works as reboot controller, which reboots whole system. It provides a syscon interface to syscon-reboot. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250819165317.3739366-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/soc/fsl/fsl,vf610-src.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml b/Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml new file mode 100644 index 000000000000..6fb93e8be929 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/fsl/fsl,vf610-src.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale vf610 System Reset Controller (SRC) + +maintainers: + - Frank Li + +description: + IC reference manual calls it as SRC, but it is not module as reset + controller, which used to reset individual device. SRC works as reboot + controller, which reboots whole system. It provides a syscon interface to + syscon-reboot. + +properties: + compatible: + items: + - enum: + - fsl,vf610-src + - const: syscon + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + + syscon@4006e000 { + compatible = "fsl,vf610-src", "syscon"; + reg = <0x4006e000 0x1000>; + interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; + }; + From 81bb4d07edd72a56180e2c8414ead0e63c379502 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 18 Aug 2025 15:25:35 +0200 Subject: [PATCH 16/81] docs: dt: writing-bindings: Document node name ABI and simple-mfd Document established Devicetree bindings maintainers review practice: 1. Device node names should not be treated as an ABI, unless for children of a device when documented. There were many patches posted using of_find_node_by_name() or of_node_name_eq() for accessing siblings or completely different nodes. These cases were introducing undocumented ABI, so they are discouraged. 2. 'simple-mfd' means children do not depend on parent device resources. 'simple-bus' is so simple, that even 'reg' properties are not applicable. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250818132534.120217-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/writing-bindings.rst | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/writing-bindings.rst b/Documentation/devicetree/bindings/writing-bindings.rst index f8e0293a7c06..667816dd7d50 100644 --- a/Documentation/devicetree/bindings/writing-bindings.rst +++ b/Documentation/devicetree/bindings/writing-bindings.rst @@ -31,10 +31,19 @@ Overall design devices only need child nodes when the child nodes have their own DT resources. A single node can be multiple providers (e.g. clocks and resets). +- DON'T treat device node names as a stable ABI, but instead use phandles or + compatibles to find sibling devices. Exception: sub-nodes of given device + could be treated as ABI, if explicitly documented in the bindings. + - DON'T use 'syscon' alone without a specific compatible string. A 'syscon' hardware block should have a compatible string unique enough to infer the register layout of the entire block (at a minimum). +- DON'T use 'simple-mfd' compatible for non-trivial devices, where children + depend on some resources from the parent. Similarly, 'simple-bus' should not + be used for complex buses and even 'regs' property means device is not + a simple bus. + Properties ========== From 75592f9e178915867829b7ec6eb20125924a4814 Mon Sep 17 00:00:00 2001 From: Santosh Mahto Date: Wed, 20 Aug 2025 23:40:13 +0530 Subject: [PATCH 17/81] docs: devicetree: fix typo in writing-schema.rst MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes a spelling mistake in writing-schema.rst: "interpretted" → "interpreted" Signed-off-by: Santosh Mahto Link: https://lore.kernel.org/r/20250820181013.17817-1-eisantosh95@gmail.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/writing-schema.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 470d1521fa17..fcd4726f8df4 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -53,7 +53,7 @@ description The default without any indicators is flowed, plain scalar style where single line breaks and leading whitespace are stripped. Paragraphs are delimited by blank lines (i.e. double line break). This style cannot contain ": " in it as - it will be interpretted as a key. Any " #" sequence will be interpretted as + it will be interpreted as a key. Any " #" sequence will be interpreted as a comment. There's other restrictions on characters as well. Most restrictions are on what the first character can be. From a6dcff26eb4dcb9178917c8c49b10265ee5f749c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 26 Apr 2024 14:54:37 -0500 Subject: [PATCH 18/81] yamllint: Drop excluding quoted values with ',' from checks Strings with commas were excluded from checks because yamllint had false positives for flow style maps and sequences which need quotes when values contain commas. This issue has been fixed as of the 1.34 release, so drop the work-around. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20240426195438.2771968-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/.yamllint | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/.yamllint b/Documentation/devicetree/bindings/.yamllint index fea5231e1320..532799501800 100644 --- a/Documentation/devicetree/bindings/.yamllint +++ b/Documentation/devicetree/bindings/.yamllint @@ -4,7 +4,7 @@ rules: quoted-strings: required: only-when-needed extra-allowed: - - '[$^,[]' + - '[$^[]' - '^/$' line-length: # 80 chars should be enough, but don't fail if a line is longer From 955212b1e4ac3f299c411ccd68cc702e55c4762d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 20 Aug 2025 16:17:36 +0200 Subject: [PATCH 19/81] dt-bindings: display: ingenic,jz4780-hdmi: Add missing clock-names The binding references synopsys,dw-hdmi.yaml schema which defines both 'clocks' and 'clock-names' with variable length, therefore we need here also same constraint for 'clock-names' as for 'clocks'. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-1-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) --- .../bindings/display/bridge/ingenic,jz4780-hdmi.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml index 0b27df429bdc..84df3cf239d5 100644 --- a/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml @@ -26,6 +26,9 @@ properties: clocks: maxItems: 2 + clock-names: + maxItems: 2 + ports: $ref: /schemas/graph.yaml#/properties/ports From 0387040b31aa6606cd9ef726ce4b11c5fa6079db Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 20 Aug 2025 16:17:37 +0200 Subject: [PATCH 20/81] dt-bindings: display: ti,tdp158: Add missing reg constraint Device can be used over I2C bus, so it documents 'reg' property, however it misses to constrain it to actual I2C address. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-2-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml b/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml index 1c522f72c4ba..721da44054e1 100644 --- a/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml @@ -17,6 +17,7 @@ properties: # The reg property is required if and only if the device is connected # to an I2C bus. In pin strap mode, reg must not be specified. reg: + maxItems: 1 description: I2C address of the device # Pin 36 = Operation Enable / Reset Pin From 0e44780b423afed8c35005b31536a7bb3c52f70f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 20 Aug 2025 16:17:38 +0200 Subject: [PATCH 21/81] dt-bindings: display: rockchip,dw-mipi-dsi: Narrow clocks for rockchip,rk3288-mipi-dsi The binding allows in top-level from one to four clocks and each variant narrows the choice, but rockchip,rk3288-mipi-dsi missed the minItems. Reviewed-by: Heiko Stuebner Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-3-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) --- .../bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml index 0881e82deb11..c59df3c1a3f7 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml @@ -97,9 +97,11 @@ allOf: then: properties: clocks: + minItems: 2 maxItems: 2 clock-names: + minItems: 2 maxItems: 2 - if: From a576a849d5f33356e0d8fd3eae4fbaf8869417e5 Mon Sep 17 00:00:00 2001 From: Lorenzo Pieralisi Date: Tue, 5 Aug 2025 15:34:43 +0200 Subject: [PATCH 22/81] of/irq: Convert of_msi_map_id() callers to of_msi_xlate() With the introduction of the of_msi_xlate() function, the OF layer provides an API to map a device ID and retrieve the MSI controller node the ID is mapped to with a single call. of_msi_map_id() is currently used to map a deviceID to a specific MSI controller node; of_msi_xlate() can be used for that purpose too, there is no need to keep the two functions. Convert of_msi_map_id() to of_msi_xlate() calls and update the of_msi_xlate() documentation to describe how the struct device_node pointer passed in should be set-up to either provide the MSI controller node target or receive its pointer upon mapping completion. Signed-off-by: Lorenzo Pieralisi Cc: Thomas Gleixner Cc: Rob Herring Cc: Marc Zyngier Acked-by: Thomas Gleixner Reviewed-by: Frank Li Link: https://lore.kernel.org/r/20250805133443.936955-1-lpieralisi@kernel.org Signed-off-by: Rob Herring (Arm) --- drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c | 2 +- drivers/of/irq.c | 25 +++++---------------- drivers/pci/msi/irqdomain.c | 2 +- include/linux/of_irq.h | 6 ----- 4 files changed, 7 insertions(+), 28 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c b/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c index 11549d85f23b..b5785472765a 100644 --- a/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c +++ b/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c @@ -30,7 +30,7 @@ static u32 fsl_mc_msi_domain_get_msi_id(struct irq_domain *domain, u32 out_id; of_node = irq_domain_get_of_node(domain); - out_id = of_node ? of_msi_map_id(&mc_dev->dev, of_node, mc_dev->icid) : + out_id = of_node ? of_msi_xlate(&mc_dev->dev, &of_node, mc_dev->icid) : iort_msi_map_id(&mc_dev->dev, mc_dev->icid); return out_id; diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 74aaea61de13..e7c12abd10ab 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -673,13 +673,14 @@ err: /** * of_msi_xlate - map a MSI ID and find relevant MSI controller node * @dev: device for which the mapping is to be done. - * @msi_np: Pointer to store the MSI controller node + * @msi_np: Pointer to target MSI controller node * @id_in: Device ID. * * Walk up the device hierarchy looking for devices with a "msi-map" - * property. If found, apply the mapping to @id_in. @msi_np pointed - * value must be NULL on entry, if an MSI controller is found @msi_np is - * initialized to the MSI controller node with a reference held. + * property. If found, apply the mapping to @id_in. + * If @msi_np points to a non-NULL device node pointer, only entries targeting + * that node will be matched; if it points to a NULL value, it will receive the + * device node of the first matching target phandle, with a reference held. * * Returns: The mapped MSI id. */ @@ -699,22 +700,6 @@ u32 of_msi_xlate(struct device *dev, struct device_node **msi_np, u32 id_in) return id_out; } -/** - * of_msi_map_id - Map a MSI ID for a device. - * @dev: device for which the mapping is to be done. - * @msi_np: device node of the expected msi controller. - * @id_in: unmapped MSI ID for the device. - * - * Walk up the device hierarchy looking for devices with a "msi-map" - * property. If found, apply the mapping to @id_in. - * - * Return: The mapped MSI ID. - */ -u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_in) -{ - return of_msi_xlate(dev, &msi_np, id_in); -} - /** * of_msi_map_get_device_domain - Use msi-map to find the relevant MSI domain * @dev: device for which the mapping is to be done. diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c index 0938ef7ebabf..555c61b1fc36 100644 --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -422,7 +422,7 @@ u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev) pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid); of_node = irq_domain_get_of_node(domain); - rid = of_node ? of_msi_map_id(&pdev->dev, of_node, rid) : + rid = of_node ? of_msi_xlate(&pdev->dev, &of_node, rid) : iort_msi_map_id(&pdev->dev, rid); return rid; diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index a480063c9cb1..1db8543dfc8a 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -55,7 +55,6 @@ extern struct irq_domain *of_msi_map_get_device_domain(struct device *dev, u32 bus_token); extern void of_msi_configure(struct device *dev, const struct device_node *np); extern u32 of_msi_xlate(struct device *dev, struct device_node **msi_np, u32 id_in); -u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_in); #else static inline void of_irq_init(const struct of_device_id *matches) { @@ -105,11 +104,6 @@ static inline u32 of_msi_xlate(struct device *dev, struct device_node **msi_np, { return id_in; } -static inline u32 of_msi_map_id(struct device *dev, - struct device_node *msi_np, u32 id_in) -{ - return id_in; -} #endif #if defined(CONFIG_OF_IRQ) || defined(CONFIG_SPARC) From 4ed46073274a5b23baf0b992c459762e28faf549 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 21 Aug 2025 17:21:33 -0500 Subject: [PATCH 23/81] dt-bindings: vendor-prefixes: Add undocumented vendor prefixes Add various vendor prefixes which are in use in compatible strings already. These were found by modifying vendor-prefixes.yaml into a schema to check compatible strings. The added prefixes doesn't include various duplicate prefixes in use such as "lge". Link: https://lore.kernel.org/r/20250821222136.1027269-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/vendor-prefixes.yaml | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 77160cd47f54..0f5273123650 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -86,6 +86,8 @@ patternProperties: description: Allegro DVT "^allegromicro,.*": description: Allegro MicroSystems, Inc. + "^alliedtelesis,.*": + description: Allied Telesis, Inc. "^alliedvision,.*": description: Allied Vision Technologies GmbH "^allo,.*": @@ -229,6 +231,8 @@ patternProperties: description: Bitmain Technologies "^blaize,.*": description: Blaize, Inc. + "^bluegiga,.*": + description: Bluegiga Technologies Ltd. "^blutek,.*": description: BluTek Power "^boe,.*": @@ -247,6 +251,8 @@ patternProperties: description: Bticino International "^buffalo,.*": description: Buffalo, Inc. + "^buglabs,.*": + description: Bug Labs, Inc. "^bur,.*": description: B&R Industrial Automation GmbH "^bytedance,.*": @@ -325,6 +331,8 @@ patternProperties: description: Conexant Systems, Inc. "^colorfly,.*": description: Colorful GRP, Shenzhen Xueyushi Technology Ltd. + "^compal,.*": + description: Compal Electronics, Inc. "^compulab,.*": description: CompuLab Ltd. "^comvetia,.*": @@ -353,6 +361,8 @@ patternProperties: description: Guangzhou China Star Optoelectronics Technology Co., Ltd "^csq,.*": description: Shenzen Chuangsiqi Technology Co.,Ltd. + "^csr,.*": + description: Cambridge Silicon Radio "^ctera,.*": description: CTERA Networks Intl. "^ctu,.*": @@ -455,6 +465,8 @@ patternProperties: description: Emtop Embedded Solutions "^eeti,.*": description: eGalax_eMPIA Technology Inc + "^egnite,.*": + description: egnite GmbH "^einfochips,.*": description: Einfochips "^eink,.*": @@ -485,8 +497,12 @@ patternProperties: description: Empire Electronix "^emtrion,.*": description: emtrion GmbH + "^enbw,.*": + description: Energie Baden-Württemberg AG "^enclustra,.*": description: Enclustra GmbH + "^endian,.*": + description: Endian SRL "^endless,.*": description: Endless Mobile, Inc. "^ene,.*": @@ -552,6 +568,8 @@ patternProperties: description: FocalTech Systems Co.,Ltd "^forlinx,.*": description: Baoding Forlinx Embedded Technology Co., Ltd. + "^foxlink,.*": + description: Foxlink Group "^freebox,.*": description: Freebox SAS "^freecom,.*": @@ -640,6 +658,10 @@ patternProperties: description: Haoyu Microelectronic Co. Ltd. "^hardkernel,.*": description: Hardkernel Co., Ltd + "^hce,.*": + description: HCE Engineering SRL + "^headacoustics,.*": + description: HEAD acoustics "^hechuang,.*": description: Shenzhen Hechuang Intelligent Co. "^hideep,.*": @@ -723,6 +745,8 @@ patternProperties: description: Shenzhen INANBO Electronic Technology Co., Ltd. "^incircuit,.*": description: In-Circuit GmbH + "^incostartec,.*": + description: INCOstartec GmbH "^indiedroid,.*": description: Indiedroid "^inet-tek,.*": @@ -931,6 +955,8 @@ patternProperties: description: Maxim Integrated Products "^maxlinear,.*": description: MaxLinear Inc. + "^maxtor,.*": + description: Maxtor Corporation "^mbvl,.*": description: Mobiveil Inc. "^mcube,.*": @@ -1094,6 +1120,8 @@ patternProperties: description: Nordic Semiconductor "^nothing,.*": description: Nothing Technology Limited + "^novatech,.*": + description: NovaTech Automation "^novatek,.*": description: Novatek "^novtech,.*": @@ -1189,6 +1217,8 @@ patternProperties: description: Pervasive Displays, Inc. "^phicomm,.*": description: PHICOMM Co., Ltd. + "^phontech,.*": + description: Phontech "^phytec,.*": description: PHYTEC Messtechnik GmbH "^picochip,.*": @@ -1273,6 +1303,8 @@ patternProperties: description: Ramtron International "^raspberrypi,.*": description: Raspberry Pi Foundation + "^raumfeld,.*": + description: Raumfeld GmbH "^raydium,.*": description: Raydium Semiconductor Corp. "^rda,.*": @@ -1311,6 +1343,8 @@ patternProperties: description: ROHM Semiconductor Co., Ltd "^ronbo,.*": description: Ronbo Electronics + "^ronetix,.*": + description: Ronetix GmbH "^roofull,.*": description: Shenzhen Roofull Technology Co, Ltd "^roseapplepi,.*": @@ -1337,8 +1371,12 @@ patternProperties: description: Schindler "^schneider,.*": description: Schneider Electric + "^schulercontrol,.*": + description: Schuler Group "^sciosense,.*": description: ScioSense B.V. + "^sdmc,.*": + description: SDMC Technology Co., Ltd "^seagate,.*": description: Seagate Technology PLC "^seeed,.*": @@ -1377,6 +1415,8 @@ patternProperties: description: Si-En Technology Ltd. "^si-linux,.*": description: Silicon Linux Corporation + "^sielaff,.*": + description: Sielaff GmbH & Co. "^siemens,.*": description: Siemens AG "^sifive,.*": @@ -1445,6 +1485,8 @@ patternProperties: description: SolidRun "^solomon,.*": description: Solomon Systech Limited + "^somfy,.*": + description: Somfy Systems Inc. "^sony,.*": description: Sony Corporation "^sophgo,.*": @@ -1515,6 +1557,8 @@ patternProperties: "^synopsys,.*": description: Synopsys, Inc. (deprecated, use snps) deprecated: true + "^taos,.*": + description: Texas Advanced Optoelectronic Solutions Inc. "^tbs,.*": description: TBS Technologies "^tbs-biometrics,.*": @@ -1545,6 +1589,8 @@ patternProperties: description: Teltonika Networks "^tempo,.*": description: Tempo Semiconductor + "^tenda,.*": + description: Shenzhen Tenda Technology Co., Ltd. "^terasic,.*": description: Terasic Inc. "^tesla,.*": @@ -1648,6 +1694,8 @@ patternProperties: description: V3 Semiconductor "^vaisala,.*": description: Vaisala + "^valve,.*": + description: Valve Corporation "^vamrs,.*": description: Vamrs Ltd. "^variscite,.*": @@ -1748,6 +1796,8 @@ patternProperties: description: Extreme Engineering Solutions (X-ES) "^xiaomi,.*": description: Xiaomi Technology Co., Ltd. + "^xicor,.*": + description: Xicor Inc. "^xillybus,.*": description: Xillybus Ltd. "^xingbangda,.*": From 8a72549c5b276849def80057a4b4789dbdb87ea6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 23 Aug 2025 18:32:59 +0200 Subject: [PATCH 24/81] dt-bindings: interrupt-controller: marvell,cp110-icu: Document address-cells The CP110 ICU children are interrupt controllers and can be referenced in interrupt-map properties (e.g. in arch/arm64/boot/dts/marvell/armada-cp11x.dtsi), thus the nodes should have address-cells property. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20250823163258.49648-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/marvell,cp110-icu.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml index 9d4f06f45372..ddfce217e119 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml @@ -49,6 +49,9 @@ patternProperties: reg: maxItems: 1 + '#address-cells': + const: 0 + '#interrupt-cells': const: 2 From f0aed6ffb3548a03dab9e608b2bd8ce07af4be9f Mon Sep 17 00:00:00 2001 From: Harikrishna Shenoy Date: Wed, 27 Aug 2025 16:55:39 +0530 Subject: [PATCH 25/81] dt-bindings: display: dsi-controller: add bridge to patternProperties Extend the DSI controller schema to allow bridge child nodes. This makes it possible to describe external bridge devices directly connected as DSI peripherals. Signed-off-by: Harikrishna Shenoy Link: https://lore.kernel.org/r/20250827112539.4001513-1-h-shenoy@ti.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/dsi-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/dsi-controller.yaml b/Documentation/devicetree/bindings/display/dsi-controller.yaml index 67ce10307ee0..bb4d6e9e7d0c 100644 --- a/Documentation/devicetree/bindings/display/dsi-controller.yaml +++ b/Documentation/devicetree/bindings/display/dsi-controller.yaml @@ -46,7 +46,7 @@ properties: const: 0 patternProperties: - "^panel@[0-3]$": + "^(panel|bridge)@[0-3]$": description: Panels connected to the DSI link type: object From 8b57a0aeccb1d31b82210384b1f2a3226145635f Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 27 Aug 2025 17:09:11 -0400 Subject: [PATCH 26/81] dt-bindings: arm: cpus: Allow fsl,soc-operating-points for i.MX6 The old i.MX6 (over 10 years) chip use fsl,soc-operating-points to get SoC's voltage and frequency information when cpu change frequency. Set fsl,soc-operating-points deprecated. Allow soc-supply property and set it deprecated. Fix bunch of CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6ul-prti6g.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250827210912.92029-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index bb1ab514924d..78cc920e83d4 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -347,10 +347,23 @@ properties: deprecated: true description: Use 'cpu-supply' instead + soc-supply: + deprecated: true + description: Only for i.MX6/7 Soc. + sram-supply: deprecated: true description: Use 'mem-supply' instead + fsl,soc-operating-points: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: FSL i.MX6 Soc operation-points when change cpu frequency + deprecated: true + items: + items: + - description: Frequency in kHz + - description: Voltage for OPP in uV + mediatek,cci: $ref: /schemas/types.yaml#/definitions/phandle description: Link to Mediatek Cache Coherent Interconnect From 0f356eb097c314710060dde9c4fae4fd516bc63a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 21 Aug 2025 13:06:40 -0500 Subject: [PATCH 27/81] dt-bindings: arm: Add Cortex-A320/A520AE/A720AE cores and PMU Add the recently introduced Cortex-A320/A520AE/A720AE core and PMU compatible strings. Link: https://lore.kernel.org/all/20250821190722.417639-1-robh@kernel.org/ Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 3 +++ Documentation/devicetree/bindings/arm/pmu.yaml | 3 +++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 78cc920e83d4..b1c6943e7d78 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -145,11 +145,14 @@ properties: - arm,cortex-a78 - arm,cortex-a78ae - arm,cortex-a78c + - arm,cortex-a320 - arm,cortex-a510 - arm,cortex-a520 + - arm,cortex-a520ae - arm,cortex-a710 - arm,cortex-a715 - arm,cortex-a720 + - arm,cortex-a720ae - arm,cortex-a725 - arm,cortex-m0 - arm,cortex-m0+ diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 295963a3cae7..9bb109e947dd 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -48,11 +48,14 @@ properties: - arm,cortex-a76-pmu - arm,cortex-a77-pmu - arm,cortex-a78-pmu + - arm,cortex-a320-pmu - arm,cortex-a510-pmu - arm,cortex-a520-pmu + - arm,cortex-a520ae-pmu - arm,cortex-a710-pmu - arm,cortex-a715-pmu - arm,cortex-a720-pmu + - arm,cortex-a720ae-pmu - arm,cortex-a725-pmu - arm,cortex-x1-pmu - arm,cortex-x2-pmu From 8e322143c30483a646f6e09434ebf0e33b315a4f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 13:32:39 +0200 Subject: [PATCH 28/81] dt-bindings: display: samsung: Drop S3C2410 Samsung S3C24xx family of SoCs was removed from Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250830113238.131006-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/samsung/samsung,fimd.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml index 075231716b2f..ff685031bb2c 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml @@ -15,7 +15,6 @@ maintainers: properties: compatible: enum: - - samsung,s3c2443-fimd - samsung,s3c6400-fimd - samsung,s5pv210-fimd - samsung,exynos3250-fimd From 93674298bede84898742f4f8836666a2bfd0ece4 Mon Sep 17 00:00:00 2001 From: Masaharu Noguchi Date: Tue, 2 Sep 2025 00:48:12 +0900 Subject: [PATCH 29/81] Documentation: fix typo 'Andorid' -> 'Android' in goldfish pipe binding This patch fixes a small typo in the goldfish pipe binding documentation: 'Andorid' -> 'Android'. Signed-off-by: Masaharu Noguchi Link: https://lore.kernel.org/r/20250901154812.570319-1-nogunix@gmail.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/goldfish/pipe.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/goldfish/pipe.txt b/Documentation/devicetree/bindings/goldfish/pipe.txt index e417a31a1ee3..5637ce701788 100644 --- a/Documentation/devicetree/bindings/goldfish/pipe.txt +++ b/Documentation/devicetree/bindings/goldfish/pipe.txt @@ -1,6 +1,6 @@ Android Goldfish QEMU Pipe -Andorid pipe virtual device generated by android emulator. +Android pipe virtual device generated by android emulator. Required properties: From cce65107897d699c78373b88f3fe94602f194d0e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 29 Aug 2025 18:04:40 -0500 Subject: [PATCH 30/81] dt-bindings: gpu: Convert aspeed,ast2400-gfx to DT schema Convert the ASpeed GFX Display Controller binding to DT schema format. There was a duplicate, incomplete binding in mfd which can be dropped. Add the missing 'aspeed,ast2600-gfx' compatible and 'syscon' property. Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20250829230442.1495926-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/gpu/aspeed,ast2400-gfx.yaml | 63 +++++++++++++++++++ .../devicetree/bindings/gpu/aspeed-gfx.txt | 41 ------------ .../devicetree/bindings/mfd/aspeed-gfx.txt | 17 ----- MAINTAINERS | 2 +- 4 files changed, 64 insertions(+), 59 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml delete mode 100644 Documentation/devicetree/bindings/gpu/aspeed-gfx.txt delete mode 100644 Documentation/devicetree/bindings/mfd/aspeed-gfx.txt diff --git a/Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml b/Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml new file mode 100644 index 000000000000..20a4e00086ee --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/aspeed,ast2400-gfx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED GFX Display Controller + +maintainers: + - Joel Stanley + +properties: + compatible: + items: + - enum: + - aspeed,ast2400-gfx + - aspeed,ast2500-gfx + - aspeed,ast2600-gfx + - const: syscon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + + memory-region: + maxItems: 1 + description: + a reserved-memory region to use for the framebuffer. + + syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to SCU + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - memory-region + +additionalProperties: false + +examples: + - | + #include + + display@1e6e6000 { + compatible = "aspeed,ast2500-gfx", "syscon"; + reg = <0x1e6e6000 0x1000>; + clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; + resets = <&syscon ASPEED_RESET_CRT1>; + interrupts = <0x19>; + memory-region = <&gfx_memory>; + }; diff --git a/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt b/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt deleted file mode 100644 index 958bdf962339..000000000000 --- a/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt +++ /dev/null @@ -1,41 +0,0 @@ -Device tree configuration for the GFX display device on the ASPEED SoCs - -Required properties: - - compatible - * Must be one of the following: - + aspeed,ast2500-gfx - + aspeed,ast2400-gfx - * In addition, the ASPEED pinctrl bindings require the 'syscon' property to - be present - - - reg: Physical base address and length of the GFX registers - - - interrupts: interrupt number for the GFX device - - - clocks: clock number used to generate the pixel clock - - - resets: reset line that must be released to use the GFX device - - - memory-region: - Phandle to a memory region to allocate from, as defined in - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt - - -Example: - -gfx: display@1e6e6000 { - compatible = "aspeed,ast2500-gfx", "syscon"; - reg = <0x1e6e6000 0x1000>; - reg-io-width = <4>; - clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; - resets = <&syscon ASPEED_RESET_CRT1>; - interrupts = <0x19>; - memory-region = <&gfx_memory>; -}; - -gfx_memory: framebuffer { - size = <0x01000000>; - alignment = <0x01000000>; - compatible = "shared-dma-pool"; - reusable; -}; diff --git a/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt b/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt deleted file mode 100644 index aea5370efd97..000000000000 --- a/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt +++ /dev/null @@ -1,17 +0,0 @@ -* Device tree bindings for Aspeed SoC Display Controller (GFX) - -The Aspeed SoC Display Controller primarily does as its name suggests, but also -participates in pinmux requests on the g5 SoCs. It is therefore considered a -syscon device. - -Required properties: -- compatible: "aspeed,ast2500-gfx", "syscon" -- reg: contains offset/length value of the GFX memory - region. - -Example: - -gfx: display@1e6e6000 { - compatible = "aspeed,ast2500-gfx", "syscon"; - reg = <0x1e6e6000 0x1000>; -}; diff --git a/MAINTAINERS b/MAINTAINERS index 4e6fa336ff70..f3dcc2f64bc7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7543,7 +7543,7 @@ M: Joel Stanley L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers) S: Supported T: git https://gitlab.freedesktop.org/drm/misc/kernel.git -F: Documentation/devicetree/bindings/gpu/aspeed-gfx.txt +F: Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml F: drivers/gpu/drm/aspeed/ DRM DRIVER FOR AST SERVER GRAPHICS CHIPS From c2cf36221021090e7b4757774f4e4c563f959fdb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 4 Sep 2025 10:38:17 +0200 Subject: [PATCH 31/81] dt-bindings: display: bridge: Reference DAI common schema Several display bridges (e.g. LVDS to HDMI converters) are used as sound Digital Audio Interface (DAI) and have '#sound-dai-cells', thus they should reference dai-common.yaml schema to allow common properties, like DAI name. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250904083816.48076-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/bridge/ite,it6263.yaml | 1 + .../devicetree/bindings/display/bridge/ite,it66121.yaml | 5 ++++- .../devicetree/bindings/display/bridge/lontium,lt9611.yaml | 5 ++++- .../devicetree/bindings/display/bridge/nxp,tda998x.yaml | 5 ++++- .../devicetree/bindings/display/bridge/sil,sii9022.yaml | 5 ++++- 5 files changed, 17 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml index 0a10e10d80ff..b98d942bbe19 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml @@ -28,6 +28,7 @@ description: | allOf: - $ref: /schemas/display/lvds-dual-ports.yaml# + - $ref: /schemas/sound/dai-common.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml index a7eb2603691f..ba644c30dcf4 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml @@ -84,7 +84,10 @@ required: - interrupts - ports -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml index 5b9d36f7af30..655db8cfdc25 100644 --- a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml @@ -69,7 +69,10 @@ required: - vcc-supply - ports -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml index b8e9cf6ce4e6..3fce9e698ea1 100644 --- a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml @@ -81,7 +81,10 @@ oneOf: - required: - ports -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml index 1509c4535e53..17ea06719b56 100644 --- a/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml +++ b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml @@ -109,7 +109,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | From 714380b03d38e1ca8c5d42f2da6292fae082a769 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Fri, 5 Sep 2025 12:41:57 -0400 Subject: [PATCH 32/81] bindings: siox: convert eckelmann,siox-gpio.txt to yaml format Convert eckelmann,siox-gpio.txt to yaml format. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250905164200.599448-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/siox/eckelmann,siox-gpio.txt | 19 -------- .../bindings/siox/eckelmann,siox-gpio.yaml | 48 +++++++++++++++++++ 2 files changed, 48 insertions(+), 19 deletions(-) delete mode 100644 Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt create mode 100644 Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml diff --git a/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt b/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt deleted file mode 100644 index 55259cf39c25..000000000000 --- a/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt +++ /dev/null @@ -1,19 +0,0 @@ -Eckelmann SIOX GPIO bus - -Required properties: -- compatible : "eckelmann,siox-gpio" -- din-gpios, dout-gpios, dclk-gpios, dld-gpios: references gpios for the - corresponding bus signals. - -Examples: - - siox { - compatible = "eckelmann,siox-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_siox>; - - din-gpios = <&gpio6 11 0>; - dout-gpios = <&gpio6 8 0>; - dclk-gpios = <&gpio6 9 0>; - dld-gpios = <&gpio6 10 0>; - }; diff --git a/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml b/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml new file mode 100644 index 000000000000..2ff204109b93 --- /dev/null +++ b/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/siox/eckelmann,siox-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Eckelmann SIOX GPIO bus + +maintainers: + - Frank Li + +properties: + compatible: + const: eckelmann,siox-gpio + + din-gpios: + maxItems: 1 + + dout-gpios: + maxItems: 1 + + dclk-gpios: + maxItems: 1 + + dld-gpios: + maxItems: 1 + +required: + - compatible + - din-gpios + - dout-gpios + - dclk-gpios + - dld-gpios + +additionalProperties: false + +examples: + - | + siox { + compatible = "eckelmann,siox-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_siox>; + + din-gpios = <&gpio6 11 0>; + dout-gpios = <&gpio6 8 0>; + dclk-gpios = <&gpio6 9 0>; + dld-gpios = <&gpio6 10 0>; + }; From bc3f7d0340f7cf32b53e40aeed25ac0c6a0e77e7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 7 Sep 2025 12:25:13 -0300 Subject: [PATCH 33/81] dt-bindings: arm: cpus: Document pu-supply The i.MX6Q Reference Manual describes the three digital LDO regulators as follows: "10.4.1.1.1 Digital LDO Regulators The integrated PMU includes three digital LDO regulators: LDO_ARM, LDO_PU, and LDO_SOC. These regulators provide power to the ARM_Core power domain, the combined VPU, IPU and GPU power domain, and the rest of the SoC logic (except always-ON SNVS domain)." imx6dl.dtsi uses the correct names to describe these supplies: arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; 'arm-supply' and 'soc-supply' are already documented, but 'pu-supply' is not. Document the 'pu-supply' property and set it to deprecated. This fixes the following dt-schema warning: cpu@1 (arm,cortex-a9): Unevaluated properties are not allowed ('pu-supply' was unexpected) Signed-off-by: Fabio Estevam Reviewed-by: Frank Li Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250907152513.590218-1-festevam@gmail.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index b1c6943e7d78..41ad4ed0e74c 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -350,6 +350,10 @@ properties: deprecated: true description: Use 'cpu-supply' instead + pu-supply: + deprecated: true + description: Only for i.MX6Q/DL/SL SoCs. + soc-supply: deprecated: true description: Only for i.MX6/7 Soc. From 3ef9c995fa51a90b08b0cc8d2951acb53c38936c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 4 Sep 2025 16:24:01 +0200 Subject: [PATCH 34/81] docs: dt: writing-schema: Describe defining properties in top-level Document established Devicetree bindings maintainers review practice: Properties having differences per each device in the binding, e.g. different constraints for lists or different allowed values, should still be defined in top-level 'properties' section and only customized in 'if:then:'. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250904142400.179955-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/writing-schema.rst | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index fcd4726f8df4..05c34248e544 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -165,6 +165,14 @@ The YAML Devicetree format also makes all string values an array and scalar values a matrix (in order to define groupings) even when only a single value is present. Single entries in schemas are fixed up to match this encoding. +When bindings cover multiple similar devices that differ in some properties, +those properties should be constrained for each device. This usually means: + + * In top level 'properties' define the property with the broadest constraints. + * In 'if:then:' blocks, further narrow the constraints for those properties. + * Do not define the properties within an 'if:then:' block (note that + 'additionalItems' also won't allow that). + Coding style ------------ From b132e9745e8cd5d383253dc3f21775d6cdea1fd8 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 7 Sep 2025 00:48:52 +0300 Subject: [PATCH 35/81] dt-bindings: dp-connector: describe separate DP and AUX lines In some cases it's reasonable to describe DP lanes and AUX signal lines separately in the DT. One of the typical reasons is if the source of DP signals can support either USB-C or DP connections. In such a case the transmitter of DP signals have separate ports: one for SS lanes and another one for SBU / AUX signals. Instead of leaving AUX signals from the controller unconnected, add an option to the DT schema to AUX signal lines separately from the main link lanes. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20250907-dp-conenctor-sbu-v1-1-de79c0fcd64d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../display/connector/dp-connector.yaml | 52 ++++++++++++++++++- 1 file changed, 51 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/connector/dp-connector.yaml b/Documentation/devicetree/bindings/display/connector/dp-connector.yaml index 22792a79e7ce..1f2b449dc910 100644 --- a/Documentation/devicetree/bindings/display/connector/dp-connector.yaml +++ b/Documentation/devicetree/bindings/display/connector/dp-connector.yaml @@ -31,10 +31,32 @@ properties: $ref: /schemas/graph.yaml#/properties/port description: Connection to controller providing DP signals + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: OF graph representation of signales routed to DP connector + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Connection to controller providing DP signals + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Connection to controller providing AUX signals + + required: + - port@0 + - port@1 + required: - compatible - type - - port + +oneOf: + - required: + - port + - required: + - ports additionalProperties: false @@ -52,4 +74,32 @@ examples: }; }; + - | + /* DP connecttor being driven by the USB+DP combo PHY */ + connector { + compatible = "dp-connector"; + label = "dp0"; + type = "full-size"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&phy_ss_out>; + }; + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&phy_sbu_out>; + }; + }; + }; + }; ... From 8a454c05632077e9bee51ddbf8a633739490e308 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 16:42:21 -0500 Subject: [PATCH 36/81] dt-bindings: watchdog: Drop duplicate moxa,moxart-watchdog.txt "moxa,moxart-watchdog" is already documented in faraday,ftwdt010.yaml, so drop the old text binding. Reviewed-by: Guenter Roeck Fixes: 289660a4af0e ("dt-bindings: watchdog: convert faraday,ftwdt010 to yaml") Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250807214222.4170236-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/watchdog/moxa,moxart-watchdog.txt | 15 --------------- 1 file changed, 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt diff --git a/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt b/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt deleted file mode 100644 index 1169857d1d12..000000000000 --- a/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt +++ /dev/null @@ -1,15 +0,0 @@ -MOXA ART Watchdog timer - -Required properties: - -- compatible : Must be "moxa,moxart-watchdog" -- reg : Should contain registers location and length -- clocks : Should contain phandle for the clock that drives the counter - -Example: - - watchdog: watchdog@98500000 { - compatible = "moxa,moxart-watchdog"; - reg = <0x98500000 0x10>; - clocks = <&coreclk>; - }; From 72289f57b071b35fa4fe48382ce30ea5c7d60ebc Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:13:46 -0500 Subject: [PATCH 37/81] dt-bindings: mailbox: Convert rockchip,rk3368-mailbox to DT schema Convert the rockchip,rk3368-mailbox binding to DT schema format. Add the missing 'clocks' and 'clock-names' properties. Document that it's one interrupt per mailbox channel (and there are 4 channels). Link: https://lore.kernel.org/r/20250812181348.62137-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../mailbox/rockchip,rk3368-mailbox.yaml | 56 +++++++++++++++++++ .../bindings/mailbox/rockchip-mailbox.txt | 32 ----------- 2 files changed, 56 insertions(+), 32 deletions(-) create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml delete mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt diff --git a/Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml new file mode 100644 index 000000000000..107bc96a8f3d --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/rockchip,rk3368-mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3368 Mailbox Controller + +maintainers: + - Heiko Stuebner + +description: + The Rockchip mailbox is used by the Rockchip CPU cores to communicate + requests to MCU processor. + +properties: + compatible: + const: rockchip,rk3368-mailbox + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: pclk_mailbox + + interrupts: + description: One interrupt for each channel + maxItems: 4 + + '#mbox-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + #include + + mailbox@ff6b0000 { + compatible = "rockchip,rk3368-mailbox"; + reg = <0xff6b0000 0x1000>; + interrupts = , + , + , + ; + #mbox-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt deleted file mode 100644 index b6bb84acf5be..000000000000 --- a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt +++ /dev/null @@ -1,32 +0,0 @@ -Rockchip mailbox - -The Rockchip mailbox is used by the Rockchip CPU cores to communicate -requests to MCU processor. - -Refer to ./mailbox.txt for generic information about mailbox device-tree -bindings. - -Required properties: - - - compatible: should be one of the following. - - "rockchip,rk3368-mbox" for rk3368 - - reg: physical base address of the controller and length of memory mapped - region. - - interrupts: The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. - - #mbox-cells: Common mailbox binding property to identify the number - of cells required for the mailbox specifier. Should be 1 - -Example: --------- - -/* RK3368 */ -mbox: mbox@ff6b0000 { - compatible = "rockchip,rk3368-mailbox"; - reg = <0x0 0xff6b0000 0x0 0x1000>, - interrupts = , - , - , - ; - #mbox-cells = <1>; -}; From cae18692965571a3ccf7582b6b661cebbcd0ccae Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:13:53 -0500 Subject: [PATCH 38/81] dt-bindings: mailbox: Convert marvell,armada-3700-rwtm-mailbox to DT schema Convert the Marvell Armada 3700 rWTM mailbox binding to DT schema format. It's a straightforward conversion. Link: https://lore.kernel.org/r/20250812181357.63395-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../marvell,armada-3700-rwtm-mailbox.txt | 16 ------- .../marvell,armada-3700-rwtm-mailbox.yaml | 42 +++++++++++++++++++ 2 files changed, 42 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt create mode 100644 Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt b/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt deleted file mode 100644 index 282ab81a4ea6..000000000000 --- a/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt +++ /dev/null @@ -1,16 +0,0 @@ -* rWTM BIU Mailbox driver for Armada 37xx - -Required properties: -- compatible: must be "marvell,armada-3700-rwtm-mailbox" -- reg: physical base address of the mailbox and length of memory mapped - region -- interrupts: the IRQ line for the mailbox -- #mbox-cells: must be 1 - -Example: - rwtm: mailbox@b0000 { - compatible = "marvell,armada-3700-rwtm-mailbox"; - reg = <0xb0000 0x100>; - interrupts = ; - #mbox-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml new file mode 100644 index 000000000000..0a07ed1b1beb --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/marvell,armada-3700-rwtm-mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 3700 rWTM Mailbox + +maintainers: + - Marek Behún + +properties: + compatible: + const: marvell,armada-3700-rwtm-mailbox + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#mbox-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + #include + + mailbox@b0000 { + compatible = "marvell,armada-3700-rwtm-mailbox"; + reg = <0xb0000 0x100>; + interrupts = ; + #mbox-cells = <1>; + }; From bc4f25b5b7c5a8b0f85b2840421590ad9260eda5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:04 -0500 Subject: [PATCH 39/81] dt-bindings: mailbox: Convert brcm,iproc-pdc-mbox to DT schema Convert the Broadcom iProc PDC mailbox binding to DT schema format. It's a straightforward conversion. Link: https://lore.kernel.org/r/20250812181406.65390-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/mailbox/brcm,iproc-pdc-mbox.txt | 25 ------- .../bindings/mailbox/brcm,iproc-pdc-mbox.yaml | 66 +++++++++++++++++++ 2 files changed, 66 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt deleted file mode 100644 index 9bcdf2087625..000000000000 --- a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt +++ /dev/null @@ -1,25 +0,0 @@ -The PDC driver manages data transfer to and from various offload engines -on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is -one device tree entry per block. On some chips, the PDC functionality is -handled by the FA2 (Northstar Plus). - -Required properties: -- compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for - FA2/Northstar Plus. -- reg: Should contain PDC registers location and length. -- interrupts: Should contain the IRQ line for the PDC. -- #mbox-cells: 1 -- brcm,rx-status-len: Length of metadata preceding received frames, in bytes. - -Optional properties: -- brcm,use-bcm-hdr: present if a BCM header precedes each frame. - -Example: - pdc0: iproc-pdc0@612c0000 { - compatible = "brcm,iproc-pdc-mbox"; - reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */ - interrupts = ; - #mbox-cells = <1>; /* one cell per mailbox channel */ - brcm,rx-status-len = <32>; - brcm,use-bcm-hdr; - }; diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml new file mode 100644 index 000000000000..5534ae07c9fa --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/brcm,iproc-pdc-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom iProc PDC mailbox + +maintainers: + - Ray Jui + - Scott Branden + +description: + The PDC driver manages data transfer to and from various offload engines on + some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is one + device tree entry per block. On some chips, the PDC functionality is handled + by the FA2 (Northstar Plus). + +properties: + compatible: + enum: + - brcm,iproc-pdc-mbox + - brcm,iproc-fa2-mbox + + reg: + maxItems: 1 + + dma-coherent: true + + interrupts: + maxItems: 1 + + '#mbox-cells': + const: 1 + + brcm,rx-status-len: + description: + Length of metadata preceding received frames, in bytes. + $ref: /schemas/types.yaml#/definitions/uint32 + + brcm,use-bcm-hdr: + type: boolean + description: + Present if a BCM header precedes each frame. + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + - brcm,rx-status-len + +additionalProperties: false + +examples: + - | + #include + + mailbox0@612c0000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0x612c0000 0x445>; + interrupts = ; + #mbox-cells = <1>; + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; From 930c78583d350bedcaa8fc2302e9d3c37a7f0700 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:13 -0500 Subject: [PATCH 40/81] dt-bindings: mailbox: Convert brcm,iproc-flexrm-mbox to DT schema Convert the Broadcom FlexRM Ring Manager binding to DT schema format. It's a straightforward conversion. Link: https://lore.kernel.org/r/20250812181415.66923-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../mailbox/brcm,iproc-flexrm-mbox.txt | 59 ----------------- .../mailbox/brcm,iproc-flexrm-mbox.yaml | 63 +++++++++++++++++++ 2 files changed, 63 insertions(+), 59 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt deleted file mode 100644 index bf0c998b8603..000000000000 --- a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt +++ /dev/null @@ -1,59 +0,0 @@ -Broadcom FlexRM Ring Manager -============================ -The Broadcom FlexRM ring manager provides a set of rings which can be -used to submit work to offload engines. An SoC may have multiple FlexRM -hardware blocks. There is one device tree entry per FlexRM block. The -FlexRM driver will create a mailbox-controller instance for given FlexRM -hardware block where each mailbox channel is a separate FlexRM ring. - -Required properties: --------------------- -- compatible: Should be "brcm,iproc-flexrm-mbox" -- reg: Specifies base physical address and size of the FlexRM - ring registers -- msi-parent: Phandles (and potential Device IDs) to MSI controllers - The FlexRM engine will send MSIs (instead of wired - interrupts) to CPU. There is one MSI for each FlexRM ring. - Refer devicetree/bindings/interrupt-controller/msi.txt -- #mbox-cells: Specifies the number of cells needed to encode a mailbox - channel. This should be 3. - - The 1st cell is the mailbox channel number. - - The 2nd cell contains MSI completion threshold. This is the - number of completion messages for which FlexRM will inject - one MSI interrupt to CPU. - - The 3rd cell contains MSI timer value representing time for - which FlexRM will wait to accumulate N completion messages - where N is the value specified by 2nd cell above. If FlexRM - does not get required number of completion messages in time - specified by this cell then it will inject one MSI interrupt - to CPU provided at least one completion message is available. - -Optional properties: --------------------- -- dma-coherent: Present if DMA operations made by the FlexRM engine (such - as DMA descriptor access, access to buffers pointed by DMA - descriptors and read/write pointer updates to DDR) are - cache coherent with the CPU. - -Example: --------- -crypto_mbox: mbox@67000000 { - compatible = "brcm,iproc-flexrm-mbox"; - reg = <0x67000000 0x200000>; - msi-parent = <&gic_its 0x7f00>; - #mbox-cells = <3>; -}; - -crypto@672c0000 { - compatible = "brcm,spu2-v2-crypto"; - reg = <0x672c0000 0x1000>; - mboxes = <&crypto_mbox 0 0x1 0xffff>, - <&crypto_mbox 1 0x1 0xffff>, - <&crypto_mbox 16 0x1 0xffff>, - <&crypto_mbox 17 0x1 0xffff>, - <&crypto_mbox 30 0x1 0xffff>, - <&crypto_mbox 31 0x1 0xffff>; -}; diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml new file mode 100644 index 000000000000..c801bd2e95f3 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/brcm,iproc-flexrm-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom FlexRM Ring Manager + +maintainers: + - Ray Jui + - Scott Branden + +description: + The Broadcom FlexRM ring manager provides a set of rings which can be used to + submit work to offload engines. An SoC may have multiple FlexRM hardware + blocks. There is one device tree entry per FlexRM block. The FlexRM driver + will create a mailbox-controller instance for given FlexRM hardware block + where each mailbox channel is a separate FlexRM ring. + +properties: + compatible: + const: brcm,iproc-flexrm-mbox + + reg: + maxItems: 1 + + msi-parent: + maxItems: 1 + + '#mbox-cells': + description: > + The 1st cell is the mailbox channel number. + + The 2nd cell contains MSI completion threshold. This is the number of + completion messages for which FlexRM will inject one MSI interrupt to CPU. + + The 3rd cell contains MSI timer value representing time for which FlexRM + will wait to accumulate N completion messages where N is the value + specified by 2nd cell above. If FlexRM does not get required number of + completion messages in time specified by this cell then it will inject one + MSI interrupt to CPU provided at least one completion message is + available. + const: 3 + + dma-coherent: true + +required: + - compatible + - reg + - msi-parent + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + mailbox@67000000 { + compatible = "brcm,iproc-flexrm-mbox"; + reg = <0x67000000 0x200000>; + msi-parent = <&gic_its 0x7f00>; + #mbox-cells = <3>; + dma-coherent; + }; From 638f9174e4bf8036e9167f4ff6b937cc5b842da6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:32:57 -0500 Subject: [PATCH 41/81] dt-bindings: watchdog: Convert marvell,armada-3700-wdt to DT schema Convert the Marvell Armada 3700 watchdog binding to DT schema format. It's a straight-forward conversion. Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20250812203301.726374-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/watchdog/armada-37xx-wdt.txt | 23 ----------- .../watchdog/marvell,armada-3700-wdt.yaml | 41 +++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 42 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt b/Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt deleted file mode 100644 index a8d00c31a1d8..000000000000 --- a/Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Armada 37xx CPU Watchdog Timer Controller - -Required properties: -- compatible : must be "marvell,armada-3700-wdt" -- reg : base physical address of the controller and length of memory mapped - region. -- clocks : the clock feeding the watchdog timer. See clock-bindings.txt -- marvell,system-controller : reference to syscon node for the CPU Miscellaneous - Registers - -Example: - - cpu_misc: system-controller@d000 { - compatible = "marvell,armada-3700-cpu-misc", "syscon"; - reg = <0xd000 0x1000>; - }; - - wdt: watchdog@8300 { - compatible = "marvell,armada-3700-wdt"; - reg = <0x8300 0x40>; - marvell,system-controller = <&cpu_misc>; - clocks = <&xtalclk>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml b/Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml new file mode 100644 index 000000000000..60d44d642fb5 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/marvell,armada-3700-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Armada 37xx CPU Watchdog Timer Controller + +maintainers: + - Marek Behún + +properties: + compatible: + const: marvell,armada-3700-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + marvell,system-controller: + description: Reference to syscon node for the CPU Miscellaneous Registers + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - reg + - clocks + - marvell,system-controller + +additionalProperties: false + +examples: + - | + watchdog@8300 { + compatible = "marvell,armada-3700-wdt"; + reg = <0x8300 0x40>; + marvell,system-controller = <&cpu_misc>; + clocks = <&xtalclk>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index f3dcc2f64bc7..deb11270f20d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2623,7 +2623,7 @@ F: Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt F: Documentation/devicetree/bindings/firmware/cznic,turris-omnia-mcu.yaml F: Documentation/devicetree/bindings/interrupt-controller/marvell,mpic.yaml F: Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml -F: Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt +F: Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml F: drivers/bus/moxtet.c F: drivers/firmware/turris-mox-rwtm.c F: drivers/gpio/gpio-moxtet.c From c72504a22e1c4d87b3addc73db2f6e51a4b78b88 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 22 Aug 2025 17:56:44 -0500 Subject: [PATCH 42/81] dt-bindings: thermal: Convert marvell,armada370-thermal to DT schema Convert the Marvell Armada 3xx/XP thermal binding to schema. Drop the AP80x and CP110 as they have long been deprecated and have been replaced by a new binding. Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20250822225645.766397-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/thermal/armada-thermal.txt | 42 ------------------- .../thermal/marvell,armada370-thermal.yaml | 37 ++++++++++++++++ 2 files changed, 37 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/armada-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/armada-thermal.txt b/Documentation/devicetree/bindings/thermal/armada-thermal.txt deleted file mode 100644 index ab8b8fccc7af..000000000000 --- a/Documentation/devicetree/bindings/thermal/armada-thermal.txt +++ /dev/null @@ -1,42 +0,0 @@ -* Marvell Armada 370/375/380/XP thermal management - -Required properties: - -- compatible: Should be set to one of the following: - * marvell,armada370-thermal - * marvell,armada375-thermal - * marvell,armada380-thermal - * marvell,armadaxp-thermal - * marvell,armada-ap806-thermal - * marvell,armada-ap807-thermal - * marvell,armada-cp110-thermal - -Note: these bindings are deprecated for AP806/CP110 and should instead -follow the rules described in: -Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt -Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt - -- reg: Device's register space. - Two entries are expected, see the examples below. The first one points - to the status register (4B). The second one points to the control - registers (8B). - Note: The compatibles marvell,armada370-thermal, - marvell,armada380-thermal, and marvell,armadaxp-thermal must point to - "control MSB/control 1", with size of 4 (deprecated binding), or point - to "control LSB/control 0" with size of 8 (current binding). All other - compatibles must point to "control LSB/control 0" with size of 8. - -Examples: - - /* Legacy bindings */ - thermal@d0018300 { - compatible = "marvell,armada370-thermal"; - reg = <0xd0018300 0x4 - 0xd0018304 0x4>; - }; - - ap_thermal: thermal@6f8084 { - compatible = "marvell,armada-ap806-thermal"; - reg = <0x6f808C 0x4>, - <0x6f8084 0x8>; - }; diff --git a/Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml b/Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml new file mode 100644 index 000000000000..337792859448 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/marvell,armada370-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 3xx/XP thermal management + +maintainers: + - Miquel Raynal + +properties: + compatible: + enum: + - marvell,armada370-thermal + - marvell,armada375-thermal + - marvell,armada380-thermal + - marvell,armadaxp-thermal + + reg: + items: + - description: status register (4B) + - description: control register (8B) + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + thermal@d0018300 { + compatible = "marvell,armada370-thermal"; + reg = <0xd0018300 0x4>, + <0xd0018304 0x8>; + }; From 047170ac08d6fa250209bed7c105d0443f1e0d81 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 22 Aug 2025 17:57:00 -0500 Subject: [PATCH 43/81] dt-binding: thermal: Convert marvell,armada-ap806-thermal to DT schema Convert the Marvell Armada AP80x/CP110 thermal binding to schema. It is a straight forward conversion. Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20250822225701.766947-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../arm/marvell/ap80x-system-controller.txt | 39 ---------------- .../arm/marvell/cp110-system-controller.txt | 43 ----------------- .../thermal/marvell,armada-ap806-thermal.yaml | 46 +++++++++++++++++++ 3 files changed, 46 insertions(+), 82 deletions(-) create mode 100644 Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt index c83245065d44..72de11bd2ef0 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt @@ -115,45 +115,6 @@ ap_syscon: system-controller@6f4000 { SYSTEM CONTROLLER 1 =================== -Thermal: --------- - -For common binding part and usage, refer to -Documentation/devicetree/bindings/thermal/thermal*.yaml - -The thermal IP can probe the temperature all around the processor. It -may feature several channels, each of them wired to one sensor. - -It is possible to setup an overheat interrupt by giving at least one -critical point to any subnode of the thermal-zone node. - -Required properties: -- compatible: must be one of: - * marvell,armada-ap806-thermal -- reg: register range associated with the thermal functions. - -Optional properties: -- interrupts: overheat interrupt handle. Should point to line 18 of the - SEI irqchip. See interrupt-controller/interrupts.txt -- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer - to this IP and represents the channel ID. There is one sensor per - channel. O refers to the thermal IP internal channel, while positive - IDs refer to each CPU. - -Example: -ap_syscon1: system-controller@6f8000 { - compatible = "syscon", "simple-mfd"; - reg = <0x6f8000 0x1000>; - - ap_thermal: thermal-sensor@80 { - compatible = "marvell,armada-ap806-thermal"; - reg = <0x80 0x10>; - interrupt-parent = <&sei>; - interrupts = <18>; - #thermal-sensor-cells = <1>; - }; -}; - Cluster clocks: --------------- diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt index 9d5d70c98058..54ff9f218328 100644 --- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt @@ -189,46 +189,3 @@ CP110_LABEL(syscon0): system-controller@440000 { }; }; - -SYSTEM CONTROLLER 1 -=================== - -Thermal: --------- - -The thermal IP can probe the temperature all around the processor. It -may feature several channels, each of them wired to one sensor. - -It is possible to setup an overheat interrupt by giving at least one -critical point to any subnode of the thermal-zone node. - -For common binding part and usage, refer to -Documentation/devicetree/bindings/thermal/thermal*.yaml - -Required properties: -- compatible: must be one of: - * marvell,armada-cp110-thermal -- reg: register range associated with the thermal functions. - -Optional properties: -- interrupts-extended: overheat interrupt handle. Should point to - a line of the ICU-SEI irqchip (116 is what is usually used by the - firmware). The ICU-SEI will redirect towards interrupt line #37 of the - AP SEI which is shared across all CPs. - See interrupt-controller/interrupts.txt -- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer - to this IP and represents the channel ID. There is one sensor per - channel. O refers to the thermal IP internal channel. - -Example: -CP110_LABEL(syscon1): system-controller@6f8000 { - compatible = "syscon", "simple-mfd"; - reg = <0x6f8000 0x1000>; - - CP110_LABEL(thermal): thermal-sensor@70 { - compatible = "marvell,armada-cp110-thermal"; - reg = <0x70 0x10>; - interrupts-extended = <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>; - #thermal-sensor-cells = <1>; - }; -}; diff --git a/Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml b/Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml new file mode 100644 index 000000000000..2c370317a40e --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/marvell,armada-ap806-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada AP80x/CP110 thermal management + +maintainers: + - Miquel Raynal + +properties: + compatible: + enum: + - marvell,armada-ap806-thermal + - marvell,armada-ap807-thermal + - marvell,armada-cp110-thermal + + reg: + maxItems: 1 + + interrupts: + description: + Overheat interrupt. The interrupt is connected thru a System Error + Interrupt (SEI) controller. + maxItems: 1 + + '#thermal-sensor-cells': + description: Cell represents the channel ID. There is one sensor per + channel. O refers to the thermal IP internal channel. + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + thermal-sensor@80 { + compatible = "marvell,armada-ap806-thermal"; + reg = <0x80 0x10>; + interrupts = <18>; + #thermal-sensor-cells = <1>; + }; From d27ce63a31c3c9b221287844c41088e499042199 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 28 Aug 2025 17:30:21 -0500 Subject: [PATCH 44/81] dt-bindings: edac: Convert apm,xgene-edac to DT schema Convert the APM XGene EDAC binding to DT schema. Add the missing "apm,xgene-edac-soc" compatible, and drop the unused "apm,xgene-edac-pmd-v2" compatible. Link: https://lore.kernel.org/r/20250828223023.2409337-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/edac/apm,xgene-edac.yaml | 203 ++++++++++++++++++ .../bindings/edac/apm-xgene-edac.txt | 112 ---------- MAINTAINERS | 2 +- 3 files changed, 204 insertions(+), 113 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml delete mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt diff --git a/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml b/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml new file mode 100644 index 000000000000..9afc78254cc0 --- /dev/null +++ b/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml @@ -0,0 +1,203 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/apm,xgene-edac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC EDAC + +maintainers: + - Khuong Dinh + +description: > + EDAC node is defined to describe on-chip error detection and correction. + + The following error types are supported: + + memory controller - Memory controller + PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache + L3 - L3 cache controller + SoC - SoC IPs such as Ethernet, SATA, etc + +properties: + compatible: + const: apm,xgene-edac + + reg: + items: + - description: CPU bus (PCP) resource + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + + ranges: true + + interrupts: + description: Interrupt-specifier for MCU, PMD, L3, or SoC error IRQ(s). + items: + - description: MCU error IRQ + - description: PMD error IRQ + - description: L3 error IRQ + - description: SoC error IRQ + minItems: 1 + + regmap-csw: + description: Regmap of the CPU switch fabric (CSW) resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcba: + description: Regmap of the MCB-A (memory bridge) resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcbb: + description: Regmap of the MCB-B (memory bridge) resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-efuse: + description: Regmap of the PMD efuse resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-rb: + description: Regmap of the register bus resource (optional for compatibility). + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - regmap-csw + - regmap-mcba + - regmap-mcbb + - regmap-efuse + - reg + - interrupts + +# Child-node bindings +patternProperties: + '^edacmc@': + description: Memory controller subnode + type: object + additionalProperties: false + + properties: + compatible: + const: apm,xgene-edac-mc + + reg: + maxItems: 1 + + memory-controller: + description: Instance number of the memory controller. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + required: + - compatible + - reg + - memory-controller + + + '^edacpmd@': + description: PMD subnode + type: object + additionalProperties: false + + properties: + compatible: + const: apm,xgene-edac-pmd + + reg: + maxItems: 1 + + pmd-controller: + description: Instance number of the PMD controller. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + required: + - compatible + - reg + - pmd-controller + + '^edacl3@': + description: L3 subnode + type: object + additionalProperties: false + + properties: + compatible: + enum: + - apm,xgene-edac-l3 + - apm,xgene-edac-l3-v2 + + reg: + maxItems: 1 + + required: + - compatible + - reg + + '^edacsoc@': + description: SoC subnode + type: object + additionalProperties: false + + properties: + compatible: + enum: + - apm,xgene-edac-soc + - apm,xgene-edac-soc-v1 + + reg: + maxItems: 1 + + required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + edac@78800000 { + compatible = "apm,xgene-edac"; + reg = <0x0 0x78800000 0x0 0x100>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupts = <0x0 0x20 0x4>, <0x0 0x21 0x4>, <0x0 0x27 0x4>; + + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + regmap-efuse = <&efuse>; + regmap-rb = <&rb>; + + edacmc@7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e800000 0x0 0x1000>; + memory-controller = <0>; + }; + + edacpmd@7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c000000 0x0 0x200000>; + pmd-controller = <0>; + }; + + edacl3@7e600000 { + compatible = "apm,xgene-edac-l3"; + reg = <0x0 0x7e600000 0x0 0x1000>; + }; + + edacsoc@7e930000 { + compatible = "apm,xgene-edac-soc-v1"; + reg = <0x0 0x7e930000 0x0 0x1000>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt b/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt deleted file mode 100644 index 1006b0489464..000000000000 --- a/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +++ /dev/null @@ -1,112 +0,0 @@ -* APM X-Gene SoC EDAC node - -EDAC node is defined to describe on-chip error detection and correction. -The follow error types are supported: - - memory controller - Memory controller - PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache - L3 - L3 cache controller - SoC - SoC IP's such as Ethernet, SATA, and etc - -The following section describes the EDAC DT node binding. - -Required properties: -- compatible : Shall be "apm,xgene-edac". -- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. -- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. -- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. -- regmap-efuse : Regmap of the PMD efuse resource. -- regmap-rb : Regmap of the register bus resource. This property - is optional only for compatibility. If the RB - error conditions are not cleared, it will - continuously generate interrupt. -- reg : First resource shall be the CPU bus (PCP) resource. -- interrupts : Interrupt-specifier for MCU, PMD, L3, or SoC error - IRQ(s). - -Required properties for memory controller subnode: -- compatible : Shall be "apm,xgene-edac-mc". -- reg : First resource shall be the memory controller unit - (MCU) resource. -- memory-controller : Instance number of the memory controller. - -Required properties for PMD subnode: -- compatible : Shall be "apm,xgene-edac-pmd" or - "apm,xgene-edac-pmd-v2". -- reg : First resource shall be the PMD resource. -- pmd-controller : Instance number of the PMD controller. - -Required properties for L3 subnode: -- compatible : Shall be "apm,xgene-edac-l3" or - "apm,xgene-edac-l3-v2". -- reg : First resource shall be the L3 EDAC resource. - -Required properties for SoC subnode: -- compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or - "apm,xgene-edac-l3-soc" for general value reporting - only. -- reg : First resource shall be the SoC EDAC resource. - -Example: - csw: csw@7e200000 { - compatible = "apm,xgene-csw", "syscon"; - reg = <0x0 0x7e200000 0x0 0x1000>; - }; - - mcba: mcba@7e700000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e700000 0x0 0x1000>; - }; - - mcbb: mcbb@7e720000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e720000 0x0 0x1000>; - }; - - efuse: efuse@1054a000 { - compatible = "apm,xgene-efuse", "syscon"; - reg = <0x0 0x1054a000 0x0 0x20>; - }; - - rb: rb@7e000000 { - compatible = "apm,xgene-rb", "syscon"; - reg = <0x0 0x7e000000 0x0 0x10>; - }; - - edac@78800000 { - compatible = "apm,xgene-edac"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - regmap-csw = <&csw>; - regmap-mcba = <&mcba>; - regmap-mcbb = <&mcbb>; - regmap-efuse = <&efuse>; - regmap-rb = <&rb>; - reg = <0x0 0x78800000 0x0 0x100>; - interrupts = <0x0 0x20 0x4>, - <0x0 0x21 0x4>, - <0x0 0x27 0x4>; - - edacmc@7e800000 { - compatible = "apm,xgene-edac-mc"; - reg = <0x0 0x7e800000 0x0 0x1000>; - memory-controller = <0>; - }; - - edacpmd@7c000000 { - compatible = "apm,xgene-edac-pmd"; - reg = <0x0 0x7c000000 0x0 0x200000>; - pmd-controller = <0>; - }; - - edacl3@7e600000 { - compatible = "apm,xgene-edac-l3"; - reg = <0x0 0x7e600000 0x0 0x1000>; - }; - - edacsoc@7e930000 { - compatible = "apm,xgene-edac-soc-v1"; - reg = <0x0 0x7e930000 0x0 0x1000>; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index deb11270f20d..2e1a079e24bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1872,7 +1872,7 @@ F: arch/arm64/boot/dts/apm/ APPLIED MICRO (APM) X-GENE SOC EDAC M: Khuong Dinh S: Supported -F: Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +F: Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml F: drivers/edac/xgene_edac.c APPLIED MICRO (APM) X-GENE SOC ETHERNET (V2) DRIVER From 9b4bacf5d998a9222cab8f9cd3b851ccba0d9351 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:54 -0300 Subject: [PATCH 45/81] dt-bindings: display: mediatek,od: Add mediatek,gce-client-reg property Currently, users of Mediatek OD (display overdrive) DT bindings set mediatek,gce-client-reg node property, which is missing from the DT schema. For example, device tree arch/arm64/boot/dts/mediatek/mt8173.dtsi is causing the following dtb check error: arch/arm64/boot/dts/mediatek/mt8173-elm.dtb: od@14023000 (mediatek,mt8173-disp-od): 'mediatek,gce-client-reg' does not match any of the regexes: '^pinctrl-[0-9]+$' This commit adds the missing node property in the DT schema and updates the example as well. Signed-off-by: Ariel D'Alessandro Link: https://lore.kernel.org/r/20250911151001.108744-6-ariel.dalessandro@collabora.com Signed-off-by: Rob Herring (Arm) --- .../bindings/display/mediatek/mediatek,od.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml index 71534febd49c..930c088a722a 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml @@ -60,6 +60,18 @@ properties: - port@0 - port@1 + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: describes how to locate the GCE client register + items: + - items: + - description: Phandle reference to a Mediatek GCE Mailbox + - description: + GCE subsys id mapping to a client defined in header + include/dt-bindings/gce/-gce.h. + - description: offset for the GCE register offset + - description: size of the GCE register offset + required: - compatible - reg @@ -70,6 +82,7 @@ additionalProperties: false examples: - | #include + #include soc { #address-cells = <2>; @@ -79,5 +92,6 @@ examples: compatible = "mediatek,mt8173-disp-od"; reg = <0 0x14023000 0 0x1000>; clocks = <&mmsys CLK_MM_DISP_OD>; + mediatek,gce-client-reg = <&gce SUBSYS_1402XXXX 0x3000 0x1000>; }; }; From 2ad572d3a5b340770672aee9aa3c4941d3df737d Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:55 -0300 Subject: [PATCH 46/81] dt-bindings: display: mediatek,ufoe: Add mediatek,gce-client-reg property Currently, users of Mediatek UFOe (Unified Frame Optimization engine) DT bindings set mediatek,gce-client-reg node property, which is missing from the DT schema. For example, device tree arch/arm64/boot/dts/mediatek/mt8173.dtsi is causing the following dtb check error: arch/arm64/boot/dts/mediatek/mt8173-elm.dtb: ufoe@1401a000 (mediatek,mt8173-disp-ufoe): 'mediatek,gce-client-reg' does not match any of the regexes: '^pinctrl-[0-9]+$' This commit adds the missing node property in the DT schema and updates the example as well. Signed-off-by: Ariel D'Alessandro Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250911151001.108744-7-ariel.dalessandro@collabora.com Signed-off-by: Rob Herring (Arm) --- .../bindings/display/mediatek/mediatek,ufoe.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml index 61a5e22effbf..036a66ed42e7 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml @@ -64,6 +64,18 @@ properties: - port@0 - port@1 + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: describes how to locate the GCE client register + items: + - items: + - description: Phandle reference to a Mediatek GCE Mailbox + - description: + GCE subsys id mapping to a client defined in header + include/dt-bindings/gce/-gce.h. + - description: offset for the GCE register offset + - description: size of the GCE register offset + required: - compatible - reg @@ -77,7 +89,9 @@ examples: - | #include #include + #include #include + soc { #address-cells = <2>; #size-cells = <2>; @@ -88,5 +102,6 @@ examples: interrupts = ; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_UFOE>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xa000 0x1000>; }; }; From 11f8652b7112ee2deba436045ef9b847cbb415a6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 21 Aug 2025 13:06:40 -0500 Subject: [PATCH 47/81] dt-bindings: arm: Add Arm C1 cores and PMUs Add the newly introduced Arm C1-Nano/Pro/Premium/Ultra core and PMU compatible strings. These cores are part of the Lumex CSS. The new names are replacing the long lived Cortex-A/X branding going forward. Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 4 ++++ Documentation/devicetree/bindings/arm/pmu.yaml | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 41ad4ed0e74c..c1036dcfc912 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -123,6 +123,10 @@ properties: - arm,arm1176jzf-s - arm,arm11mpcore - arm,armv8 # Only for s/w models + - arm,c1-nano + - arm,c1-premium + - arm,c1-pro + - arm,c1-ultra - arm,cortex-a5 - arm,cortex-a7 - arm,cortex-a8 diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 9bb109e947dd..f47baaefcdac 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -28,6 +28,10 @@ properties: - arm,arm1136-pmu - arm,arm1176-pmu - arm,arm11mpcore-pmu + - arm,c1-nano-pmu + - arm,c1-premium-pmu + - arm,c1-pro-pmu + - arm,c1-ultra-pmu - arm,cortex-a5-pmu - arm,cortex-a7-pmu - arm,cortex-a8-pmu From 537e189f2708864e21c9be7109e1f454b956370c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 9 Sep 2025 09:21:59 -0500 Subject: [PATCH 48/81] dt-bindings: watchdog: Convert nuvoton,npcm-wdt to DT schema Convert the Nuvoton watchdog binding to DT schema format. It's a straight-forward conversion. Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20250909142201.3209482-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/watchdog/nuvoton,npcm-wdt.txt | 30 ---------- .../watchdog/nuvoton,npcm750-wdt.yaml | 60 +++++++++++++++++++ 2 files changed, 60 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt deleted file mode 100644 index 866a958b8a2b..000000000000 --- a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt +++ /dev/null @@ -1,30 +0,0 @@ -Nuvoton NPCM Watchdog - -Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog. -The watchdog supports a pre-timeout interrupt that fires 10ms before the -expiry. - -Required properties: -- compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or - "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or - "nuvoton,npcm845-wdt" for NPCM845 (Arbel). -- reg : Offset and length of the register set for the device. -- interrupts : Contain the timer interrupt with flags for - falling edge. - -Required clocking property, have to be one of: -- clocks : phandle of timer reference clock. -- clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx - timer (usually 25000000). - -Optional properties: -- timeout-sec : Contains the watchdog timeout in seconds - -Example: - -timer@f000801c { - compatible = "nuvoton,npcm750-wdt"; - interrupts = ; - reg = <0xf000801c 0x4>; - clocks = <&clk NPCM7XX_CLK_TIMER>; -}; diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml new file mode 100644 index 000000000000..7aa30f5b5c49 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/nuvoton,npcm750-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM Watchdog + +maintainers: + - Joel Stanley + +description: + Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog. + The watchdog supports a pre-timeout interrupt that fires 10ms before the + expiry. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + oneOf: + - enum: + - nuvoton,npcm750-wdt + - nuvoton,wpcm450-wdt + - items: + - enum: + - nuvoton,npcm845-wdt + - const: nuvoton,npcm750-wdt + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + description: Frequency in Hz of the clock that drives the NPCM timer. + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + + watchdog@f000801c { + compatible = "nuvoton,npcm750-wdt"; + interrupts = ; + reg = <0xf000801c 0x4>; + clocks = <&clk NPCM7XX_CLK_TIMER>; + }; From ae28e0b895bb4fa78390ac9ad799a3fcd0ec11d2 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:00 -0500 Subject: [PATCH 49/81] dt-bindings: arm: marvell: Convert marvell,armada-370-xp boards to DT schema Convert Marvell Armada 370/XP based boards to DT schema format. Acked-by: Gregory CLEMENT Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/98dx3236.txt | 23 ------ .../bindings/arm/marvell/armada-370-xp.txt | 24 ------ .../arm/marvell/marvell,armada-370-xp.yaml | 78 +++++++++++++++++++ 3 files changed, 78 insertions(+), 47 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/98dx3236.txt delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt b/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt deleted file mode 100644 index 64e8c73fc5ab..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt +++ /dev/null @@ -1,23 +0,0 @@ -Marvell 98DX3236, 98DX3336 and 98DX4251 Platforms Device Tree Bindings ----------------------------------------------------------------------- - -Boards with a SoC of the Marvell 98DX3236, 98DX3336 and 98DX4251 families -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp-98dx3236" - -In addition, boards using the Marvell 98DX3336 SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp-98dx3336" - -In addition, boards using the Marvell 98DX4251 SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp-98dx4251" diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt b/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt deleted file mode 100644 index c6ed90ea6e17..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt +++ /dev/null @@ -1,24 +0,0 @@ -Marvell Armada 370 and Armada XP Platforms Device Tree Bindings ---------------------------------------------------------------- - -Boards with a SoC of the Marvell Armada 370 and Armada XP families -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,armada-370-xp" - -In addition, boards using the Marvell Armada 370 SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armada370" - -In addition, boards using the Marvell Armada XP SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp" - diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml new file mode 100644 index 000000000000..e65eadfbd097 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,armada-370-xp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 370 and Armada XP platforms + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - ctera,c200-v2 + - dlink,dns327l + - globalscale,mirabox + - netgear,readynas-102 + - netgear,readynas-104 + - marvell,a370-db + - marvell,a370-rd + - seagate,dart-2 + - seagate,dart-4 + - seagate,cumulus-max + - seagate,cumulus + - synology,ds213j + - const: marvell,armada370 + - const: marvell,armada-370-xp + + - items: + - enum: + - mikrotik,crs305-1g-4s + - mikrotik,crs326-24g-2s + - mikrotik,crs328-4c-20s-4s + - const: marvell,armadaxp-98dx3236 + - const: marvell,armada-370-xp + + - items: + - const: marvell,db-xc3-24g4xg + - const: marvell,armadaxp-98dx3336 + - const: marvell,armada-370-xp + + - items: + - const: marvell,db-dxbc2 + - const: marvell,armadaxp-98dx4251 + - const: marvell,armada-370-xp + + - items: + - enum: + - lenovo,ix4-300d + - linksys,mamba + - marvell,rd-axpwifiap + - netgear,readynas-2120 + - synology,ds414 + - const: marvell,armadaxp-mv78230 + - const: marvell,armadaxp + - const: marvell,armada-370-xp + + - items: + - const: plathome,openblocks-ax3-4 + - const: marvell,armadaxp-mv78260 + - const: marvell,armadaxp + - const: marvell,armada-370-xp + + - items: + - enum: + - marvell,axp-db + - marvell,axp-gp + - marvell,axp-matrix + - const: marvell,armadaxp-mv78460 + - const: marvell,armadaxp + - const: marvell,armada-370-xp + +additionalProperties: true From abd4ac56f4af01a60922ccdfcbaa6b7dac994a32 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:12 -0500 Subject: [PATCH 50/81] dt-bindings: arm: marvell: Convert marvell,armada375 boards to DT schema Convert Marvell Armada-375 based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/armada-375.txt | 9 -------- .../arm/marvell/marvell,armada375.yaml | 21 +++++++++++++++++++ 2 files changed, 21 insertions(+), 9 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-375.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-375.txt b/Documentation/devicetree/bindings/arm/marvell/armada-375.txt deleted file mode 100644 index 867d0b80cb8f..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-375.txt +++ /dev/null @@ -1,9 +0,0 @@ -Marvell Armada 375 Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 375 family shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armada375" diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml new file mode 100644 index 000000000000..81c33e46fecc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,armada375.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 375 Platform + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + items: + - const: marvell,a375-db + - const: marvell,armada375 + +additionalProperties: true From 3ef9017c373bba536d5e23d535d404525bdcfeb9 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:17 -0500 Subject: [PATCH 51/81] dt-bindings: arm: marvell: Convert marvell,armada390 boards to DT schema Convert Marvell Armada-390 based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/armada-39x.txt | 31 ------------------ .../arm/marvell/marvell,armada390.yaml | 32 +++++++++++++++++++ 2 files changed, 32 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-39x.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt deleted file mode 100644 index 89468664f6ea..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt +++ /dev/null @@ -1,31 +0,0 @@ -Marvell Armada 39x Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 39x family shall have the -following property: - -Required root node property: - - - compatible: must contain "marvell,armada390" - -In addition, boards using the Marvell Armada 395 SoC shall have the -following property before the common "marvell,armada390" one: - -Required root node property: - -compatible: must contain "marvell,armada395" - -Example: - -compatible = "marvell,a395-gp", "marvell,armada395", "marvell,armada390"; - -Boards using the Marvell Armada 398 SoC shall have the following -property before the common "marvell,armada390" one: - -Required root node property: - -compatible: must contain "marvell,armada398" - -Example: - -compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390"; diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml new file mode 100644 index 000000000000..5ff6a5439525 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,armada390.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 39x Platforms + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - const: marvell,a390-db + - const: marvell,armada390 + - items: + - enum: + - marvell,a398-db + - const: marvell,armada398 + - const: marvell,armada390 + - items: + - enum: + - marvell,a395-gp + - const: marvell,armada395 + - const: marvell,armada390 + +additionalProperties: true From 1c5f2ea8ce7f53f1c72980ac312ae1c0c29aa8a5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:25 -0500 Subject: [PATCH 52/81] dt-bindings: arm: marvell: Convert marvell,kirkwood boards to DT schema Convert Marvell Kirkwood based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/kirkwood.txt | 27 -- .../bindings/arm/marvell/marvell,kirkwood.txt | 105 ------- .../arm/marvell/marvell,kirkwood.yaml | 266 ++++++++++++++++++ 3 files changed, 266 insertions(+), 132 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/kirkwood.txt delete mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt deleted file mode 100644 index 98cce9a653eb..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt +++ /dev/null @@ -1,27 +0,0 @@ -Marvell Kirkwood Platforms Device Tree Bindings ------------------------------------------------ - -Boards with a SoC of the Marvell Kirkwood -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,kirkwood"; - -In order to support the kirkwood cpufreq driver, there must be a node -cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave", -where the "powersave" clock is a gating clock used to switch the CPU -between the "cpu_clk" and the "ddrclk". - -Example: - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "marvell,sheeva-88SV131"; - clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; - clock-names = "cpu_clk", "ddrclk", "powersave"; - }; diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt deleted file mode 100644 index 7d28fe4bf654..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt +++ /dev/null @@ -1,105 +0,0 @@ -Marvell Kirkwood SoC Family Device Tree Bindings ------------------------------------------------- - -Boards with a SoC of the Marvell Kirkwook family, eg 88f6281 - -* Required root node properties: -compatible: must contain "marvell,kirkwood" - -In addition, the above compatible shall be extended with the specific -SoC. Currently known SoC compatibles are: - -"marvell,kirkwood-88f6192" -"marvell,kirkwood-88f6281" -"marvell,kirkwood-88f6282" -"marvell,kirkwood-88f6283" -"marvell,kirkwood-88f6702" -"marvell,kirkwood-98DX4122" - -And in addition, the compatible shall be extended with the specific -board. Currently known boards are: - -"buffalo,linkstation-lsqvl" -"buffalo,linkstation-lsvl" -"buffalo,linkstation-lswsxl" -"buffalo,linkstation-lswxl" -"buffalo,linkstation-lswvl" -"buffalo,lschlv2" -"buffalo,lsxhl" -"buffalo,lsxl" -"cloudengines,pogo02" -"cloudengines,pogoplugv4" -"dlink,dns-320" -"dlink,dns-320-a1" -"dlink,dns-325" -"dlink,dns-325-a1" -"dlink,dns-kirkwood" -"excito,b3" -"globalscale,dreamplug-003-ds2001" -"globalscale,guruplug" -"globalscale,guruplug-server-plus" -"globalscale,sheevaplug" -"globalscale,sheevaplug" -"globalscale,sheevaplug-esata" -"globalscale,sheevaplug-esata-rev13" -"iom,iconnect" -"iom,iconnect-1.1" -"iom,ix2-200" -"keymile,km_kirkwood" -"lacie,cloudbox" -"lacie,inetspace_v2" -"lacie,laplug" -"lacie,nas2big" -"lacie,netspace_lite_v2" -"lacie,netspace_max_v2" -"lacie,netspace_mini_v2" -"lacie,netspace_v2" -"marvell,db-88f6281-bp" -"marvell,db-88f6282-bp" -"marvell,mv88f6281gtw-ge" -"marvell,rd88f6281" -"marvell,rd88f6281" -"marvell,rd88f6281-a0" -"marvell,rd88f6281-a1" -"mpl,cec4" -"mpl,cec4-10" -"netgear,readynas" -"netgear,readynas" -"netgear,readynas-duo-v2" -"netgear,readynas-nv+-v2" -"plathome,openblocks-a6" -"plathome,openblocks-a7" -"raidsonic,ib-nas6210" -"raidsonic,ib-nas6210-b" -"raidsonic,ib-nas6220" -"raidsonic,ib-nas6220-b" -"raidsonic,ib-nas62x0" -"seagate,dockstar" -"seagate,goflexnet" -"synology,ds109" -"synology,ds110jv10" -"synology,ds110jv20" -"synology,ds110jv30" -"synology,ds111" -"synology,ds209" -"synology,ds210jv10" -"synology,ds210jv20" -"synology,ds212" -"synology,ds212jv10" -"synology,ds212jv20" -"synology,ds212pv10" -"synology,ds409" -"synology,ds409slim" -"synology,ds410j" -"synology,ds411" -"synology,ds411j" -"synology,ds411slim" -"synology,ds413jv10" -"synology,rs212" -"synology,rs409" -"synology,rs411" -"synology,rs812" -"usi,topkick" -"usi,topkick-1281P2" -"zyxel,nsa310" -"zyxel,nsa310a" diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml new file mode 100644 index 000000000000..120784066833 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml @@ -0,0 +1,266 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,kirkwood.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood SoC Family + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - qnap,ts219 + - qnap,ts419 + - synology,ds110 + - synology,ds111 + - synology,ds209 + - synology,ds409slim + - synology,ds411j + - synology,ds411slim + - synology,rs212 + - synology,rs409 + - const: marvell,kirkwood + + - items: + - const: synology,ds109 + - const: synology,ds110jv20 + - const: synology,ds110 + - const: marvell,kirkwood + + - items: + - const: synology,ds110jv10 + - const: synology,ds110jv30 + - const: marvell,kirkwood + + - items: + - const: synology,ds210jv10 + - const: synology,ds210jv20 + - const: synology,ds210jv30 + - const: synology,ds211j + - const: marvell,kirkwood + + - items: + - const: synology,ds212jv10 + - const: synology,ds212jv20 + - const: marvell,kirkwood + + - items: + - const: synology,ds212 + - const: synology,ds212pv10 + - const: synology,ds212pv10 + - const: synology,ds212pv20 + - const: synology,ds213airv10 + - const: synology,ds213v10 + - const: marvell,kirkwood + + - items: + - const: synology,ds409 + - const: synology,ds410j + - const: marvell,kirkwood + + - items: + - const: synology,ds411 + - const: synology,ds413jv10 + - const: marvell,kirkwood + + - items: + - const: synology,rs411 + - const: synology,rs812 + - const: marvell,kirkwood + + - items: + - enum: + - cloudengines,pogoplugv4 + - lacie,laplug + - lacie,netspace_lite_v2 + - lacie,netspace_mini_v2 + - marvell,rd88f6192 + - seagate,blackarmor-nas220 + - enum: + - marvell,kirkwood-88f6192 + - const: marvell,kirkwood + + - items: + - enum: + - buffalo,lswsxl + - buffalo,lswxl + - checkpoint,l-50 + - cloudengines,pogoe02 + - ctera,c200-v1 + - dlink,dir-665 + - endian,4i-edge-200 + - excito,b3 + - globalscale,sheevaplug + - hp,t5325 + - iom,ix2-200 + - lacie,inetspace_v2 + - lacie,netspace_v2 + - lacie,netspace_max_v2 + - marvell,db-88f6281-bp + - marvell,mv88f6281gtw-ge + - seagate,dockstar + - seagate,goflexnet + - zyxel,nsa310 + - zyxel,nsa320 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - buffalo,lschlv2 + - buffalo,lsxhl + - const: buffalo,lsxl + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: dlink,dns-320-a1 + - const: dlink,dns-320 + - const: dlink,dns-kirkwood + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: dlink,dns-325-a1 + - const: dlink,dns-325 + - const: dlink,dns-kirkwood + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: globalscale,dreamplug-003-ds2001 + - const: globalscale,dreamplug + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: globalscale,guruplug-server-plus + - const: globalscale,guruplug + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: globalscale,sheevaplug-esata-rev13 + - const: globalscale,sheevaplug-esata + - const: globalscale,sheevaplug + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: iom,iconnect-1.1 + - const: iom,iconnect + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: lacie,d2net_v2 + - const: lacie,netxbig + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + - items: + - enum: + - lacie,net2big_v2 + - lacie,net5big_v2 + - const: lacie,netxbig + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - marvell,openrd-base + - marvell,openrd-client + - marvell,openrd-ultimate + - const: marvell,openrd + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - marvell,rd88f6281-a + - marvell,rd88f6281-z0 + - const: marvell,rd88f6281 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: mpl,cec4-10 + - const: mpl,cec4 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: raidsonic,ib-nas6210-b + - const: raidsonic,ib-nas6220-b + - const: raidsonic,ib-nas6210 + - const: raidsonic,ib-nas6220 + - const: raidsonic,ib-nas62x0 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: zyxel,nsa310a + - const: zyxel,nsa310 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - buffalo,lsqvl + - buffalo,lsvl + - buffalo,lswvl + - linksys,viper + - marvell,db-88f6282-bp + - zyxel,nsa325 + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - const: lacie,nas2big + - const: lacie,netxbig + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - enum: + - netgear,readynas-duo-v2 + - netgear,readynas-nv+-v2 + - const: netgear,readynas + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - const: usi,topkick-1281P2 + - const: usi,topkick + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - enum: + - plathome,openblocks-a6 + - plathome,openblocks-a7 + - const: marvell,kirkwood-88f6283 + - const: marvell,kirkwood + + - items: + - enum: + - lacie,cloudbox + - zyxel,nsa310s + - const: marvell,kirkwood-88f6702 + - const: marvell,kirkwood + + - items: + - enum: + - keymile,km_fixedeth + - keymile,km_kirkwood + - const: marvell,kirkwood-98DX4122 + - const: marvell,kirkwood + +additionalProperties: true From 573a8be749aed8d0744b78d6795cb2d7c20c14be Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:31 -0500 Subject: [PATCH 53/81] dt-bindings: arm: marvell: Convert marvell,dove boards to DT schema Convert Marvell Dove based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/marvell,dove.txt | 7 ---- .../bindings/arm/marvell/marvell,dove.yaml | 35 +++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 36 insertions(+), 8 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt deleted file mode 100644 index e10e8525eabd..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt +++ /dev/null @@ -1,7 +0,0 @@ -Marvell Dove Platforms Device Tree Bindings ------------------------------------------------ - -Boards with a Marvell Dove SoC shall have the following properties: - -Required root node property: -- compatible: must contain "marvell,dove"; diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml new file mode 100644 index 000000000000..a37804fb30c4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,dove.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Dove SoC + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - compulab,cm-a510 + - solidrun,cubox + - globalscale,d2plug + - globalscale,d3plug + - marvell,dove-db + - const: marvell,dove + - items: + - const: solidrun,cubox-es + - const: solidrun,cubox + - const: marvell,dove + - items: + - const: compulab,sbc-a510 + - const: compulab,cm-a510 + - const: marvell,dove + +additionalProperties: true diff --git a/MAINTAINERS b/MAINTAINERS index 2e1a079e24bc..d92d8f68e8cc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2831,7 +2831,7 @@ M: Gregory Clement L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu.git -F: Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt +F: Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml F: Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt F: Documentation/devicetree/bindings/soc/dove/ F: arch/arm/boot/dts/marvell/dove* From 3e2518d8b646afe159170422c1c8e072ba7c0798 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:51 -0500 Subject: [PATCH 54/81] dt-bindings: arm: marvell: Convert marvell,orion5x boards to DT schema Convert Marvell Orion5x based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/marvell,orion5x.txt | 25 ------------- .../bindings/arm/marvell/marvell,orion5x.yaml | 37 +++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 38 insertions(+), 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt deleted file mode 100644 index 748a8f287462..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt +++ /dev/null @@ -1,25 +0,0 @@ -Marvell Orion SoC Family Device Tree Bindings ---------------------------------------------- - -Boards with a SoC of the Marvell Orion family, eg 88f5181 - -* Required root node properties: -compatible: must contain "marvell,orion5x" - -In addition, the above compatible shall be extended with the specific -SoC. Currently known SoC compatibles are: - -"marvell,orion5x-88f5181" -"marvell,orion5x-88f5182" - -And in addition, the compatible shall be extended with the specific -board. Currently known boards are: - -"buffalo,lsgl" -"buffalo,lswsgl" -"buffalo,lswtgl" -"lacie,ethernet-disk-mini-v2" -"lacie,d2-network" -"marvell,rd-88f5182-nas" -"maxtor,shared-storage-2" -"netgear,wnr854t" diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml new file mode 100644 index 000000000000..c0417591b2be --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,orion5x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion5x SoC Family + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - netgear,wnr854t + - const: marvell,orion5x-88f5181 + - const: marvell,orion5x + - items: + - enum: + - buffalo,kurobox-pro + - buffalo,lschl + - buffalo,lsgl + - buffalo,lswsgl + - buffalo,lswtgl + - lacie,ethernet-disk-mini-v2 + - lacie,d2-network + - marvell,rd-88f5182-nas + - maxtor,shared-storage-2 + - const: marvell,orion5x-88f5182 + - const: marvell,orion5x + +additionalProperties: true diff --git a/MAINTAINERS b/MAINTAINERS index d92d8f68e8cc..4ee1f658c3c2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2832,7 +2832,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu.git F: Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml -F: Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt +F: Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml F: Documentation/devicetree/bindings/soc/dove/ F: arch/arm/boot/dts/marvell/dove* F: arch/arm/boot/dts/marvell/orion5x* From ad9a8291b13b985852ad617827a4c5265a8836f5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 30 Apr 2025 13:27:35 -0500 Subject: [PATCH 55/81] dt-bindings: edac: Convert aspeed,ast2400-sdram-edac to DT schema Convert the ASpeed SDRAM EDAC binding to DT schema. It's a straight-forward conversion. Reviewed-by: Andrew Jeffery Reviewed-by: Stefan Schaeckeler Signed-off-by: Rob Herring (Arm) --- .../edac/aspeed,ast2400-sdram-edac.yaml | 48 +++++++++++++++++++ .../bindings/edac/aspeed-sdram-edac.txt | 28 ----------- MAINTAINERS | 2 +- 3 files changed, 49 insertions(+), 29 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml delete mode 100644 Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt diff --git a/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml b/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml new file mode 100644 index 000000000000..09735826d707 --- /dev/null +++ b/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/aspeed,ast2400-sdram-edac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed BMC SoC SDRAM EDAC controller + +maintainers: + - Stefan Schaeckeler + +description: > + The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error + correction check). + + The memory controller supports SECDED (single bit error correction, double bit + error detection) and single bit error auto scrubbing by reserving 8 bits for + every 64 bit word (effectively reducing available memory to 8/9). + + Note, the bootloader must configure ECC mode in the memory controller. + +properties: + compatible: + enum: + - aspeed,ast2400-sdram-edac + - aspeed,ast2500-sdram-edac + - aspeed,ast2600-sdram-edac + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + sdram@1e6e0000 { + compatible = "aspeed,ast2500-sdram-edac"; + reg = <0x1e6e0000 0x174>; + interrupts = <0>; + }; diff --git a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt deleted file mode 100644 index 8ca9e0a049d8..000000000000 --- a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt +++ /dev/null @@ -1,28 +0,0 @@ -Aspeed BMC SoC EDAC node - -The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error -correction check). - -The memory controller supports SECDED (single bit error correction, double bit -error detection) and single bit error auto scrubbing by reserving 8 bits for -every 64 bit word (effectively reducing available memory to 8/9). - -Note, the bootloader must configure ECC mode in the memory controller. - - -Required properties: -- compatible: should be one of - - "aspeed,ast2400-sdram-edac" - - "aspeed,ast2500-sdram-edac" - - "aspeed,ast2600-sdram-edac" -- reg: sdram controller register set should be <0x1e6e0000 0x174> -- interrupts: should be AVIC interrupt #0 - - -Example: - - edac: sdram@1e6e0000 { - compatible = "aspeed,ast2500-sdram-edac"; - reg = <0x1e6e0000 0x174>; - interrupts = <0>; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 4ee1f658c3c2..85eca954284d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8695,7 +8695,7 @@ F: drivers/edac/armada_xp_* EDAC-AST2500 M: Stefan Schaeckeler S: Supported -F: Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt +F: Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml F: drivers/edac/aspeed_edac.c EDAC-BLUEFIELD From b518ec73cc62fe3f921ea6c009628a40c927d92c Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 14 Sep 2025 16:14:52 +0300 Subject: [PATCH 56/81] dt-bindings: gpu: arm,mali-midgard: add exynos8890-mali compatible The exynos8890 uses the ARM Mali T880 GPU, document its compatible string with the appropriate fallback. Signed-off-by: Ivaylo Ivanov Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index 48daba21a890..a7192622e120 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -53,8 +53,10 @@ properties: - enum: - rockchip,rk3399-mali - const: arm,mali-t860 - - # "arm,mali-t880" + - items: + - enum: + - samsung,exynos8890-mali + - const: arm,mali-t880 reg: maxItems: 1 From 60042a6ff2348fd2edca2f31e79fe80548d1a75d Mon Sep 17 00:00:00 2001 From: Frank Li Date: Mon, 15 Sep 2025 11:51:23 -0400 Subject: [PATCH 57/81] dt-bindings: display: simple: Add innolux,n133hse-ea1 and nlt,nl12880bc20-spwg-24 Add innolux,n133hse-ea1 13.3" TFT LCD panel and nlt,nl12880bc20-spwg-24 12.1" WXGA (1280 x 800) LVDS TFT LCD panel. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6q-novena.dtb: /panel: failed to match any schema with compatible: ['innolux,n133hse-ea1'] arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dtb: /lvds0-panel: failed to match any schema with compatible: ['nlt,nl12880bc20-spwg-24'] Signed-off-by: Frank Li Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/panel/panel-simple.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 1ac1f0219079..42d9080e8b83 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -178,6 +178,8 @@ properties: - innolux,g121xce-l01 # InnoLux 15.6" FHD (1920x1080) TFT LCD panel - innolux,g156hce-l01 + # InnoLux 13.3" FHD (1920x1080) TFT LCD panel + - innolux,n133hse-ea1 # InnoLux 15.6" WXGA TFT LCD panel - innolux,n156bge-l21 # Innolux Corporation 7.0" WSVGA (1024x600) TFT LCD panel @@ -228,6 +230,8 @@ properties: - netron-dy,e231732 # Newhaven Display International 480 x 272 TFT LCD panel - newhaven,nhd-4.3-480272ef-atxl + # NLT Technologies, Ltd. 12.1" WXGA (1280 x 800) LVDS TFT LCD panel + - nlt,nl12880bc20-spwg-24 # NLT Technologies, Ltd. 15.6" WXGA (1366×768) LVDS TFT LCD panel - nlt,nl13676bc25-03f # New Vision Display 7.0" 800 RGB x 480 TFT LCD panel From c502ca1ea1b9a7ed4b9665bed48bc1d8887639b3 Mon Sep 17 00:00:00 2001 From: sheetal Date: Thu, 18 Sep 2025 15:50:08 +0530 Subject: [PATCH 58/81] dt-bindings: interrupt-controller: arm,gic: Add tegra264-agic Add nvidia,tegra264-agic to the arm,gic binding for tegra264 audio interrupt controller support. Signed-off-by: sheetal Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml index 7173c4b5a228..ee4c77dac201 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml @@ -59,6 +59,7 @@ properties: - nvidia,tegra186-agic - nvidia,tegra194-agic - nvidia,tegra234-agic + - nvidia,tegra264-agic - const: nvidia,tegra210-agic interrupt-controller: true From 4379fbb9b06c8c17dac63652cfc2a7ada96c5074 Mon Sep 17 00:00:00 2001 From: Pankaj Patil Date: Thu, 18 Sep 2025 19:32:49 +0530 Subject: [PATCH 59/81] dt-bindings: interrupt-controller: qcom,pdc: Document Glymur PDC Document compatible for the Power Domain Controller(PDC) block on Glymur.PDC acts as interrupt controller in SoC states where GIC is non-operational. Signed-off-by: Pankaj Patil Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml index f06b40f88778..38d0c2d57dd6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml @@ -26,6 +26,7 @@ properties: compatible: items: - enum: + - qcom,glymur-pdc - qcom,qcs615-pdc - qcom,qcs8300-pdc - qcom,qdu1000-pdc From 069862313db33a2b68ebf9e92ac13b73ef12f2af Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:37 +0200 Subject: [PATCH 60/81] dt-bindings: display: mediatek: dpi: Allow specifying resets Even though the DPI IP has a reset bit on all MediaTek SoCs, it is optional, and has always been unused until MT8195; specifically: on older SoCs, like MT8173, the reset bit is located in MMSYS, and on newer SoCs, like MT8195, it is located in VDOSYS. For this reason, allow specifying the resets and reset-names on all MediaTek SoCs. Those properties are optional because there are multiple ways to reset this IP and the reset lines in MM/VDO are used only if the IP cannot perform warm-reset. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml index b659d79393a8..eb4f276e8dc4 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml @@ -102,6 +102,13 @@ properties: - port@0 - port@1 + resets: + maxItems: 1 + + reset-names: + items: + - const: dpi + required: - compatible - reg From c1f7800c9c70c67d5feea2d9acaac004086d41d2 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:42 +0200 Subject: [PATCH 61/81] dt-bindings: timer: mediatek: Add compatible for MT6795 GP Timer Add a compatible for the General Purpose Timer (GPT) found on the MediaTek Helio X10 MT6795 SoC which is fully compatible with the one found in MT6577. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/timer/mediatek,timer.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml index f68fc7050c56..42d81073a49d 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml +++ b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml @@ -29,6 +29,7 @@ properties: - mediatek,mt6580-timer - mediatek,mt6582-timer - mediatek,mt6589-timer + - mediatek,mt6795-timer - mediatek,mt7623-timer - mediatek,mt8127-timer - mediatek,mt8135-timer From 8d200dff1e8e0cb521dd48ba1d5424be400cd9bc Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:43 +0200 Subject: [PATCH 62/81] dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing pwm_ch7_2 The MT7622 SoC has a PWM channel 7-2 group for the pwm7 IP: add the missing pwm_ch7_2 group. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml index 9acca85184fa..57b19031925d 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -204,7 +204,7 @@ patternProperties: pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, - pwm_ch7_0, pwm_0, pwm_1] + pwm_ch7_0, pwm_ch7_2, pwm_0, pwm_1] - if: properties: function: From 8e0118a79bda64aad3ae72dd80c814c1978460ea Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:44 +0200 Subject: [PATCH 63/81] dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing base reg The pin controller for both MT7622 and MT7629 need both a "base" and an "eint" MMIO like the ones found on other MediaTek SoCs: while devicetrees have always been correct, the binding is not, as it only allows an "eint" reg. Add "base" to reg-names and increment maxItems for reg to two. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Signed-off-by: Rob Herring (Arm) --- .../bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml index 57b19031925d..6b925c5099cc 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -19,10 +19,11 @@ properties: - mediatek,mt7629-pinctrl reg: - maxItems: 1 + maxItems: 2 reg-names: items: + - const: base - const: eint gpio-controller: true @@ -367,7 +368,8 @@ examples: pio: pinctrl@10211000 { compatible = "mediatek,mt7622-pinctrl"; - reg = <0 0x10211000 0 0x1000>; + reg = <0 0x10211000 0 0x1000>, + <0 0x10005000 0 0x1000>; gpio-controller; #gpio-cells = <2>; From 41663b33cda3a70c719f82f4f62c2f54b16fad5b Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:46 +0200 Subject: [PATCH 64/81] dt-bindings: regulator: mediatek,mt6332-regulator: Add missing compatible This binding had no compatible and for this reason would not be applied to anything: add the missing "mediatek,mt6332-regulator" compatible. Fixes: e22943e32e1f regulator: ("Add bindings for MT6332 regulator") Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- .../bindings/regulator/mediatek,mt6332-regulator.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml index 2eb512c29a0d..475f18d4f261 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml @@ -15,6 +15,10 @@ description: | buck- and ldo-. MT6332 regulators node should be sub node of the MT6397 MFD node. +properties: + compatible: + const: mediatek,mt6332-regulator + patternProperties: "^buck-v(dram|dvfs2|pa|rf18a|rf18b|sbst)$": type: object @@ -36,6 +40,9 @@ patternProperties: unevaluatedProperties: false +required: + - compatible + additionalProperties: false examples: From e29e64fb9c58ce92cb8316cd6a939bd3e49b7f63 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:47 +0200 Subject: [PATCH 65/81] dt-bindings: regulator: mediatek,mt6331: Fix various regulator names This binding was never applied to anything because it misses the compatible, hence any mistake in it got unnoticed. Before adding the compatible to let it apply, fix the names and the node names of various regulators. Fixes: 6385e21692bb ("regulator: Add bindings for MT6331 regulator") Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- .../regulator/mediatek,mt6331-regulator.yaml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml index 79e5198e1c73..6006a973b865 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml @@ -26,23 +26,23 @@ patternProperties: unevaluatedProperties: false - "^ldo-v(avdd32aud|auxa32)$": + "^ldo-(avdd32aud|vauxa32)$": type: object $ref: regulator.yaml# properties: regulator-name: - pattern: "^v(avdd32aud|auxa32)$" + pattern: "^(avdd32_aud|vauxa32)$" unevaluatedProperties: false - "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$": + "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb10)$": type: object $ref: regulator.yaml# properties: regulator-name: - pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$" + pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb)$" unevaluatedProperties: false @@ -52,7 +52,7 @@ patternProperties: properties: regulator-name: - pattern: "^vcam(a|af|d|io)$" + pattern: "^vcam(a|_af|d|io)$" unevaluatedProperties: false @@ -75,7 +75,7 @@ patternProperties: properties: regulator-name: - pattern: "^vgp[12]$" + pattern: "^vgp[1234]$" required: - regulator-name From 1a8493e06b854b05263071a5db77488cb9c07972 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:48 +0200 Subject: [PATCH 66/81] dt-bindings: regulator: mediatek,mt6331: Add missing compatible This binding had no compatible and for this reason would not be applied to anything: add the missing "mediatek,mt6331-regulator" comaptible. Fixes: 6385e21692bb ("regulator: Add bindings for MT6331 regulator") Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- .../bindings/regulator/mediatek,mt6331-regulator.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml index 6006a973b865..c654acf13768 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml @@ -15,6 +15,10 @@ description: | buck- and ldo-. MT6331 regulators node should be sub node of the MT6397 MFD node. +properties: + compatible: + const: mediatek,mt6331-regulator + patternProperties: "^buck-v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$": type: object @@ -82,6 +86,9 @@ patternProperties: unevaluatedProperties: false +required: + - compatible + additionalProperties: false examples: From a31c2f8e2b6af2e45d5e8016e5055b2b00b4d6c5 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:39 +0200 Subject: [PATCH 67/81] dt-bindings: mailbox: mediatek,gce-mailbox: Make clock-names optional The GCE Mailbox needs only one clock and the clock-names can be used only by the driver (which, for instance, does not use it), and this is true for all of the currently supported MediaTek SoCs. Stop requiring to specify clock-names on all non-MT8195 GCEs. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Acked-by: Rob Herring (Arm) Reviewed-by: Chen-Yu Tsai Signed-off-by: Rob Herring (Arm) --- .../bindings/mailbox/mediatek,gce-mailbox.yaml | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml index 73d6db34d64a..587126d03fc6 100644 --- a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml @@ -60,17 +60,6 @@ required: - interrupts - clocks -allOf: - - if: - not: - properties: - compatible: - contains: - const: mediatek,mt8195-gce - then: - required: - - clock-names - additionalProperties: false examples: From 37020f865aa3c4049266cb34cf83ef299184ae80 Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Tue, 26 Aug 2025 09:39:36 +0200 Subject: [PATCH 68/81] dt-bindings: arm: mediatek: Support mt8183-audiosys variant Update the mediatek,audsys binding to support the mt8183-audiosys compatible, which uses a different audio controller (mediatek,mt8183-audio.yaml) compared to the legacy mt2701-audio controller. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/mediatek/mediatek,audsys.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml index 45d4a6620041..f3a761cbd0fd 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml @@ -23,6 +23,7 @@ properties: - mediatek,mt7622-audsys - mediatek,mt8167-audsys - mediatek,mt8173-audsys + - mediatek,mt8183-audiosys - mediatek,mt8183-audsys - mediatek,mt8186-audsys - mediatek,mt8192-audsys @@ -41,13 +42,26 @@ properties: const: 1 audio-controller: - $ref: /schemas/sound/mediatek,mt2701-audio.yaml# type: object required: - compatible - '#clock-cells' +if: + properties: + compatible: + contains: + const: mediatek,mt8183-audiosys +then: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt8183-audio.yaml# +else: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt2701-audio.yaml# + additionalProperties: false examples: From 49ceb031b6c139e17e069b25506a4c283fd22595 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:51 -0300 Subject: [PATCH 69/81] dt-bindings: media: Convert MediaTek mt8173-vpu bindings to DT schema Convert the existing text-based DT bindings for Mediatek MT8173 Video Processor Unit to a DT schema. Signed-off-by: Ariel D'Alessandro Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski [robh: update MAINTAINERS and mediatek-mdp.txt references] Signed-off-by: Rob Herring (Arm) --- .../bindings/media/mediatek,mt8173-vpu.yaml | 74 +++++++++++++++++++ .../bindings/media/mediatek-mdp.txt | 3 +- .../bindings/media/mediatek-vpu.txt | 31 -------- MAINTAINERS | 2 +- 4 files changed, 77 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml delete mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml new file mode 100644 index 000000000000..8a47761f1e6b --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mt8173-vpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT8173 Video Processor Unit + +maintainers: + - Ariel D'Alessandro + +description: + Video Processor Unit is a HW video controller. It controls HW Codec including + H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color + convert). + +properties: + compatible: + const: mediatek,mt8173-vpu + + reg: + maxItems: 2 + + reg-names: + items: + - const: tcm + - const: cfg_reg + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: main + + memory-region: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - memory-region + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + vpu: vpu@10020000 { + compatible = "mediatek,mt8173-vpu"; + reg = <0 0x10020000 0 0x30000>, + <0 0x10050000 0 0x100>; + reg-names = "tcm", "cfg_reg"; + interrupts = ; + clocks = <&topckgen CLK_TOP_SCP_SEL>; + clock-names = "main"; + memory-region = <&vpu_dma_reserved>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/mediatek-mdp.txt b/Documentation/devicetree/bindings/media/mediatek-mdp.txt index 53ef26e2c857..253a93eabb5e 100644 --- a/Documentation/devicetree/bindings/media/mediatek-mdp.txt +++ b/Documentation/devicetree/bindings/media/mediatek-mdp.txt @@ -5,7 +5,8 @@ Media Data Path is used for scaling and color space conversion. Required properties (controller node): - compatible: "mediatek,mt8173-mdp" - mediatek,vpu: the node of video processor unit, see - Documentation/devicetree/bindings/media/mediatek-vpu.txt for details. + Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml for + details. Required properties (all function blocks, child node): - compatible: Should be one of diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt b/Documentation/devicetree/bindings/media/mediatek-vpu.txt deleted file mode 100644 index 2a5bac37f9a2..000000000000 --- a/Documentation/devicetree/bindings/media/mediatek-vpu.txt +++ /dev/null @@ -1,31 +0,0 @@ -* Mediatek Video Processor Unit - -Video Processor Unit is a HW video controller. It controls HW Codec including -H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert). - -Required properties: - - compatible: "mediatek,mt8173-vpu" - - reg: Must contain an entry for each entry in reg-names. - - reg-names: Must include the following entries: - "tcm": tcm base - "cfg_reg": Main configuration registers base - - interrupts: interrupt number to the cpu. - - clocks : clock name from clock manager - - clock-names: must be main. It is the main clock of VPU - -Optional properties: - - memory-region: phandle to a node describing memory (see - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) - to be used for VPU extended memory; if not present, VPU may be located - anywhere in the memory - -Example: - vpu: vpu@10020000 { - compatible = "mediatek,mt8173-vpu"; - reg = <0 0x10020000 0 0x30000>, - <0 0x10050000 0 0x100>; - reg-names = "tcm", "cfg_reg"; - interrupts = ; - clocks = <&topckgen TOP_SCP_SEL>; - clock-names = "main"; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 85eca954284d..3c1970f96d99 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15540,7 +15540,7 @@ M: Andrew-CT Chen M: Yunfei Dong S: Supported F: Documentation/devicetree/bindings/media/mediatek,vcodec*.yaml -F: Documentation/devicetree/bindings/media/mediatek-vpu.txt +F: Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml F: drivers/media/platform/mediatek/vcodec/ F: drivers/media/platform/mediatek/vpu/ From d0b5a39acd079bccaebbb0d94bfd4649359951c2 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:57 -0300 Subject: [PATCH 70/81] dt-bindings: pinctrl: mt65xx: Allow gpio-line-names Current, the DT bindings for MediaTek's MT65xx Pin controller is missing the gpio-line-names property, add it to the associated schema. Signed-off-by: Ariel D'Alessandro Acked-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Linus Walleij Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml index b9680b896f12..aa71398cf522 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml @@ -43,6 +43,8 @@ properties: the amount of cells must be specified as 2. See the below mentioned gpio binding representation for description of particular cells. + gpio-line-names: true + mediatek,pctl-regmap: $ref: /schemas/types.yaml#/definitions/phandle-array items: From 18b26b15178386eb82bca4b23b03e96ca9317d36 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:10:00 -0300 Subject: [PATCH 71/81] dt-bindings: soc: mediatek: pwrap: Add power-domains property Currently, the DT bindings for Mediatek PMIC Wrapper is missing the power-domains property, which is used in the MT8173 E1 evaluation board as it needs USB power domain. Signed-off-by: Ariel D'Alessandro Acked-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Rob Herring (Arm) --- .../bindings/soc/mediatek/mediatek,pwrap.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml index 4737e5f45d54..54c0cd64d309 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml @@ -98,6 +98,9 @@ properties: - const: pwrap - const: pwrap-bridge + power-domains: + maxItems: 1 + pmic: type: object @@ -126,6 +129,18 @@ allOf: clock-names: minItems: 4 + - if: + properties: + compatible: + contains: + const: mediatek,mt8173-pwrap + then: + properties: + power-domains: true + else: + properties: + power-domains: false + additionalProperties: false examples: From 4fea3336ef57295b989a6b2db4a6946a06e4c787 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 23 Sep 2025 16:41:18 -0400 Subject: [PATCH 72/81] dt-bindings: trivial-devices: Add compatible string synaptics,synaptics_i2c Add compatible string synaptics,synaptics_i2c for synaptics touch pad. It match existed driver drivers/input/mouse/synaptics_i2c.c. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Frank Li Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ Documentation/devicetree/bindings/vendor-prefixes.yaml | 3 +++ 2 files changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index f3dd18681aa6..8db4596c616b 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -395,6 +395,8 @@ properties: - sparkfun,qwiic-joystick # Sierra Wireless mangOH Green SPI IoT interface - swir,mangoh-iotport-spi + # Synaptics I2C touchpad + - synaptics,synaptics_i2c # Ambient Light Sensor with SMBUS/Two Wire Serial Interface - taos,tsl2550 # Digital PWM System Controller PMBus diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 0f5273123650..699560820fdf 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1552,6 +1552,9 @@ patternProperties: description: Sierra Wireless "^syna,.*": description: Synaptics Inc. + "^synaptics,.*": + description: Synaptics Inc. + deprecated: true "^synology,.*": description: Synology, Inc. "^synopsys,.*": From a036bb0e60ad2828c3498bff7465bcbb247b7436 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Thu, 25 Sep 2025 14:56:30 -0500 Subject: [PATCH 73/81] of: base: Add of_get_next_child_with_prefix() stub 1fcc67e3a354 ("of: base: Add for_each_child_of_node_with_prefix()") added of_get_next_child_with_prefix() but did not add a stub for the !CONFIG_OF case. Add a of_get_next_child_with_prefix() stub so users of for_each_child_of_node_with_prefix() can be built for compile testing even when !CONFIG_OF. Fixes: 1fcc67e3a354 ("of: base: Add for_each_child_of_node_with_prefix()") Signed-off-by: Bjorn Helgaas Signed-off-by: Rob Herring (Arm) --- include/linux/of.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/linux/of.h b/include/linux/of.h index a62154aeda1b..5e2c6ed9370a 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -550,6 +550,13 @@ static inline struct device_node *of_get_next_child( return NULL; } +static inline struct device_node *of_get_next_child_with_prefix( + const struct device_node *node, struct device_node *prev, + const char *prefix) +{ + return NULL; +} + static inline struct device_node *of_get_next_available_child( const struct device_node *node, struct device_node *prev) { From 86eedc669a56e5607c253253d7b466a5b8d70fc8 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Fri, 26 Sep 2025 12:57:47 +0200 Subject: [PATCH 74/81] docs: dt: fix grammar and spelling Signed-off-by: Markus Heidelberg Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/of_unittest.rst | 4 ++-- Documentation/devicetree/overlay-notes.rst | 6 +++--- Documentation/devicetree/usage-model.rst | 6 +++--- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/of_unittest.rst b/Documentation/devicetree/of_unittest.rst index a6c05962add3..8b557acd29d1 100644 --- a/Documentation/devicetree/of_unittest.rst +++ b/Documentation/devicetree/of_unittest.rst @@ -56,7 +56,7 @@ drivers/of/unittest.c. See the content of the folder:: for the Device Tree Source Include files (.dtsi) included in testcases.dts. -When the kernel is build with CONFIG_OF_UNITTEST enabled, then the following make +When the kernel is built with CONFIG_OF_UNITTEST enabled, then the following make rule:: $(obj)/%.dtb: $(src)/%.dts FORCE @@ -133,7 +133,7 @@ via the following kernel symbols:: __dtb_testcases_end - address marking the end of test data blob Secondly, it calls of_fdt_unflatten_tree() to unflatten the flattened -blob. And finally, if the machine's device tree (i.e live tree) is present, +blob. And finally, if the machine's device tree (i.e. live tree) is present, then it attaches the unflattened test data tree to the live tree, else it attaches itself as a live device tree. diff --git a/Documentation/devicetree/overlay-notes.rst b/Documentation/devicetree/overlay-notes.rst index 35e79242af9a..ba401ef850e7 100644 --- a/Documentation/devicetree/overlay-notes.rst +++ b/Documentation/devicetree/overlay-notes.rst @@ -14,11 +14,11 @@ How overlays work A Devicetree's overlay purpose is to modify the kernel's live tree, and have the modification affecting the state of the kernel in a way that is reflecting the changes. -Since the kernel mainly deals with devices, any new device node that result +Since the kernel mainly deals with devices, any new device node that results in an active device should have it created while if the device node is either disabled or removed all together, the affected device should be deregistered. -Lets take an example where we have a foo board with the following base tree:: +Let's take an example where we have a foo board with the following base tree:: ---- foo.dts --------------------------------------------------------------- /* FOO platform */ @@ -111,7 +111,7 @@ The API is quite easy to use. 1) Call of_overlay_fdt_apply() to create and apply an overlay changeset. The return value is an error or a cookie identifying this overlay. -2) Call of_overlay_remove() to remove and cleanup the overlay changeset +2) Call of_overlay_remove() to remove and clean up the overlay changeset previously created via the call to of_overlay_fdt_apply(). Removal of an overlay changeset that is stacked by another will not be permitted. diff --git a/Documentation/devicetree/usage-model.rst b/Documentation/devicetree/usage-model.rst index 0717426856b2..c6146c96ac56 100644 --- a/Documentation/devicetree/usage-model.rst +++ b/Documentation/devicetree/usage-model.rst @@ -46,7 +46,7 @@ The DT was originally created by Open Firmware as part of the communication method for passing data from Open Firmware to a client program (like to an operating system). An operating system used the Device Tree to discover the topology of the hardware at runtime, and -thereby support a majority of available hardware without hard coded +thereby supported a majority of available hardware without hard coded information (assuming drivers were available for all devices). Since Open Firmware is commonly used on PowerPC and SPARC platforms, @@ -128,7 +128,7 @@ successor, the BeagleBoard xM board might look like, respectively:: compatible = "ti,omap3-beagleboard-xm", "ti,omap3450", "ti,omap3"; Where "ti,omap3-beagleboard-xm" specifies the exact model, it also -claims that it compatible with the OMAP 3450 SoC, and the omap3 family +claims that it is compatible with the OMAP 3450 SoC, and the omap3 family of SoCs in general. You'll notice that the list is sorted from most specific (exact board) to least specific (SoC family). @@ -205,7 +205,7 @@ platform-specific configuration data. During early boot, the architecture setup code calls of_scan_flat_dt() several times with different helper callbacks to parse device tree -data before paging is setup. The of_scan_flat_dt() code scans through +data before paging is set up. The of_scan_flat_dt() code scans through the device tree and uses the helpers to extract information required during early boot. Typically the early_init_dt_scan_chosen() helper is used to parse the chosen node including kernel parameters, From d6f57d8c5a5aede34c72382cdbd5b35616e171e6 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Fri, 26 Sep 2025 12:57:48 +0200 Subject: [PATCH 75/81] dt-bindings: fix spelling, typos, grammar, duplicated words Signed-off-by: Markus Heidelberg Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/arm,vexpress-juno.yaml | 2 +- .../devicetree/bindings/example-schema.yaml | 2 +- Documentation/devicetree/bindings/gpio/gpio.txt | 12 ++++++------ .../devicetree/bindings/iommu/mediatek,iommu.yaml | 2 +- Documentation/devicetree/bindings/leds/common.yaml | 2 +- .../devicetree/bindings/mfd/ti,lp87524-q1.yaml | 2 +- .../devicetree/bindings/mfd/ti,lp87561-q1.yaml | 2 +- .../devicetree/bindings/mfd/ti,lp87565-q1.yaml | 2 +- .../bindings/mmc/mmc-controller-common.yaml | 4 ++-- .../devicetree/bindings/net/amlogic,meson-dwmac.yaml | 2 +- .../devicetree/bindings/net/ethernet-controller.yaml | 2 +- .../devicetree/bindings/net/ethernet-phy.yaml | 2 +- .../devicetree/bindings/net/micrel-ksz90x1.txt | 4 ++-- Documentation/devicetree/bindings/net/micrel.txt | 2 +- .../devicetree/bindings/submitting-patches.rst | 2 +- 15 files changed, 22 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 89298b39903f..4cdca5320544 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -140,7 +140,7 @@ patternProperties: the connection between the motherboard and any tiles. Sometimes the compatible is placed directly under this node, sometimes it is placed in a subnode named "motherboard-bus". Sometimes the compatible includes - "arm,vexpress,v2?-p1" sometimes (on software models) is is just + "arm,vexpress,v2?-p1" sometimes (on software models) it is just "simple-bus". If the compatible is placed in the "motherboard-bus" node, it is stricter and always has two compatibles. type: object diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index c731d5045e80..b04f3cc4312c 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -223,7 +223,7 @@ required: # # For multiple 'if' schema, group them under an 'allOf'. # -# If the conditionals become too unweldy, then it may be better to just split +# If the conditionals become too unwieldy, then it may be better to just split # the binding into separate schema documents. allOf: - if: diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index d82c32217fff..b37dbb1edc62 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -35,8 +35,8 @@ and bit-banged data signals: <&gpio1 15 0>; In the above example, &gpio1 uses 2 cells to specify a gpio. The first cell is -a local offset to the GPIO line and the second cell represent consumer flags, -such as if the consumer desire the line to be active low (inverted) or open +a local offset to the GPIO line and the second cell represents consumer flags, +such as if the consumer desires the line to be active low (inverted) or open drain. This is the recommended practice. The exact meaning of each specifier cell is controller specific, and must be @@ -59,7 +59,7 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. Optional standard bitfield specifiers for the last cell: - Bit 0: 0 means active high, 1 means active low -- Bit 1: 0 mean push-pull wiring, see: +- Bit 1: 0 means push-pull wiring, see: https://en.wikipedia.org/wiki/Push-pull_output 1 means single-ended wiring, see: https://en.wikipedia.org/wiki/Single-ended_triode @@ -176,7 +176,7 @@ example of a name from an SoC's reference manual) would not be desirable. In either case placeholders are discouraged: rather use the "" (blank string) if the use of the GPIO line is undefined in your design. Ideally, -try to add comments to the dts file describing the naming the convention +try to add comments to the dts file describing the naming convention you have chosen, and specifying from where the names are derived. The names are assigned starting from line offset 0, from left to right, @@ -304,7 +304,7 @@ pins 50..69. It is also possible to use pin groups for gpio ranges when pin groups are the easiest and most convenient mapping. -Both both and must set to 0 when using named pin groups +Both and must be set to 0 when using named pin groups names. The property gpio-ranges-group-names must contain exactly one string for each @@ -313,7 +313,7 @@ range. Elements of gpio-ranges-group-names must contain the name of a pin group defined in the respective pin controller. The number of pins/GPIO lines in the range is the number of pins in that pin group. The number of pins of that -group is defined int the implementation and not in the device tree. +group is defined in the implementation and not in the device tree. If numerical and named pin groups are mixed, the string corresponding to a numerical pin range in gpio-ranges-group-names must be empty. diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index 75750c64157c..f49ed8ac4776 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -52,7 +52,7 @@ description: |+ As above, The Multimedia HW will go through SMI and M4U while it access EMI. SMI is a bridge between m4u and the Multimedia HW. It contain smi local arbiter and smi common. It will control whether the Multimedia - HW should go though the m4u for translation or bypass it and talk + HW should go through the m4u for translation or bypass it and talk directly with EMI. And also SMI help control the power domain and clocks for each local arbiter. diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml index 3e8319e44339..274f83288a92 100644 --- a/Documentation/devicetree/bindings/leds/common.yaml +++ b/Documentation/devicetree/bindings/leds/common.yaml @@ -62,7 +62,7 @@ properties: default-state: description: The initial state of the LED. If the LED is already on or off and the - default-state property is set the to same value, then no glitch should be + default-state property is set to the same value, then no glitch should be produced where the LED momentarily turns off (or on). The "keep" setting will keep the LED at whatever its current state is, without producing a glitch. diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml index ae149eb8593d..ca72786b0e0d 100644 --- a/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml @@ -26,7 +26,7 @@ properties: '#gpio-cells': description: The first cell is the pin number. - The second cell is is used to specify flags. + The second cell is used to specify flags. See ../gpio/gpio.txt for more information. const: 2 diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml index 5167d6eb904a..885e33276b1b 100644 --- a/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml @@ -26,7 +26,7 @@ properties: '#gpio-cells': description: The first cell is the pin number. - The second cell is is used to specify flags. + The second cell is used to specify flags. See ../gpio/gpio.txt for more information. const: 2 diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml index eca430edf608..2b5b54aa6c73 100644 --- a/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml @@ -28,7 +28,7 @@ properties: '#gpio-cells': description: The first cell is the pin number. - The second cell is is used to specify flags. + The second cell is used to specify flags. See ../gpio/gpio.txt for more information. const: 2 diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml index 9a7235439759..1e601da0339a 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml @@ -57,7 +57,7 @@ properties: # latter case. We choose to use the XOR logic for GPIO CD and WP # lines. This means, the two properties are "superimposed," for # example leaving the GPIO_ACTIVE_LOW flag clear and specifying the - # respective *-inverted property property results in a + # respective *-inverted property results in a # double-inversion and actually means the "normal" line polarity is # in effect. wp-inverted: @@ -264,7 +264,7 @@ properties: mmc-pwrseq-simple.yaml. But now it\'s reused as a tunable delay waiting for I/O signalling and card power supply to be stable, regardless of whether pwrseq-simple is used. Default to 10ms if - no available. + not available. default: 10 supports-cqe: diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index 0cd78d71768c..5c91716d1f21 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -149,7 +149,7 @@ properties: - description: The first register range should be the one of the DWMAC controller - description: - The second range is is for the Amlogic specific configuration + The second range is for the Amlogic specific configuration (for example the PRG_ETHERNET register range on Meson8b and newer) interrupts: diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 66b1cfbbfe22..341f4938c956 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -222,7 +222,7 @@ properties: reg: maxItems: 1 description: - This define the LED index in the PHY or the MAC. It's really + This defines the LED index in the PHY or the MAC. It's really driver dependent and required for ports that define multiple LED for the same port. diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 71e2cd32580f..2ec2d9fda7e3 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -266,7 +266,7 @@ properties: reg: maxItems: 1 description: - This define the LED index in the PHY or the MAC. It's really + This defines the LED index in the PHY or the MAC. It's really driver dependent and required for ports that define multiple LED for the same port. diff --git a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt index 2681168777a1..6f7b907d5a04 100644 --- a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt +++ b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt @@ -13,7 +13,7 @@ KSZ9021: All skew control options are specified in picoseconds. The minimum value is 0, the maximum value is 3000, and it can be specified in 200ps - steps, *but* these values are in not fact what you get because this chip's + steps, *but* these values are in no way what you get because this chip's skew values actually increase in 120ps steps, starting from -840ps. The incorrect values came from an error in the original KSZ9021 datasheet before it was corrected in revision 1.2 (Feb 2014), but it is too late to @@ -153,7 +153,7 @@ KSZ9031: - micrel,force-master: Boolean, force phy to master mode. Only set this option if the phy reference clock provided at CLK125_NDO pin is used as MAC reference - clock because the clock jitter in slave mode is to high (errata#2). + clock because the clock jitter in slave mode is too high (errata#2). Attention: The link partner must be configurable as slave otherwise no link will be established. diff --git a/Documentation/devicetree/bindings/net/micrel.txt b/Documentation/devicetree/bindings/net/micrel.txt index a407dd1b4614..01622ce58112 100644 --- a/Documentation/devicetree/bindings/net/micrel.txt +++ b/Documentation/devicetree/bindings/net/micrel.txt @@ -26,7 +26,7 @@ Optional properties: Setting the RMII Reference Clock Select bit enables 25 MHz rather than 50 MHz clock mode. - Note that this option in only needed for certain PHY revisions with a + Note that this option is only needed for certain PHY revisions with a non-standard, inverted function of this configuration bit. Specifically, a clock reference ("rmii-ref" below) is always needed to actually select a mode. diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index 46d0b036c97e..5f24570f72e9 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -95,7 +95,7 @@ II. For kernel maintainers For subsystem bindings (anything affecting more than a single device), getting a devicetree maintainer to review it is required. - 3) For a series going though multiple trees, the binding patch should be + 3) For a series going through multiple trees, the binding patch should be kept with the driver using the binding. 4) The DTS files should however never be applied via driver subsystem tree, From 77e46093e83a2788e2cf80ba8c8731375e587ad2 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Fri, 26 Sep 2025 12:57:49 +0200 Subject: [PATCH 76/81] scripts: dt_to_config: fix grammar and a typo in --help text - grammar: singular/plural inconsistency - typo: "of" -> "or" Signed-off-by: Markus Heidelberg Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt_to_config | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/scripts/dtc/dt_to_config b/scripts/dtc/dt_to_config index 299d1c2b20d7..70d6d5f06bdc 100755 --- a/scripts/dtc/dt_to_config +++ b/scripts/dtc/dt_to_config @@ -51,10 +51,10 @@ $num_pr_flags = $pr_flag_pos_config_test_fail + 1; "compatible is white listed", "matching driver and/or kernel config is hard coded", "kernel config hard coded in Makefile", - "one or more kernel config file options is not set", - "one or more kernel config file options is set to 'm'", - "one or more kernel config file options is set to 'y'", - "one of more kernel config file options fails to have correct value" + "one or more kernel config file options are not set", + "one or more kernel config file options are set to 'm'", + "one or more kernel config file options are set to 'y'", + "one or more kernel config file options fail to have correct value" ); From 74459b0dacced28542b631abf89bc24456c7f789 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 23 Sep 2025 16:55:48 -0400 Subject: [PATCH 77/81] dt-bindings: display: bridge: convert megachips-stdpxxxx-ge-b850v3-fw.txt to yaml Convert megachips-stdpxxxx-ge-b850v3-fw.txt to yaml format. Additional changes: - Only keep one example. Signed-off-by: Frank Li Signed-off-by: Rob Herring (Arm) --- .../megachips,stdp2690-ge-b850v3-fw.yaml | 111 ++++++++++++++++++ .../megachips-stdpxxxx-ge-b850v3-fw.txt | 91 -------------- 2 files changed, 111 insertions(+), 91 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml delete mode 100644 Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt diff --git a/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml b/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml new file mode 100644 index 000000000000..dfa6ff6f115e --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GE B850v3 video bridge + +maintainers: + - Frank Li + +description: | + STDP4028-ge-b850v3-fw bridges (LVDS-DP) + STDP2690-ge-b850v3-fw bridges (DP-DP++) + + The video processing pipeline on the second output on the GE B850v3: + + Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output + + Each bridge has a dedicated flash containing firmware for supporting the custom + design. The result is that, in this design, neither the STDP4028 nor the + STDP2690 behave as the stock bridges would. The compatible strings include the + suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with + the firmware specific for the GE B850v3. + + The hardware do not provide control over the video processing pipeline, as the + two bridges behaves as a single one. The only interfaces exposed by the + hardware are EDID, HPD, and interrupts. + +properties: + compatible: + enum: + - megachips,stdp4028-ge-b850v3-fw + - megachips,stdp2690-ge-b850v3-fw + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + description: sink port + $ref: /schemas/graph.yaml#/properties/port + + port@1: + description: source port + $ref: /schemas/graph.yaml#/properties/port + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - ports + +allOf: + - if: + properties: + compatible: + contains: + const: megachips,stdp4028-ge-b850v3-fw + then: + required: + - interrupts + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bridge@73 { + compatible = "megachips,stdp4028-ge-b850v3-fw"; + reg = <0x73>; + interrupt-parent = <&gpio2>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&lvds0_out>; + }; + + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&stdp2690_in>; + }; + }; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt b/Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt deleted file mode 100644 index 09e0a21f705e..000000000000 --- a/Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt +++ /dev/null @@ -1,91 +0,0 @@ -Drivers for the second video output of the GE B850v3: - STDP4028-ge-b850v3-fw bridges (LVDS-DP) - STDP2690-ge-b850v3-fw bridges (DP-DP++) - -The video processing pipeline on the second output on the GE B850v3: - - Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output - -Each bridge has a dedicated flash containing firmware for supporting the custom -design. The result is that, in this design, neither the STDP4028 nor the -STDP2690 behave as the stock bridges would. The compatible strings include the -suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with -the firmware specific for the GE B850v3. - -The hardware do not provide control over the video processing pipeline, as the -two bridges behaves as a single one. The only interfaces exposed by the -hardware are EDID, HPD, and interrupts. - -stdp4028-ge-b850v3-fw required properties: - - compatible : "megachips,stdp4028-ge-b850v3-fw" - - reg : I2C bus address - - interrupts : one interrupt should be described here, as in - <0 IRQ_TYPE_LEVEL_HIGH> - - ports : One input port(reg = <0>) and one output port(reg = <1>) - -stdp2690-ge-b850v3-fw required properties: - compatible : "megachips,stdp2690-ge-b850v3-fw" - - reg : I2C bus address - - ports : One input port(reg = <0>) and one output port(reg = <1>) - -Example: - -&mux2_i2c2 { - clock-frequency = <100000>; - - stdp4028@73 { - compatible = "megachips,stdp4028-ge-b850v3-fw"; - #address-cells = <1>; - #size-cells = <0>; - - reg = <0x73>; - - interrupt-parent = <&gpio2>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - stdp4028_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - port@1 { - reg = <1>; - stdp4028_out: endpoint { - remote-endpoint = <&stdp2690_in>; - }; - }; - }; - }; - - stdp2690@72 { - compatible = "megachips,stdp2690-ge-b850v3-fw"; - #address-cells = <1>; - #size-cells = <0>; - - reg = <0x72>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - stdp2690_in: endpoint { - remote-endpoint = <&stdp4028_out>; - }; - }; - - port@1 { - reg = <1>; - stdp2690_out: endpoint { - /* Connector for external display */ - }; - }; - }; - }; -}; From 33b6c8ed1ddd6118fbc150269cd2201462fbd7e6 Mon Sep 17 00:00:00 2001 From: Kael D'Alcamo Date: Wed, 24 Sep 2025 16:09:22 +0200 Subject: [PATCH 78/81] dt-bindings: vendor-prefixes: update regex for properties without a prefix Update vendor-prefixes.yaml to allow property names without a prefix to contain '#' character in all positions Signed-off-by: Kael D'Alcamo Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 699560820fdf..6ce9de649f4b 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1862,7 +1862,7 @@ patternProperties: # Normal property name match without a comma # These should catch all node/property names without a prefix - "^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$": true + "^[a-zA-Z0-9#_][a-zA-Z0-9#+\\-._@]{0,63}$": true "^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$": true "^#.*": true From 532a94352fca6b51f49d1cd9f0e4250ade49b8b2 Mon Sep 17 00:00:00 2001 From: Kael D'Alcamo Date: Wed, 24 Sep 2025 16:09:20 +0200 Subject: [PATCH 79/81] dt-bindings: rng: sparc_sun_oracle_rng: convert to DT schema Convert the Devicetree binding documentation for: * SUNW,n2-rng * SUNW,vf-rng * SUNW,kt-rng * ORCL,m4-rng * ORCL,m7-rng from plain text to YAML. Signed-off-by: Kael D'Alcamo Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/rng/SUNW,n2-rng.yaml | 50 +++++++++++++++++++ .../bindings/rng/sparc_sun_oracle_rng.txt | 30 ----------- 2 files changed, 50 insertions(+), 30 deletions(-) create mode 100644 Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml delete mode 100644 Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt diff --git a/Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml b/Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml new file mode 100644 index 000000000000..6eafc532dc76 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/SUNW,n2-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SUN UltraSPARC HWRNG + +maintainers: + - David S. Miller + +properties: + compatible: + enum: + - SUNW,n2-rng # for Niagara 2 Platform (SUN UltraSPARC T2 CPU) + - SUNW,vf-rng # for Victoria Falls Platform (SUN UltraSPARC T2 Plus CPU) + # for Rainbow/Yosemite Falls Platform (SUN SPARC T3/T4), + # (UltraSPARC KT/Niagara 3 - development names) + # more recent systems (after Oracle acquisition of SUN) + - SUNW,kt-rng + - ORCL,m4-rng # for SPARC T5/M5 + - ORCL,m7-rng # for SPARC T7/M7 + + reg: + maxItems: 1 + + "rng-#units": + description: Number of RNG units + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + +required: + - compatible + - reg + +additionalProperties: false + +# PS: see as well prtconfs.git by DaveM +examples: + - | + bus { + #address-cells = <1>; + #size-cells = <0>; + + rng@e { + compatible = "ORCL,m4-rng"; + reg = <0xe>; + rng-#units = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt b/Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt deleted file mode 100644 index b0b211194c71..000000000000 --- a/Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt +++ /dev/null @@ -1,30 +0,0 @@ -HWRNG support for the n2_rng driver - -Required properties: -- reg : base address to sample from -- compatible : should contain one of the following - RNG versions: - - 'SUNW,n2-rng' for Niagara 2 Platform (SUN UltraSPARC T2 CPU) - - 'SUNW,vf-rng' for Victoria Falls Platform (SUN UltraSPARC T2 Plus CPU) - - 'SUNW,kt-rng' for Rainbow/Yosemite Falls Platform (SUN SPARC T3/T4), (UltraSPARC KT/Niagara 3 - development names) - more recent systems (after Oracle acquisition of SUN) - - 'ORCL,m4-rng' for SPARC T5/M5 - - 'ORCL,m7-rng' for SPARC T7/M7 - -Examples: -/* linux LDOM on SPARC T5-2 */ -Node 0xf029a4f4 - .node: f029a4f4 - rng-#units: 00000002 - compatible: 'ORCL,m4-rng' - reg: 0000000e - name: 'random-number-generator' - -/* solaris on SPARC M7-8 */ -Node 0xf028c08c - rng-#units: 00000003 - compatible: 'ORCL,m7-rng' - reg: 0000000e - name: 'random-number-generator' - -PS: see as well prtconfs.git by DaveM From d1a7be736ca9b89c32023185fa95c0df02f6db27 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 24 Sep 2025 17:35:49 -0500 Subject: [PATCH 80/81] dt-bindings: gpu: Convert nvidia,gk20a to DT schema Convert the NVIDIA GPU binding to DT schema format. Add undocumented "interconnects" and "interconnect-names" properties for gp10b and gv11b. Drop all but one example. Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/gpu/nvidia,gk20a.txt | 115 ------------ .../devicetree/bindings/gpu/nvidia,gk20a.yaml | 171 ++++++++++++++++++ 2 files changed, 171 insertions(+), 115 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt create mode 100644 Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt deleted file mode 100644 index cc6ce5221a38..000000000000 --- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +++ /dev/null @@ -1,115 +0,0 @@ -NVIDIA Tegra Graphics Processing Units - -Required properties: -- compatible: "nvidia," - Currently recognized values: - - nvidia,gk20a - - nvidia,gm20b - - nvidia,gp10b - - nvidia,gv11b -- reg: Physical base address and length of the controller's registers. - Must contain two entries: - - first entry for bar0 - - second entry for bar1 -- interrupts: Must contain an entry for each entry in interrupt-names. - See ../interrupt-controller/interrupts.txt for details. -- interrupt-names: Must include the following entries: - - stall - - nonstall -- vdd-supply: regulator for supply voltage. Only required for GPUs not using - power domains. -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must include the following entries: - - gpu - - pwr -If the compatible string is "nvidia,gm20b", then the following clock -is also required: - - ref -If the compatible string is "nvidia,gv11b", then the following clock is also -required: - - fuse -- resets: Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must include the following entries: - - gpu -- power-domains: GPUs that make use of power domains can define this property - instead of vdd-supply. Currently "nvidia,gp10b" makes use of this. - -Optional properties: -- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details. - -Example for GK20A: - - gpu@57000000 { - compatible = "nvidia,gk20a"; - reg = <0x0 0x57000000 0x0 0x01000000>, - <0x0 0x58000000 0x0 0x01000000>; - interrupts = , - ; - interrupt-names = "stall", "nonstall"; - vdd-supply = <&vdd_gpu>; - clocks = <&tegra_car TEGRA124_CLK_GPU>, - <&tegra_car TEGRA124_CLK_PLL_P_OUT5>; - clock-names = "gpu", "pwr"; - resets = <&tegra_car 184>; - reset-names = "gpu"; - iommus = <&mc TEGRA_SWGROUP_GPU>; - }; - -Example for GM20B: - - gpu@57000000 { - compatible = "nvidia,gm20b"; - reg = <0x0 0x57000000 0x0 0x01000000>, - <0x0 0x58000000 0x0 0x01000000>; - interrupts = , - ; - interrupt-names = "stall", "nonstall"; - clocks = <&tegra_car TEGRA210_CLK_GPU>, - <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, - <&tegra_car TEGRA210_CLK_PLL_G_REF>; - clock-names = "gpu", "pwr", "ref"; - resets = <&tegra_car 184>; - reset-names = "gpu"; - iommus = <&mc TEGRA_SWGROUP_GPU>; - }; - -Example for GP10B: - - gpu@17000000 { - compatible = "nvidia,gp10b"; - reg = <0x0 0x17000000 0x0 0x1000000>, - <0x0 0x18000000 0x0 0x1000000>; - interrupts = ; - interrupt-names = "stall", "nonstall"; - clocks = <&bpmp TEGRA186_CLK_GPCCLK>, - <&bpmp TEGRA186_CLK_GPU>; - clock-names = "gpu", "pwr"; - resets = <&bpmp TEGRA186_RESET_GPU>; - reset-names = "gpu"; - power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>; - iommus = <&smmu TEGRA186_SID_GPU>; - }; - -Example for GV11B: - - gpu@17000000 { - compatible = "nvidia,gv11b"; - reg = <0x17000000 0x1000000>, - <0x18000000 0x1000000>; - interrupts = , - ; - interrupt-names = "stall", "nonstall"; - clocks = <&bpmp TEGRA194_CLK_GPCCLK>, - <&bpmp TEGRA194_CLK_GPU_PWR>, - <&bpmp TEGRA194_CLK_FUSE>; - clock-names = "gpu", "pwr", "fuse"; - resets = <&bpmp TEGRA194_RESET_GPU>; - reset-names = "gpu"; - dma-coherent; - - power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>; - iommus = <&smmu TEGRA194_SID_GPU>; - }; diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml new file mode 100644 index 000000000000..4d856a8b674c --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml @@ -0,0 +1,171 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/nvidia,gk20a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Graphics Processing Units + +maintainers: + - Alexandre Courbot + - Jon Hunter + - Thierry Reding + +properties: + compatible: + enum: + - nvidia,gk20a + - nvidia,gm20b + - nvidia,gp10b + - nvidia,gv11b + + reg: + items: + - description: Bar0 register window + - description: Bar1 register window + + interrupts: + items: + - description: Stall interrupt + - description: Nonstall interrupt + + interrupt-names: + items: + - const: stall + - const: nonstall + + vdd-supply: + description: + Regulator for GPU supply voltage + + clocks: + minItems: 2 + items: + - description: GPU clock + - description: Power clock + - description: Reference or fuse clock + + clock-names: + minItems: 2 + items: + - const: gpu + - const: pwr + - enum: [ ref, fuse ] + + resets: + maxItems: 1 + + reset-names: + items: + - const: gpu + + power-domains: + maxItems: 1 + + interconnects: + minItems: 4 + maxItems: 12 + + interconnect-names: + minItems: 4 + maxItems: 12 + + iommus: + maxItems: 1 + + dma-coherent: true + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,gp10b + - nvidia,gv11b + then: + required: + - power-domains + else: + properties: + interconnects: false + interconnect-names: false + + required: + - vdd-supply + - if: + properties: + compatible: + contains: + enum: + - nvidia,gp10b + then: + properties: + interconnects: + maxItems: 4 + + interconnect-names: + items: + - const: dma-mem + - const: write-0 + - const: read-1 + - const: write-1 + - if: + properties: + compatible: + contains: + enum: + - nvidia,gv11b + then: + properties: + interconnects: + minItems: 12 + + interconnect-names: + items: + - const: dma-mem + - const: read-0-hp + - const: write-0 + - const: read-1 + - const: read-1-hp + - const: write-1 + - const: read-2 + - const: read-2-hp + - const: write-2 + - const: read-3 + - const: read-3-hp + - const: write-3 + +additionalProperties: false + +examples: + - | + #include + #include + #include + + gpu@57000000 { + compatible = "nvidia,gk20a"; + reg = <0x57000000 0x01000000>, + <0x58000000 0x01000000>; + interrupts = , + ; + interrupt-names = "stall", "nonstall"; + vdd-supply = <&vdd_gpu>; + clocks = <&tegra_car TEGRA124_CLK_GPU>, + <&tegra_car TEGRA124_CLK_PLL_P_OUT5>; + clock-names = "gpu", "pwr"; + resets = <&tegra_car 184>; + reset-names = "gpu"; + iommus = <&mc TEGRA_SWGROUP_GPU>; + }; From 129b91fc329604e05f794dc1a18a6da3eb518b4e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 26 Sep 2025 16:47:37 -0500 Subject: [PATCH 81/81] dt-bindings: arm: altera: Drop socfpga-sdram-edac.txt The contents of arm/altera/socfpga-sdram-edac.txt are already covered by edac/altr,socfpga-ecc-manager.yaml except for the "altr,sdram-edac" compatible string. Add the compatible and drop the old .txt binding doc. Acked-by: Matthew Gerlach Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/altera/socfpga-sdram-edac.txt | 15 --------------- .../bindings/edac/altr,socfpga-ecc-manager.yaml | 1 + 2 files changed, 1 insertion(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt deleted file mode 100644 index f5ad0ff69fae..000000000000 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt +++ /dev/null @@ -1,15 +0,0 @@ -Altera SOCFPGA SDRAM Error Detection & Correction [EDAC] -The EDAC accesses a range of registers in the SDRAM controller. - -Required properties: -- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10" -- altr,sdr-syscon : phandle of the sdr module -- interrupts : Should contain the SDRAM ECC IRQ in the - appropriate format for the IRQ controller. - -Example: - sdramedac { - compatible = "altr,sdram-edac"; - altr,sdr-syscon = <&sdr>; - interrupts = <0 39 4>; - }; diff --git a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml index ec4634c5fa89..3d787dea0f14 100644 --- a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml +++ b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml @@ -53,6 +53,7 @@ properties: properties: compatible: enum: + - altr,sdram-edac - altr,sdram-edac-a10 - altr,sdram-edac-s10