diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index a5e22678e27b..e9b0ed07bb90 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -61,10 +61,10 @@ static int exynos_cpu_boot(int cpu) * Exynos3250 doesn't need to send smc command for secondary CPU boot * because Exynos3250 removes WFE in secure mode. * - * On Exynos5 devices the call is ignored by trustzone firmware. + * On most Exynos5 devices the call is ignored by trustzone firmware. */ if (!soc_is_exynos4210() && !soc_is_exynos4212() && - !soc_is_exynos4412()) + !soc_is_exynos4412() && !of_machine_is_compatible("google,manta")) return 0; /* diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index c58d200e4816..5203b047deac 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -700,8 +700,8 @@ int __init omap1_clk_init(void) /* Make sure UART clocks are enabled early */ if (cpu_is_omap16xx()) omap_writel(omap_readl(MOD_CONF_CTRL_0) | - CONF_MOD_UART1_CLK_MODE_R | - CONF_MOD_UART3_CLK_MODE_R, MOD_CONF_CTRL_0); + (1 << CONF_MOD_UART1_CLK_MODE_R) | + (1 << CONF_MOD_UART3_CLK_MODE_R), MOD_CONF_CTRL_0); #endif /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 821727eefd5a..f3f19bcfca2c 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -42,7 +42,6 @@ config ARCH_OMAP4 select PM if CPU_IDLE select ARM_ERRATA_754322 select ARM_ERRATA_775420 - select OMAP_INTERCONNECT config SOC_OMAP5 bool "TI OMAP5" diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 43f5944850e6..cf2bfb447ee2 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -17,6 +17,7 @@ #include #include #include +#include #ifdef CONFIG_SOC_BUS #include @@ -250,7 +251,7 @@ static void __init omap3_cpuinfo(void) cpu_name = "OMAP3503"; } - scnprintf(soc_name, sizeof(soc_name), "%s", cpu_name); + strscpy(soc_name, cpu_name); /* Print verbose information */ n += scnprintf(buf, sizeof(buf) - n, "%s %s (", soc_name, soc_rev); diff --git a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c index 4277ba5b3ae0..747a96c58df1 100644 --- a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c +++ b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c @@ -141,7 +141,7 @@ static struct notifier_block regulator_quirk_nb = { static int __init rcar_gen2_regulator_quirk(void) { struct regulator_quirk *quirk, *pos, *tmp; - struct of_phandle_args *argsa, *argsb; + struct of_phandle_args *args; const struct of_device_id *id; struct device_node *np; u32 mon, addr; @@ -171,14 +171,14 @@ static int __init rcar_gen2_regulator_quirk(void) goto err_mem; } - argsa = &quirk->irq_args; + args = &quirk->irq_args; memcpy(&quirk->i2c_msg, id->data, sizeof(quirk->i2c_msg)); quirk->id = id; quirk->np = of_node_get(np); quirk->i2c_msg.addr = addr; - ret = of_irq_parse_one(np, 0, argsa); + ret = of_irq_parse_one(np, 0, args); if (ret) { /* Skip invalid entry and continue */ of_node_put(np); kfree(quirk); @@ -186,15 +186,7 @@ static int __init rcar_gen2_regulator_quirk(void) } list_for_each_entry(pos, &quirk_list, list) { - argsb = &pos->irq_args; - - if (argsa->args_count != argsb->args_count) - continue; - - ret = memcmp(argsa->args, argsb->args, - argsa->args_count * - sizeof(argsa->args[0])); - if (!ret) { + if (of_phandle_args_equal(args, &pos->irq_args)) { pos->shared = true; quirk->shared = true; } diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 54eb1d7fd419..72c812e76b0b 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -188,16 +188,15 @@ config ARCH_MESON This enables support for the arm64 based Amlogic SoCs such as the s905, S905X/D, S912, A113X/D or S905X/D2 -menu "Microchip SoC support" +menuconfig ARCH_MICROCHIP + bool "Microchip SoC support" -config ARCH_MICROCHIP - bool +if ARCH_MICROCHIP config ARCH_LAN969X bool "Microchip LAN969X SoC family" select PINCTRL select DW_APB_TIMER_OF - select ARCH_MICROCHIP help This enables support for the Microchip LAN969X ARMv8-based SoC family of TSN-capable gigabit switches. @@ -212,7 +211,6 @@ config ARCH_SPARX5 bool "Microchip Sparx5 SoC family" select PINCTRL select DW_APB_TIMER_OF - select ARCH_MICROCHIP help This enables support for the Microchip Sparx5 ARMv8-based SoC family of TSN-capable gigabit switches. @@ -223,7 +221,7 @@ config ARCH_SPARX5 security through TCAM-based frame processing using versatile content aware processor (VCAP). -endmenu +endif config ARCH_MMP bool "Marvell MMP SoC Family" diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e4c3a66a7311..d905a0777f93 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -57,6 +57,7 @@ CONFIG_ARCH_HISI=y CONFIG_ARCH_KEEMBAY=y CONFIG_ARCH_MEDIATEK=y CONFIG_ARCH_MESON=y +CONFIG_ARCH_MICROCHIP=y CONFIG_ARCH_MVEBU=y CONFIG_ARCH_NXP=y CONFIG_ARCH_LAYERSCAPE=y diff --git a/include/linux/platform_data/voltage-omap.h b/include/linux/platform_data/voltage-omap.h index 6d74e507dbd2..2b48f2b0135d 100644 --- a/include/linux/platform_data/voltage-omap.h +++ b/include/linux/platform_data/voltage-omap.h @@ -10,14 +10,14 @@ /** * struct omap_volt_data - Omap voltage specific data. - * @voltage_nominal: The possible voltage value in uV + * @volt_nominal: The possible voltage value in uV * @sr_efuse_offs: The offset of the efuse register(from system * control module base address) from where to read * the n-target value for the smartreflex module. * @sr_errminlimit: Error min limit value for smartreflex. This value * differs at differnet opp and thus is linked * with voltage. - * @vp_errorgain: Error gain value for the voltage processor. This + * @vp_errgain: Error gain value for the voltage processor. This * field also differs according to the voltage/opp. */ struct omap_volt_data {