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Delete the goldfish_nand driver.
This driver was inherited from qemu1 and not used anymore. Signed-off-by: Roman Kiryanov <rkir@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Roman Kiryanov
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
45ad559a29
commit
4ae0fe70a0
@@ -4,10 +4,3 @@ config GOLDFISH_AUDIO
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---help---
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---help---
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Emulated audio channel for the Goldfish Android Virtual Device
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Emulated audio channel for the Goldfish Android Virtual Device
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config MTD_GOLDFISH_NAND
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tristate "Goldfish NAND device"
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depends on GOLDFISH
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depends on MTD
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help
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Drives the emulated NAND flash device on the Google Goldfish
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Android virtual device.
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@@ -3,4 +3,3 @@
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#
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#
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obj-$(CONFIG_GOLDFISH_AUDIO) += goldfish_audio.o
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obj-$(CONFIG_GOLDFISH_AUDIO) += goldfish_audio.o
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obj-$(CONFIG_MTD_GOLDFISH_NAND) += goldfish_nand.o
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@@ -1,441 +0,0 @@
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/*
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* drivers/mtd/devices/goldfish_nand.c
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (C) 2012 Intel, Inc.
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* Copyright (C) 2013 Intel, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/io.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/ioport.h>
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#include <linux/vmalloc.h>
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#include <linux/mtd/mtd.h>
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#include <linux/platform_device.h>
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#include <linux/mutex.h>
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#include <linux/goldfish.h>
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#include <asm/div64.h>
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#include <linux/dma-mapping.h>
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#include "goldfish_nand_reg.h"
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struct goldfish_nand {
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/* lock protects access to the device registers */
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struct mutex lock;
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unsigned char __iomem *base;
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struct cmd_params *cmd_params;
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size_t mtd_count;
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struct mtd_info mtd[0];
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};
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static u32 goldfish_nand_cmd_with_params(struct mtd_info *mtd,
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enum nand_cmd cmd, u64 addr, u32 len,
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void *ptr, u32 *rv)
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{
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u32 cmdp;
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struct goldfish_nand *nand = mtd->priv;
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struct cmd_params *cps = nand->cmd_params;
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unsigned char __iomem *base = nand->base;
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if (!cps)
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return -1;
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switch (cmd) {
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case NAND_CMD_ERASE:
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cmdp = NAND_CMD_ERASE_WITH_PARAMS;
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break;
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case NAND_CMD_READ:
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cmdp = NAND_CMD_READ_WITH_PARAMS;
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break;
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case NAND_CMD_WRITE:
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cmdp = NAND_CMD_WRITE_WITH_PARAMS;
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break;
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default:
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return -1;
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}
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cps->dev = mtd - nand->mtd;
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cps->addr_high = (u32)(addr >> 32);
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cps->addr_low = (u32)addr;
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cps->transfer_size = len;
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cps->data = (unsigned long)ptr;
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writel(cmdp, base + NAND_COMMAND);
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*rv = cps->result;
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return 0;
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}
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static u32 goldfish_nand_cmd(struct mtd_info *mtd, enum nand_cmd cmd,
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u64 addr, u32 len, void *ptr)
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{
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struct goldfish_nand *nand = mtd->priv;
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u32 rv;
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unsigned char __iomem *base = nand->base;
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mutex_lock(&nand->lock);
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if (goldfish_nand_cmd_with_params(mtd, cmd, addr, len, ptr, &rv)) {
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writel(mtd - nand->mtd, base + NAND_DEV);
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writel((u32)(addr >> 32), base + NAND_ADDR_HIGH);
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writel((u32)addr, base + NAND_ADDR_LOW);
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writel(len, base + NAND_TRANSFER_SIZE);
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gf_write_ptr(ptr, base + NAND_DATA, base + NAND_DATA_HIGH);
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writel(cmd, base + NAND_COMMAND);
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rv = readl(base + NAND_RESULT);
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}
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mutex_unlock(&nand->lock);
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return rv;
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}
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static int goldfish_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
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{
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loff_t ofs = instr->addr;
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u32 len = instr->len;
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s32 rem;
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if (ofs + len > mtd->size)
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goto invalid_arg;
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ofs = div_s64_rem(ofs, mtd->writesize, &rem);
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if (rem)
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goto invalid_arg;
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ofs *= (mtd->writesize + mtd->oobsize);
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if (len % mtd->writesize)
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goto invalid_arg;
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len = len / mtd->writesize * (mtd->writesize + mtd->oobsize);
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if (goldfish_nand_cmd(mtd, NAND_CMD_ERASE, ofs, len, NULL) != len) {
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pr_err("%s: erase failed, start %llx, len %x, dev_size %llx, erase_size %x\n",
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__func__, ofs, len, mtd->size, mtd->erasesize);
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return -EIO;
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}
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return 0;
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invalid_arg:
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pr_err("%s: invalid erase, start %llx, len %x, dev_size %llx, erase_size %x\n",
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__func__, ofs, len, mtd->size, mtd->erasesize);
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return -EINVAL;
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}
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static int goldfish_nand_read_oob(struct mtd_info *mtd, loff_t ofs,
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struct mtd_oob_ops *ops)
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{
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s32 rem;
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if (ofs + ops->len > mtd->size)
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goto invalid_arg;
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if (ops->datbuf && ops->len && ops->len != mtd->writesize)
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goto invalid_arg;
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if (ops->ooblen + ops->ooboffs > mtd->oobsize)
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goto invalid_arg;
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ofs = div_s64_rem(ofs, mtd->writesize, &rem);
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if (rem)
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goto invalid_arg;
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ofs *= (mtd->writesize + mtd->oobsize);
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if (ops->datbuf)
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ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
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ops->len, ops->datbuf);
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ofs += mtd->writesize + ops->ooboffs;
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if (ops->oobbuf)
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ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
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ops->ooblen, ops->oobbuf);
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return 0;
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invalid_arg:
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pr_err("%s: invalid read, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
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__func__, ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
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return -EINVAL;
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}
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static int goldfish_nand_write_oob(struct mtd_info *mtd, loff_t ofs,
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struct mtd_oob_ops *ops)
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{
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s32 rem;
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if (ofs + ops->len > mtd->size)
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goto invalid_arg;
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if (ops->len && ops->len != mtd->writesize)
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goto invalid_arg;
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if (ops->ooblen + ops->ooboffs > mtd->oobsize)
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goto invalid_arg;
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ofs = div_s64_rem(ofs, mtd->writesize, &rem);
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if (rem)
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goto invalid_arg;
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ofs *= (mtd->writesize + mtd->oobsize);
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if (ops->datbuf)
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ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
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ops->len, ops->datbuf);
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ofs += mtd->writesize + ops->ooboffs;
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if (ops->oobbuf)
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ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
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ops->ooblen, ops->oobbuf);
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return 0;
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invalid_arg:
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pr_err("%s: invalid write, start %llx, len %zx, ooblen %zx, dev_size %llx, write_size %x\n",
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__func__, ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
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return -EINVAL;
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}
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static int goldfish_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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s32 rem;
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if (from + len > mtd->size)
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goto invalid_arg;
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from = div_s64_rem(from, mtd->writesize, &rem);
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if (rem)
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goto invalid_arg;
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from *= (mtd->writesize + mtd->oobsize);
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*retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, from, len, buf);
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return 0;
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invalid_arg:
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pr_err("%s: invalid read, start %llx, len %zx, dev_size %llx, write_size %x\n",
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__func__, from, len, mtd->size, mtd->writesize);
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return -EINVAL;
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}
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static int goldfish_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t *retlen, const u_char *buf)
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{
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s32 rem;
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if (to + len > mtd->size)
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goto invalid_arg;
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to = div_s64_rem(to, mtd->writesize, &rem);
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if (rem)
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goto invalid_arg;
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to *= (mtd->writesize + mtd->oobsize);
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*retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, to, len, (void *)buf);
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return 0;
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invalid_arg:
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pr_err("%s: invalid write, start %llx, len %zx, dev_size %llx, write_size %x\n",
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__func__, to, len, mtd->size, mtd->writesize);
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return -EINVAL;
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}
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static int goldfish_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
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{
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s32 rem;
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if (ofs >= mtd->size)
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goto invalid_arg;
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ofs = div_s64_rem(ofs, mtd->writesize, &rem);
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if (rem)
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goto invalid_arg;
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ofs *= mtd->erasesize / mtd->writesize;
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ofs *= (mtd->writesize + mtd->oobsize);
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return goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_GET, ofs, 0, NULL);
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invalid_arg:
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pr_err("%s: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
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__func__, ofs, mtd->size, mtd->writesize);
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return -EINVAL;
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}
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static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
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{
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s32 rem;
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if (ofs >= mtd->size)
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goto invalid_arg;
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ofs = div_s64_rem(ofs, mtd->writesize, &rem);
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if (rem)
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goto invalid_arg;
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ofs *= mtd->erasesize / mtd->writesize;
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ofs *= (mtd->writesize + mtd->oobsize);
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if (goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_SET, ofs, 0, NULL) != 1)
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return -EIO;
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return 0;
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invalid_arg:
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pr_err("%s: invalid arg, ofs %llx, dev_size %llx, write_size %x\n",
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__func__, ofs, mtd->size, mtd->writesize);
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return -EINVAL;
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}
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static int nand_setup_cmd_params(struct platform_device *pdev,
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struct goldfish_nand *nand)
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{
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dma_addr_t dma_handle;
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unsigned char __iomem *base = nand->base;
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nand->cmd_params = dmam_alloc_coherent(&pdev->dev,
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sizeof(struct cmd_params),
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&dma_handle, GFP_KERNEL);
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if (!nand->cmd_params) {
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dev_err(&pdev->dev, "allocate buffer failed\n");
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return -ENOMEM;
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}
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writel((u32)((u64)dma_handle >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);
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writel((u32)dma_handle, base + NAND_CMD_PARAMS_ADDR_LOW);
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return 0;
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}
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static int goldfish_nand_init_device(struct platform_device *pdev,
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struct goldfish_nand *nand, int id)
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{
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u32 name_len;
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u32 result;
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u32 flags;
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unsigned char __iomem *base = nand->base;
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struct mtd_info *mtd = &nand->mtd[id];
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char *name;
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mutex_lock(&nand->lock);
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writel(id, base + NAND_DEV);
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flags = readl(base + NAND_DEV_FLAGS);
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name_len = readl(base + NAND_DEV_NAME_LEN);
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mtd->writesize = readl(base + NAND_DEV_PAGE_SIZE);
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mtd->size = readl(base + NAND_DEV_SIZE_LOW);
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mtd->size |= (u64)readl(base + NAND_DEV_SIZE_HIGH) << 32;
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mtd->oobsize = readl(base + NAND_DEV_EXTRA_SIZE);
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mtd->oobavail = mtd->oobsize;
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mtd->erasesize = readl(base + NAND_DEV_ERASE_SIZE) /
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(mtd->writesize + mtd->oobsize) * mtd->writesize;
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mtd->size = div_s64(mtd->size, mtd->writesize + mtd->oobsize);
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mtd->size *= mtd->writesize;
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dev_dbg(&pdev->dev,
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"goldfish nand dev%d: size %llx, page %d, extra %d, erase %d\n",
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id, mtd->size, mtd->writesize,
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mtd->oobsize, mtd->erasesize);
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mutex_unlock(&nand->lock);
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mtd->priv = nand;
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name = devm_kzalloc(&pdev->dev, name_len + 1, GFP_KERNEL);
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if (!name)
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return -ENOMEM;
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mtd->name = name;
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result = goldfish_nand_cmd(mtd, NAND_CMD_GET_DEV_NAME, 0, name_len,
|
|
||||||
name);
|
|
||||||
if (result != name_len) {
|
|
||||||
dev_err(&pdev->dev,
|
|
||||||
"%s: failed to get dev name %d != %d\n",
|
|
||||||
__func__, result, name_len);
|
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
((char *)mtd->name)[name_len] = '\0';
|
|
||||||
|
|
||||||
/* Setup the MTD structure */
|
|
||||||
mtd->type = MTD_NANDFLASH;
|
|
||||||
mtd->flags = MTD_CAP_NANDFLASH;
|
|
||||||
if (flags & NAND_DEV_FLAG_READ_ONLY)
|
|
||||||
mtd->flags &= ~MTD_WRITEABLE;
|
|
||||||
if (flags & NAND_DEV_FLAG_CMD_PARAMS_CAP)
|
|
||||||
nand_setup_cmd_params(pdev, nand);
|
|
||||||
|
|
||||||
mtd->owner = THIS_MODULE;
|
|
||||||
mtd->_erase = goldfish_nand_erase;
|
|
||||||
mtd->_read = goldfish_nand_read;
|
|
||||||
mtd->_write = goldfish_nand_write;
|
|
||||||
mtd->_read_oob = goldfish_nand_read_oob;
|
|
||||||
mtd->_write_oob = goldfish_nand_write_oob;
|
|
||||||
mtd->_block_isbad = goldfish_nand_block_isbad;
|
|
||||||
mtd->_block_markbad = goldfish_nand_block_markbad;
|
|
||||||
|
|
||||||
if (mtd_device_register(mtd, NULL, 0))
|
|
||||||
return -EIO;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int goldfish_nand_probe(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
u32 num_dev;
|
|
||||||
int i;
|
|
||||||
int err;
|
|
||||||
u32 num_dev_working;
|
|
||||||
u32 version;
|
|
||||||
struct resource *r;
|
|
||||||
struct goldfish_nand *nand;
|
|
||||||
unsigned char __iomem *base;
|
|
||||||
|
|
||||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
||||||
if (!r)
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
|
|
||||||
if (!base)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
version = readl(base + NAND_VERSION);
|
|
||||||
if (version != NAND_VERSION_CURRENT) {
|
|
||||||
dev_err(&pdev->dev,
|
|
||||||
"goldfish_nand_init: version mismatch, got %d, expected %d\n",
|
|
||||||
version, NAND_VERSION_CURRENT);
|
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
num_dev = readl(base + NAND_NUM_DEV);
|
|
||||||
if (num_dev == 0)
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
nand = devm_kzalloc(&pdev->dev, sizeof(*nand) +
|
|
||||||
sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
|
|
||||||
if (!nand)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
mutex_init(&nand->lock);
|
|
||||||
nand->base = base;
|
|
||||||
nand->mtd_count = num_dev;
|
|
||||||
platform_set_drvdata(pdev, nand);
|
|
||||||
|
|
||||||
num_dev_working = 0;
|
|
||||||
for (i = 0; i < num_dev; i++) {
|
|
||||||
err = goldfish_nand_init_device(pdev, nand, i);
|
|
||||||
if (err == 0)
|
|
||||||
num_dev_working++;
|
|
||||||
}
|
|
||||||
if (num_dev_working == 0)
|
|
||||||
return -ENODEV;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int goldfish_nand_remove(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct goldfish_nand *nand = platform_get_drvdata(pdev);
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < nand->mtd_count; i++) {
|
|
||||||
if (nand->mtd[i].name)
|
|
||||||
mtd_device_unregister(&nand->mtd[i]);
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct platform_driver goldfish_nand_driver = {
|
|
||||||
.probe = goldfish_nand_probe,
|
|
||||||
.remove = goldfish_nand_remove,
|
|
||||||
.driver = {
|
|
||||||
.name = "goldfish_nand"
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
module_platform_driver(goldfish_nand_driver);
|
|
||||||
MODULE_LICENSE("GPL");
|
|
||||||
@@ -1,76 +0,0 @@
|
|||||||
/*
|
|
||||||
* drivers/mtd/devices/goldfish_nand_reg.h
|
|
||||||
*
|
|
||||||
* Copyright (C) 2007 Google, Inc.
|
|
||||||
*
|
|
||||||
* This software is licensed under the terms of the GNU General Public
|
|
||||||
* License version 2, as published by the Free Software Foundation, and
|
|
||||||
* may be copied, distributed, and modified under those terms.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef GOLDFISH_NAND_REG_H
|
|
||||||
#define GOLDFISH_NAND_REG_H
|
|
||||||
|
|
||||||
enum nand_cmd {
|
|
||||||
/* Write device name for NAND_DEV to NAND_DATA (vaddr) */
|
|
||||||
NAND_CMD_GET_DEV_NAME,
|
|
||||||
NAND_CMD_READ,
|
|
||||||
NAND_CMD_WRITE,
|
|
||||||
NAND_CMD_ERASE,
|
|
||||||
/* NAND_RESULT is 1 if block is bad, 0 if it is not */
|
|
||||||
NAND_CMD_BLOCK_BAD_GET,
|
|
||||||
NAND_CMD_BLOCK_BAD_SET,
|
|
||||||
NAND_CMD_READ_WITH_PARAMS,
|
|
||||||
NAND_CMD_WRITE_WITH_PARAMS,
|
|
||||||
NAND_CMD_ERASE_WITH_PARAMS
|
|
||||||
};
|
|
||||||
|
|
||||||
enum nand_dev_flags {
|
|
||||||
NAND_DEV_FLAG_READ_ONLY = 0x00000001,
|
|
||||||
NAND_DEV_FLAG_CMD_PARAMS_CAP = 0x00000002,
|
|
||||||
};
|
|
||||||
|
|
||||||
#define NAND_VERSION_CURRENT (1)
|
|
||||||
|
|
||||||
enum nand_reg {
|
|
||||||
/* Global */
|
|
||||||
NAND_VERSION = 0x000,
|
|
||||||
NAND_NUM_DEV = 0x004,
|
|
||||||
NAND_DEV = 0x008,
|
|
||||||
|
|
||||||
/* Dev info */
|
|
||||||
NAND_DEV_FLAGS = 0x010,
|
|
||||||
NAND_DEV_NAME_LEN = 0x014,
|
|
||||||
NAND_DEV_PAGE_SIZE = 0x018,
|
|
||||||
NAND_DEV_EXTRA_SIZE = 0x01c,
|
|
||||||
NAND_DEV_ERASE_SIZE = 0x020,
|
|
||||||
NAND_DEV_SIZE_LOW = 0x028,
|
|
||||||
NAND_DEV_SIZE_HIGH = 0x02c,
|
|
||||||
|
|
||||||
/* Command */
|
|
||||||
NAND_RESULT = 0x040,
|
|
||||||
NAND_COMMAND = 0x044,
|
|
||||||
NAND_DATA = 0x048,
|
|
||||||
NAND_DATA_HIGH = 0x100,
|
|
||||||
NAND_TRANSFER_SIZE = 0x04c,
|
|
||||||
NAND_ADDR_LOW = 0x050,
|
|
||||||
NAND_ADDR_HIGH = 0x054,
|
|
||||||
NAND_CMD_PARAMS_ADDR_LOW = 0x058,
|
|
||||||
NAND_CMD_PARAMS_ADDR_HIGH = 0x05c,
|
|
||||||
};
|
|
||||||
|
|
||||||
struct cmd_params {
|
|
||||||
u32 dev;
|
|
||||||
u32 addr_low;
|
|
||||||
u32 addr_high;
|
|
||||||
u32 transfer_size;
|
|
||||||
unsigned long data;
|
|
||||||
u32 result;
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
Reference in New Issue
Block a user