mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
[POWERPC] CPM: Always use new binding.
The kconfig entry can go away once arch/ppc and references to the config in drivers are removed. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
@@ -11,7 +11,6 @@ config MPC8272_ADS
|
||||
select 8260
|
||||
select FSL_SOC
|
||||
select PQ2_ADS_PCI_PIC if PCI
|
||||
select PPC_CPM_NEW_BINDING
|
||||
help
|
||||
This option enables support for the MPC8272 ADS board
|
||||
|
||||
@@ -22,7 +21,6 @@ config PQ2FADS
|
||||
select 8260
|
||||
select FSL_SOC
|
||||
select PQ2_ADS_PCI_PIC if PCI
|
||||
select PPC_CPM_NEW_BINDING
|
||||
help
|
||||
This option enables support for the PQ2FADS board
|
||||
|
||||
@@ -31,7 +29,6 @@ config EP8248E
|
||||
select 8272
|
||||
select 8260
|
||||
select FSL_SOC
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select MDIO_BITBANG
|
||||
help
|
||||
This enables support for the Embedded Planet EP8248E board.
|
||||
|
||||
@@ -19,7 +19,6 @@ config MPC8540_ADS
|
||||
config MPC8560_ADS
|
||||
bool "Freescale MPC8560 ADS"
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select CPM2
|
||||
help
|
||||
This option enables support for the MPC 8560 ADS board
|
||||
@@ -48,7 +47,6 @@ config MPC85xx_DS
|
||||
|
||||
config KSI8560
|
||||
bool "Emerson KSI8560"
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select DEFAULT_UIMAGE
|
||||
help
|
||||
This option enables support for the Emerson KSI8560 board
|
||||
@@ -60,14 +58,12 @@ config STX_GP3
|
||||
board.
|
||||
select CPM2
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING
|
||||
|
||||
config TQM8540
|
||||
bool "TQ Components TQM8540"
|
||||
help
|
||||
This option enables support for the TQ Components TQM8540 board.
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select TQM85xx
|
||||
|
||||
config TQM8541
|
||||
@@ -75,7 +71,6 @@ config TQM8541
|
||||
help
|
||||
This option enables support for the TQ Components TQM8541 board.
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select TQM85xx
|
||||
select CPM2
|
||||
|
||||
@@ -84,7 +79,6 @@ config TQM8555
|
||||
help
|
||||
This option enables support for the TQ Components TQM8555 board.
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select TQM85xx
|
||||
select CPM2
|
||||
|
||||
@@ -93,7 +87,6 @@ config TQM8560
|
||||
help
|
||||
This option enables support for the TQ Components TQM8560 board.
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select TQM85xx
|
||||
select CPM2
|
||||
|
||||
@@ -106,7 +99,6 @@ config SBC8548
|
||||
config SBC8560
|
||||
bool "Wind River SBC8560"
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING if CPM2
|
||||
help
|
||||
This option enables support for the Wind River SBC8560 board
|
||||
|
||||
|
||||
@@ -18,7 +18,6 @@ config MPC8XXFADS
|
||||
config MPC86XADS
|
||||
bool "MPC86XADS"
|
||||
select CPM1
|
||||
select PPC_CPM_NEW_BINDING
|
||||
help
|
||||
MPC86x Application Development System by Freescale Semiconductor.
|
||||
The MPC86xADS is meant to serve as a platform for s/w and h/w
|
||||
@@ -27,7 +26,6 @@ config MPC86XADS
|
||||
config MPC885ADS
|
||||
bool "MPC885ADS"
|
||||
select CPM1
|
||||
select PPC_CPM_NEW_BINDING
|
||||
help
|
||||
Freescale Semiconductor MPC885 Application Development System (ADS).
|
||||
Also known as DUET.
|
||||
@@ -37,7 +35,6 @@ config MPC885ADS
|
||||
config PPC_EP88XC
|
||||
bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)"
|
||||
select CPM1
|
||||
select PPC_CPM_NEW_BINDING
|
||||
help
|
||||
This enables support for the Embedded Planet EP88xC board.
|
||||
|
||||
@@ -47,7 +44,6 @@ config PPC_EP88XC
|
||||
config PPC_ADDER875
|
||||
bool "Analogue & Micro Adder 875"
|
||||
select CPM1
|
||||
select PPC_CPM_NEW_BINDING
|
||||
select REDBOOT
|
||||
help
|
||||
This enables support for the Analogue & Micro Adder 875
|
||||
|
||||
@@ -290,13 +290,7 @@ config CPM2
|
||||
config PPC_CPM_NEW_BINDING
|
||||
bool
|
||||
depends on CPM1 || CPM2
|
||||
help
|
||||
Select this if your board has been converted to use the new
|
||||
device tree bindings for CPM, and no longer needs the
|
||||
ioport callbacks or the platform device glue code.
|
||||
|
||||
The fs_enet and cpm_uart drivers will be built as
|
||||
of_platform devices.
|
||||
default y
|
||||
|
||||
config AXON_RAM
|
||||
tristate "Axon DDR2 memory device driver"
|
||||
|
||||
@@ -44,9 +44,6 @@
|
||||
|
||||
#define CPM_MAP_SIZE (0x4000)
|
||||
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
static void m8xx_cpm_dpinit(void);
|
||||
#endif
|
||||
cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */
|
||||
immap_t __iomem *mpc8xx_immr;
|
||||
static cpic8xx_t __iomem *cpic_reg;
|
||||
@@ -229,12 +226,7 @@ void __init cpm_reset(void)
|
||||
out_be32(&siu_conf->sc_sdcr, 1);
|
||||
immr_unmap(siu_conf);
|
||||
|
||||
#ifdef CONFIG_PPC_CPM_NEW_BINDING
|
||||
cpm_muram_init();
|
||||
#else
|
||||
/* Reclaim the DP memory for our use. */
|
||||
m8xx_cpm_dpinit();
|
||||
#endif
|
||||
}
|
||||
|
||||
static DEFINE_SPINLOCK(cmd_lock);
|
||||
@@ -293,110 +285,6 @@ cpm_setbrg(uint brg, uint rate)
|
||||
CPM_BRG_EN | CPM_BRG_DIV16);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
/*
|
||||
* dpalloc / dpfree bits.
|
||||
*/
|
||||
static spinlock_t cpm_dpmem_lock;
|
||||
/*
|
||||
* 16 blocks should be enough to satisfy all requests
|
||||
* until the memory subsystem goes up...
|
||||
*/
|
||||
static rh_block_t cpm_boot_dpmem_rh_block[16];
|
||||
static rh_info_t cpm_dpmem_info;
|
||||
|
||||
#define CPM_DPMEM_ALIGNMENT 8
|
||||
static u8 __iomem *dpram_vbase;
|
||||
static phys_addr_t dpram_pbase;
|
||||
|
||||
static void m8xx_cpm_dpinit(void)
|
||||
{
|
||||
spin_lock_init(&cpm_dpmem_lock);
|
||||
|
||||
dpram_vbase = cpmp->cp_dpmem;
|
||||
dpram_pbase = get_immrbase() + offsetof(immap_t, im_cpm.cp_dpmem);
|
||||
|
||||
/* Initialize the info header */
|
||||
rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
|
||||
sizeof(cpm_boot_dpmem_rh_block) /
|
||||
sizeof(cpm_boot_dpmem_rh_block[0]),
|
||||
cpm_boot_dpmem_rh_block);
|
||||
|
||||
/*
|
||||
* Attach the usable dpmem area.
|
||||
* XXX: This is actually crap. CPM_DATAONLY_BASE and
|
||||
* CPM_DATAONLY_SIZE are a subset of the available dparm. It varies
|
||||
* with the processor and the microcode patches applied / activated.
|
||||
* But the following should be at least safe.
|
||||
*/
|
||||
rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate the requested size worth of DP memory.
|
||||
* This function returns an offset into the DPRAM area.
|
||||
* Use cpm_dpram_addr() to get the virtual address of the area.
|
||||
*/
|
||||
unsigned long cpm_dpalloc(uint size, uint align)
|
||||
{
|
||||
unsigned long start;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
||||
cpm_dpmem_info.alignment = align;
|
||||
start = rh_alloc(&cpm_dpmem_info, size, "commproc");
|
||||
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
||||
|
||||
return (uint)start;
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpalloc);
|
||||
|
||||
int cpm_dpfree(unsigned long offset)
|
||||
{
|
||||
int ret;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
||||
ret = rh_free(&cpm_dpmem_info, offset);
|
||||
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpfree);
|
||||
|
||||
unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
|
||||
{
|
||||
unsigned long start;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
||||
cpm_dpmem_info.alignment = align;
|
||||
start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
|
||||
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
||||
|
||||
return start;
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpalloc_fixed);
|
||||
|
||||
void cpm_dpdump(void)
|
||||
{
|
||||
rh_dump(&cpm_dpmem_info);
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpdump);
|
||||
|
||||
void *cpm_dpram_addr(unsigned long offset)
|
||||
{
|
||||
return (void *)(dpram_vbase + offset);
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpram_addr);
|
||||
|
||||
uint cpm_dpram_phys(u8 *addr)
|
||||
{
|
||||
return (dpram_pbase + (uint)(addr - dpram_vbase));
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpram_phys);
|
||||
#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
|
||||
|
||||
struct cpm_ioport16 {
|
||||
__be16 dir, par, odr_sor, dat, intr;
|
||||
__be16 res[3];
|
||||
|
||||
@@ -46,10 +46,6 @@
|
||||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
static void cpm2_dpinit(void);
|
||||
#endif
|
||||
|
||||
cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
|
||||
|
||||
/* We allocate this here because it is used almost exclusively for
|
||||
@@ -71,11 +67,7 @@ void __init cpm2_reset(void)
|
||||
|
||||
/* Reclaim the DP memory for our use.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_CPM_NEW_BINDING
|
||||
cpm_muram_init();
|
||||
#else
|
||||
cpm2_dpinit();
|
||||
#endif
|
||||
|
||||
/* Tell everyone where the comm processor resides.
|
||||
*/
|
||||
@@ -353,95 +345,6 @@ int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
/*
|
||||
* dpalloc / dpfree bits.
|
||||
*/
|
||||
static spinlock_t cpm_dpmem_lock;
|
||||
/* 16 blocks should be enough to satisfy all requests
|
||||
* until the memory subsystem goes up... */
|
||||
static rh_block_t cpm_boot_dpmem_rh_block[16];
|
||||
static rh_info_t cpm_dpmem_info;
|
||||
static u8 __iomem *im_dprambase;
|
||||
|
||||
static void cpm2_dpinit(void)
|
||||
{
|
||||
spin_lock_init(&cpm_dpmem_lock);
|
||||
|
||||
/* initialize the info header */
|
||||
rh_init(&cpm_dpmem_info, 1,
|
||||
sizeof(cpm_boot_dpmem_rh_block) /
|
||||
sizeof(cpm_boot_dpmem_rh_block[0]),
|
||||
cpm_boot_dpmem_rh_block);
|
||||
|
||||
im_dprambase = cpm2_immr;
|
||||
|
||||
/* Attach the usable dpmem area */
|
||||
/* XXX: This is actually crap. CPM_DATAONLY_BASE and
|
||||
* CPM_DATAONLY_SIZE is only a subset of the available dpram. It
|
||||
* varies with the processor and the microcode patches activated.
|
||||
* But the following should be at least safe.
|
||||
*/
|
||||
rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
|
||||
}
|
||||
|
||||
/* This function returns an index into the DPRAM area.
|
||||
*/
|
||||
unsigned long cpm_dpalloc(uint size, uint align)
|
||||
{
|
||||
unsigned long start;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
||||
cpm_dpmem_info.alignment = align;
|
||||
start = rh_alloc(&cpm_dpmem_info, size, "commproc");
|
||||
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
||||
|
||||
return (uint)start;
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpalloc);
|
||||
|
||||
int cpm_dpfree(unsigned long offset)
|
||||
{
|
||||
int ret;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
||||
ret = rh_free(&cpm_dpmem_info, offset);
|
||||
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpfree);
|
||||
|
||||
/* not sure if this is ever needed */
|
||||
unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
|
||||
{
|
||||
unsigned long start;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
||||
cpm_dpmem_info.alignment = align;
|
||||
start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
|
||||
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
||||
|
||||
return start;
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpalloc_fixed);
|
||||
|
||||
void cpm_dpdump(void)
|
||||
{
|
||||
rh_dump(&cpm_dpmem_info);
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpdump);
|
||||
|
||||
void *cpm_dpram_addr(unsigned long offset)
|
||||
{
|
||||
return (void *)(im_dprambase + offset);
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_dpram_addr);
|
||||
#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
|
||||
|
||||
struct cpm2_ioports {
|
||||
u32 dir, par, sor, odr, dat;
|
||||
u32 res[3];
|
||||
|
||||
@@ -58,7 +58,6 @@ void __init udbg_init_cpm(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_CPM_NEW_BINDING
|
||||
static spinlock_t cpm_muram_lock;
|
||||
static rh_block_t cpm_boot_muram_rh_block[16];
|
||||
static rh_info_t cpm_muram_info;
|
||||
@@ -199,5 +198,3 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
|
||||
return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
|
||||
}
|
||||
EXPORT_SYMBOL(cpm_muram_dma);
|
||||
|
||||
#endif /* CONFIG_PPC_CPM_NEW_BINDING */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user