ARM: s3c: remove s3c24xx specific hacks

A number of device drivers reference CONFIG_ARM_S3C24XX_CPUFREQ or
similar symbols that are no longer available with the platform gone,
though the drivers themselves are still used on newer platforms,
so remove these hacks.

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-01-16 09:26:05 +01:00
parent 61b7f8920b
commit 1ea35b3557
28 changed files with 29 additions and 614 deletions
-10
View File
@@ -28,16 +28,6 @@
and \rd, \rd, #S3C2410_UFSTAT_TXMASK
.endm
/* Select the correct implementation depending on the configuration. The
* S3C2440 will get selected by default, as these are the most widely
* used variants of these
*/
#if defined(CONFIG_DEBUG_S3C2410_UART)
#define fifo_full fifo_full_s3c2410
#define fifo_level fifo_level_s3c2410
#endif
/* include the reset of the code which will do the work */
#include <debug/samsung.S>
-2
View File
@@ -2,9 +2,7 @@
#
# Copyright 2009 Simtec Electronics
ifdef CONFIG_ARCH_S3C64XX
include $(src)/Makefile.s3c64xx
endif
# Objects we always build independent of SoC choice
-1
View File
@@ -29,7 +29,6 @@
#include <linux/sizes.h>
#include <linux/platform_data/s3c-hsudc.h>
#include <linux/platform_data/s3c-hsotg.h>
#include <linux/platform_data/dma-s3c24xx.h>
#include <linux/platform_data/media/s5p_hdmi.h>
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "dma-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "dma-s3c64xx.h"
#endif
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "gpio-samsung-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "gpio-samsung-s3c64xx.h"
#endif
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "irqs-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "irqs-s3c64xx.h"
#endif
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "map-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "map-s3c64xx.h"
#endif
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "pm-core-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "pm-core-s3c64xx.h"
#endif
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "regs-clock-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "regs-clock-s3c64xx.h"
#endif
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "regs-gpio-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "regs-gpio-s3c64xx.h"
#endif
-7
View File
@@ -1,9 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARCH_S3C24XX
#include "regs-irq-s3c24xx.h"
#endif
#ifdef CONFIG_ARCH_S3C64XX
#include "regs-irq-s3c64xx.h"
#endif
+1 -1
View File
@@ -441,7 +441,7 @@ config CLKSRC_EXYNOS_MCT
config CLKSRC_SAMSUNG_PWM
bool "PWM timer driver for Samsung S3C, S5P" if COMPILE_TEST
depends on HAS_IOMEM
depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST
depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST
help
This is a new clocksource driver for the PWM timer found in
Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
+1 -2
View File
@@ -1010,8 +1010,7 @@ config I2C_RZV2M
config I2C_S3C2410
tristate "S3C/Exynos I2C Driver"
depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || \
ARCH_S5PV210 || COMPILE_TEST
depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST
help
Say Y here to include support for I2C controller in the
Samsung SoCs (S3C, S5Pv210, Exynos).
-72
View File
@@ -116,9 +116,6 @@ struct s3c24xx_i2c {
struct s3c2410_platform_i2c *pdata;
struct gpio_desc *gpios[2];
struct pinctrl *pctrl;
#if defined(CONFIG_ARM_S3C24XX_CPUFREQ)
struct notifier_block freq_transition;
#endif
struct regmap *sysreg;
unsigned int sys_i2c_cfg;
};
@@ -885,65 +882,6 @@ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
return 0;
}
#if defined(CONFIG_ARM_S3C24XX_CPUFREQ)
#define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition)
static int s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb,
unsigned long val, void *data)
{
struct s3c24xx_i2c *i2c = freq_to_i2c(nb);
unsigned int got;
int delta_f;
int ret;
delta_f = clk_get_rate(i2c->clk) - i2c->clkrate;
/* if we're post-change and the input clock has slowed down
* or at pre-change and the clock is about to speed up, then
* adjust our clock rate. <0 is slow, >0 speedup.
*/
if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) ||
(val == CPUFREQ_PRECHANGE && delta_f > 0)) {
i2c_lock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER);
ret = s3c24xx_i2c_clockrate(i2c, &got);
i2c_unlock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER);
if (ret < 0)
dev_err(i2c->dev, "cannot find frequency (%d)\n", ret);
else
dev_info(i2c->dev, "setting freq %d\n", got);
}
return 0;
}
static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
{
i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition;
return cpufreq_register_notifier(&i2c->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER);
}
static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
{
cpufreq_unregister_notifier(&i2c->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER);
}
#else
static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
{
return 0;
}
static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
{
}
#endif
#ifdef CONFIG_OF
static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
{
@@ -1152,13 +1090,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
}
}
ret = s3c24xx_i2c_register_cpufreq(i2c);
if (ret < 0) {
dev_err(&pdev->dev, "failed to register cpufreq notifier\n");
clk_unprepare(i2c->clk);
return ret;
}
/*
* Note, previous versions of the driver used i2c_add_adapter()
* to add the bus at any number. We now pass the bus number via
@@ -1175,7 +1106,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
ret = i2c_add_numbered_adapter(&i2c->adap);
if (ret < 0) {
pm_runtime_disable(&pdev->dev);
s3c24xx_i2c_deregister_cpufreq(i2c);
clk_unprepare(i2c->clk);
return ret;
}
@@ -1192,8 +1122,6 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
s3c24xx_i2c_deregister_cpufreq(i2c);
i2c_del_adapter(&i2c->adap);
return 0;
+3 -3
View File
@@ -452,11 +452,11 @@ config EP93XX_ADC
config EXYNOS_ADC
tristate "Exynos ADC driver support"
depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 || (OF && COMPILE_TEST)
depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || (OF && COMPILE_TEST)
depends on HAS_IOMEM
help
Driver for the ADC block found in the Samsung S3C (S3C2410, S3C2416,
S3C2440, S3C2443, S3C6410), S5Pv210 and Exynos SoCs.
Driver for the ADC block found in the Samsung S3C6410, S5Pv210 and
Exynos SoCs.
Choose Y here only if you build for such Samsung SoC.
To compile this driver as a module, choose M here: the module will be
@@ -1,15 +1,15 @@
# SPDX-License-Identifier: GPL-2.0-only
config VIDEO_S3C_CAMIF
tristate "Samsung S3C24XX/S3C64XX SoC Camera Interface driver"
tristate "Samsung 3C64XX SoC Camera Interface driver"
depends on V4L_PLATFORM_DRIVERS
depends on VIDEO_DEV && I2C && PM
depends on ARCH_S3C64XX || PLAT_S3C24XX || COMPILE_TEST
depends on ARCH_S3C64XX || COMPILE_TEST
select MEDIA_CONTROLLER
select VIDEO_V4L2_SUBDEV_API
select VIDEOBUF2_DMA_CONTIG
help
This is a v4l2 driver for s3c24xx and s3c64xx SoC series camera
host interface (CAMIF).
This is a v4l2 driver for s3c64xx SoC series camera host interface
(CAMIF).
To compile this driver as a module, choose M here: the module
will be called s3c-camif.
+2 -3
View File
@@ -321,9 +321,8 @@ config MMC_SDHCI_S3C
depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
help
This selects the Secure Digital Host Controller Interface (SDHCI)
often referrered to as the HSMMC block in some of the Samsung S3C
(S3C2416, S3C2443, S3C6410), S5Pv210 and Exynos (Exynso4210,
Exynos4412) SoCs.
often referrered to as the HSMMC block in some of the Samsung
S3C6410, S5Pv210 and Exynos (Exynso4210, Exynos4412) SoCs.
If you have a controller with this interface (thereforeyou build for
such Samsung SoC), say Y or M here.
+1 -1
View File
@@ -79,7 +79,7 @@ config MTD_NAND_NDFC
config MTD_NAND_S3C2410
tristate "Samsung S3C NAND controller"
depends on ARCH_S3C24XX || ARCH_S3C64XX
depends on ARCH_S3C64XX
help
This enables the NAND flash controller on the S3C24xx and S3C64xx
SoCs
-60
View File
@@ -166,10 +166,6 @@ struct s3c2410_nand_info {
enum s3c_nand_clk_state clk_state;
enum s3c_cpu_type cpu_type;
#ifdef CONFIG_ARM_S3C24XX_CPUFREQ
struct notifier_block freq_transition;
#endif
};
struct s3c24XX_nand_devtype_data {
@@ -711,54 +707,6 @@ static void s3c2440_nand_write_buf(struct nand_chip *this, const u_char *buf,
}
}
/* cpufreq driver support */
#ifdef CONFIG_ARM_S3C24XX_CPUFREQ
static int s3c2410_nand_cpufreq_transition(struct notifier_block *nb,
unsigned long val, void *data)
{
struct s3c2410_nand_info *info;
unsigned long newclk;
info = container_of(nb, struct s3c2410_nand_info, freq_transition);
newclk = clk_get_rate(info->clk);
if ((val == CPUFREQ_POSTCHANGE && newclk < info->clk_rate) ||
(val == CPUFREQ_PRECHANGE && newclk > info->clk_rate)) {
s3c2410_nand_setrate(info);
}
return 0;
}
static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info)
{
info->freq_transition.notifier_call = s3c2410_nand_cpufreq_transition;
return cpufreq_register_notifier(&info->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER);
}
static inline void
s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info)
{
cpufreq_unregister_notifier(&info->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER);
}
#else
static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info)
{
return 0;
}
static inline void
s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info)
{
}
#endif
/* device management functions */
static int s3c24xx_nand_remove(struct platform_device *pdev)
@@ -768,8 +716,6 @@ static int s3c24xx_nand_remove(struct platform_device *pdev)
if (info == NULL)
return 0;
s3c2410_nand_cpufreq_deregister(info);
/* Release all our mtds and their partitions, then go through
* freeing the resources used
*/
@@ -1184,12 +1130,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
if (err != 0)
goto exit_error;
err = s3c2410_nand_cpufreq_register(info);
if (err < 0) {
dev_err(&pdev->dev, "failed to init cpufreq support\n");
goto exit_error;
}
if (allow_clk_suspend(info)) {
dev_info(&pdev->dev, "clock idle support enabled\n");
s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
-10
View File
@@ -1323,16 +1323,6 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
#ifdef CONFIG_PINCTRL_S3C64XX
{ .compatible = "samsung,s3c64xx-pinctrl",
.data = &s3c64xx_of_data },
#endif
#ifdef CONFIG_PINCTRL_S3C24XX
{ .compatible = "samsung,s3c2412-pinctrl",
.data = &s3c2412_of_data },
{ .compatible = "samsung,s3c2416-pinctrl",
.data = &s3c2416_of_data },
{ .compatible = "samsung,s3c2440-pinctrl",
.data = &s3c2440_of_data },
{ .compatible = "samsung,s3c2450-pinctrl",
.data = &s3c2450_of_data },
#endif
{},
};

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