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https://github.com/linux-msm/laptops-kernel.git
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ARM: s3c: remove s3c24xx specific hacks
A number of device drivers reference CONFIG_ARM_S3C24XX_CPUFREQ or similar symbols that are no longer available with the platform gone, though the drivers themselves are still used on newer platforms, so remove these hacks. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -28,16 +28,6 @@
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and \rd, \rd, #S3C2410_UFSTAT_TXMASK
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.endm
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/* Select the correct implementation depending on the configuration. The
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* S3C2440 will get selected by default, as these are the most widely
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* used variants of these
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*/
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#if defined(CONFIG_DEBUG_S3C2410_UART)
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#define fifo_full fifo_full_s3c2410
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#define fifo_level fifo_level_s3c2410
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#endif
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/* include the reset of the code which will do the work */
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#include <debug/samsung.S>
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@@ -2,9 +2,7 @@
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#
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# Copyright 2009 Simtec Electronics
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ifdef CONFIG_ARCH_S3C64XX
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include $(src)/Makefile.s3c64xx
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endif
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# Objects we always build independent of SoC choice
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@@ -29,7 +29,6 @@
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#include <linux/sizes.h>
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#include <linux/platform_data/s3c-hsudc.h>
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#include <linux/platform_data/s3c-hsotg.h>
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#include <linux/platform_data/dma-s3c24xx.h>
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#include <linux/platform_data/media/s5p_hdmi.h>
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "dma-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "dma-s3c64xx.h"
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#endif
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "gpio-samsung-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "gpio-samsung-s3c64xx.h"
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#endif
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "irqs-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "irqs-s3c64xx.h"
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#endif
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "map-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "map-s3c64xx.h"
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#endif
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "pm-core-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "pm-core-s3c64xx.h"
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#endif
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "regs-clock-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "regs-clock-s3c64xx.h"
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#endif
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "regs-gpio-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "regs-gpio-s3c64xx.h"
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#endif
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@@ -1,9 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_ARCH_S3C24XX
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#include "regs-irq-s3c24xx.h"
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#endif
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#ifdef CONFIG_ARCH_S3C64XX
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#include "regs-irq-s3c64xx.h"
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#endif
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@@ -441,7 +441,7 @@ config CLKSRC_EXYNOS_MCT
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config CLKSRC_SAMSUNG_PWM
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bool "PWM timer driver for Samsung S3C, S5P" if COMPILE_TEST
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depends on HAS_IOMEM
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depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST
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depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST
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help
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This is a new clocksource driver for the PWM timer found in
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Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
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@@ -1010,8 +1010,7 @@ config I2C_RZV2M
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config I2C_S3C2410
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tristate "S3C/Exynos I2C Driver"
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depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || \
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ARCH_S5PV210 || COMPILE_TEST
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depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST
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help
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Say Y here to include support for I2C controller in the
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Samsung SoCs (S3C, S5Pv210, Exynos).
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@@ -116,9 +116,6 @@ struct s3c24xx_i2c {
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struct s3c2410_platform_i2c *pdata;
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struct gpio_desc *gpios[2];
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struct pinctrl *pctrl;
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#if defined(CONFIG_ARM_S3C24XX_CPUFREQ)
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struct notifier_block freq_transition;
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#endif
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struct regmap *sysreg;
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unsigned int sys_i2c_cfg;
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};
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@@ -885,65 +882,6 @@ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
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return 0;
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}
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#if defined(CONFIG_ARM_S3C24XX_CPUFREQ)
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#define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition)
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static int s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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struct s3c24xx_i2c *i2c = freq_to_i2c(nb);
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unsigned int got;
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int delta_f;
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int ret;
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delta_f = clk_get_rate(i2c->clk) - i2c->clkrate;
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/* if we're post-change and the input clock has slowed down
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* or at pre-change and the clock is about to speed up, then
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* adjust our clock rate. <0 is slow, >0 speedup.
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*/
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if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) ||
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(val == CPUFREQ_PRECHANGE && delta_f > 0)) {
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i2c_lock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER);
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ret = s3c24xx_i2c_clockrate(i2c, &got);
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i2c_unlock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER);
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if (ret < 0)
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dev_err(i2c->dev, "cannot find frequency (%d)\n", ret);
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else
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dev_info(i2c->dev, "setting freq %d\n", got);
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}
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return 0;
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}
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static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
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{
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i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition;
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return cpufreq_register_notifier(&i2c->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
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{
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cpufreq_unregister_notifier(&i2c->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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#else
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static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
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{
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return 0;
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}
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static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
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{
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}
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#endif
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#ifdef CONFIG_OF
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static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
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{
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@@ -1152,13 +1090,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
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}
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}
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ret = s3c24xx_i2c_register_cpufreq(i2c);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to register cpufreq notifier\n");
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clk_unprepare(i2c->clk);
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return ret;
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}
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/*
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* Note, previous versions of the driver used i2c_add_adapter()
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* to add the bus at any number. We now pass the bus number via
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@@ -1175,7 +1106,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
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ret = i2c_add_numbered_adapter(&i2c->adap);
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if (ret < 0) {
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pm_runtime_disable(&pdev->dev);
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s3c24xx_i2c_deregister_cpufreq(i2c);
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clk_unprepare(i2c->clk);
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return ret;
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}
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@@ -1192,8 +1122,6 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev)
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pm_runtime_disable(&pdev->dev);
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s3c24xx_i2c_deregister_cpufreq(i2c);
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i2c_del_adapter(&i2c->adap);
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return 0;
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@@ -452,11 +452,11 @@ config EP93XX_ADC
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config EXYNOS_ADC
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tristate "Exynos ADC driver support"
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depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 || (OF && COMPILE_TEST)
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depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || (OF && COMPILE_TEST)
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depends on HAS_IOMEM
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help
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Driver for the ADC block found in the Samsung S3C (S3C2410, S3C2416,
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S3C2440, S3C2443, S3C6410), S5Pv210 and Exynos SoCs.
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Driver for the ADC block found in the Samsung S3C6410, S5Pv210 and
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Exynos SoCs.
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Choose Y here only if you build for such Samsung SoC.
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To compile this driver as a module, choose M here: the module will be
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@@ -1,15 +1,15 @@
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# SPDX-License-Identifier: GPL-2.0-only
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config VIDEO_S3C_CAMIF
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tristate "Samsung S3C24XX/S3C64XX SoC Camera Interface driver"
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tristate "Samsung 3C64XX SoC Camera Interface driver"
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depends on V4L_PLATFORM_DRIVERS
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depends on VIDEO_DEV && I2C && PM
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depends on ARCH_S3C64XX || PLAT_S3C24XX || COMPILE_TEST
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depends on ARCH_S3C64XX || COMPILE_TEST
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select MEDIA_CONTROLLER
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select VIDEO_V4L2_SUBDEV_API
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select VIDEOBUF2_DMA_CONTIG
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help
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This is a v4l2 driver for s3c24xx and s3c64xx SoC series camera
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host interface (CAMIF).
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This is a v4l2 driver for s3c64xx SoC series camera host interface
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(CAMIF).
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To compile this driver as a module, choose M here: the module
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will be called s3c-camif.
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@@ -321,9 +321,8 @@ config MMC_SDHCI_S3C
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depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
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help
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This selects the Secure Digital Host Controller Interface (SDHCI)
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often referrered to as the HSMMC block in some of the Samsung S3C
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(S3C2416, S3C2443, S3C6410), S5Pv210 and Exynos (Exynso4210,
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Exynos4412) SoCs.
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often referrered to as the HSMMC block in some of the Samsung
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S3C6410, S5Pv210 and Exynos (Exynso4210, Exynos4412) SoCs.
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If you have a controller with this interface (thereforeyou build for
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such Samsung SoC), say Y or M here.
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@@ -79,7 +79,7 @@ config MTD_NAND_NDFC
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config MTD_NAND_S3C2410
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tristate "Samsung S3C NAND controller"
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depends on ARCH_S3C24XX || ARCH_S3C64XX
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depends on ARCH_S3C64XX
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help
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This enables the NAND flash controller on the S3C24xx and S3C64xx
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SoCs
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@@ -166,10 +166,6 @@ struct s3c2410_nand_info {
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enum s3c_nand_clk_state clk_state;
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enum s3c_cpu_type cpu_type;
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#ifdef CONFIG_ARM_S3C24XX_CPUFREQ
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struct notifier_block freq_transition;
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#endif
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};
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struct s3c24XX_nand_devtype_data {
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@@ -711,54 +707,6 @@ static void s3c2440_nand_write_buf(struct nand_chip *this, const u_char *buf,
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}
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}
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/* cpufreq driver support */
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#ifdef CONFIG_ARM_S3C24XX_CPUFREQ
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static int s3c2410_nand_cpufreq_transition(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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struct s3c2410_nand_info *info;
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unsigned long newclk;
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info = container_of(nb, struct s3c2410_nand_info, freq_transition);
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newclk = clk_get_rate(info->clk);
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if ((val == CPUFREQ_POSTCHANGE && newclk < info->clk_rate) ||
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(val == CPUFREQ_PRECHANGE && newclk > info->clk_rate)) {
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s3c2410_nand_setrate(info);
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}
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return 0;
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}
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static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info)
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{
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info->freq_transition.notifier_call = s3c2410_nand_cpufreq_transition;
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return cpufreq_register_notifier(&info->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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static inline void
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s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info)
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{
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cpufreq_unregister_notifier(&info->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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#else
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static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info)
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{
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return 0;
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}
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static inline void
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s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info)
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{
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}
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#endif
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/* device management functions */
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static int s3c24xx_nand_remove(struct platform_device *pdev)
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@@ -768,8 +716,6 @@ static int s3c24xx_nand_remove(struct platform_device *pdev)
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if (info == NULL)
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return 0;
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s3c2410_nand_cpufreq_deregister(info);
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/* Release all our mtds and their partitions, then go through
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* freeing the resources used
|
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*/
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@@ -1184,12 +1130,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
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if (err != 0)
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goto exit_error;
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err = s3c2410_nand_cpufreq_register(info);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to init cpufreq support\n");
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goto exit_error;
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}
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if (allow_clk_suspend(info)) {
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dev_info(&pdev->dev, "clock idle support enabled\n");
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s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
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@@ -1323,16 +1323,6 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
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#ifdef CONFIG_PINCTRL_S3C64XX
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{ .compatible = "samsung,s3c64xx-pinctrl",
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.data = &s3c64xx_of_data },
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#endif
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#ifdef CONFIG_PINCTRL_S3C24XX
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{ .compatible = "samsung,s3c2412-pinctrl",
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.data = &s3c2412_of_data },
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{ .compatible = "samsung,s3c2416-pinctrl",
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.data = &s3c2416_of_data },
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{ .compatible = "samsung,s3c2440-pinctrl",
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.data = &s3c2440_of_data },
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{ .compatible = "samsung,s3c2450-pinctrl",
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.data = &s3c2450_of_data },
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#endif
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{},
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};
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