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counter: Add Renesas RZ/G2L MTU3a counter driver
Add RZ/G2L MTU3a counter driver. This IP supports the following
phase counting modes on MTU1 and MTU2 channels
1) 16-bit phase counting modes on MTU1 and MTU2 channels.
2) 32-bit phase counting mode by cascading MTU1 and MTU2 channels.
This patch adds 3 counter value channels.
count0: 16-bit phase counter value channel on MTU1
count1: 16-bit phase counter value channel on MTU2
count2: 32-bit phase counter value channel by cascading
MTU1 and MTU2 channels.
The external input phase clock pin for the counter value channels
are as follows:
count0: "MTCLKA-MTCLKB"
count1: "MTCLKA-MTCLKB" or "MTCLKC-MTCLKD"
count2: "MTCLKA-MTCLKB" or "MTCLKC-MTCLKD"
Use the sysfs variable "external_input_phase_clock_select" to select the
external input phase clock pin and "cascade_counts_enable" to enable/
disable cascading of channels.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: William Breathitt Gray <william.gray@linaro.org>
Acked-by: William Breathitt Gray <william.gray@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230330111632.169434-5-biju.das.jz@bp.renesas.com
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@@ -73,6 +73,17 @@ config MICROCHIP_TCB_CAPTURE
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To compile this driver as a module, choose M here: the
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To compile this driver as a module, choose M here: the
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module will be called microchip-tcb-capture.
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module will be called microchip-tcb-capture.
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config RZ_MTU3_CNT
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tristate "Renesas RZ/G2L MTU3a counter driver"
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depends on RZ_MTU3 || COMPILE_TEST
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help
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Enable support for MTU3a counter driver found on Renesas RZ/G2L alike
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SoCs. This IP supports both 16-bit and 32-bit phase counting mode
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support.
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To compile this driver as a module, choose M here: the
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module will be called rz-mtu3-cnt.
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config STM32_LPTIMER_CNT
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config STM32_LPTIMER_CNT
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tristate "STM32 LP Timer encoder counter driver"
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tristate "STM32 LP Timer encoder counter driver"
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depends on MFD_STM32_LPTIMER || COMPILE_TEST
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depends on MFD_STM32_LPTIMER || COMPILE_TEST
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@@ -8,6 +8,7 @@ counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
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obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
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obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
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obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
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obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
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obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
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obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
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obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
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obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
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obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
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obj-$(CONFIG_TI_EQEP) += ti-eqep.o
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obj-$(CONFIG_TI_EQEP) += ti-eqep.o
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