mirror of
https://github.com/linux-apfs/linux-apfs.git
synced 2026-08-18 02:22:47 -07:00
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: drivers/ieee802154/fakehard.c drivers/net/e1000e/ich8lan.c drivers/net/e1000e/phy.c drivers/net/netxen/netxen_nic_init.c drivers/net/wireless/ath/ath9k/main.c
This commit is contained in:
commit
9b963e5d0e
31 files changed
+296
-259
No files matched your search
@@ -284,13 +284,13 @@ static netdev_tx_t ieee802154_fake_xmit(struct sk_buff *skb,
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{
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skb->skb_iif = dev->ifindex;
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skb->dev = dev;
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += skb->len;
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dev->trans_start = jiffies;
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/* FIXME: do hardware work here ... */
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dev_kfree_skb(skb);
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return NETDEV_TX_OK;
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}
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+1
-1
@@ -975,7 +975,7 @@ config ENC28J60_WRITEVERIFY
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config ETHOC
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tristate "OpenCores 10/100 Mbps Ethernet MAC support"
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depends on NET_ETHERNET && HAS_IOMEM
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depends on NET_ETHERNET && HAS_IOMEM && HAS_DMA
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select MII
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select PHYLIB
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select CRC32
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@@ -1088,7 +1088,14 @@ static struct net_device * au1000_probe(int port_num)
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return NULL;
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}
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if ((err = register_netdev(dev)) != 0) {
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dev->base_addr = base;
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dev->irq = irq;
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dev->netdev_ops = &au1000_netdev_ops;
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SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
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dev->watchdog_timeo = ETH_TX_TIMEOUT;
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err = register_netdev(dev);
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if (err != 0) {
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printk(KERN_ERR "%s: Cannot register net device, error %d\n",
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DRV_NAME, err);
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free_netdev(dev);
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@@ -1209,12 +1216,6 @@ static struct net_device * au1000_probe(int port_num)
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aup->tx_db_inuse[i] = pDB;
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}
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dev->base_addr = base;
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dev->irq = irq;
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dev->netdev_ops = &au1000_netdev_ops;
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SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
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dev->watchdog_timeo = ETH_TX_TIMEOUT;
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/*
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* The boot code uses the ethernet controller, so reset it to start
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* fresh. au1000_init() expects that the device is in reset state.
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@@ -142,6 +142,8 @@ struct e1000_info;
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#define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */
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#define HV_TNCRS_LOWER PHY_REG(778, 30)
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#define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */
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/* BM PHY Copper Specific Status */
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#define BM_CS_STATUS 17
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#define BM_CS_STATUS_LINK_UP 0x0400
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@@ -1110,7 +1110,8 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
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oem_reg |= HV_OEM_BITS_LPLU;
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}
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/* Restart auto-neg to activate the bits */
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oem_reg |= HV_OEM_BITS_RESTART_AN;
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if (!e1000_check_reset_block(hw))
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oem_reg |= HV_OEM_BITS_RESTART_AN;
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ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);
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out:
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@@ -3545,6 +3546,7 @@ struct e1000_info e1000_pch_info = {
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| FLAG_HAS_AMT
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| FLAG_HAS_FLASH
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| FLAG_HAS_JUMBO_FRAMES
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| FLAG_DISABLE_FC_PAUSE_TIME /* errata */
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| FLAG_APME_IN_WUC,
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.pba = 26,
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.max_hw_frame_size = 4096,
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+33
-17
@@ -2760,25 +2760,38 @@ void e1000e_reset(struct e1000_adapter *adapter)
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/*
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* flow control settings
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*
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* The high water mark must be low enough to fit two full frame
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* The high water mark must be low enough to fit one full frame
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* (or the size used for early receive) above it in the Rx FIFO.
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* Set it to the lower of:
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* - 90% of the Rx FIFO size, and
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* - the full Rx FIFO size minus the early receive size (for parts
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* with ERT support assuming ERT set to E1000_ERT_2048), or
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* - the full Rx FIFO size minus two full frames
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* - the full Rx FIFO size minus one full frame
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*/
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if ((adapter->flags & FLAG_HAS_ERT) &&
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(adapter->netdev->mtu > ETH_DATA_LEN))
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hwm = min(((pba << 10) * 9 / 10),
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((pba << 10) - (E1000_ERT_2048 << 3)));
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else
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hwm = min(((pba << 10) * 9 / 10),
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((pba << 10) - (2 * adapter->max_frame_size)));
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if (hw->mac.type == e1000_pchlan) {
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/*
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* Workaround PCH LOM adapter hangs with certain network
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* loads. If hangs persist, try disabling Tx flow control.
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*/
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if (adapter->netdev->mtu > ETH_DATA_LEN) {
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fc->high_water = 0x3500;
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fc->low_water = 0x1500;
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} else {
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fc->high_water = 0x5000;
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fc->low_water = 0x3000;
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||||
}
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} else {
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if ((adapter->flags & FLAG_HAS_ERT) &&
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(adapter->netdev->mtu > ETH_DATA_LEN))
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hwm = min(((pba << 10) * 9 / 10),
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((pba << 10) - (E1000_ERT_2048 << 3)));
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||||
else
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hwm = min(((pba << 10) * 9 / 10),
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((pba << 10) - adapter->max_frame_size));
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fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
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fc->low_water = (fc->high_water - (2 * adapter->max_frame_size));
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fc->low_water &= E1000_FCRTL_RTL; /* 8-byte granularity */
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fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
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fc->low_water = fc->high_water - 8;
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}
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if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
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fc->pause_time = 0xFFFF;
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@@ -2804,6 +2817,10 @@ void e1000e_reset(struct e1000_adapter *adapter)
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if (mac->ops.init_hw(hw))
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e_err("Hardware Error\n");
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/* additional part of the flow-control workaround above */
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if (hw->mac.type == e1000_pchlan)
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ew32(FCRTV_PCH, 0x1000);
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e1000_update_mng_vlan(adapter);
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/* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
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@@ -3612,7 +3629,7 @@ static void e1000_watchdog_task(struct work_struct *work)
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case SPEED_100:
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txb2b = 0;
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netdev->tx_queue_len = 100;
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/* maybe add some timeout factor ? */
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adapter->tx_timeout_factor = 10;
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break;
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}
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@@ -4284,8 +4301,10 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
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while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
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msleep(1);
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/* e1000e_down has a dependency on max_frame_size */
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/* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
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adapter->max_frame_size = max_frame;
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e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
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netdev->mtu = new_mtu;
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if (netif_running(netdev))
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e1000e_down(adapter);
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@@ -4315,9 +4334,6 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
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adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
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+ ETH_FCS_LEN;
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e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
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netdev->mtu = new_mtu;
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if (netif_running(netdev))
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e1000e_up(adapter);
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else
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+22
-34
@@ -71,7 +71,6 @@ static const u16 e1000_igp_2_cable_length_table[] =
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#define I82577_CFG_ASSERT_CRS_ON_TX (1 << 15)
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#define I82577_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */
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#define I82577_CTRL_REG 23
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#define I82577_CTRL_DOWNSHIFT_MASK (7 << 10)
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/* 82577 specific PHY registers */
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#define I82577_PHY_CTRL_2 18
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@@ -660,15 +659,6 @@ s32 e1000_copper_link_setup_82577(struct e1000_hw *hw)
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phy_data |= I82577_CFG_ENABLE_DOWNSHIFT;
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ret_val = phy->ops.write_reg(hw, I82577_CFG_REG, phy_data);
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if (ret_val)
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goto out;
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/* Set number of link attempts before downshift */
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ret_val = phy->ops.read_reg(hw, I82577_CTRL_REG, &phy_data);
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if (ret_val)
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goto out;
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phy_data &= ~I82577_CTRL_DOWNSHIFT_MASK;
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ret_val = phy->ops.write_reg(hw, I82577_CTRL_REG, phy_data);
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out:
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return ret_val;
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@@ -2658,19 +2648,18 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
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page = 0;
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if (reg > MAX_PHY_MULTI_PAGE_REG) {
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if ((hw->phy.type != e1000_phy_82578) ||
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((reg != I82578_ADDR_REG) &&
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(reg != I82578_ADDR_REG + 1))) {
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u32 phy_addr = hw->phy.addr;
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u32 phy_addr = hw->phy.addr;
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hw->phy.addr = 1;
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hw->phy.addr = 1;
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/* Page is shifted left, PHY expects (page x 32) */
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ret_val = e1000e_write_phy_reg_mdic(hw,
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IGP01E1000_PHY_PAGE_SELECT,
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||||
(page << IGP_PAGE_SHIFT));
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hw->phy.addr = phy_addr;
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||||
}
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/* Page is shifted left, PHY expects (page x 32) */
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ret_val = e1000e_write_phy_reg_mdic(hw,
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IGP01E1000_PHY_PAGE_SELECT,
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(page << IGP_PAGE_SHIFT));
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hw->phy.addr = phy_addr;
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||||
if (ret_val)
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goto out;
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}
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||||
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||||
ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
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||||
@@ -2678,7 +2667,7 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
|
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out:
|
||||
/* Revert to MDIO fast mode, if applicable */
|
||||
if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
|
||||
ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
|
||||
ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
|
||||
|
||||
if (!locked)
|
||||
hw->phy.ops.release(hw);
|
||||
@@ -2784,19 +2773,18 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
|
||||
}
|
||||
|
||||
if (reg > MAX_PHY_MULTI_PAGE_REG) {
|
||||
if ((hw->phy.type != e1000_phy_82578) ||
|
||||
((reg != I82578_ADDR_REG) &&
|
||||
(reg != I82578_ADDR_REG + 1))) {
|
||||
u32 phy_addr = hw->phy.addr;
|
||||
u32 phy_addr = hw->phy.addr;
|
||||
|
||||
hw->phy.addr = 1;
|
||||
hw->phy.addr = 1;
|
||||
|
||||
/* Page is shifted left, PHY expects (page x 32) */
|
||||
ret_val = e1000e_write_phy_reg_mdic(hw,
|
||||
IGP01E1000_PHY_PAGE_SELECT,
|
||||
(page << IGP_PAGE_SHIFT));
|
||||
hw->phy.addr = phy_addr;
|
||||
}
|
||||
/* Page is shifted left, PHY expects (page x 32) */
|
||||
ret_val = e1000e_write_phy_reg_mdic(hw,
|
||||
IGP01E1000_PHY_PAGE_SELECT,
|
||||
(page << IGP_PAGE_SHIFT));
|
||||
hw->phy.addr = phy_addr;
|
||||
|
||||
if (ret_val)
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
|
||||
@@ -2805,7 +2793,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
|
||||
out:
|
||||
/* Revert to MDIO fast mode, if applicable */
|
||||
if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
|
||||
ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
|
||||
ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
|
||||
|
||||
if (!locked)
|
||||
hw->phy.ops.release(hw);
|
||||
|
||||
@@ -242,11 +242,11 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
|
||||
static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
|
||||
struct ixgbe_ring *tx_ring)
|
||||
{
|
||||
int tc;
|
||||
u32 txoff = IXGBE_TFCS_TXOFF;
|
||||
|
||||
#ifdef CONFIG_IXGBE_DCB
|
||||
if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
|
||||
int tc;
|
||||
int reg_idx = tx_ring->reg_idx;
|
||||
int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
|
||||
|
||||
|
||||
+68
-74
@@ -568,6 +568,16 @@ static inline void ks_outblk(struct ks_net *ks, u16 *wptr, u32 len)
|
||||
iowrite16(*wptr++, ks->hw_addr);
|
||||
}
|
||||
|
||||
static void ks_disable_int(struct ks_net *ks)
|
||||
{
|
||||
ks_wrreg16(ks, KS_IER, 0x0000);
|
||||
} /* ks_disable_int */
|
||||
|
||||
static void ks_enable_int(struct ks_net *ks)
|
||||
{
|
||||
ks_wrreg16(ks, KS_IER, ks->rc_ier);
|
||||
} /* ks_enable_int */
|
||||
|
||||
/**
|
||||
* ks_tx_fifo_space - return the available hardware buffer size.
|
||||
* @ks: The chip information
|
||||
@@ -681,6 +691,47 @@ static void ks_soft_reset(struct ks_net *ks, unsigned op)
|
||||
}
|
||||
|
||||
|
||||
void ks_enable_qmu(struct ks_net *ks)
|
||||
{
|
||||
u16 w;
|
||||
|
||||
w = ks_rdreg16(ks, KS_TXCR);
|
||||
/* Enables QMU Transmit (TXCR). */
|
||||
ks_wrreg16(ks, KS_TXCR, w | TXCR_TXE);
|
||||
|
||||
/*
|
||||
* RX Frame Count Threshold Enable and Auto-Dequeue RXQ Frame
|
||||
* Enable
|
||||
*/
|
||||
|
||||
w = ks_rdreg16(ks, KS_RXQCR);
|
||||
ks_wrreg16(ks, KS_RXQCR, w | RXQCR_RXFCTE);
|
||||
|
||||
/* Enables QMU Receive (RXCR1). */
|
||||
w = ks_rdreg16(ks, KS_RXCR1);
|
||||
ks_wrreg16(ks, KS_RXCR1, w | RXCR1_RXE);
|
||||
ks->enabled = true;
|
||||
} /* ks_enable_qmu */
|
||||
|
||||
static void ks_disable_qmu(struct ks_net *ks)
|
||||
{
|
||||
u16 w;
|
||||
|
||||
w = ks_rdreg16(ks, KS_TXCR);
|
||||
|
||||
/* Disables QMU Transmit (TXCR). */
|
||||
w &= ~TXCR_TXE;
|
||||
ks_wrreg16(ks, KS_TXCR, w);
|
||||
|
||||
/* Disables QMU Receive (RXCR1). */
|
||||
w = ks_rdreg16(ks, KS_RXCR1);
|
||||
w &= ~RXCR1_RXE ;
|
||||
ks_wrreg16(ks, KS_RXCR1, w);
|
||||
|
||||
ks->enabled = false;
|
||||
|
||||
} /* ks_disable_qmu */
|
||||
|
||||
/**
|
||||
* ks_read_qmu - read 1 pkt data from the QMU.
|
||||
* @ks: The chip information
|
||||
@@ -752,7 +803,7 @@ static void ks_rcv(struct ks_net *ks, struct net_device *netdev)
|
||||
(frame_hdr->len < RX_BUF_SIZE) && frame_hdr->len)) {
|
||||
skb_reserve(skb, 2);
|
||||
/* read data block including CRC 4 bytes */
|
||||
ks_read_qmu(ks, (u16 *)skb->data, frame_hdr->len + 4);
|
||||
ks_read_qmu(ks, (u16 *)skb->data, frame_hdr->len);
|
||||
skb_put(skb, frame_hdr->len);
|
||||
skb->dev = netdev;
|
||||
skb->protocol = eth_type_trans(skb, netdev);
|
||||
@@ -861,7 +912,7 @@ static int ks_net_open(struct net_device *netdev)
|
||||
ks_dbg(ks, "%s - entry\n", __func__);
|
||||
|
||||
/* reset the HW */
|
||||
err = request_irq(ks->irq, ks_irq, KS_INT_FLAGS, DRV_NAME, ks);
|
||||
err = request_irq(ks->irq, ks_irq, KS_INT_FLAGS, DRV_NAME, netdev);
|
||||
|
||||
if (err) {
|
||||
printk(KERN_ERR "Failed to request IRQ: %d: %d\n",
|
||||
@@ -869,6 +920,15 @@ static int ks_net_open(struct net_device *netdev)
|
||||
return err;
|
||||
}
|
||||
|
||||
/* wake up powermode to normal mode */
|
||||
ks_set_powermode(ks, PMECR_PM_NORMAL);
|
||||
mdelay(1); /* wait for normal mode to take effect */
|
||||
|
||||
ks_wrreg16(ks, KS_ISR, 0xffff);
|
||||
ks_enable_int(ks);
|
||||
ks_enable_qmu(ks);
|
||||
netif_start_queue(ks->netdev);
|
||||
|
||||
if (netif_msg_ifup(ks))
|
||||
ks_dbg(ks, "network device %s up\n", netdev->name);
|
||||
|
||||
@@ -892,19 +952,14 @@ static int ks_net_stop(struct net_device *netdev)
|
||||
|
||||
netif_stop_queue(netdev);
|
||||
|
||||
kfree(ks->frame_head_info);
|
||||
|
||||
mutex_lock(&ks->lock);
|
||||
|
||||
/* turn off the IRQs and ack any outstanding */
|
||||
ks_wrreg16(ks, KS_IER, 0x0000);
|
||||
ks_wrreg16(ks, KS_ISR, 0xffff);
|
||||
|
||||
/* shutdown RX process */
|
||||
ks_wrreg16(ks, KS_RXCR1, 0x0000);
|
||||
|
||||
/* shutdown TX process */
|
||||
ks_wrreg16(ks, KS_TXCR, 0x0000);
|
||||
/* shutdown RX/TX QMU */
|
||||
ks_disable_qmu(ks);
|
||||
|
||||
/* set powermode to soft power down to save power */
|
||||
ks_set_powermode(ks, PMECR_PM_SOFTDOWN);
|
||||
@@ -929,17 +984,8 @@ static int ks_net_stop(struct net_device *netdev)
|
||||
*/
|
||||
static void ks_write_qmu(struct ks_net *ks, u8 *pdata, u16 len)
|
||||
{
|
||||
unsigned fid = ks->fid;
|
||||
|
||||
fid = ks->fid;
|
||||
ks->fid = (ks->fid + 1) & TXFR_TXFID_MASK;
|
||||
|
||||
/* reduce the tx interrupt occurrances. */
|
||||
if (!fid)
|
||||
fid |= TXFR_TXIC; /* irq on completion */
|
||||
|
||||
/* start header at txb[0] to align txw entries */
|
||||
ks->txh.txw[0] = cpu_to_le16(fid);
|
||||
ks->txh.txw[0] = 0;
|
||||
ks->txh.txw[1] = cpu_to_le16(len);
|
||||
|
||||
/* 1. set sudo-DMA mode */
|
||||
@@ -957,16 +1003,6 @@ static void ks_write_qmu(struct ks_net *ks, u8 *pdata, u16 len)
|
||||
;
|
||||
}
|
||||
|
||||
static void ks_disable_int(struct ks_net *ks)
|
||||
{
|
||||
ks_wrreg16(ks, KS_IER, 0x0000);
|
||||
} /* ks_disable_int */
|
||||
|
||||
static void ks_enable_int(struct ks_net *ks)
|
||||
{
|
||||
ks_wrreg16(ks, KS_IER, ks->rc_ier);
|
||||
} /* ks_enable_int */
|
||||
|
||||
/**
|
||||
* ks_start_xmit - transmit packet
|
||||
* @skb : The buffer to transmit
|
||||
@@ -1410,25 +1446,6 @@ static int ks_read_selftest(struct ks_net *ks)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ks_disable(struct ks_net *ks)
|
||||
{
|
||||
u16 w;
|
||||
|
||||
w = ks_rdreg16(ks, KS_TXCR);
|
||||
|
||||
/* Disables QMU Transmit (TXCR). */
|
||||
w &= ~TXCR_TXE;
|
||||
ks_wrreg16(ks, KS_TXCR, w);
|
||||
|
||||
/* Disables QMU Receive (RXCR1). */
|
||||
w = ks_rdreg16(ks, KS_RXCR1);
|
||||
w &= ~RXCR1_RXE ;
|
||||
ks_wrreg16(ks, KS_RXCR1, w);
|
||||
|
||||
ks->enabled = false;
|
||||
|
||||
} /* ks_disable */
|
||||
|
||||
static void ks_setup(struct ks_net *ks)
|
||||
{
|
||||
u16 w;
|
||||
@@ -1463,7 +1480,7 @@ static void ks_setup(struct ks_net *ks)
|
||||
w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP;
|
||||
ks_wrreg16(ks, KS_TXCR, w);
|
||||
|
||||
w = RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE;
|
||||
w = RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXIPFCC;
|
||||
|
||||
if (ks->promiscuous) /* bPromiscuous */
|
||||
w |= (RXCR1_RXAE | RXCR1_RXINVF);
|
||||
@@ -1486,28 +1503,6 @@ static void ks_setup_int(struct ks_net *ks)
|
||||
ks->rc_ier = (IRQ_LCI | IRQ_TXI | IRQ_RXI);
|
||||
} /* ks_setup_int */
|
||||
|
||||
void ks_enable(struct ks_net *ks)
|
||||
{
|
||||
u16 w;
|
||||
|
||||
w = ks_rdreg16(ks, KS_TXCR);
|
||||
/* Enables QMU Transmit (TXCR). */
|
||||
ks_wrreg16(ks, KS_TXCR, w | TXCR_TXE);
|
||||
|
||||
/*
|
||||
* RX Frame Count Threshold Enable and Auto-Dequeue RXQ Frame
|
||||
* Enable
|
||||
*/
|
||||
|
||||
w = ks_rdreg16(ks, KS_RXQCR);
|
||||
ks_wrreg16(ks, KS_RXQCR, w | RXQCR_RXFCTE);
|
||||
|
||||
/* Enables QMU Receive (RXCR1). */
|
||||
w = ks_rdreg16(ks, KS_RXCR1);
|
||||
ks_wrreg16(ks, KS_RXCR1, w | RXCR1_RXE);
|
||||
ks->enabled = true;
|
||||
} /* ks_enable */
|
||||
|
||||
static int ks_hw_init(struct ks_net *ks)
|
||||
{
|
||||
#define MHEADER_SIZE (sizeof(struct type_frame_head) * MAX_RECV_FRAMES)
|
||||
@@ -1612,11 +1607,9 @@ static int __devinit ks8851_probe(struct platform_device *pdev)
|
||||
|
||||
ks_soft_reset(ks, GRR_GSR);
|
||||
ks_hw_init(ks);
|
||||
ks_disable(ks);
|
||||
ks_disable_qmu(ks);
|
||||
ks_setup(ks);
|
||||
ks_setup_int(ks);
|
||||
ks_enable_int(ks);
|
||||
ks_enable(ks);
|
||||
memcpy(netdev->dev_addr, ks->mac_addr, 6);
|
||||
|
||||
data = ks_rdreg16(ks, KS_OBCR);
|
||||
@@ -1658,6 +1651,7 @@ static int __devexit ks8851_remove(struct platform_device *pdev)
|
||||
struct ks_net *ks = netdev_priv(netdev);
|
||||
struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
|
||||
kfree(ks->frame_head_info);
|
||||
unregister_netdev(netdev);
|
||||
iounmap(ks->hw_addr);
|
||||
free_netdev(netdev);
|
||||
|
||||
@@ -446,6 +446,7 @@ static int macvlan_init(struct net_device *dev)
|
||||
dev->state = (dev->state & ~MACVLAN_STATE_MASK) |
|
||||
(lowerdev->state & MACVLAN_STATE_MASK);
|
||||
dev->features = lowerdev->features & MACVLAN_FEATURES;
|
||||
dev->gso_max_size = lowerdev->gso_max_size;
|
||||
dev->iflink = lowerdev->ifindex;
|
||||
dev->hard_header_len = lowerdev->hard_header_len;
|
||||
|
||||
@@ -772,6 +773,7 @@ static int macvlan_device_event(struct notifier_block *unused,
|
||||
case NETDEV_FEAT_CHANGE:
|
||||
list_for_each_entry(vlan, &port->vlans, list) {
|
||||
vlan->dev->features = dev->features & MACVLAN_FEATURES;
|
||||
vlan->dev->gso_max_size = dev->gso_max_size;
|
||||
netdev_features_change(vlan->dev);
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -1202,6 +1202,8 @@ struct netxen_adapter {
|
||||
u32 int_vec_bit;
|
||||
u32 heartbit;
|
||||
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
|
||||
struct netxen_adapter_stats stats;
|
||||
|
||||
struct netxen_recv_context recv_ctx;
|
||||
|
||||
@@ -545,6 +545,8 @@ enum {
|
||||
#define NETXEN_NIU_TEST_MUX_CTL (NETXEN_CRB_NIU + 0x00094)
|
||||
#define NETXEN_NIU_XG_PAUSE_CTL (NETXEN_CRB_NIU + 0x00098)
|
||||
#define NETXEN_NIU_XG_PAUSE_LEVEL (NETXEN_CRB_NIU + 0x000dc)
|
||||
#define NETXEN_NIU_FRAME_COUNT_SELECT (NETXEN_CRB_NIU + 0x000ac)
|
||||
#define NETXEN_NIU_FRAME_COUNT (NETXEN_CRB_NIU + 0x000b0)
|
||||
#define NETXEN_NIU_XG_SEL (NETXEN_CRB_NIU + 0x00128)
|
||||
#define NETXEN_NIU_GB_PAUSE_CTL (NETXEN_CRB_NIU + 0x0030c)
|
||||
|
||||
|
||||
@@ -389,24 +389,51 @@ int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
|
||||
|
||||
int netxen_p2_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
|
||||
{
|
||||
__u32 reg;
|
||||
u32 mac_cfg;
|
||||
u32 cnt = 0;
|
||||
__u32 reg = 0x0200;
|
||||
u32 port = adapter->physical_port;
|
||||
u16 board_type = adapter->ahw.board_type;
|
||||
|
||||
if (port > NETXEN_NIU_MAX_XG_PORTS)
|
||||
return -EINVAL;
|
||||
|
||||
reg = NXRD32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port));
|
||||
if (mode == NETXEN_NIU_PROMISC_MODE)
|
||||
reg = (reg | 0x2000UL);
|
||||
else
|
||||
reg = (reg & ~0x2000UL);
|
||||
mac_cfg = NXRD32(adapter, NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port));
|
||||
mac_cfg &= ~0x4;
|
||||
NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg);
|
||||
|
||||
if (mode == NETXEN_NIU_ALLMULTI_MODE)
|
||||
reg = (reg | 0x1000UL);
|
||||
else
|
||||
reg = (reg & ~0x1000UL);
|
||||
if ((board_type == NETXEN_BRDTYPE_P2_SB31_10G_IMEZ) ||
|
||||
(board_type == NETXEN_BRDTYPE_P2_SB31_10G_HMEZ))
|
||||
reg = (0x20 << port);
|
||||
|
||||
NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
|
||||
NXWR32(adapter, NETXEN_NIU_FRAME_COUNT_SELECT, reg);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
while (NXRD32(adapter, NETXEN_NIU_FRAME_COUNT) && ++cnt < 20)
|
||||
mdelay(10);
|
||||
|
||||
if (cnt < 20) {
|
||||
|
||||
reg = NXRD32(adapter,
|
||||
NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port));
|
||||
|
||||
if (mode == NETXEN_NIU_PROMISC_MODE)
|
||||
reg = (reg | 0x2000UL);
|
||||
else
|
||||
reg = (reg & ~0x2000UL);
|
||||
|
||||
if (mode == NETXEN_NIU_ALLMULTI_MODE)
|
||||
reg = (reg | 0x1000UL);
|
||||
else
|
||||
reg = (reg & ~0x1000UL);
|
||||
|
||||
NXWR32(adapter,
|
||||
NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
|
||||
}
|
||||
|
||||
mac_cfg |= 0x4;
|
||||
NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -442,7 +469,7 @@ netxen_nic_enable_mcast_filter(struct netxen_adapter *adapter)
|
||||
{
|
||||
u32 val = 0;
|
||||
u16 port = adapter->physical_port;
|
||||
u8 *addr = adapter->netdev->dev_addr;
|
||||
u8 *addr = adapter->mac_addr;
|
||||
|
||||
if (adapter->mc_enabled)
|
||||
return 0;
|
||||
@@ -471,7 +498,7 @@ netxen_nic_disable_mcast_filter(struct netxen_adapter *adapter)
|
||||
{
|
||||
u32 val = 0;
|
||||
u16 port = adapter->physical_port;
|
||||
u8 *addr = adapter->netdev->dev_addr;
|
||||
u8 *addr = adapter->mac_addr;
|
||||
|
||||
if (!adapter->mc_enabled)
|
||||
return 0;
|
||||
@@ -666,7 +693,7 @@ void netxen_p3_nic_set_multi(struct net_device *netdev)
|
||||
|
||||
list_splice_tail_init(&adapter->mac_list, &del_list);
|
||||
|
||||
nx_p3_nic_add_mac(adapter, netdev->dev_addr, &del_list);
|
||||
nx_p3_nic_add_mac(adapter, adapter->mac_addr, &del_list);
|
||||
nx_p3_nic_add_mac(adapter, bcast_addr, &del_list);
|
||||
|
||||
if (netdev->flags & IFF_PROMISC) {
|
||||
|
||||
@@ -445,6 +445,7 @@ netxen_read_mac_addr(struct netxen_adapter *adapter)
|
||||
netdev->dev_addr[i] = *(p + 5 - i);
|
||||
|
||||
memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
|
||||
memcpy(adapter->mac_addr, netdev->dev_addr, netdev->addr_len);
|
||||
|
||||
/* set station address */
|
||||
|
||||
@@ -467,6 +468,7 @@ int netxen_nic_set_mac(struct net_device *netdev, void *p)
|
||||
netxen_napi_disable(adapter);
|
||||
}
|
||||
|
||||
memcpy(adapter->mac_addr, addr->sa_data, netdev->addr_len);
|
||||
memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
|
||||
adapter->macaddr_set(adapter, addr->sa_data);
|
||||
|
||||
@@ -960,7 +962,7 @@ netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev)
|
||||
return err;
|
||||
}
|
||||
if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
|
||||
adapter->macaddr_set(adapter, netdev->dev_addr);
|
||||
adapter->macaddr_set(adapter, adapter->mac_addr);
|
||||
|
||||
adapter->set_multi(netdev);
|
||||
adapter->set_mtu(adapter, netdev->mtu);
|
||||
|
||||
@@ -416,13 +416,8 @@ static void init_dma_desc_rings(struct net_device *dev)
|
||||
unsigned int txsize = priv->dma_tx_size;
|
||||
unsigned int rxsize = priv->dma_rx_size;
|
||||
unsigned int bfsize = priv->dma_buf_sz;
|
||||
int buff2_needed = 0;
|
||||
int dis_ic = 0;
|
||||
int buff2_needed = 0, dis_ic = 0;
|
||||
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
/* Using Timers disable interrupts on completion for the reception */
|
||||
dis_ic = 1;
|
||||
#endif
|
||||
/* Set the Buffer size according to the MTU;
|
||||
* indeed, in case of jumbo we need to bump-up the buffer sizes.
|
||||
*/
|
||||
@@ -437,6 +432,11 @@ static void init_dma_desc_rings(struct net_device *dev)
|
||||
else
|
||||
bfsize = DMA_BUFFER_SIZE;
|
||||
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
/* Disable interrupts on completion for the reception if timer is on */
|
||||
if (likely(priv->tm->enable))
|
||||
dis_ic = 1;
|
||||
#endif
|
||||
/* If the MTU exceeds 8k so use the second buffer in the chain */
|
||||
if (bfsize >= BUF_SIZE_8KiB)
|
||||
buff2_needed = 1;
|
||||
@@ -809,20 +809,22 @@ static void stmmac_tx(struct stmmac_priv *priv)
|
||||
|
||||
static inline void stmmac_enable_irq(struct stmmac_priv *priv)
|
||||
{
|
||||
#ifndef CONFIG_STMMAC_TIMER
|
||||
writel(DMA_INTR_DEFAULT_MASK, priv->dev->base_addr + DMA_INTR_ENA);
|
||||
#else
|
||||
priv->tm->timer_start(tmrate);
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
if (likely(priv->tm->enable))
|
||||
priv->tm->timer_start(tmrate);
|
||||
else
|
||||
#endif
|
||||
writel(DMA_INTR_DEFAULT_MASK, priv->dev->base_addr + DMA_INTR_ENA);
|
||||
}
|
||||
|
||||
static inline void stmmac_disable_irq(struct stmmac_priv *priv)
|
||||
{
|
||||
#ifndef CONFIG_STMMAC_TIMER
|
||||
writel(0, priv->dev->base_addr + DMA_INTR_ENA);
|
||||
#else
|
||||
priv->tm->timer_stop();
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
if (likely(priv->tm->enable))
|
||||
priv->tm->timer_stop();
|
||||
else
|
||||
#endif
|
||||
writel(0, priv->dev->base_addr + DMA_INTR_ENA);
|
||||
}
|
||||
|
||||
static int stmmac_has_work(struct stmmac_priv *priv)
|
||||
@@ -1031,22 +1033,23 @@ static int stmmac_open(struct net_device *dev)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
priv->tm = kmalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
|
||||
priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
|
||||
if (unlikely(priv->tm == NULL)) {
|
||||
pr_err("%s: ERROR: timer memory alloc failed \n", __func__);
|
||||
return -ENOMEM;
|
||||
}
|
||||
priv->tm->freq = tmrate;
|
||||
|
||||
/* Test if the HW timer can be actually used.
|
||||
* In case of failure continue with no timer. */
|
||||
/* Test if the external timer can be actually used.
|
||||
* In case of failure continue without timer. */
|
||||
if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
|
||||
pr_warning("stmmaceth: cannot attach the HW timer\n");
|
||||
pr_warning("stmmaceth: cannot attach the external timer.\n");
|
||||
tmrate = 0;
|
||||
priv->tm->freq = 0;
|
||||
priv->tm->timer_start = stmmac_no_timer_started;
|
||||
priv->tm->timer_stop = stmmac_no_timer_stopped;
|
||||
}
|
||||
} else
|
||||
priv->tm->enable = 1;
|
||||
#endif
|
||||
|
||||
/* Create and initialize the TX/RX descriptors chains. */
|
||||
@@ -1322,9 +1325,11 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
|
||||
/* Interrupt on completition only for the latest segment */
|
||||
priv->mac_type->ops->close_tx_desc(desc);
|
||||
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
/* Clean IC while using timers */
|
||||
priv->mac_type->ops->clear_tx_ic(desc);
|
||||
/* Clean IC while using timer */
|
||||
if (likely(priv->tm->enable))
|
||||
priv->mac_type->ops->clear_tx_ic(desc);
|
||||
#endif
|
||||
/* To avoid raise condition */
|
||||
priv->mac_type->ops->set_tx_owner(first);
|
||||
@@ -2028,7 +2033,8 @@ static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
priv->tm->timer_stop();
|
||||
dis_ic = 1;
|
||||
if (likely(priv->tm->enable))
|
||||
dis_ic = 1;
|
||||
#endif
|
||||
napi_disable(&priv->napi);
|
||||
|
||||
|
||||
@@ -63,7 +63,7 @@ int stmmac_open_ext_timer(struct net_device *dev, struct stmmac_timer *tm)
|
||||
|
||||
stmmac_rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
|
||||
if (stmmac_rtc == NULL) {
|
||||
pr_error("open rtc device failed\n");
|
||||
pr_err("open rtc device failed\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@@ -71,7 +71,7 @@ int stmmac_open_ext_timer(struct net_device *dev, struct stmmac_timer *tm)
|
||||
|
||||
/* Periodic mode is not supported */
|
||||
if ((rtc_irq_set_freq(stmmac_rtc, &stmmac_task, tm->freq) < 0)) {
|
||||
pr_error("set periodic failed\n");
|
||||
pr_err("set periodic failed\n");
|
||||
rtc_irq_unregister(stmmac_rtc, &stmmac_task);
|
||||
rtc_class_close(stmmac_rtc);
|
||||
return -1;
|
||||
|
||||
@@ -26,6 +26,7 @@ struct stmmac_timer {
|
||||
void (*timer_start) (unsigned int new_freq);
|
||||
void (*timer_stop) (void);
|
||||
unsigned int freq;
|
||||
unsigned int enable;
|
||||
};
|
||||
|
||||
/* Open the HW timer device and return 0 in case of success */
|
||||
|
||||
@@ -378,7 +378,7 @@ static void dbg_dump(int line_count, const char *func_name, unsigned char *buf,
|
||||
}
|
||||
|
||||
#define DUMP(buf_, len_) \
|
||||
dbg_dump(__LINE__, __func__, buf_, len_)
|
||||
dbg_dump(__LINE__, __func__, (unsigned char *)buf_, len_)
|
||||
|
||||
#define DUMP1(buf_, len_) \
|
||||
do { \
|
||||
@@ -1363,7 +1363,7 @@ static void hso_serial_close(struct tty_struct *tty, struct file *filp)
|
||||
/* reset the rts and dtr */
|
||||
/* do the actual close */
|
||||
serial->open_count--;
|
||||
kref_put(&serial->parent->ref, hso_serial_ref_free);
|
||||
|
||||
if (serial->open_count <= 0) {
|
||||
serial->open_count = 0;
|
||||
spin_lock_irq(&serial->serial_lock);
|
||||
@@ -1383,6 +1383,8 @@ static void hso_serial_close(struct tty_struct *tty, struct file *filp)
|
||||
usb_autopm_put_interface(serial->parent->interface);
|
||||
|
||||
mutex_unlock(&serial->parent->mutex);
|
||||
|
||||
kref_put(&serial->parent->ref, hso_serial_ref_free);
|
||||
}
|
||||
|
||||
/* close the requested serial port */
|
||||
@@ -1527,7 +1529,7 @@ static void tiocmget_intr_callback(struct urb *urb)
|
||||
dev_warn(&usb->dev,
|
||||
"hso received invalid serial state notification\n");
|
||||
DUMP(serial_state_notification,
|
||||
sizeof(hso_serial_state_notifation))
|
||||
sizeof(struct hso_serial_state_notification));
|
||||
} else {
|
||||
|
||||
UART_state_bitmap = le16_to_cpu(serial_state_notification->
|
||||
|
||||
+15
-18
@@ -199,32 +199,29 @@ rx_drop:
|
||||
static struct net_device_stats *veth_get_stats(struct net_device *dev)
|
||||
{
|
||||
struct veth_priv *priv;
|
||||
struct net_device_stats *dev_stats;
|
||||
int cpu;
|
||||
struct veth_net_stats *stats;
|
||||
struct veth_net_stats *stats, total = {0};
|
||||
|
||||
priv = netdev_priv(dev);
|
||||
dev_stats = &dev->stats;
|
||||
|
||||
dev_stats->rx_packets = 0;
|
||||
dev_stats->tx_packets = 0;
|
||||
dev_stats->rx_bytes = 0;
|
||||
dev_stats->tx_bytes = 0;
|
||||
dev_stats->tx_dropped = 0;
|
||||
dev_stats->rx_dropped = 0;
|
||||
|
||||
for_each_online_cpu(cpu) {
|
||||
for_each_possible_cpu(cpu) {
|
||||
stats = per_cpu_ptr(priv->stats, cpu);
|
||||
|
||||
dev_stats->rx_packets += stats->rx_packets;
|
||||
dev_stats->tx_packets += stats->tx_packets;
|
||||
dev_stats->rx_bytes += stats->rx_bytes;
|
||||
dev_stats->tx_bytes += stats->tx_bytes;
|
||||
dev_stats->tx_dropped += stats->tx_dropped;
|
||||
dev_stats->rx_dropped += stats->rx_dropped;
|
||||
total.rx_packets += stats->rx_packets;
|
||||
total.tx_packets += stats->tx_packets;
|
||||
total.rx_bytes += stats->rx_bytes;
|
||||
total.tx_bytes += stats->tx_bytes;
|
||||
total.tx_dropped += stats->tx_dropped;
|
||||
total.rx_dropped += stats->rx_dropped;
|
||||
}
|
||||
dev->stats.rx_packets = total.rx_packets;
|
||||
dev->stats.tx_packets = total.tx_packets;
|
||||
dev->stats.rx_bytes = total.rx_bytes;
|
||||
dev->stats.tx_bytes = total.tx_bytes;
|
||||
dev->stats.tx_dropped = total.tx_dropped;
|
||||
dev->stats.rx_dropped = total.rx_dropped;
|
||||
|
||||
return dev_stats;
|
||||
return &dev->stats;
|
||||
}
|
||||
|
||||
static int veth_open(struct net_device *dev)
|
||||
|
||||
@@ -899,7 +899,6 @@ struct sctp_transport {
|
||||
*/
|
||||
/* RTO : The current retransmission timeout value. */
|
||||
unsigned long rto;
|
||||
unsigned long last_rto;
|
||||
|
||||
__u32 rtt; /* This is the most recent RTT. */
|
||||
|
||||
|
||||
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