diff --git a/src/xenia/cpu/backend/a64/a64_seq_vector.cc b/src/xenia/cpu/backend/a64/a64_seq_vector.cc
index d3d1bdbbb..f9a70f1bb 100644
--- a/src/xenia/cpu/backend/a64/a64_seq_vector.cc
+++ b/src/xenia/cpu/backend/a64/a64_seq_vector.cc
@@ -663,7 +663,7 @@ struct VECTOR_SHR_V128
       }
       if (all_same) {
         // Every count is the same, so we can use USHR
-        e.USHR(i.dest.reg().B16(), i.src1.reg().B16(), shamt.u8[0]);
+        e.USHR(i.dest.reg().B16(), i.src1.reg().B16(), shamt.u8[0] & 0x7);
         return;
       }
       e.ADD(e.GetNativeParam(1), SP, e.StashConstantV(1, i.src2.constant()));
@@ -687,7 +687,7 @@ struct VECTOR_SHR_V128
       }
       if (all_same) {
         // Every count is the same, so we can use USHR
-        e.USHR(i.dest.reg().H8(), i.src1.reg().H8(), shamt.u16[0]);
+        e.USHR(i.dest.reg().H8(), i.src1.reg().H8(), shamt.u16[0] & 0xF);
         return;
       }
       e.ADD(e.GetNativeParam(1), SP, e.StashConstantV(1, i.src2.constant()));
@@ -711,7 +711,7 @@ struct VECTOR_SHR_V128
       }
       if (all_same) {
         // Every count is the same, so we can use USHR
-        e.USHR(i.dest.reg().S4(), i.src1.reg().S4(), shamt.u32[0]);
+        e.USHR(i.dest.reg().S4(), i.src1.reg().S4(), shamt.u32[0] & 0x1F);
         return;
       }
       e.ADD(e.GetNativeParam(1), SP, e.StashConstantV(1, i.src2.constant()));