xemu/trace/trace-target_arm.h

/* AUTOGENERATED STUB FOR ANDROID BUILD */
#ifndef TRACE_TRACE_TARGET_ARM_H
#define TRACE_TRACE_TARGET_ARM_H

/* No-op trace events */
#ifndef trace_event_get_state_backends
#define trace_event_get_state_backends(id) (0)
#endif
#ifndef trace_event_get_state
#define trace_event_get_state(id) (0)
#endif
#define TRACE_ARM_CPU_RESET 0
#define TRACE_ARM_CPU_RESET_ENABLED 0
#define TRACE_ARM_CPU_RESET_BACKEND_DSTATE() (0)
static inline void trace_arm_cpu_reset(uint64_t mp_aff) {
    (void)mp_aff;
}
#define TRACE_ARM_EMULATE_FIRMWARE_RESET 0
#define TRACE_ARM_EMULATE_FIRMWARE_RESET_ENABLED 0
#define TRACE_ARM_EMULATE_FIRMWARE_RESET_BACKEND_DSTATE() (0)
static inline void trace_arm_emulate_firmware_reset(uint64_t mp_aff, unsigned target_el) {
    (void)mp_aff;
    (void)target_el;
}
#define TRACE_ARM_GT_CNTPOFF_WRITE 0
#define TRACE_ARM_GT_CNTPOFF_WRITE_ENABLED 0
#define TRACE_ARM_GT_CNTPOFF_WRITE_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_cntpoff_write(uint64_t value) {
    (void)value;
}
#define TRACE_ARM_GT_CNTVOFF_WRITE 0
#define TRACE_ARM_GT_CNTVOFF_WRITE_ENABLED 0
#define TRACE_ARM_GT_CNTVOFF_WRITE_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_cntvoff_write(uint64_t value) {
    (void)value;
}
#define TRACE_ARM_GT_CTL_WRITE 0
#define TRACE_ARM_GT_CTL_WRITE_ENABLED 0
#define TRACE_ARM_GT_CTL_WRITE_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_ctl_write(int timer, uint64_t value) {
    (void)timer;
    (void)value;
}
#define TRACE_ARM_GT_CVAL_WRITE 0
#define TRACE_ARM_GT_CVAL_WRITE_ENABLED 0
#define TRACE_ARM_GT_CVAL_WRITE_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_cval_write(int timer, uint64_t value) {
    (void)timer;
    (void)value;
}
#define TRACE_ARM_GT_IMASK_TOGGLE 0
#define TRACE_ARM_GT_IMASK_TOGGLE_ENABLED 0
#define TRACE_ARM_GT_IMASK_TOGGLE_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_imask_toggle(int timer) {
    (void)timer;
}
#define TRACE_ARM_GT_RECALC 0
#define TRACE_ARM_GT_RECALC_ENABLED 0
#define TRACE_ARM_GT_RECALC_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_recalc(int timer, uint64_t nexttick) {
    (void)timer;
    (void)nexttick;
}
#define TRACE_ARM_GT_RECALC_DISABLED 0
#define TRACE_ARM_GT_RECALC_DISABLED_ENABLED 0
#define TRACE_ARM_GT_RECALC_DISABLED_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_recalc_disabled(int timer) {
    (void)timer;
}
#define TRACE_ARM_GT_TVAL_WRITE 0
#define TRACE_ARM_GT_TVAL_WRITE_ENABLED 0
#define TRACE_ARM_GT_TVAL_WRITE_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_tval_write(int timer, uint64_t value) {
    (void)timer;
    (void)value;
}
#define TRACE_ARM_GT_UPDATE_IRQ 0
#define TRACE_ARM_GT_UPDATE_IRQ_ENABLED 0
#define TRACE_ARM_GT_UPDATE_IRQ_BACKEND_DSTATE() (0)
static inline void trace_arm_gt_update_irq(int timer, int irqstate) {
    (void)timer;
    (void)irqstate;
}
#define TRACE_ARM_POWERCTL_RESET_CPU 0
#define TRACE_ARM_POWERCTL_RESET_CPU_ENABLED 0
#define TRACE_ARM_POWERCTL_RESET_CPU_BACKEND_DSTATE() (0)
static inline void trace_arm_powerctl_reset_cpu(uint64_t mp_aff) {
    (void)mp_aff;
}
#define TRACE_ARM_POWERCTL_SET_CPU_OFF 0
#define TRACE_ARM_POWERCTL_SET_CPU_OFF_ENABLED 0
#define TRACE_ARM_POWERCTL_SET_CPU_OFF_BACKEND_DSTATE() (0)
static inline void trace_arm_powerctl_set_cpu_off(uint64_t mp_aff) {
    (void)mp_aff;
}
#define TRACE_ARM_POWERCTL_SET_CPU_ON 0
#define TRACE_ARM_POWERCTL_SET_CPU_ON_ENABLED 0
#define TRACE_ARM_POWERCTL_SET_CPU_ON_BACKEND_DSTATE() (0)
static inline void trace_arm_powerctl_set_cpu_on(uint64_t mp_aff, unsigned target_el, const char *mode, uint64_t entry, uint64_t context_id) {
    (void)mp_aff;
    (void)target_el;
    (void)mode;
    (void)entry;
    (void)context_id;
}
#define TRACE_ARM_POWERCTL_SET_CPU_ON_AND_RESET 0
#define TRACE_ARM_POWERCTL_SET_CPU_ON_AND_RESET_ENABLED 0
#define TRACE_ARM_POWERCTL_SET_CPU_ON_AND_RESET_BACKEND_DSTATE() (0)
static inline void trace_arm_powerctl_set_cpu_on_and_reset(uint64_t mp_aff) {
    (void)mp_aff;
}
#define TRACE_ARM_PSCI_CALL 0
#define TRACE_ARM_PSCI_CALL_ENABLED 0
#define TRACE_ARM_PSCI_CALL_BACKEND_DSTATE() (0)
static inline void trace_arm_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) {
    (void)x0;
    (void)x1;
    (void)x2;
    (void)x3;
    (void)cpuid;
}
#define TRACE_KVM_ARM_FIXUP_MSI_ROUTE 0
#define TRACE_KVM_ARM_FIXUP_MSI_ROUTE_ENABLED 0
#define TRACE_KVM_ARM_FIXUP_MSI_ROUTE_BACKEND_DSTATE() (0)
static inline void trace_kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) {
    (void)iova;
    (void)gpa;
}

#endif