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With header file include/hw/loongarch/virt.h, hardware device definition order is sorted by its base address. Add remove unused macro VIRT_IOAPIC_REG_BASE and VIRT_MISC_REG_BASE. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
153 lines
4.8 KiB
C
153 lines
4.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Definitions for loongarch board emulation.
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*
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* Copyright (C) 2021 Loongson Technology Corporation Limited
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*/
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#ifndef HW_LOONGARCH_H
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#define HW_LOONGARCH_H
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#include "hw/boards.h"
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#include "qemu/queue.h"
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#include "hw/block/flash.h"
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#include "hw/loongarch/boot.h"
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/* IOCSR region */
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#define VERSION_REG 0x0
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#define FEATURE_REG 0x8
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#define IOCSRF_TEMP 0
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#define IOCSRF_NODECNT 1
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#define IOCSRF_MSI 2
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#define IOCSRF_EXTIOI 3
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#define IOCSRF_CSRIPI 4
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#define IOCSRF_FREQCSR 5
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#define IOCSRF_FREQSCALE 6
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#define IOCSRF_DVFSV1 7
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#define IOCSRF_GMOD 9
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#define IOCSRF_VM 11
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#define IOCSRF_DMSI 15
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#define VENDOR_REG 0x10
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#define CPUNAME_REG 0x20
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#define MISC_FUNC_REG 0x420
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#define IOCSRM_EXTIOI_EN 48
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#define IOCSRM_EXTIOI_INT_ENCODE 49
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#define IOCSRM_DMSI_EN 51
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#define LOONGARCH_MAX_CPUS 256
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/* MMIO memory region */
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#define VIRT_PCH_REG_BASE 0x10000000UL
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#define VIRT_PCH_REG_SIZE 0x400
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#define VIRT_RTC_REG_BASE 0x100d0100UL
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#define VIRT_RTC_LEN 0x100
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#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000UL
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#define VIRT_PLATFORM_BUS_SIZE 0x02000000
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#define VIRT_PCI_IO_BASE 0x18004000UL
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#define VIRT_PCI_IO_OFFSET 0x4000
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#define VIRT_PCI_IO_SIZE 0xC000
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#define VIRT_BIOS_BASE 0x1c000000UL
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#define VIRT_BIOS_SIZE 0x01000000UL
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#define VIRT_FLASH_SECTOR_SIZE (256 * KiB)
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#define VIRT_FLASH0_BASE VIRT_BIOS_BASE
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#define VIRT_FLASH0_SIZE VIRT_BIOS_SIZE
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#define VIRT_FLASH1_BASE 0x1d000000UL
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#define VIRT_FLASH1_SIZE 0x01000000UL
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#define VIRT_FWCFG_BASE 0x1e020000UL
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#define VIRT_UART_BASE 0x1fe001e0UL
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#define VIRT_UART_SIZE 0x100
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#define VIRT_PCI_CFG_BASE 0x20000000UL
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#define VIRT_PCI_CFG_SIZE 0x08000000UL
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#define VIRT_DINTC_BASE 0x2FE00000UL
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#define VIRT_DINTC_SIZE 0x00100000UL
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#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
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#define VIRT_PCH_MSI_SIZE 0x8
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#define VIRT_PCI_MEM_BASE 0x40000000UL
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#define VIRT_PCI_MEM_SIZE 0x40000000UL
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#define VIRT_LOWMEM_BASE 0
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#define VIRT_LOWMEM_SIZE 0x10000000
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#define FDT_BASE 0x100000
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#define VIRT_HIGHMEM_BASE 0x80000000
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#define VIRT_GED_EVT_ADDR 0x100e0000
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#define VIRT_GED_MEM_ADDR QEMU_ALIGN_UP(VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN, 4)
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#define VIRT_GED_REG_ADDR QEMU_ALIGN_UP(VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN, 4)
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#define VIRT_GED_CPUHP_ADDR QEMU_ALIGN_UP(VIRT_GED_REG_ADDR + ACPI_GED_REG_COUNT, 4)
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/*
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* GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
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* 0 - 15 GSI for ISA devices even if there is no ISA devices
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* 16 - 63 GSI for CPU devices such as timers/perf monitor etc
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* 64 - GSI for external devices
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*/
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#define VIRT_PCH_PIC_IRQ_NUM 32
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#define VIRT_GSI_BASE 64
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#define VIRT_DEVICE_IRQS 16
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#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
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#define VIRT_UART_COUNT 4
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#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
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#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
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#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
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#define VIRT_PLATFORM_BUS_NUM_IRQS 2
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#define COMMAND_LINE_SIZE 512
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struct LoongArchVirtMachineState {
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/*< private >*/
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MachineState parent_obj;
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MemoryRegion lowmem;
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MemoryRegion highmem;
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MemoryRegion bios;
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bool bios_loaded;
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/* State for other subsystems/APIs: */
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FWCfgState *fw_cfg;
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Notifier machine_done;
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Notifier powerdown_notifier;
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OnOffAuto acpi;
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OnOffAuto veiointc;
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OnOffAuto dmsi;
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char *oem_id;
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char *oem_table_id;
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DeviceState *acpi_ged;
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int fdt_size;
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DeviceState *platform_bus_dev;
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PCIBus *pci_bus;
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PFlashCFI01 *flash[2];
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MemoryRegion system_iocsr;
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MemoryRegion iocsr_mem;
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AddressSpace as_iocsr;
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struct loongarch_boot_info bootinfo;
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DeviceState *ipi;
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DeviceState *extioi;
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struct memmap_entry *memmap_table;
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unsigned int memmap_entries;
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uint64_t misc_feature;
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uint64_t misc_status;
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DeviceState *dintc;
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};
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#define TYPE_LOONGARCH_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
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OBJECT_DECLARE_SIMPLE_TYPE(LoongArchVirtMachineState, LOONGARCH_VIRT_MACHINE)
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void virt_acpi_setup(LoongArchVirtMachineState *lvms);
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void virt_fdt_setup(LoongArchVirtMachineState *lvms);
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static inline bool virt_has_dmsi(LoongArchVirtMachineState *lvms)
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{
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if (!(lvms->misc_feature & BIT(IOCSRF_DMSI))) {
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return false;
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}
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return true;
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}
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static inline bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms)
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{
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if (lvms->veiointc == ON_OFF_AUTO_OFF) {
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return false;
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}
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return true;
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}
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#endif
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