Richard Henderson and Laurent Vivier
07a6ecf48f
linux-user: Introduce cpu_clone_regs_parent
...
We will need a target-specific hook for adjusting registers
in the parent during clone. Add an empty inline function for
each target, and invoke it from the proper places.
Reviewed-by: Laurent Vivier <laurent@vivier.eu >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com >
Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org >
Signed-off-by: Laurent Vivier <laurent@vivier.eu >
2019-11-06 13:43:25 +01:00
Richard Henderson and Laurent Vivier
608999d17c
linux-user: Rename cpu_clone_regs to cpu_clone_regs_child
...
We will need a target-specific hook for adjusting registers
in the parent during clone. To avoid confusion, rename the
one we have to make it clear it affects the child.
At the same time, pass in the flags from the clone syscall.
We will need them for correct behaviour for Sparc.
Reviewed-by: Laurent Vivier <laurent@vivier.eu >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com >
Message-Id: <20191106113318.10226-10-richard.henderson@linaro.org >
Signed-off-by: Laurent Vivier <laurent@vivier.eu >
2019-11-06 13:42:34 +01:00
Laurent Vivier
9850f9f63a
linux-user: move get_sp_from_cpustate() to target_cpu.h
...
Remove useless includes
Fix HPPA include guard.
Signed-off-by: Laurent Vivier <laurent@vivier.eu >
Acked-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20180529194207.31503-9-laurent@vivier.eu >
2018-06-04 01:30:44 +02:00
Max Filippov
ba7651fba5
target/xtensa: add linux-user support
...
Import list of syscalls from the kernel source. Conditionalize code/data
that is only used with softmmu. Implement exception handlers. Implement
signal hander (only the core registers for now, no coprocessors or TIE).
Cc: Riku Voipio <riku.voipio@iki.fi >
Cc: Laurent Vivier <laurent@vivier.eu >
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com >
2018-03-16 09:40:34 -07:00