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android-sdl2
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32 Commits
Author SHA1 Message Date
Richard HendersonandPeter Maydell 33aefd187e accel/tcg: Add cpu_atomic_*_mmu for 16-byte xchg, fetch_and, fetch_or 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20250815122653.701782-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2025-08-30 16:37:23 +01:00
Philippe Mathieu-Daudé 1861993f1f accel/system: Introduce @x-accel-stats QMP command 
Unstable QMP 'x-accel-stats' dispatches to the
AccelOpsClass::get_stats() and get_vcpu_stats() handlers.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250715140048.84942-4-philmd@linaro.org>
 2025-07-15 19:34:33 +02:00
Philippe Mathieu-Daudé f7a7e7dd21 accel: Extract AccelClass definition to 'accel/accel-ops.h' 
Only accelerator implementations (and the common accelator
code) need to know about AccelClass internals. Move the
definition out but forward declare AccelState and AccelClass.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-39-philmd@linaro.org>
 2025-07-15 19:34:33 +02:00
Philippe Mathieu-Daudé 05927e9dc9 accel: Rename 'system/accel-ops.h' -> 'accel/accel-cpu-ops.h' 
Unfortunately "system/accel-ops.h" handlers are not only
system-specific. For example, the cpu_reset_hold() hook
is part of the vCPU creation, after it is realized.

Mechanical rename to drop 'system' using:

  $ sed -i -e s_system/accel-ops.h_accel/accel-cpu-ops.h_g \
              $(git grep -l system/accel-ops.h)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-38-philmd@linaro.org>
 2025-07-15 19:34:33 +02:00
Richard Henderson 981f2beb16 target: Use cpu_pointer_wrap_uint32 for 32-bit targets 
M68K, MicroBlaze, OpenRISC, RX, TriCore and Xtensa are
all 32-bit targets.  AVR is more complicated, but using
a 32-bit wrap preserves current behaviour.

Cc: Michael Rolnik <mrolnik@gmail.com>
Cc: Laurent Vivier <laurent@vivier.eu>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Tested-by Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (tricore)
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-05-28 08:08:48 +01:00
Richard Henderson a4027ed7d4 target: Use cpu_pointer_wrap_notreached for strict align targets 
Alpha, HPPA, and SH4 always use aligned addresses,
and therefore never produce accesses that cross pages.

Cc: Helge Deller <deller@gmx.de>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-05-28 08:08:47 +01:00
Richard Henderson bdf26b5d16 accel/tcg: Add TCGCPUOps.pointer_wrap 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-05-28 08:08:47 +01:00
Richard Henderson 2c0b261fcd accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-05-05 09:24:10 -07:00
Richard Henderson a21959a8a8 accel/tcg: Move tlb_vaddr_to_host declaration to probe.h 
This is a probing function, not a load/store function.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-05-05 09:24:10 -07:00
Richard Henderson 9b74d403b3 accel/tcg: Move user-only tlb_vaddr_to_host out of line 
At the same time, fix a mis-match between user and system
by using vaddr not abi_ptr for the address parameter.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-05-05 09:24:10 -07:00
Richard Henderson 0baf907b71 accel/tcg: Split out accel/tcg/helper-retaddr.h 
Move set_helper_retaddr and clear_helper_retaddr
to a new header file.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-30 12:45:06 -07:00
Richard Henderson c37f8978d9 accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 
Move the global function name to a hook on TCGCPUOps.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-30 12:45:05 -07:00
Richard Henderson 4759aae432 accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state 
Combine 3 different pointer returns into one structure return.

Include a cflags field in TCGTBCPUState, not filled in by
cpu_get_tb_cpu_state, but used by all callers.  This fills
a hole in the structure and is useful in some subroutines.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-30 12:45:05 -07:00
Richard Henderson a59a876999 accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h 
For some targets, simply remove the local definition.
For other targets, move the inline definition out of line.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-30 12:45:05 -07:00
Richard Henderson 9181ab4528 accel/tcg: Introduce TCGCPUOps.cpu_exec_reset 
Initialize all instances with cpu_reset(), so that there
is no functional change.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-30 12:45:05 -07:00
Philippe Mathieu-DaudéandRichard Henderson fe1a3ace13 accel/tcg: Extract probe API out of 'exec/exec-all.h' 
Declare probe methods in "accel/tcg/probe.h" to emphasize
they are specific to TCG accelerator.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-13-philmd@linaro.org>
 2025-04-30 12:45:05 -07:00
Philippe Mathieu-DaudéandRichard Henderson f12b717717 physmem: Restrict TCG IOTLB code to TCG accel 
Restrict iotlb_to_section(), address_space_translate_for_iotlb()
and memory_region_section_get_iotlb() to TCG. Declare them in
the new "accel/tcg/iommu.h" header. Declare iotlb_to_section()
using the MemoryRegionSection typedef.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-12-philmd@linaro.org>
 2025-04-30 12:45:05 -07:00
Richard Henderson 3ea423c27f accel/tcg: Remove #error for non-tcg in getpc.h 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-30 12:45:05 -07:00
Richard Henderson 77ad412b32 accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc 
Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition,
have each target set the 'precise_smc' field in the TCGCPUOps
structure.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-30 12:45:05 -07:00
Philippe Mathieu-Daudé 44246e7170 accel: Make AccelCPUClass structure target-agnostic 
Move the target-agnostic parts of "accel/accel-cpu-target.h"
to "accel/accel-cpu.h".

Doing so we need to include missing "hw/core/cpu.h" header
in "accel/accel-cpu.h" otherwise we get:

  include/accel/accel-cpu-target.h:39:28: error: unknown type name 'CPUClass'
     39 |     void (*cpu_class_init)(CPUClass *cc);
        |                            ^

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-7-philmd@linaro.org>
 2025-04-25 17:09:58 +02:00
Philippe Mathieu-DaudéandRichard Henderson a3d40b5eff tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field 
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
have each target set the 'mttcg_supported' field in the TCGCPUOps
structure.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250405161320.76854-17-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-23 15:07:32 -07:00
Philippe Mathieu-DaudéandRichard Henderson 04583ce7e0 tcg: Define guest_default_memory_order in TCGCPUOps 
Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-23 15:07:32 -07:00
Philippe Mathieu-DaudéandRichard Henderson 42fa9665e5 exec: Restrict 'cpu_ldst.h' to accel/tcg/ 
Mechanical change using:

  $ sed -i -e 's,exec/cpu_ldst,accel/tcg/cpu-ldst,' \
        $(git grep -l exec/cpu_ldst.h)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-23 15:07:32 -07:00
Philippe Mathieu-DaudéandRichard Henderson 231a1c0ff4 exec: Restrict 'cpu-ldst-common.h' to accel/tcg/ 
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-23 15:07:32 -07:00
Philippe Mathieu-DaudéandRichard Henderson 42fec1bbf5 hw/core/cpu: Remove CPUClass::mmu_index() 
All targets have been converted to TCGCPUOps::mmu_index(),
remove the now unused CPUClass::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-24-philmd@linaro.org>
 2025-04-23 15:04:57 -07:00