Commit Graph
3297 Commits
Author SHA1 Message Date
Cédric Le GoaterandAlex Bennée 704db3e250 aspeed: Deprecate the fby35 machine
There are no functional tests for the 'fby35' machine which makes
harder to determine when something becomes deprecated or unused.

The 'fby35' machine was originally added as an example of a multi-SoC
system, with the expectation the models would evolve over time in an
heterogeneous system. This hasn't happened and no public firmware is
available to boot it. It can be replaced by the 'ast2700fc', another
multi-SoC machine based on the newer AST2700 SoCs which are excepted
to receive better support in the future.

Cc: Peter Delevoryas <peter@pjd.dev>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-ID: <20251126102424.927527-1-clg@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-12-05 15:37:18 +00:00
Richard Henderson de074358e9 Merge tag 'pull-target-arm-20251124' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
 * hw/display/exynos4210_fimd: Account for zero length in fimd_update_memory_section()
 * hw/arm/armv7m: Disable reentrancy guard for v7m_sysreg_ns_ops MRs
 * hw/display/exynos4210_fimd: Remove duplicated definition
 * hw/arm/Kconfig: Exclude imx8mp-evk machine from KVM-only build

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# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
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* tag 'pull-target-arm-20251124' of https://gitlab.com/pm215/qemu:
  hw/display/exynos4210_fimd: Account for zero length in fimd_update_memory_section()
  hw/arm/armv7m: Disable reentrancy guard for v7m_sysreg_ns_ops MRs
  hw/display/exynos4210_fimd: Remove duplicated definition
  hw/arm/Kconfig: Exclude imx8mp-evk machine from KVM-only build

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-24 09:03:12 -08:00
Peter Maydell 4a934d284d hw/arm/armv7m: Disable reentrancy guard for v7m_sysreg_ns_ops MRs
For M-profile cores which support TrustZone, there are some memory
areas which are "NS aliases" -- a Secure access to these addresses
really performs an NS access to a different part of the device.  We
implement these using MemoryRegionOps read and write functions which
pass the access on with adjusted attributes using
memory_region_dispatch_read() and memory_region_dispatch_write().

Since the MR we are dispatching to is owned by the same device that
owns the NS-alias MR (the TYPE_ARMV7M container object), this trips
the reentrancy-guard that is applied by access_with_adjusted_size().

Mark the NS alias MemoryRegions as disable_reentrancy_guard; this is
safe because v7m_sysreg_ns_read() and v7m_sysreg_ns_write() do not
touch any of the device's state.  (Any further reentrancy attempts by
the underlying MR will still be caught.)

Without this fix, an attempt to read from an address like 0xe002e010,
which is a register in the NS systick alias, will fail and provoke

 qemu-system-arm: warning: Blocked re-entrant IO on MemoryRegion: v7m_systick at addr: 0x0

We didn't notice this earlier because almost all code accesses
the registers and systick via the non-alias addresses; the NS
aliases are only need for the rarer case of Secure code that needs
to manage the NS timer or system state on behalf of NS code.

Note that although the v7m_systick_ops read and write functions
also call memory_region_dispatch_{read,write}, this MR does not
need to have the reentrancy-guard disabled because the underlying
MR that it forwards to is owned by a different device (the
TYPE_SYSTICK timer device).

Reported via a stackoverflow question:
https://stackoverflow.com/questions/79808107/what-this-error-is-even-about-qemu-system-arm-warning-blocked-re-entrant-io

Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20251114155304.2662414-1-peter.maydell@linaro.org
2025-11-24 11:00:11 +00:00
Bernhard BeschowandPeter Maydell 697ccce3c5 hw/arm/Kconfig: Exclude imx8mp-evk machine from KVM-only build
Fixes make check failures on an aarch64 host when QEMU is configured
using '--enable-kvm --disable-tcg':
  qemu-system-aarch64: unknown type 'arm-gicv3'

Reported-by: Cornelia Huck <cohuck@redhat.com>
Tested-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20251119203759.5138-1-shentey@gmail.com
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-11-24 10:26:19 +00:00
Jamin LinandCédric Le Goater 510d5c61ad hw/arm/aspeed: Fix missing SPI IRQ connection causing DMA interrupt failure
It did not connect SPI IRQ to the Interrupt Controller, so even the SPI
model raised the IRQ, the interrupt was not received. The CPU therefore
did not trigger an interrupt via the controller, and the firmware never
received the interrupt.

Fixes: 356b230ed1 ("aspeed/soc: Add AST1030 support")
Fixes: f25c0ae107 ("aspeed/soc: Add AST2600 support")
Fixes: 5dd883ab06 ("aspeed/soc: Add AST2700 support")
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251106084925.1253704-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-24 07:52:42 +01:00
Nabih EstefanandCédric Le Goater cacd8fb08d hw/arm/ast27x0: Fix typo in LTPI address
The address for LTPI has one more 0 that it should, bug introduced in
commit 91064bea6b.

Signed-off-by: Nabih Estefan <nabihestefan@google.com>
Fixes: 91064bea6b ("aspeed: ast27x0: Map unimplemented devices in SoC memory")
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104233742.2147367-1-nabihestefan@google.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-24 07:52:42 +01:00
Philippe Mathieu-Daudé f20a824902 hw/arm: Re-enable xenpvh machine in qemu-system-arm/aarch64 binaries
While registering the ARM/Aarch64 machine interfaces
in commit 38c5ab4003 ("hw/arm: Filter machine types
for qemu-system-arm/aarch64 binaries"), we missed the
XenPV machine. Correct that.

Reported-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-Id: <20251117091253.56009-1-philmd@linaro.org>
2025-11-18 19:59:36 +01:00
Richard Henderson ff0601d128 Merge tag 'pull-aspeed-20251104' of https://github.com/legoater/qemu into staging
aspeed queue:

* Move Aspeed machine models in separate source files to ease maintenance

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* tag 'pull-aspeed-20251104' of https://github.com/legoater/qemu: (30 commits)
  hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts()
  hw/arm/aspeed: Split AST2700 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Split AST2600 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Split Catalina machine into a separate source file for maintainability
  hw/arm/aspeed: Split Rainier machine into a separate source file for maintainability
  hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability
  hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup
  hw/arm/aspeed: Split QCOM DC-SCM V1 machine into a separate source file for maintainability
  hw/arm/aspeed: Split QCOM Firework machine into a separate source file for maintainability
  hw/arm/aspeed: Split Fuji machine into a separate source file for maintainability
  hw/arm/aspeed: Split FBY35 BMC machine into a separate source file for maintainability
  hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability
  hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse
  hw/arm/aspeed: Split Palmetto machine into a separate source file for maintainability
  hw/arm/aspeed: Split Supermicro X11 machine into a separate source file for maintainability
  hw/arm/aspeed: Split Quanta-Q71L machine into a separate source file for maintainability
  hw/arm/aspeed: Split AST2500 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Split Supermicro X11SPI machine into a separate file for maintainability
  hw/arm/aspeed: Split Romulus machine into a separate source file for maintainability
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-05 08:54:35 +01:00
Jamin LinandCédric Le Goater 1d2a5f8f5d hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability
This commit moves the Aspeed AST1030 MiniBMC machine
implementation out of aspeed.c into a new standalone file
aspeed_ast10x0_evb.c.

This refactor continues the modularization effort for Aspeed platform
support, placing each board’s logic and initialization sequence in its
own dedicated source file. It improves maintainability, readability, and
makes it easier to extend support for additional AST10x0-based variants.

Key updates include:
- Moved aspeed_minibmc_machine_init() and
  aspeed_minibmc_machine_ast1030_evb_class_init() from aspeed.c to
  aspeed_ast10x0_evb.c.
- Moved ast1030_evb_i2c_init() and associated I2C setup code.
- Removed AST1030 EVB machine type registration from aspeed.c.
- Added aspeed_ast10x0_evb.c to the Meson build system (meson.build).

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-31-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:59 +01:00
Jamin LinandCédric Le Goater fcbcfb5afe hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts()
The helper function connect_serial_hds_to_uarts() has been renamed to
aspeed_connect_serial_hds_to_uarts() and promoted to a public Aspeed
machine API.

Previously, this function was declared static within aspeed.c and only
used internally. Renaming it with the aspeed_ prefix and exporting its
declaration in aspeed.h makes the function accessible to other Aspeed
machine implementations that need to attach host serial devices to SoC
UARTs.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-30-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:59 +01:00
Jamin LinandCédric Le Goater 064f1ce95f hw/arm/aspeed: Split AST2700 EVB machine into a separate source file for maintainability
This commit moves the Aspeed AST2700 EVB machine implementation out of
aspeed.c into a new standalone file aspeed_ast27x0_evb.c.

This refactor continues the ongoing modularization of Aspeed platform
support, organizing each board’s initialization logic into its own
dedicated source file. It improves maintainability, readability, and
makes it easier to extend or update individual platform support without
cluttering aspeed.c.

Key updates include:
- Moved AST2700_EVB_HW_STRAP1 and AST2700_EVB_HW_STRAP2 macro definitions
  into the new aspeed_ast27x0_evb.c file.
- Moved ast2700_evb_i2c_init(), aspeed_machine_ast2700a0_evb_class_init(),
  and aspeed_machine_ast2700a1_evb_class_init() into the new
  aspeed_ast27x0_evb.c file.
- Removed the AST2700 EVB machine type registration from aspeed.c.
- Added aspeed_ast27x0_evb.c to the Meson build system (meson.build).

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-29-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:59 +01:00
Jamin LinandCédric Le Goater b762a67df0 hw/arm/aspeed: Split AST2600 EVB machine into a separate source file for maintainability
This commit moves the Aspeed AST2600 EVB machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_evb.c.

This refactor continues the modularization effort of the Aspeed platform
machine definitions, separating each board’s initialization logic into its
own dedicated source file. It improves code maintainability, readability,
and reduces clutter in aspeed.c, simplifying future platform extensions.

Key updates include:
- Moved AST2600_EVB_HW_STRAP1 and AST2600_EVB_HW_STRAP2 macro definitions
  into the new aspeed_ast2600_evb.c file.
- Moved ast2600_evb_i2c_init() and related device initialization code into
  the new aspeed_ast2600_evb.c file.
- Moved aspeed_machine_ast2600_evb_class_init() and type registration logic
  out of aspeed.c.
- Added aspeed_ast2600_evb.c to the Meson build system (meson.build).
- Cleaned up all AST2600 EVB-specific code and macros from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-28-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:59 +01:00
Jamin LinandCédric Le Goater cd84134258 hw/arm/aspeed: Split Catalina machine into a separate source file for maintainability
This commit moves the Facebook Catalina BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_catalina.c.

This refactor continues the ongoing modularization of Aspeed platform
support, organizing each board’s logic into its own dedicated source file.
It improves maintainability, readability, and simplifies future
development of new BMC platforms without cluttering aspeed.c.

Key updates include:
- Moved CATALINA_BMC_HW_STRAP1 and CATALINA_BMC_HW_STRAP2 macro definitions
  into the new file.
- Moved catalina_bmc_i2c_init() and all Catalina-specific I2C device setup
  into the new aspeed_ast2600_catalina.c file.
- Moved aspeed_machine_catalina_class_init() and type registration logic
  out of aspeed.c.
- Cleaned up all Catalina-specific code and macros from aspeed.c.
- Added aspeed_ast2600_catalina.c to the Meson build system (meson.build).

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-27-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:59 +01:00
Jamin LinandCédric Le Goater e777cbaf0b hw/arm/aspeed: Split Rainier machine into a separate source file for maintainability
This commit moves the IBM Rainier BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_rainier.c.

This refactor continues the modularization effort for Aspeed platform
support, placing each board’s logic and FRUID data in its own dedicated
source file. It improves maintainability, readability, and simplifies
future development for new Aspeed-based systems without cluttering
aspeed.c.

Key updates include:
- Removed RAINIER_BMC_HW_STRAP1 and RAINIER_BMC_HW_STRAP2 macro definitions.
- Moved rainier_bmc_i2c_init() and all related I2C device setup code
  into the new aspeed_ast2600_rainier.c file.
- Moved aspeed_machine_rainier_class_init() and type registration logic
  out of aspeed.c.
- Deleted aspeed_eeprom.h and aspeed_eeprom.c; their FRUID data and
  length definitions are now handled directly in the new Rainier file.
- Added aspeed_ast2600_rainier.c to the Meson build system (meson.build).

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-26-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 20a785d631 hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability
This commit moves the Nvidia GB200NVL BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_gb200nvl.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s initialization logic in its own dedicated source file.
It improves code maintainability, readability, and simplifies adding new
platforms without increasing the complexity of aspeed.c.

Key updates include:
- Moved GB200NVL_BMC_HW_STRAP1 and GB200NVL_BMC_HW_STRAP2 macro definitions into the new file.
- Moved gb200nvl_bmc_i2c_init() and its related FRUID setup into the new file.
- Moved aspeed_machine_gb200nvl_class_init() and type registration logic out of aspeed.c.
- Removed gb200nvl_bmc_fruid[] and its length definition from aspeed_eeprom.c/h.
- Added aspeed_ast2600_gb200nvl.c to the Meson build system (meson.build).
- Cleaned up all GB200NVL-specific code and data from aspeed.c and aspeed_eeprom.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-25-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater fb31e0348b hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup
This commit exposes the function aspeed_machine_ast2600_class_emmc_init() as
a common API so that other AST2600-based machine implementations can reuse it
to enable the "boot-emmc" property.

Previously, this function was defined as a static helper within aspeed.c,
limiting its visibility to that file. By making it global and declaring it in
aspeed.h, other machine definition files (e.g., for specific AST2600 boards)
can now easily call this API to register eMMC boot configuration support.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-24-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 0c1b423ac2 hw/arm/aspeed: Split QCOM DC-SCM V1 machine into a separate source file for maintainability
This commit moves the QCOM DC-SCM V1 BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_qcom-dc-scm-v1.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file. It improves
maintainability, readability, and simplifies future development for new
platforms without cluttering aspeed.c.

Key updates include:
- Moved QCOM_DC_SCM_V1_BMC_HW_STRAP1 and QCOM_DC_SCM_V1_BMC_HW_STRAP2 macro
  into the new file aspeed_ast2600_qcom-dc-scm-v1.c.
- Moved qcom_dc_scm_bmc_i2c_init() and aspeed_machine_qcom_dc_scm_v1_class_init()
  into the new file aspeed_ast2600_qcom-dc-scm-v1.c.
- Moved "qcom-dc-scm-v1-bmc" machine type registration from aspeed.c to the new file.
- Updated hw/arm/meson.build to include aspeed_ast2600_qcom-dc-scm-v1.c.
- Cleaned up all QCOM DC-SCM V1-specific code from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-23-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 98409d8f23 hw/arm/aspeed: Split QCOM Firework machine into a separate source file for maintainability
This commit moves the QCOM Firework BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_qcom-firework.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file. It improves
maintainability, readability, and simplifies future development for new
platforms without cluttering aspeed.c.

Key updates include:
- Removed qcom_dc_scm_firework_i2c_init() and its Firework-specific devices
  from aspeed.c.
- Removed aspeed_machine_qcom_firework_class_init() and its type registration
  ("qcom-firework-bmc") from aspeed_machine_types[].
- Added new source file aspeed_ast2600_qcom-firework.c containing the
  Firework-specific initialization and machine class definition.
- Updated hw/arm/meson.build to include aspeed_ast2600_qcom-firework.c.
- Cleaned up all Firework-specific code from aspeed.c.
- Renamed `QCOM_DC_SCM_V1_BMC_HW_STRAP1` to
  `QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1` to avoid dependency conflicts with
  other QCOM DC-SCM machines.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-22-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 0f9a309b50 hw/arm/aspeed: Split Fuji machine into a separate source file for maintainability
This commit moves the Facebook Fuji BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_fuji.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.

Key updates include:
- Moved FUJI_BMC_HW_STRAP1 and FUJI_BMC_HW_STRAP2 macro definitions into the new file.
- Moved fuji_bmc_i2c_init() and its helper get_pca9548_channels() into the new file.
- Moved aspeed_machine_fuji_class_init() and type registration to aspeed_ast2600_fuji.c.
- Added aspeed_ast2600_fuji.c to the build system (meson.build).
- Cleaned up all Fuji-specific code and macros from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-21-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 21dc5fa31b hw/arm/aspeed: Split FBY35 BMC machine into a separate source file for maintainability
This commit moves the Facebook fby35 BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_fby35.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.

Key updates include:
- Moved fby35_i2c_init() and fby35_reset() to the new file.
- Moved aspeed_machine_fby35_class_init() and machine registration to the new file.
- Removed fby35 FRU data (fby35_nic_fruid, fby35_bb_fruid, fby35_bmc_fruid) and their size definitions from aspeed_eeprom.[ch].
- Added aspeed_ast2600_fby35.c to the build system (meson.build).
- Cleaned up all fby35-specific code and declarations from aspeed.c and aspeed_eeprom.*.
- Introduced FBY35_BMC_RAM_SIZE macro based on FUJI_BMC_RAM_SIZE to remove
  inter-file dependency.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-20-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 2bf16a24d6 hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability
This commit moves the Facebook Bletchley BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_bletchley.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.

Key updates include:
- Moved BLETCHLEY_BMC_HW_STRAP1 and BLETCHLEY_BMC_HW_STRAP2 macro definitions into the new file.
- Moved bletchley_bmc_i2c_init() I²C initialization logic into the new file.
- Moved aspeed_machine_bletchley_class_init() and type registration.
- Added aspeed_ast2600_bletchley.c to the build system (meson.build).
- Removed all Bletchley-specific code and macros from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-19-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater c52f5c1635 hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse
Moving it into aspeed.h allows all Aspeed machine source files
(AST2400, AST2500, AST2600, AST2700, etc.) to reuse the same macro
definition for consistent behavior and maintainability.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-18-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 671c26a7d4 hw/arm/aspeed: Split Palmetto machine into a separate source file for maintainability
This commit moves the OpenPOWER Palmetto BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2400_palmetto.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.

Key updates include:
- Moved PALMETTO_BMC_HW_STRAP1 macro definition from into the new file.
- Moved palmetto_bmc_i2c_init() I²C initialization logic into the new file.
- Moved aspeed_machine_palmetto_class_init() and type registration.
- Added aspeed_ast2400_palmetto.c to the build system (meson.build).
- Removed all Palmetto-specific code and macros from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-17-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater f919ccc7e0 hw/arm/aspeed: Split Supermicro X11 machine into a separate source file for maintainability
This commit moves the Supermicro X11 BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2400_supermicrox11.c and
removes its dependency on the Palmetto platform’s I²C initialization.

This refactor continues the modularization effort for Aspeed platform support,
ensuring that each board’s configuration resides in its own dedicated source file.
By duplicating and renaming the palmetto_bmc_i2c_init() logic into
supermicrox11_bmc_i2c_init(), this change removes unwanted coupling between
the two board definitions.

Key updates include:
- Moved SUPERMICROX11_BMC_HW_STRAP1 macro definition into a new file.
- Moved aspeed_machine_supermicrox11_bmc_class_init() and type registration into a new file.
- Added a dedicated supermicrox11_bmc_i2c_init() function (copied and renamed from Palmetto’s version).
- Added the new file aspeed_ast2400_supermicrox11.c to the build system (meson.build).
- Removed all Supermicro X11–specific code and macros from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-16-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin LinandCédric Le Goater 7f162fe291 hw/arm/aspeed: Split Quanta-Q71L machine into a separate source file for maintainability
This commit moves the Quanta-Q71L BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2400_quanta-q71l.c.

This refactor continues the modularization effort for Aspeed platform
support, placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future
development for new platforms without cluttering aspeed.c

Key updates include:

- Moved QUANTA_Q71L_BMC_HW_STRAP1 macro definition into the new file.
- Moved quanta_q71l_bmc_i2c_init() I²C initialization logic into the new file.
- Moved aspeed_machine_quanta_q71l_class_init() and type registration.
- Added aspeed_ast2400_quanta-q71l.c to the build system (meson.build).
- Removed all Quanta-Q71L–specific code and macros from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-15-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00