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pcie: Support PCIe Gen5/Gen6 link speeds

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This patch extends the PCIe link speed option so that slots can be
configured as supporting 32GT/s (Gen5) or 64GT/s (Gen5) speeds.
This is as simple as setting the appropriate bit in LnkCap2 and
the appropriate value in LnkCap and LnkCtl2.

Signed-off-by: Lukas Stockner <lstockner@genesiscloud.com>
Message-Id: <20240215012326.3272366-1-lstockner@genesiscloud.com>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Lukas Stockner
2024-03-12 17:56:55 -04:00
committed by Michael S. Tsirkin
parent 52767e1063
commit c08da86dc4
4 changed files with 29 additions and 3 deletions
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qapi/common.json
+5 -1
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@@ -107,10 +107,14 @@
#
# @16: 16.0GT/s
#
# @32: 32.0GT/s
#
# @64: 64.0GT/s
#
# Since: 4.0
##
{ 'enum': 'PCIELinkSpeed',
'data': [ '2_5', '5', '8', '16' ] }
'data': [ '2_5', '5', '8', '16', '32', '64' ] }
##
# @PCIELinkWidth: