diff --git a/.gitignore b/.gitignore
index e1927ae154..3f681d60cc 100644
--- a/.gitignore
+++ b/.gitignore
@@ -26,3 +26,15 @@ build.log
/macos-libs/
/macos-pkgs/
/xemu.iconset/
+
+# Common local junk
+.DS_Store
+Thumbs.db
+Desktop.ini
+/.idea/
+
+# Local logs and crash dumps
+*.log
+logcat_*.txt
+hs_err_pid*.log
+replay_pid*.log
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index b2f9dc6c6a..2a38acfd57 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -247,3 +247,9 @@ static void tcg_accel_ops_register_types(void)
type_register_static(&tcg_accel_ops_type);
}
type_init(tcg_accel_ops_register_types);
+
+#ifdef __ANDROID__
+void xemu_android_force_tcg_accel_ops_link(void)
+{
+}
+#endif
diff --git a/android/app/build.gradle.kts b/android/app/build.gradle.kts
index 35a7ed272f..8fe859f0db 100644
--- a/android/app/build.gradle.kts
+++ b/android/app/build.gradle.kts
@@ -39,6 +39,11 @@ android {
externalNativeBuild {
cmake {
+ arguments += listOf(
+ "-DXEMU_ANDROID_BUILD_ID=3",
+ "-DCMAKE_C_FLAGS_DEBUG=-g0",
+ "-DCMAKE_CXX_FLAGS_DEBUG=-g0"
+ )
cppFlags += listOf("-std=c++17", "-fexceptions", "-frtti")
}
}
@@ -56,6 +61,11 @@ android {
}
buildTypes {
+ debug {
+ ndk {
+ debugSymbolLevel = "NONE"
+ }
+ }
release {
isMinifyEnabled = false
proguardFiles(
diff --git a/android/app/src/main/AndroidManifest.xml b/android/app/src/main/AndroidManifest.xml
index 425c82ab55..671c7a91f5 100644
--- a/android/app/src/main/AndroidManifest.xml
+++ b/android/app/src/main/AndroidManifest.xml
@@ -7,7 +7,7 @@
android:theme="@style/Theme.Xemu">
@@ -15,6 +15,15 @@
+
+
+
:CONFIG_VULKAN>
+ $<$:VK_NO_PROTOTYPES>
+ $<$:VMA_STATIC_VULKAN_FUNCTIONS=0>
+ $<$:VMA_DYNAMIC_VULKAN_FUNCTIONS=0>
+ CONFIG_ATOMIC64
+ COMPILING_PER_TARGET
+ CONFIG_TARGET=\"config-target.h\"
+ QEMU_VERSION=\"${QEMU_VERSION_STR}\"
+ QEMU_VERSION_MAJOR=${QEMU_VERSION_MAJOR}
+ QEMU_VERSION_MINOR=${QEMU_VERSION_MINOR}
+ QEMU_VERSION_MICRO=${QEMU_VERSION_MICRO}
+ CONFIG_TLS_PRIORITY=\"NORMAL\"
+)
+
+target_compile_options(xemu_core PRIVATE -g0
+ $<$,$,$>:-UNDEBUG>
+)
+
+target_include_directories(xemu_core PRIVATE
+ "${REPO_ROOT}"
+ "${REPO_ROOT}/include"
+ "${REPO_ROOT}/ui"
+ "${REPO_ROOT}/ui/thirdparty/stb_image"
+ "${REPO_ROOT}/linux-headers"
+ "${REPO_ROOT}/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen"
+ "${REPO_ROOT}/target/i386"
+ "${REPO_ROOT}/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen"
+ "${REPO_ROOT}/tcg/aarch64"
+ "${REPO_ROOT}/host/include/aarch64"
+ "${CMAKE_CURRENT_LIST_DIR}"
+ "${CMAKE_BINARY_DIR}"
+ "${QAPI_GEN_DIR}"
+ "${GLIB_INSTALL_DIR}/include/glib-2.0"
+ "${GLIB_INSTALL_DIR}/lib/glib-2.0/include"
+ "${tomlplusplus_SOURCE_DIR}/include"
+ $<$:${glslang_SOURCE_DIR}>
+ $<$:${spirv_reflect_SOURCE_DIR}>
+ $<$:${vma_SOURCE_DIR}/include>
+ $<$:${volk_SOURCE_DIR}>
+)
+
+add_dependencies(xemu_core glib_ep)
+
+if(TARGET SDL2::SDL2)
+ target_link_libraries(xemu_core PRIVATE SDL2::SDL2)
+endif()
+
+add_library(glib-2.0 STATIC IMPORTED)
+set_target_properties(glib-2.0 PROPERTIES
+ IMPORTED_LOCATION "${GLIB_INSTALL_DIR}/lib/libglib-2.0.a"
+)
+
+add_library(gobject-2.0 STATIC IMPORTED)
+set_target_properties(gobject-2.0 PROPERTIES
+ IMPORTED_LOCATION "${GLIB_INSTALL_DIR}/lib/libgobject-2.0.a"
+)
+
+add_library(gio-2.0 STATIC IMPORTED)
+set_target_properties(gio-2.0 PROPERTIES
+ IMPORTED_LOCATION "${GLIB_INSTALL_DIR}/lib/libgio-2.0.a"
+)
+
+add_library(gmodule-2.0 STATIC IMPORTED)
+set_target_properties(gmodule-2.0 PROPERTIES
+ IMPORTED_LOCATION "${GLIB_INSTALL_DIR}/lib/libgmodule-2.0.a"
+)
+
+add_library(gthread-2.0 STATIC IMPORTED)
+set_target_properties(gthread-2.0 PROPERTIES
+ IMPORTED_LOCATION "${GLIB_INSTALL_DIR}/lib/libgthread-2.0.a"
+)
+
+add_library(xemu SHARED
+ xemu_android.cpp
+ android_crash_handler.cpp
+ vmstate_if_android.c
+)
+
+target_compile_definitions(xemu PRIVATE ANDROID __ANDROID__ XBOX CONFIG_SDL CONFIG_OPENGL)
+if(XEMU_ENABLE_VULKAN)
+ target_compile_definitions(xemu PRIVATE CONFIG_VULKAN VK_NO_PROTOTYPES)
+endif()
+
+target_compile_options(xemu PRIVATE -fexceptions -frtti -g0
+ $<$,$,$>:-UNDEBUG>
+)
+
+target_include_directories(xemu PRIVATE
+ "${REPO_ROOT}"
+ "${REPO_ROOT}/include"
+ "${REPO_ROOT}/ui"
+ "${REPO_ROOT}/ui/thirdparty/stb_image"
+ "${REPO_ROOT}/target/i386"
+ "${CMAKE_CURRENT_LIST_DIR}"
+ "${CMAKE_BINARY_DIR}"
+ "${QAPI_GEN_DIR}"
+ "${GLIB_INSTALL_DIR}/include/glib-2.0"
+ "${GLIB_INSTALL_DIR}/lib/glib-2.0/include"
+ "${tomlplusplus_SOURCE_DIR}/include"
+)
find_library(log-lib log)
find_library(android-lib android)
find_library(egl-lib EGL)
find_library(glesv3-lib GLESv3)
+find_library(vulkan-lib vulkan)
+find_library(zlib-lib z)
if(TARGET SDL2::SDL2)
target_link_libraries(xemu PRIVATE SDL2::SDL2)
endif()
target_link_libraries(xemu PRIVATE
+ xemu_core
+ iconv_stub
+ glib-2.0
+ gobject-2.0
+ gio-2.0
+ gmodule-2.0
+ gthread-2.0
${log-lib}
${android-lib}
${egl-lib}
${glesv3-lib}
+ $<$:${vulkan-lib}>
+ $<$:volk_static>
+ $<$:spirv_reflect_static>
+ $<$:glslang>
+ $<$:MachineIndependent>
+ $<$:GenericCodeGen>
+ $<$:SPIRV>
+ ${zlib-lib}
)
diff --git a/android/app/src/main/cpp/android_crash_handler.cpp b/android/app/src/main/cpp/android_crash_handler.cpp
new file mode 100644
index 0000000000..32c6e9d463
--- /dev/null
+++ b/android/app/src/main/cpp/android_crash_handler.cpp
@@ -0,0 +1,78 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+namespace {
+constexpr const char* kCrashTag = "xemu-android";
+
+static int GetTid() {
+ return static_cast(syscall(SYS_gettid));
+}
+
+struct BacktraceState {
+ void** addrs;
+ int count;
+ int max;
+};
+
+static _Unwind_Reason_Code UnwindCallback(struct _Unwind_Context* ctx, void* arg) {
+ BacktraceState* state = static_cast(arg);
+ if (state->count >= state->max) {
+ return _URC_END_OF_STACK;
+ }
+ uintptr_t pc = _Unwind_GetIP(ctx);
+ if (pc != 0) {
+ state->addrs[state->count++] = reinterpret_cast(pc);
+ }
+ return _URC_NO_REASON;
+}
+
+static void LogBacktrace() {
+ void* addrs[64];
+ BacktraceState state{addrs, 0, static_cast(sizeof(addrs) / sizeof(addrs[0]))};
+ _Unwind_Backtrace(UnwindCallback, &state);
+ for (int i = 0; i < state.count; ++i) {
+ Dl_info info;
+ if (dladdr(addrs[i], &info) && info.dli_fname) {
+ uintptr_t base = reinterpret_cast(info.dli_fbase);
+ uintptr_t pc = reinterpret_cast(addrs[i]);
+ uintptr_t rel = (base != 0 && pc >= base) ? (pc - base) : 0;
+ const char* sym = info.dli_sname ? info.dli_sname : "?";
+ __android_log_print(ANDROID_LOG_ERROR, kCrashTag,
+ " #%02d pc %p %s (%s+0x%zx)",
+ i, addrs[i], info.dli_fname, sym,
+ static_cast(rel));
+ } else {
+ __android_log_print(ANDROID_LOG_ERROR, kCrashTag, " #%02d pc %p", i, addrs[i]);
+ }
+ }
+}
+
+static void CrashHandler(int sig, siginfo_t* info, void* ucontext) {
+ (void)info;
+ (void)ucontext;
+ __android_log_print(ANDROID_LOG_ERROR, kCrashTag,
+ "Caught signal %d in tid %d", sig, GetTid());
+ LogBacktrace();
+ signal(sig, SIG_DFL);
+ raise(sig);
+}
+
+static void InstallCrashHandlers() {
+ struct sigaction sa;
+ memset(&sa, 0, sizeof(sa));
+ sa.sa_sigaction = CrashHandler;
+ sa.sa_flags = SA_SIGINFO | SA_RESETHAND;
+ sigaction(SIGABRT, &sa, nullptr);
+ sigaction(SIGSEGV, &sa, nullptr);
+}
+} // namespace
+
+__attribute__((constructor)) static void InstallCrashHandlersOnLoad() {
+ InstallCrashHandlers();
+}
diff --git a/android/app/src/main/cpp/async_teardown_stub.c b/android/app/src/main/cpp/async_teardown_stub.c
new file mode 100644
index 0000000000..7438bee870
--- /dev/null
+++ b/android/app/src/main/cpp/async_teardown_stub.c
@@ -0,0 +1,5 @@
+#include "qemu/osdep.h"
+
+void init_async_teardown(void)
+{
+}
diff --git a/android/app/src/main/cpp/block_export_stub.c b/android/app/src/main/cpp/block_export_stub.c
new file mode 100644
index 0000000000..110d81556f
--- /dev/null
+++ b/android/app/src/main/cpp/block_export_stub.c
@@ -0,0 +1,18 @@
+#include "qemu/osdep.h"
+#include "block/export.h"
+#include "qapi/error.h"
+
+static int blk_exp_nbd_create(BlockExport *exp, BlockExportOptions *opts,
+ Error **errp)
+{
+ (void)exp;
+ (void)opts;
+ error_setg(errp, "NBD export not supported on Android");
+ return -ENOTSUP;
+}
+
+const BlockExportDriver blk_exp_nbd = {
+ .type = BLOCK_EXPORT_TYPE_NBD,
+ .instance_size = sizeof(BlockExport),
+ .create = blk_exp_nbd_create,
+};
diff --git a/android/app/src/main/cpp/config-devices.h b/android/app/src/main/cpp/config-devices.h
new file mode 100644
index 0000000000..3b7a4fa2c3
--- /dev/null
+++ b/android/app/src/main/cpp/config-devices.h
@@ -0,0 +1,9 @@
+#ifndef XEMU_ANDROID_CONFIG_DEVICES_H
+#define XEMU_ANDROID_CONFIG_DEVICES_H
+
+/*
+ * Minimal device configuration for the Android port.
+ * Keep this lean and add specific device toggles as needed.
+ */
+
+#endif // XEMU_ANDROID_CONFIG_DEVICES_H
diff --git a/android/app/src/main/cpp/config-host.h b/android/app/src/main/cpp/config-host.h
new file mode 100644
index 0000000000..4906602811
--- /dev/null
+++ b/android/app/src/main/cpp/config-host.h
@@ -0,0 +1,45 @@
+#ifndef XEMU_ANDROID_CONFIG_HOST_H
+#define XEMU_ANDROID_CONFIG_HOST_H
+
+#define CONFIG_ANDROID 1
+#define CONFIG_POSIX 1
+#define CONFIG_LINUX 1
+
+#define CONFIG_SDL 1
+#define CONFIG_SDL2 1
+#define CONFIG_AUDIO_SDL 1
+#define CONFIG_AUDIO_DRIVERS "sdl",
+#define CONFIG_DEVICES "config-devices.h"
+
+#define CONFIG_QEMU_DATADIR "/sdcard/Android/data/com.izzy2lost.x1box/files"
+#define CONFIG_QEMU_FIRMWAREPATH "/sdcard/Android/data/com.izzy2lost.x1box/files/firmware",
+#define CONFIG_SYSCONFDIR "/sdcard/Android/data/com.izzy2lost.x1box/files/etc"
+#define CONFIG_QEMU_CONFDIR "/sdcard/Android/data/com.izzy2lost.x1box/files/etc/xemu"
+#define CONFIG_QEMU_HELPERDIR "/sdcard/Android/data/com.izzy2lost.x1box/files/bin"
+#define CONFIG_PREFIX "/sdcard/Android/data/com.izzy2lost.x1box/files"
+#define CONFIG_BINDIR "/sdcard/Android/data/com.izzy2lost.x1box/files/bin"
+#define CONFIG_QEMU_LOCALSTATEDIR "/sdcard/Android/data/com.izzy2lost.x1box/files/state"
+
+#define CONFIG_BDRV_RW_WHITELIST
+#define CONFIG_BDRV_RO_WHITELIST
+
+#define CONFIG_TCG 1
+#define CONFIG_SOFTMMU 1
+
+#define CONFIG_IOVEC 1
+
+#define CONFIG_FDATASYNC 1
+#define CONFIG_CLOCK_GETTIME 1
+#define CONFIG_GETTIMEOFDAY 1
+#define CONFIG_POSIX_MEMALIGN 1
+#define CONFIG_EVENTFD 1
+#define CONFIG_PIPE2 1
+#define CONFIG_DUP3 1
+#define CONFIG_FALLOCATE 1
+#define CONFIG_SYNC_FILE_RANGE 1
+
+#define CONFIG_GCOV 0
+
+#define HAVE_GLIB_WITH_SLICE_ALLOCATOR 1
+
+#endif // XEMU_ANDROID_CONFIG_HOST_H
diff --git a/android/app/src/main/cpp/config-poison.h b/android/app/src/main/cpp/config-poison.h
new file mode 100644
index 0000000000..47c18d93f6
--- /dev/null
+++ b/android/app/src/main/cpp/config-poison.h
@@ -0,0 +1,6 @@
+#ifndef CONFIG_POISON_H
+#define CONFIG_POISON_H
+
+/* Android build: no generated poison defines. */
+
+#endif
diff --git a/android/app/src/main/cpp/config-target.h b/android/app/src/main/cpp/config-target.h
new file mode 100644
index 0000000000..55f8a9e575
--- /dev/null
+++ b/android/app/src/main/cpp/config-target.h
@@ -0,0 +1,18 @@
+#ifndef XEMU_ANDROID_CONFIG_TARGET_H
+#define XEMU_ANDROID_CONFIG_TARGET_H
+
+#define CONFIG_SOFTMMU 1
+
+#define TARGET_I386 1
+#define TARGET_ABI_BITS 32
+#define TARGET_LONG_BITS 32
+#define TARGET_PAGE_BITS 12
+#define TARGET_PHYS_ADDR_BITS 36
+#define TARGET_VIRT_ADDR_BITS 32
+#define TARGET_BIG_ENDIAN 0
+
+#define TARGET_NAME "i386"
+#define CONFIG_TARGET_I386 1
+#define QEMU_ARCH QEMU_ARCH_I386
+
+#endif // XEMU_ANDROID_CONFIG_TARGET_H
diff --git a/android/app/src/main/cpp/data/xemu_64x64.png.h b/android/app/src/main/cpp/data/xemu_64x64.png.h
new file mode 100644
index 0000000000..776fd4f405
--- /dev/null
+++ b/android/app/src/main/cpp/data/xemu_64x64.png.h
@@ -0,0 +1,278 @@
+#pragma once
+
+static const unsigned char xemu_64x64_data[] = {
+ 0x89, 0x50, 0x4e, 0x47, 0x0d, 0x0a, 0x1a, 0x0a, 0x00, 0x00, 0x00, 0x0d, 0x49, 0x48, 0x44, 0x52, 0x00,
+ 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x40, 0x08, 0x06, 0x00, 0x00, 0x00, 0xaa, 0x69, 0x71, 0xde, 0x00,
+ 0x00, 0x00, 0x04, 0x73, 0x42, 0x49, 0x54, 0x08, 0x08, 0x08, 0x08, 0x7c, 0x08, 0x64, 0x88, 0x00, 0x00,
+ 0x00, 0x09, 0x70, 0x48, 0x59, 0x73, 0x00, 0x00, 0x01, 0xd8, 0x00, 0x00, 0x01, 0xd8, 0x01, 0xfa, 0x5c,
+ 0xa6, 0x72, 0x00, 0x00, 0x00, 0x19, 0x74, 0x45, 0x58, 0x74, 0x53, 0x6f, 0x66, 0x74, 0x77, 0x61, 0x72,
+ 0x65, 0x00, 0x77, 0x77, 0x77, 0x2e, 0x69, 0x6e, 0x6b, 0x73, 0x63, 0x61, 0x70, 0x65, 0x2e, 0x6f, 0x72,
+ 0x67, 0x9b, 0xee, 0x3c, 0x1a, 0x00, 0x00, 0x11, 0x84, 0x49, 0x44, 0x41, 0x54, 0x78, 0x9c, 0xed, 0x9b,
+ 0x77, 0x74, 0x94, 0xd7, 0x99, 0x87, 0x9f, 0x6f, 0xfa, 0xa8, 0x8e, 0x46, 0xbd, 0x4b, 0xa8, 0xa1, 0x4a,
+ 0x91, 0x44, 0x11, 0x25, 0x18, 0x4c, 0x91, 0x01, 0x03, 0x76, 0x20, 0x76, 0xec, 0x64, 0x09, 0x4e, 0x6c,
+ 0x87, 0x75, 0x0e, 0xa9, 0x8e, 0x93, 0x2d, 0x1e, 0x6f, 0xce, 0xda, 0x39, 0xd9, 0xd8, 0x27, 0x38, 0x8e,
+ 0x0b, 0x3e, 0xb1, 0x4d, 0xec, 0x0d, 0x8e, 0x8d, 0xc1, 0x36, 0x60, 0x4c, 0x17, 0xc5, 0x12, 0x45, 0x80,
+ 0x0a, 0xaa, 0xa8, 0x4f, 0x11, 0x2a, 0xa3, 0x91, 0x46, 0xa3, 0x19, 0xcd, 0x8c, 0x34, 0xb3, 0x7f, 0x48,
+ 0xcc, 0x41, 0x42, 0x80, 0x00, 0x89, 0x38, 0x67, 0xf3, 0xfc, 0x25, 0x7d, 0xf7, 0xde, 0xf7, 0x7b, 0xef,
+ 0x6f, 0x6e, 0x7d, 0xef, 0xfd, 0xe0, 0x9f, 0xfc, 0xff, 0x46, 0x98, 0xec, 0x17, 0xfc, 0xaa, 0xea, 0xc5,
+ 0x40, 0x6d, 0x69, 0xfd, 0xba, 0x6e, 0x43, 0x57, 0xb2, 0xd5, 0x6c, 0x8d, 0xb2, 0x59, 0xfa, 0x23, 0x07,
+ 0x07, 0x06, 0xfc, 0x06, 0x1d, 0x83, 0xde, 0x82, 0x48, 0x50, 0x82, 0x30, 0x28, 0x12, 0x0b, 0xfd, 0x6e,
+ 0x5c, 0x7d, 0x32, 0x85, 0xd2, 0x28, 0xf7, 0x96, 0xe9, 0xbd, 0xfd, 0xbd, 0xf5, 0x11, 0x09, 0x11, 0x17,
+ 0xc2, 0xd3, 0x03, 0xbf, 0xd0, 0xc4, 0x6b, 0xfa, 0x27, 0xd3, 0xbf, 0x49, 0x11, 0xe0, 0x99, 0x43, 0x3f,
+ 0xc9, 0x6c, 0xba, 0xd4, 0xb2, 0xd1, 0xd4, 0x6a, 0xcc, 0x35, 0x19, 0x8c, 0x19, 0xad, 0x75, 0xad, 0x01,
+ 0x2e, 0x97, 0xeb, 0xb6, 0x6c, 0xc8, 0x14, 0x32, 0x22, 0xa7, 0x46, 0xeb, 0xfd, 0x82, 0x55, 0x65, 0x21,
+ 0xf1, 0x61, 0x85, 0xb1, 0xd3, 0x13, 0xde, 0x7c, 0x39, 0x47, 0xd3, 0x39, 0xd1, 0xbe, 0x4e, 0x98, 0x00,
+ 0x1a, 0xb7, 0x46, 0x54, 0xfb, 0xd7, 0x96, 0xef, 0x69, 0x2f, 0xb5, 0x3c, 0xa2, 0xaf, 0x69, 0x99, 0x6b,
+ 0xd4, 0x75, 0x7a, 0x8f, 0xce, 0xe3, 0xad, 0xf2, 0x41, 0x1d, 0xa1, 0xc6, 0x57, 0xed, 0x87, 0x44, 0x2e,
+ 0x45, 0xee, 0x2d, 0xc7, 0x3d, 0xe8, 0xc6, 0x61, 0xb3, 0x63, 0xb7, 0xd9, 0x31, 0xb7, 0xf7, 0x60, 0xba,
+ 0xd2, 0x45, 0x7f, 0xdf, 0xc8, 0x1f, 0x5d, 0x10, 0x09, 0x44, 0x26, 0x47, 0xb5, 0x87, 0x27, 0x84, 0x1f,
+ 0x8f, 0xc9, 0x48, 0xda, 0xf6, 0xce, 0xc3, 0x7f, 0x3c, 0x3c, 0x51, 0x7e, 0xdf, 0xb5, 0x00, 0x6e, 0xb7,
+ 0x5b, 0x78, 0xe4, 0x83, 0x4d, 0x4f, 0x6b, 0xcb, 0x1a, 0x36, 0x5e, 0x3e, 0x53, 0x93, 0xeb, 0xe8, 0x77,
+ 0x78, 0x6c, 0x06, 0xc5, 0x84, 0x10, 0x97, 0x15, 0x4f, 0x74, 0x5a, 0x0c, 0x91, 0x29, 0x51, 0x48, 0xe4,
+ 0x52, 0xcc, 0x1d, 0x3d, 0xf4, 0x76, 0x9a, 0x71, 0xda, 0x9d, 0x38, 0xec, 0x0e, 0x44, 0x22, 0x11, 0x52,
+ 0xb9, 0x14, 0x99, 0x42, 0x86, 0x7f, 0x68, 0x00, 0x3e, 0x01, 0x3e, 0xf4, 0x75, 0x5b, 0xd0, 0x56, 0xb6,
+ 0xa0, 0xad, 0x6c, 0xa1, 0xf1, 0x62, 0x3d, 0x16, 0x53, 0xaf, 0xe7, 0x7d, 0x7e, 0xc1, 0xfe, 0xfd, 0x89,
+ 0xb9, 0xc9, 0x47, 0xe2, 0xd3, 0x13, 0x5e, 0x7d, 0x67, 0xfd, 0xeb, 0x07, 0xef, 0xd6, 0xff, 0xbb, 0x12,
+ 0xe0, 0xfb, 0xbb, 0x7f, 0x98, 0xdd, 0x5c, 0xd1, 0xfc, 0x9b, 0xd2, 0xc3, 0x17, 0x97, 0xd9, 0xad, 0x76,
+ 0x31, 0x80, 0xc2, 0x5b, 0x41, 0xfa, 0xa2, 0x2c, 0xd2, 0x17, 0x66, 0xe2, 0x1f, 0xa2, 0xa2, 0xa5, 0xbc,
+ 0x09, 0x6d, 0x65, 0x33, 0x2d, 0x95, 0x2d, 0x74, 0xb7, 0x76, 0x31, 0xe0, 0x1c, 0xb8, 0xa9, 0x4d, 0x99,
+ 0x52, 0x4e, 0x50, 0x4c, 0x30, 0xb1, 0xe9, 0xb1, 0x44, 0xa7, 0xc7, 0x12, 0x9e, 0x1c, 0x89, 0xae, 0x52,
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+ 0xe3, 0x5e, 0xdc, 0xf1, 0xc4, 0xf6, 0x8f, 0xee, 0xb4, 0x1e, 0x77, 0x7d, 0xee, 0xf4, 0xf4, 0x91, 0x9f,
+ 0x44, 0xb6, 0x5c, 0x68, 0x78, 0xb1, 0xae, 0xb8, 0x76, 0x55, 0x5b, 0x63, 0x9b, 0xe7, 0x94, 0xc3, 0x5b,
+ 0xe5, 0xc3, 0xd4, 0xbc, 0x34, 0xe2, 0xa6, 0xc5, 0x13, 0x99, 0x1c, 0x8d, 0xc3, 0xee, 0xc0, 0xa8, 0xeb,
+ 0xc4, 0xd4, 0x6a, 0xc4, 0xdc, 0xd1, 0x83, 0xc3, 0xe6, 0x18, 0xfe, 0x68, 0x4a, 0x8c, 0x54, 0x21, 0xf5,
+ 0x1c, 0xb7, 0xab, 0xc3, 0x03, 0x51, 0x47, 0x05, 0x32, 0xe0, 0x18, 0x40, 0x5b, 0xd9, 0x4c, 0xe3, 0x85,
+ 0xfa, 0xa1, 0xcb, 0x4e, 0xc3, 0xc7, 0x6d, 0x82, 0x48, 0x20, 0x6e, 0x5a, 0x42, 0xe3, 0x94, 0x99, 0x89,
+ 0x3b, 0xb2, 0xe6, 0x27, 0xbf, 0xa0, 0x49, 0xd7, 0x8c, 0xff, 0x1c, 0x6f, 0x0c, 0x26, 0xec, 0xb3, 0xb9,
+ 0xcd, 0x87, 0x7e, 0x9c, 0xda, 0x54, 0xd2, 0xf4, 0x33, 0x6d, 0x55, 0xcb, 0x4a, 0x6d, 0x65, 0x73, 0x98,
+ 0xfb, 0x9a, 0xe3, 0x35, 0xb1, 0x44, 0x4c, 0x70, 0x5c, 0x08, 0xea, 0x88, 0x40, 0xd4, 0x11, 0x41, 0xf8,
+ 0x04, 0xf8, 0x20, 0x53, 0xc8, 0x3c, 0x47, 0xe2, 0xfd, 0xd6, 0x7e, 0x1c, 0x36, 0x07, 0xe6, 0x8e, 0x6e,
+ 0xba, 0x0c, 0x5d, 0x18, 0xf5, 0x9d, 0x74, 0xe9, 0x8d, 0x23, 0xa2, 0xd2, 0x12, 0xb9, 0x84, 0x29, 0xd3,
+ 0x13, 0x6b, 0x22, 0x53, 0x63, 0x76, 0xc5, 0xa5, 0x4e, 0xfd, 0xdd, 0x1f, 0xee, 0xd3, 0xdc, 0xfa, 0x08,
+ 0x7b, 0x1c, 0x4c, 0xf8, 0x87, 0x93, 0x3f, 0x29, 0xd4, 0xa8, 0x0d, 0x35, 0x4d, 0x4f, 0x1a, 0x6a, 0x75,
+ 0x4b, 0x8c, 0xba, 0xf6, 0x9c, 0xd6, 0xcb, 0x06, 0xd5, 0x9d, 0xde, 0x32, 0x95, 0xca, 0xa5, 0x44, 0xa7,
+ 0xc5, 0xe8, 0xd5, 0xe1, 0x81, 0x45, 0xa1, 0x69, 0xd1, 0xfb, 0x92, 0xd3, 0x23, 0xff, 0x7a, 0xb7, 0xbf,
+ 0xf8, 0x68, 0x26, 0xf5, 0xd3, 0x59, 0x4d, 0xb1, 0x26, 0xa8, 0xae, 0x56, 0xfb, 0x70, 0x7b, 0x53, 0xfb,
+ 0x8c, 0xbe, 0x9e, 0xbe, 0x29, 0x03, 0x36, 0x7b, 0x74, 0x8f, 0xb1, 0x27, 0xc2, 0xda, 0x63, 0xf5, 0xb3,
+ 0x5b, 0xed, 0x38, 0x6d, 0x0e, 0x04, 0xb1, 0x30, 0xd4, 0x1a, 0x94, 0x72, 0xfc, 0x83, 0xfd, 0x3b, 0x14,
+ 0x7e, 0x4a, 0x83, 0x4c, 0xa1, 0xd0, 0xf9, 0x05, 0xfa, 0xd5, 0x44, 0x24, 0x45, 0x15, 0xa5, 0x65, 0xc7,
+ 0xef, 0xfb, 0x69, 0xf4, 0x4f, 0x6f, 0x7e, 0xf2, 0x71, 0x17, 0x4c, 0xfa, 0xb7, 0xc3, 0xa3, 0xd1, 0x68,
+ 0x5f, 0x51, 0xdb, 0x4d, 0xfd, 0x21, 0x3d, 0x86, 0xce, 0x70, 0xbb, 0xd3, 0x16, 0x2e, 0x15, 0xc9, 0xec,
+ 0x52, 0xa9, 0xac, 0x33, 0x30, 0x4e, 0xad, 0xc5, 0xc7, 0x7e, 0x45, 0x13, 0xa1, 0xb1, 0xde, 0xda, 0xca,
+ 0x3f, 0x99, 0x30, 0xfe, 0x0f, 0x23, 0xd4, 0x3d, 0xaa, 0xaf, 0x1c, 0x14, 0x44, 0x00, 0x00, 0x00, 0x00,
+ 0x49, 0x45, 0x4e, 0x44, 0xae, 0x42, 0x60, 0x82
+};
+
+static const unsigned int xemu_64x64_size = sizeof(xemu_64x64_data);
diff --git a/android/app/src/main/cpp/dump_stub.c b/android/app/src/main/cpp/dump_stub.c
new file mode 100644
index 0000000000..6126aac291
--- /dev/null
+++ b/android/app/src/main/cpp/dump_stub.c
@@ -0,0 +1,6 @@
+#include "qemu/osdep.h"
+
+bool qemu_system_dump_in_progress(void)
+{
+ return false;
+}
diff --git a/android/app/src/main/cpp/epoxy/gl.h b/android/app/src/main/cpp/epoxy/gl.h
new file mode 100644
index 0000000000..462060d957
--- /dev/null
+++ b/android/app/src/main/cpp/epoxy/gl.h
@@ -0,0 +1,181 @@
+#pragma once
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#ifndef GL_UNPACK_ROW_LENGTH_EXT
+#define GL_UNPACK_ROW_LENGTH_EXT GL_UNPACK_ROW_LENGTH
+#endif
+
+#ifndef GL_BGRA
+#define GL_BGRA 0x80E1
+#endif
+
+#ifndef GL_BGRA_EXT
+#define GL_BGRA_EXT GL_BGRA
+#endif
+
+#ifndef GL_CLAMP_TO_BORDER
+#define GL_CLAMP_TO_BORDER GL_CLAMP_TO_EDGE
+#endif
+
+#ifndef GL_UNSIGNED_SHORT_5_5_5_1
+#define GL_UNSIGNED_SHORT_5_5_5_1 0x8034
+#endif
+
+#ifndef GL_UNSIGNED_SHORT_4_4_4_4
+#define GL_UNSIGNED_SHORT_4_4_4_4 0x8033
+#endif
+
+#ifndef GL_UNSIGNED_INT_8_8_8_8
+#define GL_UNSIGNED_INT_8_8_8_8 0x8035
+#endif
+
+#ifndef GL_RGB5_A1
+#define GL_RGB5_A1 0x8057
+#endif
+
+#ifndef GL_RGB5
+#define GL_RGB5 GL_RGB5_A1
+#endif
+
+#ifndef GL_UNSIGNED_SHORT_1_5_5_5_REV
+#define GL_UNSIGNED_SHORT_1_5_5_5_REV GL_UNSIGNED_SHORT_5_5_5_1
+#endif
+
+#ifndef GL_UNSIGNED_SHORT_4_4_4_4_REV
+#define GL_UNSIGNED_SHORT_4_4_4_4_REV GL_UNSIGNED_SHORT_4_4_4_4
+#endif
+
+#ifndef GL_UNSIGNED_INT_8_8_8_8_REV
+#define GL_UNSIGNED_INT_8_8_8_8_REV GL_UNSIGNED_INT_8_8_8_8
+#endif
+
+#ifndef GL_COMPRESSED_RGBA_S3TC_DXT1_EXT
+#define GL_COMPRESSED_RGBA_S3TC_DXT1_EXT 0x83F1
+#endif
+
+#ifndef GL_COMPRESSED_RGBA_S3TC_DXT3_EXT
+#define GL_COMPRESSED_RGBA_S3TC_DXT3_EXT 0x83F2
+#endif
+
+#ifndef GL_COMPRESSED_RGBA_S3TC_DXT5_EXT
+#define GL_COMPRESSED_RGBA_S3TC_DXT5_EXT 0x83F3
+#endif
+
+#ifndef GL_R16
+#define GL_R16 0x822A
+#endif
+
+#ifndef GL_BGR
+#define GL_BGR GL_RGB
+#endif
+
+#ifndef GL_FILL
+#define GL_FILL 0x1B02
+#endif
+
+#ifndef GL_SAMPLES_PASSED
+#define GL_SAMPLES_PASSED GL_ANY_SAMPLES_PASSED
+#endif
+
+#ifndef GL_SMOOTH_LINE_WIDTH_RANGE
+#define GL_SMOOTH_LINE_WIDTH_RANGE GL_ALIASED_LINE_WIDTH_RANGE
+#endif
+
+#ifndef GL_PROGRAM_POINT_SIZE
+#define GL_PROGRAM_POINT_SIZE 0x8642
+#endif
+
+#ifndef GL_TEXTURE_LOD_BIAS
+#define GL_TEXTURE_LOD_BIAS 0x8501
+#endif
+
+#ifndef GL_TEXTURE_MAX_ANISOTROPY_EXT
+#define GL_TEXTURE_MAX_ANISOTROPY_EXT 0x84FE
+#endif
+
+#ifndef GL_TEXTURE_SWIZZLE_RGBA
+#define GL_TEXTURE_SWIZZLE_RGBA 0x8E46
+#endif
+
+#ifndef GL_TEXTURE_1D
+#define GL_TEXTURE_1D 0x0DE0
+#endif
+
+#ifndef GL_FIRST_VERTEX_CONVENTION
+#define GL_FIRST_VERTEX_CONVENTION 0x8E4D
+#endif
+
+#ifndef GL_POLYGON_OFFSET_LINE
+#define GL_POLYGON_OFFSET_LINE GL_POLYGON_OFFSET_FILL
+#endif
+
+#ifndef GL_POLYGON_OFFSET_POINT
+#define GL_POLYGON_OFFSET_POINT GL_POLYGON_OFFSET_FILL
+#endif
+
+#if !defined(GL_ES_VERSION_3_1)
+static inline void glProgramUniform1i(GLuint program, GLint location, GLint v0)
+{
+ glUseProgram(program);
+ glUniform1i(location, v0);
+}
+#endif
+
+static inline void glClearDepth(GLfloat depth)
+{
+ glClearDepthf(depth);
+}
+
+static inline void glPolygonMode(GLenum face, GLenum mode)
+{
+ (void)face;
+ (void)mode;
+}
+
+static inline void glProvokingVertex(GLenum mode)
+{
+ (void)mode;
+}
+
+static inline void glMultiDrawArrays(GLenum mode, const GLint *first,
+ const GLsizei *count, GLsizei drawcount)
+{
+ for (GLsizei i = 0; i < drawcount; i++) {
+ glDrawArrays(mode, first[i], count[i]);
+ }
+}
+
+static inline int epoxy_gl_version(void)
+{
+ return 30;
+}
+
+static inline bool epoxy_has_gl_extension(const char *ext)
+{
+ if (!ext || !*ext) {
+ return false;
+ }
+ const char *exts = (const char *)glGetString(GL_EXTENSIONS);
+ if (!exts) {
+ return false;
+ }
+ const char *start = exts;
+ size_t ext_len = strlen(ext);
+ while ((start = strstr(start, ext)) != NULL) {
+ const char *end = start + ext_len;
+ if ((start == exts || start[-1] == ' ') &&
+ (*end == '\0' || *end == ' ')) {
+ return true;
+ }
+ start = end;
+ }
+ return false;
+}
diff --git a/android/app/src/main/cpp/fast_hash_stub.c b/android/app/src/main/cpp/fast_hash_stub.c
new file mode 100644
index 0000000000..6d3a938230
--- /dev/null
+++ b/android/app/src/main/cpp/fast_hash_stub.c
@@ -0,0 +1,16 @@
+#include "qemu/osdep.h"
+#include "qemu/fast-hash.h"
+
+uint64_t fast_hash(const uint8_t *data, size_t len)
+{
+ const uint64_t fnv_offset = 1469598103934665603ULL;
+ const uint64_t fnv_prime = 1099511628211ULL;
+ uint64_t hash = fnv_offset;
+
+ for (size_t i = 0; i < len; ++i) {
+ hash ^= (uint64_t)data[i];
+ hash *= fnv_prime;
+ }
+
+ return hash;
+}
diff --git a/android/app/src/main/cpp/iconv_stub/iconv.h b/android/app/src/main/cpp/iconv_stub/iconv.h
new file mode 100644
index 0000000000..4fe008fc11
--- /dev/null
+++ b/android/app/src/main/cpp/iconv_stub/iconv.h
@@ -0,0 +1,20 @@
+#ifndef XEMU_ANDROID_ICONV_STUB_H
+#define XEMU_ANDROID_ICONV_STUB_H
+
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void* iconv_t;
+
+iconv_t iconv_open(const char* tocode, const char* fromcode);
+size_t iconv(iconv_t cd, char** inbuf, size_t* inbytesleft, char** outbuf, size_t* outbytesleft);
+int iconv_close(iconv_t cd);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // XEMU_ANDROID_ICONV_STUB_H
diff --git a/android/app/src/main/cpp/iconv_stub/iconv_stub.c b/android/app/src/main/cpp/iconv_stub/iconv_stub.c
new file mode 100644
index 0000000000..b6a9864427
--- /dev/null
+++ b/android/app/src/main/cpp/iconv_stub/iconv_stub.c
@@ -0,0 +1,65 @@
+#include "iconv.h"
+
+#include
+#include
+#include
+
+struct iconv_state {
+ int passthrough;
+};
+
+iconv_t iconv_open(const char* tocode, const char* fromcode) {
+ if (!tocode || !fromcode) {
+ errno = EINVAL;
+ return (iconv_t)-1;
+ }
+
+ struct iconv_state* state = (struct iconv_state*)malloc(sizeof(struct iconv_state));
+ if (!state) {
+ errno = ENOMEM;
+ return (iconv_t)-1;
+ }
+
+ state->passthrough = (strcmp(tocode, fromcode) == 0);
+ return (iconv_t)state;
+}
+
+size_t iconv(iconv_t cd, char** inbuf, size_t* inbytesleft, char** outbuf, size_t* outbytesleft) {
+ if (cd == (iconv_t)-1) {
+ errno = EINVAL;
+ return (size_t)-1;
+ }
+
+ struct iconv_state* state = (struct iconv_state*)cd;
+ if (!state->passthrough) {
+ errno = EINVAL;
+ return (size_t)-1;
+ }
+
+ if (!inbuf || !outbuf || !*inbuf || !*outbuf || !inbytesleft || !outbytesleft) {
+ errno = EINVAL;
+ return (size_t)-1;
+ }
+
+ size_t to_copy = (*inbytesleft < *outbytesleft) ? *inbytesleft : *outbytesleft;
+ if (to_copy == 0) {
+ return 0;
+ }
+
+ memcpy(*outbuf, *inbuf, to_copy);
+ *inbuf += to_copy;
+ *outbuf += to_copy;
+ *inbytesleft -= to_copy;
+ *outbytesleft -= to_copy;
+ return 0;
+}
+
+int iconv_close(iconv_t cd) {
+ if (cd == (iconv_t)-1) {
+ errno = EINVAL;
+ return -1;
+ }
+
+ free(cd);
+ return 0;
+}
diff --git a/android/app/src/main/cpp/kvmclock_stub.c b/android/app/src/main/cpp/kvmclock_stub.c
new file mode 100644
index 0000000000..eb6b265da2
--- /dev/null
+++ b/android/app/src/main/cpp/kvmclock_stub.c
@@ -0,0 +1,7 @@
+#include "qemu/osdep.h"
+#include "hw/i386/kvm/clock.h"
+
+void kvmclock_create(bool create_always)
+{
+ (void)create_always;
+}
diff --git a/android/app/src/main/cpp/libintl_stub.c b/android/app/src/main/cpp/libintl_stub.c
new file mode 100644
index 0000000000..73b8feef96
--- /dev/null
+++ b/android/app/src/main/cpp/libintl_stub.c
@@ -0,0 +1,35 @@
+#include
+
+const char *g_libintl_bindtextdomain(const char *domain, const char *dir) {
+ (void)domain;
+ return dir;
+}
+
+const char *g_libintl_bind_textdomain_codeset(const char *domain, const char *codeset) {
+ (void)domain;
+ return codeset;
+}
+
+const char *g_libintl_dgettext(const char *domain, const char *msgid) {
+ (void)domain;
+ return msgid;
+}
+
+const char *g_libintl_dcgettext(const char *domain, const char *msgid, int category) {
+ (void)domain;
+ (void)category;
+ return msgid;
+}
+
+const char *g_libintl_dngettext(const char *domain, const char *msgid1, const char *msgid2, unsigned long n) {
+ (void)domain;
+ return (n == 1) ? msgid1 : msgid2;
+}
+
+const char *g_libintl_gettext(const char *msgid) {
+ return msgid;
+}
+
+const char *g_libintl_textdomain(const char *domain) {
+ return domain ? domain : "messages";
+}
diff --git a/android/app/src/main/cpp/monitor_stub.c b/android/app/src/main/cpp/monitor_stub.c
new file mode 100644
index 0000000000..a903f5c36d
--- /dev/null
+++ b/android/app/src/main/cpp/monitor_stub.c
@@ -0,0 +1,36 @@
+#include "qemu/osdep.h"
+#include "monitor/monitor-internal.h"
+
+HMPCommand hmp_cmds[] = {
+ { NULL }
+};
+
+int hmp_compare_cmd(const char *name, const char *list)
+{
+ (void)name;
+ (void)list;
+ return 0;
+}
+
+int get_monitor_def(Monitor *mon, int64_t *pval, const char *name)
+{
+ (void)mon;
+ (void)pval;
+ (void)name;
+ return -1;
+}
+
+void monitor_register_hmp_info_hrt(const char *name,
+ HumanReadableText *(*handler)(Error **errp))
+{
+ (void)name;
+ (void)handler;
+}
+
+void monitor_register_hmp(const char *name, bool info,
+ void (*cmd)(Monitor *mon, const QDict *qdict))
+{
+ (void)name;
+ (void)info;
+ (void)cmd;
+}
diff --git a/android/app/src/main/cpp/nbd_server_stub.c b/android/app/src/main/cpp/nbd_server_stub.c
new file mode 100644
index 0000000000..94d0e0ca2d
--- /dev/null
+++ b/android/app/src/main/cpp/nbd_server_stub.c
@@ -0,0 +1,58 @@
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qapi/qapi-commands-block-export.h"
+#include "block/nbd.h"
+
+void nbd_server_start(SocketAddress *addr, uint32_t handshake_max_secs,
+ const char *tls_creds, const char *tls_authz,
+ uint32_t max_connections, Error **errp)
+{
+ (void)addr;
+ (void)handshake_max_secs;
+ (void)tls_creds;
+ (void)tls_authz;
+ (void)max_connections;
+ error_setg(errp, "NBD server not supported on Android");
+}
+
+void nbd_server_start_options(NbdServerOptions *arg, Error **errp)
+{
+ (void)arg;
+ error_setg(errp, "NBD server not supported on Android");
+}
+
+void qmp_nbd_server_start(bool has_handshake_max_seconds,
+ uint32_t handshake_max_seconds,
+ const char *tls_creds, const char *tls_authz,
+ bool has_max_connections, uint32_t max_connections,
+ SocketAddressLegacy *addr, Error **errp)
+{
+ (void)has_handshake_max_seconds;
+ (void)handshake_max_seconds;
+ (void)tls_creds;
+ (void)tls_authz;
+ (void)has_max_connections;
+ (void)max_connections;
+ (void)addr;
+ error_setg(errp, "NBD server not supported on Android");
+}
+
+void qmp_nbd_server_add(NbdServerAddOptions *arg, Error **errp)
+{
+ (void)arg;
+ error_setg(errp, "NBD server not supported on Android");
+}
+
+void qmp_nbd_server_remove(const char *name, bool has_mode,
+ BlockExportRemoveMode mode, Error **errp)
+{
+ (void)name;
+ (void)has_mode;
+ (void)mode;
+ error_setg(errp, "NBD server not supported on Android");
+}
+
+void qmp_nbd_server_stop(Error **errp)
+{
+ error_setg(errp, "NBD server not supported on Android");
+}
diff --git a/android/app/src/main/cpp/net_stub.c b/android/app/src/main/cpp/net_stub.c
new file mode 100644
index 0000000000..6938c58b75
--- /dev/null
+++ b/android/app/src/main/cpp/net_stub.c
@@ -0,0 +1,40 @@
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "net/clients.h"
+#include "net/vhost_net.h"
+
+VHostNetState *get_vhost_net(NetClientState *nc)
+{
+ (void)nc;
+ return NULL;
+}
+
+int net_init_tap(const Netdev *netdev, const char *name,
+ NetClientState *peer, Error **errp)
+{
+ (void)netdev;
+ (void)name;
+ (void)peer;
+ error_setg(errp, "tap networking not supported on Android");
+ return -ENOSYS;
+}
+
+int net_init_bridge(const Netdev *netdev, const char *name,
+ NetClientState *peer, Error **errp)
+{
+ (void)netdev;
+ (void)name;
+ (void)peer;
+ error_setg(errp, "bridge networking not supported on Android");
+ return -ENOSYS;
+}
+
+int net_init_pcap(const Netdev *netdev, const char *name,
+ NetClientState *peer, Error **errp)
+{
+ (void)netdev;
+ (void)name;
+ (void)peer;
+ error_setg(errp, "pcap networking not supported on Android");
+ return -ENOSYS;
+}
diff --git a/android/app/src/main/cpp/nv2a_vsh_emulator_stub.c b/android/app/src/main/cpp/nv2a_vsh_emulator_stub.c
new file mode 100644
index 0000000000..1afd2c8b30
--- /dev/null
+++ b/android/app/src/main/cpp/nv2a_vsh_emulator_stub.c
@@ -0,0 +1,36 @@
+#include "nv2a_vsh_emulator.h"
+
+Nv2aVshParseResult nv2a_vsh_parse_program(Nv2aVshProgram *program,
+ const uint32_t *code,
+ uint32_t code_length)
+{
+ (void)program;
+ (void)code;
+ (void)code_length;
+ return NV2AVPR_SUCCESS;
+}
+
+void nv2a_vsh_program_destroy(Nv2aVshProgram *program)
+{
+ (void)program;
+}
+
+Nv2aVshExecutionState nv2a_vsh_emu_initialize_xss_execution_state(
+ Nv2aVshCPUXVSSExecutionState *linkage,
+ float *constants)
+{
+ Nv2aVshExecutionState state;
+ state.linkage = linkage;
+ state.constants = constants;
+ return state;
+}
+
+void nv2a_vsh_emu_execute_track_context_writes(
+ Nv2aVshExecutionState *state,
+ const Nv2aVshProgram *program,
+ bool *constants_dirty)
+{
+ (void)state;
+ (void)program;
+ (void)constants_dirty;
+}
diff --git a/android/app/src/main/cpp/patch_glib.cmake b/android/app/src/main/cpp/patch_glib.cmake
new file mode 100644
index 0000000000..e75ea04961
--- /dev/null
+++ b/android/app/src/main/cpp/patch_glib.cmake
@@ -0,0 +1,63 @@
+if(NOT DEFINED GLIB_SOURCE_DIR)
+ message(FATAL_ERROR "GLIB_SOURCE_DIR is not set")
+endif()
+
+string(REPLACE "\"" "" GLIB_SOURCE_DIR "${GLIB_SOURCE_DIR}")
+
+set(MESON_FILE "${GLIB_SOURCE_DIR}/glib/meson.build")
+if(NOT EXISTS "${MESON_FILE}")
+ message(FATAL_ERROR "glib meson.build not found at ${MESON_FILE}")
+endif()
+
+file(READ "${MESON_FILE}" MESON_CONTENTS)
+
+string(REPLACE
+ "if host_system != 'windows'"
+ "if false"
+ MESON_CONTENTS
+ "${MESON_CONTENTS}"
+)
+
+string(REPLACE
+ "gdb_install_dir = join_paths(glib_datadir, 'gdb', 'auto-load', './' + glib_libdir)"
+ "gdb_install_dir = false"
+ MESON_CONTENTS
+ "${MESON_CONTENTS}"
+)
+string(REPLACE
+ "subdir('fuzzing')"
+ "if false\n subdir('fuzzing')\nendif"
+ MESON_CONTENTS
+ "${MESON_CONTENTS}"
+)
+file(WRITE "${MESON_FILE}" "${MESON_CONTENTS}")
+
+set(GQUARK_FILE "${GLIB_SOURCE_DIR}/glib/gquark.c")
+if(EXISTS "${GQUARK_FILE}")
+ file(READ "${GQUARK_FILE}" GQUARK_CONTENTS)
+ string(REPLACE
+ " g_assert (quark_seq_id == 0);\n"
+ " if (quark_seq_id != 0) {\n return;\n }\n"
+ GQUARK_CONTENTS
+ "${GQUARK_CONTENTS}"
+ )
+ file(WRITE "${GQUARK_FILE}" "${GQUARK_CONTENTS}")
+endif()
+
+set(GDBUS_UTILS_FILE "${GLIB_SOURCE_DIR}/gio/gdbus-2.0/codegen/utils.py")
+if(EXISTS "${GDBUS_UTILS_FILE}")
+ file(READ "${GDBUS_UTILS_FILE}" GDBUS_UTILS_CONTENTS)
+ string(REPLACE
+ "import distutils.version\n"
+ "try:\n from distutils.version import LooseVersion as _LooseVersion\nexcept Exception:\n from setuptools._distutils.version import LooseVersion as _LooseVersion\n"
+ GDBUS_UTILS_CONTENTS
+ "${GDBUS_UTILS_CONTENTS}"
+ )
+ string(REPLACE
+ "distutils.version.LooseVersion"
+ "_LooseVersion"
+ GDBUS_UTILS_CONTENTS
+ "${GDBUS_UTILS_CONTENTS}"
+ )
+ file(WRITE "${GDBUS_UTILS_FILE}" "${GDBUS_UTILS_CONTENTS}")
+endif()
diff --git a/android/app/src/main/cpp/qcrypto_random_android.c b/android/app/src/main/cpp/qcrypto_random_android.c
new file mode 100644
index 0000000000..66422434ac
--- /dev/null
+++ b/android/app/src/main/cpp/qcrypto_random_android.c
@@ -0,0 +1,58 @@
+#include "qemu/osdep.h"
+
+#include
+#include
+#include
+#include
+
+#include "crypto/random.h"
+
+int qcrypto_random_init(Error **errp)
+{
+ (void)errp;
+ return 0;
+}
+
+static void fill_fallback(void *buf, size_t len)
+{
+ uint64_t seed = (uint64_t)(uintptr_t)buf ^ (uint64_t)getpid();
+ seed ^= (uint64_t)time(NULL);
+ uint8_t *out = (uint8_t *)buf;
+ for (size_t i = 0; i < len; ++i) {
+ seed = seed * 6364136223846793005ULL + 1;
+ out[i] = (uint8_t)(seed >> 32);
+ }
+}
+
+int qcrypto_random_bytes(void *buf, size_t buflen, Error **errp)
+{
+ (void)errp;
+ if (buflen == 0) {
+ return 0;
+ }
+
+ int fd = open("/dev/urandom", O_RDONLY | O_CLOEXEC);
+ if (fd >= 0) {
+ size_t remaining = buflen;
+ uint8_t *out = (uint8_t *)buf;
+ while (remaining > 0) {
+ ssize_t got = read(fd, out, remaining);
+ if (got > 0) {
+ out += got;
+ remaining -= (size_t)got;
+ continue;
+ }
+ if (got < 0 && errno == EINTR) {
+ continue;
+ }
+ break;
+ }
+ close(fd);
+ if (remaining == 0) {
+ return 0;
+ }
+ }
+
+ fill_fallback(buf, buflen);
+ return 0;
+}
diff --git a/android/app/src/main/cpp/qemu_input_stub.c b/android/app/src/main/cpp/qemu_input_stub.c
new file mode 100644
index 0000000000..5d665ba7f6
--- /dev/null
+++ b/android/app/src/main/cpp/qemu_input_stub.c
@@ -0,0 +1,12 @@
+#include "qemu/osdep.h"
+#include "ui/input.h"
+#include "qapi/qapi-types-ui.h"
+
+int qemu_input_key_number_to_qcode(unsigned int nr)
+{
+ (void)nr;
+ return Q_KEY_CODE_UNMAPPED;
+}
+
+const guint qemu_input_map_usb_to_qcode_len = 0;
+const guint16 qemu_input_map_usb_to_qcode[] = { Q_KEY_CODE_UNMAPPED };
diff --git a/android/app/src/main/cpp/qmp_stub.c b/android/app/src/main/cpp/qmp_stub.c
new file mode 100644
index 0000000000..0197c7337a
--- /dev/null
+++ b/android/app/src/main/cpp/qmp_stub.c
@@ -0,0 +1,447 @@
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qapi/qapi-commands-cxl.h"
+#include "qapi/qapi-commands-dump.h"
+#include "qapi/qapi-commands-machine.h"
+#include "qapi/qapi-commands-machine-s390x.h"
+#include "qapi/qapi-commands-migration.h"
+#include "qapi/qapi-commands-misc-arm.h"
+#include "qapi/qapi-commands-misc-i386.h"
+#include "qapi/qapi-commands-rocker.h"
+#include "qapi/qapi-commands-trace.h"
+#include "qapi/qapi-commands-virtio.h"
+#include "qapi/qapi-types-cxl.h"
+#include "qapi/qapi-types-dump.h"
+#include "qapi/qapi-types-machine.h"
+#include "qapi/qapi-types-machine-s390x.h"
+#include "qapi/qapi-types-misc-arm.h"
+#include "qapi/qapi-types-misc-i386.h"
+#include "qapi/qapi-types-rocker.h"
+#include "qapi/qapi-types-trace.h"
+#include "qapi/qapi-types-virtio.h"
+#include "block/nbd.h"
+
+static void set_not_supported(Error **errp, const char *name)
+{
+ error_setg(errp, "%s not supported on Android build", name);
+}
+
+SevInfo *qmp_query_sev(Error **errp)
+{
+ set_not_supported(errp, "query-sev");
+ return NULL;
+}
+
+SevLaunchMeasureInfo *qmp_query_sev_launch_measure(Error **errp)
+{
+ set_not_supported(errp, "query-sev-launch-measure");
+ return NULL;
+}
+
+SevCapability *qmp_query_sev_capabilities(Error **errp)
+{
+ set_not_supported(errp, "query-sev-capabilities");
+ return NULL;
+}
+
+void qmp_sev_inject_launch_secret(const char *packet_header, const char *secret,
+ bool has_gpa, uint64_t gpa, Error **errp)
+{
+ (void)packet_header;
+ (void)secret;
+ (void)has_gpa;
+ (void)gpa;
+ set_not_supported(errp, "sev-inject-launch-secret");
+}
+
+SevAttestationReport *qmp_query_sev_attestation_report(const char *mnonce,
+ Error **errp)
+{
+ (void)mnonce;
+ set_not_supported(errp, "query-sev-attestation-report");
+ return NULL;
+}
+
+EvtchnInfoList *qmp_xen_event_list(Error **errp)
+{
+ set_not_supported(errp, "xen-event-list");
+ return NULL;
+}
+
+void qmp_xen_event_inject(uint32_t port, Error **errp)
+{
+ (void)port;
+ set_not_supported(errp, "xen-event-inject");
+}
+
+VirtioInfoList *qmp_x_query_virtio(Error **errp)
+{
+ set_not_supported(errp, "x-query-virtio");
+ return NULL;
+}
+
+VirtioStatus *qmp_x_query_virtio_status(const char *path, Error **errp)
+{
+ (void)path;
+ set_not_supported(errp, "x-query-virtio-status");
+ return NULL;
+}
+
+VirtQueueStatus *qmp_x_query_virtio_queue_status(const char *path, uint16_t queue,
+ Error **errp)
+{
+ (void)path;
+ (void)queue;
+ set_not_supported(errp, "x-query-virtio-queue-status");
+ return NULL;
+}
+
+VirtVhostQueueStatus *qmp_x_query_virtio_vhost_queue_status(const char *path,
+ uint16_t queue,
+ Error **errp)
+{
+ (void)path;
+ (void)queue;
+ set_not_supported(errp, "x-query-virtio-vhost-queue-status");
+ return NULL;
+}
+
+void qmp_cxl_inject_general_media_event(const char *path, CxlEventLog log,
+ uint8_t flags, uint64_t dpa,
+ uint8_t descriptor, uint8_t type,
+ uint8_t transaction_type,
+ bool has_channel, uint8_t channel,
+ bool has_rank, uint8_t rank,
+ bool has_device, uint32_t device,
+ const char *component_id,
+ Error **errp)
+{
+ (void)path;
+ (void)log;
+ (void)flags;
+ (void)dpa;
+ (void)descriptor;
+ (void)type;
+ (void)transaction_type;
+ (void)has_channel;
+ (void)channel;
+ (void)has_rank;
+ (void)rank;
+ (void)has_device;
+ (void)device;
+ (void)component_id;
+ set_not_supported(errp, "cxl-inject-general-media-event");
+}
+
+void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log, uint8_t flags,
+ uint64_t dpa, uint8_t descriptor, uint8_t type,
+ uint8_t transaction_type, bool has_channel,
+ uint8_t channel, bool has_rank, uint8_t rank,
+ bool has_nibble_mask, uint32_t nibble_mask,
+ bool has_bank_group, uint8_t bank_group,
+ bool has_bank, uint8_t bank, bool has_row,
+ uint32_t row, bool has_column, uint16_t column,
+ bool has_correction_mask,
+ uint64List *correction_mask, Error **errp)
+{
+ (void)path;
+ (void)log;
+ (void)flags;
+ (void)dpa;
+ (void)descriptor;
+ (void)type;
+ (void)transaction_type;
+ (void)has_channel;
+ (void)channel;
+ (void)has_rank;
+ (void)rank;
+ (void)has_nibble_mask;
+ (void)nibble_mask;
+ (void)has_bank_group;
+ (void)bank_group;
+ (void)has_bank;
+ (void)bank;
+ (void)has_row;
+ (void)row;
+ (void)has_column;
+ (void)column;
+ (void)has_correction_mask;
+ (void)correction_mask;
+ set_not_supported(errp, "cxl-inject-dram-event");
+}
+
+void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
+ uint8_t flags, uint8_t type,
+ uint8_t health_status,
+ uint8_t media_status,
+ uint8_t additional_status,
+ uint8_t life_used, int16_t temperature,
+ uint32_t dirty_shutdown_count,
+ uint32_t corrected_volatile_error_count,
+ uint32_t corrected_persistent_error_count,
+ Error **errp)
+{
+ (void)path;
+ (void)log;
+ (void)flags;
+ (void)type;
+ (void)health_status;
+ (void)media_status;
+ (void)additional_status;
+ (void)life_used;
+ (void)temperature;
+ (void)dirty_shutdown_count;
+ (void)corrected_volatile_error_count;
+ (void)corrected_persistent_error_count;
+ set_not_supported(errp, "cxl-inject-memory-module-event");
+}
+
+void qmp_cxl_inject_poison(const char *path, uint64_t start, uint64_t length,
+ Error **errp)
+{
+ (void)path;
+ (void)start;
+ (void)length;
+ set_not_supported(errp, "cxl-inject-poison");
+}
+
+void qmp_cxl_inject_uncorrectable_errors(const char *path,
+ CXLUncorErrorRecordList *errors,
+ Error **errp)
+{
+ (void)path;
+ (void)errors;
+ set_not_supported(errp, "cxl-inject-uncorrectable-errors");
+}
+
+void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
+ Error **errp)
+{
+ (void)path;
+ (void)type;
+ set_not_supported(errp, "cxl-inject-correctable-error");
+}
+
+void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,
+ CxlExtentSelectionPolicy selection_policy,
+ uint8_t region, const char *tag,
+ CxlDynamicCapacityExtentList *extents,
+ Error **errp)
+{
+ (void)path;
+ (void)host_id;
+ (void)selection_policy;
+ (void)region;
+ (void)tag;
+ (void)extents;
+ set_not_supported(errp, "cxl-add-dynamic-capacity");
+}
+
+void qmp_cxl_release_dynamic_capacity(const char *path, uint16_t host_id,
+ CxlExtentRemovalPolicy removal_policy,
+ bool has_forced_removal,
+ bool forced_removal,
+ bool has_sanitize_on_release,
+ bool sanitize_on_release, uint8_t region,
+ const char *tag,
+ CxlDynamicCapacityExtentList *extents,
+ Error **errp)
+{
+ (void)path;
+ (void)host_id;
+ (void)removal_policy;
+ (void)has_forced_removal;
+ (void)forced_removal;
+ (void)has_sanitize_on_release;
+ (void)sanitize_on_release;
+ (void)region;
+ (void)tag;
+ (void)extents;
+ set_not_supported(errp, "cxl-release-dynamic-capacity");
+}
+
+int coroutine_fn nbd_co_do_establish_connection(BlockDriverState *bs,
+ bool blocking, Error **errp)
+{
+ (void)bs;
+ (void)blocking;
+ set_not_supported(errp, "nbd-do-establish-connection");
+ return -ENOTSUP;
+}
+
+VirtioQueueElement *qmp_x_query_virtio_queue_element(const char *path,
+ uint16_t queue,
+ bool has_index,
+ uint16_t index,
+ Error **errp)
+{
+ (void)path;
+ (void)queue;
+ (void)has_index;
+ (void)index;
+ set_not_supported(errp, "x-query-virtio-queue-element");
+ return NULL;
+}
+
+GICCapabilityList *qmp_query_gic_capabilities(Error **errp)
+{
+ set_not_supported(errp, "query-gic-capabilities");
+ return NULL;
+}
+
+void qmp_set_cpu_topology(uint16_t core_id,
+ bool has_socket_id, uint16_t socket_id,
+ bool has_book_id, uint16_t book_id,
+ bool has_drawer_id, uint16_t drawer_id,
+ bool has_entitlement, S390CpuEntitlement entitlement,
+ bool has_dedicated, bool dedicated,
+ Error **errp)
+{
+ (void)core_id;
+ (void)has_socket_id;
+ (void)socket_id;
+ (void)has_book_id;
+ (void)book_id;
+ (void)has_drawer_id;
+ (void)drawer_id;
+ (void)has_entitlement;
+ (void)entitlement;
+ (void)has_dedicated;
+ (void)dedicated;
+ set_not_supported(errp, "set-cpu-topology");
+}
+
+CpuPolarizationInfo *qmp_query_s390x_cpu_polarization(Error **errp)
+{
+ set_not_supported(errp, "query-s390x-cpu-polarization");
+ return NULL;
+}
+
+HvBalloonInfo *qmp_query_hv_balloon_status_report(Error **errp)
+{
+ set_not_supported(errp, "query-hv-balloon-status-report");
+ return NULL;
+}
+
+FirmwareLog *qmp_query_firmware_log(bool has_max_size, uint64_t max_size,
+ Error **errp)
+{
+ (void)has_max_size;
+ (void)max_size;
+ set_not_supported(errp, "query-firmware-log");
+ return NULL;
+}
+
+CpuModelCompareInfo *qmp_query_cpu_model_comparison(CpuModelInfo *modela,
+ CpuModelInfo *modelb,
+ Error **errp)
+{
+ (void)modela;
+ (void)modelb;
+ set_not_supported(errp, "query-cpu-model-comparison");
+ return NULL;
+}
+
+CpuModelBaselineInfo *qmp_query_cpu_model_baseline(CpuModelInfo *modela,
+ CpuModelInfo *modelb,
+ Error **errp)
+{
+ (void)modela;
+ (void)modelb;
+ set_not_supported(errp, "query-cpu-model-baseline");
+ return NULL;
+}
+
+TraceEventInfoList *qmp_trace_event_get_state(const char *name, Error **errp)
+{
+ (void)name;
+ set_not_supported(errp, "trace-event-get-state");
+ return NULL;
+}
+
+void qmp_trace_event_set_state(const char *name, bool enable,
+ bool has_ignore_unavailable,
+ bool ignore_unavailable, Error **errp)
+{
+ (void)name;
+ (void)enable;
+ (void)has_ignore_unavailable;
+ (void)ignore_unavailable;
+ set_not_supported(errp, "trace-event-set-state");
+}
+
+void qmp_xen_set_global_dirty_log(bool enable, Error **errp)
+{
+ (void)enable;
+ set_not_supported(errp, "xen-set-global-dirty-log");
+}
+
+RockerSwitch *qmp_query_rocker(const char *name, Error **errp)
+{
+ (void)name;
+ set_not_supported(errp, "query-rocker");
+ return NULL;
+}
+
+RockerPortList *qmp_query_rocker_ports(const char *name, Error **errp)
+{
+ (void)name;
+ set_not_supported(errp, "query-rocker-ports");
+ return NULL;
+}
+
+RockerOfDpaFlowList *qmp_query_rocker_of_dpa_flows(const char *name,
+ bool has_tbl_id,
+ uint32_t tbl_id,
+ Error **errp)
+{
+ (void)name;
+ (void)has_tbl_id;
+ (void)tbl_id;
+ set_not_supported(errp, "query-rocker-of-dpa-flows");
+ return NULL;
+}
+
+RockerOfDpaGroupList *qmp_query_rocker_of_dpa_groups(const char *name,
+ bool has_type,
+ uint8_t type,
+ Error **errp)
+{
+ (void)name;
+ (void)has_type;
+ (void)type;
+ set_not_supported(errp, "query-rocker-of-dpa-groups");
+ return NULL;
+}
+
+void qmp_dump_guest_memory(bool paging, const char *protocol,
+ bool has_detach, bool detach,
+ bool has_begin, int64_t begin,
+ bool has_length, int64_t length,
+ bool has_format, DumpGuestMemoryFormat format,
+ Error **errp)
+{
+ (void)paging;
+ (void)protocol;
+ (void)has_detach;
+ (void)detach;
+ (void)has_begin;
+ (void)begin;
+ (void)has_length;
+ (void)length;
+ (void)has_format;
+ (void)format;
+ set_not_supported(errp, "dump-guest-memory");
+}
+
+DumpQueryResult *qmp_query_dump(Error **errp)
+{
+ set_not_supported(errp, "query-dump");
+ return NULL;
+}
+
+DumpGuestMemoryCapability *qmp_query_dump_guest_memory_capability(Error **errp)
+{
+ set_not_supported(errp, "query-dump-guest-memory-capability");
+ return NULL;
+}
diff --git a/android/app/src/main/cpp/samplerate_stub.c b/android/app/src/main/cpp/samplerate_stub.c
new file mode 100644
index 0000000000..9e15199ab6
--- /dev/null
+++ b/android/app/src/main/cpp/samplerate_stub.c
@@ -0,0 +1,77 @@
+#include
+#include
+
+#include "samplerate.h"
+
+struct SRC_STATE {
+ src_callback_t cb;
+ void *cb_data;
+ int channels;
+};
+
+SRC_STATE *src_callback_new(src_callback_t cb, int converter_type, int channels,
+ int *error, void *cb_data)
+{
+ (void)converter_type;
+ if (error) {
+ *error = 0;
+ }
+ SRC_STATE *state = (SRC_STATE *)calloc(1, sizeof(*state));
+ if (!state) {
+ if (error) {
+ *error = -1;
+ }
+ return NULL;
+ }
+ state->cb = cb;
+ state->cb_data = cb_data;
+ state->channels = channels;
+ return state;
+}
+
+long src_callback_read(SRC_STATE *state, double ratio, long frames, float *data)
+{
+ (void)ratio;
+ if (!state || !state->cb || !data || frames <= 0) {
+ return 0;
+ }
+
+ float *in = NULL;
+ long got = state->cb(state->cb_data, &in);
+ if (got <= 0 || in == NULL) {
+ return 0;
+ }
+
+ long to_copy = frames < got ? frames : got;
+ memcpy(data, in, sizeof(float) * to_copy * state->channels);
+ return to_copy;
+}
+
+int src_reset(SRC_STATE *state)
+{
+ (void)state;
+ return 0;
+}
+
+const char *src_strerror(int error)
+{
+ (void)error;
+ return "libsamplerate stub";
+}
+
+void src_float_to_short_array(const float *in, short *out, int len)
+{
+ if (!in || !out || len <= 0) {
+ return;
+ }
+
+ for (int i = 0; i < len; ++i) {
+ float v = in[i];
+ if (v > 1.0f) {
+ v = 1.0f;
+ } else if (v < -1.0f) {
+ v = -1.0f;
+ }
+ out[i] = (short)(v * 32767.0f);
+ }
+}
diff --git a/android/app/src/main/cpp/vma_impl.cpp b/android/app/src/main/cpp/vma_impl.cpp
new file mode 100644
index 0000000000..7a6837cbad
--- /dev/null
+++ b/android/app/src/main/cpp/vma_impl.cpp
@@ -0,0 +1,2 @@
+#define VMA_IMPLEMENTATION
+#include
diff --git a/android/app/src/main/cpp/vmstate_if_android.c b/android/app/src/main/cpp/vmstate_if_android.c
new file mode 100644
index 0000000000..bef7e5250f
--- /dev/null
+++ b/android/app/src/main/cpp/vmstate_if_android.c
@@ -0,0 +1,180 @@
+#include "qemu/osdep.h"
+#include "hw/vmstate-if.h"
+#include "hw/intc/intc.h"
+#include "accel/accel-cpu.h"
+#include "system/event-loop-base.h"
+#include "hw/nvram/fw_cfg.h"
+#include "hw/acpi/acpi_aml_interface.h"
+#include "hw/i2c/i2c.h"
+#include "hw/i2c/smbus_slave.h"
+
+/* Force-link the Xbox machine registration unit from the static lib. */
+extern void xbox_init_common(void);
+__attribute__((used)) static void *xemu_android_force_xbox_machine_ref =
+ (void *)&xbox_init_common;
+/* Force-link the PC speaker device registration unit from the static lib. */
+extern void xemu_android_force_pcspk_link(void);
+__attribute__((used)) static void *xemu_android_force_pcspk_ref =
+ (void *)&xemu_android_force_pcspk_link;
+/* Force-link the NVNet device registration unit from the static lib. */
+extern void xemu_android_force_nvnet_link(void);
+__attribute__((used)) static void *xemu_android_force_nvnet_ref =
+ (void *)&xemu_android_force_nvnet_link;
+/* Force-link the xemu display backend registration unit from the static lib. */
+extern void xemu_android_force_xemu_display_link(void);
+__attribute__((used)) static void *xemu_android_force_xemu_display_ref =
+ (void *)&xemu_android_force_xemu_display_link;
+/* Force-link the null chardev backend registration unit from the static lib. */
+extern void xemu_android_force_char_null_link(void);
+__attribute__((used)) static void *xemu_android_force_char_null_ref =
+ (void *)&xemu_android_force_char_null_link;
+/* Force-link the RAM memory-backend registration unit from the static lib. */
+extern void xemu_android_force_mem_backend_ram_link(void);
+__attribute__((used)) static void *xemu_android_force_mem_backend_ram_ref =
+ (void *)&xemu_android_force_mem_backend_ram_link;
+/* Force-link the TCG accel ops registration unit from the static lib. */
+extern void xemu_android_force_tcg_accel_ops_link(void);
+__attribute__((used)) static void *xemu_android_force_tcg_accel_ops_ref =
+ (void *)&xemu_android_force_tcg_accel_ops_link;
+/* Force-link the ISA PIT device registration unit from the static lib. */
+extern void xemu_android_force_i8254_link(void);
+__attribute__((used)) static void *xemu_android_force_i8254_ref =
+ (void *)&xemu_android_force_i8254_link;
+/* Force-link the PIIX IDE device registration unit from the static lib. */
+extern void xemu_android_force_piix_ide_link(void);
+__attribute__((used)) static void *xemu_android_force_piix_ide_ref =
+ (void *)&xemu_android_force_piix_ide_link;
+/* Force-link the IDE device registration unit from the static lib. */
+extern void xemu_android_force_ide_dev_link(void);
+__attribute__((used)) static void *xemu_android_force_ide_dev_ref =
+ (void *)&xemu_android_force_ide_dev_link;
+/* Force-link the PCI OHCI controller registration unit from the static lib. */
+extern void xemu_android_force_ohci_pci_link(void);
+__attribute__((used)) static void *xemu_android_force_ohci_pci_ref =
+ (void *)&xemu_android_force_ohci_pci_link;
+/* Force-link the MCPX ACI device registration unit from the static lib. */
+extern void xemu_android_force_mcpx_aci_link(void);
+__attribute__((used)) static void *xemu_android_force_mcpx_aci_ref =
+ (void *)&xemu_android_force_mcpx_aci_link;
+/* Force-link the SDL audio driver registration unit from the static lib. */
+extern void xemu_android_force_sdlaudio_link(void);
+__attribute__((used)) static void *xemu_android_force_sdlaudio_ref =
+ (void *)&xemu_android_force_sdlaudio_link;
+/* Force-link the noaudio backend registration unit from the static lib. */
+extern void xemu_android_force_noaudio_link(void);
+__attribute__((used)) static void *xemu_android_force_noaudio_ref =
+ (void *)&xemu_android_force_noaudio_link;
+/* Force-link the PCI test device registration unit from the static lib. */
+extern void xemu_android_force_pci_testdev_link(void);
+__attribute__((used)) static void *xemu_android_force_pci_testdev_ref =
+ (void *)&xemu_android_force_pci_testdev_link;
+/* Force-link the SMBus storage device registration unit from the static lib. */
+extern void xemu_android_force_smbus_storage_link(void);
+__attribute__((used)) static void *xemu_android_force_smbus_storage_ref =
+ (void *)&xemu_android_force_smbus_storage_link;
+/* Force-link the USB hub device registration unit from the static lib. */
+extern void xemu_android_force_usb_hub_link(void);
+__attribute__((used)) static void *xemu_android_force_usb_hub_ref =
+ (void *)&xemu_android_force_usb_hub_link;
+
+#define XEMU_ANDROID_ACCEL_CPU_TYPE "accel-i386-cpu"
+
+void xemu_android_register_vmstate_if(void)
+{
+ if (!object_class_by_name(TYPE_VMSTATE_IF)) {
+ static const TypeInfo vmstate_if_info = {
+ .name = TYPE_VMSTATE_IF,
+ .parent = TYPE_INTERFACE,
+ .class_size = sizeof(VMStateIfClass),
+ };
+
+ type_register_static(&vmstate_if_info);
+ }
+
+ if (!object_class_by_name(TYPE_INTERRUPT_STATS_PROVIDER)) {
+ static const TypeInfo intctrl_info = {
+ .name = TYPE_INTERRUPT_STATS_PROVIDER,
+ .parent = TYPE_INTERFACE,
+ .class_size = sizeof(InterruptStatsProviderClass),
+ };
+
+ type_register_static(&intctrl_info);
+ }
+
+ if (!object_class_by_name(XEMU_ANDROID_ACCEL_CPU_TYPE)) {
+ static const TypeInfo accel_cpu_info = {
+ .name = XEMU_ANDROID_ACCEL_CPU_TYPE,
+ .parent = TYPE_OBJECT,
+ .abstract = true,
+ .class_size = sizeof(AccelCPUClass),
+ };
+
+ type_register_static(&accel_cpu_info);
+ }
+
+ if (!object_class_by_name(TYPE_EVENT_LOOP_BASE)) {
+ static const TypeInfo event_loop_base_info = {
+ .name = TYPE_EVENT_LOOP_BASE,
+ .parent = TYPE_OBJECT,
+ .abstract = true,
+ .class_size = sizeof(EventLoopBaseClass),
+ .instance_size = sizeof(EventLoopBase),
+ };
+
+ type_register_static(&event_loop_base_info);
+ }
+
+ if (!object_class_by_name(TYPE_FW_CFG_DATA_GENERATOR_INTERFACE)) {
+ static const TypeInfo fw_cfg_data_generator_info = {
+ .name = TYPE_FW_CFG_DATA_GENERATOR_INTERFACE,
+ .parent = TYPE_INTERFACE,
+ .class_size = sizeof(FWCfgDataGeneratorClass),
+ };
+
+ type_register_static(&fw_cfg_data_generator_info);
+ }
+
+ if (!object_class_by_name(TYPE_ACPI_DEV_AML_IF)) {
+ static const TypeInfo acpi_dev_aml_if_info = {
+ .name = TYPE_ACPI_DEV_AML_IF,
+ .parent = TYPE_INTERFACE,
+ .class_size = sizeof(AcpiDevAmlIfClass),
+ };
+
+ type_register_static(&acpi_dev_aml_if_info);
+ }
+
+ if (!object_class_by_name(TYPE_I2C_SLAVE)) {
+ static const TypeInfo i2c_slave_info = {
+ .name = TYPE_I2C_SLAVE,
+ .parent = TYPE_DEVICE,
+ .abstract = true,
+ .class_size = sizeof(I2CSlaveClass),
+ .instance_size = sizeof(I2CSlave),
+ };
+
+ type_register_static(&i2c_slave_info);
+ }
+
+ if (!object_class_by_name(TYPE_I2C_BUS)) {
+ static const TypeInfo i2c_bus_info = {
+ .name = TYPE_I2C_BUS,
+ .parent = TYPE_BUS,
+ .instance_size = sizeof(I2CBus),
+ };
+
+ type_register_static(&i2c_bus_info);
+ }
+
+ if (!object_class_by_name(TYPE_SMBUS_DEVICE)) {
+ static const TypeInfo smbus_device_info = {
+ .name = TYPE_SMBUS_DEVICE,
+ .parent = TYPE_I2C_SLAVE,
+ .abstract = true,
+ .class_size = sizeof(SMBusDeviceClass),
+ .instance_size = sizeof(SMBusDevice),
+ };
+
+ type_register_static(&smbus_device_info);
+ }
+}
diff --git a/android/app/src/main/cpp/watchdog_stub.c b/android/app/src/main/cpp/watchdog_stub.c
new file mode 100644
index 0000000000..1e14a8ff2c
--- /dev/null
+++ b/android/app/src/main/cpp/watchdog_stub.c
@@ -0,0 +1,9 @@
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qapi/qapi-types-run-state.h"
+
+void qmp_watchdog_set_action(WatchdogAction action, Error **errp)
+{
+ (void)action;
+ error_setg(errp, "watchdog not supported on Android");
+}
diff --git a/android/app/src/main/cpp/xemu_android.cpp b/android/app/src/main/cpp/xemu_android.cpp
index 2aae3471e5..9ac791d30f 100644
--- a/android/app/src/main/cpp/xemu_android.cpp
+++ b/android/app/src/main/cpp/xemu_android.cpp
@@ -3,38 +3,479 @@
#include
#include
+#include
#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "xemu-settings.h"
namespace {
constexpr const char* kLogTag = "xemu-android";
-}
-
-extern "C" int xemu_android_main(int argc, char** argv) __attribute__((weak));
+constexpr const char* kPrefsName = "x1box_prefs";
static void LogInfo(const char* msg) {
__android_log_print(ANDROID_LOG_INFO, kLogTag, "%s", msg);
}
-extern "C" int SDL_main(int argc, char* argv[]) {
- if (xemu_android_main) {
- return xemu_android_main(argc, argv);
+static void LogInfoFmt(const char* fmt, const char* detail) {
+ __android_log_print(ANDROID_LOG_INFO, kLogTag, fmt, detail);
+}
+
+static void LogInfoInt(const char* fmt, int value) {
+ __android_log_print(ANDROID_LOG_INFO, kLogTag, fmt, value);
+}
+
+static void LogError(const char* msg) {
+ __android_log_print(ANDROID_LOG_ERROR, kLogTag, "%s", msg);
+}
+
+static void LogErrorInt(const char* fmt, int value) {
+ __android_log_print(ANDROID_LOG_ERROR, kLogTag, fmt, value);
+}
+
+static void LogErrorFmt(const char* fmt, const char* detail) {
+ __android_log_print(ANDROID_LOG_ERROR, kLogTag, fmt, detail);
+}
+
+static bool EnsureDirExists(const std::string& path) {
+ if (path.empty()) return false;
+ if (mkdir(path.c_str(), 0755) == 0) return true;
+ return errno == EEXIST;
+}
+
+static bool FileExists(const std::string& path) {
+ if (path.empty()) return false;
+ struct stat st {};
+ return stat(path.c_str(), &st) == 0;
+}
+
+static JNIEnv* GetEnv() {
+ return static_cast(SDL_AndroidGetJNIEnv());
+}
+
+static jobject GetActivity(JNIEnv* env) {
+ (void)env;
+ return reinterpret_cast(SDL_AndroidGetActivity());
+}
+
+static bool HasException(JNIEnv* env, const char* context) {
+ if (!env->ExceptionCheck()) return false;
+ env->ExceptionDescribe();
+ env->ExceptionClear();
+ LogErrorFmt("JNI exception in %s", context);
+ return true;
+}
+
+static std::string JStringToString(JNIEnv* env, jstring value) {
+ if (!value) return {};
+ const char* utf = env->GetStringUTFChars(value, nullptr);
+ if (!utf) return {};
+ std::string out(utf);
+ env->ReleaseStringUTFChars(value, utf);
+ return out;
+}
+
+static std::string GetPrefString(JNIEnv* env, jobject activity, const char* key) {
+ jclass activityClass = env->GetObjectClass(activity);
+ jmethodID getPrefs = env->GetMethodID(activityClass, "getSharedPreferences",
+ "(Ljava/lang/String;I)Landroid/content/SharedPreferences;");
+ if (!getPrefs) return {};
+ jstring prefsName = env->NewStringUTF(kPrefsName);
+ jobject prefs = env->CallObjectMethod(activity, getPrefs, prefsName, 0);
+ env->DeleteLocalRef(prefsName);
+ if (HasException(env, "getSharedPreferences") || !prefs) return {};
+
+ jclass prefsClass = env->GetObjectClass(prefs);
+ jmethodID getString = env->GetMethodID(
+ prefsClass, "getString", "(Ljava/lang/String;Ljava/lang/String;)Ljava/lang/String;");
+ if (!getString) return {};
+
+ jstring jkey = env->NewStringUTF(key);
+ jstring jdefault = nullptr;
+ jstring value = static_cast(env->CallObjectMethod(prefs, getString, jkey, jdefault));
+ env->DeleteLocalRef(jkey);
+ if (HasException(env, "SharedPreferences.getString")) return {};
+
+ std::string out = JStringToString(env, value);
+ if (value) env->DeleteLocalRef(value);
+ return out;
+}
+
+static bool CopyUriToPath(JNIEnv* env, jobject activity, const std::string& uriString, const std::string& path) {
+ if (uriString.empty() || path.empty()) return false;
+
+ jclass activityClass = env->GetObjectClass(activity);
+ jmethodID getContentResolver = env->GetMethodID(activityClass, "getContentResolver",
+ "()Landroid/content/ContentResolver;");
+ if (!getContentResolver) return false;
+ jobject resolver = env->CallObjectMethod(activity, getContentResolver);
+ if (HasException(env, "getContentResolver") || !resolver) return false;
+
+ jclass uriClass = env->FindClass("android/net/Uri");
+ jmethodID parse = env->GetStaticMethodID(uriClass, "parse", "(Ljava/lang/String;)Landroid/net/Uri;");
+ jstring juri = env->NewStringUTF(uriString.c_str());
+ jobject uri = env->CallStaticObjectMethod(uriClass, parse, juri);
+ env->DeleteLocalRef(juri);
+ if (HasException(env, "Uri.parse") || !uri) return false;
+
+ jclass resolverClass = env->GetObjectClass(resolver);
+ jmethodID openInputStream = env->GetMethodID(
+ resolverClass, "openInputStream", "(Landroid/net/Uri;)Ljava/io/InputStream;");
+ jobject inputStream = env->CallObjectMethod(resolver, openInputStream, uri);
+ if (HasException(env, "openInputStream") || !inputStream) return false;
+
+ jclass fosClass = env->FindClass("java/io/FileOutputStream");
+ jmethodID fosCtor = env->GetMethodID(fosClass, "", "(Ljava/lang/String;)V");
+ jstring jpath = env->NewStringUTF(path.c_str());
+ jobject outputStream = env->NewObject(fosClass, fosCtor, jpath);
+ env->DeleteLocalRef(jpath);
+ if (HasException(env, "FileOutputStream.") || !outputStream) return false;
+
+ jclass inputClass = env->GetObjectClass(inputStream);
+ jclass outputClass = env->GetObjectClass(outputStream);
+ jmethodID readMethod = env->GetMethodID(inputClass, "read", "([B)I");
+ jmethodID closeInput = env->GetMethodID(inputClass, "close", "()V");
+ jmethodID writeMethod = env->GetMethodID(outputClass, "write", "([BII)V");
+ jmethodID closeOutput = env->GetMethodID(outputClass, "close", "()V");
+ if (!readMethod || !writeMethod) return false;
+
+ const int kBufferSize = 64 * 1024;
+ jbyteArray buffer = env->NewByteArray(kBufferSize);
+ while (true) {
+ jint read = env->CallIntMethod(inputStream, readMethod, buffer);
+ if (HasException(env, "InputStream.read")) break;
+ if (read <= 0) break;
+ env->CallVoidMethod(outputStream, writeMethod, buffer, 0, read);
+ if (HasException(env, "OutputStream.write")) break;
+ }
+ env->DeleteLocalRef(buffer);
+ env->CallVoidMethod(inputStream, closeInput);
+ env->CallVoidMethod(outputStream, closeOutput);
+ HasException(env, "close streams");
+ return true;
+}
+
+struct SetupFiles {
+ std::string mcpx;
+ std::string flash;
+ std::string hdd;
+ std::string dvd;
+ std::string eeprom;
+ std::string config_path;
+};
+
+static bool WriteConfigToml(const std::string& config_path,
+ const std::string& mcpx,
+ const std::string& flash,
+ const std::string& hdd,
+ const std::string& dvd,
+ const std::string& eeprom) {
+ if (config_path.empty()) return false;
+ toml::table tbl;
+
+ if (FileExists(config_path)) {
+ try {
+ tbl = toml::parse_file(config_path);
+ } catch (const toml::parse_error&) {
+ // Ignore parse errors; we'll rewrite a clean config.
+ }
}
+ auto EnsureTable = [](toml::table& parent, std::string_view key) -> toml::table* {
+ if (auto* node = parent.get(key)) {
+ if (auto* existing = node->as_table()) {
+ return existing;
+ }
+ }
+ parent.insert_or_assign(key, toml::table{});
+ return parent.get(key)->as_table();
+ };
+
+ toml::table* general = EnsureTable(tbl, "general");
+ toml::table* display = EnsureTable(tbl, "display");
+ toml::table* android = EnsureTable(tbl, "android");
+ toml::table* sys = EnsureTable(tbl, "sys");
+ toml::table* files = EnsureTable(*sys, "files");
+ if (!general || !display || !android || !sys || !files) {
+ LogErrorFmt("Failed to build config tables at %s", config_path.c_str());
+ return false;
+ }
+
+ general->insert_or_assign("show_welcome", false);
+ display->insert_or_assign("renderer", "vulkan");
+ android->insert_or_assign("force_cpu_blit", false);
+
+ files->insert_or_assign("bootrom_path", mcpx);
+ files->insert_or_assign("flashrom_path", flash);
+ files->insert_or_assign("eeprom_path", eeprom);
+ files->insert_or_assign("hdd_path", hdd);
+ files->insert_or_assign("dvd_path", dvd);
+
+ std::ofstream out(config_path, std::ios::binary | std::ios::trunc);
+ if (!out.is_open()) {
+ LogErrorFmt("Failed to write config at %s", config_path.c_str());
+ return false;
+ }
+ out << tbl;
+ out.close();
+ return true;
+}
+
+static SetupFiles SyncSetupFiles() {
+ SetupFiles out{};
+ JNIEnv* env = GetEnv();
+ jobject activity = GetActivity(env);
+ if (!env || !activity) {
+ LogError("JNI environment not ready for setup sync");
+ return out;
+ }
+
+ LogInfo("SyncSetupFiles: start");
+ const char* basePath = SDL_AndroidGetInternalStoragePath();
+ int extState = SDL_AndroidGetExternalStorageState();
+ if (extState & SDL_ANDROID_EXTERNAL_STORAGE_WRITE) {
+ const char* external = SDL_AndroidGetExternalStoragePath();
+ if (external && external[0] != '\0') {
+ basePath = external;
+ }
+ }
+ if (!basePath || basePath[0] == '\0') {
+ LogError("Storage path not available");
+ return out;
+ }
+ LogInfoFmt("SyncSetupFiles: base path %s", basePath);
+
+ std::string base = std::string(basePath) + "/x1box";
+ EnsureDirExists(base);
+ out.eeprom = base + "/eeprom.bin";
+
+ const std::string mcpxPath = GetPrefString(env, activity, "mcpxPath");
+ const std::string flashPath = GetPrefString(env, activity, "flashPath");
+ const std::string hddPath = GetPrefString(env, activity, "hddPath");
+ const std::string dvdPath = GetPrefString(env, activity, "dvdPath");
+ const std::string mcpxUri = GetPrefString(env, activity, "mcpxUri");
+ const std::string flashUri = GetPrefString(env, activity, "flashUri");
+ const std::string hddUri = GetPrefString(env, activity, "hddUri");
+ const std::string dvdUri = GetPrefString(env, activity, "dvdUri");
+
+ LogInfoFmt("Prefs mcpxPath=%s", mcpxPath.c_str());
+ LogInfoFmt("Prefs flashPath=%s", flashPath.c_str());
+ LogInfoFmt("Prefs hddPath=%s", hddPath.c_str());
+ LogInfoFmt("Prefs dvdPath=%s", dvdPath.c_str());
+ LogInfoFmt("Prefs mcpxUri=%s", mcpxUri.c_str());
+ LogInfoFmt("Prefs flashUri=%s", flashUri.c_str());
+ LogInfoFmt("Prefs hddUri=%s", hddUri.c_str());
+ LogInfoFmt("Prefs dvdUri=%s", dvdUri.c_str());
+
+ if (!mcpxPath.empty() && FileExists(mcpxPath)) {
+ out.mcpx = mcpxPath;
+ }
+ if (out.mcpx.empty() && !mcpxUri.empty()) {
+ out.mcpx = base + "/mcpx.bin";
+ if (CopyUriToPath(env, activity, mcpxUri, out.mcpx)) {
+ LogInfo("MCPX ROM synced to app storage");
+ } else {
+ LogError("Failed to sync MCPX ROM");
+ }
+ }
+ if (!flashPath.empty() && FileExists(flashPath)) {
+ out.flash = flashPath;
+ }
+ if (out.flash.empty() && !flashUri.empty()) {
+ out.flash = base + "/flash.bin";
+ if (CopyUriToPath(env, activity, flashUri, out.flash)) {
+ LogInfo("Flash ROM synced to app storage");
+ } else {
+ LogError("Failed to sync flash ROM");
+ }
+ }
+ if (!hddPath.empty() && FileExists(hddPath)) {
+ out.hdd = hddPath;
+ }
+ if (out.hdd.empty() && !hddUri.empty()) {
+ out.hdd = base + "/hdd.img";
+ if (CopyUriToPath(env, activity, hddUri, out.hdd)) {
+ LogInfo("HDD image synced to app storage");
+ } else {
+ LogError("Failed to sync HDD image");
+ }
+ }
+
+ if (!dvdPath.empty() && FileExists(dvdPath)) {
+ out.dvd = dvdPath;
+ }
+ if (out.dvd.empty() && !dvdUri.empty()) {
+ out.dvd = base + "/dvd.iso";
+ if (CopyUriToPath(env, activity, dvdUri, out.dvd)) {
+ LogInfo("DVD image synced to app storage");
+ } else {
+ LogError("Failed to sync DVD image");
+ }
+ }
+
+ out.config_path = base + "/xemu.toml";
+ WriteConfigToml(out.config_path, out.mcpx, out.flash, out.hdd, out.dvd, out.eeprom);
+ LogInfoFmt("SyncSetupFiles: config %s", out.config_path.c_str());
+ LogInfoFmt("Resolved mcpx=%s", out.mcpx.c_str());
+ LogInfoFmt("Resolved flash=%s", out.flash.c_str());
+ LogInfoFmt("Resolved hdd=%s", out.hdd.c_str());
+ LogInfoFmt("Resolved dvd=%s", out.dvd.c_str());
+ LogInfoFmt("Resolved eeprom=%s", out.eeprom.c_str());
+ return out;
+}
+}
+
+extern "C" int xemu_android_main(int argc, char** argv);
+extern "C" void qemu_init(int argc, char** argv);
+extern "C" int (*qemu_main)(void);
+extern "C" void xemu_android_display_preinit(void);
+extern "C" void xemu_android_display_wait_ready(void);
+extern "C" void xemu_android_display_loop(void);
+
+struct QemuLaunchContext {
+ int argc;
+ char** argv;
+};
+
+static int SDLCALL QemuThreadMain(void* data) {
+ auto* ctx = static_cast(data);
+ LogInfoInt("QemuThreadMain: show_welcome=%d", g_config.general.show_welcome ? 1 : 0);
+ LogInfoFmt("QemuThreadMain: bootrom=%s", g_config.sys.files.bootrom_path ? g_config.sys.files.bootrom_path : "(null)");
+ LogInfo("QemuThreadMain: starting");
+ return xemu_android_main(ctx->argc, ctx->argv);
+}
+
+extern "C" int xemu_android_main(int argc, char** argv) {
+ if (!qemu_main) {
+ LogError("xemu core not linked; qemu_main missing");
+ return 1;
+ }
+ LogInfo("xemu_android_main: qemu_init");
+ qemu_init(argc, argv);
+ LogInfo("xemu_android_main: qemu_main");
+ int rc = qemu_main();
+ LogErrorInt("xemu_android_main: qemu_main returned %d", rc);
+ return rc;
+}
+
+extern "C" int SDL_main(int argc, char* argv[]) {
(void)argc;
(void)argv;
+ LogInfo("SDL_main: start");
SDL_SetHint(SDL_HINT_ORIENTATIONS, "LandscapeLeft LandscapeRight");
SDL_DisableScreenSaver();
- if (SDL_Init(SDL_INIT_VIDEO | SDL_INIT_AUDIO | SDL_INIT_GAMECONTROLLER) != 0) {
+ if (SDL_Init(SDL_INIT_VIDEO | SDL_INIT_GAMECONTROLLER) != 0) {
__android_log_print(ANDROID_LOG_ERROR, kLogTag, "SDL_Init failed: %s", SDL_GetError());
return 1;
}
+ SetupFiles setup = SyncSetupFiles();
+
+ if (!setup.config_path.empty()) {
+ LogInfo("SDL_main: loading config");
+ xemu_settings_set_path(setup.config_path.c_str());
+ if (!xemu_settings_load()) {
+ const char* err = xemu_settings_get_error_message();
+ if (!err) {
+ err = "Failed to load config file";
+ }
+ LogError(err);
+ SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_ERROR,
+ "Failed to load xemu config file",
+ err,
+ nullptr);
+ SDL_Quit();
+ return 1;
+ }
+ LogInfo("SDL_main: config loaded");
+ LogInfoInt("Config show_welcome=%d", g_config.general.show_welcome ? 1 : 0);
+ LogInfoFmt("Config bootrom=%s", g_config.sys.files.bootrom_path ? g_config.sys.files.bootrom_path : "(null)");
+ LogInfoFmt("Config flashrom=%s", g_config.sys.files.flashrom_path ? g_config.sys.files.flashrom_path : "(null)");
+ LogInfoFmt("Config hdd=%s", g_config.sys.files.hdd_path ? g_config.sys.files.hdd_path : "(null)");
+ LogInfoFmt("Config dvd=%s", g_config.sys.files.dvd_path ? g_config.sys.files.dvd_path : "(null)");
+ LogInfoFmt("Config eeprom=%s", g_config.sys.files.eeprom_path ? g_config.sys.files.eeprom_path : "(null)");
+
+ // Ensure config strings are non-null and aligned with Android setup paths.
+ if (!setup.mcpx.empty()) {
+ xemu_settings_set_string(&g_config.sys.files.bootrom_path, setup.mcpx.c_str());
+ } else if (!g_config.sys.files.bootrom_path) {
+ xemu_settings_set_string(&g_config.sys.files.bootrom_path, "");
+ }
+ if (!setup.flash.empty()) {
+ xemu_settings_set_string(&g_config.sys.files.flashrom_path, setup.flash.c_str());
+ } else if (!g_config.sys.files.flashrom_path) {
+ xemu_settings_set_string(&g_config.sys.files.flashrom_path, "");
+ }
+ if (!setup.hdd.empty()) {
+ xemu_settings_set_string(&g_config.sys.files.hdd_path, setup.hdd.c_str());
+ } else if (!g_config.sys.files.hdd_path) {
+ xemu_settings_set_string(&g_config.sys.files.hdd_path, "");
+ }
+ if (!setup.dvd.empty()) {
+ xemu_settings_set_string(&g_config.sys.files.dvd_path, setup.dvd.c_str());
+ } else if (!g_config.sys.files.dvd_path) {
+ xemu_settings_set_string(&g_config.sys.files.dvd_path, "");
+ }
+ if (!setup.eeprom.empty()) {
+ xemu_settings_set_string(&g_config.sys.files.eeprom_path, setup.eeprom.c_str());
+ } else if (!g_config.sys.files.eeprom_path) {
+ xemu_settings_set_string(&g_config.sys.files.eeprom_path, "");
+ }
+ g_config.display.renderer = CONFIG_DISPLAY_RENDERER_VULKAN;
+ setenv("XEMU_ANDROID_FORCE_CPU_BLIT", "0", 1);
+ g_config.general.show_welcome = false;
+ g_config.perf.cache_shaders = false;
+ LogInfoInt("Config final show_welcome=%d", g_config.general.show_welcome ? 1 : 0);
+ LogInfoInt("Config final cache_shaders=%d", g_config.perf.cache_shaders ? 1 : 0);
+ LogInfoInt("Config final renderer=%d", (int)g_config.display.renderer);
+ LogInfoFmt("Config final bootrom=%s", g_config.sys.files.bootrom_path ? g_config.sys.files.bootrom_path : "(null)");
+ LogInfoFmt("Config final flashrom=%s", g_config.sys.files.flashrom_path ? g_config.sys.files.flashrom_path : "(null)");
+ LogInfoFmt("Config final hdd=%s", g_config.sys.files.hdd_path ? g_config.sys.files.hdd_path : "(null)");
+ LogInfoFmt("Config final dvd=%s", g_config.sys.files.dvd_path ? g_config.sys.files.dvd_path : "(null)");
+ LogInfoFmt("Config final eeprom=%s", g_config.sys.files.eeprom_path ? g_config.sys.files.eeprom_path : "(null)");
+
+ std::vector arg_storage;
+ arg_storage.emplace_back("xemu");
+
+ std::vector xemu_argv;
+ xemu_argv.reserve(arg_storage.size() + 1);
+ for (auto& arg : arg_storage) {
+ xemu_argv.push_back(const_cast(arg.c_str()));
+ }
+ xemu_argv.push_back(nullptr);
+ LogInfo("SDL_main: launching xemu core");
+ xemu_android_display_preinit();
+
+ QemuLaunchContext launch_ctx{
+ static_cast(arg_storage.size()),
+ xemu_argv.data(),
+ };
+ SDL_Thread* qemu_thread = SDL_CreateThread(QemuThreadMain, "qemu_main", &launch_ctx);
+ if (!qemu_thread) {
+ LogErrorFmt("Failed to start xemu thread: %s", SDL_GetError());
+ return 1;
+ }
+ LogInfo("SDL_main: qemu thread started");
+ (void)qemu_thread;
+ xemu_android_display_wait_ready();
+ LogInfo("SDL_main: display ready, entering render loop");
+ xemu_android_display_loop();
+ return 0;
+ }
+
SDL_GL_SetAttribute(SDL_GL_CONTEXT_PROFILE_MASK, SDL_GL_CONTEXT_PROFILE_ES);
SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 3);
- SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 0);
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 2);
SDL_GL_SetAttribute(SDL_GL_DOUBLEBUFFER, 1);
SDL_GL_SetAttribute(SDL_GL_DEPTH_SIZE, 24);
SDL_GL_SetAttribute(SDL_GL_STENCIL_SIZE, 8);
diff --git a/android/app/src/main/cpp/xemu_hud_stub.c b/android/app/src/main/cpp/xemu_hud_stub.c
new file mode 100644
index 0000000000..d05bd2293e
--- /dev/null
+++ b/android/app/src/main/cpp/xemu_hud_stub.c
@@ -0,0 +1,37 @@
+#include "qemu/osdep.h"
+#include "xui/xemu-hud.h"
+
+void xemu_hud_init(SDL_Window *window, void *sdl_gl_context)
+{
+ (void)window;
+ (void)sdl_gl_context;
+}
+
+void xemu_hud_cleanup(void)
+{
+}
+
+void xemu_hud_render(void)
+{
+}
+
+void xemu_hud_process_sdl_events(SDL_Event *event)
+{
+ (void)event;
+}
+
+void xemu_hud_should_capture_kbd_mouse(int *kbd, int *mouse)
+{
+ if (kbd) {
+ *kbd = 0;
+ }
+ if (mouse) {
+ *mouse = 0;
+ }
+}
+
+void xemu_hud_set_framebuffer_texture(GLuint tex, bool flip)
+{
+ (void)tex;
+ (void)flip;
+}
diff --git a/android/app/src/main/cpp/xemu_net_stub.c b/android/app/src/main/cpp/xemu_net_stub.c
new file mode 100644
index 0000000000..ca8440e5d3
--- /dev/null
+++ b/android/app/src/main/cpp/xemu_net_stub.c
@@ -0,0 +1,18 @@
+#include "qemu/osdep.h"
+#include "xemu-net.h"
+#include "xemu-settings.h"
+
+void xemu_net_enable(void)
+{
+ g_config.net.enable = true;
+}
+
+void xemu_net_disable(void)
+{
+ g_config.net.enable = false;
+}
+
+int xemu_net_is_enabled(void)
+{
+ return g_config.net.enable ? 1 : 0;
+}
diff --git a/android/app/src/main/cpp/xemu_notifications_stub.c b/android/app/src/main/cpp/xemu_notifications_stub.c
new file mode 100644
index 0000000000..4756ee4709
--- /dev/null
+++ b/android/app/src/main/cpp/xemu_notifications_stub.c
@@ -0,0 +1,15 @@
+#include
+
+void xemu_queue_notification(const char *msg)
+{
+ if (msg) {
+ fprintf(stderr, "[xemu] %s\n", msg);
+ }
+}
+
+void xemu_queue_error_message(const char *msg)
+{
+ if (msg) {
+ fprintf(stderr, "[xemu][error] %s\n", msg);
+ }
+}
diff --git a/android/app/src/main/cpp/xemu_os_utils_android.c b/android/app/src/main/cpp/xemu_os_utils_android.c
new file mode 100644
index 0000000000..e5f4e47696
--- /dev/null
+++ b/android/app/src/main/cpp/xemu_os_utils_android.c
@@ -0,0 +1,7 @@
+#include "qemu/osdep.h"
+#include "xemu-os-utils.h"
+
+const char *xemu_get_os_info(void)
+{
+ return "Android";
+}
diff --git a/android/app/src/main/cpp/xemu_settings_android.cc b/android/app/src/main/cpp/xemu_settings_android.cc
new file mode 100644
index 0000000000..4a03430349
--- /dev/null
+++ b/android/app/src/main/cpp/xemu_settings_android.cc
@@ -0,0 +1,299 @@
+#include "qemu/osdep.h"
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "xemu-settings.h"
+
+struct config g_config;
+
+static const char *settings_path;
+static const char *filename = "xemu.toml";
+static std::string error_msg;
+
+static char *xemu_strdup_or_null(const char *value)
+{
+ if (!value || *value == '\0') {
+ return NULL;
+ }
+ return strdup(value);
+}
+
+static void xemu_settings_apply_defaults(void)
+{
+ memset(&g_config, 0, sizeof(g_config));
+
+ g_config.general.show_welcome = true;
+ g_config.general.updates.check = true;
+ g_config.general.skip_boot_anim = false;
+ g_config.general.last_viewed_menu_index = 0;
+
+ g_config.input.auto_bind = true;
+ g_config.input.allow_vibration = true;
+ g_config.input.background_input_capture = false;
+ g_config.input.keyboard_controller_scancode_map.a = 4;
+ g_config.input.keyboard_controller_scancode_map.b = 5;
+ g_config.input.keyboard_controller_scancode_map.x = 27;
+ g_config.input.keyboard_controller_scancode_map.y = 28;
+ g_config.input.keyboard_controller_scancode_map.dpad_left = 80;
+ g_config.input.keyboard_controller_scancode_map.dpad_up = 82;
+ g_config.input.keyboard_controller_scancode_map.dpad_right = 79;
+ g_config.input.keyboard_controller_scancode_map.dpad_down = 81;
+ g_config.input.keyboard_controller_scancode_map.back = 42;
+ g_config.input.keyboard_controller_scancode_map.start = 40;
+ g_config.input.keyboard_controller_scancode_map.white = 30;
+ g_config.input.keyboard_controller_scancode_map.black = 31;
+ g_config.input.keyboard_controller_scancode_map.lstick_btn = 32;
+ g_config.input.keyboard_controller_scancode_map.rstick_btn = 33;
+ g_config.input.keyboard_controller_scancode_map.guide = 34;
+ g_config.input.keyboard_controller_scancode_map.lstick_up = 8;
+ g_config.input.keyboard_controller_scancode_map.lstick_left = 22;
+ g_config.input.keyboard_controller_scancode_map.lstick_right = 9;
+ g_config.input.keyboard_controller_scancode_map.lstick_down = 7;
+ g_config.input.keyboard_controller_scancode_map.ltrigger = 26;
+ g_config.input.keyboard_controller_scancode_map.rstick_up = 12;
+ g_config.input.keyboard_controller_scancode_map.rstick_left = 13;
+ g_config.input.keyboard_controller_scancode_map.rstick_right = 15;
+ g_config.input.keyboard_controller_scancode_map.rstick_down = 14;
+ g_config.input.keyboard_controller_scancode_map.rtrigger = 18;
+
+ g_config.display.renderer = CONFIG_DISPLAY_RENDERER_VULKAN;
+ g_config.display.filtering = CONFIG_DISPLAY_FILTERING_LINEAR;
+ g_config.display.quality.surface_scale = 1;
+ g_config.display.window.fullscreen_on_startup = false;
+ g_config.display.window.fullscreen_exclusive = false;
+ g_config.display.window.startup_size =
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_1280X960;
+ g_config.display.window.last_width = 640;
+ g_config.display.window.last_height = 480;
+ g_config.display.window.vsync = true;
+ g_config.display.ui.show_menubar = true;
+ g_config.display.ui.show_notifications = true;
+ g_config.display.ui.hide_cursor = true;
+ g_config.display.ui.use_animations = true;
+ g_config.display.ui.fit = CONFIG_DISPLAY_UI_FIT_SCALE;
+ g_config.display.ui.aspect_ratio = CONFIG_DISPLAY_UI_ASPECT_RATIO_AUTO;
+ g_config.display.ui.scale = 1;
+ g_config.display.ui.auto_scale = true;
+ g_config.display.setup_nvidia_profile = true;
+
+ g_config.audio.vp.num_workers = 0;
+ g_config.audio.use_dsp = false;
+ g_config.audio.hrtf = true;
+ g_config.audio.volume_limit = 1.0;
+
+ g_config.net.enable = false;
+ g_config.net.backend = CONFIG_NET_BACKEND_NAT;
+ g_config.net.udp.bind_addr = xemu_strdup_or_null("0.0.0.0:9368");
+ g_config.net.udp.remote_addr = xemu_strdup_or_null("1.2.3.4:9368");
+
+ g_config.sys.mem_limit = CONFIG_SYS_MEM_LIMIT_64;
+ g_config.sys.avpack = CONFIG_SYS_AVPACK_HDTV;
+
+ g_config.perf.hard_fpu = true;
+ g_config.perf.cache_shaders = true;
+}
+
+static std::string to_lower(std::string value)
+{
+ std::transform(value.begin(), value.end(), value.begin(),
+ [](unsigned char c) { return (char)std::tolower(c); });
+ return value;
+}
+
+static bool parse_renderer(const std::string &value, CONFIG_DISPLAY_RENDERER *out)
+{
+ std::string lowered = to_lower(value);
+ if (lowered == "opengl" || lowered == "gl") {
+ *out = CONFIG_DISPLAY_RENDERER_OPENGL;
+ return true;
+ }
+ if (lowered == "vulkan" || lowered == "vk") {
+ *out = CONFIG_DISPLAY_RENDERER_VULKAN;
+ return true;
+ }
+ if (lowered == "null" || lowered == "none") {
+ *out = CONFIG_DISPLAY_RENDERER_NULL;
+ return true;
+ }
+ return false;
+}
+
+const char *xemu_settings_get_error_message(void)
+{
+ return error_msg.empty() ? NULL : error_msg.c_str();
+}
+
+void xemu_settings_set_path(const char *path)
+{
+ if (settings_path) {
+ return;
+ }
+ settings_path = path;
+}
+
+const char *xemu_settings_get_base_path(void)
+{
+ static const char *base_path = NULL;
+ if (base_path) {
+ return base_path;
+ }
+
+ char *base = SDL_GetPrefPath("xemu", "xemu");
+ if (!base) {
+ base = SDL_GetBasePath();
+ }
+ base_path = base ? strdup(base) : strdup("");
+ SDL_free(base);
+ return base_path;
+}
+
+const char *xemu_settings_get_path(void)
+{
+ if (settings_path != NULL) {
+ return settings_path;
+ }
+
+ const char *base = xemu_settings_get_base_path();
+ settings_path = g_strdup_printf("%s%s", base, filename);
+ return settings_path;
+}
+
+const char *xemu_settings_get_default_eeprom_path(void)
+{
+ static char *eeprom_path = NULL;
+ if (eeprom_path != NULL) {
+ return eeprom_path;
+ }
+
+ const char *base = xemu_settings_get_base_path();
+ eeprom_path = g_strdup_printf("%s%s", base, "eeprom.bin");
+ return eeprom_path;
+}
+
+bool xemu_settings_load(void)
+{
+ xemu_settings_apply_defaults();
+ error_msg.clear();
+ setenv("XEMU_ANDROID_FORCE_CPU_BLIT", "0", 1);
+
+ const char *path = xemu_settings_get_path();
+ if (!path || *path == '\0') {
+ g_config.display.renderer = CONFIG_DISPLAY_RENDERER_VULKAN;
+ return true;
+ }
+
+ if (qemu_access(path, F_OK) == -1) {
+ g_config.display.renderer = CONFIG_DISPLAY_RENDERER_VULKAN;
+ return true;
+ }
+
+ try {
+ toml::table tbl = toml::parse_file(path);
+
+ if (auto show_welcome = tbl["general"]["show_welcome"].value()) {
+ g_config.general.show_welcome = *show_welcome;
+ }
+
+ if (auto renderer = tbl["display"]["renderer"].value()) {
+ CONFIG_DISPLAY_RENDERER parsed;
+ if (parse_renderer(*renderer, &parsed)) {
+ (void)parsed;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "Config display.renderer=%s (Android forces Vulkan)",
+ renderer->c_str());
+ } else {
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "Unknown display.renderer='%s'",
+ renderer->c_str());
+ }
+ }
+
+ if (auto force_cpu = tbl["android"]["force_cpu_blit"].value()) {
+ if (*force_cpu) {
+ setenv("XEMU_ANDROID_FORCE_CPU_BLIT", "0", 1);
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "Config android.force_cpu_blit=1 ignored on Android");
+ } else {
+ setenv("XEMU_ANDROID_FORCE_CPU_BLIT", "0", 1);
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "Config android.force_cpu_blit=0");
+ }
+ }
+ if (auto egl_offscreen = tbl["android"]["egl_offscreen"].value()) {
+ if (!*egl_offscreen) {
+ setenv("XEMU_ANDROID_EGL_OFFSCREEN", "0", 1);
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "Config android.egl_offscreen=0");
+ }
+ }
+
+ if (auto bootrom = tbl["sys"]["files"]["bootrom_path"].value()) {
+ xemu_settings_set_string(&g_config.sys.files.bootrom_path, bootrom->c_str());
+ }
+ if (auto flashrom = tbl["sys"]["files"]["flashrom_path"].value()) {
+ xemu_settings_set_string(&g_config.sys.files.flashrom_path, flashrom->c_str());
+ }
+ if (auto hdd = tbl["sys"]["files"]["hdd_path"].value()) {
+ xemu_settings_set_string(&g_config.sys.files.hdd_path, hdd->c_str());
+ }
+ if (auto dvd = tbl["sys"]["files"]["dvd_path"].value()) {
+ xemu_settings_set_string(&g_config.sys.files.dvd_path, dvd->c_str());
+ }
+ if (auto eeprom = tbl["sys"]["files"]["eeprom_path"].value()) {
+ xemu_settings_set_string(&g_config.sys.files.eeprom_path, eeprom->c_str());
+ }
+ } catch (const toml::parse_error &err) {
+ std::ostringstream oss;
+ oss << "Error parsing config file at " << err.source().begin << ":\n"
+ << " " << err.description() << "\n";
+ error_msg = oss.str();
+ return false;
+ }
+ g_config.display.renderer = CONFIG_DISPLAY_RENDERER_VULKAN;
+ return true;
+}
+
+void xemu_settings_save(void)
+{
+}
+
+void add_net_nat_forward_ports(int host, int guest,
+ CONFIG_NET_NAT_FORWARD_PORTS_PROTOCOL protocol)
+{
+ (void)host;
+ (void)guest;
+ (void)protocol;
+}
+
+void remove_net_nat_forward_ports(unsigned int index)
+{
+ (void)index;
+}
+
+bool xemu_settings_load_gamepad_mapping(const char *guid,
+ GamepadMappings **mapping)
+{
+ (void)guid;
+ *mapping = NULL;
+ return true;
+}
+
+void xemu_settings_reset_controller_mapping(const char *guid)
+{
+ (void)guid;
+}
+
+void xemu_settings_reset_keyboard_mapping(void)
+{
+}
diff --git a/android/app/src/main/cpp/xemu_snapshots_stub.c b/android/app/src/main/cpp/xemu_snapshots_stub.c
new file mode 100644
index 0000000000..68cbad544c
--- /dev/null
+++ b/android/app/src/main/cpp/xemu_snapshots_stub.c
@@ -0,0 +1,83 @@
+#include "ui/xemu-snapshots.h"
+#include "qapi/error.h"
+
+const char **g_snapshot_shortcut_index_key_map[] = { NULL };
+
+char *xemu_get_currently_loaded_disc_path(void)
+{
+ return NULL;
+}
+
+int xemu_snapshots_list(QEMUSnapshotInfo **info, XemuSnapshotData **extra_data,
+ Error **err)
+{
+ (void)err;
+ if (info) {
+ *info = NULL;
+ }
+ if (extra_data) {
+ *extra_data = NULL;
+ }
+ return 0;
+}
+
+void xemu_snapshots_load(const char *vm_name, Error **err)
+{
+ (void)vm_name;
+ if (err) {
+ *err = NULL;
+ }
+}
+
+void xemu_snapshots_save(const char *vm_name, Error **err)
+{
+ (void)vm_name;
+ if (err) {
+ *err = NULL;
+ }
+}
+
+void xemu_snapshots_delete(const char *vm_name, Error **err)
+{
+ (void)vm_name;
+ if (err) {
+ *err = NULL;
+ }
+}
+
+void xemu_snapshots_save_extra_data(QEMUFile *f)
+{
+ (void)f;
+}
+
+bool xemu_snapshots_offset_extra_data(QEMUFile *f)
+{
+ (void)f;
+ return false;
+}
+
+void xemu_snapshots_mark_dirty(void)
+{
+}
+
+void xemu_snapshots_set_framebuffer_texture(GLuint tex, bool flip)
+{
+ (void)tex;
+ (void)flip;
+}
+
+bool xemu_snapshots_load_png_to_texture(GLuint tex, void *buf, size_t size)
+{
+ (void)tex;
+ (void)buf;
+ (void)size;
+ return false;
+}
+
+void *xemu_snapshots_create_framebuffer_thumbnail_png(size_t *size)
+{
+ if (size) {
+ *size = 0;
+ }
+ return NULL;
+}
diff --git a/android/app/src/main/java/com/izzy2lost/x1box/LauncherActivity.kt b/android/app/src/main/java/com/izzy2lost/x1box/LauncherActivity.kt
new file mode 100644
index 0000000000..226b21244e
--- /dev/null
+++ b/android/app/src/main/java/com/izzy2lost/x1box/LauncherActivity.kt
@@ -0,0 +1,101 @@
+package com.izzy2lost.x1box
+
+import android.app.Activity
+import android.content.Intent
+import android.net.Uri
+import android.os.Bundle
+import java.io.File
+
+class LauncherActivity : Activity() {
+ override fun onCreate(savedInstanceState: Bundle?) {
+ super.onCreate(savedInstanceState)
+
+ val prefs = getSharedPreferences("x1box_prefs", MODE_PRIVATE)
+ var setupComplete = prefs.getBoolean("setup_complete", false)
+ val mcpxUriStr = prefs.getString("mcpxUri", null)
+ val flashUriStr = prefs.getString("flashUri", null)
+ val hddUriStr = prefs.getString("hddUri", null)
+ val dvdUriStr = prefs.getString("dvdUri", null)
+ val mcpxPath = prefs.getString("mcpxPath", null)
+ val flashPath = prefs.getString("flashPath", null)
+ val hddPath = prefs.getString("hddPath", null)
+ val dvdPath = prefs.getString("dvdPath", null)
+ val skipGamePicker = prefs.getBoolean("skip_game_picker", false)
+
+ val mcpxUri = mcpxUriStr?.let(Uri::parse)
+ val flashUri = flashUriStr?.let(Uri::parse)
+ val hddUri = hddUriStr?.let(Uri::parse)
+ val dvdUri = dvdUriStr?.let(Uri::parse)
+
+ val hasMcpx = hasLocalFile(mcpxPath) || (mcpxUri != null && hasPersistedReadPermission(mcpxUri))
+ val hasFlash = hasLocalFile(flashPath) || (flashUri != null && hasPersistedReadPermission(flashUri))
+ val hasHdd = hasLocalFile(hddPath) || (hddUri != null && hasPersistedReadPermission(hddUri))
+ val hasDvd = hasLocalFile(dvdPath) || (dvdUri != null && hasPersistedReadPermission(dvdUri))
+
+ val editor = prefs.edit()
+ var clearedCore = false
+ var clearedOptional = false
+ if (!hasMcpx && mcpxUriStr != null) {
+ editor.remove("mcpxUri")
+ clearedCore = true
+ }
+ if (!hasFlash && flashUriStr != null) {
+ editor.remove("flashUri")
+ clearedCore = true
+ }
+ if (!hasHdd && hddUriStr != null) {
+ editor.remove("hddUri")
+ clearedCore = true
+ }
+ if (!hasDvd && dvdUriStr != null) {
+ editor.remove("dvdUri")
+ clearedOptional = true
+ }
+ if (!hasMcpx && mcpxPath != null) {
+ editor.remove("mcpxPath")
+ clearedCore = true
+ }
+ if (!hasFlash && flashPath != null) {
+ editor.remove("flashPath")
+ clearedCore = true
+ }
+ if (!hasHdd && hddPath != null) {
+ editor.remove("hddPath")
+ clearedCore = true
+ }
+ if (!hasDvd && dvdPath != null) {
+ editor.remove("dvdPath")
+ clearedOptional = true
+ }
+ if (clearedCore) {
+ setupComplete = false
+ editor.putBoolean("setup_complete", false)
+ editor.putBoolean("skip_game_picker", false)
+ editor.apply()
+ } else if (clearedOptional) {
+ editor.apply()
+ }
+
+ val needsSetup = !setupComplete || !hasMcpx || !hasFlash || !hasHdd
+ val needsGamePicker = !skipGamePicker && !hasDvd
+ val next =
+ if (needsSetup || needsGamePicker) {
+ SetupWizardActivity::class.java
+ } else {
+ MainActivity::class.java
+ }
+
+ startActivity(Intent(this, next))
+ finish()
+ }
+
+ private fun hasPersistedReadPermission(uri: Uri): Boolean {
+ return contentResolver.persistedUriPermissions.any { perm ->
+ perm.uri == uri && perm.isReadPermission
+ }
+ }
+
+ private fun hasLocalFile(path: String?): Boolean {
+ return path != null && File(path).isFile
+ }
+}
diff --git a/android/app/src/main/java/com/izzy2lost/x1box/MainActivity.kt b/android/app/src/main/java/com/izzy2lost/x1box/MainActivity.kt
index 5248309a0d..afb47292d0 100644
--- a/android/app/src/main/java/com/izzy2lost/x1box/MainActivity.kt
+++ b/android/app/src/main/java/com/izzy2lost/x1box/MainActivity.kt
@@ -1,23 +1,10 @@
package com.izzy2lost.x1box
-import android.content.Intent
import android.os.Bundle
import org.libsdl.app.SDLActivity
class MainActivity : SDLActivity() {
override fun onCreate(savedInstanceState: Bundle?) {
- val prefs = getSharedPreferences("x1box_prefs", MODE_PRIVATE)
- val setupComplete = prefs.getBoolean("setup_complete", false)
- val hasMcpx = prefs.getString("mcpxUri", null) != null
- val hasFlash = prefs.getString("flashUri", null) != null
- val hasHdd = prefs.getString("hddUri", null) != null
-
- if (!setupComplete || !hasMcpx || !hasFlash || !hasHdd) {
- startActivity(Intent(this, SetupWizardActivity::class.java))
- finish()
- return
- }
-
super.onCreate(savedInstanceState)
}
diff --git a/android/app/src/main/java/com/izzy2lost/x1box/SetupWizardActivity.kt b/android/app/src/main/java/com/izzy2lost/x1box/SetupWizardActivity.kt
index 7b1fe7ceb1..c99ef843cb 100644
--- a/android/app/src/main/java/com/izzy2lost/x1box/SetupWizardActivity.kt
+++ b/android/app/src/main/java/com/izzy2lost/x1box/SetupWizardActivity.kt
@@ -3,6 +3,7 @@ package com.izzy2lost.x1box
import android.content.Intent
import android.net.Uri
import android.os.Bundle
+import android.util.Log
import android.view.View
import android.widget.TextView
import android.widget.Toast
@@ -10,6 +11,9 @@ import androidx.activity.OnBackPressedCallback
import androidx.activity.result.contract.ActivityResultContracts
import androidx.appcompat.app.AppCompatActivity
import com.google.android.material.button.MaterialButton
+import java.io.File
+import java.io.FileOutputStream
+import java.io.IOException
class SetupWizardActivity : AppCompatActivity() {
private val prefs by lazy { getSharedPreferences("x1box_prefs", MODE_PRIVATE) }
@@ -17,23 +21,41 @@ class SetupWizardActivity : AppCompatActivity() {
private lateinit var pageMcpx: View
private lateinit var pageFlash: View
private lateinit var pageHdd: View
+ private lateinit var pageDisc: View
+ private lateinit var pages: List
private lateinit var mcpxPathText: TextView
private lateinit var flashPathText: TextView
private lateinit var hddPathText: TextView
+ private lateinit var discPathText: TextView
private lateinit var btnBack: MaterialButton
private lateinit var btnNext: MaterialButton
private lateinit var indicatorMcpx: View
private lateinit var indicatorFlash: View
private lateinit var indicatorHdd: View
+ private lateinit var indicatorDisc: View
+ private lateinit var indicators: List
private var mcpxUri: Uri? = null
private var flashUri: Uri? = null
private var hddUri: Uri? = null
+ private var dvdUri: Uri? = null
+ private var mcpxPath: String? = null
+ private var flashPath: String? = null
+ private var hddPath: String? = null
+ private var dvdPath: String? = null
private var currentStep = 0
+ private var isCopying = false
private val mcpxExts = setOf("bin", "rom", "img")
private val flashExts = setOf("bin", "rom", "img")
private val hddExts = setOf("qcow2", "img")
+ private val discExts = setOf("iso", "xiso", "cso", "cci")
+ private val discMimes = setOf(
+ "application/x-iso9660-image",
+ "application/x-cd-image",
+ "application/x-iso9660",
+ "application/vnd.iso-image"
+ )
private val pickMcpx =
registerForActivityResult(ActivityResultContracts.OpenDocument()) { uri ->
@@ -45,8 +67,16 @@ class SetupWizardActivity : AppCompatActivity() {
persistUriPermission(uri)
mcpxUri = uri
prefs.edit().putString("mcpxUri", uri.toString()).apply()
- updateMcpxSelection()
- updateButtons()
+ copyUriAsync(uri, "mcpx.bin") { path ->
+ if (path != null) {
+ mcpxPath = path
+ prefs.edit().putString("mcpxPath", path).apply()
+ } else {
+ Toast.makeText(this, "Failed to copy MCPX ROM", Toast.LENGTH_LONG).show()
+ }
+ updateMcpxSelection()
+ updateButtons()
+ }
}
}
@@ -60,8 +90,16 @@ class SetupWizardActivity : AppCompatActivity() {
persistUriPermission(uri)
flashUri = uri
prefs.edit().putString("flashUri", uri.toString()).apply()
- updateFlashSelection()
- updateButtons()
+ copyUriAsync(uri, "flash.bin") { path ->
+ if (path != null) {
+ flashPath = path
+ prefs.edit().putString("flashPath", path).apply()
+ } else {
+ Toast.makeText(this, "Failed to copy flash ROM", Toast.LENGTH_LONG).show()
+ }
+ updateFlashSelection()
+ updateButtons()
+ }
}
}
@@ -75,19 +113,57 @@ class SetupWizardActivity : AppCompatActivity() {
persistUriPermission(uri)
hddUri = uri
prefs.edit().putString("hddUri", uri.toString()).apply()
- updateHddSelection()
- updateButtons()
+ copyUriAsync(uri, "hdd.img") { path ->
+ if (path != null) {
+ hddPath = path
+ prefs.edit().putString("hddPath", path).apply()
+ } else {
+ Toast.makeText(this, "Failed to copy HDD image", Toast.LENGTH_LONG).show()
+ }
+ updateHddSelection()
+ updateButtons()
+ }
+ }
+ }
+
+ private val pickDisc =
+ registerForActivityResult(ActivityResultContracts.OpenDocument()) { uri ->
+ if (uri != null) {
+ if (!isAllowedFile(uri, discExts, discMimes)) {
+ showExtensionError(discExts)
+ return@registerForActivityResult
+ }
+ persistUriPermission(uri)
+ dvdUri = uri
+ prefs.edit().putString("dvdUri", uri.toString()).apply()
+ copyUriAsync(uri, "dvd.iso") { path ->
+ if (path != null) {
+ dvdPath = path
+ prefs.edit().putString("dvdPath", path).apply()
+ } else {
+ Toast.makeText(this, "Failed to copy game disc image", Toast.LENGTH_LONG).show()
+ }
+ updateDiscSelection()
+ updateButtons()
+ }
}
}
override fun onCreate(savedInstanceState: Bundle?) {
super.onCreate(savedInstanceState)
+ mcpxPath = loadLocalPath("mcpxPath")
+ flashPath = loadLocalPath("flashPath")
+ hddPath = loadLocalPath("hddPath")
+ dvdPath = loadLocalPath("dvdPath")
mcpxUri = prefs.getString("mcpxUri", null)?.let(Uri::parse)
flashUri = prefs.getString("flashUri", null)?.let(Uri::parse)
hddUri = prefs.getString("hddUri", null)?.let(Uri::parse)
+ dvdUri = prefs.getString("dvdUri", null)?.let(Uri::parse)
- if (prefs.getBoolean("setup_complete", false) && mcpxUri != null && flashUri != null && hddUri != null) {
+ val coreReady = isFileReady(mcpxPath) && isFileReady(flashPath) && isFileReady(hddPath)
+ val discReady = isFileReady(dvdPath)
+ if (prefs.getBoolean("setup_complete", false) && coreReady && discReady) {
goToMain()
return
}
@@ -106,26 +182,33 @@ class SetupWizardActivity : AppCompatActivity() {
pageMcpx = findViewById(R.id.page_mcpx)
pageFlash = findViewById(R.id.page_flash)
pageHdd = findViewById(R.id.page_hdd)
+ pageDisc = findViewById(R.id.page_disc)
+ pages = listOf(pageMcpx, pageFlash, pageHdd, pageDisc)
mcpxPathText = findViewById(R.id.mcpx_path_text)
flashPathText = findViewById(R.id.flash_path_text)
hddPathText = findViewById(R.id.hdd_path_text)
+ discPathText = findViewById(R.id.disc_path_text)
btnBack = findViewById(R.id.btn_wizard_back)
btnNext = findViewById(R.id.btn_wizard_next)
indicatorMcpx = findViewById(R.id.step_indicator_mcpx)
indicatorFlash = findViewById(R.id.step_indicator_flash)
indicatorHdd = findViewById(R.id.step_indicator_hdd)
+ indicatorDisc = findViewById(R.id.step_indicator_disc)
+ indicators = listOf(indicatorMcpx, indicatorFlash, indicatorHdd, indicatorDisc)
val btnPickMcpx: MaterialButton = findViewById(R.id.btn_pick_mcpx)
val btnPickFlash: MaterialButton = findViewById(R.id.btn_pick_flash)
val btnPickHdd: MaterialButton = findViewById(R.id.btn_pick_hdd)
+ val btnPickDisc: MaterialButton = findViewById(R.id.btn_pick_disc)
btnPickMcpx.setOnClickListener { pickMcpx.launch(arrayOf("application/octet-stream")) }
btnPickFlash.setOnClickListener { pickFlash.launch(arrayOf("application/octet-stream")) }
btnPickHdd.setOnClickListener { pickHdd.launch(arrayOf("application/x-qcow2", "application/octet-stream")) }
+ btnPickDisc.setOnClickListener { pickDisc.launch(arrayOf("*/*")) }
btnBack.setOnClickListener { showStep(currentStep - 1) }
btnNext.setOnClickListener {
- if (currentStep < 2) {
+ if (currentStep < pages.size - 1) {
showStep(currentStep + 1)
} else {
finishSetup()
@@ -148,58 +231,77 @@ class SetupWizardActivity : AppCompatActivity() {
updateMcpxSelection()
updateFlashSelection()
updateHddSelection()
+ updateDiscSelection()
- showStep(0)
+ val startStep = if (coreReady && !discReady) pages.size - 1 else 0
+ showStep(startStep)
}
private fun showStep(step: Int) {
- currentStep = step.coerceIn(0, 2)
- pageMcpx.visibility = if (currentStep == 0) View.VISIBLE else View.GONE
- pageFlash.visibility = if (currentStep == 1) View.VISIBLE else View.GONE
- pageHdd.visibility = if (currentStep == 2) View.VISIBLE else View.GONE
-
- indicatorMcpx.setBackgroundResource(
- if (currentStep == 0) R.drawable.setup_wizard_indicator_active else R.drawable.setup_wizard_indicator_inactive
- )
- indicatorFlash.setBackgroundResource(
- if (currentStep == 1) R.drawable.setup_wizard_indicator_active else R.drawable.setup_wizard_indicator_inactive
- )
- indicatorHdd.setBackgroundResource(
- if (currentStep == 2) R.drawable.setup_wizard_indicator_active else R.drawable.setup_wizard_indicator_inactive
- )
+ val lastIndex = (pages.size - 1).coerceAtLeast(0)
+ currentStep = step.coerceIn(0, lastIndex)
+ pages.forEachIndexed { index, view ->
+ view.visibility = if (currentStep == index) View.VISIBLE else View.GONE
+ }
+ indicators.forEachIndexed { index, view ->
+ view.setBackgroundResource(
+ if (currentStep == index) {
+ R.drawable.setup_wizard_indicator_active
+ } else {
+ R.drawable.setup_wizard_indicator_inactive
+ }
+ )
+ }
updateButtons()
}
private fun updateButtons() {
btnBack.visibility = if (currentStep == 0) View.INVISIBLE else View.VISIBLE
- btnNext.text = getString(if (currentStep == 2) R.string.setup_finish else R.string.setup_next)
+ btnNext.text =
+ getString(if (currentStep == pages.size - 1) R.string.setup_finish else R.string.setup_next)
+ if (isCopying) {
+ btnNext.isEnabled = false
+ btnBack.isEnabled = false
+ return
+ }
+ btnBack.isEnabled = true
btnNext.isEnabled =
when (currentStep) {
- 0 -> mcpxUri != null
- 1 -> flashUri != null
- else -> hddUri != null
+ 0 -> isFileReady(mcpxPath)
+ 1 -> isFileReady(flashPath)
+ 2 -> isFileReady(hddPath)
+ else -> true
}
}
private fun updateMcpxSelection() {
- val value = mcpxUri?.toString() ?: getString(R.string.setup_not_set)
+ val value = mcpxPath ?: mcpxUri?.toString() ?: getString(R.string.setup_not_set)
mcpxPathText.text = getString(R.string.setup_mcpx_value, value)
}
private fun updateFlashSelection() {
- val value = flashUri?.toString() ?: getString(R.string.setup_not_set)
+ val value = flashPath ?: flashUri?.toString() ?: getString(R.string.setup_not_set)
flashPathText.text = getString(R.string.setup_flash_value, value)
}
private fun updateHddSelection() {
- val value = hddUri?.toString() ?: getString(R.string.setup_not_set)
+ val value = hddPath ?: hddUri?.toString() ?: getString(R.string.setup_not_set)
hddPathText.text = getString(R.string.setup_hdd_value, value)
}
+ private fun updateDiscSelection() {
+ val value = dvdPath ?: dvdUri?.toString() ?: getString(R.string.setup_not_set)
+ discPathText.text = getString(R.string.setup_disc_value, value)
+ }
+
private fun finishSetup() {
- prefs.edit().putBoolean("setup_complete", true).apply()
+ val skipGamePicker = !isFileReady(dvdPath)
+ prefs.edit()
+ .putBoolean("setup_complete", true)
+ .putBoolean("skip_game_picker", skipGamePicker)
+ .apply()
goToMain()
}
@@ -216,14 +318,73 @@ class SetupWizardActivity : AppCompatActivity() {
}
}
+ private fun loadLocalPath(key: String): String? {
+ val path = prefs.getString(key, null) ?: return null
+ if (!File(path).isFile) {
+ prefs.edit().remove(key).apply()
+ return null
+ }
+ return path
+ }
+
+ private fun isFileReady(path: String?): Boolean {
+ return path != null && File(path).isFile
+ }
+
+ private fun copyUriAsync(uri: Uri, destName: String, onDone: (String?) -> Unit) {
+ if (isCopying) return
+ isCopying = true
+ updateButtons()
+ Toast.makeText(this, "Copying file...", Toast.LENGTH_SHORT).show()
+ Thread {
+ val path = copyUriToAppStorage(uri, destName)
+ runOnUiThread {
+ isCopying = false
+ onDone(path)
+ }
+ }.start()
+ }
+
+ private fun copyUriToAppStorage(uri: Uri, destName: String): String? {
+ val base = getExternalFilesDir(null) ?: filesDir
+ val dir = File(base, "x1box")
+ if (!dir.exists() && !dir.mkdirs()) {
+ Log.e("xemu-android", "Failed to create ${dir.absolutePath}")
+ return null
+ }
+ val target = File(dir, destName)
+ return try {
+ contentResolver.openInputStream(uri)?.use { input ->
+ FileOutputStream(target).use { output ->
+ input.copyTo(output)
+ }
+ } ?: return null
+ target.absolutePath
+ } catch (e: IOException) {
+ Log.e("xemu-android", "Copy failed for $destName", e)
+ null
+ }
+ }
+
private fun isAllowedExtension(uri: Uri, allowed: Set): Boolean {
+ return isAllowedFile(uri, allowed, emptySet())
+ }
+
+ private fun isAllowedFile(uri: Uri, allowedExts: Set, allowedMimes: Set): Boolean {
val name = contentResolver.query(uri, null, null, null, null)?.use { cursor ->
val nameIndex = cursor.getColumnIndex(android.provider.OpenableColumns.DISPLAY_NAME)
if (nameIndex >= 0 && cursor.moveToFirst()) cursor.getString(nameIndex) else null
} ?: uri.lastPathSegment
- val ext = name?.substringAfterLast('.', "")?.lowercase().orEmpty()
- if (ext.isEmpty()) return false
- return allowed.contains(ext)
+ val lowerName = name?.lowercase().orEmpty()
+ if (lowerName.endsWith(".xiso.iso")) return true
+ val ext = lowerName.substringAfterLast('.', "")
+ if (ext.isNotEmpty() && allowedExts.contains(ext)) return true
+ val mime = contentResolver.getType(uri)?.lowercase()
+ if (mime != null) {
+ if (allowedMimes.contains(mime)) return true
+ if (mime.startsWith("application/x-iso")) return true
+ }
+ return false
}
private fun showExtensionError(allowed: Set) {
diff --git a/android/app/src/main/res/layout/activity_setup_wizard.xml b/android/app/src/main/res/layout/activity_setup_wizard.xml
index 1736492b3f..daf036c788 100644
--- a/android/app/src/main/res/layout/activity_setup_wizard.xml
+++ b/android/app/src/main/res/layout/activity_setup_wizard.xml
@@ -229,6 +229,61 @@
android:textAppearance="@style/TextAppearance.Material3.BodySmall"
android:textColor="@color/xemu_text_muted" />
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Choose your Xbox hard disk image.
Choose Hard Disk
Hard Disk: %1$s
+
+ Game Disc (Optional)
+ Choose an Xbox game disc image to boot.
+ Choose Game Disc
+ Game Disc: %1$s
diff --git a/android/gradle.properties b/android/gradle.properties
index c4d0de912e..adab58750b 100644
--- a/android/gradle.properties
+++ b/android/gradle.properties
@@ -1,3 +1,6 @@
-org.gradle.jvmargs=-Xmx4g -Dfile.encoding=UTF-8
+org.gradle.jvmargs=-Xmx512m -Dfile.encoding=UTF-8
+org.gradle.java.home=C:\\Program Files\\Zulu\\zulu-21
+org.gradle.workers.max=1
+org.gradle.parallel=false
android.useAndroidX=true
kotlin.code.style=official
diff --git a/audio/noaudio.c b/audio/noaudio.c
index 4ed9d2156c..959dac2f23 100644
--- a/audio/noaudio.c
+++ b/audio/noaudio.c
@@ -143,3 +143,9 @@ static void register_audio_none(void)
audio_driver_register(&no_audio_driver);
}
type_init(register_audio_none);
+
+#ifdef __ANDROID__
+void xemu_android_force_noaudio_link(void)
+{
+}
+#endif
diff --git a/audio/sdlaudio.c b/audio/sdlaudio.c
index 707110973a..c7235f9029 100644
--- a/audio/sdlaudio.c
+++ b/audio/sdlaudio.c
@@ -496,3 +496,9 @@ static void register_audio_sdl(void)
audio_driver_register(&sdl_audio_driver);
}
type_init(register_audio_sdl);
+
+#ifdef __ANDROID__
+void xemu_android_force_sdlaudio_link(void)
+{
+}
+#endif
diff --git a/backends/hostmem-ram.c b/backends/hostmem-ram.c
index 062b1abb11..df1895f47e 100644
--- a/backends/hostmem-ram.c
+++ b/backends/hostmem-ram.c
@@ -56,3 +56,9 @@ static void register_types(void)
}
type_init(register_types);
+
+#ifdef __ANDROID__
+void xemu_android_force_mem_backend_ram_link(void)
+{
+}
+#endif
diff --git a/block/file-posix.c b/block/file-posix.c
index 6265d2e248..cfda3ee1c4 100644
--- a/block/file-posix.c
+++ b/block/file-posix.c
@@ -23,6 +23,9 @@
*/
#include "qemu/osdep.h"
+#ifdef __ANDROID__
+#include
+#endif
#include "qapi/error.h"
#include "qemu/cutils.h"
#include "qemu/error-report.h"
diff --git a/block/module_block.h b/block/module_block.h
new file mode 100644
index 0000000000..c4a0afe92d
--- /dev/null
+++ b/block/module_block.h
@@ -0,0 +1,13 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef QEMU_MODULE_BLOCK_H
+#define QEMU_MODULE_BLOCK_H
+
+static const struct {
+ const char *format_name;
+ const char *protocol_name;
+ const char *library_name;
+} block_driver_modules[] = {
+ /* empty: no loadable block modules on Android build */
+};
+
+#endif
\ No newline at end of file
diff --git a/chardev/char-null.c b/chardev/char-null.c
index 89cb85da79..cbb37ad7dd 100644
--- a/chardev/char-null.c
+++ b/chardev/char-null.c
@@ -54,3 +54,9 @@ static void register_types(void)
}
type_init(register_types);
+
+#ifdef __ANDROID__
+void xemu_android_force_char_null_link(void)
+{
+}
+#endif
diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
index 5b2fc06e58..e4fb918dff 100644
--- a/gdbstub/gdbstub.c
+++ b/gdbstub/gdbstub.c
@@ -490,7 +490,11 @@ const GDBFeature *gdb_find_static_feature(const char *xmlname)
}
}
+#ifdef __ANDROID__
+ return NULL;
+#else
g_assert_not_reached();
+#endif
}
GArray *gdb_get_register_list(CPUState *cpu)
@@ -590,10 +594,12 @@ void gdb_init_cpu(CPUState *cpu)
if (xmlfile) {
feature = gdb_find_static_feature(xmlfile);
- gdb_register_feature(cpu, 0,
- cc->gdb_read_register, cc->gdb_write_register,
- feature);
- cpu->gdb_num_regs = cpu->gdb_num_g_regs = feature->num_regs;
+ if (feature) {
+ gdb_register_feature(cpu, 0,
+ cc->gdb_read_register, cc->gdb_write_register,
+ feature);
+ cpu->gdb_num_regs = cpu->gdb_num_g_regs = feature->num_regs;
+ }
}
if (cc->gdb_num_core_regs) {
diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c
index 916c56fa4c..2dd38dec09 100644
--- a/hw/audio/pcspk.c
+++ b/hw/audio/pcspk.c
@@ -253,3 +253,9 @@ static void pcspk_register(void)
type_register_static(&pcspk_info);
}
type_init(pcspk_register)
+
+#ifdef __ANDROID__
+void xemu_android_force_pcspk_link(void)
+{
+}
+#endif
diff --git a/hw/ide/ide-dev.c b/hw/ide/ide-dev.c
index c0bfb6e2bd..e758bde20f 100644
--- a/hw/ide/ide-dev.c
+++ b/hw/ide/ide-dev.c
@@ -267,3 +267,9 @@ static void ide_register_types(void)
}
type_init(ide_register_types)
+
+#ifdef __ANDROID__
+void xemu_android_force_ide_dev_link(void)
+{
+}
+#endif
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index d07202437a..e3f85aa998 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -236,3 +236,9 @@ static void piix_ide_register_types(void)
}
type_init(piix_ide_register_types)
+
+#ifdef __ANDROID__
+void xemu_android_force_piix_ide_link(void)
+{
+}
+#endif
diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
index ba71c5069f..771e07b1bb 100644
--- a/hw/misc/pci-testdev.c
+++ b/hw/misc/pci-testdev.c
@@ -365,3 +365,9 @@ static void pci_testdev_register_types(void)
}
type_init(pci_testdev_register_types)
+
+#ifdef __ANDROID__
+void xemu_android_force_pci_testdev_link(void)
+{
+}
+#endif
diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c
index 7033ebf50d..4025d781c7 100644
--- a/hw/timer/i8254.c
+++ b/hw/timer/i8254.c
@@ -383,3 +383,9 @@ static void pit_register_types(void)
}
type_init(pit_register_types)
+
+#ifdef __ANDROID__
+void xemu_android_force_i8254_link(void)
+{
+}
+#endif
diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c
index b9276c4011..c01f911c06 100644
--- a/hw/usb/dev-hub.c
+++ b/hw/usb/dev-hub.c
@@ -709,3 +709,9 @@ static void usb_hub_register_types(void)
}
type_init(usb_hub_register_types)
+
+#ifdef __ANDROID__
+void xemu_android_force_usb_hub_link(void)
+{
+}
+#endif
diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c
index e62a5fd60b..87a67fb20a 100644
--- a/hw/usb/hcd-ohci-pci.c
+++ b/hw/usb/hcd-ohci-pci.c
@@ -171,3 +171,9 @@ static void ohci_pci_register_types(void)
}
type_init(ohci_pci_register_types)
+
+#ifdef __ANDROID__
+void xemu_android_force_ohci_pci_link(void)
+{
+}
+#endif
diff --git a/hw/xbox/mcpx/aci.c b/hw/xbox/mcpx/aci.c
index 861e06ce08..56d6ed4abe 100644
--- a/hw/xbox/mcpx/aci.c
+++ b/hw/xbox/mcpx/aci.c
@@ -111,3 +111,9 @@ static void mcpx_aci_register(void)
}
type_init(mcpx_aci_register);
+
+#ifdef __ANDROID__
+void xemu_android_force_mcpx_aci_link(void)
+{
+}
+#endif
diff --git a/hw/xbox/mcpx/nvnet/nvnet.c b/hw/xbox/mcpx/nvnet/nvnet.c
index 67c533ddf9..76013e2b3e 100644
--- a/hw/xbox/mcpx/nvnet/nvnet.c
+++ b/hw/xbox/mcpx/nvnet/nvnet.c
@@ -1091,3 +1091,9 @@ static void nvnet_register(void)
}
type_init(nvnet_register)
+
+#ifdef __ANDROID__
+void xemu_android_force_nvnet_link(void)
+{
+}
+#endif
diff --git a/hw/xbox/nv2a/nv2a.h b/hw/xbox/nv2a/nv2a.h
index 2a9b7312d4..4157138677 100644
--- a/hw/xbox/nv2a/nv2a.h
+++ b/hw/xbox/nv2a/nv2a.h
@@ -23,6 +23,11 @@
void nv2a_init(PCIBus *bus, int devfn, MemoryRegion *ram);
void nv2a_context_init(void);
+#ifdef __ANDROID__
+void nv2a_android_early_context_init(void);
+bool nv2a_android_copy_readback(uint8_t **buffer, size_t *buffer_size,
+ int *width, int *height);
+#endif
int nv2a_get_framebuffer_surface(void);
void nv2a_release_framebuffer_surface(void);
void nv2a_set_surface_scale_factor(unsigned int scale);
diff --git a/hw/xbox/nv2a/pgraph/gl/constants.h b/hw/xbox/nv2a/pgraph/gl/constants.h
index e3e78df8d1..ac9e4e781e 100644
--- a/hw/xbox/nv2a/pgraph/gl/constants.h
+++ b/hw/xbox/nv2a/pgraph/gl/constants.h
@@ -26,6 +26,20 @@
#include "hw/xbox/nv2a/nv2a_regs.h"
#include "gloffscreen.h"
+#ifdef __ANDROID__
+#define NV2A_GL_UNSIGNED_INT_8_8_8_8 GL_UNSIGNED_BYTE
+#define NV2A_GL_UNSIGNED_INT_8_8_8_8_REV GL_UNSIGNED_BYTE
+#define NV2A_GL_Z16_INTERNAL GL_DEPTH_COMPONENT16
+#define NV2A_GL_Z16_TYPE GL_UNSIGNED_SHORT
+#define NV2A_GL_Z16_FLOAT_TYPE GL_UNSIGNED_SHORT
+#else
+#define NV2A_GL_UNSIGNED_INT_8_8_8_8 GL_UNSIGNED_INT_8_8_8_8
+#define NV2A_GL_UNSIGNED_INT_8_8_8_8_REV GL_UNSIGNED_INT_8_8_8_8_REV
+#define NV2A_GL_Z16_INTERNAL GL_DEPTH_COMPONENT32F
+#define NV2A_GL_Z16_TYPE GL_HALF_FLOAT
+#define NV2A_GL_Z16_FLOAT_TYPE GL_HALF_FLOAT
+#endif
+
static const GLenum pgraph_texture_min_filter_gl_map[] = {
0,
GL_NEAREST,
@@ -171,13 +185,13 @@ static const ColorFormatInfo kelvin_color_format_gl_map[66] = {
[NV097_SET_TEXTURE_FORMAT_COLOR_SZ_R5G6B5] =
{2, false, GL_RGB565, GL_RGB, GL_UNSIGNED_SHORT_5_6_5},
[NV097_SET_TEXTURE_FORMAT_COLOR_SZ_A8R8G8B8] =
- {4, false, GL_RGBA8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {4, false, GL_RGBA8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_SZ_X8R8G8B8] =
- {4, false, GL_RGB8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {4, false, GL_RGB8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
/* paletted texture */
[NV097_SET_TEXTURE_FORMAT_COLOR_SZ_I8_A8R8G8B8] =
- {1, false, GL_RGBA8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {1, false, GL_RGBA8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_L_DXT1_A1R5G5B5] =
{4, false, GL_COMPRESSED_RGBA_S3TC_DXT1_EXT, 0, GL_RGBA},
@@ -190,7 +204,7 @@ static const ColorFormatInfo kelvin_color_format_gl_map[66] = {
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_R5G6B5] =
{2, true, GL_RGB565, GL_RGB, GL_UNSIGNED_SHORT_5_6_5},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_A8R8G8B8] =
- {4, true, GL_RGBA8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {4, true, GL_RGBA8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_Y8] =
{1, true, GL_R8, GL_RED, GL_UNSIGNED_BYTE,
{GL_RED, GL_RED, GL_RED, GL_ONE}},
@@ -213,7 +227,7 @@ static const ColorFormatInfo kelvin_color_format_gl_map[66] = {
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_A4R4G4B4] =
{2, true, GL_RGBA4, GL_BGRA, GL_UNSIGNED_SHORT_4_4_4_4_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_X8R8G8B8] =
- {4, true, GL_RGB8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {4, true, GL_RGB8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_A8] =
{1, true, GL_R8, GL_RED, GL_UNSIGNED_BYTE,
{GL_ONE, GL_ONE, GL_ONE, GL_RED}},
@@ -231,9 +245,9 @@ static const ColorFormatInfo kelvin_color_format_gl_map[66] = {
{GL_GREEN, GL_RED, GL_RED, GL_GREEN}},
[NV097_SET_TEXTURE_FORMAT_COLOR_LC_IMAGE_CR8YB8CB8YA8] =
- {2, true, GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {2, true, GL_RGBA8, GL_RGBA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_LC_IMAGE_YB8CR8YA8CB8] =
- {2, true, GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {2, true, GL_RGBA8, GL_RGBA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
/* Additional information is passed to the pixel shader via the swizzle:
* RED: The depth value.
@@ -254,26 +268,26 @@ static const ColorFormatInfo kelvin_color_format_gl_map[66] = {
{2, true, GL_DEPTH_COMPONENT16, GL_DEPTH_COMPONENT, GL_UNSIGNED_SHORT,
{GL_RED, GL_ZERO, GL_ZERO, GL_ZERO}, true},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_DEPTH_Y16_FLOAT] =
- {2, true, GL_DEPTH_COMPONENT16, GL_DEPTH_COMPONENT, GL_HALF_FLOAT,
+ {2, true, GL_DEPTH_COMPONENT16, GL_DEPTH_COMPONENT, NV2A_GL_Z16_FLOAT_TYPE,
{GL_RED, GL_ZERO, GL_ONE, GL_ZERO}, true},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_Y16] =
{2, true, GL_R16, GL_RED, GL_UNSIGNED_SHORT,
{GL_RED, GL_RED, GL_RED, GL_ONE}},
[NV097_SET_TEXTURE_FORMAT_COLOR_SZ_A8B8G8R8] =
- {4, false, GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {4, false, GL_RGBA8, GL_RGBA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_SZ_B8G8R8A8] =
- {4, false, GL_RGBA8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8},
+ {4, false, GL_RGBA8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8},
[NV097_SET_TEXTURE_FORMAT_COLOR_SZ_R8G8B8A8] =
- {4, false, GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8},
+ {4, false, GL_RGBA8, GL_RGBA, NV2A_GL_UNSIGNED_INT_8_8_8_8},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_A8B8G8R8] =
- {4, true, GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV},
+ {4, true, GL_RGBA8, GL_RGBA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_B8G8R8A8] =
- {4, true, GL_RGBA8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8},
+ {4, true, GL_RGBA8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8},
[NV097_SET_TEXTURE_FORMAT_COLOR_LU_IMAGE_R8G8B8A8] =
- {4, true, GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8}
+ {4, true, GL_RGBA8, GL_RGBA, NV2A_GL_UNSIGNED_INT_8_8_8_8}
};
typedef struct SurfaceFormatInfo {
@@ -290,9 +304,9 @@ static const SurfaceFormatInfo kelvin_surface_color_format_gl_map[] = {
[NV097_SET_SURFACE_FORMAT_COLOR_LE_R5G6B5] =
{2, GL_RGB565, GL_RGB, GL_UNSIGNED_SHORT_5_6_5, GL_COLOR_ATTACHMENT0},
[NV097_SET_SURFACE_FORMAT_COLOR_LE_X8R8G8B8_Z8R8G8B8] =
- {4, GL_RGBA8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, GL_COLOR_ATTACHMENT0},
+ {4, GL_RGBA8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV, GL_COLOR_ATTACHMENT0},
[NV097_SET_SURFACE_FORMAT_COLOR_LE_A8R8G8B8] =
- {4, GL_RGBA8, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, GL_COLOR_ATTACHMENT0},
+ {4, GL_RGBA8, GL_BGRA, NV2A_GL_UNSIGNED_INT_8_8_8_8_REV, GL_COLOR_ATTACHMENT0},
// FIXME: Map channel color
[NV097_SET_SURFACE_FORMAT_COLOR_LE_B8] =
@@ -303,7 +317,7 @@ static const SurfaceFormatInfo kelvin_surface_color_format_gl_map[] = {
static const SurfaceFormatInfo kelvin_surface_zeta_float_format_gl_map[] = {
[NV097_SET_SURFACE_FORMAT_ZETA_Z16] =
- {2, GL_DEPTH_COMPONENT32F, GL_DEPTH_COMPONENT, GL_HALF_FLOAT, GL_DEPTH_ATTACHMENT},
+ {2, NV2A_GL_Z16_INTERNAL, GL_DEPTH_COMPONENT, NV2A_GL_Z16_TYPE, GL_DEPTH_ATTACHMENT},
[NV097_SET_SURFACE_FORMAT_ZETA_Z24S8] =
/* FIXME: GL does not support packing floating-point Z24S8 OOTB, so for
* now just emulate this with fixed-point Z24S8. Possible compat
@@ -320,3 +334,5 @@ static const SurfaceFormatInfo kelvin_surface_zeta_fixed_format_gl_map[] = {
};
#endif
+
+
diff --git a/hw/xbox/nv2a/pgraph/gl/display.c b/hw/xbox/nv2a/pgraph/gl/display.c
index fafcd72061..1987884b7a 100644
--- a/hw/xbox/nv2a/pgraph/gl/display.c
+++ b/hw/xbox/nv2a/pgraph/gl/display.c
@@ -27,12 +27,189 @@
#include
+#ifdef __ANDROID__
+#include
+#include "qemu/thread.h"
+#include
+#include "system/memory.h"
+#endif
+
+#ifdef __ANDROID__
+static void check_gl_error_android(const char *context)
+{
+ GLenum err;
+ int count = 0;
+ while ((err = glGetError()) != GL_NO_ERROR) {
+ fprintf(stderr, "GL error 0x%X in %s\n", err, context);
+ if (++count >= 10) {
+ break;
+ }
+ }
+}
+#define GL_ASSERT_NO_ERROR(context) check_gl_error_android(context)
+#else
+#define GL_ASSERT_NO_ERROR(context) assert(glGetError() == GL_NO_ERROR)
+#endif
+
+#ifdef __ANDROID__
+static QemuMutex g_android_readback_mutex;
+static bool g_android_readback_mutex_init = false;
+static uint8_t *g_android_readback_buf = NULL;
+static size_t g_android_readback_size = 0;
+static int g_android_readback_w = 0;
+static int g_android_readback_h = 0;
+static bool g_android_readback_ready = false;
+
+static bool android_force_cpu_blit(void)
+{
+ static int cached = -1;
+ if (cached < 0) {
+ const char *env = getenv("XEMU_ANDROID_FORCE_CPU_BLIT");
+ if (!env) {
+ cached = 1;
+ } else if (!strcmp(env, "1") || !strcmp(env, "true") ||
+ !strcmp(env, "TRUE")) {
+ cached = 1;
+ } else {
+ cached = 0;
+ }
+ }
+ return cached == 1;
+}
+
+static bool android_readback_is_black(const uint8_t *buf, size_t size,
+ int width, int height)
+{
+ if (!buf || size < 4 || width <= 0 || height <= 0) {
+ return false;
+ }
+ size_t tl_off = 0;
+ size_t mid_off = ((size_t)(height / 2) * (size_t)width +
+ (size_t)(width / 2)) * 4;
+ size_t br_off = ((size_t)(height - 1) * (size_t)width +
+ (size_t)(width - 1)) * 4;
+ uint32_t tl = 0, mid = 0, br = 0;
+ if (tl_off + 4 <= size) {
+ memcpy(&tl, buf + tl_off, sizeof(tl));
+ }
+ if (mid_off + 4 <= size) {
+ memcpy(&mid, buf + mid_off, sizeof(mid));
+ }
+ if (br_off + 4 <= size) {
+ memcpy(&br, buf + br_off, sizeof(br));
+ }
+ bool black_tl = (tl == 0x00000000u || tl == 0xff000000u);
+ bool black_mid = (mid == 0x00000000u || mid == 0xff000000u);
+ bool black_br = (br == 0x00000000u || br == 0xff000000u);
+ return black_tl && black_mid && black_br;
+}
+
+static void android_store_readback(NV2AState *d, SurfaceBinding *surface,
+ int width, int height)
+{
+ if (width <= 0 || height <= 0) {
+ return;
+ }
+ if (!g_android_readback_mutex_init) {
+ qemu_mutex_init(&g_android_readback_mutex);
+ g_android_readback_mutex_init = true;
+ }
+ size_t needed = (size_t)width * (size_t)height * 4;
+ qemu_mutex_lock(&g_android_readback_mutex);
+ if (needed > g_android_readback_size) {
+ g_android_readback_buf = g_realloc(g_android_readback_buf, needed);
+ g_android_readback_size = needed;
+ }
+ glPixelStorei(GL_PACK_ALIGNMENT, 1);
+ glReadPixels(0, 0, width, height, GL_RGBA, GL_UNSIGNED_BYTE,
+ g_android_readback_buf);
+ glPixelStorei(GL_PACK_ALIGNMENT, 4);
+ bool display_black = android_readback_is_black(
+ g_android_readback_buf, g_android_readback_size, width, height);
+ bool used_surface = false;
+ if (display_black && d && surface && surface->gl_buffer) {
+ PGRAPHState *pg = &d->pgraph;
+ PGRAPHGLState *r = pg->gl_renderer_state;
+ unsigned int surf_w = surface->width;
+ unsigned int surf_h = surface->height;
+ pgraph_apply_scaling_factor(pg, &surf_w, &surf_h);
+ if (surf_w > 0 && surf_h > 0) {
+ size_t surf_needed = (size_t)surf_w * (size_t)surf_h * 4;
+ if (surf_needed > g_android_readback_size) {
+ g_android_readback_buf = g_realloc(g_android_readback_buf,
+ surf_needed);
+ g_android_readback_size = surf_needed;
+ }
+ GLint prev_fbo = 0;
+ glGetIntegerv(GL_FRAMEBUFFER_BINDING, &prev_fbo);
+ glBindFramebuffer(GL_FRAMEBUFFER, r->disp_rndr.fbo);
+ glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
+ GL_TEXTURE_2D, surface->gl_buffer, 0);
+ glPixelStorei(GL_PACK_ALIGNMENT, 1);
+ glReadPixels(0, 0, surf_w, surf_h, GL_RGBA, GL_UNSIGNED_BYTE,
+ g_android_readback_buf);
+ glPixelStorei(GL_PACK_ALIGNMENT, 4);
+ glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
+ GL_TEXTURE_2D, r->gl_display_buffer, 0);
+ glBindFramebuffer(GL_FRAMEBUFFER, prev_fbo);
+ g_android_readback_w = (int)surf_w;
+ g_android_readback_h = (int)surf_h;
+ used_surface = true;
+ static unsigned int surf_log = 0;
+ if ((surf_log++ % 120) == 0) {
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "android readback: display black, using surface vram=0x%x size=%ux%u",
+ (unsigned)surface->vram_addr,
+ surf_w, surf_h);
+ }
+ }
+ }
+ if (!used_surface) {
+ g_android_readback_w = width;
+ g_android_readback_h = height;
+ }
+ g_android_readback_ready = true;
+ qemu_mutex_unlock(&g_android_readback_mutex);
+}
+
+bool nv2a_android_copy_readback(uint8_t **buffer, size_t *buffer_size,
+ int *width, int *height)
+{
+ if (!android_force_cpu_blit()) {
+ return false;
+ }
+ if (!g_android_readback_mutex_init || !g_android_readback_ready) {
+ return false;
+ }
+ qemu_mutex_lock(&g_android_readback_mutex);
+ size_t needed = (size_t)g_android_readback_w * (size_t)g_android_readback_h * 4;
+ if (!g_android_readback_buf || needed == 0) {
+ qemu_mutex_unlock(&g_android_readback_mutex);
+ return false;
+ }
+ if (*buffer_size < needed) {
+ *buffer = g_realloc(*buffer, needed);
+ *buffer_size = needed;
+ }
+ memcpy(*buffer, g_android_readback_buf, needed);
+ *width = g_android_readback_w;
+ *height = g_android_readback_h;
+ qemu_mutex_unlock(&g_android_readback_mutex);
+ return true;
+}
+
+#endif
+
void pgraph_gl_init_display(NV2AState *d)
{
struct PGRAPHState *pg = &d->pgraph;
PGRAPHGLState *r = pg->gl_renderer_state;
+#ifdef __ANDROID__
+ glo_set_current(g_nv2a_context_render);
+#else
glo_set_current(g_nv2a_context_display);
+#endif
glGenTextures(1, &r->gl_display_buffer);
r->gl_display_buffer_internal_format = 0;
@@ -42,7 +219,12 @@ void pgraph_gl_init_display(NV2AState *d)
r->gl_display_buffer_type = 0;
const char *vs =
+#ifdef __ANDROID__
+ "#version 300 es\n"
+ "precision highp float;\n"
+#else
"#version 330\n"
+#endif
"void main()\n"
"{\n"
" float x = -1.0 + float((gl_VertexID & 1) << 2);\n"
@@ -52,7 +234,13 @@ void pgraph_gl_init_display(NV2AState *d)
/* FIXME: improve interlace handling, pvideo */
const char *fs =
+#ifdef __ANDROID__
+ "#version 300 es\n"
+ "precision highp float;\n"
+ "precision highp int;\n"
+#else
"#version 330\n"
+#endif
"uniform sampler2D tex;\n"
"uniform bool pvideo_enable;\n"
"uniform sampler2D pvideo_tex;\n"
@@ -63,12 +251,22 @@ void pgraph_gl_init_display(NV2AState *d)
"uniform vec3 pvideo_color_key;\n"
"uniform vec2 display_size;\n"
"uniform float line_offset;\n"
+ "uniform bool clip_enable;\n"
+ "uniform vec4 clip_rect;\n"
"layout(location = 0) out vec4 out_Color;\n"
"void main()\n"
"{\n"
- " vec2 texCoord = gl_FragCoord.xy/display_size;\n"
- " float rel = display_size.y/textureSize(tex, 0).y/line_offset;\n"
- " texCoord.y = rel*(1.0f - texCoord.y);\n"
+ " vec2 uv = gl_FragCoord.xy/display_size;\n"
+ " vec2 texSize = vec2(textureSize(tex, 0));\n"
+ " vec2 texCoord;\n"
+ " if (clip_enable) {\n"
+ " vec2 pixel = vec2(clip_rect.x + uv.x * clip_rect.z,\n"
+ " clip_rect.y + (1.0 - uv.y) * clip_rect.w);\n"
+ " texCoord = pixel / texSize;\n"
+ " } else {\n"
+ " float rel = display_size.y/texSize.y/line_offset;\n"
+ " texCoord = vec2(uv.x, rel*(1.0f - uv.y));\n"
+ " }\n"
" out_Color.rgba = texture(tex, texCoord);\n"
" if (pvideo_enable) {\n"
" vec2 screenCoord = gl_FragCoord.xy - 0.5;\n"
@@ -77,7 +275,7 @@ void pgraph_gl_init_display(NV2AState *d)
" greaterThan(screenCoord, output_region.zw));\n"
" if (!any(clip) && (!pvideo_color_key_enable || out_Color.rgb == pvideo_color_key)) {\n"
" vec2 out_xy = (screenCoord - pvideo_pos.xy) * pvideo_scale.z;\n"
- " vec2 in_st = (pvideo_in_pos + out_xy * pvideo_scale.xy) / textureSize(pvideo_tex, 0);\n"
+ " vec2 in_st = (pvideo_in_pos + out_xy * pvideo_scale.xy) / vec2(textureSize(pvideo_tex, 0));\n"
" in_st.y *= -1.0;\n"
" out_Color.rgba = texture(pvideo_tex, in_st);\n"
" }\n"
@@ -95,6 +293,8 @@ void pgraph_gl_init_display(NV2AState *d)
r->disp_rndr.pvideo_color_key_loc = glGetUniformLocation(r->disp_rndr.prog, "pvideo_color_key");
r->disp_rndr.display_size_loc = glGetUniformLocation(r->disp_rndr.prog, "display_size");
r->disp_rndr.line_offset_loc = glGetUniformLocation(r->disp_rndr.prog, "line_offset");
+ r->disp_rndr.clip_rect_loc = glGetUniformLocation(r->disp_rndr.prog, "clip_rect");
+ r->disp_rndr.clip_enable_loc = glGetUniformLocation(r->disp_rndr.prog, "clip_enable");
glGenVertexArrays(1, &r->disp_rndr.vao);
glBindVertexArray(r->disp_rndr.vao);
@@ -103,7 +303,7 @@ void pgraph_gl_init_display(NV2AState *d)
glBufferData(GL_ARRAY_BUFFER, 0, NULL, GL_STATIC_DRAW);
glGenFramebuffers(1, &r->disp_rndr.fbo);
glGenTextures(1, &r->disp_rndr.pvideo_tex);
- assert(glGetError() == GL_NO_ERROR);
+ GL_ASSERT_NO_ERROR("pgraph_gl_init_display");
glo_set_current(g_nv2a_context_render);
}
@@ -112,7 +312,11 @@ void pgraph_gl_finalize_display(PGRAPHState *pg)
{
PGRAPHGLState *r = pg->gl_renderer_state;
+#ifdef __ANDROID__
+ glo_set_current(g_nv2a_context_render);
+#else
glo_set_current(g_nv2a_context_display);
+#endif
glDeleteTextures(1, &r->gl_display_buffer);
r->gl_display_buffer = 0;
@@ -285,7 +489,10 @@ static void render_display(NV2AState *d, SurfaceBinding *surface)
VGADisplayParams vga_display_params;
d->vga.get_resolution(&d->vga, (int*)&width, (int*)&height);
d->vga.get_params(&d->vga, &vga_display_params);
- int line_offset = vga_display_params.line_offset ? surface->pitch / vga_display_params.line_offset : 1;
+ float line_offset = vga_display_params.line_offset
+ ? (float)surface->pitch /
+ (float)vga_display_params.line_offset
+ : 1.0f;
/* Adjust viewport height for interlaced mode, used only in 1080i */
if (d->vga.cr[NV_PRMCIO_INTERLACE_MODE] != NV_PRMCIO_INTERLACE_MODE_DISABLED) {
@@ -297,12 +504,23 @@ static void render_display(NV2AState *d, SurfaceBinding *surface)
glBindFramebuffer(GL_FRAMEBUFFER, r->disp_rndr.fbo);
glActiveTexture(GL_TEXTURE0);
glBindTexture(GL_TEXTURE_2D, r->gl_display_buffer);
+
+ GLint disp_ifmt = surface->fmt.gl_internal_format;
+ GLenum disp_fmt = surface->fmt.gl_format;
+ GLenum disp_type = surface->fmt.gl_type;
+#ifdef __ANDROID__
+ // Use a GLES-compatible renderable format for the display buffer.
+ disp_ifmt = GL_RGBA8;
+ disp_fmt = GL_RGBA;
+ disp_type = GL_UNSIGNED_BYTE;
+#endif
+
bool recreate = (
- surface->fmt.gl_internal_format != r->gl_display_buffer_internal_format
+ disp_ifmt != r->gl_display_buffer_internal_format
|| width != r->gl_display_buffer_width
|| height != r->gl_display_buffer_height
- || surface->fmt.gl_format != r->gl_display_buffer_format
- || surface->fmt.gl_type != r->gl_display_buffer_type
+ || disp_fmt != r->gl_display_buffer_format
+ || disp_type != r->gl_display_buffer_type
);
if (recreate) {
@@ -317,11 +535,11 @@ static void render_display(NV2AState *d, SurfaceBinding *surface)
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_BASE_LEVEL, 0);
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAX_LEVEL, 0);
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
- r->gl_display_buffer_internal_format = surface->fmt.gl_internal_format;
+ r->gl_display_buffer_internal_format = disp_ifmt;
r->gl_display_buffer_width = width;
r->gl_display_buffer_height = height;
- r->gl_display_buffer_format = surface->fmt.gl_format;
- r->gl_display_buffer_type = surface->fmt.gl_type;
+ r->gl_display_buffer_format = disp_fmt;
+ r->gl_display_buffer_type = disp_type;
glTexImage2D(GL_TEXTURE_2D, 0,
r->gl_display_buffer_internal_format,
r->gl_display_buffer_width,
@@ -336,15 +554,72 @@ static void render_display(NV2AState *d, SurfaceBinding *surface)
GL_TEXTURE_2D, r->gl_display_buffer, 0);
GLenum DrawBuffers[1] = {GL_COLOR_ATTACHMENT0};
glDrawBuffers(1, DrawBuffers);
- assert(glCheckFramebufferStatus(GL_FRAMEBUFFER) == GL_FRAMEBUFFER_COMPLETE);
+ GLenum fb_status = glCheckFramebufferStatus(GL_FRAMEBUFFER);
+ if (fb_status != GL_FRAMEBUFFER_COMPLETE) {
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "render_display: framebuffer incomplete 0x%X (fmt=%d ifmt=%d type=%d size=%ux%u)",
+ fb_status,
+ r->gl_display_buffer_format,
+ r->gl_display_buffer_internal_format,
+ r->gl_display_buffer_type,
+ r->gl_display_buffer_width,
+ r->gl_display_buffer_height);
+#else
+ fprintf(stderr,
+ "render_display: framebuffer incomplete 0x%X (fmt=%d ifmt=%d type=%d size=%ux%u)\n",
+ fb_status,
+ r->gl_display_buffer_format,
+ r->gl_display_buffer_internal_format,
+ r->gl_display_buffer_type,
+ r->gl_display_buffer_width,
+ r->gl_display_buffer_height);
+#endif
+ glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
+ GL_TEXTURE_2D, 0, 0);
+ glBindFramebuffer(GL_FRAMEBUFFER, 0);
+ return;
+ }
glBindTexture(GL_TEXTURE_2D, surface->gl_buffer);
+#ifdef __ANDROID__
+ bool clip_enable = false;
+ float clip_x = 0.0f;
+ float clip_y = 0.0f;
+ float clip_w = 0.0f;
+ float clip_h = 0.0f;
+ if (android_force_cpu_blit()) {
+ clip_x = (float)surface->shape.clip_x;
+ clip_y = (float)surface->shape.clip_y;
+ clip_w = (float)surface->shape.clip_width;
+ clip_h = (float)surface->shape.clip_height;
+ if (clip_w > 0.0f && clip_h > 0.0f) {
+ clip_enable = true;
+ static unsigned int clip_log = 0;
+ if ((clip_log++ % 120) == 0) {
+ GLint tex_w = 0;
+ GLint tex_h = 0;
+ glGetTexLevelParameteriv(GL_TEXTURE_2D, 0, GL_TEXTURE_WIDTH, &tex_w);
+ glGetTexLevelParameteriv(GL_TEXTURE_2D, 0, GL_TEXTURE_HEIGHT, &tex_h);
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "render_display: clip rect x=%g y=%g w=%g h=%g tex=%dx%d disp=%ux%u",
+ clip_x, clip_y, clip_w, clip_h,
+ (int)tex_w, (int)tex_h,
+ width, height);
+ }
+ }
+ }
+#endif
glBindVertexArray(r->disp_rndr.vao);
glBindBuffer(GL_ARRAY_BUFFER, r->disp_rndr.vbo);
glUseProgram(r->disp_rndr.prog);
glProgramUniform1i(r->disp_rndr.prog, r->disp_rndr.tex_loc, 0);
glUniform2f(r->disp_rndr.display_size_loc, width, height);
glUniform1f(r->disp_rndr.line_offset_loc, line_offset);
+#ifdef __ANDROID__
+ glUniform1i(r->disp_rndr.clip_enable_loc, clip_enable ? 1 : 0);
+ glUniform4f(r->disp_rndr.clip_rect_loc, clip_x, clip_y, clip_w, clip_h);
+#endif
render_display_pvideo_overlay(d);
glViewport(0, 0, width, height);
@@ -359,6 +634,12 @@ static void render_display(NV2AState *d, SurfaceBinding *surface)
glClear(GL_COLOR_BUFFER_BIT);
glDrawArrays(GL_TRIANGLES, 0, 3);
+#ifdef __ANDROID__
+ if (android_force_cpu_blit()) {
+ android_store_readback(d, surface, width, height);
+ }
+#endif
+
glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
GL_TEXTURE_2D, 0, 0);
}
@@ -377,7 +658,16 @@ void pgraph_gl_sync(NV2AState *d)
VGADisplayParams vga_display_params;
d->vga.get_params(&d->vga, &vga_display_params);
- SurfaceBinding *surface = pgraph_gl_surface_get_within(d, d->pcrtc.start + vga_display_params.line_offset);
+ PGRAPHState *pg = &d->pgraph;
+ unsigned int disp_w = 0;
+ unsigned int disp_h = 0;
+ d->vga.get_resolution(&d->vga, (int *)&disp_w, (int *)&disp_h);
+ if (d->vga.cr[NV_PRMCIO_INTERLACE_MODE] != NV_PRMCIO_INTERLACE_MODE_DISABLED) {
+ disp_h *= 2;
+ }
+
+ SurfaceBinding *surface =
+ pgraph_gl_surface_get_within(d, d->pcrtc.start + vga_display_params.line_offset);
if (surface == NULL || !surface->color || !surface->width || !surface->height) {
qemu_event_set(&d->pgraph.sync_complete);
return;
@@ -386,18 +676,40 @@ void pgraph_gl_sync(NV2AState *d)
/* FIXME: Sanity check surface dimensions */
/* Wait for queued commands to complete */
+#ifdef __ANDROID__
+ bool force_upload = !tcg_enabled();
+ if (android_force_cpu_blit() && surface->draw_time == 0) {
+ force_upload = true;
+ static unsigned int no_draw_log = 0;
+ if ((no_draw_log++ % 120) == 0) {
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "pgraph_gl_sync: forcing upload (no draws yet) vram=0x%x",
+ (unsigned)surface->vram_addr);
+ }
+ }
+ pgraph_gl_upload_surface_data(d, surface, force_upload);
+#else
pgraph_gl_upload_surface_data(d, surface, !tcg_enabled());
+#endif
gl_fence();
- assert(glGetError() == GL_NO_ERROR);
+ GL_ASSERT_NO_ERROR("pgraph_gl_sync: upload fence");
+ /* Render framebuffer */
+#ifdef __ANDROID__
+ glo_set_current(g_nv2a_context_render);
+ render_display(d, surface);
+ gl_fence();
+ GL_ASSERT_NO_ERROR("pgraph_gl_sync: render fence");
+#else
/* Render framebuffer in display context */
glo_set_current(g_nv2a_context_display);
render_display(d, surface);
gl_fence();
- assert(glGetError() == GL_NO_ERROR);
+ GL_ASSERT_NO_ERROR("pgraph_gl_sync: render fence");
/* Switch back to original context */
glo_set_current(g_nv2a_context_render);
+#endif
qatomic_set(&d->pgraph.sync_pending, false);
qemu_event_set(&d->pgraph.sync_complete);
@@ -414,6 +726,13 @@ int pgraph_gl_get_framebuffer_surface(NV2AState *d)
VGADisplayParams vga_display_params;
d->vga.get_params(&d->vga, &vga_display_params);
+ unsigned int disp_w = 0;
+ unsigned int disp_h = 0;
+ d->vga.get_resolution(&d->vga, (int *)&disp_w, (int *)&disp_h);
+ if (d->vga.cr[NV_PRMCIO_INTERLACE_MODE] != NV_PRMCIO_INTERLACE_MODE_DISABLED) {
+ disp_h *= 2;
+ }
+
SurfaceBinding *surface = pgraph_gl_surface_get_within(
d, d->pcrtc.start + vga_display_params.line_offset);
if (surface == NULL || !surface->color) {
diff --git a/hw/xbox/nv2a/pgraph/gl/draw.c b/hw/xbox/nv2a/pgraph/gl/draw.c
index c56934187e..b61e561298 100644
--- a/hw/xbox/nv2a/pgraph/gl/draw.c
+++ b/hw/xbox/nv2a/pgraph/gl/draw.c
@@ -24,6 +24,10 @@
#include "debug.h"
#include "renderer.h"
+#ifdef __ANDROID__
+#include
+#endif
+
void pgraph_gl_clear_surface(NV2AState *d, uint32_t parameter)
{
PGRAPHState *pg = &d->pgraph;
@@ -225,7 +229,9 @@ void pgraph_gl_draw_begin(NV2AState *d)
glDisable(GL_DEPTH_TEST);
}
+#ifndef __ANDROID__
glEnable(GL_DEPTH_CLAMP);
+#endif
/* Set first vertex convention to match Vulkan default */
glProvokingVertex(GL_FIRST_VERTEX_CONVENTION);
@@ -279,6 +285,10 @@ void pgraph_gl_draw_begin(NV2AState *d)
bool anti_aliasing = GET_MASK(pgraph_reg_r(pg, NV_PGRAPH_ANTIALIASING), NV_PGRAPH_ANTIALIASING_ENABLE);
/* Edge Antialiasing */
+#ifdef __ANDROID__
+ glLineWidth(MIN(r->supported_aliased_line_width_range[1],
+ pg->surface_scale_factor));
+#else
if (!anti_aliasing && pgraph_reg_r(pg, NV_PGRAPH_SETUPRASTER) &
NV_PGRAPH_SETUPRASTER_LINESMOOTHENABLE) {
glEnable(GL_LINE_SMOOTH);
@@ -293,6 +303,7 @@ void pgraph_gl_draw_begin(NV2AState *d)
} else {
glDisable(GL_POLYGON_SMOOTH);
}
+#endif
unsigned int vp_width = pg->surface_binding_dim.width,
vp_height = pg->surface_binding_dim.height;
@@ -367,6 +378,8 @@ void pgraph_gl_draw_end(NV2AState *d)
}
pg->draw_time++;
+#ifdef __ANDROID__
+#endif
if (r->color_binding && pgraph_color_write_enabled(pg)) {
r->color_binding->draw_time = pg->draw_time;
}
diff --git a/hw/xbox/nv2a/pgraph/gl/gpuprops.c b/hw/xbox/nv2a/pgraph/gl/gpuprops.c
index 54614e0dac..819309e50a 100644
--- a/hw/xbox/nv2a/pgraph/gl/gpuprops.c
+++ b/hw/xbox/nv2a/pgraph/gl/gpuprops.c
@@ -335,6 +335,19 @@ static void determine_triangle_winding_order(uint8_t *pixels, int width,
void pgraph_gl_determine_gpu_properties(void)
{
+#ifdef __ANDROID__
+ // Skip shader-based probing on Android GLES; some drivers crash here.
+ pgraph_gl_gpu_properties.geom_shader_winding.tri = 0;
+ pgraph_gl_gpu_properties.geom_shader_winding.tri_strip0 = 0;
+ pgraph_gl_gpu_properties.geom_shader_winding.tri_strip1 = 0;
+ pgraph_gl_gpu_properties.geom_shader_winding.tri_fan = 1;
+ fprintf(stderr, "GL geometry shader winding: %d, %d, %d, %d (Android default)\n",
+ pgraph_gl_gpu_properties.geom_shader_winding.tri,
+ pgraph_gl_gpu_properties.geom_shader_winding.tri_strip0,
+ pgraph_gl_gpu_properties.geom_shader_winding.tri_strip1,
+ pgraph_gl_gpu_properties.geom_shader_winding.tri_fan);
+ return;
+#endif
const int width = 640;
const int height = 480;
diff --git a/hw/xbox/nv2a/pgraph/gl/renderer.c b/hw/xbox/nv2a/pgraph/gl/renderer.c
index e9e2109779..f165d04d51 100644
--- a/hw/xbox/nv2a/pgraph/gl/renderer.c
+++ b/hw/xbox/nv2a/pgraph/gl/renderer.c
@@ -24,11 +24,55 @@
#include "debug.h"
#include "renderer.h"
+#ifdef __ANDROID__
+#include
+#endif
+
GloContext *g_nv2a_context_render;
GloContext *g_nv2a_context_display;
+#ifdef __ANDROID__
+static bool gl_extension_list_has(const char *exts, const char *ext)
+{
+ if (!exts || !ext || !*ext) {
+ return false;
+ }
+ size_t len = strlen(ext);
+ const char *p = exts;
+ while ((p = strstr(p, ext)) != NULL) {
+ if ((p == exts || p[-1] == ' ') && (p[len] == '\0' || p[len] == ' ')) {
+ return true;
+ }
+ p += len;
+ }
+ return false;
+}
+#endif
+
static void early_context_init(void)
{
+#ifdef __ANDROID__
+ g_nv2a_context_display = glo_context_wrap_current();
+ if (!g_nv2a_context_display) {
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "early_context_init: no current GL context");
+#endif
+ fprintf(stderr, "Warning: Failed to wrap current GL context\n");
+ return;
+ }
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "early_context_init: wrapped current GL context");
+#endif
+ // Android: defer render context creation to QEMU thread.
+ g_nv2a_context_render = NULL;
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "early_context_init: defer render GL context creation");
+#endif
+ return;
+#endif
g_nv2a_context_render = glo_context_create();
g_nv2a_context_display = glo_context_create();
@@ -50,16 +94,48 @@ static void pgraph_gl_init(NV2AState *d, Error **errp)
PGRAPHGLState *r = pg->gl_renderer_state;
/* fire up opengl */
+#ifdef __ANDROID__
+ if (!g_nv2a_context_render) {
+ g_nv2a_context_render = glo_context_create();
+ if (!g_nv2a_context_render) {
+ error_setg(errp, "Failed to create render GL context");
+ return;
+ }
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "pgraph_gl_init: created render GL context");
+ }
+#endif
glo_set_current(g_nv2a_context_render);
+#ifdef __ANDROID__
+ const char *exts = (const char *)glGetString(GL_EXTENSIONS);
+ r->bgra_supported = gl_extension_list_has(exts, "GL_EXT_texture_format_BGRA8888") ||
+ gl_extension_list_has(exts, "GL_OES_texture_format_BGRA8888") ||
+ gl_extension_list_has(exts, "GL_EXT_texture_format_BGRA8888_OES");
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "pgraph_gl_init: bgra_supported=%s",
+ r->bgra_supported ? "yes" : "no");
+#endif
+
#if DEBUG_NV2A_GL
gl_debug_initialize();
#endif
+#ifdef __ANDROID__
+ pgraph_gl_determine_gpu_properties();
+#endif
+
+#ifdef __ANDROID__
+ /* DXT textures may be available via extension on Android. */
+ if (!glo_check_extension("GL_EXT_texture_compression_s3tc")) {
+ fprintf(stderr, "Warning: GL_EXT_texture_compression_s3tc not available\n");
+ }
+#else
/* DXT textures */
assert(glo_check_extension("GL_EXT_texture_compression_s3tc"));
/* Internal RGB565 texture format */
assert(glo_check_extension("GL_ARB_ES2_compatibility"));
+#endif
glGetFloatv(GL_SMOOTH_LINE_WIDTH_RANGE, r->supported_smooth_line_width_range);
glGetFloatv(GL_ALIASED_LINE_WIDTH_RANGE, r->supported_aliased_line_width_range);
@@ -215,3 +291,13 @@ static void __attribute__((constructor)) register_renderer(void)
{
pgraph_renderer_register(&pgraph_gl_renderer);
}
+
+void pgraph_gl_force_register(void)
+{
+ static bool registered = false;
+ if (registered) {
+ return;
+ }
+ pgraph_renderer_register(&pgraph_gl_renderer);
+ registered = true;
+}
diff --git a/hw/xbox/nv2a/pgraph/gl/renderer.h b/hw/xbox/nv2a/pgraph/gl/renderer.h
index 9b9d9bfb02..6bdb1043b0 100644
--- a/hw/xbox/nv2a/pgraph/gl/renderer.h
+++ b/hw/xbox/nv2a/pgraph/gl/renderer.h
@@ -220,6 +220,8 @@ typedef struct PGRAPHGLState {
GLuint fbo, vao, vbo, prog;
GLuint display_size_loc;
GLuint line_offset_loc;
+ GLuint clip_rect_loc;
+ GLint clip_enable_loc;
GLuint tex_loc;
GLuint pvideo_tex;
GLint pvideo_enable_loc;
@@ -238,6 +240,10 @@ typedef struct PGRAPHGLState {
struct supported_extensions {
GLboolean texture_filter_anisotropic;
} supported_extensions;
+
+#ifdef __ANDROID__
+ bool bgra_supported;
+#endif
} PGRAPHGLState;
extern GloContext *g_nv2a_context_render;
diff --git a/hw/xbox/nv2a/pgraph/gl/shaders.c b/hw/xbox/nv2a/pgraph/gl/shaders.c
index 0c36d0f20c..45ec382ecd 100644
--- a/hw/xbox/nv2a/pgraph/gl/shaders.c
+++ b/hw/xbox/nv2a/pgraph/gl/shaders.c
@@ -195,12 +195,21 @@ static void generate_shaders(PGRAPHGLState *r, ShaderBinding *binding)
ShaderState *state = &binding->state;
ShaderModuleCacheKey key;
+#ifdef __ANDROID__
+ const bool gles = true;
+ const int gles_version = 320;
+#else
+ const bool gles = false;
+ const int gles_version = 0;
+#endif
bool need_geometry_shader = pgraph_glsl_need_geom(&state->geom);
if (need_geometry_shader) {
memset(&key, 0, sizeof(key));
key.kind = GL_GEOMETRY_SHADER;
key.geom.state = state->geom;
+ key.geom.glsl_opts.gles = gles;
+ key.geom.glsl_opts.gles_version = gles_version;
glAttachShader(program, get_shader_module_for_key(r, &key));
}
@@ -209,12 +218,16 @@ static void generate_shaders(PGRAPHGLState *r, ShaderBinding *binding)
key.kind = GL_VERTEX_SHADER;
key.vsh.state = state->vsh;
key.vsh.glsl_opts.prefix_outputs = need_geometry_shader;
+ key.vsh.glsl_opts.gles = gles;
+ key.vsh.glsl_opts.gles_version = gles_version;
glAttachShader(program, get_shader_module_for_key(r, &key));
/* generate a fragment shader from register combiners */
memset(&key, 0, sizeof(key));
key.kind = GL_FRAGMENT_SHADER;
key.psh.state = state->psh;
+ key.psh.glsl_opts.gles = gles;
+ key.psh.glsl_opts.gles_version = gles_version;
glAttachShader(program, get_shader_module_for_key(r, &key));
/* link the program */
@@ -306,7 +319,13 @@ void pgraph_gl_shader_write_cache_reload_list(PGRAPHState *pg)
bool pgraph_gl_shader_load_from_memory(ShaderBinding *binding)
{
+#ifdef __ANDROID__
+ while (glGetError() != GL_NO_ERROR) {
+ /* Clear any prior GL error to avoid aborting on Android. */
+ }
+#else
assert(glGetError() == GL_NO_ERROR);
+#endif
if (!binding->program) {
return false;
@@ -661,6 +680,10 @@ error:
void pgraph_gl_shader_cache_to_disk(ShaderBinding *binding)
{
+#ifdef __ANDROID__
+ (void)binding;
+ return;
+#endif
if (binding->cached) {
return;
}
@@ -736,7 +759,13 @@ static void apply_uniform_updates(const UniformInfo *info, int *locs,
}
}
+#ifdef __ANDROID__
+ while (glGetError() != GL_NO_ERROR) {
+ /* Ignore uniform update GL errors on Android. */
+ }
+#else
assert(glGetError() == GL_NO_ERROR);
+#endif
}
// FIXME: Dirty tracking
diff --git a/hw/xbox/nv2a/pgraph/gl/surface.c b/hw/xbox/nv2a/pgraph/gl/surface.c
index 714121e6bd..4aca9e551a 100644
--- a/hw/xbox/nv2a/pgraph/gl/surface.c
+++ b/hw/xbox/nv2a/pgraph/gl/surface.c
@@ -26,6 +26,35 @@
#include "debug.h"
#include "renderer.h"
+#ifdef __ANDROID__
+#include
+#endif
+
+#ifdef __ANDROID__
+static void android_sanitize_surface_format(PGRAPHGLState *r,
+ SurfaceFormatInfo *fmt)
+{
+ if (!r || !fmt) {
+ return;
+ }
+ if (fmt->gl_format == GL_BGRA) {
+ if (r->bgra_supported) {
+ // GLES BGRA path: force a byte-based type which is widely supported.
+ fmt->gl_type = GL_UNSIGNED_BYTE;
+ } else {
+ fmt->gl_format = GL_RGBA;
+ fmt->gl_type = GL_UNSIGNED_BYTE;
+ }
+ if (fmt->gl_internal_format == GL_RGB8) {
+ fmt->gl_internal_format = GL_RGBA8;
+ }
+ } else if (fmt->gl_format == GL_BGR) {
+ fmt->gl_format = GL_RGB;
+ fmt->gl_type = GL_UNSIGNED_BYTE;
+ }
+}
+#endif
+
static void surface_download(NV2AState *d, SurfaceBinding *surface, bool force);
static void surface_download_to_buffer(NV2AState *d, SurfaceBinding *surface,
bool swizzle, bool flip, bool downscale,
@@ -123,7 +152,12 @@ static void init_render_to_texture(PGRAPHState *pg)
PGRAPHGLState *r = pg->gl_renderer_state;
const char *vs =
+#ifdef __ANDROID__
+ "#version 300 es\n"
+ "precision highp float;\n"
+#else
"#version 330\n"
+#endif
"void main()\n"
"{\n"
" float x = -1.0 + float((gl_VertexID & 1) << 2);\n"
@@ -131,13 +165,20 @@ static void init_render_to_texture(PGRAPHState *pg)
" gl_Position = vec4(x, y, 0, 1);\n"
"}\n";
const char *fs =
+#ifdef __ANDROID__
+ "#version 300 es\n"
+ "precision highp float;\n"
+ "precision highp int;\n"
+#else
"#version 330\n"
+#endif
"uniform sampler2D tex;\n"
"uniform vec2 surface_size;\n"
"layout(location = 0) out vec4 out_Color;\n"
"void main()\n"
"{\n"
- " vec2 texCoord = gl_FragCoord.xy / textureSize(tex, 0).xy;\n"
+ " vec2 texSize = vec2(textureSize(tex, 0));\n"
+ " vec2 texCoord = gl_FragCoord.xy / texSize;\n"
" out_Color.rgba = texture(tex, texCoord);\n"
"}\n";
@@ -218,7 +259,7 @@ static bool surface_to_texture_can_fastpath(SurfaceBinding *surface,
return false;
}
-static void render_surface_to(NV2AState *d, SurfaceBinding *surface,
+static bool render_surface_to(NV2AState *d, SurfaceBinding *surface,
int texture_unit, GLuint gl_target,
GLuint gl_texture, unsigned int width,
unsigned int height)
@@ -226,6 +267,12 @@ static void render_surface_to(NV2AState *d, SurfaceBinding *surface,
PGRAPHState *pg = &d->pgraph;
PGRAPHGLState *r = pg->gl_renderer_state;
+#ifdef __ANDROID__
+ if (gl_target != GL_TEXTURE_2D) {
+ return false;
+ }
+#endif
+
glActiveTexture(GL_TEXTURE0 + texture_unit);
glBindFramebuffer(GL_FRAMEBUFFER, r->s2t_rndr.fbo);
@@ -233,14 +280,48 @@ static void render_surface_to(NV2AState *d, SurfaceBinding *surface,
glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, gl_target,
gl_texture, 0);
glDrawBuffers(1, draw_buffers);
- assert(glCheckFramebufferStatus(GL_FRAMEBUFFER) == GL_FRAMEBUFFER_COMPLETE);
+ GLenum status = glCheckFramebufferStatus(GL_FRAMEBUFFER);
+ if (status != GL_FRAMEBUFFER_COMPLETE) {
+#ifdef __ANDROID__
+ const char *status_str = "unknown";
+ switch (status) {
+ case GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT:
+ status_str = "incomplete_attachment";
+ break;
+ case GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT:
+ status_str = "missing_attachment";
+ break;
+ case GL_FRAMEBUFFER_UNSUPPORTED:
+ status_str = "unsupported";
+ break;
+ default:
+ break;
+ }
+ fprintf(stderr, "nv2a: render_surface_to FBO incomplete (%s=0x%x)\n",
+ status_str, status);
+#endif
+ glBindFramebuffer(GL_FRAMEBUFFER, r->gl_framebuffer);
+ return false;
+ }
+#ifndef __ANDROID__
assert(glGetError() == GL_NO_ERROR);
+#else
+ if (glGetError() != GL_NO_ERROR) {
+ glBindFramebuffer(GL_FRAMEBUFFER, r->gl_framebuffer);
+ return false;
+ }
+#endif
float color[] = { 0.0f, 0.0f, 0.0f, 0.0f };
glBindTexture(GL_TEXTURE_2D, surface->gl_buffer);
+#ifdef __ANDROID__
+ glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE);
+ glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE);
+#else
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_BORDER);
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_BORDER);
glTexParameterfv(GL_TEXTURE_2D, GL_TEXTURE_BORDER_COLOR, color);
+#endif
glBindVertexArray(r->s2t_rndr.vao);
glBindBuffer(GL_ARRAY_BUFFER, r->s2t_rndr.vbo);
@@ -270,6 +351,7 @@ static void render_surface_to(NV2AState *d, SurfaceBinding *surface,
glBindTexture(gl_target, gl_texture);
glUseProgram(
r->shader_binding ? r->shader_binding->gl_program : 0);
+ return true;
}
static void render_surface_to_texture_slow(NV2AState *d,
@@ -341,8 +423,12 @@ void pgraph_gl_render_surface_to_texture(NV2AState *d, SurfaceBinding *surface,
glTexImage2D(texture->gl_target, 0, f->gl_internal_format, width, height, 0,
f->gl_format, f->gl_type, NULL);
glBindTexture(texture->gl_target, 0);
- render_surface_to(d, surface, texture_unit, texture->gl_target,
- texture->gl_texture, width, height);
+ if (!render_surface_to(d, surface, texture_unit, texture->gl_target,
+ texture->gl_texture, width, height)) {
+ render_surface_to_texture_slow(d, surface, texture,
+ texture_shape, texture_unit);
+ return;
+ }
glBindTexture(texture->gl_target, texture->gl_texture);
glUseProgram(
r->shader_binding ? r->shader_binding->gl_program : 0);
@@ -648,8 +734,51 @@ static void bind_current_surface(NV2AState *d)
}
if (r->color_binding || r->zeta_binding) {
- assert(glCheckFramebufferStatus(GL_FRAMEBUFFER) ==
- GL_FRAMEBUFFER_COMPLETE);
+ GLenum status = glCheckFramebufferStatus(GL_FRAMEBUFFER);
+ if (status != GL_FRAMEBUFFER_COMPLETE) {
+#ifdef __ANDROID__
+ const char *status_str = "unknown";
+ switch (status) {
+ case GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT:
+ status_str = "incomplete_attachment";
+ break;
+ case GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT:
+ status_str = "missing_attachment";
+ break;
+ case GL_FRAMEBUFFER_UNSUPPORTED:
+ status_str = "unsupported";
+ break;
+ default:
+ break;
+ }
+ fprintf(stderr,
+ "nv2a: FBO incomplete (%s=0x%x) color=%d zeta=%d\n",
+ status_str, status,
+ r->color_binding != NULL,
+ r->zeta_binding != NULL);
+#endif
+ if (r->zeta_binding) {
+ glFramebufferTexture2D(GL_FRAMEBUFFER,
+ r->zeta_binding->fmt.gl_attachment,
+ GL_TEXTURE_2D, 0, 0);
+ status = glCheckFramebufferStatus(GL_FRAMEBUFFER);
+ if (status == GL_FRAMEBUFFER_COMPLETE) {
+ return;
+ }
+ }
+ if (r->color_binding) {
+ glFramebufferTexture2D(GL_FRAMEBUFFER,
+ r->color_binding->fmt.gl_attachment,
+ GL_TEXTURE_2D, 0, 0);
+ status = glCheckFramebufferStatus(GL_FRAMEBUFFER);
+ if (status == GL_FRAMEBUFFER_COMPLETE) {
+ return;
+ }
+ }
+#ifndef __ANDROID__
+ assert(status == GL_FRAMEBUFFER_COMPLETE);
+#endif
+ }
}
}
@@ -684,6 +813,7 @@ static void surface_download_to_buffer(NV2AState *d, SurfaceBinding *surface,
uint8_t *pixels)
{
PGRAPHState *pg = &d->pgraph;
+ bool ok = true;
swizzle &= surface->swizzle;
downscale &= (pg->surface_scale_factor != 1);
@@ -708,7 +838,37 @@ static void surface_download_to_buffer(NV2AState *d, SurfaceBinding *surface,
glFramebufferTexture2D(GL_FRAMEBUFFER, surface->fmt.gl_attachment,
GL_TEXTURE_2D, surface->gl_buffer, 0);
- assert(glCheckFramebufferStatus(GL_FRAMEBUFFER) == GL_FRAMEBUFFER_COMPLETE);
+ {
+ GLenum status = glCheckFramebufferStatus(GL_FRAMEBUFFER);
+ if (status != GL_FRAMEBUFFER_COMPLETE) {
+#ifdef __ANDROID__
+ const char *status_str = "unknown";
+ switch (status) {
+ case GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT:
+ status_str = "incomplete_attachment";
+ break;
+ case GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT:
+ status_str = "missing_attachment";
+ break;
+ case GL_FRAMEBUFFER_UNSUPPORTED:
+ status_str = "unsupported";
+ break;
+ default:
+ break;
+ }
+ fprintf(stderr, "nv2a: download FBO incomplete (%s=0x%x)\n",
+ status_str, status);
+#endif
+ ok = false;
+ }
+ }
+
+ if (!ok) {
+ if (pixels && surface->size) {
+ memset(pixels, 0, surface->size);
+ }
+ goto cleanup;
+ }
/* Read surface into memory */
uint8_t *gl_read_buf = pixels;
@@ -757,6 +917,7 @@ static void surface_download_to_buffer(NV2AState *d, SurfaceBinding *surface,
}
/* Re-bind original framebuffer target */
+cleanup:
glFramebufferTexture2D(GL_FRAMEBUFFER, surface->fmt.gl_attachment,
GL_TEXTURE_2D, 0, 0);
bind_current_surface(d);
@@ -959,6 +1120,36 @@ void pgraph_gl_upload_surface_data(NV2AState *d, SurfaceBinding *surface,
glTexImage2D(GL_TEXTURE_2D, 0, surface->fmt.gl_internal_format, width,
height, 0, surface->fmt.gl_format, surface->fmt.gl_type,
gl_read_buf);
+#ifdef __ANDROID__
+ {
+ static unsigned int upload_fail_log = 0;
+ GLenum err = glGetError();
+ if (err != GL_NO_ERROR) {
+ if (upload_fail_log++ < 20) {
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "surface upload glTexImage2D err=0x%X ifmt=%d fmt=%d type=%d size=%ux%u bpp=%u vram=0x%x",
+ err,
+ surface->fmt.gl_internal_format,
+ surface->fmt.gl_format,
+ surface->fmt.gl_type,
+ width, height,
+ surface->fmt.bytes_per_pixel,
+ (unsigned)surface->vram_addr);
+ }
+ if (surface->fmt.bytes_per_pixel == 4) {
+ // Fallback to a byte-based RGBA upload to avoid invalid enum combos.
+ glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA8, width, height, 0,
+ GL_RGBA, GL_UNSIGNED_BYTE, gl_read_buf);
+ err = glGetError();
+ if (err != GL_NO_ERROR && upload_fail_log++ < 20) {
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "surface upload fallback err=0x%X",
+ err);
+ }
+ }
+ }
+ }
+#endif
glPixelStorei(GL_UNPACK_ALIGNMENT, prev_unpack_alignment);
if (optimal_buf != buf) {
g_free(optimal_buf);
@@ -1051,9 +1242,12 @@ static void populate_surface_binding_entry_sized(NV2AState *d, bool color,
assert((dma.address & ~0x07FFFFFF) == 0);
entry->shape = (color || !r->color_binding) ? pg->surface_shape :
- r->color_binding->shape;
+ r->color_binding->shape;
entry->gl_buffer = 0;
entry->fmt = fmt;
+#ifdef __ANDROID__
+ android_sanitize_surface_format(r, &entry->fmt);
+#endif
entry->color = color;
entry->swizzle =
(pg->surface_type == NV097_SET_SURFACE_FORMAT_TYPE_SWIZZLE);
@@ -1268,8 +1462,17 @@ static void update_surface_part(NV2AState *d, bool upload, bool color)
glFramebufferTexture2D(GL_FRAMEBUFFER, entry.fmt.gl_attachment,
GL_TEXTURE_2D, found->gl_buffer, 0);
- assert(glCheckFramebufferStatus(GL_FRAMEBUFFER) ==
- GL_FRAMEBUFFER_COMPLETE);
+ {
+ GLenum status = glCheckFramebufferStatus(GL_FRAMEBUFFER);
+ if (status != GL_FRAMEBUFFER_COMPLETE) {
+#ifdef __ANDROID__
+ fprintf(stderr, "nv2a: surface FBO incomplete (0x%x)\n",
+ status);
+#else
+ assert(status == GL_FRAMEBUFFER_COMPLETE);
+#endif
+ }
+ }
surface->buffer_dirty = false;
}
diff --git a/hw/xbox/nv2a/pgraph/gl/texture.c b/hw/xbox/nv2a/pgraph/gl/texture.c
index eb0e4199fe..27bb310de8 100644
--- a/hw/xbox/nv2a/pgraph/gl/texture.c
+++ b/hw/xbox/nv2a/pgraph/gl/texture.c
@@ -150,11 +150,15 @@ static void apply_texture_parameters(PGRAPHGLState *r,
pgraph_texture_mag_filter_gl_map[mag_filter]);
binding->mag_filter = mag_filter;
}
+#ifndef __ANDROID__
if (lod_bias != binding->lod_bias) {
binding->lod_bias = lod_bias;
glTexParameterf(binding->gl_target, GL_TEXTURE_LOD_BIAS,
pgraph_convert_lod_bias_to_float(lod_bias));
}
+#else
+ binding->lod_bias = lod_bias;
+#endif
/* Texture wrapping */
assert(addru < ARRAY_SIZE(pgraph_texture_addr_gl_map));
@@ -217,7 +221,9 @@ void pgraph_gl_bind_textures(NV2AState *d)
glActiveTexture(GL_TEXTURE0 + i);
if (!enabled) {
glBindTexture(GL_TEXTURE_CUBE_MAP, 0);
+#ifndef __ANDROID__
glBindTexture(GL_TEXTURE_1D, 0);
+#endif
glBindTexture(GL_TEXTURE_2D, 0);
glBindTexture(GL_TEXTURE_3D, 0);
continue;
@@ -660,7 +666,13 @@ static TextureBinding* generate_texture(const TextureShape s,
assert(s.dimensionality == 2);
} else {
switch(s.dimensionality) {
- case 1: gl_target = GL_TEXTURE_1D; break;
+ case 1:
+#ifdef __ANDROID__
+ gl_target = GL_TEXTURE_2D;
+#else
+ gl_target = GL_TEXTURE_1D;
+#endif
+ break;
case 2: gl_target = GL_TEXTURE_2D; break;
case 3: gl_target = GL_TEXTURE_3D; break;
default:
diff --git a/hw/xbox/nv2a/pgraph/glsl/common.c b/hw/xbox/nv2a/pgraph/glsl/common.c
index 887d2a2e23..4666b1a90d 100644
--- a/hw/xbox/nv2a/pgraph/glsl/common.c
+++ b/hw/xbox/nv2a/pgraph/glsl/common.c
@@ -52,6 +52,7 @@ MString *pgraph_glsl_get_vtx_header(MString *out, bool location, bool smooth,
{ flat_s, vec4_s, "vtxPos1" },
{ flat_s, vec4_s, "vtxPos2" },
{ flat_s, float_s, "triMZ" },
+ { smooth_s, float_s, "vtxPointSize" },
};
for (int i = 0; i < ARRAY_SIZE(attr); i++) {
@@ -66,6 +67,31 @@ MString *pgraph_glsl_get_vtx_header(MString *out, bool location, bool smooth,
return out;
}
+void pgraph_glsl_append_version(MString *out, bool vulkan, bool gles,
+ int gles_version)
+{
+ if (vulkan) {
+ mstring_append(out, "#version 450\n\n");
+ return;
+ }
+
+ if (gles) {
+ int version = gles_version ? gles_version : 300;
+ mstring_append_fmt(out, "#version %d es\n\n", version);
+ mstring_append(out,
+ "precision highp float;\n"
+ "precision highp int;\n"
+ "precision highp sampler2D;\n"
+ "precision highp sampler3D;\n"
+ "precision highp samplerCube;\n"
+ "precision highp usampler2D;\n"
+ "\n");
+ return;
+ }
+
+ mstring_append(out, "#version 400\n\n");
+}
+
void pgraph_glsl_set_clip_range_uniform_value(PGRAPHState *pg, float clipRange[4])
{
float zmax;
diff --git a/hw/xbox/nv2a/pgraph/glsl/common.h b/hw/xbox/nv2a/pgraph/glsl/common.h
index 4b327421be..79a7712328 100644
--- a/hw/xbox/nv2a/pgraph/glsl/common.h
+++ b/hw/xbox/nv2a/pgraph/glsl/common.h
@@ -99,6 +99,8 @@ typedef struct UniformInfo {
MString *pgraph_glsl_get_vtx_header(MString *out, bool location, bool smooth,
bool in, bool prefix, bool array);
+void pgraph_glsl_append_version(MString *out, bool vulkan, bool gles,
+ int gles_version);
typedef struct PGRAPHState PGRAPHState;
diff --git a/hw/xbox/nv2a/pgraph/glsl/geom.c b/hw/xbox/nv2a/pgraph/glsl/geom.c
index afe57d65d9..559101130d 100644
--- a/hw/xbox/nv2a/pgraph/glsl/geom.c
+++ b/hw/xbox/nv2a/pgraph/glsl/geom.c
@@ -297,14 +297,16 @@ MString *pgraph_glsl_gen_geom(const GeomState *state, GenGeomGlslOptions opts)
assert(layout_in);
assert(layout_out);
assert(body);
- MString *output =
- mstring_from_fmt("#version %d\n\n"
- "%s"
- "%s"
- "\n"
- "#define v_vtxPos v_vtxPos0\n"
- "\n",
- opts.vulkan ? 450 : 400, layout_in, layout_out);
+ MString *output = mstring_new();
+ pgraph_glsl_append_version(output, opts.vulkan, opts.gles,
+ opts.gles_version);
+ mstring_append_fmt(output,
+ "%s"
+ "%s"
+ "\n"
+ "#define v_vtxPos v_vtxPos0\n"
+ "\n",
+ layout_in, layout_out);
pgraph_glsl_get_vtx_header(output, opts.vulkan, state->smooth_shading, true,
true, true);
pgraph_glsl_get_vtx_header(output, opts.vulkan, state->smooth_shading,
@@ -338,11 +340,13 @@ MString *pgraph_glsl_gen_geom(const GeomState *state, GenGeomGlslOptions opts)
provoking_index = "index";
}
+ const char *point_size_expr =
+ opts.gles ? "v_vtxPointSize[index]" : "gl_in[index].gl_PointSize";
mstring_append_fmt(
output,
"void emit_vertex(int index, mat4 pz) {\n"
" gl_Position = gl_in[index].gl_Position;\n"
- " gl_PointSize = gl_in[index].gl_PointSize;\n"
+ " gl_PointSize = %s;\n"
" vtxD0 = v_vtxD0[%s];\n"
" vtxD1 = v_vtxD1[%s];\n"
" vtxB0 = v_vtxB0[%s];\n"
@@ -356,8 +360,10 @@ MString *pgraph_glsl_gen_geom(const GeomState *state, GenGeomGlslOptions opts)
" vtxPos1 = pz[1];\n"
" vtxPos2 = pz[2];\n"
" triMZ = (isnan(pz[3].x) || isinf(pz[3].x)) ? 0.0 : pz[3].x;\n"
+ " vtxPointSize = v_vtxPointSize[index];\n"
" EmitVertex();\n"
"}\n",
+ point_size_expr,
provoking_index,
provoking_index,
provoking_index,
diff --git a/hw/xbox/nv2a/pgraph/glsl/geom.h b/hw/xbox/nv2a/pgraph/glsl/geom.h
index a00302f39b..499edc2adf 100644
--- a/hw/xbox/nv2a/pgraph/glsl/geom.h
+++ b/hw/xbox/nv2a/pgraph/glsl/geom.h
@@ -38,6 +38,8 @@ typedef struct {
typedef struct GenGeomGlslOptions {
bool vulkan;
+ bool gles;
+ int gles_version;
} GenGeomGlslOptions;
void pgraph_glsl_set_geom_state(PGRAPHState *pg, GeomState *geom);
diff --git a/hw/xbox/nv2a/pgraph/glsl/psh.c b/hw/xbox/nv2a/pgraph/glsl/psh.c
index d9d43256a5..e941d67ca4 100644
--- a/hw/xbox/nv2a/pgraph/glsl/psh.c
+++ b/hw/xbox/nv2a/pgraph/glsl/psh.c
@@ -722,9 +722,9 @@ static void psh_append_shadowmap(const struct PixelShader *ps, int i, bool compa
tex_remap, i);
if (extract_msb_24b) {
- mstring_append_fmt(vars,
+ mstring_append_fmt(vars,
"vec4 t%d_depth = vec4(float(t%d_depth_raw.x >> 8) "
- "/ 0xFFFFFF, 1.0, 0.0, 0.0);\n",
+ "/ 16777215.0, 1.0, 0.0, 0.0);\n",
i, i);
}
@@ -733,13 +733,13 @@ static void psh_append_shadowmap(const struct PixelShader *ps, int i, bool compa
mstring_append_fmt(
vars,
"float t%d_max_depth;\n"
- "if (t%d_depth.y > 0) {\n"
- " t%d_max_depth = 0xFFFFFF;\n"
+ "if (t%d_depth.y > 0.0) {\n"
+ " t%d_max_depth = 16777215.0;\n"
"} else {\n"
- " t%d_max_depth = t%d_depth.z > 0 ? 511.9375 : 0xFFFF;\n"
+ " t%d_max_depth = t%d_depth.z > 0.0 ? 511.9375 : 65535.0;\n"
"}\n"
"t%d_depth.x *= t%d_max_depth;\n"
- "pT%d.z = clamp(pT%d.z / pT%d.w, 0, t%d_max_depth);\n"
+ "pT%d.z = clamp(pT%d.z / pT%d.w, 0.0, t%d_max_depth);\n"
"vec4 t%d = vec4(t%d_depth.x %s pT%d.z ? 1.0 : 0.0);\n",
i, i, i, i, i,
i, i, i, i, i, i,
@@ -784,7 +784,7 @@ static void apply_convolution_filter(const struct PixelShader *ps, MString *vars
"vec4 t%d = vec4(0.0);\n"
"for (int i = 0; i < 9; i++) {\n"
" vec3 texCoordDelta = vec3(convolution3x3[i], 0);\n"
- " texCoordDelta.xy /= textureSize(texSamp%d, 0);\n"
+ " texCoordDelta.xy /= vec2(textureSize(texSamp%d, 0));\n"
" t%d += textureProj(texSamp%d, %s(pT%d.xyw) + texCoordDelta) * gaussian3x3[i];\n"
"}\n", tex, tex, tex, tex, tex_remap, tex);
}
@@ -869,8 +869,8 @@ static MString* psh_convert(struct PixelShader *ps)
" else return (x)/127.0;\n"
"}\n"
"float sign3_to_0_to_1(float x) {\n"
- " if (x >= 0) return x/2;\n"
- " else return 1+x/2;\n"
+ " if (x >= 0.0) return x/2.0;\n"
+ " else return 1.0+x/2.0;\n"
"}\n"
"vec3 dotmap_zero_to_one(vec4 col) {\n"
" return col.rgb;\n"
@@ -998,7 +998,7 @@ static MString* psh_convert(struct PixelShader *ps)
if (ps->state->z_perspective) {
mstring_append(
clip,
- "vec2 unscaled_xy = gl_FragCoord.xy / surfaceScale;\n"
+ "vec2 unscaled_xy = gl_FragCoord.xy / vec2(surfaceScale);\n"
"precise float bc0 = area(unscaled_xy, vtxPos1.xy, vtxPos2.xy);\n"
"precise float bc1 = area(unscaled_xy, vtxPos2.xy, vtxPos0.xy);\n"
"precise float bc2 = area(unscaled_xy, vtxPos0.xy, vtxPos1.xy);\n"
@@ -1032,7 +1032,7 @@ static MString* psh_convert(struct PixelShader *ps)
} else {
mstring_append(
clip,
- "vec2 unscaled_xy = gl_FragCoord.xy / surfaceScale;\n"
+ "vec2 unscaled_xy = gl_FragCoord.xy / vec2(surfaceScale);\n"
"precise float bc0 = area(unscaled_xy, vtxPos1.xy, vtxPos2.xy);\n"
"precise float bc1 = area(unscaled_xy, vtxPos2.xy, vtxPos0.xy);\n"
"precise float bc2 = area(unscaled_xy, vtxPos0.xy, vtxPos1.xy);\n"
@@ -1279,8 +1279,8 @@ static MString* psh_convert(struct PixelShader *ps)
i, i-2, i-1, i);
mstring_append_fmt(vars, "vec3 e_%d = vec3(pT%d.w, pT%d.w, pT%d.w);\n",
i, i-2, i-1, i);
- mstring_append_fmt(vars, "vec3 rv_%d = 2*n_%d*dot(n_%d,e_%d)/dot(n_%d,n_%d) - e_%d;\n",
- i, i, i, i, i, i, i);
+ mstring_append_fmt(vars, "vec3 rv_%d = 2.0*n_%d*dot(n_%d,e_%d)/dot(n_%d,n_%d) - e_%d;\n",
+ i, i, i, i, i, i, i);
apply_border_adjustment(ps, vars, i, "rv_%d");
if (!ps->state->tex_cubemap[i]) {
mstring_append_fmt(vars,
@@ -1405,7 +1405,7 @@ static MString* psh_convert(struct PixelShader *ps)
if (ps->state->rect_tex[i]) {
mstring_append_fmt(preflight,
"vec2 norm%d(vec2 coord) {\n"
- " return coord / (textureSize(texSamp%d, 0) / texScale[%d]);\n"
+ " return coord / (vec2(textureSize(texSamp%d, 0)) / texScale[%d]);\n"
"}\n",
i, i, i);
mstring_append_fmt(preflight,
@@ -1504,7 +1504,8 @@ static MString* psh_convert(struct PixelShader *ps)
}
MString *final = mstring_new();
- mstring_append_fmt(final, "#version %d\n\n", ps->opts.vulkan ? 450 : 400);
+ pgraph_glsl_append_version(final, ps->opts.vulkan, ps->opts.gles,
+ ps->opts.gles_version);
mstring_append(final, mstring_get_str(preflight));
mstring_append(final, "void main() {\n");
mstring_append(final, mstring_get_str(clip));
diff --git a/hw/xbox/nv2a/pgraph/glsl/psh.h b/hw/xbox/nv2a/pgraph/glsl/psh.h
index 0c31e807fe..ea3045ab32 100644
--- a/hw/xbox/nv2a/pgraph/glsl/psh.h
+++ b/hw/xbox/nv2a/pgraph/glsl/psh.h
@@ -96,6 +96,8 @@ DECL_UNIFORM_TYPES(PshUniform, PSH_UNIFORM_DECL_X)
typedef struct GenPshGlslOptions {
bool vulkan;
+ bool gles;
+ int gles_version;
int ubo_binding;
int tex_binding;
} GenPshGlslOptions;
diff --git a/hw/xbox/nv2a/pgraph/glsl/vsh-ff.c b/hw/xbox/nv2a/pgraph/glsl/vsh-ff.c
index 2930e92d80..37507cae24 100644
--- a/hw/xbox/nv2a/pgraph/glsl/vsh-ff.c
+++ b/hw/xbox/nv2a/pgraph/glsl/vsh-ff.c
@@ -497,10 +497,10 @@ GLSL_DEFINE(materialEmissionColor, GLSL_LTCTXA(NV_IGRAPH_XF_LTCTXA_CM_COL) ".xyz
" float ptMaxSize = min(pointParams[3] + ptMinSize, 63.875);\n"
" oPts.x = 1/sqrt(pointParams[0] + pointParams[1] * d_e + pointParams[2] * d_e * d_e) + pointParams[6];\n");
mstring_append_fmt(body,
- " oPts.x = clamp(oPts.x * pointParams[3] + pointParams[7], ptMinSize, ptMaxSize) * %d;\n",
+ " oPts.x = clamp(oPts.x * pointParams[3] + pointParams[7], ptMinSize, ptMaxSize) * float(%d);\n",
state->surface_scale_factor);
} else {
- mstring_append_fmt(body, " oPts.x = %f * %d;\n",
+ mstring_append_fmt(body, " oPts.x = %f * float(%d);\n",
MAX(1.f, state->point_size),
state->surface_scale_factor);
}
diff --git a/hw/xbox/nv2a/pgraph/glsl/vsh.c b/hw/xbox/nv2a/pgraph/glsl/vsh.c
index 0413489131..8c9efb87e0 100644
--- a/hw/xbox/nv2a/pgraph/glsl/vsh.c
+++ b/hw/xbox/nv2a/pgraph/glsl/vsh.c
@@ -210,10 +210,10 @@ MString *pgraph_glsl_gen_vsh(const VshState *state, GenVshGlslOptions opts)
"\n"
// Clamp to range [2^(-64), 2^64] or [-2^64, -2^(-64)].
"float clampAwayZeroInf(float t) {\n"
- " if (t > 0.0 || floatBitsToUint(t) == 0) {\n"
- " t = clamp(t, uintBitsToFloat(0x1F800000), uintBitsToFloat(0x5F800000));\n"
+ " if (t > 0.0 || floatBitsToUint(t) == 0u) {\n"
+ " t = clamp(t, uintBitsToFloat(0x1F800000u), uintBitsToFloat(0x5F800000u));\n"
" } else {\n"
- " t = clamp(t, uintBitsToFloat(0xDF800000), uintBitsToFloat(0x9F800000));\n"
+ " t = clamp(t, uintBitsToFloat(0xDF800000u), uintBitsToFloat(0x9F800000u));\n"
" }\n"
" return t;\n"
"}\n"
@@ -250,6 +250,7 @@ MString *pgraph_glsl_gen_vsh(const VshState *state, GenVshGlslOptions opts)
"#define vtxPos1 v_vtxPos1\n"
"#define vtxPos2 v_vtxPos2\n"
"#define triMZ v_triMZ\n"
+ "#define vtxPointSize v_vtxPointSize\n"
);
}
mstring_append(header, "\n");
@@ -305,7 +306,7 @@ MString *pgraph_glsl_gen_vsh(const VshState *state, GenVshGlslOptions opts)
VSH_VERSION_XVS, (uint32_t *)state->programmable.program_data,
state->programmable.program_length, header, body);
if (!state->point_params_enable) {
- mstring_append_fmt(body, " oPts.x = %f * %d;\n",
+ mstring_append_fmt(body, " oPts.x = %f * float(%d);\n",
state->point_size <= 0.f ? 1.f :
state->point_size,
state->surface_scale_factor);
@@ -409,6 +410,7 @@ MString *pgraph_glsl_gen_vsh(const VshState *state, GenVshGlslOptions opts)
" vtxPos1 = vtxPos;\n"
" vtxPos2 = vtxPos;\n"
" triMZ = 0.0;\n"
+ " vtxPointSize = oPts.x;\n"
" gl_PointSize = oPts.x;\n"
);
@@ -444,8 +446,9 @@ MString *pgraph_glsl_gen_vsh(const VshState *state, GenVshGlslOptions opts)
mstring_append(body, "}\n");
/* Return combined header + source */
- MString *output =
- mstring_from_fmt("#version %d\n\n", opts.vulkan ? 450 : 400);
+ MString *output = mstring_new();
+ pgraph_glsl_append_version(output, opts.vulkan, opts.gles,
+ opts.gles_version);
if (opts.vulkan) {
// FIXME: Optimize uniforms
diff --git a/hw/xbox/nv2a/pgraph/glsl/vsh.h b/hw/xbox/nv2a/pgraph/glsl/vsh.h
index 0ed8ac2a2d..faabd9bbd5 100644
--- a/hw/xbox/nv2a/pgraph/glsl/vsh.h
+++ b/hw/xbox/nv2a/pgraph/glsl/vsh.h
@@ -98,6 +98,8 @@ DECL_UNIFORM_TYPES(VshUniform, VSH_UNIFORM_DECL_X)
typedef struct GenVshGlslOptions {
bool vulkan;
+ bool gles;
+ int gles_version;
bool prefix_outputs;
bool use_push_constants_for_uniform_attrs;
int ubo_binding;
diff --git a/hw/xbox/nv2a/pgraph/pgraph.c b/hw/xbox/nv2a/pgraph/pgraph.c
index b34685866c..2b1cb9c5a4 100644
--- a/hw/xbox/nv2a/pgraph/pgraph.c
+++ b/hw/xbox/nv2a/pgraph/pgraph.c
@@ -21,6 +21,10 @@
#include
+#ifdef __ANDROID__
+#include
+#endif
+
#include "hw/xbox/nv2a/nv2a_int.h"
#include "ui/xemu-notifications.h"
#include "ui/xemu-settings.h"
@@ -208,6 +212,15 @@ void pgraph_context_switch(NV2AState *d, unsigned int channel_id)
}
static const PGRAPHRenderer *renderers[CONFIG_DISPLAY_RENDERER__COUNT];
+#ifdef __ANDROID__
+static bool nv2a_android_early_init_done;
+#ifdef CONFIG_OPENGL
+void pgraph_gl_force_register(void);
+#endif
+#ifdef CONFIG_VULKAN
+void pgraph_vk_force_register(void);
+#endif
+#endif
void pgraph_renderer_register(const PGRAPHRenderer *renderer)
{
@@ -253,6 +266,18 @@ void pgraph_clear_dirty_reg_map(PGRAPHState *pg)
static CONFIG_DISPLAY_RENDERER get_default_renderer(void)
{
+#ifdef __ANDROID__
+#ifdef CONFIG_VULKAN
+ if (renderers[CONFIG_DISPLAY_RENDERER_VULKAN]) {
+ return CONFIG_DISPLAY_RENDERER_VULKAN;
+ }
+#endif
+#ifdef CONFIG_OPENGL
+ if (renderers[CONFIG_DISPLAY_RENDERER_OPENGL]) {
+ return CONFIG_DISPLAY_RENDERER_OPENGL;
+ }
+#endif
+#else
#ifdef CONFIG_OPENGL
if (renderers[CONFIG_DISPLAY_RENDERER_OPENGL]) {
return CONFIG_DISPLAY_RENDERER_OPENGL;
@@ -262,6 +287,7 @@ static CONFIG_DISPLAY_RENDERER get_default_renderer(void)
if (renderers[CONFIG_DISPLAY_RENDERER_VULKAN]) {
return CONFIG_DISPLAY_RENDERER_VULKAN;
}
+#endif
#endif
fprintf(stderr, "Warning: No available renderer\n");
return CONFIG_DISPLAY_RENDERER_NULL;
@@ -271,6 +297,10 @@ void nv2a_context_init(void)
{
if (!renderers[g_config.display.renderer]) {
g_config.display.renderer = get_default_renderer();
+ if (!renderers[g_config.display.renderer]) {
+ fprintf(stderr, "Warning: No available renderer\n");
+ return;
+ }
fprintf(stderr,
"Warning: Configured renderer unavailable. Switching to %s.\n",
renderers[g_config.display.renderer]->name);
@@ -279,6 +309,11 @@ void nv2a_context_init(void)
// FIXME: We need a mechanism for renderer to initialize new GL contexts
// on the main thread at run time. For now, just let them all create
// what they need.
+#ifdef __ANDROID__
+ if (!nv2a_android_early_init_done) {
+ fprintf(stderr, "Warning: NV2A early context init not run on SDL thread\n");
+ }
+#else
for (int i = 0; i < ARRAY_SIZE(renderers); i++) {
const PGRAPHRenderer *r = renderers[i];
if (!r) {
@@ -288,8 +323,48 @@ void nv2a_context_init(void)
r->ops.early_context_init();
}
}
+#endif
}
+#ifdef __ANDROID__
+void nv2a_android_early_context_init(void)
+{
+ if (nv2a_android_early_init_done) {
+ return;
+ }
+#ifdef CONFIG_VULKAN
+ pgraph_vk_force_register();
+#endif
+#ifdef CONFIG_OPENGL
+ pgraph_gl_force_register();
+#endif
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "nv2a_android_early_context_init: renderer=%d",
+ g_config.display.renderer);
+#endif
+ if (!renderers[g_config.display.renderer]) {
+ g_config.display.renderer = get_default_renderer();
+ if (!renderers[g_config.display.renderer]) {
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "nv2a_android_early_context_init: no renderer available");
+#endif
+ fprintf(stderr, "Warning: No available renderer\n");
+ return;
+ }
+ fprintf(stderr,
+ "Warning: Configured renderer unavailable. Switching to %s.\n",
+ renderers[g_config.display.renderer]->name);
+ }
+ const PGRAPHRenderer *r = renderers[g_config.display.renderer];
+ if (r && r->ops.early_context_init) {
+ r->ops.early_context_init();
+ }
+ nv2a_android_early_init_done = true;
+}
+#endif
+
static bool attempt_renderer_init(PGRAPHState *pg)
{
NV2AState *d = container_of(pg, NV2AState, pgraph);
@@ -301,11 +376,21 @@ static bool attempt_renderer_init(PGRAPHState *pg)
}
Error *local_err = NULL;
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "attempt_renderer_init: renderer=%d name=%s",
+ g_config.display.renderer,
+ pg->renderer->name);
+#endif
if (pg->renderer->ops.init) {
pg->renderer->ops.init(d, &local_err);
}
if (local_err) {
const char *msg = error_get_pretty(local_err);
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "attempt_renderer_init failed: %s", msg ? msg : "(null)");
+#endif
xemu_queue_error_message(msg);
error_free(local_err);
local_err = NULL;
diff --git a/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/gloffscreen.h b/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/gloffscreen.h
index caa044d3cb..e1c827743f 100644
--- a/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/gloffscreen.h
+++ b/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/gloffscreen.h
@@ -45,6 +45,14 @@ bool glo_check_extension(const char* ext_name);
/* Create an OpenGL context */
GloContext *glo_context_create(void);
+/* Wrap the current OpenGL context without creating a new one */
+GloContext *glo_context_wrap_current(void);
+
+#ifdef __ANDROID__
+/* Cache EGL state from the currently bound SDL/EGL context. */
+void glo_android_cache_current_egl_state(void);
+#endif
+
/* Destroy a previously created OpenGL context */
void glo_context_destroy(GloContext *context);
diff --git a/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/sdl.c b/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/sdl.c
index 277694cc50..7b849a9784 100644
--- a/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/sdl.c
+++ b/hw/xbox/nv2a/pgraph/thirdparty/gloffscreen/sdl.c
@@ -25,17 +25,120 @@
#include
#include
#include
+#include
#include "gloffscreen.h"
#include
#include
+#ifdef __ANDROID__
+#include
+#include
+#include
+#endif
+
struct _GloContext {
SDL_Window *window;
SDL_GLContext gl_context;
+#ifdef __ANDROID__
+ EGLDisplay egl_display;
+ EGLSurface egl_surface;
+ EGLContext egl_context;
+ bool egl_offscreen;
+#endif
};
+#ifdef __ANDROID__
+static EGLDisplay g_android_egl_display = EGL_NO_DISPLAY;
+static EGLContext g_android_egl_share = EGL_NO_CONTEXT;
+static EGLConfig g_android_egl_config = NULL;
+static EGLint g_android_egl_config_id = 0;
+static SDL_Window *g_android_main_window = NULL;
+static SDL_GLContext g_android_main_context = NULL;
+
+void glo_android_cache_current_egl_state(void)
+{
+ g_android_egl_display = eglGetCurrentDisplay();
+ g_android_egl_share = eglGetCurrentContext();
+ g_android_egl_config = NULL;
+ g_android_egl_config_id = 0;
+
+ // Also cache the SDL window and context
+ g_android_main_window = SDL_GL_GetCurrentWindow();
+ g_android_main_context = SDL_GL_GetCurrentContext();
+
+ EGLSurface cur_surface = eglGetCurrentSurface(EGL_DRAW);
+ if (g_android_egl_display == EGL_NO_DISPLAY ||
+ cur_surface == EGL_NO_SURFACE) {
+ return;
+ }
+
+ eglQuerySurface(g_android_egl_display, cur_surface, EGL_CONFIG_ID,
+ &g_android_egl_config_id);
+ if (g_android_egl_config_id == 0) {
+ return;
+ }
+
+ EGLint num = 0;
+ eglGetConfigs(g_android_egl_display, NULL, 0, &num);
+ if (num <= 0) {
+ return;
+ }
+
+ EGLConfig *configs = (EGLConfig *)malloc(sizeof(EGLConfig) * num);
+ if (!configs) {
+ return;
+ }
+
+ if (eglGetConfigs(g_android_egl_display, configs, num, &num)) {
+ for (EGLint i = 0; i < num; ++i) {
+ EGLint id = 0;
+ eglGetConfigAttrib(g_android_egl_display, configs[i],
+ EGL_CONFIG_ID, &id);
+ if (id == g_android_egl_config_id) {
+ g_android_egl_config = configs[i];
+ break;
+ }
+ }
+ }
+
+ free(configs);
+}
+
+static bool android_check_context_sharing(EGLDisplay dpy, EGLContext new_ctx,
+ EGLSurface new_surf)
+{
+ // We can't make the main context current on this thread because it's
+ // already current on another thread. Instead, we'll create a test texture
+ // in the new context and verify it exists, which confirms the context
+ // was created successfully with sharing enabled.
+
+ if (eglMakeCurrent(dpy, new_surf, new_surf, new_ctx) != EGL_TRUE) {
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "glo_context_create: eglMakeCurrent(test) failed");
+ return false;
+ }
+
+ // Create a test texture to verify the context works
+ GLuint tex = 0;
+ glGenTextures(1, &tex);
+ glBindTexture(GL_TEXTURE_2D, tex);
+ const uint32_t pixel = 0xffffffffu;
+ glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, 1, 1, 0, GL_RGBA,
+ GL_UNSIGNED_BYTE, &pixel);
+ glFlush();
+
+ bool valid = (glIsTexture(tex) == GL_TRUE && glGetError() == GL_NO_ERROR);
+ glDeleteTextures(1, &tex);
+
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "glo_context_create: context creation test %s",
+ valid ? "PASSED" : "FAILED");
+ return valid;
+}
+#endif
+
/* Create an OpenGL context */
GloContext *glo_context_create(void)
{
@@ -51,13 +154,174 @@ GloContext *glo_context_create(void)
// Initialize rendering context
SDL_GL_SetAttribute(SDL_GL_SHARE_WITH_CURRENT_CONTEXT, 1);
+#ifdef __ANDROID__
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_PROFILE_MASK,
+ SDL_GL_CONTEXT_PROFILE_ES);
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 3);
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 2);
+#else
SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 4);
SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 0);
- SDL_GL_SetAttribute(
- SDL_GL_CONTEXT_PROFILE_MASK,
- SDL_GL_CONTEXT_PROFILE_CORE);
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_PROFILE_MASK,
+ SDL_GL_CONTEXT_PROFILE_CORE);
+#endif
- // Create main window
+#ifdef __ANDROID__
+ bool allow_egl_offscreen = true;
+ const char *egl_env = SDL_getenv("XEMU_ANDROID_EGL_OFFSCREEN");
+ if (egl_env && (strcmp(egl_env, "0") == 0 || strcmp(egl_env, "false") == 0 ||
+ strcmp(egl_env, "FALSE") == 0)) {
+ allow_egl_offscreen = false;
+ }
+ if (g_android_egl_display == EGL_NO_DISPLAY ||
+ g_android_egl_share == EGL_NO_CONTEXT) {
+ glo_android_cache_current_egl_state();
+ }
+ if (g_android_egl_display == EGL_NO_DISPLAY ||
+ g_android_egl_share == EGL_NO_CONTEXT) {
+ allow_egl_offscreen = false;
+ }
+ context->egl_offscreen = false;
+ context->egl_display = EGL_NO_DISPLAY;
+ context->egl_surface = EGL_NO_SURFACE;
+ context->egl_context = EGL_NO_CONTEXT;
+
+ if (allow_egl_offscreen) {
+ EGLDisplay dpy = g_android_egl_display;
+ EGLContext share = g_android_egl_share;
+ if (dpy != EGL_NO_DISPLAY && share != EGL_NO_CONTEXT) {
+ EGLConfig chosen = g_android_egl_config;
+ if (chosen == NULL && g_android_egl_config_id != 0) {
+ EGLint num = 0;
+ eglGetConfigs(dpy, NULL, 0, &num);
+ if (num > 0) {
+ EGLConfig *configs = (EGLConfig *)malloc(sizeof(EGLConfig) * num);
+ if (configs && eglGetConfigs(dpy, configs, num, &num)) {
+ for (EGLint i = 0; i < num; ++i) {
+ EGLint id = 0;
+ eglGetConfigAttrib(dpy, configs[i], EGL_CONFIG_ID, &id);
+ if (id == g_android_egl_config_id) {
+ chosen = configs[i];
+ break;
+ }
+ }
+ }
+ free(configs);
+ }
+ }
+
+ if (chosen == NULL) {
+ const EGLint attribs[] = {
+ EGL_RENDERABLE_TYPE, EGL_OPENGL_ES3_BIT,
+ EGL_SURFACE_TYPE, EGL_WINDOW_BIT | EGL_PBUFFER_BIT,
+ EGL_RED_SIZE, 8,
+ EGL_GREEN_SIZE, 8,
+ EGL_BLUE_SIZE, 8,
+ EGL_ALPHA_SIZE, 8,
+ EGL_DEPTH_SIZE, 24,
+ EGL_STENCIL_SIZE, 8,
+ EGL_NONE
+ };
+ EGLint num = 0;
+ if (eglChooseConfig(dpy, attribs, &chosen, 1, &num) != EGL_TRUE || num <= 0) {
+ chosen = NULL;
+ }
+ }
+
+ if (chosen != NULL) {
+ eglBindAPI(EGL_OPENGL_ES_API);
+ const char *exts = eglQueryString(dpy, EGL_EXTENSIONS);
+ bool surfaceless = exts && strstr(exts, "EGL_KHR_surfaceless_context");
+ // Prefer a small pbuffer surface even if surfaceless is supported.
+ EGLSurface surf = EGL_NO_SURFACE;
+ {
+ const EGLint pb_attribs[] = {
+ EGL_WIDTH, 16,
+ EGL_HEIGHT, 16,
+ EGL_NONE
+ };
+ surf = eglCreatePbufferSurface(dpy, chosen, pb_attribs);
+ }
+ if (surf == EGL_NO_SURFACE && surfaceless) {
+ // Fall back to surfaceless when pbuffer creation fails.
+ surf = EGL_NO_SURFACE;
+ }
+
+ const EGLint ctx_attribs[] = {
+ EGL_CONTEXT_CLIENT_VERSION, 3,
+ EGL_NONE
+ };
+ EGLContext ctx = eglCreateContext(dpy, chosen, share, ctx_attribs);
+ if (ctx == EGL_NO_CONTEXT) {
+ const EGLint ctx_attribs2[] = {
+ EGL_CONTEXT_CLIENT_VERSION, 2,
+ EGL_NONE
+ };
+ ctx = eglCreateContext(dpy, chosen, share, ctx_attribs2);
+ }
+
+ if (ctx != EGL_NO_CONTEXT && (surf != EGL_NO_SURFACE || surfaceless)) {
+ // Test that the new context was created successfully
+ bool valid = android_check_context_sharing(dpy, ctx, surf);
+
+ if (valid) {
+ context->egl_offscreen = true;
+ context->egl_display = dpy;
+ context->egl_surface = surf;
+ context->egl_context = ctx;
+ context->window = NULL;
+ context->gl_context = NULL;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "%s: created EGL offscreen ctx=%p surf=%p",
+ __func__, (void *)ctx, (void *)surf);
+ return context;
+ }
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "%s: EGL context test failed; falling back to SDL",
+ __func__);
+ }
+
+ if (surf != EGL_NO_SURFACE) {
+ eglDestroySurface(dpy, surf);
+ }
+ if (ctx != EGL_NO_CONTEXT) {
+ eglDestroyContext(dpy, ctx);
+ }
+ }
+ }
+ } else {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "%s: EGL offscreen disabled, using SDL context",
+ __func__);
+ }
+
+ // Fallback: Create a dedicated window for the offscreen context.
+ SDL_Window *current = SDL_GL_GetCurrentWindow();
+ context->window = SDL_CreateWindow(
+ "SDL Offscreen Window",
+ SDL_WINDOWPOS_CENTERED,
+ SDL_WINDOWPOS_CENTERED,
+ 640, 480,
+ SDL_WINDOW_OPENGL | SDL_WINDOW_HIDDEN);
+
+ if (context->window == NULL) {
+ // Fall back to the current window if Android disallows hidden windows.
+ context->window = SDL_GL_GetCurrentWindow();
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "%s: hidden window failed, using current=%p",
+ __func__, (void *)context->window);
+ if (context->window == NULL) {
+ fprintf(stderr, "%s: Failed to create or reuse window\n", __func__);
+ SDL_Quit();
+ exit(1);
+ }
+ } else {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "%s: created hidden window=%p (current=%p)",
+ __func__, (void *)context->window, (void *)current);
+ }
+#else
+ // Create a dedicated window for the offscreen context.
context->window = SDL_CreateWindow(
"SDL Offscreen Window",
SDL_WINDOWPOS_CENTERED,
@@ -69,6 +333,7 @@ GloContext *glo_context_create(void)
SDL_Quit();
exit(1);
}
+#endif
context->gl_context = SDL_GL_CreateContext(context->window);
if (context->gl_context == NULL) {
@@ -77,19 +342,115 @@ GloContext *glo_context_create(void)
SDL_Quit();
exit(1);
}
+#ifdef __ANDROID__
+ // Unbind any current context before making the new one current.
+ if (SDL_GL_MakeCurrent(NULL, NULL) != 0) {
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "%s: SDL_GL_MakeCurrent(NULL) failed: %s",
+ __func__, SDL_GetError());
+ }
+#endif
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "%s: created GL context=%p for window=%p",
+ __func__, (void *)context->gl_context,
+ (void *)context->window);
+#endif
glo_set_current(context);
return context;
}
+/* Wrap an already-current OpenGL context */
+GloContext *glo_context_wrap_current(void)
+{
+ SDL_Window *window = SDL_GL_GetCurrentWindow();
+ SDL_GLContext gl_context = SDL_GL_GetCurrentContext();
+ if (!window || !gl_context) {
+ fprintf(stderr, "%s: No current GL context to wrap\n", __func__);
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "%s: no current GL context (window=%p, ctx=%p)",
+ __func__, (void *)window, (void *)gl_context);
+#endif
+ return NULL;
+ }
+
+ GloContext *context = (GloContext *)malloc(sizeof(GloContext));
+ assert(context != NULL);
+ context->window = window;
+ context->gl_context = gl_context;
+#ifdef __ANDROID__
+ context->egl_display = EGL_NO_DISPLAY;
+ context->egl_surface = EGL_NO_SURFACE;
+ context->egl_context = EGL_NO_CONTEXT;
+ context->egl_offscreen = false;
+ glo_android_cache_current_egl_state();
+#endif
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "%s: wrapped window=%p ctx=%p",
+ __func__, (void *)window, (void *)gl_context);
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "%s: saved egl display=%p share=%p",
+ __func__, (void *)g_android_egl_display,
+ (void *)g_android_egl_share);
+ if (g_android_egl_config_id != 0) {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "%s: saved egl config id=%d", __func__,
+ (int)g_android_egl_config_id);
+ }
+#endif
+ return context;
+}
+
/* Set current context */
void glo_set_current(GloContext *context)
{
if (context == NULL) {
- SDL_GL_MakeCurrent(NULL, NULL);
+#ifdef __ANDROID__
+ EGLDisplay dpy = eglGetCurrentDisplay();
+ if (dpy != EGL_NO_DISPLAY) {
+ if (eglMakeCurrent(dpy, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT) != EGL_TRUE) {
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "glo_set_current(NULL) eglMakeCurrent failed");
+ }
+ return;
+ }
+#endif
+ if (SDL_GL_MakeCurrent(NULL, NULL) != 0) {
+ fprintf(stderr, "glo_set_current(NULL) failed: %s\n",
+ SDL_GetError());
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "glo_set_current(NULL) failed: %s",
+ SDL_GetError());
+#endif
+ }
} else {
- SDL_GL_MakeCurrent(context->window, context->gl_context);
+#ifdef __ANDROID__
+ if (context->egl_offscreen) {
+ if (eglMakeCurrent(context->egl_display, context->egl_surface,
+ context->egl_surface, context->egl_context) != EGL_TRUE) {
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "glo_set_current(offscreen) failed");
+ }
+ return;
+ }
+#endif
+ if (SDL_GL_MakeCurrent(context->window, context->gl_context) != 0) {
+ fprintf(stderr, "glo_set_current(%p,%p) failed: %s\n",
+ (void *)context->window, (void *)context->gl_context,
+ SDL_GetError());
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "glo_set_current(%p,%p) failed: %s",
+ (void *)context->window,
+ (void *)context->gl_context,
+ SDL_GetError());
+#endif
+ }
}
}
@@ -97,6 +458,21 @@ void glo_set_current(GloContext *context)
void glo_context_destroy(GloContext *context)
{
if (!context) return;
+#ifdef __ANDROID__
+ if (context->egl_offscreen) {
+ if (context->egl_display != EGL_NO_DISPLAY) {
+ eglMakeCurrent(context->egl_display, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT);
+ if (context->egl_surface != EGL_NO_SURFACE) {
+ eglDestroySurface(context->egl_display, context->egl_surface);
+ }
+ if (context->egl_context != EGL_NO_CONTEXT) {
+ eglDestroyContext(context->egl_display, context->egl_context);
+ }
+ }
+ free(context);
+ return;
+ }
+#endif
glo_set_current(NULL);
free(context);
}
diff --git a/hw/xbox/nv2a/pgraph/vk/display.c b/hw/xbox/nv2a/pgraph/vk/display.c
index 6b9e5851c4..1c17dbebc7 100644
--- a/hw/xbox/nv2a/pgraph/vk/display.c
+++ b/hw/xbox/nv2a/pgraph/vk/display.c
@@ -18,8 +18,56 @@
*/
#include "renderer.h"
+#include
#include
+#if HAVE_EXTERNAL_MEMORY
+static PFNGLDELETEMEMORYOBJECTSEXTPROC p_glDeleteMemoryObjectsEXT;
+static PFNGLISMEMORYOBJECTEXTPROC p_glIsMemoryObjectEXT;
+static PFNGLCREATEMEMORYOBJECTSEXTPROC p_glCreateMemoryObjectsEXT;
+static PFNGLIMPORTMEMORYFDEXTPROC p_glImportMemoryFdEXT;
+static PFNGLTEXSTORAGEMEM2DEXTPROC p_glTexStorageMem2DEXT;
+
+static bool gl_external_memory_loaded;
+static bool gl_external_memory_available;
+
+static bool load_gl_external_memory_symbols(void)
+{
+ if (gl_external_memory_loaded) {
+ return gl_external_memory_available;
+ }
+ gl_external_memory_loaded = true;
+
+ p_glDeleteMemoryObjectsEXT =
+ (PFNGLDELETEMEMORYOBJECTSEXTPROC)eglGetProcAddress(
+ "glDeleteMemoryObjectsEXT");
+ p_glIsMemoryObjectEXT =
+ (PFNGLISMEMORYOBJECTEXTPROC)eglGetProcAddress(
+ "glIsMemoryObjectEXT");
+ p_glCreateMemoryObjectsEXT =
+ (PFNGLCREATEMEMORYOBJECTSEXTPROC)eglGetProcAddress(
+ "glCreateMemoryObjectsEXT");
+ p_glImportMemoryFdEXT =
+ (PFNGLIMPORTMEMORYFDEXTPROC)eglGetProcAddress(
+ "glImportMemoryFdEXT");
+ p_glTexStorageMem2DEXT =
+ (PFNGLTEXSTORAGEMEM2DEXTPROC)eglGetProcAddress(
+ "glTexStorageMem2DEXT");
+
+ gl_external_memory_available = p_glDeleteMemoryObjectsEXT &&
+ p_glIsMemoryObjectEXT &&
+ p_glCreateMemoryObjectsEXT &&
+ p_glImportMemoryFdEXT &&
+ p_glTexStorageMem2DEXT;
+ return gl_external_memory_available;
+}
+
+bool pgraph_vk_gl_external_memory_available(void)
+{
+ return load_gl_external_memory_symbols();
+}
+#endif
+
static uint8_t *convert_texture_data__CR8YB8CB8YA8(uint8_t *data_out,
const uint8_t *data_in,
unsigned int width,
@@ -542,10 +590,14 @@ static void destroy_current_display_image(PGRAPHState *pg)
destroy_frame_buffer(pg);
#if HAVE_EXTERNAL_MEMORY
- glDeleteTextures(1, &d->gl_texture_id);
+ if (p_glDeleteMemoryObjectsEXT) {
+ glDeleteTextures(1, &d->gl_texture_id);
+ }
d->gl_texture_id = 0;
- glDeleteMemoryObjectsEXT(1, &d->gl_memory_obj);
+ if (p_glDeleteMemoryObjectsEXT) {
+ p_glDeleteMemoryObjectsEXT(1, &d->gl_memory_obj);
+ }
d->gl_memory_obj = 0;
#ifdef WIN32
@@ -569,7 +621,7 @@ static void destroy_current_display_image(PGRAPHState *pg)
// FIXME: We may need to use two images. One for actually rendering display,
// and another for GL in the correct tiling mode
-static void create_display_image(PGRAPHState *pg, int width, int height)
+static bool create_display_image(PGRAPHState *pg, int width, int height)
{
PGRAPHVkState *r = pg->vk_renderer_state;
PGRAPHVkDisplayState *d = &r->display;
@@ -600,6 +652,12 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
}
#endif
+ d->gl_texture_id = 0;
+ d->gl_memory_obj = 0;
+#ifndef WIN32
+ d->fd = -1;
+#endif
+
// Create image
VkImageCreateInfo image_create_info = {
.sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
@@ -627,18 +685,48 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
};
image_create_info.pNext = &external_memory_image_create_info;
- VK_CHECK(vkCreateImage(r->device, &image_create_info, NULL, &d->image));
+ VkResult result = vkCreateImage(r->device, &image_create_info, NULL, &d->image);
+ if (result != VK_SUCCESS) {
+ fprintf(stderr, "create_display_image: vkCreateImage failed (%d)\n", result);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
// Allocate and bind image memory
- VkMemoryRequirements memory_requirements;
- vkGetImageMemoryRequirements(r->device, d->image, &memory_requirements);
+ VkMemoryDedicatedRequirements dedicated_requirements = {
+ .sType = VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS,
+ };
+ VkMemoryRequirements2 memory_requirements2 = {
+ .sType = VK_STRUCTURE_TYPE_MEMORY_REQUIREMENTS_2,
+ .pNext = &dedicated_requirements,
+ };
+ VkImageMemoryRequirementsInfo2 image_memory_requirements_info = {
+ .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_REQUIREMENTS_INFO_2,
+ .image = d->image,
+ };
+ vkGetImageMemoryRequirements2(r->device, &image_memory_requirements_info,
+ &memory_requirements2);
+ VkMemoryRequirements memory_requirements = memory_requirements2.memoryRequirements;
+
+ uint32_t memory_type_index =
+ pgraph_vk_get_memory_type(pg, memory_requirements.memoryTypeBits,
+ VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT);
+ if (memory_type_index == 0xFFFFFFFF) {
+ memory_type_index =
+ pgraph_vk_get_memory_type(pg, memory_requirements.memoryTypeBits, 0);
+ }
+ if (memory_type_index == 0xFFFFFFFF) {
+ fprintf(stderr, "create_display_image: no compatible memory type bits=0x%x\n",
+ memory_requirements.memoryTypeBits);
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
VkMemoryAllocateInfo alloc_info = {
.sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO,
.allocationSize = memory_requirements.size,
- .memoryTypeIndex =
- pgraph_vk_get_memory_type(pg, memory_requirements.memoryTypeBits,
- VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT),
+ .memoryTypeIndex = memory_type_index,
};
VkExportMemoryAllocateInfo export_memory_alloc_info = {
@@ -651,10 +739,37 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
#endif
,
};
- alloc_info.pNext = &export_memory_alloc_info;
+ void *alloc_p_next = &export_memory_alloc_info;
+ VkMemoryDedicatedAllocateInfo dedicated_alloc_info = {
+ .sType = VK_STRUCTURE_TYPE_MEMORY_DEDICATED_ALLOCATE_INFO,
+ .image = d->image,
+ };
+ if (dedicated_requirements.requiresDedicatedAllocation == VK_TRUE) {
+ dedicated_alloc_info.pNext = alloc_p_next;
+ alloc_p_next = &dedicated_alloc_info;
+ }
+ alloc_info.pNext = alloc_p_next;
- VK_CHECK(vkAllocateMemory(r->device, &alloc_info, NULL, &d->memory));
- VK_CHECK(vkBindImageMemory(r->device, d->image, d->memory, 0));
+ result = vkAllocateMemory(r->device, &alloc_info, NULL, &d->memory);
+ if (result != VK_SUCCESS) {
+ fprintf(stderr, "create_display_image: vkAllocateMemory failed (%d) size=%llu type=%u dedicated=%d\n",
+ result, (unsigned long long)alloc_info.allocationSize,
+ alloc_info.memoryTypeIndex,
+ dedicated_requirements.requiresDedicatedAllocation == VK_TRUE ? 1 : 0);
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ d->memory = VK_NULL_HANDLE;
+ return false;
+ }
+ result = vkBindImageMemory(r->device, d->image, d->memory, 0);
+ if (result != VK_SUCCESS) {
+ fprintf(stderr, "create_display_image: vkBindImageMemory failed (%d)\n", result);
+ vkFreeMemory(r->device, d->memory, NULL);
+ d->memory = VK_NULL_HANDLE;
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
// Create Image View
VkImageViewCreateInfo image_view_create_info = {
@@ -666,10 +781,28 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
.subresourceRange.levelCount = 1,
.subresourceRange.layerCount = 1,
};
- VK_CHECK(vkCreateImageView(r->device, &image_view_create_info, NULL,
- &d->image_view));
+ result = vkCreateImageView(r->device, &image_view_create_info, NULL,
+ &d->image_view);
+ if (result != VK_SUCCESS) {
+ fprintf(stderr, "create_display_image: vkCreateImageView failed (%d)\n", result);
+ vkFreeMemory(r->device, d->memory, NULL);
+ d->memory = VK_NULL_HANDLE;
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
#if HAVE_EXTERNAL_MEMORY
+ if (!load_gl_external_memory_symbols()) {
+ fprintf(stderr, "Vulkan display: GL_EXT_memory_object not available\n");
+ vkDestroyImageView(r->device, d->image_view, NULL);
+ d->image_view = VK_NULL_HANDLE;
+ vkFreeMemory(r->device, d->memory, NULL);
+ d->memory = VK_NULL_HANDLE;
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
#ifdef WIN32
@@ -680,7 +813,7 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
};
VK_CHECK(vkGetMemoryWin32HandleKHR(r->device, &handle_info, &d->handle));
- glCreateMemoryObjectsEXT(1, &d->gl_memory_obj);
+ p_glCreateMemoryObjectsEXT(1, &d->gl_memory_obj);
glImportMemoryWin32HandleEXT(d->gl_memory_obj, memory_requirements.size, GL_HANDLE_TYPE_OPAQUE_WIN32_EXT, d->handle);
assert(glGetError() == GL_NO_ERROR);
@@ -691,13 +824,31 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
.memory = d->memory,
.handleType = VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT,
};
- VK_CHECK(vkGetMemoryFdKHR(r->device, &fd_info, &d->fd));
+ result = vkGetMemoryFdKHR(r->device, &fd_info, &d->fd);
+ if (result != VK_SUCCESS) {
+ fprintf(stderr, "create_display_image: vkGetMemoryFdKHR failed (%d)\n", result);
+ vkDestroyImageView(r->device, d->image_view, NULL);
+ d->image_view = VK_NULL_HANDLE;
+ vkFreeMemory(r->device, d->memory, NULL);
+ d->memory = VK_NULL_HANDLE;
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
- glCreateMemoryObjectsEXT(1, &d->gl_memory_obj);
- glImportMemoryFdEXT(d->gl_memory_obj, memory_requirements.size,
- GL_HANDLE_TYPE_OPAQUE_FD_EXT, d->fd);
- assert(glIsMemoryObjectEXT(d->gl_memory_obj));
- assert(glGetError() == GL_NO_ERROR);
+ p_glCreateMemoryObjectsEXT(1, &d->gl_memory_obj);
+ p_glImportMemoryFdEXT(d->gl_memory_obj, memory_requirements.size,
+ GL_HANDLE_TYPE_OPAQUE_FD_EXT, d->fd);
+ if (!p_glIsMemoryObjectEXT(d->gl_memory_obj) || glGetError() != GL_NO_ERROR) {
+ fprintf(stderr, "create_display_image: GL memory object import failed\n");
+ vkDestroyImageView(r->device, d->image_view, NULL);
+ d->image_view = VK_NULL_HANDLE;
+ vkFreeMemory(r->device, d->memory, NULL);
+ d->memory = VK_NULL_HANDLE;
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
#endif // WIN32
@@ -708,10 +859,19 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_TILING_EXT,
use_optimal_tiling ? GL_OPTIMAL_TILING_EXT :
GL_LINEAR_TILING_EXT);
- glTexStorageMem2DEXT(GL_TEXTURE_2D, 1, gl_internal_format,
- image_create_info.extent.width,
- image_create_info.extent.height, d->gl_memory_obj, 0);
- assert(glGetError() == GL_NO_ERROR);
+ p_glTexStorageMem2DEXT(GL_TEXTURE_2D, 1, gl_internal_format,
+ image_create_info.extent.width,
+ image_create_info.extent.height, d->gl_memory_obj, 0);
+ if (glGetError() != GL_NO_ERROR) {
+ fprintf(stderr, "create_display_image: glTexStorageMem2DEXT failed\n");
+ vkDestroyImageView(r->device, d->image_view, NULL);
+ d->image_view = VK_NULL_HANDLE;
+ vkFreeMemory(r->device, d->memory, NULL);
+ d->memory = VK_NULL_HANDLE;
+ vkDestroyImage(r->device, d->image, NULL);
+ d->image = VK_NULL_HANDLE;
+ return false;
+ }
#endif // HAVE_EXTERNAL_MEMORY
@@ -719,6 +879,7 @@ static void create_display_image(PGRAPHState *pg, int width, int height)
d->height = image_create_info.extent.height;
create_frame_buffer(pg);
+ return true;
}
static void update_descriptor_set(PGRAPHState *pg, SurfaceBinding *surface)
@@ -900,6 +1061,9 @@ static void render_display(PGRAPHState *pg, SurfaceBinding *surface)
NV2AState *d = container_of(pg, NV2AState, pgraph);
PGRAPHVkState *r = pg->vk_renderer_state;
PGRAPHVkDisplayState *disp = &r->display;
+ if (disp->image == VK_NULL_HANDLE || disp->framebuffer == VK_NULL_HANDLE) {
+ return;
+ }
if (r->in_command_buffer &&
surface->draw_time >= r->command_buffer_start_time) {
@@ -1086,7 +1250,9 @@ void pgraph_vk_render_display(PGRAPHState *pg)
PGRAPHVkDisplayState *disp = &r->display;
if (!disp->image || disp->width != width || disp->height != height) {
- create_display_image(pg, width, height);
+ if (!create_display_image(pg, width, height)) {
+ return;
+ }
}
render_display(pg, surface);
diff --git a/hw/xbox/nv2a/pgraph/vk/draw.c b/hw/xbox/nv2a/pgraph/vk/draw.c
index d78087e56b..e69eb9a93f 100644
--- a/hw/xbox/nv2a/pgraph/vk/draw.c
+++ b/hw/xbox/nv2a/pgraph/vk/draw.c
@@ -788,17 +788,25 @@ static void create_pipeline(PGRAPHState *pg)
void *rasterizer_next_struct = NULL;
+ VkPolygonMode polygon_mode =
+ pgraph_polygon_mode_vk_map[r->shader_binding->state.geom.polygon_front_mode];
+ if (polygon_mode != VK_POLYGON_MODE_FILL &&
+ r->enabled_physical_device_features.fillModeNonSolid != VK_TRUE) {
+ polygon_mode = VK_POLYGON_MODE_FILL;
+ }
+
VkPipelineRasterizationStateCreateInfo rasterizer = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
- .depthClampEnable = VK_TRUE,
+ .depthClampEnable =
+ r->enabled_physical_device_features.depthClamp == VK_TRUE ?
+ VK_TRUE : VK_FALSE,
.rasterizerDiscardEnable = VK_FALSE,
- .polygonMode = pgraph_polygon_mode_vk_map[r->shader_binding->state
- .geom.polygon_front_mode],
+ .polygonMode = polygon_mode,
.lineWidth = 1.0f,
.frontFace = (pgraph_reg_r(pg, NV_PGRAPH_SETUPRASTER) &
NV_PGRAPH_SETUPRASTER_FRONTFACE) ?
- VK_FRONT_FACE_COUNTER_CLOCKWISE :
- VK_FRONT_FACE_CLOCKWISE,
+ VK_FRONT_FACE_COUNTER_CLOCKWISE :
+ VK_FRONT_FACE_CLOCKWISE,
.depthBiasEnable = VK_FALSE,
.pNext = rasterizer_next_struct,
};
@@ -1067,8 +1075,11 @@ static void begin_query(PGRAPHVkState *r)
nv2a_profile_inc_counter(NV2A_PROF_QUERY);
vkCmdResetQueryPool(r->command_buffer, r->query_pool,
r->num_queries_in_flight, 1);
+ VkQueryControlFlags query_flags =
+ r->enabled_physical_device_features.occlusionQueryPrecise == VK_TRUE ?
+ VK_QUERY_CONTROL_PRECISE_BIT : 0;
vkCmdBeginQuery(r->command_buffer, r->query_pool, r->num_queries_in_flight,
- VK_QUERY_CONTROL_PRECISE_BIT);
+ query_flags);
r->query_in_flight = true;
r->new_query_needed = false;
diff --git a/hw/xbox/nv2a/pgraph/vk/instance.c b/hw/xbox/nv2a/pgraph/vk/instance.c
index 30b8e78f5d..b377c8da71 100644
--- a/hw/xbox/nv2a/pgraph/vk/instance.c
+++ b/hw/xbox/nv2a/pgraph/vk/instance.c
@@ -26,6 +26,10 @@
#include
#include
+#ifdef __ANDROID__
+#include
+#endif
+
#include
#define VkExtensionPropertiesArray GArray
@@ -99,6 +103,15 @@ static bool check_validation_layer_support(void)
static void create_window(PGRAPHVkState *r, Error **errp)
{
+#ifdef __ANDROID__
+ /*
+ * Android supports a single SDL window per process for this app flow.
+ * The Vulkan renderer is headless and only needs instance/device setup,
+ * so skip creating a hidden Vulkan window here.
+ */
+ r->window = NULL;
+ return;
+#endif
r->window = SDL_CreateWindow(
"SDL Offscreen Window", SDL_WINDOWPOS_CENTERED, SDL_WINDOWPOS_CENTERED,
640, 480, SDL_WINDOW_VULKAN | SDL_WINDOW_HIDDEN);
@@ -155,13 +168,15 @@ static StringArray *get_required_instance_extension_names(PGRAPHState *pg)
// Add instance extensions SDL lists as required
unsigned int sdl_count = 0;
- SDL_Vulkan_GetInstanceExtensions((SDL_Window *)r->window, &sdl_count, NULL);
+ if (r->window) {
+ SDL_Vulkan_GetInstanceExtensions((SDL_Window *)r->window, &sdl_count, NULL);
+ }
StringArray *extensions =
g_array_sized_new(FALSE, FALSE, sizeof(char *),
sdl_count + ARRAY_SIZE(required_instance_extensions));
- if (sdl_count) {
+ if (sdl_count && r->window) {
g_array_set_size(extensions, sdl_count);
SDL_Vulkan_GetInstanceExtensions((SDL_Window *)r->window, &sdl_count,
(const char **)extensions->data);
@@ -553,32 +568,63 @@ static bool create_logical_device(PGRAPHState *pg, Error **errp)
.enabled = &r->enabled_physical_device_features.n, \
.required = req, \
}
- F(depthClamp, true),
- F(fillModeNonSolid, true),
+ F(depthClamp, false),
+ F(fillModeNonSolid, false),
F(geometryShader, true),
- F(occlusionQueryPrecise, true),
+ F(occlusionQueryPrecise, false),
F(samplerAnisotropy, false),
- F(shaderClipDistance, true),
- F(shaderTessellationAndGeometryPointSize, true),
+ F(shaderClipDistance, false),
+ F(shaderTessellationAndGeometryPointSize, false),
F(wideLines, false),
#undef F
// clang-format on
};
bool all_required_features_available = true;
+ char missing_required_features[256] = { 0 };
+ size_t missing_required_len = 0;
for (int i = 0; i < ARRAY_SIZE(desired_features); i++) {
+ fprintf(stderr, "Vulkan feature %-36s : %s%s\n",
+ desired_features[i].name,
+ desired_features[i].available == VK_TRUE ? "available" : "missing",
+ desired_features[i].required ? " (required)" : "");
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "vk feature %s: %s%s",
+ desired_features[i].name,
+ desired_features[i].available == VK_TRUE ? "available" : "missing",
+ desired_features[i].required ? " (required)" : "");
+#endif
if (desired_features[i].required &&
desired_features[i].available != VK_TRUE) {
fprintf(stderr,
"Error: Device does not support required feature %s\n",
desired_features[i].name);
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "vk required feature missing: %s",
+ desired_features[i].name);
+#endif
+ int n = snprintf(missing_required_features + missing_required_len,
+ sizeof(missing_required_features) - missing_required_len,
+ "%s%s",
+ missing_required_len ? ", " : "",
+ desired_features[i].name);
+ if (n > 0) {
+ size_t remaining = sizeof(missing_required_features) -
+ missing_required_len - 1;
+ size_t consumed = (size_t)n > remaining ? remaining : (size_t)n;
+ missing_required_len += consumed;
+ }
all_required_features_available = false;
}
*desired_features[i].enabled = desired_features[i].available;
}
if (!all_required_features_available) {
- error_setg(errp, "Device does not support required features");
+ error_setg(errp, "Device does not support required features: %s",
+ missing_required_features[0] ?
+ missing_required_features : "(unknown)");
return false;
}
diff --git a/hw/xbox/nv2a/pgraph/vk/renderer.c b/hw/xbox/nv2a/pgraph/vk/renderer.c
index 4272bbceb6..90d3536f45 100644
--- a/hw/xbox/nv2a/pgraph/vk/renderer.c
+++ b/hw/xbox/nv2a/pgraph/vk/renderer.c
@@ -22,6 +22,10 @@
#include "gloffscreen.h"
+#ifdef __ANDROID__
+#include
+#endif
+
#if HAVE_EXTERNAL_MEMORY
static GloContext *g_gl_context;
#endif
@@ -29,8 +33,16 @@ static GloContext *g_gl_context;
static void early_context_init(void)
{
#if HAVE_EXTERNAL_MEMORY
+#ifdef __ANDROID__
+ /*
+ * On Android, only cache EGL share/config on the SDL thread here.
+ * Create/bind the offscreen context later on the renderer thread.
+ */
+ glo_android_cache_current_egl_state();
+#else
g_gl_context = glo_context_create();
#endif
+#endif
}
static void pgraph_vk_init(NV2AState *d, Error **errp)
@@ -40,7 +52,28 @@ static void pgraph_vk_init(NV2AState *d, Error **errp)
pg->vk_renderer_state = (PGRAPHVkState *)g_malloc0(sizeof(PGRAPHVkState));
#if HAVE_EXTERNAL_MEMORY
+#ifdef __ANDROID__
+ if (!g_gl_context) {
+ // On Android, we need to ensure the main GL context is accessible
+ // for context sharing. The EGL state should already be cached.
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "pgraph_vk_init: creating GL offscreen context");
+ g_gl_context = glo_context_create();
+ if (!g_gl_context) {
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "pgraph_vk_init: glo_context_create failed");
+ }
+ }
+#endif
+ if (!g_gl_context) {
+ error_setg(errp, "Failed to create GL offscreen context for Vulkan display");
+ return;
+ }
glo_set_current(g_gl_context);
+ if (!pgraph_vk_gl_external_memory_available()) {
+ error_setg(errp, "GL_EXT_memory_object not available for Vulkan display");
+ return;
+ }
#endif
pgraph_vk_debug_init();
@@ -83,6 +116,13 @@ static void pgraph_vk_finalize(NV2AState *d)
g_free(pg->vk_renderer_state);
pg->vk_renderer_state = NULL;
+
+#if HAVE_EXTERNAL_MEMORY
+ if (g_gl_context) {
+ glo_context_destroy(g_gl_context);
+ g_gl_context = NULL;
+ }
+#endif
}
static void pgraph_vk_flush(NV2AState *d)
@@ -238,6 +278,16 @@ static void __attribute__((constructor)) register_renderer(void)
pgraph_renderer_register(&pgraph_vk_renderer);
}
+void pgraph_vk_force_register(void)
+{
+ static bool registered = false;
+ if (registered) {
+ return;
+ }
+ pgraph_renderer_register(&pgraph_vk_renderer);
+ registered = true;
+}
+
void pgraph_vk_check_memory_budget(PGRAPHState *pg)
{
#if 0 // FIXME
diff --git a/hw/xbox/nv2a/pgraph/vk/renderer.h b/hw/xbox/nv2a/pgraph/vk/renderer.h
index 8cf9e4d663..839c2a8493 100644
--- a/hw/xbox/nv2a/pgraph/vk/renderer.h
+++ b/hw/xbox/nv2a/pgraph/vk/renderer.h
@@ -41,7 +41,7 @@
#include "constants.h"
#include "glsl.h"
-#define HAVE_EXTERNAL_MEMORY 1
+#define HAVE_EXTERNAL_MEMORY 0
typedef struct QueueFamilyIndices {
int queue_family;
@@ -541,6 +541,7 @@ void pgraph_vk_unpack_depth_stencil(PGRAPHState *pg, SurfaceBinding *surface,
void pgraph_vk_init_display(PGRAPHState *pg);
void pgraph_vk_finalize_display(PGRAPHState *pg);
void pgraph_vk_render_display(PGRAPHState *pg);
+bool pgraph_vk_gl_external_memory_available(void);
// texture.c
void pgraph_vk_init_textures(PGRAPHState *pg);
diff --git a/hw/xbox/smbus_storage.c b/hw/xbox/smbus_storage.c
index e2e0497b26..40f6b4dd54 100644
--- a/hw/xbox/smbus_storage.c
+++ b/hw/xbox/smbus_storage.c
@@ -184,3 +184,9 @@ static void smbus_storage_register_devices(void)
}
type_init(smbus_storage_register_devices)
+
+#ifdef __ANDROID__
+void xemu_android_force_smbus_storage_link(void)
+{
+}
+#endif
diff --git a/include/hw/ide.h b/include/hw/ide.h
new file mode 100644
index 0000000000..364b67de8f
--- /dev/null
+++ b/include/hw/ide.h
@@ -0,0 +1,6 @@
+#ifndef HW_IDE_H
+#define HW_IDE_H
+
+#include "system/blockdev.h"
+
+#endif /* HW_IDE_H */
diff --git a/include/nv2a_vsh_emulator.h b/include/nv2a_vsh_emulator.h
new file mode 100644
index 0000000000..a29b53a7b3
--- /dev/null
+++ b/include/nv2a_vsh_emulator.h
@@ -0,0 +1,48 @@
+#ifndef NV2A_VSH_EMULATOR_H
+#define NV2A_VSH_EMULATOR_H
+
+#include
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct Nv2aVshProgram {
+ uint32_t placeholder;
+} Nv2aVshProgram;
+
+typedef enum Nv2aVshParseResult {
+ NV2AVPR_SUCCESS = 0,
+ NV2AVPR_ERROR = 1,
+} Nv2aVshParseResult;
+
+typedef struct Nv2aVshCPUXVSSExecutionState {
+ float input_regs[4];
+} Nv2aVshCPUXVSSExecutionState;
+
+typedef struct Nv2aVshExecutionState {
+ Nv2aVshCPUXVSSExecutionState *linkage;
+ float *constants;
+} Nv2aVshExecutionState;
+
+Nv2aVshParseResult nv2a_vsh_parse_program(Nv2aVshProgram *program,
+ const uint32_t *code,
+ uint32_t code_length);
+
+void nv2a_vsh_program_destroy(Nv2aVshProgram *program);
+
+Nv2aVshExecutionState nv2a_vsh_emu_initialize_xss_execution_state(
+ Nv2aVshCPUXVSSExecutionState *linkage,
+ float *constants);
+
+void nv2a_vsh_emu_execute_track_context_writes(
+ Nv2aVshExecutionState *state,
+ const Nv2aVshProgram *program,
+ bool *constants_dirty);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/include/samplerate.h b/include/samplerate.h
new file mode 100644
index 0000000000..94e79a9a8c
--- /dev/null
+++ b/include/samplerate.h
@@ -0,0 +1,30 @@
+#ifndef SAMPLERATE_H
+#define SAMPLERATE_H
+
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct SRC_STATE SRC_STATE;
+
+typedef long (*src_callback_t)(void *cb_data, float **data);
+
+enum {
+ SRC_SINC_FASTEST = 0,
+};
+
+SRC_STATE *src_callback_new(src_callback_t cb, int converter_type, int channels,
+ int *error, void *cb_data);
+long src_callback_read(SRC_STATE *state, double ratio, long frames, float *data);
+int src_reset(SRC_STATE *state);
+const char *src_strerror(int error);
+
+void src_float_to_short_array(const float *in, short *out, int len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SAMPLERATE_H */
diff --git a/include/xemu-config.h b/include/xemu-config.h
new file mode 100644
index 0000000000..9a01c7ccd8
--- /dev/null
+++ b/include/xemu-config.h
@@ -0,0 +1,294 @@
+#ifndef XEMU_CONFIG_H
+#define XEMU_CONFIG_H
+
+#include
+#include
+
+typedef enum CONFIG_DISPLAY_RENDERER {
+ CONFIG_DISPLAY_RENDERER_NULL = 0,
+ CONFIG_DISPLAY_RENDERER_OPENGL,
+ CONFIG_DISPLAY_RENDERER_VULKAN,
+ CONFIG_DISPLAY_RENDERER__COUNT,
+} CONFIG_DISPLAY_RENDERER;
+
+typedef enum CONFIG_DISPLAY_FILTERING {
+ CONFIG_DISPLAY_FILTERING_LINEAR = 0,
+ CONFIG_DISPLAY_FILTERING_NEAREST,
+ CONFIG_DISPLAY_FILTERING__COUNT,
+} CONFIG_DISPLAY_FILTERING;
+
+typedef enum CONFIG_DISPLAY_WINDOW_STARTUP_SIZE {
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_LAST_USED = 0,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_640X480,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_720X480,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_1280X720,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_1280X800,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_1280X960,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_1920X1080,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_2560X1440,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_2560X1600,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_2560X1920,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE_3840X2160,
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE__COUNT,
+} CONFIG_DISPLAY_WINDOW_STARTUP_SIZE;
+
+typedef enum CONFIG_DISPLAY_UI_FIT {
+ CONFIG_DISPLAY_UI_FIT_CENTER = 0,
+ CONFIG_DISPLAY_UI_FIT_SCALE,
+ CONFIG_DISPLAY_UI_FIT_STRETCH,
+ CONFIG_DISPLAY_UI_FIT__COUNT,
+} CONFIG_DISPLAY_UI_FIT;
+
+typedef enum CONFIG_DISPLAY_UI_ASPECT_RATIO {
+ CONFIG_DISPLAY_UI_ASPECT_RATIO_NATIVE = 0,
+ CONFIG_DISPLAY_UI_ASPECT_RATIO_AUTO,
+ CONFIG_DISPLAY_UI_ASPECT_RATIO_4X3,
+ CONFIG_DISPLAY_UI_ASPECT_RATIO_16X9,
+ CONFIG_DISPLAY_UI_ASPECT_RATIO__COUNT,
+} CONFIG_DISPLAY_UI_ASPECT_RATIO;
+
+typedef enum CONFIG_NET_BACKEND {
+ CONFIG_NET_BACKEND_NAT = 0,
+ CONFIG_NET_BACKEND_UDP,
+ CONFIG_NET_BACKEND_PCAP,
+ CONFIG_NET_BACKEND__COUNT,
+} CONFIG_NET_BACKEND;
+
+typedef enum CONFIG_NET_NAT_FORWARD_PORTS_PROTOCOL {
+ CONFIG_NET_NAT_FORWARD_PORTS_PROTOCOL_TCP = 0,
+ CONFIG_NET_NAT_FORWARD_PORTS_PROTOCOL_UDP,
+ CONFIG_NET_NAT_FORWARD_PORTS_PROTOCOL__COUNT,
+} CONFIG_NET_NAT_FORWARD_PORTS_PROTOCOL;
+
+typedef enum CONFIG_SYS_MEM_LIMIT {
+ CONFIG_SYS_MEM_LIMIT_64 = 0,
+ CONFIG_SYS_MEM_LIMIT_128,
+ CONFIG_SYS_MEM_LIMIT__COUNT,
+} CONFIG_SYS_MEM_LIMIT;
+
+typedef enum CONFIG_SYS_AVPACK {
+ CONFIG_SYS_AVPACK_SCART = 0,
+ CONFIG_SYS_AVPACK_HDTV,
+ CONFIG_SYS_AVPACK_VGA,
+ CONFIG_SYS_AVPACK_RFU,
+ CONFIG_SYS_AVPACK_SVIDEO,
+ CONFIG_SYS_AVPACK_COMPOSITE,
+ CONFIG_SYS_AVPACK_NONE,
+ CONFIG_SYS_AVPACK__COUNT,
+} CONFIG_SYS_AVPACK;
+
+struct config {
+ struct general {
+ bool show_welcome;
+ struct {
+ bool check;
+ } updates;
+ const char *screenshot_dir;
+ const char *games_dir;
+ bool skip_boot_anim;
+ int last_viewed_menu_index;
+ const char *user_token;
+ struct {
+ struct {
+ const char *f5;
+ const char *f6;
+ const char *f7;
+ const char *f8;
+ } shortcuts;
+ bool filter_current_game;
+ } snapshots;
+ } general;
+
+ struct input {
+ struct bindings {
+ const char *port1_driver;
+ const char *port1;
+ const char *port2_driver;
+ const char *port2;
+ const char *port3_driver;
+ const char *port3;
+ const char *port4_driver;
+ const char *port4;
+ } bindings;
+ struct peripherals {
+ struct {
+ int peripheral_type_0;
+ const char *peripheral_param_0;
+ int peripheral_type_1;
+ const char *peripheral_param_1;
+ } port1;
+ struct {
+ int peripheral_type_0;
+ const char *peripheral_param_0;
+ int peripheral_type_1;
+ const char *peripheral_param_1;
+ } port2;
+ struct {
+ int peripheral_type_0;
+ const char *peripheral_param_0;
+ int peripheral_type_1;
+ const char *peripheral_param_1;
+ } port3;
+ struct {
+ int peripheral_type_0;
+ const char *peripheral_param_0;
+ int peripheral_type_1;
+ const char *peripheral_param_1;
+ } port4;
+ } peripherals;
+ const char *gamecontrollerdb_path;
+ bool auto_bind;
+ bool allow_vibration;
+ bool background_input_capture;
+ struct keyboard_controller_scancode_map {
+ int a;
+ int b;
+ int x;
+ int y;
+ int dpad_left;
+ int dpad_up;
+ int dpad_right;
+ int dpad_down;
+ int back;
+ int start;
+ int white;
+ int black;
+ int lstick_btn;
+ int rstick_btn;
+ int guide;
+ int lstick_up;
+ int lstick_left;
+ int lstick_right;
+ int lstick_down;
+ int ltrigger;
+ int rstick_up;
+ int rstick_left;
+ int rstick_right;
+ int rstick_down;
+ int rtrigger;
+ } keyboard_controller_scancode_map;
+ struct gamepad_mappings {
+ const char *gamepad_id;
+ bool enable_rumble;
+ struct controller_mapping {
+ int a;
+ int b;
+ int x;
+ int y;
+ int back;
+ int guide;
+ int start;
+ int lstick_btn;
+ int rstick_btn;
+ int lshoulder;
+ int rshoulder;
+ int dpad_up;
+ int dpad_down;
+ int dpad_left;
+ int dpad_right;
+ int axis_left_x;
+ int axis_left_y;
+ int axis_right_x;
+ int axis_right_y;
+ int axis_trigger_left;
+ int axis_trigger_right;
+ bool invert_axis_left_x;
+ bool invert_axis_left_y;
+ bool invert_axis_right_x;
+ bool invert_axis_right_y;
+ } controller_mapping;
+ } *gamepad_mappings;
+ unsigned int gamepad_mappings_count;
+ } input;
+
+ struct display {
+ CONFIG_DISPLAY_RENDERER renderer;
+ struct {
+ bool validation_layers;
+ bool debug_shaders;
+ bool assert_on_validation_msg;
+ const char *preferred_physical_device;
+ } vulkan;
+ struct {
+ int surface_scale;
+ } quality;
+ CONFIG_DISPLAY_FILTERING filtering;
+ struct window {
+ bool fullscreen_on_startup;
+ bool fullscreen_exclusive;
+ CONFIG_DISPLAY_WINDOW_STARTUP_SIZE startup_size;
+ int last_width;
+ int last_height;
+ bool vsync;
+ } window;
+ struct ui {
+ bool show_menubar;
+ bool show_notifications;
+ bool hide_cursor;
+ bool use_animations;
+ CONFIG_DISPLAY_UI_FIT fit;
+ CONFIG_DISPLAY_UI_ASPECT_RATIO aspect_ratio;
+ int scale;
+ bool auto_scale;
+ } ui;
+ struct debug {
+ struct video {
+ bool transparency;
+ double x_pos;
+ double y_pos;
+ double x_winsize;
+ double y_winsize;
+ bool advanced_tree_state;
+ } video;
+ } debug;
+ bool setup_nvidia_profile;
+ } display;
+
+ struct audio {
+ struct {
+ int num_workers;
+ } vp;
+ bool use_dsp;
+ bool hrtf;
+ double volume_limit;
+ } audio;
+
+ struct net {
+ bool enable;
+ CONFIG_NET_BACKEND backend;
+ struct {
+ const char *netif;
+ } pcap;
+ struct {
+ const char *bind_addr;
+ const char *remote_addr;
+ } udp;
+ struct {
+ struct forward_port {
+ int host;
+ int guest;
+ CONFIG_NET_NAT_FORWARD_PORTS_PROTOCOL protocol;
+ } *forward_ports;
+ unsigned int forward_ports_count;
+ } nat;
+ } net;
+
+ struct sys {
+ CONFIG_SYS_MEM_LIMIT mem_limit;
+ CONFIG_SYS_AVPACK avpack;
+ struct files {
+ const char *bootrom_path;
+ const char *flashrom_path;
+ const char *eeprom_path;
+ const char *hdd_path;
+ const char *dvd_path;
+ } files;
+ } sys;
+
+ struct perf {
+ bool hard_fpu;
+ bool cache_shaders;
+ } perf;
+};
+
+#endif /* XEMU_CONFIG_H */
diff --git a/monitor/monitor.c b/monitor/monitor.c
index c5a5d30877..a11613f249 100644
--- a/monitor/monitor.c
+++ b/monitor/monitor.c
@@ -33,6 +33,9 @@
#include "qemu/option.h"
#include "system/qtest.h"
#include "trace.h"
+#ifdef __ANDROID__
+#include
+#endif
/*
* To prevent flooding clients, events can be throttled. The
@@ -278,7 +281,17 @@ int error_vprintf(const char *fmt, va_list ap)
if (cur_mon && !monitor_cur_is_qmp()) {
return monitor_vprintf(cur_mon, fmt, ap);
}
+#ifdef __ANDROID__
+ char buf[1024];
+ va_list ap_copy;
+ va_copy(ap_copy, ap);
+ int len = vsnprintf(buf, sizeof(buf), fmt, ap_copy);
+ va_end(ap_copy);
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android", "%s", buf);
+ return len;
+#else
return vfprintf(stderr, fmt, ap);
+#endif
}
int error_vprintf_unless_qmp(const char *fmt, va_list ap)
@@ -286,7 +299,17 @@ int error_vprintf_unless_qmp(const char *fmt, va_list ap)
Monitor *cur_mon = monitor_cur();
if (!cur_mon) {
+#ifdef __ANDROID__
+ char buf[1024];
+ va_list ap_copy;
+ va_copy(ap_copy, ap);
+ int len = vsnprintf(buf, sizeof(buf), fmt, ap_copy);
+ va_end(ap_copy);
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android", "%s", buf);
+ return len;
+#else
return vfprintf(stderr, fmt, ap);
+#endif
}
if (!monitor_cur_is_qmp()) {
return monitor_vprintf(cur_mon, fmt, ap);
diff --git a/qemu-options.def b/qemu-options.def
new file mode 100644
index 0000000000..79045e0381
--- /dev/null
+++ b/qemu-options.def
@@ -0,0 +1,1105 @@
+
+DEFHEADING(Standard options:)
+
+DEF("help", 0, QEMU_OPTION_h,
+ "-h or -help display this help and exit\n", QEMU_ARCH_ALL)
+
+DEF("version", 0, QEMU_OPTION_version,
+ "-version display version information and exit\n", QEMU_ARCH_ALL)
+
+DEF("machine", HAS_ARG, QEMU_OPTION_machine, \
+ "-machine [type=]name[,prop[=value][,...]]\n"
+ " selects emulated machine ('-machine help' for list)\n"
+ " property accel=accel1[:accel2[:...]] selects accelerator\n"
+ " supported accelerators are kvm, xen, hvf, nvmm, whpx, mshv or tcg (default: tcg)\n"
+ " vmport=on|off|auto controls emulation of vmport (default: auto)\n"
+ " dump-guest-core=on|off include guest memory in a core dump (default=on)\n"
+ " mem-merge=on|off controls memory merge support (default: on)\n"
+ " aes-key-wrap=on|off controls support for AES key wrapping (default=on)\n"
+ " dea-key-wrap=on|off controls support for DEA key wrapping (default=on)\n"
+ " suppress-vmdesc=on|off disables self-describing migration (default=off)\n"
+ " nvdimm=on|off controls NVDIMM support (default=off)\n"
+ " memory-encryption=@var{} memory encryption object to use (default=none)\n"
+ " hmat=on|off controls ACPI HMAT support (default=off)\n"
+ " spcr=on|off controls ACPI SPCR support (default=on)\n"
+#ifdef CONFIG_POSIX
+ " aux-ram-share=on|off allocate auxiliary guest RAM as shared (default: off)\n"
+#endif
+ " memory-backend='backend-id' specifies explicitly provided backend for main RAM (default=none)\n"
+ " cxl-fmw.0.targets.0=firsttarget,cxl-fmw.0.targets.1=secondtarget,cxl-fmw.0.size=size[,cxl-fmw.0.interleave-granularity=granularity]\n"
+ " smp-cache.0.cache=cachename,smp-cache.0.topology=topologylevel\n",
+ QEMU_ARCH_ALL)
+
+DEF("M", HAS_ARG, QEMU_OPTION_M,
+ " sgx-epc.0.memdev=memid,sgx-epc.0.node=numaid\n",
+ QEMU_ARCH_ALL)
+
+
+DEF("cpu", HAS_ARG, QEMU_OPTION_cpu,
+ "-cpu cpu select CPU ('-cpu help' for list)\n", QEMU_ARCH_ALL)
+
+DEF("accel", HAS_ARG, QEMU_OPTION_accel,
+ "-accel [accel=]accelerator[,prop[=value][,...]]\n"
+ " select accelerator (kvm, xen, hvf, nvmm, whpx, mshv or tcg; use 'help' for a list)\n"
+ " igd-passthru=on|off (enable Xen integrated Intel graphics passthrough, default=off)\n"
+ " kernel-irqchip=on|off|split controls accelerated irqchip support (default=on)\n"
+ " kvm-shadow-mem=size of KVM shadow MMU in bytes\n"
+ " one-insn-per-tb=on|off (one guest instruction per TCG translation block)\n"
+ " split-wx=on|off (enable TCG split w^x mapping)\n"
+ " tb-size=n (TCG translation block cache size)\n"
+ " dirty-ring-size=n (KVM dirty ring GFN count, default 0)\n"
+ " eager-split-size=n (KVM Eager Page Split chunk size, default 0, disabled. ARM only)\n"
+ " notify-vmexit=run|internal-error|disable,notify-window=n (enable notify VM exit and set notify window, x86 only)\n"
+ " thread=single|multi (enable multi-threaded TCG)\n"
+ " device=path (KVM device path, default /dev/kvm)\n", QEMU_ARCH_ALL)
+
+DEF("smp", HAS_ARG, QEMU_OPTION_smp,
+ "-smp [[cpus=]n][,maxcpus=maxcpus][,drawers=drawers][,books=books][,sockets=sockets]\n"
+ " [,dies=dies][,clusters=clusters][,modules=modules][,cores=cores]\n"
+ " [,threads=threads]\n"
+ " set the number of initial CPUs to 'n' [default=1]\n"
+ " maxcpus= maximum number of total CPUs, including\n"
+ " offline CPUs for hotplug, etc\n"
+ " drawers= number of drawers on the machine board\n"
+ " books= number of books in one drawer\n"
+ " sockets= number of sockets in one book\n"
+ " dies= number of dies in one socket\n"
+ " clusters= number of clusters in one die\n"
+ " modules= number of modules in one cluster\n"
+ " cores= number of cores in one module\n"
+ " threads= number of threads in one core\n"
+ "Note: Different machines may have different subsets of the CPU topology\n"
+ " parameters supported, so the actual meaning of the supported parameters\n"
+ " will vary accordingly. For example, for a machine type that supports a\n"
+ " three-level CPU hierarchy of sockets/cores/threads, the parameters will\n"
+ " sequentially mean as below:\n"
+ " sockets means the number of sockets on the machine board\n"
+ " cores means the number of cores in one socket\n"
+ " threads means the number of threads in one core\n"
+ " For a particular machine type board, an expected CPU topology hierarchy\n"
+ " can be defined through the supported sub-option. Unsupported parameters\n"
+ " can also be provided in addition to the sub-option, but their values\n"
+ " must be set as 1 in the purpose of correct parsing.\n",
+ QEMU_ARCH_ALL)
+
+DEF("numa", HAS_ARG, QEMU_OPTION_numa,
+ "-numa node[,mem=size][,cpus=firstcpu[-lastcpu]][,nodeid=node][,initiator=node]\n"
+ "-numa node[,memdev=id][,cpus=firstcpu[-lastcpu]][,nodeid=node][,initiator=node]\n"
+ "-numa dist,src=source,dst=destination,val=distance\n"
+ "-numa cpu,node-id=node[,socket-id=x][,core-id=y][,thread-id=z]\n"
+ "-numa hmat-lb,initiator=node,target=node,hierarchy=memory|first-level|second-level|third-level,data-type=access-latency|read-latency|write-latency[,latency=lat][,bandwidth=bw]\n"
+ "-numa hmat-cache,node-id=node,size=size,level=level[,associativity=none|direct|complex][,policy=none|write-back|write-through][,line=size]\n",
+ QEMU_ARCH_ALL)
+
+DEF("add-fd", HAS_ARG, QEMU_OPTION_add_fd,
+ "-add-fd fd=fd,set=set[,opaque=opaque]\n"
+ " Add 'fd' to fd 'set'\n", QEMU_ARCH_ALL)
+
+DEF("set", HAS_ARG, QEMU_OPTION_set,
+ "-set group.id.arg=value\n"
+ " set parameter for item of type \n"
+ " i.e. -set drive.$id.file=/path/to/image\n", QEMU_ARCH_ALL)
+
+DEF("global", HAS_ARG, QEMU_OPTION_global,
+ "-global driver.property=value\n"
+ "-global driver=driver,property=property,value=value\n"
+ " set a global default for a driver property\n",
+ QEMU_ARCH_ALL)
+
+DEF("boot", HAS_ARG, QEMU_OPTION_boot,
+ "-boot [order=drives][,once=drives][,menu=on|off]\n"
+ " [,splash=sp_name][,splash-time=sp_time][,reboot-timeout=rb_time][,strict=on|off]\n"
+ " 'drives': floppy (a), hard disk (c), CD-ROM (d), network (n)\n"
+ " 'sp_name': the file's name that would be passed to bios as logo picture, if menu=on\n"
+ " 'sp_time': the period that splash picture last if menu=on, unit is ms\n"
+ " 'rb_timeout': the timeout before guest reboot when boot failed, unit is ms\n",
+ QEMU_ARCH_ALL)
+
+DEF("m", HAS_ARG, QEMU_OPTION_m,
+ "-m [size=]megs[,slots=n,maxmem=size]\n"
+ " configure guest RAM\n"
+ " size: initial amount of guest memory\n"
+ " slots: number of hotplug slots (default: none)\n"
+ " maxmem: maximum amount of guest memory (default: none)\n"
+ " Note: Some architectures might enforce a specific granularity\n",
+ QEMU_ARCH_ALL)
+
+DEF("mem-path", HAS_ARG, QEMU_OPTION_mempath,
+ "-mem-path FILE provide backing storage for guest RAM\n", QEMU_ARCH_ALL)
+
+DEF("mem-prealloc", 0, QEMU_OPTION_mem_prealloc,
+ "-mem-prealloc preallocate guest memory (use with -mem-path)\n",
+ QEMU_ARCH_ALL)
+
+DEF("k", HAS_ARG, QEMU_OPTION_k,
+ "-k language use keyboard layout (for example 'fr' for French)\n",
+ QEMU_ARCH_ALL)
+
+
+DEF("audio", HAS_ARG, QEMU_OPTION_audio,
+ "-audio [driver=]driver[,prop[=value][,...]]\n"
+ " specifies default audio backend when `audiodev` is not\n"
+ " used to create a machine or sound device;"
+ " options are the same as for -audiodev\n"
+ "-audio [driver=]driver,model=value[,prop[=value][,...]]\n"
+ " specifies the audio backend and device to use;\n"
+ " apart from 'model', options are the same as for -audiodev.\n"
+ " use '-audio model=help' to show possible devices.\n",
+ QEMU_ARCH_ALL)
+
+DEF("audiodev", HAS_ARG, QEMU_OPTION_audiodev,
+ "-audiodev [driver=]driver,id=id[,prop[=value][,...]]\n"
+ " specifies the audio backend to use\n"
+ " Use ``-audiodev help`` to list the available drivers\n"
+ " id= identifier of the backend\n"
+ " timer-period= timer period in microseconds\n"
+ " in|out.mixing-engine= use mixing engine to mix streams inside QEMU\n"
+ " in|out.fixed-settings= use fixed settings for host audio\n"
+ " in|out.frequency= frequency to use with fixed settings\n"
+ " in|out.channels= number of channels to use with fixed settings\n"
+ " in|out.format= sample format to use with fixed settings\n"
+ " valid values: s8, s16, s32, u8, u16, u32, f32\n"
+ " in|out.voices= number of voices to use\n"
+ " in|out.buffer-length= length of buffer in microseconds\n"
+ "-audiodev none,id=id,[,prop[=value][,...]]\n"
+ " dummy driver that discards all output\n"
+#ifdef CONFIG_AUDIO_ALSA
+ "-audiodev alsa,id=id[,prop[=value][,...]]\n"
+ " in|out.dev= name of the audio device to use\n"
+ " in|out.period-length= length of period in microseconds\n"
+ " in|out.try-poll= attempt to use poll mode\n"
+ " threshold= threshold (in microseconds) when playback starts\n"
+#endif
+#ifdef CONFIG_AUDIO_COREAUDIO
+ "-audiodev coreaudio,id=id[,prop[=value][,...]]\n"
+ " in|out.buffer-count= number of buffers\n"
+#endif
+#ifdef CONFIG_AUDIO_DSOUND
+ "-audiodev dsound,id=id[,prop[=value][,...]]\n"
+ " latency= add extra latency to playback in microseconds\n"
+#endif
+#ifdef CONFIG_AUDIO_OSS
+ "-audiodev oss,id=id[,prop[=value][,...]]\n"
+ " in|out.dev= path of the audio device to use\n"
+ " in|out.buffer-count= number of buffers\n"
+ " in|out.try-poll= attempt to use poll mode\n"
+ " try-mmap= try using memory mapped access\n"
+ " exclusive= open device in exclusive mode\n"
+ " dsp-policy= set timing policy (0..10), -1 to use fragment mode\n"
+#endif
+#ifdef CONFIG_AUDIO_PA
+ "-audiodev pa,id=id[,prop[=value][,...]]\n"
+ " server= PulseAudio server address\n"
+ " in|out.name= source/sink device name\n"
+ " in|out.latency= desired latency in microseconds\n"
+#endif
+#ifdef CONFIG_AUDIO_PIPEWIRE
+ "-audiodev pipewire,id=id[,prop[=value][,...]]\n"
+ " in|out.name= source/sink device name\n"
+ " in|out.stream-name= name of pipewire stream\n"
+ " in|out.latency= desired latency in microseconds\n"
+#endif
+#ifdef CONFIG_AUDIO_SDL
+ "-audiodev sdl,id=id[,prop[=value][,...]]\n"
+ " in|out.buffer-count= number of buffers\n"
+#endif
+#ifdef CONFIG_AUDIO_SNDIO
+ "-audiodev sndio,id=id[,prop[=value][,...]]\n"
+#endif
+#ifdef CONFIG_SPICE
+ "-audiodev spice,id=id[,prop[=value][,...]]\n"
+#endif
+#ifdef CONFIG_DBUS_DISPLAY
+ "-audiodev dbus,id=id[,prop[=value][,...]]\n"
+#endif
+ "-audiodev wav,id=id[,prop[=value][,...]]\n"
+ " path= path of wav file to record\n",
+ QEMU_ARCH_ALL)
+
+DEF("device", HAS_ARG, QEMU_OPTION_device,
+ "-device driver[,prop[=value][,...]]\n"
+ " add device (based on driver)\n"
+ " prop=value,... sets driver properties\n"
+ " use '-device help' to print all possible drivers\n"
+ " use '-device driver,help' to print all possible properties\n",
+ QEMU_ARCH_ALL)
+
+DEF("name", HAS_ARG, QEMU_OPTION_name,
+ "-name string1[,process=string2][,debug-threads=on|off]\n"
+ " set the name of the guest\n"
+ " string1 sets the window title and string2 the process name\n"
+ " When debug-threads is enabled, individual threads are given a separate name\n"
+ " NOTE: The thread names are for debugging and not a stable API.\n",
+ QEMU_ARCH_ALL)
+
+DEF("uuid", HAS_ARG, QEMU_OPTION_uuid,
+ "-uuid %08x-%04x-%04x-%04x-%012x\n"
+ " specify machine UUID\n", QEMU_ARCH_ALL)
+
+DEFHEADING()
+
+DEFHEADING(Block device options:)
+
+
+DEF("fda", HAS_ARG, QEMU_OPTION_fda,
+ "-fda/-fdb file use 'file' as floppy disk 0/1 image\n", QEMU_ARCH_ALL)
+DEF("fdb", HAS_ARG, QEMU_OPTION_fdb, "", QEMU_ARCH_ALL)
+
+DEF("hda", HAS_ARG, QEMU_OPTION_hda,
+ "-hda/-hdb file use 'file' as hard disk 0/1 image\n", QEMU_ARCH_ALL)
+DEF("hdb", HAS_ARG, QEMU_OPTION_hdb, "", QEMU_ARCH_ALL)
+DEF("hdc", HAS_ARG, QEMU_OPTION_hdc,
+ "-hdc/-hdd file use 'file' as hard disk 2/3 image\n", QEMU_ARCH_ALL)
+DEF("hdd", HAS_ARG, QEMU_OPTION_hdd, "", QEMU_ARCH_ALL)
+
+DEF("cdrom", HAS_ARG, QEMU_OPTION_cdrom,
+ "-cdrom file use 'file' as CD-ROM image\n",
+ QEMU_ARCH_ALL)
+
+DEF("blockdev", HAS_ARG, QEMU_OPTION_blockdev,
+ "-blockdev [driver=]driver[,node-name=N][,discard=ignore|unmap]\n"
+ " [,cache.direct=on|off][,cache.no-flush=on|off]\n"
+ " [,read-only=on|off][,auto-read-only=on|off]\n"
+ " [,force-share=on|off][,detect-zeroes=on|off|unmap]\n"
+ " [,driver specific parameters...]\n"
+ " configure a block backend\n", QEMU_ARCH_ALL)
+
+DEF("drive", HAS_ARG, QEMU_OPTION_drive,
+ "-drive [file=file][,if=type][,bus=n][,unit=m][,media=d][,index=i]\n"
+ " [,cache=writethrough|writeback|none|directsync|unsafe][,format=f]\n"
+ " [,snapshot=on|off][,rerror=ignore|stop|report]\n"
+ " [,werror=ignore|stop|report|enospc][,id=name]\n"
+ " [,aio=threads|native|io_uring]\n"
+ " [,readonly=on|off][,copy-on-read=on|off]\n"
+ " [,discard=ignore|unmap][,detect-zeroes=on|off|unmap]\n"
+ " [[,bps=b]|[[,bps_rd=r][,bps_wr=w]]]\n"
+ " [[,iops=i]|[[,iops_rd=r][,iops_wr=w]]]\n"
+ " [[,bps_max=bm]|[[,bps_rd_max=rm][,bps_wr_max=wm]]]\n"
+ " [[,iops_max=im]|[[,iops_rd_max=irm][,iops_wr_max=iwm]]]\n"
+ " [[,iops_size=is]]\n"
+ " [[,group=g]]\n"
+ " use 'file' as a drive image\n", QEMU_ARCH_ALL)
+
+DEF("mtdblock", HAS_ARG, QEMU_OPTION_mtdblock,
+ "-mtdblock file use 'file' as on-board Flash memory image\n",
+ QEMU_ARCH_ALL)
+
+DEF("sd", HAS_ARG, QEMU_OPTION_sd,
+ "-sd file use 'file' as SecureDigital card image\n", QEMU_ARCH_ALL)
+
+DEF("snapshot", 0, QEMU_OPTION_snapshot,
+ "-snapshot write to temporary files instead of disk image files\n",
+ QEMU_ARCH_ALL)
+
+DEF("fsdev", HAS_ARG, QEMU_OPTION_fsdev,
+ "-fsdev local,id=id,path=path,security_model=mapped-xattr|mapped-file|passthrough|none\n"
+ " [,writeout=immediate][,readonly=on][,fmode=fmode][,dmode=dmode]\n"
+ " [[,throttling.bps-total=b]|[[,throttling.bps-read=r][,throttling.bps-write=w]]]\n"
+ " [[,throttling.iops-total=i]|[[,throttling.iops-read=r][,throttling.iops-write=w]]]\n"
+ " [[,throttling.bps-total-max=bm]|[[,throttling.bps-read-max=rm][,throttling.bps-write-max=wm]]]\n"
+ " [[,throttling.iops-total-max=im]|[[,throttling.iops-read-max=irm][,throttling.iops-write-max=iwm]]]\n"
+ " [[,throttling.iops-size=is]]\n"
+ "-fsdev synth,id=id\n",
+ QEMU_ARCH_ALL)
+
+
+DEF("virtfs", HAS_ARG, QEMU_OPTION_virtfs,
+ "-virtfs local,path=path,mount_tag=tag,security_model=mapped-xattr|mapped-file|passthrough|none\n"
+ " [,id=id][,writeout=immediate][,readonly=on][,fmode=fmode][,dmode=dmode][,multidevs=remap|forbid|warn]\n"
+ "-virtfs synth,mount_tag=tag[,id=id][,readonly=on]\n",
+ QEMU_ARCH_ALL)
+
+
+DEF("iscsi", HAS_ARG, QEMU_OPTION_iscsi,
+ "-iscsi [user=user][,password=password][,password-secret=secret-id]\n"
+ " [,header-digest=CRC32C|CR32C-NONE|NONE-CRC32C|NONE]\n"
+ " [,initiator-name=initiator-iqn][,id=target-iqn]\n"
+ " [,timeout=timeout]\n"
+ " iSCSI session parameters\n", QEMU_ARCH_ALL)
+
+
+DEFHEADING()
+
+DEFHEADING(USB convenience options:)
+
+DEF("usb", 0, QEMU_OPTION_usb,
+ "-usb enable on-board USB host controller (if not enabled by default)\n",
+ QEMU_ARCH_ALL)
+
+DEF("usbdevice", HAS_ARG, QEMU_OPTION_usbdevice,
+ "-usbdevice name add the host or guest USB device 'name'\n",
+ QEMU_ARCH_ALL)
+
+DEFHEADING()
+
+DEFHEADING(Display options:)
+
+DEF("display", HAS_ARG, QEMU_OPTION_display,
+#if defined(CONFIG_SPICE)
+ "-display spice-app[,gl=on|off]\n"
+#endif
+#if defined(CONFIG_SDL)
+ "-display sdl[,gl=on|core|es|off][,grab-mod=][,show-cursor=on|off]\n"
+ " [,window-close=on|off]\n"
+#endif
+#if defined(CONFIG_GTK)
+ "-display gtk[,full-screen=on|off][,gl=on|off][,grab-on-hover=on|off]\n"
+ " [,show-tabs=on|off][,show-cursor=on|off][,window-close=on|off]\n"
+ " [,show-menubar=on|off][,zoom-to-fit=on|off]\n"
+#endif
+#if defined(CONFIG_VNC)
+ "-display vnc=[,]\n"
+#endif
+#if defined(CONFIG_CURSES)
+ "-display curses[,charset=]\n"
+#endif
+#if defined(CONFIG_COCOA)
+ "-display cocoa[,full-grab=on|off][,swap-opt-cmd=on|off]\n"
+ " [,show-cursor=on|off][,left-command-key=on|off]\n"
+ " [,full-screen=on|off][,zoom-to-fit=on|off]\n"
+#endif
+#if defined(CONFIG_OPENGL)
+ "-display egl-headless[,rendernode=]\n"
+#endif
+#if defined(CONFIG_DBUS_DISPLAY)
+ "-display dbus[,addr=]\n"
+ " [,gl=on|core|es|off][,rendernode=]\n"
+#endif
+ "-display none\n"
+ " select display backend type\n"
+ " The default display is equivalent to\n "
+#if defined(CONFIG_GTK)
+ "\"-display gtk\"\n"
+#elif defined(CONFIG_SDL)
+ "\"-display sdl\"\n"
+#elif defined(CONFIG_COCOA)
+ "\"-display cocoa\"\n"
+#elif defined(CONFIG_VNC)
+ "\"-vnc localhost:0,to=99,id=default\"\n"
+#else
+ "\"-display none\"\n"
+#endif
+ , QEMU_ARCH_ALL)
+
+DEF("nographic", 0, QEMU_OPTION_nographic,
+ "-nographic disable graphical output and redirect serial I/Os to console\n",
+ QEMU_ARCH_ALL)
+
+#ifdef CONFIG_SPICE
+DEF("spice", HAS_ARG, QEMU_OPTION_spice,
+ "-spice [port=port][,tls-port=secured-port][,x509-dir=]\n"
+ " [,x509-key-file=][,x509-key-password=]\n"
+ " [,x509-cert-file=][,x509-cacert-file=]\n"
+ " [,x509-dh-key-file=][,addr=addr]\n"
+ " [,ipv4=on|off][,ipv6=on|off][,unix=on|off]\n"
+ " [,tls-ciphers=]\n"
+ " [,tls-channel=[main|display|cursor|inputs|record|playback]]\n"
+ " [,plaintext-channel=[main|display|cursor|inputs|record|playback]]\n"
+ " [,sasl=on|off][,disable-ticketing=on|off]\n"
+ " [,password-secret=]\n"
+ " [,image-compression=[auto_glz|auto_lz|quic|glz|lz|off]]\n"
+ " [,jpeg-wan-compression=[auto|never|always]]\n"
+ " [,zlib-glz-wan-compression=[auto|never|always]]\n"
+ " [,streaming-video=[off|all|filter]][,disable-copy-paste=on|off]\n"
+ " [,disable-agent-file-xfer=on|off][,agent-mouse=[on|off]]\n"
+ " [,playback-compression=[on|off]][,seamless-migration=[on|off]]\n"
+ " [,video-codec=\n"
+ " [,max-refresh-rate=rate\n"
+ " [,gl=[on|off]][,rendernode=]\n"
+ " enable spice\n"
+ " at least one of {port, tls-port} is mandatory\n",
+ QEMU_ARCH_ALL)
+#endif
+
+DEF("vga", HAS_ARG, QEMU_OPTION_vga,
+ "-vga [std|cirrus|vmware|qxl|xenfb|tcx|cg3|virtio|none]\n"
+ " select video card type\n", QEMU_ARCH_ALL)
+
+DEF("full-screen", 0, QEMU_OPTION_full_screen,
+ "-full-screen start in full screen\n", QEMU_ARCH_ALL)
+
+DEF("g", HAS_ARG, QEMU_OPTION_g ,
+ "-g WxH[xDEPTH] Set the initial graphical resolution and depth\n",
+ QEMU_ARCH_PPC | QEMU_ARCH_SPARC | QEMU_ARCH_M68K)
+
+#ifdef CONFIG_VNC
+DEF("vnc", HAS_ARG, QEMU_OPTION_vnc ,
+ "-vnc shorthand for -display vnc=\n", QEMU_ARCH_ALL)
+#endif
+
+ARCHHEADING(, QEMU_ARCH_I386)
+
+ARCHHEADING(i386 target only:, QEMU_ARCH_I386)
+
+DEF("win2k-hack", 0, QEMU_OPTION_win2k_hack,
+ "-win2k-hack use it when installing Windows 2000 to avoid a disk full bug\n",
+ QEMU_ARCH_I386)
+
+DEF("no-fd-bootchk", 0, QEMU_OPTION_no_fd_bootchk,
+ "-no-fd-bootchk disable boot signature checking for floppy disks\n",
+ QEMU_ARCH_I386)
+
+DEF("acpitable", HAS_ARG, QEMU_OPTION_acpitable,
+ "-acpitable [sig=str][,rev=n][,oem_id=str][,oem_table_id=str][,oem_rev=n][,asl_compiler_id=str][,asl_compiler_rev=n][,{data|file}=file1[:file2]...]\n"
+ " ACPI table description\n", QEMU_ARCH_I386)
+
+DEF("smbios", HAS_ARG, QEMU_OPTION_smbios,
+ "-smbios file=binary\n"
+ " load SMBIOS entry from binary file\n"
+ "-smbios type=0[,vendor=str][,version=str][,date=str][,release=%d.%d]\n"
+ " [,uefi=on|off][,vm=on|off]\n"
+ " specify SMBIOS type 0 fields\n"
+ "-smbios type=1[,manufacturer=str][,product=str][,version=str][,serial=str]\n"
+ " [,uuid=uuid][,sku=str][,family=str]\n"
+ " specify SMBIOS type 1 fields\n"
+ "-smbios type=2[,manufacturer=str][,product=str][,version=str][,serial=str]\n"
+ " [,asset=str][,location=str]\n"
+ " specify SMBIOS type 2 fields\n"
+ "-smbios type=3[,manufacturer=str][,version=str][,serial=str][,asset=str]\n"
+ " [,sku=str]\n"
+ " specify SMBIOS type 3 fields\n"
+ "-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str]\n"
+ " [,asset=str][,part=str][,max-speed=%d][,current-speed=%d]\n"
+ " [,processor-family=%d][,processor-id=%d]\n"
+ " specify SMBIOS type 4 fields\n"
+ "-smbios type=8[,external_reference=str][,internal_reference=str][,connector_type=%d][,port_type=%d]\n"
+ " specify SMBIOS type 8 fields\n"
+ "-smbios type=11[,value=str][,path=filename]\n"
+ " specify SMBIOS type 11 fields\n"
+ "-smbios type=17[,loc_pfx=str][,bank=str][,manufacturer=str][,serial=str]\n"
+ " [,asset=str][,part=str][,speed=%d]\n"
+ " specify SMBIOS type 17 fields\n"
+ "-smbios type=41[,designation=str][,kind=str][,instance=%d][,pcidev=str]\n"
+ " specify SMBIOS type 41 fields\n",
+ QEMU_ARCH_I386 | QEMU_ARCH_ARM | QEMU_ARCH_LOONGARCH | QEMU_ARCH_RISCV)
+
+DEFHEADING()
+
+DEFHEADING(Network options:)
+
+DEF("netdev", HAS_ARG, QEMU_OPTION_netdev,
+#ifdef CONFIG_PASST
+ "-netdev passt,id=str[,path=file][,quiet=on|off][,vhost-user=on|off]\n"
+ "[,mtu=mtu][,address=addr][,netmask=mask][,mac=addr][,gateway=addr]\n"
+ " [,interface=name][,outbound=address][,outbound-if4=name]\n"
+ " [,outbound-if6=name][,dns=addr][,search=list][,fqdn=name]\n"
+ " [,dhcp-dns=on|off][,dhcp-search=on|off][,map-host-loopback=addr]\n"
+ " [,map-guest-addr=addr][,dns-forward=addr][,dns-host=addr]\n"
+ " [,tcp=on|off][,udp=on|off][,icmp=on|off][,dhcp=on|off]\n"
+ " [,ndp=on|off][,dhcpv6=on|off][,ra=on|off][,freebind=on|off]\n"
+ " [,ipv4=on|off][,ipv6=on|off][,tcp-ports=spec][,udp-ports=spec]\n"
+ " [,param=list]\n"
+ " configure a passt network backend with ID 'str'\n"
+ " if 'path' is not provided 'passt' will be started according to PATH\n"
+ " by default, informational message of passt are not displayed (quiet=on)\n"
+ " to display this message, use 'quiet=off'\n"
+ " by default, passt will be started in socket-based mode, to enable vhost-mode,\n"
+ " use 'vhost-user=on'\n"
+ " for details on other options, refer to passt(1)\n"
+ " 'param' allows to pass any option defined by passt(1)\n"
+#endif
+#ifdef CONFIG_SLIRP
+ "-netdev user,id=str[,ipv4=on|off][,net=addr[/mask]][,host=addr]\n"
+ " [,ipv6=on|off][,ipv6-net=addr[/int]][,ipv6-host=addr]\n"
+ " [,restrict=on|off][,hostname=host][,dhcpstart=addr]\n"
+ " [,dns=addr][,ipv6-dns=addr][,dnssearch=domain][,domainname=domain]\n"
+ " [,tftp=dir][,tftp-server-name=name][,bootfile=f][,hostfwd=rule][,guestfwd=rule]"
+#ifndef _WIN32
+ "[,smb=dir[,smbserver=addr]]\n"
+#endif
+ " configure a user mode network backend with ID 'str',\n"
+ " its DHCP server and optional services\n"
+#endif
+#ifdef _WIN32
+ "-netdev tap,id=str,ifname=name\n"
+ " configure a host TAP network backend with ID 'str'\n"
+#else
+ "-netdev tap,id=str[,fd=h][,fds=x:y:...:z][,ifname=name][,script=file][,downscript=dfile]\n"
+ " [,br=bridge][,helper=helper][,sndbuf=nbytes][,vnet_hdr=on|off][,vhost=on|off]\n"
+ " [,vhostfd=h][,vhostfds=x:y:...:z][,vhostforce=on|off][,queues=n]\n"
+ " [,poll-us=n]\n"
+ " configure a host TAP network backend with ID 'str'\n"
+ " connected to a bridge (default=" DEFAULT_BRIDGE_INTERFACE ")\n"
+ " use network scripts 'file' (default=" DEFAULT_NETWORK_SCRIPT ")\n"
+ " to configure it and 'dfile' (default=" DEFAULT_NETWORK_DOWN_SCRIPT ")\n"
+ " to deconfigure it\n"
+ " use '[down]script=no' to disable script execution\n"
+ " use network helper 'helper' (default=" DEFAULT_BRIDGE_HELPER ") to\n"
+ " configure it\n"
+ " use 'fd=h' to connect to an already opened TAP interface\n"
+ " use 'fds=x:y:...:z' to connect to already opened multiqueue capable TAP interfaces\n"
+ " use 'sndbuf=nbytes' to limit the size of the send buffer (the\n"
+ " default is disabled 'sndbuf=0' to enable flow control set 'sndbuf=1048576')\n"
+ " use vnet_hdr=off to avoid enabling the IFF_VNET_HDR tap flag\n"
+ " use vnet_hdr=on to make the lack of IFF_VNET_HDR support an error condition\n"
+ " use vhost=on to enable experimental in kernel accelerator\n"
+ " (only has effect for virtio guests which use MSIX)\n"
+ " use vhostforce=on to force vhost on for non-MSIX virtio guests\n"
+ " use 'vhostfd=h' to connect to an already opened vhost net device\n"
+ " use 'vhostfds=x:y:...:z to connect to multiple already opened vhost net devices\n"
+ " use 'queues=n' to specify the number of queues to be created for multiqueue TAP\n"
+ " use 'poll-us=n' to specify the maximum number of microseconds that could be\n"
+ " spent on busy polling for vhost net\n"
+ "-netdev bridge,id=str[,br=bridge][,helper=helper]\n"
+ " configure a host TAP network backend with ID 'str' that is\n"
+ " connected to a bridge (default=" DEFAULT_BRIDGE_INTERFACE ")\n"
+ " using the program 'helper (default=" DEFAULT_BRIDGE_HELPER ")\n"
+#endif
+#ifdef __linux__
+ "-netdev l2tpv3,id=str,src=srcaddr,dst=dstaddr[,srcport=srcport][,dstport=dstport]\n"
+ " [,rxsession=rxsession],txsession=txsession[,ipv6=on|off][,udp=on|off]\n"
+ " [,cookie64=on|off][,counter][,pincounter][,txcookie=txcookie]\n"
+ " [,rxcookie=rxcookie][,offset=offset]\n"
+ " configure a network backend with ID 'str' connected to\n"
+ " an Ethernet over L2TPv3 pseudowire.\n"
+ " Linux kernel 3.3+ as well as most routers can talk\n"
+ " L2TPv3. This transport allows connecting a VM to a VM,\n"
+ " VM to a router and even VM to Host. It is a nearly-universal\n"
+ " standard (RFC3931). Note - this implementation uses static\n"
+ " pre-configured tunnels (same as the Linux kernel).\n"
+ " use 'src=' to specify source address\n"
+ " use 'dst=' to specify destination address\n"
+ " use 'udp=on' to specify udp encapsulation\n"
+ " use 'srcport=' to specify source udp port\n"
+ " use 'dstport=' to specify destination udp port\n"
+ " use 'ipv6=on' to force v6\n"
+ " L2TPv3 uses cookies to prevent misconfiguration as\n"
+ " well as a weak security measure\n"
+ " use 'rxcookie=0x012345678' to specify a rxcookie\n"
+ " use 'txcookie=0x012345678' to specify a txcookie\n"
+ " use 'cookie64=on' to set cookie size to 64 bit, otherwise 32\n"
+ " use 'counter=off' to force a 'cut-down' L2TPv3 with no counter\n"
+ " use 'pincounter=on' to work around broken counter handling in peer\n"
+ " use 'offset=X' to add an extra offset between header and data\n"
+#endif
+ "-netdev socket,id=str[,fd=h][,listen=[host]:port][,connect=host:port]\n"
+ " configure a network backend to connect to another network\n"
+ " using a socket connection\n"
+ "-netdev socket,id=str[,fd=h][,mcast=maddr:port[,localaddr=addr]]\n"
+ " configure a network backend to connect to a multicast maddr and port\n"
+ " use 'localaddr=addr' to specify the host address to send packets from\n"
+ "-netdev socket,id=str[,fd=h][,udp=host:port][,localaddr=host:port]\n"
+ " configure a network backend to connect to another network\n"
+ " using an UDP tunnel\n"
+ "-netdev stream,id=str[,server=on|off],addr.type=inet,addr.host=host,addr.port=port[,to=maxport][,numeric=on|off][,keep-alive=on|off][,mptcp=on|off][,addr.ipv4=on|off][,addr.ipv6=on|off][,reconnect-ms=milliseconds]\n"
+ "-netdev stream,id=str[,server=on|off],addr.type=unix,addr.path=path[,abstract=on|off][,tight=on|off][,reconnect-ms=milliseconds]\n"
+ "-netdev stream,id=str[,server=on|off],addr.type=fd,addr.str=file-descriptor[,reconnect-ms=milliseconds]\n"
+ " configure a network backend to connect to another network\n"
+ " using a socket connection in stream mode.\n"
+ "-netdev dgram,id=str,remote.type=inet,remote.host=maddr,remote.port=port[,local.type=inet,local.host=addr]\n"
+ "-netdev dgram,id=str,remote.type=inet,remote.host=maddr,remote.port=port[,local.type=fd,local.str=file-descriptor]\n"
+ " configure a network backend to connect to a multicast maddr and port\n"
+ " use ``local.host=addr`` to specify the host address to send packets from\n"
+ "-netdev dgram,id=str,local.type=inet,local.host=addr,local.port=port[,remote.type=inet,remote.host=addr,remote.port=port]\n"
+ "-netdev dgram,id=str,local.type=unix,local.path=path[,remote.type=unix,remote.path=path]\n"
+ "-netdev dgram,id=str,local.type=fd,local.str=file-descriptor\n"
+ " configure a network backend to connect to another network\n"
+ " using an UDP tunnel\n"
+#ifdef CONFIG_VDE
+ "-netdev vde,id=str[,sock=socketpath][,port=n][,group=groupname][,mode=octalmode]\n"
+ " configure a network backend to connect to port 'n' of a vde switch\n"
+ " running on host and listening for incoming connections on 'socketpath'.\n"
+ " Use group 'groupname' and mode 'octalmode' to change default\n"
+ " ownership and permissions for communication port.\n"
+#endif
+#ifdef CONFIG_NETMAP
+ "-netdev netmap,id=str,ifname=name[,devname=nmname]\n"
+ " attach to the existing netmap-enabled network interface 'name', or to a\n"
+ " VALE port (created on the fly) called 'name' ('nmname' is name of the \n"
+ " netmap device, defaults to '/dev/netmap')\n"
+#endif
+#ifdef CONFIG_AF_XDP
+ "-netdev af-xdp,id=str,ifname=name[,mode=native|skb][,force-copy=on|off]\n"
+ " [,queues=n][,start-queue=m][,inhibit=on|off][,sock-fds=x:y:...:z]\n"
+ " [,map-path=/path/to/socket/map][,map-start-index=i]\n"
+ " attach to the existing network interface 'name' with AF_XDP socket\n"
+ " use 'mode=MODE' to specify an XDP program attach mode\n"
+ " use 'force-copy=on|off' to force XDP copy mode even if device supports zero-copy (default: off)\n"
+ " use 'inhibit=on|off' to inhibit loading of a default XDP program (default: off)\n"
+ " with inhibit=on,\n"
+ " use 'sock-fds' to provide file descriptors for already open AF_XDP sockets\n"
+ " added to a socket map in XDP program. One socket per queue.\n"
+ " use 'map-path' to provide the socket map location to populate AF_XDP sockets with,\n"
+ " and use 'map-start-index' to specify the starting index for the map (default: 0) (Since 10.1)\n"
+ " use 'queues=n' to specify how many queues of a multiqueue interface should be used\n"
+ " use 'start-queue=m' to specify the first queue that should be used\n"
+#endif
+#ifdef CONFIG_POSIX
+ "-netdev vhost-user,id=str,chardev=dev[,vhostforce=on|off]\n"
+ " configure a vhost-user network, backed by a chardev 'dev'\n"
+#endif
+#ifdef __linux__
+ "-netdev vhost-vdpa,id=str[,vhostdev=/path/to/dev][,vhostfd=h]\n"
+ " configure a vhost-vdpa network,Establish a vhost-vdpa netdev\n"
+ " use 'vhostdev=/path/to/dev' to open a vhost vdpa device\n"
+ " use 'vhostfd=h' to connect to an already opened vhost vdpa device\n"
+#endif
+#ifdef CONFIG_VMNET
+ "-netdev vmnet-host,id=str[,isolated=on|off][,net-uuid=uuid]\n"
+ " [,start-address=addr,end-address=addr,subnet-mask=mask]\n"
+ " configure a vmnet network backend in host mode with ID 'str',\n"
+ " isolate this interface from others with 'isolated',\n"
+ " configure the address range and choose a subnet mask,\n"
+ " specify network UUID 'uuid' to disable DHCP and interact with\n"
+ " vmnet-host interfaces within this isolated network\n"
+ "-netdev vmnet-shared,id=str[,isolated=on|off][,nat66-prefix=addr]\n"
+ " [,start-address=addr,end-address=addr,subnet-mask=mask]\n"
+ " configure a vmnet network backend in shared mode with ID 'str',\n"
+ " configure the address range and choose a subnet mask,\n"
+ " set IPv6 ULA prefix (of length 64) to use for internal network,\n"
+ " isolate this interface from others with 'isolated'\n"
+ "-netdev vmnet-bridged,id=str,ifname=name[,isolated=on|off]\n"
+ " configure a vmnet network backend in bridged mode with ID 'str',\n"
+ " use 'ifname=name' to select a physical network interface to be bridged,\n"
+ " isolate this interface from others with 'isolated'\n"
+#endif
+ "-netdev hubport,id=str,hubid=n[,netdev=nd]\n"
+ " configure a hub port on the hub with ID 'n'\n", QEMU_ARCH_ALL)
+DEF("nic", HAS_ARG, QEMU_OPTION_nic,
+ "-nic [tap|bridge|"
+#ifdef CONFIG_PASST
+ "passt|"
+#endif
+#ifdef CONFIG_SLIRP
+ "user|"
+#endif
+#ifdef __linux__
+ "l2tpv3|"
+#endif
+#ifdef CONFIG_VDE
+ "vde|"
+#endif
+#ifdef CONFIG_NETMAP
+ "netmap|"
+#endif
+#ifdef CONFIG_AF_XDP
+ "af-xdp|"
+#endif
+#ifdef CONFIG_POSIX
+ "vhost-user|"
+#endif
+#ifdef CONFIG_VMNET
+ "vmnet-host|vmnet-shared|vmnet-bridged|"
+#endif
+ "socket][,option][,...][mac=macaddr]\n"
+ " initialize an on-board / default host NIC (using MAC address\n"
+ " macaddr) and connect it to the given host network backend\n"
+ "-nic none use it alone to have zero network devices (the default is to\n"
+ " provided a 'user' network connection)\n",
+ QEMU_ARCH_ALL)
+DEF("net", HAS_ARG, QEMU_OPTION_net,
+ "-net nic[,macaddr=mac][,model=type][,name=str][,addr=str][,vectors=v]\n"
+ " configure or create an on-board (or machine default) NIC and\n"
+ " connect it to hub 0 (please use -nic unless you need a hub)\n"
+ "-net ["
+#ifdef CONFIG_PASST
+ "passt|"
+#endif
+#ifdef CONFIG_SLIRP
+ "user|"
+#endif
+ "tap|"
+ "bridge|"
+#ifdef CONFIG_VDE
+ "vde|"
+#endif
+#ifdef CONFIG_NETMAP
+ "netmap|"
+#endif
+#ifdef CONFIG_AF_XDP
+ "af-xdp|"
+#endif
+#ifdef CONFIG_VMNET
+ "vmnet-host|vmnet-shared|vmnet-bridged|"
+#endif
+ "socket][,option][,option][,...]\n"
+ " old way to initialize a host network interface\n"
+ " (use the -netdev option if possible instead)\n", QEMU_ARCH_ALL)
+
+DEFHEADING()
+
+DEFHEADING(Character device options:)
+
+DEF("chardev", HAS_ARG, QEMU_OPTION_chardev,
+ "-chardev help\n"
+ "-chardev null,id=id[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev socket,id=id[,host=host],port=port[,to=to][,ipv4=on|off][,ipv6=on|off][,nodelay=on|off]\n"
+ " [,server=on|off][,wait=on|off][,telnet=on|off][,websocket=on|off][,reconnect-ms=milliseconds][,mux=on|off]\n"
+ " [,logfile=PATH][,logappend=on|off][,tls-creds=ID][,tls-authz=ID] (tcp)\n"
+ "-chardev socket,id=id,path=path[,server=on|off][,wait=on|off][,telnet=on|off][,websocket=on|off][,reconnect-ms=milliseconds]\n"
+ " [,mux=on|off][,logfile=PATH][,logappend=on|off][,abstract=on|off][,tight=on|off] (unix)\n"
+ "-chardev udp,id=id[,host=host],port=port[,localaddr=localaddr]\n"
+ " [,localport=localport][,ipv4=on|off][,ipv6=on|off][,mux=on|off]\n"
+ " [,logfile=PATH][,logappend=on|off]\n"
+ "-chardev msmouse,id=id[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev vc,id=id[[,width=width][,height=height]][[,cols=cols][,rows=rows]]\n"
+ " [,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev ringbuf,id=id[,size=size][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev file,id=id,path=path[,input-path=input-file][,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev pipe,id=id,path=path[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+#ifdef _WIN32
+ "-chardev console,id=id[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev serial,id=id,path=path[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+#else
+ "-chardev pty,id=id[,path=path][,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev stdio,id=id[,mux=on|off][,signal=on|off][,logfile=PATH][,logappend=on|off]\n"
+#endif
+#ifdef CONFIG_BRLAPI
+ "-chardev braille,id=id[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+#endif
+#if defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \
+ || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__)
+ "-chardev serial,id=id,path=path[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+#endif
+#if defined(__linux__) || defined(__FreeBSD__) || defined(__DragonFly__)
+ "-chardev parallel,id=id,path=path[,mux=on|off][,logfile=PATH][,logappend=on|off]\n"
+#endif
+#if defined(CONFIG_SPICE)
+ "-chardev spicevmc,id=id,name=name[,debug=debug][,logfile=PATH][,logappend=on|off]\n"
+ "-chardev spiceport,id=id,name=name[,debug=debug][,logfile=PATH][,logappend=on|off]\n"
+#endif
+ , QEMU_ARCH_ALL
+)
+
+
+DEFHEADING()
+
+#ifdef CONFIG_TPM
+DEFHEADING(TPM device options:)
+
+DEF("tpmdev", HAS_ARG, QEMU_OPTION_tpmdev, \
+ "-tpmdev passthrough,id=id[,path=path][,cancel-path=path]\n"
+ " use path to provide path to a character device; default is /dev/tpm0\n"
+ " use cancel-path to provide path to TPM's cancel sysfs entry; if\n"
+ " not provided it will be searched for in /sys/class/misc/tpm?/device\n"
+ "-tpmdev emulator,id=id,chardev=dev\n"
+ " configure the TPM device using chardev backend\n",
+ QEMU_ARCH_ALL)
+
+DEFHEADING()
+
+#endif
+
+DEFHEADING(Boot Image or Kernel specific:)
+
+
+DEF("bios", HAS_ARG, QEMU_OPTION_bios, \
+ "-bios file set the filename for the BIOS\n", QEMU_ARCH_ALL)
+
+DEF("pflash", HAS_ARG, QEMU_OPTION_pflash,
+ "-pflash file use 'file' as a parallel flash image\n", QEMU_ARCH_ALL)
+
+
+DEF("kernel", HAS_ARG, QEMU_OPTION_kernel, \
+ "-kernel bzImage use 'bzImage' as kernel image\n", QEMU_ARCH_ALL)
+
+DEF("shim", HAS_ARG, QEMU_OPTION_shim, \
+ "-shim shim.efi use 'shim.efi' to boot the kernel\n", QEMU_ARCH_ALL)
+
+DEF("append", HAS_ARG, QEMU_OPTION_append, \
+ "-append cmdline use 'cmdline' as kernel command line\n", QEMU_ARCH_ALL)
+
+DEF("initrd", HAS_ARG, QEMU_OPTION_initrd, \
+ "-initrd file use 'file' as initial ram disk\n", QEMU_ARCH_ALL)
+
+DEF("dtb", HAS_ARG, QEMU_OPTION_dtb, \
+ "-dtb file use 'file' as device tree image\n", QEMU_ARCH_ALL)
+
+
+DEFHEADING()
+
+DEFHEADING(Debug/Expert options:)
+
+DEF("compat", HAS_ARG, QEMU_OPTION_compat,
+ "-compat [deprecated-input=accept|reject|crash][,deprecated-output=accept|hide]\n"
+ " Policy for handling deprecated management interfaces\n"
+ "-compat [unstable-input=accept|reject|crash][,unstable-output=accept|hide]\n"
+ " Policy for handling unstable management interfaces\n",
+ QEMU_ARCH_ALL)
+
+DEF("fw_cfg", HAS_ARG, QEMU_OPTION_fwcfg,
+ "-fw_cfg [name=],file=\n"
+ " add named fw_cfg entry with contents from file\n"
+ "-fw_cfg [name=],string=\n"
+ " add named fw_cfg entry with contents from string\n",
+ QEMU_ARCH_ALL)
+
+DEF("serial", HAS_ARG, QEMU_OPTION_serial, \
+ "-serial dev redirect the serial port to char device 'dev'\n",
+ QEMU_ARCH_ALL)
+
+DEF("parallel", HAS_ARG, QEMU_OPTION_parallel, \
+ "-parallel dev redirect the parallel port to char device 'dev'\n",
+ QEMU_ARCH_ALL)
+
+DEF("monitor", HAS_ARG, QEMU_OPTION_monitor, \
+ "-monitor dev redirect the monitor to char device 'dev'\n",
+ QEMU_ARCH_ALL)
+DEF("qmp", HAS_ARG, QEMU_OPTION_qmp, \
+ "-qmp dev like -monitor but opens in 'control' mode\n",
+ QEMU_ARCH_ALL)
+DEF("qmp-pretty", HAS_ARG, QEMU_OPTION_qmp_pretty, \
+ "-qmp-pretty dev like -qmp but uses pretty JSON formatting\n",
+ QEMU_ARCH_ALL)
+
+DEF("mon", HAS_ARG, QEMU_OPTION_mon, \
+ "-mon [chardev=]name[,mode=readline|control][,pretty[=on|off]]\n", QEMU_ARCH_ALL)
+
+DEF("debugcon", HAS_ARG, QEMU_OPTION_debugcon, \
+ "-debugcon dev redirect the debug console to char device 'dev'\n",
+ QEMU_ARCH_ALL)
+
+DEF("pidfile", HAS_ARG, QEMU_OPTION_pidfile, \
+ "-pidfile file write PID to 'file'\n", QEMU_ARCH_ALL)
+
+DEF("preconfig", 0, QEMU_OPTION_preconfig, \
+ "--preconfig pause QEMU before machine is initialized (experimental)\n",
+ QEMU_ARCH_ALL)
+
+DEF("S", 0, QEMU_OPTION_S, \
+ "-S freeze CPU at startup (use 'c' to start execution)\n",
+ QEMU_ARCH_ALL)
+
+DEF("overcommit", HAS_ARG, QEMU_OPTION_overcommit,
+ "-overcommit [mem-lock=on|off|on-fault][cpu-pm=on|off]\n"
+ " run qemu with overcommit hints\n"
+ " mem-lock=on|off|on-fault controls memory lock support (default: off)\n"
+ " cpu-pm=on|off controls cpu power management (default: off)\n",
+ QEMU_ARCH_ALL)
+
+DEF("gdb", HAS_ARG, QEMU_OPTION_gdb, \
+ "-gdb dev accept gdb connection on 'dev'. (QEMU defaults to starting\n"
+ " the guest without waiting for gdb to connect; use -S too\n"
+ " if you want it to not start execution.)\n",
+ QEMU_ARCH_ALL)
+
+DEF("s", 0, QEMU_OPTION_s, \
+ "-s shorthand for -gdb tcp::" DEFAULT_GDBSTUB_PORT "\n",
+ QEMU_ARCH_ALL)
+
+DEF("d", HAS_ARG, QEMU_OPTION_d, \
+ "-d item1,... enable logging of specified items (use '-d help' for a list of log items)\n",
+ QEMU_ARCH_ALL)
+
+DEF("D", HAS_ARG, QEMU_OPTION_D, \
+ "-D logfile output log to logfile (default stderr)\n",
+ QEMU_ARCH_ALL)
+
+DEF("dfilter", HAS_ARG, QEMU_OPTION_DFILTER, \
+ "-dfilter range,.. filter debug output to range of addresses (useful for -d cpu,exec,etc..)\n",
+ QEMU_ARCH_ALL)
+
+DEF("seed", HAS_ARG, QEMU_OPTION_seed, \
+ "-seed number seed the pseudo-random number generator\n",
+ QEMU_ARCH_ALL)
+
+DEF("L", HAS_ARG, QEMU_OPTION_L, \
+ "-L path set the directory for the BIOS, VGA BIOS and keymaps\n",
+ QEMU_ARCH_ALL)
+
+DEF("enable-kvm", 0, QEMU_OPTION_enable_kvm, \
+ "-enable-kvm enable KVM full virtualization support\n",
+ QEMU_ARCH_ARM | QEMU_ARCH_I386 | QEMU_ARCH_MIPS | QEMU_ARCH_PPC |
+ QEMU_ARCH_RISCV | QEMU_ARCH_S390X)
+
+DEF("xen-domid", HAS_ARG, QEMU_OPTION_xen_domid,
+ "-xen-domid id specify xen guest domain id\n",
+ QEMU_ARCH_ARM | QEMU_ARCH_I386)
+DEF("xen-attach", 0, QEMU_OPTION_xen_attach,
+ "-xen-attach attach to existing xen domain\n"
+ " libxl will use this when starting QEMU\n",
+ QEMU_ARCH_ARM | QEMU_ARCH_I386)
+DEF("xen-domid-restrict", 0, QEMU_OPTION_xen_domid_restrict,
+ "-xen-domid-restrict restrict set of available xen operations\n"
+ " to specified domain id. (Does not affect\n"
+ " xenpv machine type).\n",
+ QEMU_ARCH_ARM | QEMU_ARCH_I386)
+
+DEF("no-reboot", 0, QEMU_OPTION_no_reboot, \
+ "-no-reboot exit instead of rebooting\n", QEMU_ARCH_ALL)
+
+DEF("no-shutdown", 0, QEMU_OPTION_no_shutdown, \
+ "-no-shutdown stop before shutdown\n", QEMU_ARCH_ALL)
+
+DEF("action", HAS_ARG, QEMU_OPTION_action,
+ "-action reboot=reset|shutdown\n"
+ " action when guest reboots [default=reset]\n"
+ "-action shutdown=poweroff|pause\n"
+ " action when guest shuts down [default=poweroff]\n"
+ "-action panic=pause|shutdown|exit-failure|none\n"
+ " action when guest panics [default=shutdown]\n"
+ "-action watchdog=reset|shutdown|poweroff|inject-nmi|pause|debug|none\n"
+ " action when watchdog fires [default=reset]\n",
+ QEMU_ARCH_ALL)
+
+DEF("loadvm", HAS_ARG, QEMU_OPTION_loadvm, \
+ "-loadvm [tag|id]\n" \
+ " start right away with a saved state (loadvm in monitor)\n",
+ QEMU_ARCH_ALL)
+
+#if !defined(_WIN32) && !defined(EMSCRIPTEN)
+DEF("daemonize", 0, QEMU_OPTION_daemonize, \
+ "-daemonize daemonize QEMU after initializing\n", QEMU_ARCH_ALL)
+#endif
+
+DEF("option-rom", HAS_ARG, QEMU_OPTION_option_rom, \
+ "-option-rom rom load a file, rom, into the option ROM space\n",
+ QEMU_ARCH_ALL)
+
+DEF("rtc", HAS_ARG, QEMU_OPTION_rtc, \
+ "-rtc [base=utc|localtime|][,clock=host|rt|vm][,driftfix=none|slew]\n" \
+ " set the RTC base and clock, enable drift fix for clock ticks (x86 only)\n",
+ QEMU_ARCH_ALL)
+
+
+DEF("icount", HAS_ARG, QEMU_OPTION_icount, \
+ "-icount [shift=N|auto][,align=on|off][,sleep=on|off][,rr=record|replay,rrfile=[,rrsnapshot=]]\n" \
+ " enable virtual instruction counter with 2^N clock ticks per\n" \
+ " instruction, enable aligning the host and virtual clocks\n" \
+ " or disable real time cpu sleeping, and optionally enable\n" \
+ " record-and-replay mode\n", QEMU_ARCH_ALL)
+
+DEF("watchdog-action", HAS_ARG, QEMU_OPTION_watchdog_action, \
+ "-watchdog-action reset|shutdown|poweroff|inject-nmi|pause|debug|none\n" \
+ " action when watchdog fires [default=reset]\n",
+ QEMU_ARCH_ALL)
+
+DEF("echr", HAS_ARG, QEMU_OPTION_echr, \
+ "-echr chr set terminal escape character instead of ctrl-a\n",
+ QEMU_ARCH_ALL)
+
+DEF("incoming", HAS_ARG, QEMU_OPTION_incoming, \
+ "-incoming tcp:[host]:port[,to=maxport][,ipv4=on|off][,ipv6=on|off]\n" \
+ "-incoming rdma:host:port[,ipv4=on|off][,ipv6=on|off]\n" \
+ "-incoming unix:socketpath\n" \
+ " prepare for incoming migration, listen on\n" \
+ " specified protocol and socket address\n" \
+ "-incoming fd:fd\n" \
+ "-incoming file:filename[,offset=offset]\n" \
+ "-incoming exec:cmdline\n" \
+ " accept incoming migration on given file descriptor\n" \
+ " or from given external command\n" \
+ "-incoming \n" \
+ " accept incoming migration on the migration channel\n" \
+ "-incoming defer\n" \
+ " wait for the URI to be specified via migrate_incoming\n",
+ QEMU_ARCH_ALL)
+
+DEF("only-migratable", 0, QEMU_OPTION_only_migratable, \
+ "-only-migratable allow only migratable devices\n", QEMU_ARCH_ALL)
+
+DEF("nodefaults", 0, QEMU_OPTION_nodefaults, \
+ "-nodefaults don't create default devices\n", QEMU_ARCH_ALL)
+
+DEF("prom-env", HAS_ARG, QEMU_OPTION_prom_env,
+ "-prom-env variable=value\n"
+ " set OpenBIOS nvram variables\n",
+ QEMU_ARCH_PPC | QEMU_ARCH_SPARC)
+DEF("semihosting", 0, QEMU_OPTION_semihosting,
+ "-semihosting semihosting mode\n",
+ QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA |
+ QEMU_ARCH_MIPS | QEMU_ARCH_RISCV)
+DEF("semihosting-config", HAS_ARG, QEMU_OPTION_semihosting_config,
+ "-semihosting-config [enable=on|off][,target=native|gdb|auto][,chardev=id][,userspace=on|off][,arg=str[,...]]\n" \
+ " semihosting configuration\n",
+QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA |
+QEMU_ARCH_MIPS | QEMU_ARCH_RISCV)
+DEF("sandbox", HAS_ARG, QEMU_OPTION_sandbox, \
+ "-sandbox on[,obsolete=allow|deny][,elevateprivileges=allow|deny|children]\n" \
+ " [,spawn=allow|deny][,resourcecontrol=allow|deny]\n" \
+ " Enable seccomp mode 2 system call filter (default 'off').\n" \
+ " use 'obsolete' to allow obsolete system calls that are provided\n" \
+ " by the kernel, but typically no longer used by modern\n" \
+ " C library implementations.\n" \
+ " use 'elevateprivileges' to allow or deny the QEMU process ability\n" \
+ " to elevate privileges using set*uid|gid system calls.\n" \
+ " The value 'children' will deny set*uid|gid system calls for\n" \
+ " main QEMU process but will allow forks and execves to run unprivileged\n" \
+ " use 'spawn' to avoid QEMU to spawn new threads or processes by\n" \
+ " blocking *fork and execve\n" \
+ " use 'resourcecontrol' to disable process affinity and schedular priority\n",
+ QEMU_ARCH_ALL)
+
+DEF("readconfig", HAS_ARG, QEMU_OPTION_readconfig,
+ "-readconfig \n"
+ " read config file\n", QEMU_ARCH_ALL)
+
+DEF("no-user-config", 0, QEMU_OPTION_nouserconfig,
+ "-no-user-config\n"
+ " do not load default user-provided config files at startup\n",
+ QEMU_ARCH_ALL)
+
+DEF("trace", HAS_ARG, QEMU_OPTION_trace,
+ "-trace [[enable=]][,events=][,file=]\n"
+ " specify tracing options\n",
+ QEMU_ARCH_ALL)
+DEF("plugin", HAS_ARG, QEMU_OPTION_plugin,
+ "-plugin [file=][,=]\n"
+ " load a plugin\n",
+ QEMU_ARCH_ALL)
+
+DEF("qtest", HAS_ARG, QEMU_OPTION_qtest, "", QEMU_ARCH_ALL)
+DEF("qtest-log", HAS_ARG, QEMU_OPTION_qtest_log, "", QEMU_ARCH_ALL)
+
+#if defined(CONFIG_POSIX) && !defined(EMSCRIPTEN)
+DEF("run-with", HAS_ARG, QEMU_OPTION_run_with,
+ "-run-with [async-teardown=on|off][,chroot=dir]\n" \
+ " [,exit-with-parent=on|off][,user=username|uid:gid]\n"
+ " Set miscellaneous QEMU process lifecycle options:\n"
+ " async-teardown=on enables asynchronous teardown (Linux only)\n"
+ " exit-with-parent=on causes QEMU to exit if the parent\n"
+ " process of QEMU exits (Linux, FreeBSD, macOS only)\n"
+ " chroot=dir chroot to dir just before starting the VM\n"
+ " user=username switch to the specified user before starting the VM\n"
+ " user=uid:gid ditto, but use specified user-ID and group-ID instead\n",
+ QEMU_ARCH_ALL)
+#endif
+
+DEF("msg", HAS_ARG, QEMU_OPTION_msg,
+ "-msg [timestamp[=on|off]][,guest-name=[on|off]]\n"
+ " control error message format\n"
+ " timestamp=on enables timestamps (default: off)\n"
+ " guest-name=on enables guest name prefix but only if\n"
+ " -name guest option is set (default: off)\n",
+ QEMU_ARCH_ALL)
+
+DEF("dump-vmstate", HAS_ARG, QEMU_OPTION_dump_vmstate,
+ "-dump-vmstate \n"
+ " Output vmstate information in JSON format to file.\n"
+ " Use the scripts/vmstate-static-checker.py file to\n"
+ " check for possible regressions in migration code\n"
+ " by comparing two such vmstate dumps.\n",
+ QEMU_ARCH_ALL)
+
+DEF("enable-sync-profile", 0, QEMU_OPTION_enable_sync_profile,
+ "-enable-sync-profile\n"
+ " enable synchronization profiling\n",
+ QEMU_ARCH_ALL)
+
+#if defined(CONFIG_TCG) && defined(CONFIG_LINUX)
+DEF("perfmap", 0, QEMU_OPTION_perfmap,
+ "-perfmap generate a /tmp/perf-${pid}.map file for perf\n",
+ QEMU_ARCH_ALL)
+
+DEF("jitdump", 0, QEMU_OPTION_jitdump,
+ "-jitdump generate a jit-${pid}.dump file for perf\n",
+ QEMU_ARCH_ALL)
+#endif
+
+DEFHEADING()
+
+DEFHEADING(Generic object creation:)
+
+DEF("object", HAS_ARG, QEMU_OPTION_object,
+ "-object TYPENAME[,PROP1=VALUE1,...]\n"
+ " create a new object of type TYPENAME setting properties\n"
+ " in the order they are specified. Note that the 'id'\n"
+ " property must be set. These objects are placed in the\n"
+ " '/objects' path.\n",
+ QEMU_ARCH_ALL)
+
+
+
+#undef DEF
+#undef DEFHEADING
+#undef ARCHHEADING
diff --git a/qemu-version.h b/qemu-version.h
new file mode 100644
index 0000000000..92e2943253
--- /dev/null
+++ b/qemu-version.h
@@ -0,0 +1,28 @@
+#ifndef QEMU_VERSION_H
+#define QEMU_VERSION_H
+
+#ifndef QEMU_VERSION
+#define QEMU_VERSION "0.0.0"
+#endif
+
+#ifndef QEMU_VERSION_MAJOR
+#define QEMU_VERSION_MAJOR 0
+#endif
+
+#ifndef QEMU_VERSION_MINOR
+#define QEMU_VERSION_MINOR 0
+#endif
+
+#ifndef QEMU_VERSION_MICRO
+#define QEMU_VERSION_MICRO 0
+#endif
+
+#ifndef QEMU_PKGVERSION
+#define QEMU_PKGVERSION ""
+#endif
+
+#ifndef QEMU_FULL_VERSION
+#define QEMU_FULL_VERSION "QEMU emulator version " QEMU_VERSION
+#endif
+
+#endif
diff --git a/qom/object.c b/qom/object.c
index 4f32c1aba7..048e9c2c38 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -226,8 +226,8 @@ static TypeImpl *type_get_parent(TypeImpl *type)
if (!type->parent_type && type->parent) {
type->parent_type = type_get_by_name_noload(type->parent);
if (!type->parent_type) {
- fprintf(stderr, "Type '%s' is missing its parent '%s'\n",
- type->name, type->parent);
+ error_report("Type '%s' is missing its parent '%s'",
+ type->name, type->parent);
abort();
}
}
diff --git a/stubs/linux-aio.c b/stubs/linux-aio.c
index 84d1f784ae..c1233ef88a 100644
--- a/stubs/linux-aio.c
+++ b/stubs/linux-aio.c
@@ -11,6 +11,10 @@
#include "block/aio.h"
#include "block/raw-aio.h"
+#ifndef CONFIG_LINUX_AIO
+typedef struct LinuxAioState LinuxAioState;
+#endif
+
void laio_detach_aio_context(LinuxAioState *s, AioContext *old_context)
{
abort();
diff --git a/system/physmem.c b/system/physmem.c
index 009c7931fc..1e003c2a12 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -18,6 +18,9 @@
*/
#include "qemu/osdep.h"
+#ifdef __ANDROID__
+#include
+#endif
#include "exec/page-vary.h"
#include "hw/core/cpu.h"
#include "qapi/error.h"
diff --git a/system/runstate.c b/system/runstate.c
index ff69f18655..f80df717f7 100644
--- a/system/runstate.c
+++ b/system/runstate.c
@@ -945,6 +945,12 @@ void qemu_init_subsystems(void)
atexit(qemu_run_exit_notifiers);
module_call_init(MODULE_INIT_QOM);
+
+#ifdef __ANDROID__
+ /* Register any Android-specific fallback QOM interfaces after QOM init. */
+ extern void xemu_android_register_vmstate_if(void);
+ xemu_android_register_vmstate_if();
+#endif
module_call_init(MODULE_INIT_MIGRATION);
runstate_init();
diff --git a/system/vl.c b/system/vl.c
index f45bdc3458..f5505cb8fb 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -78,6 +78,15 @@
#include "chardev/char.h"
#include "qemu/bitmap.h"
#include "qemu/log.h"
+
+#ifdef __ANDROID__
+#include
+#define ANDROID_LOGI(...) __android_log_print(ANDROID_LOG_INFO, "xemu-android", __VA_ARGS__)
+#define ANDROID_LOGE(...) __android_log_print(ANDROID_LOG_ERROR, "xemu-android", __VA_ARGS__)
+#else
+#define ANDROID_LOGI(...) ((void)0)
+#define ANDROID_LOGE(...) ((void)0)
+#endif
#include "system/blockdev.h"
#include "hw/block/block.h"
#include "hw/i386/x86.h"
@@ -2902,7 +2911,10 @@ void qmp_x_exit_preconfig(Error **errp)
}
}
} else if (autostart) {
+ ANDROID_LOGI("Autostart: qmp_cont");
qmp_cont(NULL);
+ } else {
+ ANDROID_LOGI("Autostart disabled: runstate=%d", (int)runstate_get());
}
}
@@ -2922,6 +2934,7 @@ static const char *get_eeprom_path(void)
path);
xemu_queue_error_message(msg);
g_free(msg);
+ ANDROID_LOGE("EEPROM generation failed: %s", path);
return NULL;
}
}
@@ -2933,6 +2946,7 @@ static const char *get_eeprom_path(void)
"Please check machine settings.", path);
xemu_queue_error_message(msg);
g_free(msg);
+ ANDROID_LOGE("EEPROM open failed: %s", path);
return NULL;
}
@@ -2942,6 +2956,7 @@ static const char *get_eeprom_path(void)
"Please check machine settings.", path, size);
xemu_queue_error_message(msg);
g_free(msg);
+ ANDROID_LOGE("EEPROM size invalid (%d): %s", size, path);
return NULL;
}
@@ -3036,6 +3051,7 @@ void qemu_init(int argc, char **argv)
free(escaped_eeprom_path);
} else {
autostart = 0;
+ ANDROID_LOGE("Autostart disabled: EEPROM missing/invalid");
}
const char *flashrom_path = g_config.sys.files.flashrom_path;
@@ -3043,11 +3059,13 @@ void qemu_init(int argc, char **argv)
// Don't display an error if this is the first boot. Give user a chance
// to configure the path.
autostart = 0;
+ ANDROID_LOGI("Autostart disabled: show_welcome=true");
} else if (xemu_check_file(flashrom_path)) {
char *msg = g_strdup_printf("Failed to open flash file '%s'. Please check machine settings.", flashrom_path);
xemu_queue_error_message(msg);
g_free(msg);
autostart = 0;
+ ANDROID_LOGE("Autostart disabled: flashrom missing '%s'", flashrom_path);
} else {
fake_argv[fake_argc++] = strdup("-bios");
fake_argv[fake_argc++] = strdup(flashrom_path);
diff --git a/trace/trace-accel_hvf.h b/trace/trace-accel_hvf.h
new file mode 100644
index 0000000000..faa351bf0b
--- /dev/null
+++ b/trace/trace-accel_hvf.h
@@ -0,0 +1,32 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_ACCEL_HVF_H
+#define TRACE_TRACE_ACCEL_HVF_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_HVF_VM_MAP 0
+#define TRACE_HVF_VM_MAP_ENABLED 0
+#define TRACE_HVF_VM_MAP_BACKEND_DSTATE() (0)
+static inline void trace_hvf_vm_map(uint64_t paddr, uint64_t size, void *vaddr, uint8_t flags, const char r, const char w, const char e) {
+ (void)paddr;
+ (void)size;
+ (void)vaddr;
+ (void)flags;
+ (void)r;
+ (void)w;
+ (void)e;
+}
+#define TRACE_HVF_VM_UNMAP 0
+#define TRACE_HVF_VM_UNMAP_ENABLED 0
+#define TRACE_HVF_VM_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_hvf_vm_unmap(uint64_t paddr, uint64_t size) {
+ (void)paddr;
+ (void)size;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-accel_kvm.h b/trace/trace-accel_kvm.h
new file mode 100644
index 0000000000..f58fb78acf
--- /dev/null
+++ b/trace/trace-accel_kvm.h
@@ -0,0 +1,270 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_ACCEL_KVM_H
+#define TRACE_TRACE_ACCEL_KVM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_KVM_CLEAR_DIRTY_LOG 0
+#define TRACE_KVM_CLEAR_DIRTY_LOG_ENABLED 0
+#define TRACE_KVM_CLEAR_DIRTY_LOG_BACKEND_DSTATE() (0)
+static inline void trace_kvm_clear_dirty_log(uint32_t slot, uint64_t start, uint32_t size) {
+ (void)slot;
+ (void)start;
+ (void)size;
+}
+#define TRACE_KVM_CONVERT_MEMORY 0
+#define TRACE_KVM_CONVERT_MEMORY_ENABLED 0
+#define TRACE_KVM_CONVERT_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_kvm_convert_memory(uint64_t start, uint64_t size, const char *msg) {
+ (void)start;
+ (void)size;
+ (void)msg;
+}
+#define TRACE_KVM_CPU_EXEC 0
+#define TRACE_KVM_CPU_EXEC_ENABLED 0
+#define TRACE_KVM_CPU_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_kvm_cpu_exec(void) {
+}
+#define TRACE_KVM_CREATE_VCPU 0
+#define TRACE_KVM_CREATE_VCPU_ENABLED 0
+#define TRACE_KVM_CREATE_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_create_vcpu(int cpu_index, unsigned long arch_cpu_id, int kvm_fd) {
+ (void)cpu_index;
+ (void)arch_cpu_id;
+ (void)kvm_fd;
+}
+#define TRACE_KVM_DESTROY_VCPU 0
+#define TRACE_KVM_DESTROY_VCPU_ENABLED 0
+#define TRACE_KVM_DESTROY_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_destroy_vcpu(int cpu_index, unsigned long arch_cpu_id) {
+ (void)cpu_index;
+ (void)arch_cpu_id;
+}
+#define TRACE_KVM_DEVICE_IOCTL 0
+#define TRACE_KVM_DEVICE_IOCTL_ENABLED 0
+#define TRACE_KVM_DEVICE_IOCTL_BACKEND_DSTATE() (0)
+static inline void trace_kvm_device_ioctl(int fd, unsigned long type, void *arg) {
+ (void)fd;
+ (void)type;
+ (void)arg;
+}
+#define TRACE_KVM_DIRTY_RING_FLUSH 0
+#define TRACE_KVM_DIRTY_RING_FLUSH_ENABLED 0
+#define TRACE_KVM_DIRTY_RING_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_kvm_dirty_ring_flush(int finished) {
+ (void)finished;
+}
+#define TRACE_KVM_DIRTY_RING_FULL 0
+#define TRACE_KVM_DIRTY_RING_FULL_ENABLED 0
+#define TRACE_KVM_DIRTY_RING_FULL_BACKEND_DSTATE() (0)
+static inline void trace_kvm_dirty_ring_full(int id) {
+ (void)id;
+}
+#define TRACE_KVM_DIRTY_RING_PAGE 0
+#define TRACE_KVM_DIRTY_RING_PAGE_ENABLED 0
+#define TRACE_KVM_DIRTY_RING_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_dirty_ring_page(int vcpu, uint32_t slot, uint64_t offset) {
+ (void)vcpu;
+ (void)slot;
+ (void)offset;
+}
+#define TRACE_KVM_DIRTY_RING_REAP 0
+#define TRACE_KVM_DIRTY_RING_REAP_ENABLED 0
+#define TRACE_KVM_DIRTY_RING_REAP_BACKEND_DSTATE() (0)
+static inline void trace_kvm_dirty_ring_reap(uint64_t count, int64_t t) {
+ (void)count;
+ (void)t;
+}
+#define TRACE_KVM_DIRTY_RING_REAP_VCPU 0
+#define TRACE_KVM_DIRTY_RING_REAP_VCPU_ENABLED 0
+#define TRACE_KVM_DIRTY_RING_REAP_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_dirty_ring_reap_vcpu(int id) {
+ (void)id;
+}
+#define TRACE_KVM_DIRTY_RING_REAPER 0
+#define TRACE_KVM_DIRTY_RING_REAPER_ENABLED 0
+#define TRACE_KVM_DIRTY_RING_REAPER_BACKEND_DSTATE() (0)
+static inline void trace_kvm_dirty_ring_reaper(const char *s) {
+ (void)s;
+}
+#define TRACE_KVM_DIRTY_RING_REAPER_KICK 0
+#define TRACE_KVM_DIRTY_RING_REAPER_KICK_ENABLED 0
+#define TRACE_KVM_DIRTY_RING_REAPER_KICK_BACKEND_DSTATE() (0)
+static inline void trace_kvm_dirty_ring_reaper_kick(const char *reason) {
+ (void)reason;
+}
+#define TRACE_KVM_FAILED_GET_VCPU_MMAP_SIZE 0
+#define TRACE_KVM_FAILED_GET_VCPU_MMAP_SIZE_ENABLED 0
+#define TRACE_KVM_FAILED_GET_VCPU_MMAP_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_get_vcpu_mmap_size(void) {
+}
+#define TRACE_KVM_FAILED_REG_GET 0
+#define TRACE_KVM_FAILED_REG_GET_ENABLED 0
+#define TRACE_KVM_FAILED_REG_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_reg_get(uint64_t id, const char *msg) {
+ (void)id;
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_REG_SET 0
+#define TRACE_KVM_FAILED_REG_SET_ENABLED 0
+#define TRACE_KVM_FAILED_REG_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_reg_set(uint64_t id, const char *msg) {
+ (void)id;
+ (void)msg;
+}
+#define TRACE_KVM_INIT_VCPU 0
+#define TRACE_KVM_INIT_VCPU_ENABLED 0
+#define TRACE_KVM_INIT_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_init_vcpu(int cpu_index, unsigned long arch_cpu_id) {
+ (void)cpu_index;
+ (void)arch_cpu_id;
+}
+#define TRACE_KVM_INTERRUPT_EXIT_REQUEST 0
+#define TRACE_KVM_INTERRUPT_EXIT_REQUEST_ENABLED 0
+#define TRACE_KVM_INTERRUPT_EXIT_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_kvm_interrupt_exit_request(void) {
+}
+#define TRACE_KVM_IO_WINDOW_EXIT 0
+#define TRACE_KVM_IO_WINDOW_EXIT_ENABLED 0
+#define TRACE_KVM_IO_WINDOW_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_io_window_exit(void) {
+}
+#define TRACE_KVM_IOCTL 0
+#define TRACE_KVM_IOCTL_ENABLED 0
+#define TRACE_KVM_IOCTL_BACKEND_DSTATE() (0)
+static inline void trace_kvm_ioctl(unsigned long type, void *arg) {
+ (void)type;
+ (void)arg;
+}
+#define TRACE_KVM_IRQCHIP_ADD_MSI_ROUTE 0
+#define TRACE_KVM_IRQCHIP_ADD_MSI_ROUTE_ENABLED 0
+#define TRACE_KVM_IRQCHIP_ADD_MSI_ROUTE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_irqchip_add_msi_route(char *name, int vector, int virq) {
+ (void)name;
+ (void)vector;
+ (void)virq;
+}
+#define TRACE_KVM_IRQCHIP_COMMIT_ROUTES 0
+#define TRACE_KVM_IRQCHIP_COMMIT_ROUTES_ENABLED 0
+#define TRACE_KVM_IRQCHIP_COMMIT_ROUTES_BACKEND_DSTATE() (0)
+static inline void trace_kvm_irqchip_commit_routes(void) {
+}
+#define TRACE_KVM_IRQCHIP_RELEASE_VIRQ 0
+#define TRACE_KVM_IRQCHIP_RELEASE_VIRQ_ENABLED 0
+#define TRACE_KVM_IRQCHIP_RELEASE_VIRQ_BACKEND_DSTATE() (0)
+static inline void trace_kvm_irqchip_release_virq(int virq) {
+ (void)virq;
+}
+#define TRACE_KVM_IRQCHIP_UPDATE_MSI_ROUTE 0
+#define TRACE_KVM_IRQCHIP_UPDATE_MSI_ROUTE_ENABLED 0
+#define TRACE_KVM_IRQCHIP_UPDATE_MSI_ROUTE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_irqchip_update_msi_route(int virq) {
+ (void)virq;
+}
+#define TRACE_KVM_MEMORY_FAULT 0
+#define TRACE_KVM_MEMORY_FAULT_ENABLED 0
+#define TRACE_KVM_MEMORY_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_memory_fault(uint64_t start, uint64_t size, uint64_t flags) {
+ (void)start;
+ (void)size;
+ (void)flags;
+}
+#define TRACE_KVM_PARK_VCPU 0
+#define TRACE_KVM_PARK_VCPU_ENABLED 0
+#define TRACE_KVM_PARK_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_park_vcpu(int cpu_index, unsigned long arch_cpu_id) {
+ (void)cpu_index;
+ (void)arch_cpu_id;
+}
+#define TRACE_KVM_RESAMPLE_FD_NOTIFY 0
+#define TRACE_KVM_RESAMPLE_FD_NOTIFY_ENABLED 0
+#define TRACE_KVM_RESAMPLE_FD_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_kvm_resample_fd_notify(int gsi) {
+ (void)gsi;
+}
+#define TRACE_KVM_RUN_EXIT 0
+#define TRACE_KVM_RUN_EXIT_ENABLED 0
+#define TRACE_KVM_RUN_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_run_exit(int cpu_index, uint32_t reason) {
+ (void)cpu_index;
+ (void)reason;
+}
+#define TRACE_KVM_RUN_EXIT_SYSTEM_EVENT 0
+#define TRACE_KVM_RUN_EXIT_SYSTEM_EVENT_ENABLED 0
+#define TRACE_KVM_RUN_EXIT_SYSTEM_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_run_exit_system_event(int cpu_index, uint32_t event_type) {
+ (void)cpu_index;
+ (void)event_type;
+}
+#define TRACE_KVM_SET_IOEVENTFD_MMIO 0
+#define TRACE_KVM_SET_IOEVENTFD_MMIO_ENABLED 0
+#define TRACE_KVM_SET_IOEVENTFD_MMIO_BACKEND_DSTATE() (0)
+static inline void trace_kvm_set_ioeventfd_mmio(int fd, uint64_t addr, uint32_t val, bool assign, uint32_t size, bool datamatch) {
+ (void)fd;
+ (void)addr;
+ (void)val;
+ (void)assign;
+ (void)size;
+ (void)datamatch;
+}
+#define TRACE_KVM_SET_IOEVENTFD_PIO 0
+#define TRACE_KVM_SET_IOEVENTFD_PIO_ENABLED 0
+#define TRACE_KVM_SET_IOEVENTFD_PIO_BACKEND_DSTATE() (0)
+static inline void trace_kvm_set_ioeventfd_pio(int fd, uint16_t addr, uint32_t val, bool assign, uint32_t size, bool datamatch) {
+ (void)fd;
+ (void)addr;
+ (void)val;
+ (void)assign;
+ (void)size;
+ (void)datamatch;
+}
+#define TRACE_KVM_SET_USER_MEMORY 0
+#define TRACE_KVM_SET_USER_MEMORY_ENABLED 0
+#define TRACE_KVM_SET_USER_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_kvm_set_user_memory(uint16_t as, uint16_t slot, uint32_t flags, uint64_t guest_phys_addr, uint64_t memory_size, uint64_t userspace_addr, uint32_t fd, uint64_t fd_offset, int ret) {
+ (void)as;
+ (void)slot;
+ (void)flags;
+ (void)guest_phys_addr;
+ (void)memory_size;
+ (void)userspace_addr;
+ (void)fd;
+ (void)fd_offset;
+ (void)ret;
+}
+#define TRACE_KVM_SLOTS_GROW 0
+#define TRACE_KVM_SLOTS_GROW_ENABLED 0
+#define TRACE_KVM_SLOTS_GROW_BACKEND_DSTATE() (0)
+static inline void trace_kvm_slots_grow(unsigned int old, unsigned int new) {
+ (void)old;
+ (void)new;
+}
+#define TRACE_KVM_UNPARK_VCPU 0
+#define TRACE_KVM_UNPARK_VCPU_ENABLED 0
+#define TRACE_KVM_UNPARK_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_unpark_vcpu(unsigned long arch_cpu_id, const char *msg) {
+ (void)arch_cpu_id;
+ (void)msg;
+}
+#define TRACE_KVM_VCPU_IOCTL 0
+#define TRACE_KVM_VCPU_IOCTL_ENABLED 0
+#define TRACE_KVM_VCPU_IOCTL_BACKEND_DSTATE() (0)
+static inline void trace_kvm_vcpu_ioctl(int cpu_index, unsigned long type, void *arg) {
+ (void)cpu_index;
+ (void)type;
+ (void)arg;
+}
+#define TRACE_KVM_VM_IOCTL 0
+#define TRACE_KVM_VM_IOCTL_ENABLED 0
+#define TRACE_KVM_VM_IOCTL_BACKEND_DSTATE() (0)
+static inline void trace_kvm_vm_ioctl(unsigned long type, void *arg) {
+ (void)type;
+ (void)arg;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-accel_mshv.h b/trace/trace-accel_mshv.h
new file mode 100644
index 0000000000..69e6a3c14e
--- /dev/null
+++ b/trace/trace-accel_mshv.h
@@ -0,0 +1,191 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_ACCEL_MSHV_H
+#define TRACE_TRACE_ACCEL_MSHV_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MSHV_ADD_MSI_ROUTING 0
+#define TRACE_MSHV_ADD_MSI_ROUTING_ENABLED 0
+#define TRACE_MSHV_ADD_MSI_ROUTING_BACKEND_DSTATE() (0)
+static inline void trace_mshv_add_msi_routing(uint64_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_MSHV_COMMIT_MSI_ROUTING_TABLE 0
+#define TRACE_MSHV_COMMIT_MSI_ROUTING_TABLE_ENABLED 0
+#define TRACE_MSHV_COMMIT_MSI_ROUTING_TABLE_BACKEND_DSTATE() (0)
+static inline void trace_mshv_commit_msi_routing_table(int vm_fd, int len) {
+ (void)vm_fd;
+ (void)len;
+}
+#define TRACE_MSHV_FIND_SLOT_BY_GPA 0
+#define TRACE_MSHV_FIND_SLOT_BY_GPA_ENABLED 0
+#define TRACE_MSHV_FIND_SLOT_BY_GPA_BACKEND_DSTATE() (0)
+static inline void trace_mshv_find_slot_by_gpa(uint64_t gpa) {
+ (void)gpa;
+}
+#define TRACE_MSHV_FOUND_SLOT 0
+#define TRACE_MSHV_FOUND_SLOT_ENABLED 0
+#define TRACE_MSHV_FOUND_SLOT_BACKEND_DSTATE() (0)
+static inline void trace_mshv_found_slot(uint64_t userspace_addr, uint64_t gpa, uint64_t size) {
+ (void)userspace_addr;
+ (void)gpa;
+ (void)size;
+}
+#define TRACE_MSHV_HANDLE_INTERRUPT 0
+#define TRACE_MSHV_HANDLE_INTERRUPT_ENABLED 0
+#define TRACE_MSHV_HANDLE_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_mshv_handle_interrupt(uint32_t cpu, int mask) {
+ (void)cpu;
+ (void)mask;
+}
+#define TRACE_MSHV_HANDLE_MMIO 0
+#define TRACE_MSHV_HANDLE_MMIO_ENABLED 0
+#define TRACE_MSHV_HANDLE_MMIO_BACKEND_DSTATE() (0)
+static inline void trace_mshv_handle_mmio(uint64_t gva, uint64_t gpa, uint64_t size, uint8_t access_type) {
+ (void)gva;
+ (void)gpa;
+ (void)size;
+ (void)access_type;
+}
+#define TRACE_MSHV_HVCALL_ARGS 0
+#define TRACE_MSHV_HVCALL_ARGS_ENABLED 0
+#define TRACE_MSHV_HVCALL_ARGS_BACKEND_DSTATE() (0)
+static inline void trace_mshv_hvcall_args(const char* hvcall, uint16_t code, uint16_t in_sz) {
+ (void)hvcall;
+ (void)code;
+ (void)in_sz;
+}
+#define TRACE_MSHV_INSN_FETCH 0
+#define TRACE_MSHV_INSN_FETCH_ENABLED 0
+#define TRACE_MSHV_INSN_FETCH_BACKEND_DSTATE() (0)
+static inline void trace_mshv_insn_fetch(uint64_t addr, size_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_MSHV_IRQCHIP_UPDATE_IRQFD_NOTIFIER_GSI 0
+#define TRACE_MSHV_IRQCHIP_UPDATE_IRQFD_NOTIFIER_GSI_ENABLED 0
+#define TRACE_MSHV_IRQCHIP_UPDATE_IRQFD_NOTIFIER_GSI_BACKEND_DSTATE() (0)
+static inline void trace_mshv_irqchip_update_irqfd_notifier_gsi(int event_fd, int resample_fd, int virq, bool add) {
+ (void)event_fd;
+ (void)resample_fd;
+ (void)virq;
+ (void)add;
+}
+#define TRACE_MSHV_MAP_MEMORY 0
+#define TRACE_MSHV_MAP_MEMORY_ENABLED 0
+#define TRACE_MSHV_MAP_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_mshv_map_memory(uint64_t userspace_addr, uint64_t gpa, uint64_t size) {
+ (void)userspace_addr;
+ (void)gpa;
+ (void)size;
+}
+#define TRACE_MSHV_MEM_IOEVENTFD_ADD 0
+#define TRACE_MSHV_MEM_IOEVENTFD_ADD_ENABLED 0
+#define TRACE_MSHV_MEM_IOEVENTFD_ADD_BACKEND_DSTATE() (0)
+static inline void trace_mshv_mem_ioeventfd_add(uint64_t addr, uint32_t size, uint32_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_MSHV_MEM_IOEVENTFD_DEL 0
+#define TRACE_MSHV_MEM_IOEVENTFD_DEL_ENABLED 0
+#define TRACE_MSHV_MEM_IOEVENTFD_DEL_BACKEND_DSTATE() (0)
+static inline void trace_mshv_mem_ioeventfd_del(uint64_t addr, uint32_t size, uint32_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_MSHV_MEM_READ 0
+#define TRACE_MSHV_MEM_READ_ENABLED 0
+#define TRACE_MSHV_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_mshv_mem_read(uint64_t addr, size_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_MSHV_MEM_WRITE 0
+#define TRACE_MSHV_MEM_WRITE_ENABLED 0
+#define TRACE_MSHV_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mshv_mem_write(uint64_t addr, size_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_MSHV_REGISTER_IRQFD 0
+#define TRACE_MSHV_REGISTER_IRQFD_ENABLED 0
+#define TRACE_MSHV_REGISTER_IRQFD_BACKEND_DSTATE() (0)
+static inline void trace_mshv_register_irqfd(int vm_fd, int event_fd, uint32_t gsi) {
+ (void)vm_fd;
+ (void)event_fd;
+ (void)gsi;
+}
+#define TRACE_MSHV_REMAP_ATTEMPT 0
+#define TRACE_MSHV_REMAP_ATTEMPT_ENABLED 0
+#define TRACE_MSHV_REMAP_ATTEMPT_BACKEND_DSTATE() (0)
+static inline void trace_mshv_remap_attempt(uint64_t userspace_addr, uint64_t gpa, uint64_t size) {
+ (void)userspace_addr;
+ (void)gpa;
+ (void)size;
+}
+#define TRACE_MSHV_REMOVE_MSI_ROUTING 0
+#define TRACE_MSHV_REMOVE_MSI_ROUTING_ENABLED 0
+#define TRACE_MSHV_REMOVE_MSI_ROUTING_BACKEND_DSTATE() (0)
+static inline void trace_mshv_remove_msi_routing(uint32_t gsi) {
+ (void)gsi;
+}
+#define TRACE_MSHV_SET_MEMORY 0
+#define TRACE_MSHV_SET_MEMORY_ENABLED 0
+#define TRACE_MSHV_SET_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_mshv_set_memory(bool add, uint64_t gpa, uint64_t size, uint64_t user_addr, bool readonly, int ret) {
+ (void)add;
+ (void)gpa;
+ (void)size;
+ (void)user_addr;
+ (void)readonly;
+ (void)ret;
+}
+#define TRACE_MSHV_SET_MSI_ROUTING 0
+#define TRACE_MSHV_SET_MSI_ROUTING_ENABLED 0
+#define TRACE_MSHV_SET_MSI_ROUTING_BACKEND_DSTATE() (0)
+static inline void trace_mshv_set_msi_routing(uint32_t gsi, uint64_t addr, uint32_t data) {
+ (void)gsi;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_MSHV_SET_PHYS_MEM 0
+#define TRACE_MSHV_SET_PHYS_MEM_ENABLED 0
+#define TRACE_MSHV_SET_PHYS_MEM_BACKEND_DSTATE() (0)
+static inline void trace_mshv_set_phys_mem(bool add, const char *name, uint64_t gpa) {
+ (void)add;
+ (void)name;
+ (void)gpa;
+}
+#define TRACE_MSHV_SKIP_UNSET_MEM 0
+#define TRACE_MSHV_SKIP_UNSET_MEM_ENABLED 0
+#define TRACE_MSHV_SKIP_UNSET_MEM_BACKEND_DSTATE() (0)
+static inline void trace_mshv_skip_unset_mem(uint64_t userspace_addr, uint64_t gpa, uint64_t size) {
+ (void)userspace_addr;
+ (void)gpa;
+ (void)size;
+}
+#define TRACE_MSHV_START_VCPU_THREAD 0
+#define TRACE_MSHV_START_VCPU_THREAD_ENABLED 0
+#define TRACE_MSHV_START_VCPU_THREAD_BACKEND_DSTATE() (0)
+static inline void trace_mshv_start_vcpu_thread(const char* thread, uint32_t cpu) {
+ (void)thread;
+ (void)cpu;
+}
+#define TRACE_MSHV_UNMAP_MEMORY 0
+#define TRACE_MSHV_UNMAP_MEMORY_ENABLED 0
+#define TRACE_MSHV_UNMAP_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_mshv_unmap_memory(uint64_t userspace_addr, uint64_t gpa, uint64_t size) {
+ (void)userspace_addr;
+ (void)gpa;
+ (void)size;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-accel_tcg.h b/trace/trace-accel_tcg.h
new file mode 100644
index 0000000000..ec188d4df7
--- /dev/null
+++ b/trace/trace-accel_tcg.h
@@ -0,0 +1,135 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_ACCEL_TCG_H
+#define TRACE_TRACE_ACCEL_TCG_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_EXEC_TB 0
+#define TRACE_EXEC_TB_ENABLED 0
+#define TRACE_EXEC_TB_BACKEND_DSTATE() (0)
+static inline void trace_exec_tb(void *tb, uintptr_t pc) {
+ (void)tb;
+ (void)pc;
+}
+#define TRACE_EXEC_TB_EXIT 0
+#define TRACE_EXEC_TB_EXIT_ENABLED 0
+#define TRACE_EXEC_TB_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_exec_tb_exit(void *last_tb, unsigned int flags) {
+ (void)last_tb;
+ (void)flags;
+}
+#define TRACE_EXEC_TB_NOCACHE 0
+#define TRACE_EXEC_TB_NOCACHE_ENABLED 0
+#define TRACE_EXEC_TB_NOCACHE_BACKEND_DSTATE() (0)
+static inline void trace_exec_tb_nocache(void *tb, uintptr_t pc) {
+ (void)tb;
+ (void)pc;
+}
+#define TRACE_LOAD_ATOM16_FALLBACK 0
+#define TRACE_LOAD_ATOM16_FALLBACK_ENABLED 0
+#define TRACE_LOAD_ATOM16_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_load_atom16_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_LOAD_ATOM16_OR_EXIT_FALLBACK 0
+#define TRACE_LOAD_ATOM16_OR_EXIT_FALLBACK_ENABLED 0
+#define TRACE_LOAD_ATOM16_OR_EXIT_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_load_atom16_or_exit_fallback(uintptr_t ra) {
+ (void)ra;
+}
+#define TRACE_LOAD_ATOM2_FALLBACK 0
+#define TRACE_LOAD_ATOM2_FALLBACK_ENABLED 0
+#define TRACE_LOAD_ATOM2_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_load_atom2_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_LOAD_ATOM4_FALLBACK 0
+#define TRACE_LOAD_ATOM4_FALLBACK_ENABLED 0
+#define TRACE_LOAD_ATOM4_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_load_atom4_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_LOAD_ATOM8_FALLBACK 0
+#define TRACE_LOAD_ATOM8_FALLBACK_ENABLED 0
+#define TRACE_LOAD_ATOM8_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_load_atom8_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_LOAD_ATOM8_OR_EXIT_FALLBACK 0
+#define TRACE_LOAD_ATOM8_OR_EXIT_FALLBACK_ENABLED 0
+#define TRACE_LOAD_ATOM8_OR_EXIT_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_load_atom8_or_exit_fallback(uintptr_t ra) {
+ (void)ra;
+}
+#define TRACE_MEMORY_NOTDIRTY_SET_DIRTY 0
+#define TRACE_MEMORY_NOTDIRTY_SET_DIRTY_ENABLED 0
+#define TRACE_MEMORY_NOTDIRTY_SET_DIRTY_BACKEND_DSTATE() (0)
+static inline void trace_memory_notdirty_set_dirty(uint64_t vaddr) {
+ (void)vaddr;
+}
+#define TRACE_MEMORY_NOTDIRTY_WRITE_ACCESS 0
+#define TRACE_MEMORY_NOTDIRTY_WRITE_ACCESS_ENABLED 0
+#define TRACE_MEMORY_NOTDIRTY_WRITE_ACCESS_BACKEND_DSTATE() (0)
+static inline void trace_memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) {
+ (void)vaddr;
+ (void)ram_addr;
+ (void)size;
+}
+#define TRACE_STORE_ATOM16_FALLBACK 0
+#define TRACE_STORE_ATOM16_FALLBACK_ENABLED 0
+#define TRACE_STORE_ATOM16_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_store_atom16_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_STORE_ATOM2_FALLBACK 0
+#define TRACE_STORE_ATOM2_FALLBACK_ENABLED 0
+#define TRACE_STORE_ATOM2_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_store_atom2_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_STORE_ATOM4_FALLBACK 0
+#define TRACE_STORE_ATOM4_FALLBACK_ENABLED 0
+#define TRACE_STORE_ATOM4_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_store_atom4_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_STORE_ATOM8_FALLBACK 0
+#define TRACE_STORE_ATOM8_FALLBACK_ENABLED 0
+#define TRACE_STORE_ATOM8_FALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_store_atom8_fallback(uint32_t memop, uintptr_t ra) {
+ (void)memop;
+ (void)ra;
+}
+#define TRACE_TB_FLUSH 0
+#define TRACE_TB_FLUSH_ENABLED 0
+#define TRACE_TB_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_tb_flush(void) {
+}
+#define TRACE_TB_GEN_CODE_BUFFER_OVERFLOW 0
+#define TRACE_TB_GEN_CODE_BUFFER_OVERFLOW_ENABLED 0
+#define TRACE_TB_GEN_CODE_BUFFER_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_tb_gen_code_buffer_overflow(const char *reason) {
+ (void)reason;
+}
+#define TRACE_TRANSLATE_BLOCK 0
+#define TRACE_TRANSLATE_BLOCK_ENABLED 0
+#define TRACE_TRANSLATE_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_translate_block(void *tb, uintptr_t pc, const void *tb_code) {
+ (void)tb;
+ (void)pc;
+ (void)tb_code;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-audio.h b/trace/trace-audio.h
new file mode 100644
index 0000000000..250b04a213
--- /dev/null
+++ b/trace/trace-audio.h
@@ -0,0 +1,147 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_AUDIO_H
+#define TRACE_TRACE_AUDIO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALSA_POLLOUT 0
+#define TRACE_ALSA_POLLOUT_ENABLED 0
+#define TRACE_ALSA_POLLOUT_BACKEND_DSTATE() (0)
+static inline void trace_alsa_pollout(int i, int fd) {
+ (void)i;
+ (void)fd;
+}
+#define TRACE_ALSA_READ_ZERO 0
+#define TRACE_ALSA_READ_ZERO_ENABLED 0
+#define TRACE_ALSA_READ_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_alsa_read_zero(long len) {
+ (void)len;
+}
+#define TRACE_ALSA_RESUME_OUT 0
+#define TRACE_ALSA_RESUME_OUT_ENABLED 0
+#define TRACE_ALSA_RESUME_OUT_BACKEND_DSTATE() (0)
+static inline void trace_alsa_resume_out(void) {
+}
+#define TRACE_ALSA_REVENTS 0
+#define TRACE_ALSA_REVENTS_ENABLED 0
+#define TRACE_ALSA_REVENTS_BACKEND_DSTATE() (0)
+static inline void trace_alsa_revents(int revents) {
+ (void)revents;
+}
+#define TRACE_ALSA_SET_HANDLER 0
+#define TRACE_ALSA_SET_HANDLER_ENABLED 0
+#define TRACE_ALSA_SET_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_alsa_set_handler(int events, int index, int fd, int err) {
+ (void)events;
+ (void)index;
+ (void)fd;
+ (void)err;
+}
+#define TRACE_ALSA_WROTE_ZERO 0
+#define TRACE_ALSA_WROTE_ZERO_ENABLED 0
+#define TRACE_ALSA_WROTE_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_alsa_wrote_zero(int len) {
+ (void)len;
+}
+#define TRACE_ALSA_XRUN_IN 0
+#define TRACE_ALSA_XRUN_IN_ENABLED 0
+#define TRACE_ALSA_XRUN_IN_BACKEND_DSTATE() (0)
+static inline void trace_alsa_xrun_in(void) {
+}
+#define TRACE_ALSA_XRUN_OUT 0
+#define TRACE_ALSA_XRUN_OUT_ENABLED 0
+#define TRACE_ALSA_XRUN_OUT_BACKEND_DSTATE() (0)
+static inline void trace_alsa_xrun_out(void) {
+}
+#define TRACE_AUDIO_TIMER_DELAYED 0
+#define TRACE_AUDIO_TIMER_DELAYED_ENABLED 0
+#define TRACE_AUDIO_TIMER_DELAYED_BACKEND_DSTATE() (0)
+static inline void trace_audio_timer_delayed(int interval) {
+ (void)interval;
+}
+#define TRACE_AUDIO_TIMER_START 0
+#define TRACE_AUDIO_TIMER_START_ENABLED 0
+#define TRACE_AUDIO_TIMER_START_BACKEND_DSTATE() (0)
+static inline void trace_audio_timer_start(int interval) {
+ (void)interval;
+}
+#define TRACE_AUDIO_TIMER_STOP 0
+#define TRACE_AUDIO_TIMER_STOP_ENABLED 0
+#define TRACE_AUDIO_TIMER_STOP_BACKEND_DSTATE() (0)
+static inline void trace_audio_timer_stop(void) {
+}
+#define TRACE_DBUS_AUDIO_PUT_BUFFER_OUT 0
+#define TRACE_DBUS_AUDIO_PUT_BUFFER_OUT_ENABLED 0
+#define TRACE_DBUS_AUDIO_PUT_BUFFER_OUT_BACKEND_DSTATE() (0)
+static inline void trace_dbus_audio_put_buffer_out(size_t pos, size_t size) {
+ (void)pos;
+ (void)size;
+}
+#define TRACE_DBUS_AUDIO_READ 0
+#define TRACE_DBUS_AUDIO_READ_ENABLED 0
+#define TRACE_DBUS_AUDIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_dbus_audio_read(size_t len) {
+ (void)len;
+}
+#define TRACE_DBUS_AUDIO_REGISTER 0
+#define TRACE_DBUS_AUDIO_REGISTER_ENABLED 0
+#define TRACE_DBUS_AUDIO_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_dbus_audio_register(const char *s, const char *dir) {
+ (void)s;
+ (void)dir;
+}
+#define TRACE_OSS_VERSION 0
+#define TRACE_OSS_VERSION_ENABLED 0
+#define TRACE_OSS_VERSION_BACKEND_DSTATE() (0)
+static inline void trace_oss_version(int version) {
+ (void)version;
+}
+#define TRACE_PW_AUDIO_INIT 0
+#define TRACE_PW_AUDIO_INIT_ENABLED 0
+#define TRACE_PW_AUDIO_INIT_BACKEND_DSTATE() (0)
+static inline void trace_pw_audio_init(void) {
+}
+#define TRACE_PW_PERIOD 0
+#define TRACE_PW_PERIOD_ENABLED 0
+#define TRACE_PW_PERIOD_BACKEND_DSTATE() (0)
+static inline void trace_pw_period(uint64_t quantum, uint32_t rate) {
+ (void)quantum;
+ (void)rate;
+}
+#define TRACE_PW_READ 0
+#define TRACE_PW_READ_ENABLED 0
+#define TRACE_PW_READ_BACKEND_DSTATE() (0)
+static inline void trace_pw_read(int32_t avail, uint32_t index, size_t len) {
+ (void)avail;
+ (void)index;
+ (void)len;
+}
+#define TRACE_PW_STATE_CHANGED 0
+#define TRACE_PW_STATE_CHANGED_ENABLED 0
+#define TRACE_PW_STATE_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_pw_state_changed(int nodeid, const char *s) {
+ (void)nodeid;
+ (void)s;
+}
+#define TRACE_PW_VOL 0
+#define TRACE_PW_VOL_ENABLED 0
+#define TRACE_PW_VOL_BACKEND_DSTATE() (0)
+static inline void trace_pw_vol(const char *ret) {
+ (void)ret;
+}
+#define TRACE_PW_WRITE 0
+#define TRACE_PW_WRITE_ENABLED 0
+#define TRACE_PW_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pw_write(int32_t filled, int32_t avail, uint32_t index, size_t len) {
+ (void)filled;
+ (void)avail;
+ (void)index;
+ (void)len;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-authz.h b/trace/trace-authz.h
new file mode 100644
index 0000000000..672562b1b1
--- /dev/null
+++ b/trace/trace-authz.h
@@ -0,0 +1,70 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_AUTHZ_H
+#define TRACE_TRACE_AUTHZ_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_QAUTHZ_IS_ALLOWED 0
+#define TRACE_QAUTHZ_IS_ALLOWED_ENABLED 0
+#define TRACE_QAUTHZ_IS_ALLOWED_BACKEND_DSTATE() (0)
+static inline void trace_qauthz_is_allowed(void *authz, const char *identity, bool allowed) {
+ (void)authz;
+ (void)identity;
+ (void)allowed;
+}
+#define TRACE_QAUTHZ_LIST_CHECK_RULE 0
+#define TRACE_QAUTHZ_LIST_CHECK_RULE_ENABLED 0
+#define TRACE_QAUTHZ_LIST_CHECK_RULE_BACKEND_DSTATE() (0)
+static inline void trace_qauthz_list_check_rule(void *authz, const char *identity, const char *rule, int format, int policy) {
+ (void)authz;
+ (void)identity;
+ (void)rule;
+ (void)format;
+ (void)policy;
+}
+#define TRACE_QAUTHZ_LIST_DEFAULT_POLICY 0
+#define TRACE_QAUTHZ_LIST_DEFAULT_POLICY_ENABLED 0
+#define TRACE_QAUTHZ_LIST_DEFAULT_POLICY_BACKEND_DSTATE() (0)
+static inline void trace_qauthz_list_default_policy(void *authz, const char *identity, int policy) {
+ (void)authz;
+ (void)identity;
+ (void)policy;
+}
+#define TRACE_QAUTHZ_LIST_FILE_LOAD 0
+#define TRACE_QAUTHZ_LIST_FILE_LOAD_ENABLED 0
+#define TRACE_QAUTHZ_LIST_FILE_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_qauthz_list_file_load(void *authz, const char *filename) {
+ (void)authz;
+ (void)filename;
+}
+#define TRACE_QAUTHZ_LIST_FILE_REFRESH 0
+#define TRACE_QAUTHZ_LIST_FILE_REFRESH_ENABLED 0
+#define TRACE_QAUTHZ_LIST_FILE_REFRESH_BACKEND_DSTATE() (0)
+static inline void trace_qauthz_list_file_refresh(void *authz, const char *filename, int success) {
+ (void)authz;
+ (void)filename;
+ (void)success;
+}
+#define TRACE_QAUTHZ_PAM_CHECK 0
+#define TRACE_QAUTHZ_PAM_CHECK_ENABLED 0
+#define TRACE_QAUTHZ_PAM_CHECK_BACKEND_DSTATE() (0)
+static inline void trace_qauthz_pam_check(void *authz, const char *identity, const char *service) {
+ (void)authz;
+ (void)identity;
+ (void)service;
+}
+#define TRACE_QAUTHZ_SIMPLE_IS_ALLOWED 0
+#define TRACE_QAUTHZ_SIMPLE_IS_ALLOWED_ENABLED 0
+#define TRACE_QAUTHZ_SIMPLE_IS_ALLOWED_BACKEND_DSTATE() (0)
+static inline void trace_qauthz_simple_is_allowed(void *authz, const char *wantidentity, const char *gotidentity) {
+ (void)authz;
+ (void)wantidentity;
+ (void)gotidentity;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-backends.h b/trace/trace-backends.h
new file mode 100644
index 0000000000..cdc2986891
--- /dev/null
+++ b/trace/trace-backends.h
@@ -0,0 +1,171 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_BACKENDS_H
+#define TRACE_TRACE_BACKENDS_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_DBUS_VMSTATE_LOADING 0
+#define TRACE_DBUS_VMSTATE_LOADING_ENABLED 0
+#define TRACE_DBUS_VMSTATE_LOADING_BACKEND_DSTATE() (0)
+static inline void trace_dbus_vmstate_loading(const char *id) {
+ (void)id;
+}
+#define TRACE_DBUS_VMSTATE_POST_LOAD 0
+#define TRACE_DBUS_VMSTATE_POST_LOAD_ENABLED 0
+#define TRACE_DBUS_VMSTATE_POST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_dbus_vmstate_post_load(int version_id) {
+ (void)version_id;
+}
+#define TRACE_DBUS_VMSTATE_PRE_SAVE 0
+#define TRACE_DBUS_VMSTATE_PRE_SAVE_ENABLED 0
+#define TRACE_DBUS_VMSTATE_PRE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_dbus_vmstate_pre_save(void) {
+}
+#define TRACE_DBUS_VMSTATE_SAVING 0
+#define TRACE_DBUS_VMSTATE_SAVING_ENABLED 0
+#define TRACE_DBUS_VMSTATE_SAVING_BACKEND_DSTATE() (0)
+static inline void trace_dbus_vmstate_saving(const char *id) {
+ (void)id;
+}
+#define TRACE_IOMMU_BACKEND_SET_FD 0
+#define TRACE_IOMMU_BACKEND_SET_FD_ENABLED 0
+#define TRACE_IOMMU_BACKEND_SET_FD_BACKEND_DSTATE() (0)
+static inline void trace_iommu_backend_set_fd(int fd) {
+ (void)fd;
+}
+#define TRACE_IOMMUFD_BACKEND_ALLOC_HWPT 0
+#define TRACE_IOMMUFD_BACKEND_ALLOC_HWPT_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_ALLOC_HWPT_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_alloc_hwpt(int iommufd, uint32_t dev_id, uint32_t pt_id, uint32_t flags, uint32_t hwpt_type, uint32_t len, uint64_t data_ptr, uint32_t out_hwpt_id, int ret) {
+ (void)iommufd;
+ (void)dev_id;
+ (void)pt_id;
+ (void)flags;
+ (void)hwpt_type;
+ (void)len;
+ (void)data_ptr;
+ (void)out_hwpt_id;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_ALLOC_IOAS 0
+#define TRACE_IOMMUFD_BACKEND_ALLOC_IOAS_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_ALLOC_IOAS_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_alloc_ioas(int iommufd, uint32_t ioas) {
+ (void)iommufd;
+ (void)ioas;
+}
+#define TRACE_IOMMUFD_BACKEND_CONNECT 0
+#define TRACE_IOMMUFD_BACKEND_CONNECT_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_connect(int fd, bool owned, uint32_t users) {
+ (void)fd;
+ (void)owned;
+ (void)users;
+}
+#define TRACE_IOMMUFD_BACKEND_DISCONNECT 0
+#define TRACE_IOMMUFD_BACKEND_DISCONNECT_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_disconnect(int fd, uint32_t users) {
+ (void)fd;
+ (void)users;
+}
+#define TRACE_IOMMUFD_BACKEND_FREE_ID 0
+#define TRACE_IOMMUFD_BACKEND_FREE_ID_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_FREE_ID_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_free_id(int iommufd, uint32_t id, int ret) {
+ (void)iommufd;
+ (void)id;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_GET_DIRTY_BITMAP 0
+#define TRACE_IOMMUFD_BACKEND_GET_DIRTY_BITMAP_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_GET_DIRTY_BITMAP_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_get_dirty_bitmap(int iommufd, uint32_t hwpt_id, uint64_t iova, uint64_t size, uint64_t page_size, int ret) {
+ (void)iommufd;
+ (void)hwpt_id;
+ (void)iova;
+ (void)size;
+ (void)page_size;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_INVALIDATE_CACHE 0
+#define TRACE_IOMMUFD_BACKEND_INVALIDATE_CACHE_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_INVALIDATE_CACHE_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_type, uint32_t entry_len, uint32_t entry_num, uint32_t done_num, uint64_t data_ptr, int ret) {
+ (void)iommufd;
+ (void)id;
+ (void)data_type;
+ (void)entry_len;
+ (void)entry_num;
+ (void)done_num;
+ (void)data_ptr;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_MAP_DMA 0
+#define TRACE_IOMMUFD_BACKEND_MAP_DMA_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_MAP_DMA_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_map_dma(int iommufd, uint32_t ioas, uint64_t iova, uint64_t size, void *vaddr, bool readonly, int ret) {
+ (void)iommufd;
+ (void)ioas;
+ (void)iova;
+ (void)size;
+ (void)vaddr;
+ (void)readonly;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_MAP_FILE_DMA 0
+#define TRACE_IOMMUFD_BACKEND_MAP_FILE_DMA_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_MAP_FILE_DMA_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_map_file_dma(int iommufd, uint32_t ioas, uint64_t iova, uint64_t size, int fd, unsigned long start, bool readonly, int ret) {
+ (void)iommufd;
+ (void)ioas;
+ (void)iova;
+ (void)size;
+ (void)fd;
+ (void)start;
+ (void)readonly;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_SET_DIRTY 0
+#define TRACE_IOMMUFD_BACKEND_SET_DIRTY_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_SET_DIRTY_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_set_dirty(int iommufd, uint32_t hwpt_id, bool start, int ret) {
+ (void)iommufd;
+ (void)hwpt_id;
+ (void)start;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_UNMAP_DMA 0
+#define TRACE_IOMMUFD_BACKEND_UNMAP_DMA_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_UNMAP_DMA_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_unmap_dma(int iommufd, uint32_t ioas, uint64_t iova, uint64_t size, int ret) {
+ (void)iommufd;
+ (void)ioas;
+ (void)iova;
+ (void)size;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_BACKEND_UNMAP_DMA_NON_EXIST 0
+#define TRACE_IOMMUFD_BACKEND_UNMAP_DMA_NON_EXIST_ENABLED 0
+#define TRACE_IOMMUFD_BACKEND_UNMAP_DMA_NON_EXIST_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_backend_unmap_dma_non_exist(int iommufd, uint32_t ioas, uint64_t iova, uint64_t size, int ret) {
+ (void)iommufd;
+ (void)ioas;
+ (void)iova;
+ (void)size;
+ (void)ret;
+}
+#define TRACE_IOMMUFD_CHANGE_PROCESS 0
+#define TRACE_IOMMUFD_CHANGE_PROCESS_ENABLED 0
+#define TRACE_IOMMUFD_CHANGE_PROCESS_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_change_process(int fd, bool ret) {
+ (void)fd;
+ (void)ret;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-backends_tpm.h b/trace/trace-backends_tpm.h
new file mode 100644
index 0000000000..d6d1437029
--- /dev/null
+++ b/trace/trace-backends_tpm.h
@@ -0,0 +1,188 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_BACKENDS_TPM_H
+#define TRACE_TRACE_BACKENDS_TPM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_TPM_EMULATOR_CANCEL_CMD_NOT_SUPT 0
+#define TRACE_TPM_EMULATOR_CANCEL_CMD_NOT_SUPT_ENABLED 0
+#define TRACE_TPM_EMULATOR_CANCEL_CMD_NOT_SUPT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_cancel_cmd_not_supt(void) {
+}
+#define TRACE_TPM_EMULATOR_GET_STATE_BLOB 0
+#define TRACE_TPM_EMULATOR_GET_STATE_BLOB_ENABLED 0
+#define TRACE_TPM_EMULATOR_GET_STATE_BLOB_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_get_state_blob(uint8_t type, uint32_t size, uint32_t flags) {
+ (void)type;
+ (void)size;
+ (void)flags;
+}
+#define TRACE_TPM_EMULATOR_GET_TPM_ESTABLISHED_FLAG 0
+#define TRACE_TPM_EMULATOR_GET_TPM_ESTABLISHED_FLAG_ENABLED 0
+#define TRACE_TPM_EMULATOR_GET_TPM_ESTABLISHED_FLAG_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_get_tpm_established_flag(uint8_t flag) {
+ (void)flag;
+}
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_STARTUP_ERROR 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_STARTUP_ERROR_ENABLED 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_STARTUP_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_handle_device_opts_startup_error(void) {
+}
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_TPM12 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_TPM12_ENABLED 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_TPM12_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_handle_device_opts_tpm12(void) {
+}
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_TPM2 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_TPM2_ENABLED 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_TPM2_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_handle_device_opts_tpm2(void) {
+}
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_UNSPEC 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_UNSPEC_ENABLED 0
+#define TRACE_TPM_EMULATOR_HANDLE_DEVICE_OPTS_UNSPEC_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_handle_device_opts_unspec(void) {
+}
+#define TRACE_TPM_EMULATOR_HANDLE_REQUEST 0
+#define TRACE_TPM_EMULATOR_HANDLE_REQUEST_ENABLED 0
+#define TRACE_TPM_EMULATOR_HANDLE_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_handle_request(void) {
+}
+#define TRACE_TPM_EMULATOR_INST_INIT 0
+#define TRACE_TPM_EMULATOR_INST_INIT_ENABLED 0
+#define TRACE_TPM_EMULATOR_INST_INIT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_inst_init(void) {
+}
+#define TRACE_TPM_EMULATOR_LOCK_STORAGE_CMD_NOT_SUPT 0
+#define TRACE_TPM_EMULATOR_LOCK_STORAGE_CMD_NOT_SUPT_ENABLED 0
+#define TRACE_TPM_EMULATOR_LOCK_STORAGE_CMD_NOT_SUPT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_lock_storage_cmd_not_supt(void) {
+}
+#define TRACE_TPM_EMULATOR_PRE_SAVE 0
+#define TRACE_TPM_EMULATOR_PRE_SAVE_ENABLED 0
+#define TRACE_TPM_EMULATOR_PRE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_pre_save(void) {
+}
+#define TRACE_TPM_EMULATOR_PROBE_CAPS 0
+#define TRACE_TPM_EMULATOR_PROBE_CAPS_ENABLED 0
+#define TRACE_TPM_EMULATOR_PROBE_CAPS_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_probe_caps(uint32_t caps) {
+ (void)caps;
+}
+#define TRACE_TPM_EMULATOR_SET_BUFFER_SIZE 0
+#define TRACE_TPM_EMULATOR_SET_BUFFER_SIZE_ENABLED 0
+#define TRACE_TPM_EMULATOR_SET_BUFFER_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_set_buffer_size(uint32_t buffersize, uint32_t minsize, uint32_t maxsize) {
+ (void)buffersize;
+ (void)minsize;
+ (void)maxsize;
+}
+#define TRACE_TPM_EMULATOR_SET_LOCALITY 0
+#define TRACE_TPM_EMULATOR_SET_LOCALITY_ENABLED 0
+#define TRACE_TPM_EMULATOR_SET_LOCALITY_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_set_locality(uint8_t locty) {
+ (void)locty;
+}
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOB 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOB_ENABLED 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOB_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_set_state_blob(uint8_t type, uint32_t size, uint32_t flags) {
+ (void)type;
+ (void)size;
+ (void)flags;
+}
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_ENABLED 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_set_state_blobs(void) {
+}
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_DONE 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_DONE_ENABLED 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_DONE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_set_state_blobs_done(void) {
+}
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_ERROR 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_ERROR_ENABLED 0
+#define TRACE_TPM_EMULATOR_SET_STATE_BLOBS_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_set_state_blobs_error(const char *msg) {
+ (void)msg;
+}
+#define TRACE_TPM_EMULATOR_STARTUP_TPM_RESUME 0
+#define TRACE_TPM_EMULATOR_STARTUP_TPM_RESUME_ENABLED 0
+#define TRACE_TPM_EMULATOR_STARTUP_TPM_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_startup_tpm_resume(bool is_resume, size_t buffersize) {
+ (void)is_resume;
+ (void)buffersize;
+}
+#define TRACE_TPM_EMULATOR_VM_STATE_CHANGE 0
+#define TRACE_TPM_EMULATOR_VM_STATE_CHANGE_ENABLED 0
+#define TRACE_TPM_EMULATOR_VM_STATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_emulator_vm_state_change(int running, int state) {
+ (void)running;
+ (void)state;
+}
+#define TRACE_TPM_PASSTHROUGH_HANDLE_REQUEST 0
+#define TRACE_TPM_PASSTHROUGH_HANDLE_REQUEST_ENABLED 0
+#define TRACE_TPM_PASSTHROUGH_HANDLE_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_tpm_passthrough_handle_request(void *cmd) {
+ (void)cmd;
+}
+#define TRACE_TPM_PASSTHROUGH_RESET 0
+#define TRACE_TPM_PASSTHROUGH_RESET_ENABLED 0
+#define TRACE_TPM_PASSTHROUGH_RESET_BACKEND_DSTATE() (0)
+static inline void trace_tpm_passthrough_reset(void) {
+}
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_ENABLED 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_util_get_buffer_size(size_t len) {
+ (void)len;
+}
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_HDR_LEN 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_HDR_LEN_ENABLED 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_HDR_LEN_BACKEND_DSTATE() (0)
+static inline void trace_tpm_util_get_buffer_size_hdr_len(uint32_t len, size_t expected) {
+ (void)len;
+ (void)expected;
+}
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_HDR_LEN2 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_HDR_LEN2_ENABLED 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_HDR_LEN2_BACKEND_DSTATE() (0)
+static inline void trace_tpm_util_get_buffer_size_hdr_len2(uint32_t len, size_t expected) {
+ (void)len;
+ (void)expected;
+}
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_LEN 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_LEN_ENABLED 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_LEN_BACKEND_DSTATE() (0)
+static inline void trace_tpm_util_get_buffer_size_len(uint32_t len, size_t expected) {
+ (void)len;
+ (void)expected;
+}
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_LEN2 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_LEN2_ENABLED 0
+#define TRACE_TPM_UTIL_GET_BUFFER_SIZE_LEN2_BACKEND_DSTATE() (0)
+static inline void trace_tpm_util_get_buffer_size_len2(uint32_t len, size_t expected) {
+ (void)len;
+ (void)expected;
+}
+#define TRACE_TPM_UTIL_SHOW_BUFFER_CONTENT 0
+#define TRACE_TPM_UTIL_SHOW_BUFFER_CONTENT_ENABLED 0
+#define TRACE_TPM_UTIL_SHOW_BUFFER_CONTENT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_util_show_buffer_content(const char *buf) {
+ (void)buf;
+}
+#define TRACE_TPM_UTIL_SHOW_BUFFER_HEADER 0
+#define TRACE_TPM_UTIL_SHOW_BUFFER_HEADER_ENABLED 0
+#define TRACE_TPM_UTIL_SHOW_BUFFER_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_tpm_util_show_buffer_header(const char *direction, size_t len) {
+ (void)direction;
+ (void)len;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-block.h b/trace/trace-block.h
new file mode 100644
index 0000000000..f601c00439
--- /dev/null
+++ b/trace/trace-block.h
@@ -0,0 +1,1270 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_BLOCK_H
+#define TRACE_TRACE_BLOCK_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_BACKUP_DO_COW_ENTER 0
+#define TRACE_BACKUP_DO_COW_ENTER_ENABLED 0
+#define TRACE_BACKUP_DO_COW_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_backup_do_cow_enter(void *job, int64_t start, int64_t offset, uint64_t bytes) {
+ (void)job;
+ (void)start;
+ (void)offset;
+ (void)bytes;
+}
+#define TRACE_BACKUP_DO_COW_RETURN 0
+#define TRACE_BACKUP_DO_COW_RETURN_ENABLED 0
+#define TRACE_BACKUP_DO_COW_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_backup_do_cow_return(void *job, int64_t offset, uint64_t bytes, int ret) {
+ (void)job;
+ (void)offset;
+ (void)bytes;
+ (void)ret;
+}
+#define TRACE_BDRV_CO_COPY_RANGE_FROM 0
+#define TRACE_BDRV_CO_COPY_RANGE_FROM_ENABLED 0
+#define TRACE_BDRV_CO_COPY_RANGE_FROM_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_co_copy_range_from(void *src, int64_t src_offset, void *dst, int64_t dst_offset, int64_t bytes, int read_flags, int write_flags) {
+ (void)src;
+ (void)src_offset;
+ (void)dst;
+ (void)dst_offset;
+ (void)bytes;
+ (void)read_flags;
+ (void)write_flags;
+}
+#define TRACE_BDRV_CO_COPY_RANGE_TO 0
+#define TRACE_BDRV_CO_COPY_RANGE_TO_ENABLED 0
+#define TRACE_BDRV_CO_COPY_RANGE_TO_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_co_copy_range_to(void *src, int64_t src_offset, void *dst, int64_t dst_offset, int64_t bytes, int read_flags, int write_flags) {
+ (void)src;
+ (void)src_offset;
+ (void)dst;
+ (void)dst_offset;
+ (void)bytes;
+ (void)read_flags;
+ (void)write_flags;
+}
+#define TRACE_BDRV_CO_DO_COPY_ON_READV 0
+#define TRACE_BDRV_CO_DO_COPY_ON_READV_ENABLED 0
+#define TRACE_BDRV_CO_DO_COPY_ON_READV_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_co_do_copy_on_readv(void *bs, int64_t offset, int64_t bytes, int64_t cluster_offset, int64_t cluster_bytes) {
+ (void)bs;
+ (void)offset;
+ (void)bytes;
+ (void)cluster_offset;
+ (void)cluster_bytes;
+}
+#define TRACE_BDRV_CO_PREADV_PART 0
+#define TRACE_BDRV_CO_PREADV_PART_ENABLED 0
+#define TRACE_BDRV_CO_PREADV_PART_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_co_preadv_part(void *bs, int64_t offset, int64_t bytes, unsigned int flags) {
+ (void)bs;
+ (void)offset;
+ (void)bytes;
+ (void)flags;
+}
+#define TRACE_BDRV_CO_PWRITE_ZEROES 0
+#define TRACE_BDRV_CO_PWRITE_ZEROES_ENABLED 0
+#define TRACE_BDRV_CO_PWRITE_ZEROES_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_co_pwrite_zeroes(void *bs, int64_t offset, int64_t bytes, int flags) {
+ (void)bs;
+ (void)offset;
+ (void)bytes;
+ (void)flags;
+}
+#define TRACE_BDRV_CO_PWRITEV_PART 0
+#define TRACE_BDRV_CO_PWRITEV_PART_ENABLED 0
+#define TRACE_BDRV_CO_PWRITEV_PART_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_co_pwritev_part(void *bs, int64_t offset, int64_t bytes, unsigned int flags) {
+ (void)bs;
+ (void)offset;
+ (void)bytes;
+ (void)flags;
+}
+#define TRACE_BDRV_LOCK_MEDIUM 0
+#define TRACE_BDRV_LOCK_MEDIUM_ENABLED 0
+#define TRACE_BDRV_LOCK_MEDIUM_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_lock_medium(void *bs, bool locked) {
+ (void)bs;
+ (void)locked;
+}
+#define TRACE_BDRV_OPEN_COMMON 0
+#define TRACE_BDRV_OPEN_COMMON_ENABLED 0
+#define TRACE_BDRV_OPEN_COMMON_BACKEND_DSTATE() (0)
+static inline void trace_bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) {
+ (void)bs;
+ (void)filename;
+ (void)flags;
+ (void)format_name;
+}
+#define TRACE_BLK_CO_PREADV 0
+#define TRACE_BLK_CO_PREADV_ENABLED 0
+#define TRACE_BLK_CO_PREADV_BACKEND_DSTATE() (0)
+static inline void trace_blk_co_preadv(void *blk, void *bs, int64_t offset, int64_t bytes, int flags) {
+ (void)blk;
+ (void)bs;
+ (void)offset;
+ (void)bytes;
+ (void)flags;
+}
+#define TRACE_BLK_CO_PWRITEV 0
+#define TRACE_BLK_CO_PWRITEV_ENABLED 0
+#define TRACE_BLK_CO_PWRITEV_BACKEND_DSTATE() (0)
+static inline void trace_blk_co_pwritev(void *blk, void *bs, int64_t offset, int64_t bytes, int flags) {
+ (void)blk;
+ (void)bs;
+ (void)offset;
+ (void)bytes;
+ (void)flags;
+}
+#define TRACE_BLK_ROOT_ATTACH 0
+#define TRACE_BLK_ROOT_ATTACH_ENABLED 0
+#define TRACE_BLK_ROOT_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_blk_root_attach(void *child, void *blk, void *bs) {
+ (void)child;
+ (void)blk;
+ (void)bs;
+}
+#define TRACE_BLK_ROOT_DETACH 0
+#define TRACE_BLK_ROOT_DETACH_ENABLED 0
+#define TRACE_BLK_ROOT_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_blk_root_detach(void *child, void *blk, void *bs) {
+ (void)child;
+ (void)blk;
+ (void)bs;
+}
+#define TRACE_BLOCK_COPY_COPY_RANGE_FAIL 0
+#define TRACE_BLOCK_COPY_COPY_RANGE_FAIL_ENABLED 0
+#define TRACE_BLOCK_COPY_COPY_RANGE_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_block_copy_copy_range_fail(void *bcs, int64_t start, int ret) {
+ (void)bcs;
+ (void)start;
+ (void)ret;
+}
+#define TRACE_BLOCK_COPY_PROCESS 0
+#define TRACE_BLOCK_COPY_PROCESS_ENABLED 0
+#define TRACE_BLOCK_COPY_PROCESS_BACKEND_DSTATE() (0)
+static inline void trace_block_copy_process(void *bcs, int64_t start) {
+ (void)bcs;
+ (void)start;
+}
+#define TRACE_BLOCK_COPY_READ_FAIL 0
+#define TRACE_BLOCK_COPY_READ_FAIL_ENABLED 0
+#define TRACE_BLOCK_COPY_READ_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_block_copy_read_fail(void *bcs, int64_t start, int ret) {
+ (void)bcs;
+ (void)start;
+ (void)ret;
+}
+#define TRACE_BLOCK_COPY_SKIP_RANGE 0
+#define TRACE_BLOCK_COPY_SKIP_RANGE_ENABLED 0
+#define TRACE_BLOCK_COPY_SKIP_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_block_copy_skip_range(void *bcs, int64_t start, uint64_t bytes) {
+ (void)bcs;
+ (void)start;
+ (void)bytes;
+}
+#define TRACE_BLOCK_COPY_WRITE_FAIL 0
+#define TRACE_BLOCK_COPY_WRITE_FAIL_ENABLED 0
+#define TRACE_BLOCK_COPY_WRITE_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_block_copy_write_fail(void *bcs, int64_t start, int ret) {
+ (void)bcs;
+ (void)start;
+ (void)ret;
+}
+#define TRACE_BLOCK_COPY_WRITE_ZEROES_FAIL 0
+#define TRACE_BLOCK_COPY_WRITE_ZEROES_FAIL_ENABLED 0
+#define TRACE_BLOCK_COPY_WRITE_ZEROES_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_block_copy_write_zeroes_fail(void *bcs, int64_t start, int ret) {
+ (void)bcs;
+ (void)start;
+ (void)ret;
+}
+#define TRACE_COMMIT_ONE_ITERATION 0
+#define TRACE_COMMIT_ONE_ITERATION_ENABLED 0
+#define TRACE_COMMIT_ONE_ITERATION_BACKEND_DSTATE() (0)
+static inline void trace_commit_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+ (void)is_allocated;
+}
+#define TRACE_COMMIT_START 0
+#define TRACE_COMMIT_START_ENABLED 0
+#define TRACE_COMMIT_START_BACKEND_DSTATE() (0)
+static inline void trace_commit_start(void *bs, void *base, void *top, void *s) {
+ (void)bs;
+ (void)base;
+ (void)top;
+ (void)s;
+}
+#define TRACE_CURL_CLOSE 0
+#define TRACE_CURL_CLOSE_ENABLED 0
+#define TRACE_CURL_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_curl_close(void) {
+}
+#define TRACE_CURL_OPEN 0
+#define TRACE_CURL_OPEN_ENABLED 0
+#define TRACE_CURL_OPEN_BACKEND_DSTATE() (0)
+static inline void trace_curl_open(const char *file) {
+ (void)file;
+}
+#define TRACE_CURL_OPEN_SIZE 0
+#define TRACE_CURL_OPEN_SIZE_ENABLED 0
+#define TRACE_CURL_OPEN_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_curl_open_size(uint64_t size) {
+ (void)size;
+}
+#define TRACE_CURL_READ_CB 0
+#define TRACE_CURL_READ_CB_ENABLED 0
+#define TRACE_CURL_READ_CB_BACKEND_DSTATE() (0)
+static inline void trace_curl_read_cb(size_t realsize) {
+ (void)realsize;
+}
+#define TRACE_CURL_SETUP_PREADV 0
+#define TRACE_CURL_SETUP_PREADV_ENABLED 0
+#define TRACE_CURL_SETUP_PREADV_BACKEND_DSTATE() (0)
+static inline void trace_curl_setup_preadv(uint64_t bytes, uint64_t start, const char *range) {
+ (void)bytes;
+ (void)start;
+ (void)range;
+}
+#define TRACE_CURL_SOCK_CB 0
+#define TRACE_CURL_SOCK_CB_ENABLED 0
+#define TRACE_CURL_SOCK_CB_BACKEND_DSTATE() (0)
+static inline void trace_curl_sock_cb(int action, int fd) {
+ (void)action;
+ (void)fd;
+}
+#define TRACE_CURL_TIMER_CB 0
+#define TRACE_CURL_TIMER_CB_ENABLED 0
+#define TRACE_CURL_TIMER_CB_BACKEND_DSTATE() (0)
+static inline void trace_curl_timer_cb(long timeout_ms) {
+ (void)timeout_ms;
+}
+#define TRACE_FILE_COPY_FILE_RANGE 0
+#define TRACE_FILE_COPY_FILE_RANGE_ENABLED 0
+#define TRACE_FILE_COPY_FILE_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_file_copy_file_range(void *bs, int src, int64_t src_off, int dst, int64_t dst_off, int64_t bytes, int flags, int64_t ret) {
+ (void)bs;
+ (void)src;
+ (void)src_off;
+ (void)dst;
+ (void)dst_off;
+ (void)bytes;
+ (void)flags;
+ (void)ret;
+}
+#define TRACE_FILE_FINDEJECTABLEOPTICALMEDIA 0
+#define TRACE_FILE_FINDEJECTABLEOPTICALMEDIA_ENABLED 0
+#define TRACE_FILE_FINDEJECTABLEOPTICALMEDIA_BACKEND_DSTATE() (0)
+static inline void trace_file_FindEjectableOpticalMedia(const char *media) {
+ (void)media;
+}
+#define TRACE_FILE_FLUSH_FDATASYNC_FAILED 0
+#define TRACE_FILE_FLUSH_FDATASYNC_FAILED_ENABLED 0
+#define TRACE_FILE_FLUSH_FDATASYNC_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_file_flush_fdatasync_failed(int err) {
+ (void)err;
+}
+#define TRACE_FILE_HDEV_IS_SG 0
+#define TRACE_FILE_HDEV_IS_SG_ENABLED 0
+#define TRACE_FILE_HDEV_IS_SG_BACKEND_DSTATE() (0)
+static inline void trace_file_hdev_is_sg(int type, int version) {
+ (void)type;
+ (void)version;
+}
+#define TRACE_FILE_PAIO_SUBMIT 0
+#define TRACE_FILE_PAIO_SUBMIT_ENABLED 0
+#define TRACE_FILE_PAIO_SUBMIT_BACKEND_DSTATE() (0)
+static inline void trace_file_paio_submit(void *acb, void *opaque, int64_t offset, int count, int type) {
+ (void)acb;
+ (void)opaque;
+ (void)offset;
+ (void)count;
+ (void)type;
+}
+#define TRACE_FILE_SETUP_CDROM 0
+#define TRACE_FILE_SETUP_CDROM_ENABLED 0
+#define TRACE_FILE_SETUP_CDROM_BACKEND_DSTATE() (0)
+static inline void trace_file_setup_cdrom(const char *partition) {
+ (void)partition;
+}
+#define TRACE_ISCSI_XCOPY 0
+#define TRACE_ISCSI_XCOPY_ENABLED 0
+#define TRACE_ISCSI_XCOPY_BACKEND_DSTATE() (0)
+static inline void trace_iscsi_xcopy(void *src_lun, uint64_t src_off, void *dst_lun, uint64_t dst_off, uint64_t bytes, int ret) {
+ (void)src_lun;
+ (void)src_off;
+ (void)dst_lun;
+ (void)dst_off;
+ (void)bytes;
+ (void)ret;
+}
+#define TRACE_LURING_CO_SUBMIT 0
+#define TRACE_LURING_CO_SUBMIT_ENABLED 0
+#define TRACE_LURING_CO_SUBMIT_BACKEND_DSTATE() (0)
+static inline void trace_luring_co_submit(void *bs, void *req, int fd, uint64_t offset, size_t nbytes, int type) {
+ (void)bs;
+ (void)req;
+ (void)fd;
+ (void)offset;
+ (void)nbytes;
+ (void)type;
+}
+#define TRACE_LURING_CQE_HANDLER 0
+#define TRACE_LURING_CQE_HANDLER_ENABLED 0
+#define TRACE_LURING_CQE_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_luring_cqe_handler(void *req, int ret) {
+ (void)req;
+ (void)ret;
+}
+#define TRACE_LURING_RESUBMIT_SHORT_READ 0
+#define TRACE_LURING_RESUBMIT_SHORT_READ_ENABLED 0
+#define TRACE_LURING_RESUBMIT_SHORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_luring_resubmit_short_read(void *req, int nread) {
+ (void)req;
+ (void)nread;
+}
+#define TRACE_MIRROR_BEFORE_DRAIN 0
+#define TRACE_MIRROR_BEFORE_DRAIN_ENABLED 0
+#define TRACE_MIRROR_BEFORE_DRAIN_BACKEND_DSTATE() (0)
+static inline void trace_mirror_before_drain(void *s, int64_t cnt) {
+ (void)s;
+ (void)cnt;
+}
+#define TRACE_MIRROR_BEFORE_FLUSH 0
+#define TRACE_MIRROR_BEFORE_FLUSH_ENABLED 0
+#define TRACE_MIRROR_BEFORE_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_mirror_before_flush(void *s) {
+ (void)s;
+}
+#define TRACE_MIRROR_BEFORE_SLEEP 0
+#define TRACE_MIRROR_BEFORE_SLEEP_ENABLED 0
+#define TRACE_MIRROR_BEFORE_SLEEP_BACKEND_DSTATE() (0)
+static inline void trace_mirror_before_sleep(void *s, int64_t cnt, int synced, uint64_t delay_ns) {
+ (void)s;
+ (void)cnt;
+ (void)synced;
+ (void)delay_ns;
+}
+#define TRACE_MIRROR_ITERATION_DONE 0
+#define TRACE_MIRROR_ITERATION_DONE_ENABLED 0
+#define TRACE_MIRROR_ITERATION_DONE_BACKEND_DSTATE() (0)
+static inline void trace_mirror_iteration_done(void *s, int64_t offset, uint64_t bytes, int ret) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+ (void)ret;
+}
+#define TRACE_MIRROR_ONE_ITERATION 0
+#define TRACE_MIRROR_ONE_ITERATION_ENABLED 0
+#define TRACE_MIRROR_ONE_ITERATION_BACKEND_DSTATE() (0)
+static inline void trace_mirror_one_iteration(void *s, int64_t offset, uint64_t bytes) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+}
+#define TRACE_MIRROR_RESTART_ITER 0
+#define TRACE_MIRROR_RESTART_ITER_ENABLED 0
+#define TRACE_MIRROR_RESTART_ITER_BACKEND_DSTATE() (0)
+static inline void trace_mirror_restart_iter(void *s, int64_t cnt) {
+ (void)s;
+ (void)cnt;
+}
+#define TRACE_MIRROR_START 0
+#define TRACE_MIRROR_START_ENABLED 0
+#define TRACE_MIRROR_START_BACKEND_DSTATE() (0)
+static inline void trace_mirror_start(void *bs, void *s, void *opaque) {
+ (void)bs;
+ (void)s;
+ (void)opaque;
+}
+#define TRACE_MIRROR_YIELD 0
+#define TRACE_MIRROR_YIELD_ENABLED 0
+#define TRACE_MIRROR_YIELD_BACKEND_DSTATE() (0)
+static inline void trace_mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) {
+ (void)s;
+ (void)cnt;
+ (void)buf_free_count;
+ (void)in_flight;
+}
+#define TRACE_MIRROR_YIELD_IN_FLIGHT 0
+#define TRACE_MIRROR_YIELD_IN_FLIGHT_ENABLED 0
+#define TRACE_MIRROR_YIELD_IN_FLIGHT_BACKEND_DSTATE() (0)
+static inline void trace_mirror_yield_in_flight(void *s, int64_t offset, int in_flight) {
+ (void)s;
+ (void)offset;
+ (void)in_flight;
+}
+#define TRACE_NBD_CLIENT_HANDSHAKE 0
+#define TRACE_NBD_CLIENT_HANDSHAKE_ENABLED 0
+#define TRACE_NBD_CLIENT_HANDSHAKE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_client_handshake(const char *export_name) {
+ (void)export_name;
+}
+#define TRACE_NBD_CLIENT_HANDSHAKE_SUCCESS 0
+#define TRACE_NBD_CLIENT_HANDSHAKE_SUCCESS_ENABLED 0
+#define TRACE_NBD_CLIENT_HANDSHAKE_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_client_handshake_success(const char *export_name) {
+ (void)export_name;
+}
+#define TRACE_NBD_CO_REQUEST_FAIL 0
+#define TRACE_NBD_CO_REQUEST_FAIL_ENABLED 0
+#define TRACE_NBD_CO_REQUEST_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_request_fail(uint64_t from, uint64_t len, uint64_t handle, uint16_t flags, uint16_t type, const char *name, int ret, const char *err) {
+ (void)from;
+ (void)len;
+ (void)handle;
+ (void)flags;
+ (void)type;
+ (void)name;
+ (void)ret;
+ (void)err;
+}
+#define TRACE_NBD_EXTENDED_HEADERS_COMPLIANCE 0
+#define TRACE_NBD_EXTENDED_HEADERS_COMPLIANCE_ENABLED 0
+#define TRACE_NBD_EXTENDED_HEADERS_COMPLIANCE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_extended_headers_compliance(const char *type) {
+ (void)type;
+}
+#define TRACE_NBD_PARSE_BLOCKSTATUS_COMPLIANCE 0
+#define TRACE_NBD_PARSE_BLOCKSTATUS_COMPLIANCE_ENABLED 0
+#define TRACE_NBD_PARSE_BLOCKSTATUS_COMPLIANCE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_parse_blockstatus_compliance(const char *err) {
+ (void)err;
+}
+#define TRACE_NBD_READ_REPLY_ENTRY_FAIL 0
+#define TRACE_NBD_READ_REPLY_ENTRY_FAIL_ENABLED 0
+#define TRACE_NBD_READ_REPLY_ENTRY_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_nbd_read_reply_entry_fail(int ret, const char *err) {
+ (void)ret;
+ (void)err;
+}
+#define TRACE_NBD_RECONNECT_ATTEMPT 0
+#define TRACE_NBD_RECONNECT_ATTEMPT_ENABLED 0
+#define TRACE_NBD_RECONNECT_ATTEMPT_BACKEND_DSTATE() (0)
+static inline void trace_nbd_reconnect_attempt(unsigned in_flight) {
+ (void)in_flight;
+}
+#define TRACE_NBD_RECONNECT_ATTEMPT_RESULT 0
+#define TRACE_NBD_RECONNECT_ATTEMPT_RESULT_ENABLED 0
+#define TRACE_NBD_RECONNECT_ATTEMPT_RESULT_BACKEND_DSTATE() (0)
+static inline void trace_nbd_reconnect_attempt_result(int ret, unsigned in_flight) {
+ (void)ret;
+ (void)in_flight;
+}
+#define TRACE_NBD_STRUCTURED_READ_COMPLIANCE 0
+#define TRACE_NBD_STRUCTURED_READ_COMPLIANCE_ENABLED 0
+#define TRACE_NBD_STRUCTURED_READ_COMPLIANCE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_structured_read_compliance(const char *type) {
+ (void)type;
+}
+#define TRACE_NVME_CMD_MAP_QIOV 0
+#define TRACE_NVME_CMD_MAP_QIOV_ENABLED 0
+#define TRACE_NVME_CMD_MAP_QIOV_BACKEND_DSTATE() (0)
+static inline void trace_nvme_cmd_map_qiov(void *s, void *cmd, void *req, void *qiov, int entries) {
+ (void)s;
+ (void)cmd;
+ (void)req;
+ (void)qiov;
+ (void)entries;
+}
+#define TRACE_NVME_CMD_MAP_QIOV_IOV 0
+#define TRACE_NVME_CMD_MAP_QIOV_IOV_ENABLED 0
+#define TRACE_NVME_CMD_MAP_QIOV_IOV_BACKEND_DSTATE() (0)
+static inline void trace_nvme_cmd_map_qiov_iov(void *s, int i, void *page, int pages) {
+ (void)s;
+ (void)i;
+ (void)page;
+ (void)pages;
+}
+#define TRACE_NVME_CMD_MAP_QIOV_PAGES 0
+#define TRACE_NVME_CMD_MAP_QIOV_PAGES_ENABLED 0
+#define TRACE_NVME_CMD_MAP_QIOV_PAGES_BACKEND_DSTATE() (0)
+static inline void trace_nvme_cmd_map_qiov_pages(void *s, int i, uint64_t page) {
+ (void)s;
+ (void)i;
+ (void)page;
+}
+#define TRACE_NVME_COMPLETE_COMMAND 0
+#define TRACE_NVME_COMPLETE_COMMAND_ENABLED 0
+#define TRACE_NVME_COMPLETE_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_nvme_complete_command(void *s, unsigned q_index, int cid) {
+ (void)s;
+ (void)q_index;
+ (void)cid;
+}
+#define TRACE_NVME_CONTROLLER_CAPABILITY 0
+#define TRACE_NVME_CONTROLLER_CAPABILITY_ENABLED 0
+#define TRACE_NVME_CONTROLLER_CAPABILITY_BACKEND_DSTATE() (0)
+static inline void trace_nvme_controller_capability(const char *desc, uint64_t value) {
+ (void)desc;
+ (void)value;
+}
+#define TRACE_NVME_CONTROLLER_CAPABILITY_RAW 0
+#define TRACE_NVME_CONTROLLER_CAPABILITY_RAW_ENABLED 0
+#define TRACE_NVME_CONTROLLER_CAPABILITY_RAW_BACKEND_DSTATE() (0)
+static inline void trace_nvme_controller_capability_raw(uint64_t value) {
+ (void)value;
+}
+#define TRACE_NVME_CONTROLLER_SPEC_VERSION 0
+#define TRACE_NVME_CONTROLLER_SPEC_VERSION_ENABLED 0
+#define TRACE_NVME_CONTROLLER_SPEC_VERSION_BACKEND_DSTATE() (0)
+static inline void trace_nvme_controller_spec_version(uint32_t mjr, uint32_t mnr, uint32_t ter) {
+ (void)mjr;
+ (void)mnr;
+ (void)ter;
+}
+#define TRACE_NVME_CREATE_QUEUE_PAIR 0
+#define TRACE_NVME_CREATE_QUEUE_PAIR_ENABLED 0
+#define TRACE_NVME_CREATE_QUEUE_PAIR_BACKEND_DSTATE() (0)
+static inline void trace_nvme_create_queue_pair(unsigned q_index, void *q, size_t size, void *aio_context, int fd) {
+ (void)q_index;
+ (void)q;
+ (void)size;
+ (void)aio_context;
+ (void)fd;
+}
+#define TRACE_NVME_DMA_FLUSH_QUEUE_WAIT 0
+#define TRACE_NVME_DMA_FLUSH_QUEUE_WAIT_ENABLED 0
+#define TRACE_NVME_DMA_FLUSH_QUEUE_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_nvme_dma_flush_queue_wait(void *s) {
+ (void)s;
+}
+#define TRACE_NVME_DMA_MAP_FLUSH 0
+#define TRACE_NVME_DMA_MAP_FLUSH_ENABLED 0
+#define TRACE_NVME_DMA_MAP_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_nvme_dma_map_flush(void *s) {
+ (void)s;
+}
+#define TRACE_NVME_DSM 0
+#define TRACE_NVME_DSM_ENABLED 0
+#define TRACE_NVME_DSM_BACKEND_DSTATE() (0)
+static inline void trace_nvme_dsm(void *s, int64_t offset, int64_t bytes) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+}
+#define TRACE_NVME_DSM_DONE 0
+#define TRACE_NVME_DSM_DONE_ENABLED 0
+#define TRACE_NVME_DSM_DONE_BACKEND_DSTATE() (0)
+static inline void trace_nvme_dsm_done(void *s, int64_t offset, int64_t bytes, int ret) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+ (void)ret;
+}
+#define TRACE_NVME_ERROR 0
+#define TRACE_NVME_ERROR_ENABLED 0
+#define TRACE_NVME_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_nvme_error(int cmd_specific, int sq_head, int sqid, int cid, int status) {
+ (void)cmd_specific;
+ (void)sq_head;
+ (void)sqid;
+ (void)cid;
+ (void)status;
+}
+#define TRACE_NVME_FREE_QUEUE_PAIR 0
+#define TRACE_NVME_FREE_QUEUE_PAIR_ENABLED 0
+#define TRACE_NVME_FREE_QUEUE_PAIR_BACKEND_DSTATE() (0)
+static inline void trace_nvme_free_queue_pair(unsigned q_index, void *q, void *cq, void *sq) {
+ (void)q_index;
+ (void)q;
+ (void)cq;
+ (void)sq;
+}
+#define TRACE_NVME_FREE_REQ_QUEUE_WAIT 0
+#define TRACE_NVME_FREE_REQ_QUEUE_WAIT_ENABLED 0
+#define TRACE_NVME_FREE_REQ_QUEUE_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_nvme_free_req_queue_wait(void *s, unsigned q_index) {
+ (void)s;
+ (void)q_index;
+}
+#define TRACE_NVME_HANDLE_EVENT 0
+#define TRACE_NVME_HANDLE_EVENT_ENABLED 0
+#define TRACE_NVME_HANDLE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_nvme_handle_event(void *s) {
+ (void)s;
+}
+#define TRACE_NVME_KICK 0
+#define TRACE_NVME_KICK_ENABLED 0
+#define TRACE_NVME_KICK_BACKEND_DSTATE() (0)
+static inline void trace_nvme_kick(void *s, unsigned q_index) {
+ (void)s;
+ (void)q_index;
+}
+#define TRACE_NVME_POLL_QUEUE 0
+#define TRACE_NVME_POLL_QUEUE_ENABLED 0
+#define TRACE_NVME_POLL_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_nvme_poll_queue(void *s, unsigned q_index) {
+ (void)s;
+ (void)q_index;
+}
+#define TRACE_NVME_PROCESS_COMPLETION 0
+#define TRACE_NVME_PROCESS_COMPLETION_ENABLED 0
+#define TRACE_NVME_PROCESS_COMPLETION_BACKEND_DSTATE() (0)
+static inline void trace_nvme_process_completion(void *s, unsigned q_index, int inflight) {
+ (void)s;
+ (void)q_index;
+ (void)inflight;
+}
+#define TRACE_NVME_PRW_ALIGNED 0
+#define TRACE_NVME_PRW_ALIGNED_ENABLED 0
+#define TRACE_NVME_PRW_ALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_nvme_prw_aligned(void *s, int is_write, uint64_t offset, uint64_t bytes, int flags, int niov) {
+ (void)s;
+ (void)is_write;
+ (void)offset;
+ (void)bytes;
+ (void)flags;
+ (void)niov;
+}
+#define TRACE_NVME_PRW_BUFFERED 0
+#define TRACE_NVME_PRW_BUFFERED_ENABLED 0
+#define TRACE_NVME_PRW_BUFFERED_BACKEND_DSTATE() (0)
+static inline void trace_nvme_prw_buffered(void *s, uint64_t offset, uint64_t bytes, int niov, int is_write) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+ (void)niov;
+ (void)is_write;
+}
+#define TRACE_NVME_QIOV_UNALIGNED 0
+#define TRACE_NVME_QIOV_UNALIGNED_ENABLED 0
+#define TRACE_NVME_QIOV_UNALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_nvme_qiov_unaligned(const void *qiov, int n, void *base, size_t size, int align) {
+ (void)qiov;
+ (void)n;
+ (void)base;
+ (void)size;
+ (void)align;
+}
+#define TRACE_NVME_RW_DONE 0
+#define TRACE_NVME_RW_DONE_ENABLED 0
+#define TRACE_NVME_RW_DONE_BACKEND_DSTATE() (0)
+static inline void trace_nvme_rw_done(void *s, int is_write, uint64_t offset, uint64_t bytes, int ret) {
+ (void)s;
+ (void)is_write;
+ (void)offset;
+ (void)bytes;
+ (void)ret;
+}
+#define TRACE_NVME_SUBMIT_COMMAND 0
+#define TRACE_NVME_SUBMIT_COMMAND_ENABLED 0
+#define TRACE_NVME_SUBMIT_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_nvme_submit_command(void *s, unsigned q_index, int cid) {
+ (void)s;
+ (void)q_index;
+ (void)cid;
+}
+#define TRACE_NVME_SUBMIT_COMMAND_RAW 0
+#define TRACE_NVME_SUBMIT_COMMAND_RAW_ENABLED 0
+#define TRACE_NVME_SUBMIT_COMMAND_RAW_BACKEND_DSTATE() (0)
+static inline void trace_nvme_submit_command_raw(int c0, int c1, int c2, int c3, int c4, int c5, int c6, int c7) {
+ (void)c0;
+ (void)c1;
+ (void)c2;
+ (void)c3;
+ (void)c4;
+ (void)c5;
+ (void)c6;
+ (void)c7;
+}
+#define TRACE_NVME_WRITE_ZEROES 0
+#define TRACE_NVME_WRITE_ZEROES_ENABLED 0
+#define TRACE_NVME_WRITE_ZEROES_BACKEND_DSTATE() (0)
+static inline void trace_nvme_write_zeroes(void *s, uint64_t offset, uint64_t bytes, int flags) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+ (void)flags;
+}
+#define TRACE_QCOW2_ADD_TASK 0
+#define TRACE_QCOW2_ADD_TASK_ENABLED 0
+#define TRACE_QCOW2_ADD_TASK_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_add_task(void *co, void *bs, void *pool, const char *action, int cluster_type, uint64_t host_offset, uint64_t offset, uint64_t bytes, void *qiov, size_t qiov_offset) {
+ (void)co;
+ (void)bs;
+ (void)pool;
+ (void)action;
+ (void)cluster_type;
+ (void)host_offset;
+ (void)offset;
+ (void)bytes;
+ (void)qiov;
+ (void)qiov_offset;
+}
+#define TRACE_QCOW2_ALLOC_CLUSTERS_OFFSET 0
+#define TRACE_QCOW2_ALLOC_CLUSTERS_OFFSET_ENABLED 0
+#define TRACE_QCOW2_ALLOC_CLUSTERS_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_alloc_clusters_offset(void *co, uint64_t offset, int bytes) {
+ (void)co;
+ (void)offset;
+ (void)bytes;
+}
+#define TRACE_QCOW2_CACHE_ENTRY_FLUSH 0
+#define TRACE_QCOW2_CACHE_ENTRY_FLUSH_ENABLED 0
+#define TRACE_QCOW2_CACHE_ENTRY_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cache_entry_flush(void *co, int c, int i) {
+ (void)co;
+ (void)c;
+ (void)i;
+}
+#define TRACE_QCOW2_CACHE_FLUSH 0
+#define TRACE_QCOW2_CACHE_FLUSH_ENABLED 0
+#define TRACE_QCOW2_CACHE_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cache_flush(void *co, int c) {
+ (void)co;
+ (void)c;
+}
+#define TRACE_QCOW2_CACHE_GET 0
+#define TRACE_QCOW2_CACHE_GET_ENABLED 0
+#define TRACE_QCOW2_CACHE_GET_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) {
+ (void)co;
+ (void)c;
+ (void)offset;
+ (void)read_from_disk;
+}
+#define TRACE_QCOW2_CACHE_GET_DONE 0
+#define TRACE_QCOW2_CACHE_GET_DONE_ENABLED 0
+#define TRACE_QCOW2_CACHE_GET_DONE_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cache_get_done(void *co, int c, int i) {
+ (void)co;
+ (void)c;
+ (void)i;
+}
+#define TRACE_QCOW2_CACHE_GET_READ 0
+#define TRACE_QCOW2_CACHE_GET_READ_ENABLED 0
+#define TRACE_QCOW2_CACHE_GET_READ_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cache_get_read(void *co, int c, int i) {
+ (void)co;
+ (void)c;
+ (void)i;
+}
+#define TRACE_QCOW2_CACHE_GET_REPLACE_ENTRY 0
+#define TRACE_QCOW2_CACHE_GET_REPLACE_ENTRY_ENABLED 0
+#define TRACE_QCOW2_CACHE_GET_REPLACE_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cache_get_replace_entry(void *co, int c, int i) {
+ (void)co;
+ (void)c;
+ (void)i;
+}
+#define TRACE_QCOW2_CLUSTER_ALLOC_PHYS 0
+#define TRACE_QCOW2_CLUSTER_ALLOC_PHYS_ENABLED 0
+#define TRACE_QCOW2_CLUSTER_ALLOC_PHYS_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cluster_alloc_phys(void *co) {
+ (void)co;
+}
+#define TRACE_QCOW2_CLUSTER_LINK_L2 0
+#define TRACE_QCOW2_CLUSTER_LINK_L2_ENABLED 0
+#define TRACE_QCOW2_CLUSTER_LINK_L2_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_cluster_link_l2(void *co, int nb_clusters) {
+ (void)co;
+ (void)nb_clusters;
+}
+#define TRACE_QCOW2_DO_ALLOC_CLUSTERS_OFFSET 0
+#define TRACE_QCOW2_DO_ALLOC_CLUSTERS_OFFSET_ENABLED 0
+#define TRACE_QCOW2_DO_ALLOC_CLUSTERS_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) {
+ (void)co;
+ (void)guest_offset;
+ (void)host_offset;
+ (void)nb_clusters;
+}
+#define TRACE_QCOW2_HANDLE_ALLOC 0
+#define TRACE_QCOW2_HANDLE_ALLOC_ENABLED 0
+#define TRACE_QCOW2_HANDLE_ALLOC_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) {
+ (void)co;
+ (void)guest_offset;
+ (void)host_offset;
+ (void)bytes;
+}
+#define TRACE_QCOW2_HANDLE_COPIED 0
+#define TRACE_QCOW2_HANDLE_COPIED_ENABLED 0
+#define TRACE_QCOW2_HANDLE_COPIED_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) {
+ (void)co;
+ (void)guest_offset;
+ (void)host_offset;
+ (void)bytes;
+}
+#define TRACE_QCOW2_L2_ALLOCATE 0
+#define TRACE_QCOW2_L2_ALLOCATE_ENABLED 0
+#define TRACE_QCOW2_L2_ALLOCATE_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_l2_allocate(void *bs, int l1_index) {
+ (void)bs;
+ (void)l1_index;
+}
+#define TRACE_QCOW2_L2_ALLOCATE_DONE 0
+#define TRACE_QCOW2_L2_ALLOCATE_DONE_ENABLED 0
+#define TRACE_QCOW2_L2_ALLOCATE_DONE_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_l2_allocate_done(void *bs, int l1_index, int ret) {
+ (void)bs;
+ (void)l1_index;
+ (void)ret;
+}
+#define TRACE_QCOW2_L2_ALLOCATE_GET_EMPTY 0
+#define TRACE_QCOW2_L2_ALLOCATE_GET_EMPTY_ENABLED 0
+#define TRACE_QCOW2_L2_ALLOCATE_GET_EMPTY_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_l2_allocate_get_empty(void *bs, int l1_index) {
+ (void)bs;
+ (void)l1_index;
+}
+#define TRACE_QCOW2_L2_ALLOCATE_WRITE_L1 0
+#define TRACE_QCOW2_L2_ALLOCATE_WRITE_L1_ENABLED 0
+#define TRACE_QCOW2_L2_ALLOCATE_WRITE_L1_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_l2_allocate_write_l1(void *bs, int l1_index) {
+ (void)bs;
+ (void)l1_index;
+}
+#define TRACE_QCOW2_L2_ALLOCATE_WRITE_L2 0
+#define TRACE_QCOW2_L2_ALLOCATE_WRITE_L2_ENABLED 0
+#define TRACE_QCOW2_L2_ALLOCATE_WRITE_L2_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_l2_allocate_write_l2(void *bs, int l1_index) {
+ (void)bs;
+ (void)l1_index;
+}
+#define TRACE_QCOW2_PROCESS_DISCARDS_FAILED_REGION 0
+#define TRACE_QCOW2_PROCESS_DISCARDS_FAILED_REGION_ENABLED 0
+#define TRACE_QCOW2_PROCESS_DISCARDS_FAILED_REGION_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_process_discards_failed_region(uint64_t offset, uint64_t bytes, int ret) {
+ (void)offset;
+ (void)bytes;
+ (void)ret;
+}
+#define TRACE_QCOW2_PWRITE_ZEROES 0
+#define TRACE_QCOW2_PWRITE_ZEROES_ENABLED 0
+#define TRACE_QCOW2_PWRITE_ZEROES_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_pwrite_zeroes(void *co, int64_t offset, int64_t bytes) {
+ (void)co;
+ (void)offset;
+ (void)bytes;
+}
+#define TRACE_QCOW2_PWRITE_ZEROES_START_REQ 0
+#define TRACE_QCOW2_PWRITE_ZEROES_START_REQ_ENABLED 0
+#define TRACE_QCOW2_PWRITE_ZEROES_START_REQ_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_pwrite_zeroes_start_req(void *co, int64_t offset, int64_t bytes) {
+ (void)co;
+ (void)offset;
+ (void)bytes;
+}
+#define TRACE_QCOW2_SKIP_COW 0
+#define TRACE_QCOW2_SKIP_COW_ENABLED 0
+#define TRACE_QCOW2_SKIP_COW_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_skip_cow(void *co, uint64_t offset, int nb_clusters) {
+ (void)co;
+ (void)offset;
+ (void)nb_clusters;
+}
+#define TRACE_QCOW2_WRITEV_DATA 0
+#define TRACE_QCOW2_WRITEV_DATA_ENABLED 0
+#define TRACE_QCOW2_WRITEV_DATA_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_writev_data(void *co, uint64_t offset) {
+ (void)co;
+ (void)offset;
+}
+#define TRACE_QCOW2_WRITEV_DONE_PART 0
+#define TRACE_QCOW2_WRITEV_DONE_PART_ENABLED 0
+#define TRACE_QCOW2_WRITEV_DONE_PART_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_writev_done_part(void *co, int cur_bytes) {
+ (void)co;
+ (void)cur_bytes;
+}
+#define TRACE_QCOW2_WRITEV_DONE_REQ 0
+#define TRACE_QCOW2_WRITEV_DONE_REQ_ENABLED 0
+#define TRACE_QCOW2_WRITEV_DONE_REQ_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_writev_done_req(void *co, int ret) {
+ (void)co;
+ (void)ret;
+}
+#define TRACE_QCOW2_WRITEV_START_PART 0
+#define TRACE_QCOW2_WRITEV_START_PART_ENABLED 0
+#define TRACE_QCOW2_WRITEV_START_PART_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_writev_start_part(void *co) {
+ (void)co;
+}
+#define TRACE_QCOW2_WRITEV_START_REQ 0
+#define TRACE_QCOW2_WRITEV_START_REQ_ENABLED 0
+#define TRACE_QCOW2_WRITEV_START_REQ_BACKEND_DSTATE() (0)
+static inline void trace_qcow2_writev_start_req(void *co, int64_t offset, int64_t bytes) {
+ (void)co;
+ (void)offset;
+ (void)bytes;
+}
+#define TRACE_QED_AIO_COMPLETE 0
+#define TRACE_QED_AIO_COMPLETE_ENABLED 0
+#define TRACE_QED_AIO_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_complete(void *s, void *acb, int ret) {
+ (void)s;
+ (void)acb;
+ (void)ret;
+}
+#define TRACE_QED_AIO_NEXT_IO 0
+#define TRACE_QED_AIO_NEXT_IO_ENABLED 0
+#define TRACE_QED_AIO_NEXT_IO_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) {
+ (void)s;
+ (void)acb;
+ (void)ret;
+ (void)cur_pos;
+}
+#define TRACE_QED_AIO_READ_DATA 0
+#define TRACE_QED_AIO_READ_DATA_ENABLED 0
+#define TRACE_QED_AIO_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) {
+ (void)s;
+ (void)acb;
+ (void)ret;
+ (void)offset;
+ (void)len;
+}
+#define TRACE_QED_AIO_SETUP 0
+#define TRACE_QED_AIO_SETUP_ENABLED 0
+#define TRACE_QED_AIO_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) {
+ (void)s;
+ (void)acb;
+ (void)sector_num;
+ (void)nb_sectors;
+ (void)opaque;
+ (void)flags;
+}
+#define TRACE_QED_AIO_WRITE_DATA 0
+#define TRACE_QED_AIO_WRITE_DATA_ENABLED 0
+#define TRACE_QED_AIO_WRITE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) {
+ (void)s;
+ (void)acb;
+ (void)ret;
+ (void)offset;
+ (void)len;
+}
+#define TRACE_QED_AIO_WRITE_MAIN 0
+#define TRACE_QED_AIO_WRITE_MAIN_ENABLED 0
+#define TRACE_QED_AIO_WRITE_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) {
+ (void)s;
+ (void)acb;
+ (void)ret;
+ (void)offset;
+ (void)len;
+}
+#define TRACE_QED_AIO_WRITE_POSTFILL 0
+#define TRACE_QED_AIO_WRITE_POSTFILL_ENABLED 0
+#define TRACE_QED_AIO_WRITE_POSTFILL_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) {
+ (void)s;
+ (void)acb;
+ (void)start;
+ (void)len;
+ (void)offset;
+}
+#define TRACE_QED_AIO_WRITE_PREFILL 0
+#define TRACE_QED_AIO_WRITE_PREFILL_ENABLED 0
+#define TRACE_QED_AIO_WRITE_PREFILL_BACKEND_DSTATE() (0)
+static inline void trace_qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) {
+ (void)s;
+ (void)acb;
+ (void)start;
+ (void)len;
+ (void)offset;
+}
+#define TRACE_QED_ALLOC_L2_CACHE_ENTRY 0
+#define TRACE_QED_ALLOC_L2_CACHE_ENTRY_ENABLED 0
+#define TRACE_QED_ALLOC_L2_CACHE_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_qed_alloc_l2_cache_entry(void *l2_cache, void *entry) {
+ (void)l2_cache;
+ (void)entry;
+}
+#define TRACE_QED_CANCEL_NEED_CHECK_TIMER 0
+#define TRACE_QED_CANCEL_NEED_CHECK_TIMER_ENABLED 0
+#define TRACE_QED_CANCEL_NEED_CHECK_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_qed_cancel_need_check_timer(void *s) {
+ (void)s;
+}
+#define TRACE_QED_FIND_L2_CACHE_ENTRY 0
+#define TRACE_QED_FIND_L2_CACHE_ENTRY_ENABLED 0
+#define TRACE_QED_FIND_L2_CACHE_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) {
+ (void)l2_cache;
+ (void)entry;
+ (void)offset;
+ (void)ref;
+}
+#define TRACE_QED_NEED_CHECK_TIMER_CB 0
+#define TRACE_QED_NEED_CHECK_TIMER_CB_ENABLED 0
+#define TRACE_QED_NEED_CHECK_TIMER_CB_BACKEND_DSTATE() (0)
+static inline void trace_qed_need_check_timer_cb(void *s) {
+ (void)s;
+}
+#define TRACE_QED_READ_TABLE 0
+#define TRACE_QED_READ_TABLE_ENABLED 0
+#define TRACE_QED_READ_TABLE_BACKEND_DSTATE() (0)
+static inline void trace_qed_read_table(void *s, uint64_t offset, void *table) {
+ (void)s;
+ (void)offset;
+ (void)table;
+}
+#define TRACE_QED_READ_TABLE_CB 0
+#define TRACE_QED_READ_TABLE_CB_ENABLED 0
+#define TRACE_QED_READ_TABLE_CB_BACKEND_DSTATE() (0)
+static inline void trace_qed_read_table_cb(void *s, void *table, int ret) {
+ (void)s;
+ (void)table;
+ (void)ret;
+}
+#define TRACE_QED_START_NEED_CHECK_TIMER 0
+#define TRACE_QED_START_NEED_CHECK_TIMER_ENABLED 0
+#define TRACE_QED_START_NEED_CHECK_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_qed_start_need_check_timer(void *s) {
+ (void)s;
+}
+#define TRACE_QED_UNREF_L2_CACHE_ENTRY 0
+#define TRACE_QED_UNREF_L2_CACHE_ENTRY_ENABLED 0
+#define TRACE_QED_UNREF_L2_CACHE_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_qed_unref_l2_cache_entry(void *entry, int ref) {
+ (void)entry;
+ (void)ref;
+}
+#define TRACE_QED_WRITE_TABLE 0
+#define TRACE_QED_WRITE_TABLE_ENABLED 0
+#define TRACE_QED_WRITE_TABLE_BACKEND_DSTATE() (0)
+static inline void trace_qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) {
+ (void)s;
+ (void)offset;
+ (void)table;
+ (void)index;
+ (void)n;
+}
+#define TRACE_QED_WRITE_TABLE_CB 0
+#define TRACE_QED_WRITE_TABLE_CB_ENABLED 0
+#define TRACE_QED_WRITE_TABLE_CB_BACKEND_DSTATE() (0)
+static inline void trace_qed_write_table_cb(void *s, void *table, int flush, int ret) {
+ (void)s;
+ (void)table;
+ (void)flush;
+ (void)ret;
+}
+#define TRACE_QMP_BLOCK_JOB_CANCEL 0
+#define TRACE_QMP_BLOCK_JOB_CANCEL_ENABLED 0
+#define TRACE_QMP_BLOCK_JOB_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_qmp_block_job_cancel(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_BLOCK_JOB_COMPLETE 0
+#define TRACE_QMP_BLOCK_JOB_COMPLETE_ENABLED 0
+#define TRACE_QMP_BLOCK_JOB_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qmp_block_job_complete(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_BLOCK_JOB_DISMISS 0
+#define TRACE_QMP_BLOCK_JOB_DISMISS_ENABLED 0
+#define TRACE_QMP_BLOCK_JOB_DISMISS_BACKEND_DSTATE() (0)
+static inline void trace_qmp_block_job_dismiss(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_BLOCK_JOB_FINALIZE 0
+#define TRACE_QMP_BLOCK_JOB_FINALIZE_ENABLED 0
+#define TRACE_QMP_BLOCK_JOB_FINALIZE_BACKEND_DSTATE() (0)
+static inline void trace_qmp_block_job_finalize(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_BLOCK_JOB_PAUSE 0
+#define TRACE_QMP_BLOCK_JOB_PAUSE_ENABLED 0
+#define TRACE_QMP_BLOCK_JOB_PAUSE_BACKEND_DSTATE() (0)
+static inline void trace_qmp_block_job_pause(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_BLOCK_JOB_RESUME 0
+#define TRACE_QMP_BLOCK_JOB_RESUME_ENABLED 0
+#define TRACE_QMP_BLOCK_JOB_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_qmp_block_job_resume(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_BLOCK_STREAM 0
+#define TRACE_QMP_BLOCK_STREAM_ENABLED 0
+#define TRACE_QMP_BLOCK_STREAM_BACKEND_DSTATE() (0)
+static inline void trace_qmp_block_stream(void *bs) {
+ (void)bs;
+}
+#define TRACE_SFTP_ERROR 0
+#define TRACE_SFTP_ERROR_ENABLED 0
+#define TRACE_SFTP_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_sftp_error(const char *op, const char *ssh_err, int ssh_err_code, int sftp_err_code) {
+ (void)op;
+ (void)ssh_err;
+ (void)ssh_err_code;
+ (void)sftp_err_code;
+}
+#define TRACE_SSH_AUTH_METHODS 0
+#define TRACE_SSH_AUTH_METHODS_ENABLED 0
+#define TRACE_SSH_AUTH_METHODS_BACKEND_DSTATE() (0)
+static inline void trace_ssh_auth_methods(int methods) {
+ (void)methods;
+}
+#define TRACE_SSH_CHECK_HOST_KEY_KNOWNHOSTS 0
+#define TRACE_SSH_CHECK_HOST_KEY_KNOWNHOSTS_ENABLED 0
+#define TRACE_SSH_CHECK_HOST_KEY_KNOWNHOSTS_BACKEND_DSTATE() (0)
+static inline void trace_ssh_check_host_key_knownhosts(void) {
+}
+#define TRACE_SSH_CO_CREATE_OPTS 0
+#define TRACE_SSH_CO_CREATE_OPTS_ENABLED 0
+#define TRACE_SSH_CO_CREATE_OPTS_BACKEND_DSTATE() (0)
+static inline void trace_ssh_co_create_opts(uint64_t size) {
+ (void)size;
+}
+#define TRACE_SSH_CO_YIELD 0
+#define TRACE_SSH_CO_YIELD_ENABLED 0
+#define TRACE_SSH_CO_YIELD_BACKEND_DSTATE() (0)
+static inline void trace_ssh_co_yield(int sock, void *rd_handler, void *wr_handler) {
+ (void)sock;
+ (void)rd_handler;
+ (void)wr_handler;
+}
+#define TRACE_SSH_CO_YIELD_BACK 0
+#define TRACE_SSH_CO_YIELD_BACK_ENABLED 0
+#define TRACE_SSH_CO_YIELD_BACK_BACKEND_DSTATE() (0)
+static inline void trace_ssh_co_yield_back(int sock) {
+ (void)sock;
+}
+#define TRACE_SSH_CONNECT_TO_SSH 0
+#define TRACE_SSH_CONNECT_TO_SSH_ENABLED 0
+#define TRACE_SSH_CONNECT_TO_SSH_BACKEND_DSTATE() (0)
+static inline void trace_ssh_connect_to_ssh(char *path, int flags, int mode) {
+ (void)path;
+ (void)flags;
+ (void)mode;
+}
+#define TRACE_SSH_FLUSH 0
+#define TRACE_SSH_FLUSH_ENABLED 0
+#define TRACE_SSH_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_ssh_flush(void) {
+}
+#define TRACE_SSH_GETLENGTH 0
+#define TRACE_SSH_GETLENGTH_ENABLED 0
+#define TRACE_SSH_GETLENGTH_BACKEND_DSTATE() (0)
+static inline void trace_ssh_getlength(int64_t length) {
+ (void)length;
+}
+#define TRACE_SSH_READ 0
+#define TRACE_SSH_READ_ENABLED 0
+#define TRACE_SSH_READ_BACKEND_DSTATE() (0)
+static inline void trace_ssh_read(int64_t offset, size_t size) {
+ (void)offset;
+ (void)size;
+}
+#define TRACE_SSH_READ_BUF 0
+#define TRACE_SSH_READ_BUF_ENABLED 0
+#define TRACE_SSH_READ_BUF_BACKEND_DSTATE() (0)
+static inline void trace_ssh_read_buf(void *buf, size_t size, size_t actual_size) {
+ (void)buf;
+ (void)size;
+ (void)actual_size;
+}
+#define TRACE_SSH_READ_RETURN 0
+#define TRACE_SSH_READ_RETURN_ENABLED 0
+#define TRACE_SSH_READ_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_ssh_read_return(ssize_t ret, int sftp_err) {
+ (void)ret;
+ (void)sftp_err;
+}
+#define TRACE_SSH_RESTART_COROUTINE 0
+#define TRACE_SSH_RESTART_COROUTINE_ENABLED 0
+#define TRACE_SSH_RESTART_COROUTINE_BACKEND_DSTATE() (0)
+static inline void trace_ssh_restart_coroutine(void *co) {
+ (void)co;
+}
+#define TRACE_SSH_SEEK 0
+#define TRACE_SSH_SEEK_ENABLED 0
+#define TRACE_SSH_SEEK_BACKEND_DSTATE() (0)
+static inline void trace_ssh_seek(int64_t offset) {
+ (void)offset;
+}
+#define TRACE_SSH_SERVER_STATUS 0
+#define TRACE_SSH_SERVER_STATUS_ENABLED 0
+#define TRACE_SSH_SERVER_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_ssh_server_status(int status) {
+ (void)status;
+}
+#define TRACE_SSH_WRITE 0
+#define TRACE_SSH_WRITE_ENABLED 0
+#define TRACE_SSH_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ssh_write(int64_t offset, size_t size) {
+ (void)offset;
+ (void)size;
+}
+#define TRACE_SSH_WRITE_BUF 0
+#define TRACE_SSH_WRITE_BUF_ENABLED 0
+#define TRACE_SSH_WRITE_BUF_BACKEND_DSTATE() (0)
+static inline void trace_ssh_write_buf(void *buf, size_t size, size_t actual_size) {
+ (void)buf;
+ (void)size;
+ (void)actual_size;
+}
+#define TRACE_SSH_WRITE_RETURN 0
+#define TRACE_SSH_WRITE_RETURN_ENABLED 0
+#define TRACE_SSH_WRITE_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_ssh_write_return(ssize_t ret, int sftp_err) {
+ (void)ret;
+ (void)sftp_err;
+}
+#define TRACE_STREAM_ONE_ITERATION 0
+#define TRACE_STREAM_ONE_ITERATION_ENABLED 0
+#define TRACE_STREAM_ONE_ITERATION_BACKEND_DSTATE() (0)
+static inline void trace_stream_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) {
+ (void)s;
+ (void)offset;
+ (void)bytes;
+ (void)is_allocated;
+}
+#define TRACE_STREAM_START 0
+#define TRACE_STREAM_START_ENABLED 0
+#define TRACE_STREAM_START_BACKEND_DSTATE() (0)
+static inline void trace_stream_start(void *bs, void *base, void *s) {
+ (void)bs;
+ (void)base;
+ (void)s;
+}
+#define TRACE_ZBD_ZONE_APPEND 0
+#define TRACE_ZBD_ZONE_APPEND_ENABLED 0
+#define TRACE_ZBD_ZONE_APPEND_BACKEND_DSTATE() (0)
+static inline void trace_zbd_zone_append(void *bs, int64_t sector) {
+ (void)bs;
+ (void)sector;
+}
+#define TRACE_ZBD_ZONE_APPEND_COMPLETE 0
+#define TRACE_ZBD_ZONE_APPEND_COMPLETE_ENABLED 0
+#define TRACE_ZBD_ZONE_APPEND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_zbd_zone_append_complete(void *bs, int64_t sector) {
+ (void)bs;
+ (void)sector;
+}
+#define TRACE_ZBD_ZONE_MGMT 0
+#define TRACE_ZBD_ZONE_MGMT_ENABLED 0
+#define TRACE_ZBD_ZONE_MGMT_BACKEND_DSTATE() (0)
+static inline void trace_zbd_zone_mgmt(void *bs, const char *op_name, int64_t sector, int64_t len) {
+ (void)bs;
+ (void)op_name;
+ (void)sector;
+ (void)len;
+}
+#define TRACE_ZBD_ZONE_REPORT 0
+#define TRACE_ZBD_ZONE_REPORT_ENABLED 0
+#define TRACE_ZBD_ZONE_REPORT_BACKEND_DSTATE() (0)
+static inline void trace_zbd_zone_report(void *bs, unsigned int nr_zones, int64_t sector) {
+ (void)bs;
+ (void)nr_zones;
+ (void)sector;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-bsd_user.h b/trace/trace-bsd_user.h
new file mode 100644
index 0000000000..c012516a77
--- /dev/null
+++ b/trace/trace-bsd_user.h
@@ -0,0 +1,71 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_BSD_USER_H
+#define TRACE_TRACE_BSD_USER_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_USER_DO_RT_SIGRETURN 0
+#define TRACE_USER_DO_RT_SIGRETURN_ENABLED 0
+#define TRACE_USER_DO_RT_SIGRETURN_BACKEND_DSTATE() (0)
+static inline void trace_user_do_rt_sigreturn(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+#define TRACE_USER_DO_SIGRETURN 0
+#define TRACE_USER_DO_SIGRETURN_ENABLED 0
+#define TRACE_USER_DO_SIGRETURN_BACKEND_DSTATE() (0)
+static inline void trace_user_do_sigreturn(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+#define TRACE_USER_DUMP_CORE_AND_ABORT 0
+#define TRACE_USER_DUMP_CORE_AND_ABORT_ENABLED 0
+#define TRACE_USER_DUMP_CORE_AND_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_user_dump_core_and_abort(void *env, int target_sig, int host_sig) {
+ (void)env;
+ (void)target_sig;
+ (void)host_sig;
+}
+#define TRACE_USER_HANDLE_SIGNAL 0
+#define TRACE_USER_HANDLE_SIGNAL_ENABLED 0
+#define TRACE_USER_HANDLE_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_user_handle_signal(void *env, int target_sig) {
+ (void)env;
+ (void)target_sig;
+}
+#define TRACE_USER_HOST_SIGNAL 0
+#define TRACE_USER_HOST_SIGNAL_ENABLED 0
+#define TRACE_USER_HOST_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_user_host_signal(void *env, int host_sig, int target_sig) {
+ (void)env;
+ (void)host_sig;
+ (void)target_sig;
+}
+#define TRACE_USER_QUEUE_SIGNAL 0
+#define TRACE_USER_QUEUE_SIGNAL_ENABLED 0
+#define TRACE_USER_QUEUE_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_user_queue_signal(void *env, int target_sig) {
+ (void)env;
+ (void)target_sig;
+}
+#define TRACE_USER_SETUP_FRAME 0
+#define TRACE_USER_SETUP_FRAME_ENABLED 0
+#define TRACE_USER_SETUP_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_user_setup_frame(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+#define TRACE_USER_SETUP_RT_FRAME 0
+#define TRACE_USER_SETUP_RT_FRAME_ENABLED 0
+#define TRACE_USER_SETUP_RT_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_user_setup_rt_frame(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-chardev.h b/trace/trace-chardev.h
new file mode 100644
index 0000000000..baf49fc12c
--- /dev/null
+++ b/trace/trace-chardev.h
@@ -0,0 +1,157 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_CHARDEV_H
+#define TRACE_TRACE_CHARDEV_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CHR_SOCKET_DISCONNECT 0
+#define TRACE_CHR_SOCKET_DISCONNECT_ENABLED 0
+#define TRACE_CHR_SOCKET_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_disconnect(void *chrdev, const char *label) {
+ (void)chrdev;
+ (void)label;
+}
+#define TRACE_CHR_SOCKET_HANGUP 0
+#define TRACE_CHR_SOCKET_HANGUP_ENABLED 0
+#define TRACE_CHR_SOCKET_HANGUP_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_hangup(void *chrdev, const char *label) {
+ (void)chrdev;
+ (void)label;
+}
+#define TRACE_CHR_SOCKET_POLL_ERR 0
+#define TRACE_CHR_SOCKET_POLL_ERR_ENABLED 0
+#define TRACE_CHR_SOCKET_POLL_ERR_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_poll_err(void *chrdev, const char *label) {
+ (void)chrdev;
+ (void)label;
+}
+#define TRACE_CHR_SOCKET_RECV_EOF 0
+#define TRACE_CHR_SOCKET_RECV_EOF_ENABLED 0
+#define TRACE_CHR_SOCKET_RECV_EOF_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_recv_eof(void *chrdev, const char *label) {
+ (void)chrdev;
+ (void)label;
+}
+#define TRACE_CHR_SOCKET_RECV_ERR 0
+#define TRACE_CHR_SOCKET_RECV_ERR_ENABLED 0
+#define TRACE_CHR_SOCKET_RECV_ERR_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_recv_err(void *chrdev, const char *label, const char *err) {
+ (void)chrdev;
+ (void)label;
+ (void)err;
+}
+#define TRACE_CHR_SOCKET_TLS_HANDSHAKE_ERR 0
+#define TRACE_CHR_SOCKET_TLS_HANDSHAKE_ERR_ENABLED 0
+#define TRACE_CHR_SOCKET_TLS_HANDSHAKE_ERR_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_tls_handshake_err(void *chrdev, const char *label, const char *err) {
+ (void)chrdev;
+ (void)label;
+ (void)err;
+}
+#define TRACE_CHR_SOCKET_TLS_INIT_ERR 0
+#define TRACE_CHR_SOCKET_TLS_INIT_ERR_ENABLED 0
+#define TRACE_CHR_SOCKET_TLS_INIT_ERR_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_tls_init_err(void *chrdev, const char *label, const char *err) {
+ (void)chrdev;
+ (void)label;
+ (void)err;
+}
+#define TRACE_CHR_SOCKET_WRITE_ERR 0
+#define TRACE_CHR_SOCKET_WRITE_ERR_ENABLED 0
+#define TRACE_CHR_SOCKET_WRITE_ERR_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_write_err(void *chrdev, const char *label, const char *err) {
+ (void)chrdev;
+ (void)label;
+ (void)err;
+}
+#define TRACE_CHR_SOCKET_WS_HANDSHAKE_ERR 0
+#define TRACE_CHR_SOCKET_WS_HANDSHAKE_ERR_ENABLED 0
+#define TRACE_CHR_SOCKET_WS_HANDSHAKE_ERR_BACKEND_DSTATE() (0)
+static inline void trace_chr_socket_ws_handshake_err(void *chrdev, const char *label, const char *err) {
+ (void)chrdev;
+ (void)label;
+ (void)err;
+}
+#define TRACE_SPICE_CHR_DISCARD_WRITE 0
+#define TRACE_SPICE_CHR_DISCARD_WRITE_ENABLED 0
+#define TRACE_SPICE_CHR_DISCARD_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_spice_chr_discard_write(int len) {
+ (void)len;
+}
+#define TRACE_SPICE_VMC_EVENT 0
+#define TRACE_SPICE_VMC_EVENT_ENABLED 0
+#define TRACE_SPICE_VMC_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_spice_vmc_event(int event) {
+ (void)event;
+}
+#define TRACE_SPICE_VMC_READ 0
+#define TRACE_SPICE_VMC_READ_ENABLED 0
+#define TRACE_SPICE_VMC_READ_BACKEND_DSTATE() (0)
+static inline void trace_spice_vmc_read(int bytes, int len) {
+ (void)bytes;
+ (void)len;
+}
+#define TRACE_SPICE_VMC_REGISTER_INTERFACE 0
+#define TRACE_SPICE_VMC_REGISTER_INTERFACE_ENABLED 0
+#define TRACE_SPICE_VMC_REGISTER_INTERFACE_BACKEND_DSTATE() (0)
+static inline void trace_spice_vmc_register_interface(void *scd) {
+ (void)scd;
+}
+#define TRACE_SPICE_VMC_UNREGISTER_INTERFACE 0
+#define TRACE_SPICE_VMC_UNREGISTER_INTERFACE_ENABLED 0
+#define TRACE_SPICE_VMC_UNREGISTER_INTERFACE_BACKEND_DSTATE() (0)
+static inline void trace_spice_vmc_unregister_interface(void *scd) {
+ (void)scd;
+}
+#define TRACE_SPICE_VMC_WRITE 0
+#define TRACE_SPICE_VMC_WRITE_ENABLED 0
+#define TRACE_SPICE_VMC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_spice_vmc_write(ssize_t out, int len) {
+ (void)out;
+ (void)len;
+}
+#define TRACE_WCT_CMD_OTHER 0
+#define TRACE_WCT_CMD_OTHER_ENABLED 0
+#define TRACE_WCT_CMD_OTHER_BACKEND_DSTATE() (0)
+static inline void trace_wct_cmd_other(const char *cmd) {
+ (void)cmd;
+}
+#define TRACE_WCT_CMD_RE 0
+#define TRACE_WCT_CMD_RE_ENABLED 0
+#define TRACE_WCT_CMD_RE_BACKEND_DSTATE() (0)
+static inline void trace_wct_cmd_re(void) {
+}
+#define TRACE_WCT_CMD_SP 0
+#define TRACE_WCT_CMD_SP_ENABLED 0
+#define TRACE_WCT_CMD_SP_BACKEND_DSTATE() (0)
+static inline void trace_wct_cmd_sp(void) {
+}
+#define TRACE_WCT_CMD_ST 0
+#define TRACE_WCT_CMD_ST_ENABLED 0
+#define TRACE_WCT_CMD_ST_BACKEND_DSTATE() (0)
+static inline void trace_wct_cmd_st(void) {
+}
+#define TRACE_WCT_CMD_TS 0
+#define TRACE_WCT_CMD_TS_ENABLED 0
+#define TRACE_WCT_CMD_TS_BACKEND_DSTATE() (0)
+static inline void trace_wct_cmd_ts(int input) {
+ (void)input;
+}
+#define TRACE_WCT_INIT 0
+#define TRACE_WCT_INIT_ENABLED 0
+#define TRACE_WCT_INIT_BACKEND_DSTATE() (0)
+static inline void trace_wct_init(void) {
+}
+#define TRACE_WCT_SPEED 0
+#define TRACE_WCT_SPEED_ENABLED 0
+#define TRACE_WCT_SPEED_BACKEND_DSTATE() (0)
+static inline void trace_wct_speed(int speed) {
+ (void)speed;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-crypto.h b/trace/trace-crypto.h
new file mode 100644
index 0000000000..ceada970ae
--- /dev/null
+++ b/trace/trace-crypto.h
@@ -0,0 +1,152 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_CRYPTO_H
+#define TRACE_TRACE_CRYPTO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_COUNT 0
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_COUNT_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_COUNT_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_cipher_suite_count(unsigned count) {
+ (void)count;
+}
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_INFO 0
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_INFO_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_cipher_suite_info(uint8_t data0, uint8_t data1, const char *version, const char *name) {
+ (void)data0;
+ (void)data1;
+ (void)version;
+ (void)name;
+}
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_PRIORITY 0
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_PRIORITY_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CIPHER_SUITE_PRIORITY_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_cipher_suite_priority(const char *name) {
+ (void)name;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_ANON_LOAD 0
+#define TRACE_QCRYPTO_TLS_CREDS_ANON_LOAD_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_ANON_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_anon_load(void *creds, const char *dir) {
+ (void)creds;
+ (void)dir;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_GET_PATH 0
+#define TRACE_QCRYPTO_TLS_CREDS_GET_PATH_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_GET_PATH_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_get_path(void *creds, const char *filename, const char *path) {
+ (void)creds;
+ (void)filename;
+ (void)path;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_LOAD_DH 0
+#define TRACE_QCRYPTO_TLS_CREDS_LOAD_DH_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_LOAD_DH_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_load_dh(void *creds, const char *filename) {
+ (void)creds;
+ (void)filename;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_PSK_LOAD 0
+#define TRACE_QCRYPTO_TLS_CREDS_PSK_LOAD_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_PSK_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_psk_load(void *creds, const char *dir) {
+ (void)creds;
+ (void)dir;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_BASIC_CONSTRAINTS 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_BASIC_CONSTRAINTS_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_BASIC_CONSTRAINTS_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_x509_check_basic_constraints(void *creds, const char *file, int status) {
+ (void)creds;
+ (void)file;
+ (void)status;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_KEY_PURPOSE 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_KEY_PURPOSE_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_KEY_PURPOSE_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_x509_check_key_purpose(void *creds, const char *file, int status, const char *usage, int critical) {
+ (void)creds;
+ (void)file;
+ (void)status;
+ (void)usage;
+ (void)critical;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_KEY_USAGE 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_KEY_USAGE_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_CHECK_KEY_USAGE_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_x509_check_key_usage(void *creds, const char *file, int status, int usage, int critical) {
+ (void)creds;
+ (void)file;
+ (void)status;
+ (void)usage;
+ (void)critical;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_x509_load(void *creds, const char *dir) {
+ (void)creds;
+ (void)dir;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_CERT 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_CERT_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_CERT_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) {
+ (void)creds;
+ (void)isServer;
+ (void)file;
+}
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_CERT_LIST 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_CERT_LIST_ENABLED 0
+#define TRACE_QCRYPTO_TLS_CREDS_X509_LOAD_CERT_LIST_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) {
+ (void)creds;
+ (void)file;
+}
+#define TRACE_QCRYPTO_TLS_SESSION_BUG1717_WORKAROUND 0
+#define TRACE_QCRYPTO_TLS_SESSION_BUG1717_WORKAROUND_ENABLED 0
+#define TRACE_QCRYPTO_TLS_SESSION_BUG1717_WORKAROUND_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_session_bug1717_workaround(void *session) {
+ (void)session;
+}
+#define TRACE_QCRYPTO_TLS_SESSION_CHECK_CREDS 0
+#define TRACE_QCRYPTO_TLS_SESSION_CHECK_CREDS_ENABLED 0
+#define TRACE_QCRYPTO_TLS_SESSION_CHECK_CREDS_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_session_check_creds(void *session, const char *status) {
+ (void)session;
+ (void)status;
+}
+#define TRACE_QCRYPTO_TLS_SESSION_CHECK_X509_DN 0
+#define TRACE_QCRYPTO_TLS_SESSION_CHECK_X509_DN_ENABLED 0
+#define TRACE_QCRYPTO_TLS_SESSION_CHECK_X509_DN_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_session_check_x509_dn(void *session, const char *dname) {
+ (void)session;
+ (void)dname;
+}
+#define TRACE_QCRYPTO_TLS_SESSION_NEW 0
+#define TRACE_QCRYPTO_TLS_SESSION_NEW_ENABLED 0
+#define TRACE_QCRYPTO_TLS_SESSION_NEW_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_session_new(void *session, void *creds, const char *hostname, const char *authzid, int endpoint) {
+ (void)session;
+ (void)creds;
+ (void)hostname;
+ (void)authzid;
+ (void)endpoint;
+}
+#define TRACE_QCRYPTO_TLS_SESSION_PARAMETERS 0
+#define TRACE_QCRYPTO_TLS_SESSION_PARAMETERS_ENABLED 0
+#define TRACE_QCRYPTO_TLS_SESSION_PARAMETERS_BACKEND_DSTATE() (0)
+static inline void trace_qcrypto_tls_session_parameters(void *session, int threadSafety, int protocol, int cipher) {
+ (void)session;
+ (void)threadSafety;
+ (void)protocol;
+ (void)cipher;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-ebpf.h b/trace/trace-ebpf.h
new file mode 100644
index 0000000000..a645e5967b
--- /dev/null
+++ b/trace/trace-ebpf.h
@@ -0,0 +1,66 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_EBPF_H
+#define TRACE_TRACE_EBPF_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_EBPF_RSS_LOAD 0
+#define TRACE_EBPF_RSS_LOAD_ENABLED 0
+#define TRACE_EBPF_RSS_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_ebpf_rss_load(void *ctx, int progfd, int cfgfd, int toepfd, int indirfd) {
+ (void)ctx;
+ (void)progfd;
+ (void)cfgfd;
+ (void)toepfd;
+ (void)indirfd;
+}
+#define TRACE_EBPF_RSS_LOAD_ERROR 0
+#define TRACE_EBPF_RSS_LOAD_ERROR_ENABLED 0
+#define TRACE_EBPF_RSS_LOAD_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_ebpf_rss_load_error(void *ctx) {
+ (void)ctx;
+}
+#define TRACE_EBPF_RSS_MMAP 0
+#define TRACE_EBPF_RSS_MMAP_ENABLED 0
+#define TRACE_EBPF_RSS_MMAP_BACKEND_DSTATE() (0)
+static inline void trace_ebpf_rss_mmap(void *ctx, void *cfgptr, void *toepptr, void *indirptr) {
+ (void)ctx;
+ (void)cfgptr;
+ (void)toepptr;
+ (void)indirptr;
+}
+#define TRACE_EBPF_RSS_MMAP_ERROR 0
+#define TRACE_EBPF_RSS_MMAP_ERROR_ENABLED 0
+#define TRACE_EBPF_RSS_MMAP_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_ebpf_rss_mmap_error(void *ctx, const char *object) {
+ (void)ctx;
+ (void)object;
+}
+#define TRACE_EBPF_RSS_OPEN_ERROR 0
+#define TRACE_EBPF_RSS_OPEN_ERROR_ENABLED 0
+#define TRACE_EBPF_RSS_OPEN_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_ebpf_rss_open_error(void *ctx) {
+ (void)ctx;
+}
+#define TRACE_EBPF_RSS_SET_DATA 0
+#define TRACE_EBPF_RSS_SET_DATA_ENABLED 0
+#define TRACE_EBPF_RSS_SET_DATA_BACKEND_DSTATE() (0)
+static inline void trace_ebpf_rss_set_data(void *ctx, void *cfgptr, void *toepptr, void *indirptr) {
+ (void)ctx;
+ (void)cfgptr;
+ (void)toepptr;
+ (void)indirptr;
+}
+#define TRACE_EBPF_RSS_UNLOAD 0
+#define TRACE_EBPF_RSS_UNLOAD_ENABLED 0
+#define TRACE_EBPF_RSS_UNLOAD_BACKEND_DSTATE() (0)
+static inline void trace_ebpf_rss_unload(void *ctx) {
+ (void)ctx;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-gdbstub.h b/trace/trace-gdbstub.h
new file mode 100644
index 0000000000..46620e6bdd
--- /dev/null
+++ b/trace/trace-gdbstub.h
@@ -0,0 +1,168 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_GDBSTUB_H
+#define TRACE_TRACE_GDBSTUB_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_GDBSTUB_ERR_CHECKSUM_INCORRECT 0
+#define TRACE_GDBSTUB_ERR_CHECKSUM_INCORRECT_ENABLED 0
+#define TRACE_GDBSTUB_ERR_CHECKSUM_INCORRECT_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_checksum_incorrect(uint8_t expected, uint8_t got) {
+ (void)expected;
+ (void)got;
+}
+#define TRACE_GDBSTUB_ERR_CHECKSUM_INVALID 0
+#define TRACE_GDBSTUB_ERR_CHECKSUM_INVALID_ENABLED 0
+#define TRACE_GDBSTUB_ERR_CHECKSUM_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_checksum_invalid(uint8_t ch) {
+ (void)ch;
+}
+#define TRACE_GDBSTUB_ERR_GARBAGE 0
+#define TRACE_GDBSTUB_ERR_GARBAGE_ENABLED 0
+#define TRACE_GDBSTUB_ERR_GARBAGE_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_garbage(uint8_t ch) {
+ (void)ch;
+}
+#define TRACE_GDBSTUB_ERR_GOT_NACK 0
+#define TRACE_GDBSTUB_ERR_GOT_NACK_ENABLED 0
+#define TRACE_GDBSTUB_ERR_GOT_NACK_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_got_nack(void) {
+}
+#define TRACE_GDBSTUB_ERR_INVALID_REPEAT 0
+#define TRACE_GDBSTUB_ERR_INVALID_REPEAT_ENABLED 0
+#define TRACE_GDBSTUB_ERR_INVALID_REPEAT_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_invalid_repeat(uint8_t ch) {
+ (void)ch;
+}
+#define TRACE_GDBSTUB_ERR_INVALID_RLE 0
+#define TRACE_GDBSTUB_ERR_INVALID_RLE_ENABLED 0
+#define TRACE_GDBSTUB_ERR_INVALID_RLE_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_invalid_rle(void) {
+}
+#define TRACE_GDBSTUB_ERR_OVERRUN 0
+#define TRACE_GDBSTUB_ERR_OVERRUN_ENABLED 0
+#define TRACE_GDBSTUB_ERR_OVERRUN_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_overrun(void) {
+}
+#define TRACE_GDBSTUB_ERR_UNEXPECTED_RUNPKT 0
+#define TRACE_GDBSTUB_ERR_UNEXPECTED_RUNPKT_ENABLED 0
+#define TRACE_GDBSTUB_ERR_UNEXPECTED_RUNPKT_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_err_unexpected_runpkt(uint8_t ch) {
+ (void)ch;
+}
+#define TRACE_GDBSTUB_HIT_BREAK 0
+#define TRACE_GDBSTUB_HIT_BREAK_ENABLED 0
+#define TRACE_GDBSTUB_HIT_BREAK_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_break(void) {
+}
+#define TRACE_GDBSTUB_HIT_INTERNAL_ERROR 0
+#define TRACE_GDBSTUB_HIT_INTERNAL_ERROR_ENABLED 0
+#define TRACE_GDBSTUB_HIT_INTERNAL_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_internal_error(void) {
+}
+#define TRACE_GDBSTUB_HIT_IO_ERROR 0
+#define TRACE_GDBSTUB_HIT_IO_ERROR_ENABLED 0
+#define TRACE_GDBSTUB_HIT_IO_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_io_error(void) {
+}
+#define TRACE_GDBSTUB_HIT_PAUSED 0
+#define TRACE_GDBSTUB_HIT_PAUSED_ENABLED 0
+#define TRACE_GDBSTUB_HIT_PAUSED_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_paused(void) {
+}
+#define TRACE_GDBSTUB_HIT_SHUTDOWN 0
+#define TRACE_GDBSTUB_HIT_SHUTDOWN_ENABLED 0
+#define TRACE_GDBSTUB_HIT_SHUTDOWN_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_shutdown(void) {
+}
+#define TRACE_GDBSTUB_HIT_UNKNOWN 0
+#define TRACE_GDBSTUB_HIT_UNKNOWN_ENABLED 0
+#define TRACE_GDBSTUB_HIT_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_unknown(int state) {
+ (void)state;
+}
+#define TRACE_GDBSTUB_HIT_WATCHDOG 0
+#define TRACE_GDBSTUB_HIT_WATCHDOG_ENABLED 0
+#define TRACE_GDBSTUB_HIT_WATCHDOG_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_watchdog(void) {
+}
+#define TRACE_GDBSTUB_HIT_WATCHPOINT 0
+#define TRACE_GDBSTUB_HIT_WATCHPOINT_ENABLED 0
+#define TRACE_GDBSTUB_HIT_WATCHPOINT_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_hit_watchpoint(const char *type, int cpu_gdb_index, uint64_t vaddr) {
+ (void)type;
+ (void)cpu_gdb_index;
+ (void)vaddr;
+}
+#define TRACE_GDBSTUB_IO_BINARYREPLY 0
+#define TRACE_GDBSTUB_IO_BINARYREPLY_ENABLED 0
+#define TRACE_GDBSTUB_IO_BINARYREPLY_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_io_binaryreply(size_t ofs, const char *line) {
+ (void)ofs;
+ (void)line;
+}
+#define TRACE_GDBSTUB_IO_COMMAND 0
+#define TRACE_GDBSTUB_IO_COMMAND_ENABLED 0
+#define TRACE_GDBSTUB_IO_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_io_command(const char *command) {
+ (void)command;
+}
+#define TRACE_GDBSTUB_IO_GOT_ACK 0
+#define TRACE_GDBSTUB_IO_GOT_ACK_ENABLED 0
+#define TRACE_GDBSTUB_IO_GOT_ACK_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_io_got_ack(void) {
+}
+#define TRACE_GDBSTUB_IO_GOT_UNEXPECTED 0
+#define TRACE_GDBSTUB_IO_GOT_UNEXPECTED_ENABLED 0
+#define TRACE_GDBSTUB_IO_GOT_UNEXPECTED_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_io_got_unexpected(uint8_t ch) {
+ (void)ch;
+}
+#define TRACE_GDBSTUB_IO_REPLY 0
+#define TRACE_GDBSTUB_IO_REPLY_ENABLED 0
+#define TRACE_GDBSTUB_IO_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_io_reply(const char *message) {
+ (void)message;
+}
+#define TRACE_GDBSTUB_OP_CONTINUE 0
+#define TRACE_GDBSTUB_OP_CONTINUE_ENABLED 0
+#define TRACE_GDBSTUB_OP_CONTINUE_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_op_continue(void) {
+}
+#define TRACE_GDBSTUB_OP_CONTINUE_CPU 0
+#define TRACE_GDBSTUB_OP_CONTINUE_CPU_ENABLED 0
+#define TRACE_GDBSTUB_OP_CONTINUE_CPU_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_op_continue_cpu(int cpu_index) {
+ (void)cpu_index;
+}
+#define TRACE_GDBSTUB_OP_EXITING 0
+#define TRACE_GDBSTUB_OP_EXITING_ENABLED 0
+#define TRACE_GDBSTUB_OP_EXITING_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_op_exiting(uint8_t code) {
+ (void)code;
+}
+#define TRACE_GDBSTUB_OP_EXTRA_INFO 0
+#define TRACE_GDBSTUB_OP_EXTRA_INFO_ENABLED 0
+#define TRACE_GDBSTUB_OP_EXTRA_INFO_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_op_extra_info(const char *info) {
+ (void)info;
+}
+#define TRACE_GDBSTUB_OP_START 0
+#define TRACE_GDBSTUB_OP_START_ENABLED 0
+#define TRACE_GDBSTUB_OP_START_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_op_start(const char *device) {
+ (void)device;
+}
+#define TRACE_GDBSTUB_OP_STEPPING 0
+#define TRACE_GDBSTUB_OP_STEPPING_ENABLED 0
+#define TRACE_GDBSTUB_OP_STEPPING_BACKEND_DSTATE() (0)
+static inline void trace_gdbstub_op_stepping(int cpu_index) {
+ (void)cpu_index;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_9pfs.h b/trace/trace-hw_9pfs.h
new file mode 100644
index 0000000000..291fab78c8
--- /dev/null
+++ b/trace/trace-hw_9pfs.h
@@ -0,0 +1,499 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_9PFS_H
+#define TRACE_TRACE_HW_9PFS_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_V9FS_ATTACH 0
+#define TRACE_V9FS_ATTACH_ENABLED 0
+#define TRACE_V9FS_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)afid;
+ (void)uname;
+ (void)aname;
+}
+#define TRACE_V9FS_ATTACH_RETURN 0
+#define TRACE_V9FS_ATTACH_RETURN_ENABLED 0
+#define TRACE_V9FS_ATTACH_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_attach_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)version;
+ (void)path;
+}
+#define TRACE_V9FS_CLUNK 0
+#define TRACE_V9FS_CLUNK_ENABLED 0
+#define TRACE_V9FS_CLUNK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+}
+#define TRACE_V9FS_CREATE 0
+#define TRACE_V9FS_CREATE_ENABLED 0
+#define TRACE_V9FS_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)name;
+ (void)perm;
+ (void)mode;
+}
+#define TRACE_V9FS_CREATE_RETURN 0
+#define TRACE_V9FS_CREATE_RETURN_ENABLED 0
+#define TRACE_V9FS_CREATE_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_create_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int iounit) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)version;
+ (void)path;
+ (void)iounit;
+}
+#define TRACE_V9FS_FLUSH 0
+#define TRACE_V9FS_FLUSH_ENABLED 0
+#define TRACE_V9FS_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) {
+ (void)tag;
+ (void)id;
+ (void)flush_tag;
+}
+#define TRACE_V9FS_FSYNC 0
+#define TRACE_V9FS_FSYNC_ENABLED 0
+#define TRACE_V9FS_FSYNC_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)datasync;
+}
+#define TRACE_V9FS_GETATTR 0
+#define TRACE_V9FS_GETATTR_ENABLED 0
+#define TRACE_V9FS_GETATTR_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)request_mask;
+}
+#define TRACE_V9FS_GETATTR_RETURN 0
+#define TRACE_V9FS_GETATTR_RETURN_ENABLED 0
+#define TRACE_V9FS_GETATTR_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) {
+ (void)tag;
+ (void)id;
+ (void)result_mask;
+ (void)mode;
+ (void)uid;
+ (void)gid;
+}
+#define TRACE_V9FS_GETLOCK 0
+#define TRACE_V9FS_GETLOCK_ENABLED 0
+#define TRACE_V9FS_GETLOCK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)type;
+ (void)start;
+ (void)length;
+}
+#define TRACE_V9FS_GETLOCK_RETURN 0
+#define TRACE_V9FS_GETLOCK_RETURN_ENABLED 0
+#define TRACE_V9FS_GETLOCK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)start;
+ (void)length;
+ (void)proc_id;
+}
+#define TRACE_V9FS_LCREATE 0
+#define TRACE_V9FS_LCREATE_ENABLED 0
+#define TRACE_V9FS_LCREATE_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) {
+ (void)tag;
+ (void)id;
+ (void)dfid;
+ (void)flags;
+ (void)mode;
+ (void)gid;
+}
+#define TRACE_V9FS_LCREATE_RETURN 0
+#define TRACE_V9FS_LCREATE_RETURN_ENABLED 0
+#define TRACE_V9FS_LCREATE_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_lcreate_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int32_t iounit) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)version;
+ (void)path;
+ (void)iounit;
+}
+#define TRACE_V9FS_LINK 0
+#define TRACE_V9FS_LINK_ENABLED 0
+#define TRACE_V9FS_LINK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) {
+ (void)tag;
+ (void)id;
+ (void)dfid;
+ (void)oldfid;
+ (void)name;
+}
+#define TRACE_V9FS_LOCK 0
+#define TRACE_V9FS_LOCK_ENABLED 0
+#define TRACE_V9FS_LOCK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)type;
+ (void)start;
+ (void)length;
+}
+#define TRACE_V9FS_LOCK_RETURN 0
+#define TRACE_V9FS_LOCK_RETURN_ENABLED 0
+#define TRACE_V9FS_LOCK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) {
+ (void)tag;
+ (void)id;
+ (void)status;
+}
+#define TRACE_V9FS_MKDIR 0
+#define TRACE_V9FS_MKDIR_ENABLED 0
+#define TRACE_V9FS_MKDIR_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)name;
+ (void)mode;
+ (void)gid;
+}
+#define TRACE_V9FS_MKDIR_RETURN 0
+#define TRACE_V9FS_MKDIR_RETURN_ENABLED 0
+#define TRACE_V9FS_MKDIR_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_mkdir_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int err) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)version;
+ (void)path;
+ (void)err;
+}
+#define TRACE_V9FS_MKNOD 0
+#define TRACE_V9FS_MKNOD_ENABLED 0
+#define TRACE_V9FS_MKNOD_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)mode;
+ (void)major;
+ (void)minor;
+}
+#define TRACE_V9FS_MKNOD_RETURN 0
+#define TRACE_V9FS_MKNOD_RETURN_ENABLED 0
+#define TRACE_V9FS_MKNOD_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_mknod_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)version;
+ (void)path;
+}
+#define TRACE_V9FS_OPEN 0
+#define TRACE_V9FS_OPEN_ENABLED 0
+#define TRACE_V9FS_OPEN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, const char* oflags) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)mode;
+ (void)oflags;
+}
+#define TRACE_V9FS_OPEN_RETURN 0
+#define TRACE_V9FS_OPEN_RETURN_ENABLED 0
+#define TRACE_V9FS_OPEN_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_open_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int iounit) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)version;
+ (void)path;
+ (void)iounit;
+}
+#define TRACE_V9FS_RCANCEL 0
+#define TRACE_V9FS_RCANCEL_ENABLED 0
+#define TRACE_V9FS_RCANCEL_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_rcancel(uint16_t tag, uint8_t id) {
+ (void)tag;
+ (void)id;
+}
+#define TRACE_V9FS_READ 0
+#define TRACE_V9FS_READ_ENABLED 0
+#define TRACE_V9FS_READ_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)off;
+ (void)max_count;
+}
+#define TRACE_V9FS_READ_RETURN 0
+#define TRACE_V9FS_READ_RETURN_ENABLED 0
+#define TRACE_V9FS_READ_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) {
+ (void)tag;
+ (void)id;
+ (void)count;
+ (void)err;
+}
+#define TRACE_V9FS_READDIR 0
+#define TRACE_V9FS_READDIR_ENABLED 0
+#define TRACE_V9FS_READDIR_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)offset;
+ (void)max_count;
+}
+#define TRACE_V9FS_READDIR_RETURN 0
+#define TRACE_V9FS_READDIR_RETURN_ENABLED 0
+#define TRACE_V9FS_READDIR_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) {
+ (void)tag;
+ (void)id;
+ (void)count;
+ (void)retval;
+}
+#define TRACE_V9FS_READLINK 0
+#define TRACE_V9FS_READLINK_ENABLED 0
+#define TRACE_V9FS_READLINK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+}
+#define TRACE_V9FS_READLINK_RETURN 0
+#define TRACE_V9FS_READLINK_RETURN_ENABLED 0
+#define TRACE_V9FS_READLINK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) {
+ (void)tag;
+ (void)id;
+ (void)target;
+}
+#define TRACE_V9FS_REMOVE 0
+#define TRACE_V9FS_REMOVE_ENABLED 0
+#define TRACE_V9FS_REMOVE_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+}
+#define TRACE_V9FS_RERROR 0
+#define TRACE_V9FS_RERROR_ENABLED 0
+#define TRACE_V9FS_RERROR_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_rerror(uint16_t tag, uint8_t id, int err) {
+ (void)tag;
+ (void)id;
+ (void)err;
+}
+#define TRACE_V9FS_SETATTR 0
+#define TRACE_V9FS_SETATTR_ENABLED 0
+#define TRACE_V9FS_SETATTR_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_setattr(uint16_t tag, uint8_t id, int32_t fid, int32_t valid, int32_t mode, int32_t uid, int32_t gid, int64_t size, int64_t atime_sec, int64_t mtime_sec) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)valid;
+ (void)mode;
+ (void)uid;
+ (void)gid;
+ (void)size;
+ (void)atime_sec;
+ (void)mtime_sec;
+}
+#define TRACE_V9FS_SETATTR_RETURN 0
+#define TRACE_V9FS_SETATTR_RETURN_ENABLED 0
+#define TRACE_V9FS_SETATTR_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_setattr_return(uint16_t tag, uint8_t id) {
+ (void)tag;
+ (void)id;
+}
+#define TRACE_V9FS_STAT 0
+#define TRACE_V9FS_STAT_ENABLED 0
+#define TRACE_V9FS_STAT_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+}
+#define TRACE_V9FS_STAT_RETURN 0
+#define TRACE_V9FS_STAT_RETURN_ENABLED 0
+#define TRACE_V9FS_STAT_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) {
+ (void)tag;
+ (void)id;
+ (void)mode;
+ (void)atime;
+ (void)mtime;
+ (void)length;
+}
+#define TRACE_V9FS_SYMLINK 0
+#define TRACE_V9FS_SYMLINK_ENABLED 0
+#define TRACE_V9FS_SYMLINK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)name;
+ (void)symname;
+ (void)gid;
+}
+#define TRACE_V9FS_SYMLINK_RETURN 0
+#define TRACE_V9FS_SYMLINK_RETURN_ENABLED 0
+#define TRACE_V9FS_SYMLINK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_symlink_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) {
+ (void)tag;
+ (void)id;
+ (void)type;
+ (void)version;
+ (void)path;
+}
+#define TRACE_V9FS_VERSION 0
+#define TRACE_V9FS_VERSION_ENABLED 0
+#define TRACE_V9FS_VERSION_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) {
+ (void)tag;
+ (void)id;
+ (void)msize;
+ (void)version;
+}
+#define TRACE_V9FS_VERSION_RETURN 0
+#define TRACE_V9FS_VERSION_RETURN_ENABLED 0
+#define TRACE_V9FS_VERSION_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) {
+ (void)tag;
+ (void)id;
+ (void)msize;
+ (void)version;
+}
+#define TRACE_V9FS_WALK 0
+#define TRACE_V9FS_WALK_ENABLED 0
+#define TRACE_V9FS_WALK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames, const char* wnames) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)newfid;
+ (void)nwnames;
+ (void)wnames;
+}
+#define TRACE_V9FS_WALK_RETURN 0
+#define TRACE_V9FS_WALK_RETURN_ENABLED 0
+#define TRACE_V9FS_WALK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) {
+ (void)tag;
+ (void)id;
+ (void)nwnames;
+ (void)qids;
+}
+#define TRACE_V9FS_WRITE 0
+#define TRACE_V9FS_WRITE_ENABLED 0
+#define TRACE_V9FS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)off;
+ (void)count;
+ (void)cnt;
+}
+#define TRACE_V9FS_WRITE_RETURN 0
+#define TRACE_V9FS_WRITE_RETURN_ENABLED 0
+#define TRACE_V9FS_WRITE_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) {
+ (void)tag;
+ (void)id;
+ (void)total;
+ (void)err;
+}
+#define TRACE_V9FS_WSTAT 0
+#define TRACE_V9FS_WSTAT_ENABLED 0
+#define TRACE_V9FS_WSTAT_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)mode;
+ (void)atime;
+ (void)mtime;
+}
+#define TRACE_V9FS_XATTRCREATE 0
+#define TRACE_V9FS_XATTRCREATE_ENABLED 0
+#define TRACE_V9FS_XATTRCREATE_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, uint64_t size, int flags) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)name;
+ (void)size;
+ (void)flags;
+}
+#define TRACE_V9FS_XATTRWALK 0
+#define TRACE_V9FS_XATTRWALK_ENABLED 0
+#define TRACE_V9FS_XATTRWALK_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) {
+ (void)tag;
+ (void)id;
+ (void)fid;
+ (void)newfid;
+ (void)name;
+}
+#define TRACE_V9FS_XATTRWALK_RETURN 0
+#define TRACE_V9FS_XATTRWALK_RETURN_ENABLED 0
+#define TRACE_V9FS_XATTRWALK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) {
+ (void)tag;
+ (void)id;
+ (void)size;
+}
+#define TRACE_XEN_9PFS_ALLOC 0
+#define TRACE_XEN_9PFS_ALLOC_ENABLED 0
+#define TRACE_XEN_9PFS_ALLOC_BACKEND_DSTATE() (0)
+static inline void trace_xen_9pfs_alloc(char *name) {
+ (void)name;
+}
+#define TRACE_XEN_9PFS_CONNECT 0
+#define TRACE_XEN_9PFS_CONNECT_ENABLED 0
+#define TRACE_XEN_9PFS_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_9pfs_connect(char *name) {
+ (void)name;
+}
+#define TRACE_XEN_9PFS_DISCONNECT 0
+#define TRACE_XEN_9PFS_DISCONNECT_ENABLED 0
+#define TRACE_XEN_9PFS_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_9pfs_disconnect(char *name) {
+ (void)name;
+}
+#define TRACE_XEN_9PFS_FREE 0
+#define TRACE_XEN_9PFS_FREE_ENABLED 0
+#define TRACE_XEN_9PFS_FREE_BACKEND_DSTATE() (0)
+static inline void trace_xen_9pfs_free(char *name) {
+ (void)name;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_acpi.h b/trace/trace-hw_acpi.h
new file mode 100644
index 0000000000..90d3633a61
--- /dev/null
+++ b/trace/trace-hw_acpi.h
@@ -0,0 +1,504 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_ACPI_H
+#define TRACE_TRACE_HW_ACPI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ACPI_ERST_CLASS_INIT_IN 0
+#define TRACE_ACPI_ERST_CLASS_INIT_IN_ENABLED 0
+#define TRACE_ACPI_ERST_CLASS_INIT_IN_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_class_init_in(void) {
+}
+#define TRACE_ACPI_ERST_CLASS_INIT_OUT 0
+#define TRACE_ACPI_ERST_CLASS_INIT_OUT_ENABLED 0
+#define TRACE_ACPI_ERST_CLASS_INIT_OUT_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_class_init_out(void) {
+}
+#define TRACE_ACPI_ERST_MEM_READ 0
+#define TRACE_ACPI_ERST_MEM_READ_ENABLED 0
+#define TRACE_ACPI_ERST_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_mem_read(uint64_t addr, uint64_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_ACPI_ERST_MEM_WRITE 0
+#define TRACE_ACPI_ERST_MEM_WRITE_ENABLED 0
+#define TRACE_ACPI_ERST_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_mem_write(uint64_t addr, uint64_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_ACPI_ERST_PCI_BAR_0 0
+#define TRACE_ACPI_ERST_PCI_BAR_0_ENABLED 0
+#define TRACE_ACPI_ERST_PCI_BAR_0_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_pci_bar_0(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_ACPI_ERST_PCI_BAR_1 0
+#define TRACE_ACPI_ERST_PCI_BAR_1_ENABLED 0
+#define TRACE_ACPI_ERST_PCI_BAR_1_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_pci_bar_1(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_ACPI_ERST_POST_LOAD 0
+#define TRACE_ACPI_ERST_POST_LOAD_ENABLED 0
+#define TRACE_ACPI_ERST_POST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_post_load(void *header, unsigned slot_size) {
+ (void)header;
+ (void)slot_size;
+}
+#define TRACE_ACPI_ERST_REALIZEFN_IN 0
+#define TRACE_ACPI_ERST_REALIZEFN_IN_ENABLED 0
+#define TRACE_ACPI_ERST_REALIZEFN_IN_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_realizefn_in(void) {
+}
+#define TRACE_ACPI_ERST_REALIZEFN_OUT 0
+#define TRACE_ACPI_ERST_REALIZEFN_OUT_ENABLED 0
+#define TRACE_ACPI_ERST_REALIZEFN_OUT_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_realizefn_out(unsigned size) {
+ (void)size;
+}
+#define TRACE_ACPI_ERST_REG_READ 0
+#define TRACE_ACPI_ERST_REG_READ_ENABLED 0
+#define TRACE_ACPI_ERST_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_reg_read(uint64_t addr, uint64_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_ACPI_ERST_REG_WRITE 0
+#define TRACE_ACPI_ERST_REG_WRITE_ENABLED 0
+#define TRACE_ACPI_ERST_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_reg_write(uint64_t addr, uint64_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_ACPI_ERST_RESET_IN 0
+#define TRACE_ACPI_ERST_RESET_IN_ENABLED 0
+#define TRACE_ACPI_ERST_RESET_IN_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_reset_in(unsigned record_count) {
+ (void)record_count;
+}
+#define TRACE_ACPI_ERST_RESET_OUT 0
+#define TRACE_ACPI_ERST_RESET_OUT_ENABLED 0
+#define TRACE_ACPI_ERST_RESET_OUT_BACKEND_DSTATE() (0)
+static inline void trace_acpi_erst_reset_out(unsigned record_count) {
+ (void)record_count;
+}
+#define TRACE_ACPI_GPE_EN_IOPORT_READB 0
+#define TRACE_ACPI_GPE_EN_IOPORT_READB_ENABLED 0
+#define TRACE_ACPI_GPE_EN_IOPORT_READB_BACKEND_DSTATE() (0)
+static inline void trace_acpi_gpe_en_ioport_readb(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ACPI_GPE_EN_IOPORT_WRITEB 0
+#define TRACE_ACPI_GPE_EN_IOPORT_WRITEB_ENABLED 0
+#define TRACE_ACPI_GPE_EN_IOPORT_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_acpi_gpe_en_ioport_writeb(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ACPI_GPE_STS_IOPORT_READB 0
+#define TRACE_ACPI_GPE_STS_IOPORT_READB_ENABLED 0
+#define TRACE_ACPI_GPE_STS_IOPORT_READB_BACKEND_DSTATE() (0)
+static inline void trace_acpi_gpe_sts_ioport_readb(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ACPI_GPE_STS_IOPORT_WRITEB 0
+#define TRACE_ACPI_GPE_STS_IOPORT_WRITEB_ENABLED 0
+#define TRACE_ACPI_GPE_STS_IOPORT_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_acpi_gpe_sts_ioport_writeb(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ACPI_NVDIMM_DSM_INFO 0
+#define TRACE_ACPI_NVDIMM_DSM_INFO_ENABLED 0
+#define TRACE_ACPI_NVDIMM_DSM_INFO_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_dsm_info(uint32_t revision, uint32_t handle, uint32_t function) {
+ (void)revision;
+ (void)handle;
+ (void)function;
+}
+#define TRACE_ACPI_NVDIMM_DSM_MEM_ADDR 0
+#define TRACE_ACPI_NVDIMM_DSM_MEM_ADDR_ENABLED 0
+#define TRACE_ACPI_NVDIMM_DSM_MEM_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_dsm_mem_addr(uint64_t dsm_mem_addr) {
+ (void)dsm_mem_addr;
+}
+#define TRACE_ACPI_NVDIMM_INVALID_REVISION 0
+#define TRACE_ACPI_NVDIMM_INVALID_REVISION_ENABLED 0
+#define TRACE_ACPI_NVDIMM_INVALID_REVISION_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_invalid_revision(uint32_t revision) {
+ (void)revision;
+}
+#define TRACE_ACPI_NVDIMM_LABEL_INFO 0
+#define TRACE_ACPI_NVDIMM_LABEL_INFO_ENABLED 0
+#define TRACE_ACPI_NVDIMM_LABEL_INFO_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_label_info(uint32_t label_size, uint32_t mxfer) {
+ (void)label_size;
+ (void)mxfer;
+}
+#define TRACE_ACPI_NVDIMM_LABEL_OVERFLOW 0
+#define TRACE_ACPI_NVDIMM_LABEL_OVERFLOW_ENABLED 0
+#define TRACE_ACPI_NVDIMM_LABEL_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_label_overflow(uint32_t offset, uint32_t length) {
+ (void)offset;
+ (void)length;
+}
+#define TRACE_ACPI_NVDIMM_LABEL_OVERSIZE 0
+#define TRACE_ACPI_NVDIMM_LABEL_OVERSIZE_ENABLED 0
+#define TRACE_ACPI_NVDIMM_LABEL_OVERSIZE_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_label_oversize(uint32_t pos, uint64_t size) {
+ (void)pos;
+ (void)size;
+}
+#define TRACE_ACPI_NVDIMM_LABEL_XFER_EXCEED 0
+#define TRACE_ACPI_NVDIMM_LABEL_XFER_EXCEED_ENABLED 0
+#define TRACE_ACPI_NVDIMM_LABEL_XFER_EXCEED_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_label_xfer_exceed(uint32_t length, uint32_t max_xfer) {
+ (void)length;
+ (void)max_xfer;
+}
+#define TRACE_ACPI_NVDIMM_READ_FIT 0
+#define TRACE_ACPI_NVDIMM_READ_FIT_ENABLED 0
+#define TRACE_ACPI_NVDIMM_READ_FIT_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_read_fit(uint32_t offset, uint32_t len, const char *dirty) {
+ (void)offset;
+ (void)len;
+ (void)dirty;
+}
+#define TRACE_ACPI_NVDIMM_READ_IO_PORT 0
+#define TRACE_ACPI_NVDIMM_READ_IO_PORT_ENABLED 0
+#define TRACE_ACPI_NVDIMM_READ_IO_PORT_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_read_io_port(void) {
+}
+#define TRACE_ACPI_NVDIMM_READ_LABEL 0
+#define TRACE_ACPI_NVDIMM_READ_LABEL_ENABLED 0
+#define TRACE_ACPI_NVDIMM_READ_LABEL_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_read_label(uint32_t offset, uint32_t length) {
+ (void)offset;
+ (void)length;
+}
+#define TRACE_ACPI_NVDIMM_WRITE_LABEL 0
+#define TRACE_ACPI_NVDIMM_WRITE_LABEL_ENABLED 0
+#define TRACE_ACPI_NVDIMM_WRITE_LABEL_BACKEND_DSTATE() (0)
+static inline void trace_acpi_nvdimm_write_label(uint32_t offset, uint32_t length) {
+ (void)offset;
+ (void)length;
+}
+#define TRACE_ACPI_PCI_ACPI_INDEX_READ 0
+#define TRACE_ACPI_PCI_ACPI_INDEX_READ_ENABLED 0
+#define TRACE_ACPI_PCI_ACPI_INDEX_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_acpi_index_read(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ACPI_PCI_ACPI_INDEX_WRITE 0
+#define TRACE_ACPI_PCI_ACPI_INDEX_WRITE_ENABLED 0
+#define TRACE_ACPI_PCI_ACPI_INDEX_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_acpi_index_write(unsigned bsel, unsigned slot, uint32_t aidx) {
+ (void)bsel;
+ (void)slot;
+ (void)aidx;
+}
+#define TRACE_ACPI_PCI_DOWN_READ 0
+#define TRACE_ACPI_PCI_DOWN_READ_ENABLED 0
+#define TRACE_ACPI_PCI_DOWN_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_down_read(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ACPI_PCI_EJ_WRITE 0
+#define TRACE_ACPI_PCI_EJ_WRITE_ENABLED 0
+#define TRACE_ACPI_PCI_EJ_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_ej_write(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_ACPI_PCI_EJECT_SLOT 0
+#define TRACE_ACPI_PCI_EJECT_SLOT_ENABLED 0
+#define TRACE_ACPI_PCI_EJECT_SLOT_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_eject_slot(unsigned bsel, unsigned slot) {
+ (void)bsel;
+ (void)slot;
+}
+#define TRACE_ACPI_PCI_FEATURES_READ 0
+#define TRACE_ACPI_PCI_FEATURES_READ_ENABLED 0
+#define TRACE_ACPI_PCI_FEATURES_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_features_read(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ACPI_PCI_RMV_READ 0
+#define TRACE_ACPI_PCI_RMV_READ_ENABLED 0
+#define TRACE_ACPI_PCI_RMV_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_rmv_read(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ACPI_PCI_SEL_READ 0
+#define TRACE_ACPI_PCI_SEL_READ_ENABLED 0
+#define TRACE_ACPI_PCI_SEL_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_sel_read(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ACPI_PCI_SEL_WRITE 0
+#define TRACE_ACPI_PCI_SEL_WRITE_ENABLED 0
+#define TRACE_ACPI_PCI_SEL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_sel_write(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_ACPI_PCI_UNPLUG 0
+#define TRACE_ACPI_PCI_UNPLUG_ENABLED 0
+#define TRACE_ACPI_PCI_UNPLUG_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_unplug(int bsel, int slot) {
+ (void)bsel;
+ (void)slot;
+}
+#define TRACE_ACPI_PCI_UNPLUG_REQUEST 0
+#define TRACE_ACPI_PCI_UNPLUG_REQUEST_ENABLED 0
+#define TRACE_ACPI_PCI_UNPLUG_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_unplug_request(int bsel, int slot) {
+ (void)bsel;
+ (void)slot;
+}
+#define TRACE_ACPI_PCI_UP_READ 0
+#define TRACE_ACPI_PCI_UP_READ_ENABLED 0
+#define TRACE_ACPI_PCI_UP_READ_BACKEND_DSTATE() (0)
+static inline void trace_acpi_pci_up_read(uint32_t val) {
+ (void)val;
+}
+#define TRACE_CPUHP_ACPI_CLEAR_INSERTING_EVT 0
+#define TRACE_CPUHP_ACPI_CLEAR_INSERTING_EVT_ENABLED 0
+#define TRACE_CPUHP_ACPI_CLEAR_INSERTING_EVT_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_clear_inserting_evt(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_CLEAR_REMOVE_EVT 0
+#define TRACE_CPUHP_ACPI_CLEAR_REMOVE_EVT_ENABLED 0
+#define TRACE_CPUHP_ACPI_CLEAR_REMOVE_EVT_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_clear_remove_evt(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_CPU_HAS_EVENTS 0
+#define TRACE_CPUHP_ACPI_CPU_HAS_EVENTS_ENABLED 0
+#define TRACE_CPUHP_ACPI_CPU_HAS_EVENTS_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins, bool rm) {
+ (void)idx;
+ (void)ins;
+ (void)rm;
+}
+#define TRACE_CPUHP_ACPI_EJECTING_CPU 0
+#define TRACE_CPUHP_ACPI_EJECTING_CPU_ENABLED 0
+#define TRACE_CPUHP_ACPI_EJECTING_CPU_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_ejecting_cpu(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_EJECTING_INVALID_CPU 0
+#define TRACE_CPUHP_ACPI_EJECTING_INVALID_CPU_ENABLED 0
+#define TRACE_CPUHP_ACPI_EJECTING_INVALID_CPU_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_FW_REMOVE_CPU 0
+#define TRACE_CPUHP_ACPI_FW_REMOVE_CPU_ENABLED 0
+#define TRACE_CPUHP_ACPI_FW_REMOVE_CPU_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_fw_remove_cpu(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_FW_REMOVE_INVALID_CPU 0
+#define TRACE_CPUHP_ACPI_FW_REMOVE_INVALID_CPU_ENABLED 0
+#define TRACE_CPUHP_ACPI_FW_REMOVE_INVALID_CPU_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_fw_remove_invalid_cpu(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_INVALID_IDX_SELECTED 0
+#define TRACE_CPUHP_ACPI_INVALID_IDX_SELECTED_ENABLED 0
+#define TRACE_CPUHP_ACPI_INVALID_IDX_SELECTED_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_invalid_idx_selected(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_READ_CMD_DATA 0
+#define TRACE_CPUHP_ACPI_READ_CMD_DATA_ENABLED 0
+#define TRACE_CPUHP_ACPI_READ_CMD_DATA_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) {
+ (void)idx;
+ (void)data;
+}
+#define TRACE_CPUHP_ACPI_READ_CMD_DATA2 0
+#define TRACE_CPUHP_ACPI_READ_CMD_DATA2_ENABLED 0
+#define TRACE_CPUHP_ACPI_READ_CMD_DATA2_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_read_cmd_data2(uint32_t idx, uint32_t data) {
+ (void)idx;
+ (void)data;
+}
+#define TRACE_CPUHP_ACPI_READ_FLAGS 0
+#define TRACE_CPUHP_ACPI_READ_FLAGS_ENABLED 0
+#define TRACE_CPUHP_ACPI_READ_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) {
+ (void)idx;
+ (void)flags;
+}
+#define TRACE_CPUHP_ACPI_WRITE_CMD 0
+#define TRACE_CPUHP_ACPI_WRITE_CMD_ENABLED 0
+#define TRACE_CPUHP_ACPI_WRITE_CMD_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) {
+ (void)idx;
+ (void)cmd;
+}
+#define TRACE_CPUHP_ACPI_WRITE_IDX 0
+#define TRACE_CPUHP_ACPI_WRITE_IDX_ENABLED 0
+#define TRACE_CPUHP_ACPI_WRITE_IDX_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_write_idx(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_CPUHP_ACPI_WRITE_OST_EV 0
+#define TRACE_CPUHP_ACPI_WRITE_OST_EV_ENABLED 0
+#define TRACE_CPUHP_ACPI_WRITE_OST_EV_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) {
+ (void)slot;
+ (void)ev;
+}
+#define TRACE_CPUHP_ACPI_WRITE_OST_STATUS 0
+#define TRACE_CPUHP_ACPI_WRITE_OST_STATUS_ENABLED 0
+#define TRACE_CPUHP_ACPI_WRITE_OST_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) {
+ (void)slot;
+ (void)st;
+}
+#define TRACE_MHP_ACPI_CLEAR_INSERT_EVT 0
+#define TRACE_MHP_ACPI_CLEAR_INSERT_EVT_ENABLED 0
+#define TRACE_MHP_ACPI_CLEAR_INSERT_EVT_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_clear_insert_evt(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_MHP_ACPI_CLEAR_REMOVE_EVT 0
+#define TRACE_MHP_ACPI_CLEAR_REMOVE_EVT_ENABLED 0
+#define TRACE_MHP_ACPI_CLEAR_REMOVE_EVT_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_clear_remove_evt(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_MHP_ACPI_EJECTING_INVALID_SLOT 0
+#define TRACE_MHP_ACPI_EJECTING_INVALID_SLOT_ENABLED 0
+#define TRACE_MHP_ACPI_EJECTING_INVALID_SLOT_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_ejecting_invalid_slot(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_MHP_ACPI_INVALID_SLOT_SELECTED 0
+#define TRACE_MHP_ACPI_INVALID_SLOT_SELECTED_ENABLED 0
+#define TRACE_MHP_ACPI_INVALID_SLOT_SELECTED_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_invalid_slot_selected(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_MHP_ACPI_PC_DIMM_DELETE_FAILED 0
+#define TRACE_MHP_ACPI_PC_DIMM_DELETE_FAILED_ENABLED 0
+#define TRACE_MHP_ACPI_PC_DIMM_DELETE_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_pc_dimm_delete_failed(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_MHP_ACPI_PC_DIMM_DELETED 0
+#define TRACE_MHP_ACPI_PC_DIMM_DELETED_ENABLED 0
+#define TRACE_MHP_ACPI_PC_DIMM_DELETED_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_pc_dimm_deleted(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_MHP_ACPI_READ_ADDR_HI 0
+#define TRACE_MHP_ACPI_READ_ADDR_HI_ENABLED 0
+#define TRACE_MHP_ACPI_READ_ADDR_HI_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) {
+ (void)slot;
+ (void)addr;
+}
+#define TRACE_MHP_ACPI_READ_ADDR_LO 0
+#define TRACE_MHP_ACPI_READ_ADDR_LO_ENABLED 0
+#define TRACE_MHP_ACPI_READ_ADDR_LO_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) {
+ (void)slot;
+ (void)addr;
+}
+#define TRACE_MHP_ACPI_READ_FLAGS 0
+#define TRACE_MHP_ACPI_READ_FLAGS_ENABLED 0
+#define TRACE_MHP_ACPI_READ_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_read_flags(uint32_t slot, uint32_t flags) {
+ (void)slot;
+ (void)flags;
+}
+#define TRACE_MHP_ACPI_READ_PXM 0
+#define TRACE_MHP_ACPI_READ_PXM_ENABLED 0
+#define TRACE_MHP_ACPI_READ_PXM_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) {
+ (void)slot;
+ (void)pxm;
+}
+#define TRACE_MHP_ACPI_READ_SIZE_HI 0
+#define TRACE_MHP_ACPI_READ_SIZE_HI_ENABLED 0
+#define TRACE_MHP_ACPI_READ_SIZE_HI_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) {
+ (void)slot;
+ (void)size;
+}
+#define TRACE_MHP_ACPI_READ_SIZE_LO 0
+#define TRACE_MHP_ACPI_READ_SIZE_LO_ENABLED 0
+#define TRACE_MHP_ACPI_READ_SIZE_LO_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) {
+ (void)slot;
+ (void)size;
+}
+#define TRACE_MHP_ACPI_WRITE_OST_EV 0
+#define TRACE_MHP_ACPI_WRITE_OST_EV_ENABLED 0
+#define TRACE_MHP_ACPI_WRITE_OST_EV_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) {
+ (void)slot;
+ (void)ev;
+}
+#define TRACE_MHP_ACPI_WRITE_OST_STATUS 0
+#define TRACE_MHP_ACPI_WRITE_OST_STATUS_ENABLED 0
+#define TRACE_MHP_ACPI_WRITE_OST_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) {
+ (void)slot;
+ (void)st;
+}
+#define TRACE_MHP_ACPI_WRITE_SLOT 0
+#define TRACE_MHP_ACPI_WRITE_SLOT_ENABLED 0
+#define TRACE_MHP_ACPI_WRITE_SLOT_BACKEND_DSTATE() (0)
+static inline void trace_mhp_acpi_write_slot(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_TCO_IO_READ 0
+#define TRACE_TCO_IO_READ_ENABLED 0
+#define TRACE_TCO_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_tco_io_read(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_TCO_IO_WRITE 0
+#define TRACE_TCO_IO_WRITE_ENABLED 0
+#define TRACE_TCO_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tco_io_write(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_TCO_TIMER_EXPIRED 0
+#define TRACE_TCO_TIMER_EXPIRED_ENABLED 0
+#define TRACE_TCO_TIMER_EXPIRED_BACKEND_DSTATE() (0)
+static inline void trace_tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) {
+ (void)timeouts_no;
+ (void)strap;
+ (void)no_reboot;
+}
+#define TRACE_TCO_TIMER_RELOAD 0
+#define TRACE_TCO_TIMER_RELOAD_ENABLED 0
+#define TRACE_TCO_TIMER_RELOAD_BACKEND_DSTATE() (0)
+static inline void trace_tco_timer_reload(int ticks, int msec) {
+ (void)ticks;
+ (void)msec;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_adc.h b/trace/trace-hw_adc.h
new file mode 100644
index 0000000000..a2baf514c6
--- /dev/null
+++ b/trace/trace-hw_adc.h
@@ -0,0 +1,45 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_ADC_H
+#define TRACE_TRACE_HW_ADC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ASPEED_ADC_ENGINE_READ 0
+#define TRACE_ASPEED_ADC_ENGINE_READ_ENABLED 0
+#define TRACE_ASPEED_ADC_ENGINE_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_adc_engine_read(uint32_t engine_id, uint64_t addr, uint64_t value) {
+ (void)engine_id;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_ADC_ENGINE_WRITE 0
+#define TRACE_ASPEED_ADC_ENGINE_WRITE_ENABLED 0
+#define TRACE_ASPEED_ADC_ENGINE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_adc_engine_write(uint32_t engine_id, uint64_t addr, uint64_t value) {
+ (void)engine_id;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_NPCM7XX_ADC_READ 0
+#define TRACE_NPCM7XX_ADC_READ_ENABLED 0
+#define TRACE_NPCM7XX_ADC_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_adc_read(const char *id, uint64_t offset, uint32_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_ADC_WRITE 0
+#define TRACE_NPCM7XX_ADC_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_ADC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_adc_write(const char *id, uint64_t offset, uint32_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_alpha.h b/trace/trace-hw_alpha.h
new file mode 100644
index 0000000000..9254114ee5
--- /dev/null
+++ b/trace/trace-hw_alpha.h
@@ -0,0 +1,18 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_ALPHA_H
+#define TRACE_TRACE_HW_ALPHA_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALPHA_PCI_IACK_WRITE 0
+#define TRACE_ALPHA_PCI_IACK_WRITE_ENABLED 0
+#define TRACE_ALPHA_PCI_IACK_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_alpha_pci_iack_write(void) {
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_arm.h b/trace/trace-hw_arm.h
new file mode 100644
index 0000000000..4a95c1bed3
--- /dev/null
+++ b/trace/trace-hw_arm.h
@@ -0,0 +1,519 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_ARM_H
+#define TRACE_TRACE_HW_ARM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_BCM2838_GIC_SET_IRQ 0
+#define TRACE_BCM2838_GIC_SET_IRQ_ENABLED 0
+#define TRACE_BCM2838_GIC_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2838_gic_set_irq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_OMAP1_LPG_LED 0
+#define TRACE_OMAP1_LPG_LED_ENABLED 0
+#define TRACE_OMAP1_LPG_LED_BACKEND_DSTATE() (0)
+static inline void trace_omap1_lpg_led(const char *onoff) {
+ (void)onoff;
+}
+#define TRACE_OMAP1_PWL_BACKLIGHT 0
+#define TRACE_OMAP1_PWL_BACKLIGHT_ENABLED 0
+#define TRACE_OMAP1_PWL_BACKLIGHT_BACKEND_DSTATE() (0)
+static inline void trace_omap1_pwl_backlight(int output) {
+ (void)output;
+}
+#define TRACE_OMAP1_PWL_CLOCKING_SCHEME 0
+#define TRACE_OMAP1_PWL_CLOCKING_SCHEME_ENABLED 0
+#define TRACE_OMAP1_PWL_CLOCKING_SCHEME_BACKEND_DSTATE() (0)
+static inline void trace_omap1_pwl_clocking_scheme(const char *scheme) {
+ (void)scheme;
+}
+#define TRACE_OMAP1_PWT_BUZZ 0
+#define TRACE_OMAP1_PWT_BUZZ_ENABLED 0
+#define TRACE_OMAP1_PWT_BUZZ_BACKEND_DSTATE() (0)
+static inline void trace_omap1_pwt_buzz(int freq) {
+ (void)freq;
+}
+#define TRACE_OMAP1_PWT_SILENCE 0
+#define TRACE_OMAP1_PWT_SILENCE_ENABLED 0
+#define TRACE_OMAP1_PWT_SILENCE_BACKEND_DSTATE() (0)
+static inline void trace_omap1_pwt_silence(void) {
+}
+#define TRACE_SMMU_ADD_MR 0
+#define TRACE_SMMU_ADD_MR_ENABLED 0
+#define TRACE_SMMU_ADD_MR_BACKEND_DSTATE() (0)
+static inline void trace_smmu_add_mr(const char *name) {
+ (void)name;
+}
+#define TRACE_SMMU_CONFIG_CACHE_INV 0
+#define TRACE_SMMU_CONFIG_CACHE_INV_ENABLED 0
+#define TRACE_SMMU_CONFIG_CACHE_INV_BACKEND_DSTATE() (0)
+static inline void trace_smmu_config_cache_inv(uint32_t sid) {
+ (void)sid;
+}
+#define TRACE_SMMU_CONFIGS_INV_SID_RANGE 0
+#define TRACE_SMMU_CONFIGS_INV_SID_RANGE_ENABLED 0
+#define TRACE_SMMU_CONFIGS_INV_SID_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_smmu_configs_inv_sid_range(uint32_t start, uint32_t end) {
+ (void)start;
+ (void)end;
+}
+#define TRACE_SMMU_GET_PTE 0
+#define TRACE_SMMU_GET_PTE_ENABLED 0
+#define TRACE_SMMU_GET_PTE_BACKEND_DSTATE() (0)
+static inline void trace_smmu_get_pte(uint64_t baseaddr, int index, uint64_t pteaddr, uint64_t pte) {
+ (void)baseaddr;
+ (void)index;
+ (void)pteaddr;
+ (void)pte;
+}
+#define TRACE_SMMU_INV_NOTIFIERS_MR 0
+#define TRACE_SMMU_INV_NOTIFIERS_MR_ENABLED 0
+#define TRACE_SMMU_INV_NOTIFIERS_MR_BACKEND_DSTATE() (0)
+static inline void trace_smmu_inv_notifiers_mr(const char *name) {
+ (void)name;
+}
+#define TRACE_SMMU_IOTLB_INSERT 0
+#define TRACE_SMMU_IOTLB_INSERT_ENABLED 0
+#define TRACE_SMMU_IOTLB_INSERT_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_insert(int asid, int vmid, uint64_t addr, uint8_t tg, uint8_t level) {
+ (void)asid;
+ (void)vmid;
+ (void)addr;
+ (void)tg;
+ (void)level;
+}
+#define TRACE_SMMU_IOTLB_INV_ALL 0
+#define TRACE_SMMU_IOTLB_INV_ALL_ENABLED 0
+#define TRACE_SMMU_IOTLB_INV_ALL_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_inv_all(void) {
+}
+#define TRACE_SMMU_IOTLB_INV_ASID_VMID 0
+#define TRACE_SMMU_IOTLB_INV_ASID_VMID_ENABLED 0
+#define TRACE_SMMU_IOTLB_INV_ASID_VMID_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_inv_asid_vmid(int asid, int vmid) {
+ (void)asid;
+ (void)vmid;
+}
+#define TRACE_SMMU_IOTLB_INV_IOVA 0
+#define TRACE_SMMU_IOTLB_INV_IOVA_ENABLED 0
+#define TRACE_SMMU_IOTLB_INV_IOVA_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_inv_iova(int asid, uint64_t addr) {
+ (void)asid;
+ (void)addr;
+}
+#define TRACE_SMMU_IOTLB_INV_VMID 0
+#define TRACE_SMMU_IOTLB_INV_VMID_ENABLED 0
+#define TRACE_SMMU_IOTLB_INV_VMID_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_inv_vmid(int vmid) {
+ (void)vmid;
+}
+#define TRACE_SMMU_IOTLB_INV_VMID_S1 0
+#define TRACE_SMMU_IOTLB_INV_VMID_S1_ENABLED 0
+#define TRACE_SMMU_IOTLB_INV_VMID_S1_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_inv_vmid_s1(int vmid) {
+ (void)vmid;
+}
+#define TRACE_SMMU_IOTLB_LOOKUP_HIT 0
+#define TRACE_SMMU_IOTLB_LOOKUP_HIT_ENABLED 0
+#define TRACE_SMMU_IOTLB_LOOKUP_HIT_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_lookup_hit(int asid, int vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) {
+ (void)asid;
+ (void)vmid;
+ (void)addr;
+ (void)hit;
+ (void)miss;
+ (void)p;
+}
+#define TRACE_SMMU_IOTLB_LOOKUP_MISS 0
+#define TRACE_SMMU_IOTLB_LOOKUP_MISS_ENABLED 0
+#define TRACE_SMMU_IOTLB_LOOKUP_MISS_BACKEND_DSTATE() (0)
+static inline void trace_smmu_iotlb_lookup_miss(int asid, int vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) {
+ (void)asid;
+ (void)vmid;
+ (void)addr;
+ (void)hit;
+ (void)miss;
+ (void)p;
+}
+#define TRACE_SMMU_PTW_BLOCK_PTE 0
+#define TRACE_SMMU_PTW_BLOCK_PTE_ENABLED 0
+#define TRACE_SMMU_PTW_BLOCK_PTE_BACKEND_DSTATE() (0)
+static inline void trace_smmu_ptw_block_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t iova, uint64_t gpa, int bsize_mb) {
+ (void)stage;
+ (void)level;
+ (void)baseaddr;
+ (void)pteaddr;
+ (void)pte;
+ (void)iova;
+ (void)gpa;
+ (void)bsize_mb;
+}
+#define TRACE_SMMU_PTW_INVALID_PTE 0
+#define TRACE_SMMU_PTW_INVALID_PTE_ENABLED 0
+#define TRACE_SMMU_PTW_INVALID_PTE_BACKEND_DSTATE() (0)
+static inline void trace_smmu_ptw_invalid_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint32_t offset, uint64_t pte) {
+ (void)stage;
+ (void)level;
+ (void)baseaddr;
+ (void)pteaddr;
+ (void)offset;
+ (void)pte;
+}
+#define TRACE_SMMU_PTW_LEVEL 0
+#define TRACE_SMMU_PTW_LEVEL_ENABLED 0
+#define TRACE_SMMU_PTW_LEVEL_BACKEND_DSTATE() (0)
+static inline void trace_smmu_ptw_level(int stage, int level, uint64_t iova, size_t subpage_size, uint64_t baseaddr, uint32_t offset, uint64_t pte) {
+ (void)stage;
+ (void)level;
+ (void)iova;
+ (void)subpage_size;
+ (void)baseaddr;
+ (void)offset;
+ (void)pte;
+}
+#define TRACE_SMMU_PTW_PAGE_PTE 0
+#define TRACE_SMMU_PTW_PAGE_PTE_ENABLED 0
+#define TRACE_SMMU_PTW_PAGE_PTE_BACKEND_DSTATE() (0)
+static inline void trace_smmu_ptw_page_pte(int stage, int level, uint64_t iova, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t address) {
+ (void)stage;
+ (void)level;
+ (void)iova;
+ (void)baseaddr;
+ (void)pteaddr;
+ (void)pte;
+ (void)address;
+}
+#define TRACE_SMMU_RESET_EXIT 0
+#define TRACE_SMMU_RESET_EXIT_ENABLED 0
+#define TRACE_SMMU_RESET_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_smmu_reset_exit(void) {
+}
+#define TRACE_SMMUV3_CMDQ_CFGI_CD 0
+#define TRACE_SMMUV3_CMDQ_CFGI_CD_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_CFGI_CD_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_cfgi_cd(uint32_t sid) {
+ (void)sid;
+}
+#define TRACE_SMMUV3_CMDQ_CFGI_STE 0
+#define TRACE_SMMUV3_CMDQ_CFGI_STE_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_CFGI_STE_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_cfgi_ste(int streamid) {
+ (void)streamid;
+}
+#define TRACE_SMMUV3_CMDQ_CFGI_STE_RANGE 0
+#define TRACE_SMMUV3_CMDQ_CFGI_STE_RANGE_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_CFGI_STE_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_cfgi_ste_range(int start, int end) {
+ (void)start;
+ (void)end;
+}
+#define TRACE_SMMUV3_CMDQ_CONSUME 0
+#define TRACE_SMMUV3_CMDQ_CONSUME_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_CONSUME_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_consume(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) {
+ (void)prod;
+ (void)cons;
+ (void)prod_wrap;
+ (void)cons_wrap;
+}
+#define TRACE_SMMUV3_CMDQ_CONSUME_ERROR 0
+#define TRACE_SMMUV3_CMDQ_CONSUME_ERROR_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_CONSUME_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) {
+ (void)cmd_name;
+ (void)cmd_error;
+}
+#define TRACE_SMMUV3_CMDQ_CONSUME_OUT 0
+#define TRACE_SMMUV3_CMDQ_CONSUME_OUT_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_CONSUME_OUT_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) {
+ (void)prod;
+ (void)cons;
+ (void)prod_wrap;
+ (void)cons_wrap;
+}
+#define TRACE_SMMUV3_CMDQ_OPCODE 0
+#define TRACE_SMMUV3_CMDQ_OPCODE_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_OPCODE_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_opcode(const char *opcode) {
+ (void)opcode;
+}
+#define TRACE_SMMUV3_CMDQ_TLBI_NH 0
+#define TRACE_SMMUV3_CMDQ_TLBI_NH_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_TLBI_NH_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_tlbi_nh(int vmid) {
+ (void)vmid;
+}
+#define TRACE_SMMUV3_CMDQ_TLBI_NH_ASID 0
+#define TRACE_SMMUV3_CMDQ_TLBI_NH_ASID_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_TLBI_NH_ASID_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_tlbi_nh_asid(int asid) {
+ (void)asid;
+}
+#define TRACE_SMMUV3_CMDQ_TLBI_NSNH 0
+#define TRACE_SMMUV3_CMDQ_TLBI_NSNH_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_TLBI_NSNH_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_tlbi_nsnh(void) {
+}
+#define TRACE_SMMUV3_CMDQ_TLBI_S12_VMID 0
+#define TRACE_SMMUV3_CMDQ_TLBI_S12_VMID_ENABLED 0
+#define TRACE_SMMUV3_CMDQ_TLBI_S12_VMID_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_cmdq_tlbi_s12_vmid(int vmid) {
+ (void)vmid;
+}
+#define TRACE_SMMUV3_CONFIG_CACHE_HIT 0
+#define TRACE_SMMUV3_CONFIG_CACHE_HIT_ENABLED 0
+#define TRACE_SMMUV3_CONFIG_CACHE_HIT_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_config_cache_hit(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t perc) {
+ (void)sid;
+ (void)hits;
+ (void)misses;
+ (void)perc;
+}
+#define TRACE_SMMUV3_CONFIG_CACHE_MISS 0
+#define TRACE_SMMUV3_CONFIG_CACHE_MISS_ENABLED 0
+#define TRACE_SMMUV3_CONFIG_CACHE_MISS_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_config_cache_miss(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t perc) {
+ (void)sid;
+ (void)hits;
+ (void)misses;
+ (void)perc;
+}
+#define TRACE_SMMUV3_DECODE_CD 0
+#define TRACE_SMMUV3_DECODE_CD_ENABLED 0
+#define TRACE_SMMUV3_DECODE_CD_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_decode_cd(uint32_t oas) {
+ (void)oas;
+}
+#define TRACE_SMMUV3_DECODE_CD_TT 0
+#define TRACE_SMMUV3_DECODE_CD_TT_ENABLED 0
+#define TRACE_SMMUV3_DECODE_CD_TT_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz, bool had) {
+ (void)i;
+ (void)tsz;
+ (void)ttb;
+ (void)granule_sz;
+ (void)had;
+}
+#define TRACE_SMMUV3_FIND_STE 0
+#define TRACE_SMMUV3_FIND_STE_ENABLED 0
+#define TRACE_SMMUV3_FIND_STE_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) {
+ (void)sid;
+ (void)features;
+ (void)sid_split;
+}
+#define TRACE_SMMUV3_FIND_STE_2LVL 0
+#define TRACE_SMMUV3_FIND_STE_2LVL_ENABLED 0
+#define TRACE_SMMUV3_FIND_STE_2LVL_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offset, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) {
+ (void)strtab_base;
+ (void)l1ptr;
+ (void)l1_ste_offset;
+ (void)l2ptr;
+ (void)l2_ste_offset;
+ (void)max_l2_ste;
+}
+#define TRACE_SMMUV3_GET_CD 0
+#define TRACE_SMMUV3_GET_CD_ENABLED 0
+#define TRACE_SMMUV3_GET_CD_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_get_cd(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_SMMUV3_GET_STE 0
+#define TRACE_SMMUV3_GET_STE_ENABLED 0
+#define TRACE_SMMUV3_GET_STE_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_get_ste(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_SMMUV3_INV_NOTIFIERS_IOVA 0
+#define TRACE_SMMUV3_INV_NOTIFIERS_IOVA_ENABLED 0
+#define TRACE_SMMUV3_INV_NOTIFIERS_IOVA_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_inv_notifiers_iova(const char *name, int asid, int vmid, uint64_t iova, uint8_t tg, uint64_t num_pages, int stage) {
+ (void)name;
+ (void)asid;
+ (void)vmid;
+ (void)iova;
+ (void)tg;
+ (void)num_pages;
+ (void)stage;
+}
+#define TRACE_SMMUV3_NOTIFY_FLAG_ADD 0
+#define TRACE_SMMUV3_NOTIFY_FLAG_ADD_ENABLED 0
+#define TRACE_SMMUV3_NOTIFY_FLAG_ADD_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_notify_flag_add(const char *iommu) {
+ (void)iommu;
+}
+#define TRACE_SMMUV3_NOTIFY_FLAG_DEL 0
+#define TRACE_SMMUV3_NOTIFY_FLAG_DEL_ENABLED 0
+#define TRACE_SMMUV3_NOTIFY_FLAG_DEL_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_notify_flag_del(const char *iommu) {
+ (void)iommu;
+}
+#define TRACE_SMMUV3_RANGE_INVAL 0
+#define TRACE_SMMUV3_RANGE_INVAL_ENABLED 0
+#define TRACE_SMMUV3_RANGE_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_range_inval(int vmid, int asid, uint64_t addr, uint8_t tg, uint64_t num_pages, uint8_t ttl, bool leaf, int stage) {
+ (void)vmid;
+ (void)asid;
+ (void)addr;
+ (void)tg;
+ (void)num_pages;
+ (void)ttl;
+ (void)leaf;
+ (void)stage;
+}
+#define TRACE_SMMUV3_READ_MMIO 0
+#define TRACE_SMMUV3_READ_MMIO_ENABLED 0
+#define TRACE_SMMUV3_READ_MMIO_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_read_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) {
+ (void)addr;
+ (void)val;
+ (void)size;
+ (void)r;
+}
+#define TRACE_SMMUV3_RECORD_EVENT 0
+#define TRACE_SMMUV3_RECORD_EVENT_ENABLED 0
+#define TRACE_SMMUV3_RECORD_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_record_event(const char *type, uint32_t sid) {
+ (void)type;
+ (void)sid;
+}
+#define TRACE_SMMUV3_TRANSLATE_ABORT 0
+#define TRACE_SMMUV3_TRANSLATE_ABORT_ENABLED 0
+#define TRACE_SMMUV3_TRANSLATE_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_translate_abort(const char *n, uint16_t sid, uint64_t addr, bool is_write) {
+ (void)n;
+ (void)sid;
+ (void)addr;
+ (void)is_write;
+}
+#define TRACE_SMMUV3_TRANSLATE_BYPASS 0
+#define TRACE_SMMUV3_TRANSLATE_BYPASS_ENABLED 0
+#define TRACE_SMMUV3_TRANSLATE_BYPASS_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_translate_bypass(const char *n, uint16_t sid, uint64_t addr, bool is_write) {
+ (void)n;
+ (void)sid;
+ (void)addr;
+ (void)is_write;
+}
+#define TRACE_SMMUV3_TRANSLATE_DISABLE 0
+#define TRACE_SMMUV3_TRANSLATE_DISABLE_ENABLED 0
+#define TRACE_SMMUV3_TRANSLATE_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_translate_disable(const char *n, uint16_t sid, uint64_t addr, bool is_write) {
+ (void)n;
+ (void)sid;
+ (void)addr;
+ (void)is_write;
+}
+#define TRACE_SMMUV3_TRANSLATE_SUCCESS 0
+#define TRACE_SMMUV3_TRANSLATE_SUCCESS_ENABLED 0
+#define TRACE_SMMUV3_TRANSLATE_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_translate_success(const char *n, uint16_t sid, uint64_t iova, uint64_t translated, int perm, int stage) {
+ (void)n;
+ (void)sid;
+ (void)iova;
+ (void)translated;
+ (void)perm;
+ (void)stage;
+}
+#define TRACE_SMMUV3_TRIGGER_IRQ 0
+#define TRACE_SMMUV3_TRIGGER_IRQ_ENABLED 0
+#define TRACE_SMMUV3_TRIGGER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_trigger_irq(int irq) {
+ (void)irq;
+}
+#define TRACE_SMMUV3_UNHANDLED_CMD 0
+#define TRACE_SMMUV3_UNHANDLED_CMD_ENABLED 0
+#define TRACE_SMMUV3_UNHANDLED_CMD_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_unhandled_cmd(uint32_t type) {
+ (void)type;
+}
+#define TRACE_SMMUV3_WRITE_GERROR 0
+#define TRACE_SMMUV3_WRITE_GERROR_ENABLED 0
+#define TRACE_SMMUV3_WRITE_GERROR_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_write_gerror(uint32_t toggled, uint32_t gerror) {
+ (void)toggled;
+ (void)gerror;
+}
+#define TRACE_SMMUV3_WRITE_GERRORN 0
+#define TRACE_SMMUV3_WRITE_GERRORN_ENABLED 0
+#define TRACE_SMMUV3_WRITE_GERRORN_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_write_gerrorn(uint32_t acked, uint32_t gerrorn) {
+ (void)acked;
+ (void)gerrorn;
+}
+#define TRACE_SMMUV3_WRITE_MMIO 0
+#define TRACE_SMMUV3_WRITE_MMIO_ENABLED 0
+#define TRACE_SMMUV3_WRITE_MMIO_BACKEND_DSTATE() (0)
+static inline void trace_smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) {
+ (void)addr;
+ (void)val;
+ (void)size;
+ (void)r;
+}
+#define TRACE_STRONGARM_SSP_READ_UNDERRUN 0
+#define TRACE_STRONGARM_SSP_READ_UNDERRUN_ENABLED 0
+#define TRACE_STRONGARM_SSP_READ_UNDERRUN_BACKEND_DSTATE() (0)
+static inline void trace_strongarm_ssp_read_underrun(void) {
+}
+#define TRACE_STRONGARM_UART_UPDATE_PARAMETERS 0
+#define TRACE_STRONGARM_UART_UPDATE_PARAMETERS_ENABLED 0
+#define TRACE_STRONGARM_UART_UPDATE_PARAMETERS_BACKEND_DSTATE() (0)
+static inline void trace_strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) {
+ (void)label;
+ (void)speed;
+ (void)parity;
+ (void)data_bits;
+ (void)stop_bits;
+}
+#define TRACE_VIRT_ACPI_SETUP 0
+#define TRACE_VIRT_ACPI_SETUP_ENABLED 0
+#define TRACE_VIRT_ACPI_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_virt_acpi_setup(void) {
+}
+#define TRACE_Z2_AER915_EVENT 0
+#define TRACE_Z2_AER915_EVENT_ENABLED 0
+#define TRACE_Z2_AER915_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_z2_aer915_event(int8_t event, int8_t len) {
+ (void)event;
+ (void)len;
+}
+#define TRACE_Z2_AER915_SEND 0
+#define TRACE_Z2_AER915_SEND_ENABLED 0
+#define TRACE_Z2_AER915_SEND_BACKEND_DSTATE() (0)
+static inline void trace_z2_aer915_send(uint8_t reg, uint8_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_Z2_AER915_SEND_TOO_LONG 0
+#define TRACE_Z2_AER915_SEND_TOO_LONG_ENABLED 0
+#define TRACE_Z2_AER915_SEND_TOO_LONG_BACKEND_DSTATE() (0)
+static inline void trace_z2_aer915_send_too_long(int8_t msg) {
+ (void)msg;
+}
+#define TRACE_Z2_LCD_ENABLE_DISABLE_RESULT 0
+#define TRACE_Z2_LCD_ENABLE_DISABLE_RESULT_ENABLED 0
+#define TRACE_Z2_LCD_ENABLE_DISABLE_RESULT_BACKEND_DSTATE() (0)
+static inline void trace_z2_lcd_enable_disable_result(const char *result) {
+ (void)result;
+}
+#define TRACE_Z2_LCD_REG_UPDATE 0
+#define TRACE_Z2_LCD_REG_UPDATE_ENABLED 0
+#define TRACE_Z2_LCD_REG_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_z2_lcd_reg_update(uint8_t cur, uint8_t i_0, uint8_t i_1, uint8_t i_2, uint32_t value) {
+ (void)cur;
+ (void)i_0;
+ (void)i_1;
+ (void)i_2;
+ (void)value;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_audio.h b/trace/trace-hw_audio.h
new file mode 100644
index 0000000000..7e5909e9ed
--- /dev/null
+++ b/trace/trace-hw_audio.h
@@ -0,0 +1,369 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_AUDIO_H
+#define TRACE_TRACE_HW_AUDIO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ASC_FIFO_GET 0
+#define TRACE_ASC_FIFO_GET_ENABLED 0
+#define TRACE_ASC_FIFO_GET_BACKEND_DSTATE() (0)
+static inline void trace_asc_fifo_get(const char fifo, int rptr, int cnt, uint64_t value) {
+ (void)fifo;
+ (void)rptr;
+ (void)cnt;
+ (void)value;
+}
+#define TRACE_ASC_READ_EXTREG 0
+#define TRACE_ASC_READ_EXTREG_ENABLED 0
+#define TRACE_ASC_READ_EXTREG_BACKEND_DSTATE() (0)
+static inline void trace_asc_read_extreg(const char fifo, int reg, unsigned size, uint64_t value) {
+ (void)fifo;
+ (void)reg;
+ (void)size;
+ (void)value;
+}
+#define TRACE_ASC_READ_FIFO 0
+#define TRACE_ASC_READ_FIFO_ENABLED 0
+#define TRACE_ASC_READ_FIFO_BACKEND_DSTATE() (0)
+static inline void trace_asc_read_fifo(const char fifo, int reg, unsigned size, uint64_t value) {
+ (void)fifo;
+ (void)reg;
+ (void)size;
+ (void)value;
+}
+#define TRACE_ASC_READ_REG 0
+#define TRACE_ASC_READ_REG_ENABLED 0
+#define TRACE_ASC_READ_REG_BACKEND_DSTATE() (0)
+static inline void trace_asc_read_reg(int reg, unsigned size, uint64_t value) {
+ (void)reg;
+ (void)size;
+ (void)value;
+}
+#define TRACE_ASC_UPDATE_IRQ 0
+#define TRACE_ASC_UPDATE_IRQ_ENABLED 0
+#define TRACE_ASC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_asc_update_irq(int irq, int a, int b) {
+ (void)irq;
+ (void)a;
+ (void)b;
+}
+#define TRACE_ASC_WRITE_EXTREG 0
+#define TRACE_ASC_WRITE_EXTREG_ENABLED 0
+#define TRACE_ASC_WRITE_EXTREG_BACKEND_DSTATE() (0)
+static inline void trace_asc_write_extreg(const char fifo, int reg, unsigned size, uint64_t value) {
+ (void)fifo;
+ (void)reg;
+ (void)size;
+ (void)value;
+}
+#define TRACE_ASC_WRITE_FIFO 0
+#define TRACE_ASC_WRITE_FIFO_ENABLED 0
+#define TRACE_ASC_WRITE_FIFO_BACKEND_DSTATE() (0)
+static inline void trace_asc_write_fifo(const char fifo, int reg, unsigned size, int wrptr, int cnt, uint64_t value) {
+ (void)fifo;
+ (void)reg;
+ (void)size;
+ (void)wrptr;
+ (void)cnt;
+ (void)value;
+}
+#define TRACE_ASC_WRITE_REG 0
+#define TRACE_ASC_WRITE_REG_ENABLED 0
+#define TRACE_ASC_WRITE_REG_BACKEND_DSTATE() (0)
+static inline void trace_asc_write_reg(int reg, unsigned size, uint64_t value) {
+ (void)reg;
+ (void)size;
+ (void)value;
+}
+#define TRACE_CS4231_MEM_READL_DREG 0
+#define TRACE_CS4231_MEM_READL_DREG_ENABLED 0
+#define TRACE_CS4231_MEM_READL_DREG_BACKEND_DSTATE() (0)
+static inline void trace_cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) {
+ (void)reg;
+ (void)ret;
+}
+#define TRACE_CS4231_MEM_READL_REG 0
+#define TRACE_CS4231_MEM_READL_REG_ENABLED 0
+#define TRACE_CS4231_MEM_READL_REG_BACKEND_DSTATE() (0)
+static inline void trace_cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) {
+ (void)reg;
+ (void)ret;
+}
+#define TRACE_CS4231_MEM_WRITEL_DREG 0
+#define TRACE_CS4231_MEM_WRITEL_DREG_ENABLED 0
+#define TRACE_CS4231_MEM_WRITEL_DREG_BACKEND_DSTATE() (0)
+static inline void trace_cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) {
+ (void)reg;
+ (void)old;
+ (void)val;
+}
+#define TRACE_CS4231_MEM_WRITEL_REG 0
+#define TRACE_CS4231_MEM_WRITEL_REG_ENABLED 0
+#define TRACE_CS4231_MEM_WRITEL_REG_BACKEND_DSTATE() (0)
+static inline void trace_cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) {
+ (void)reg;
+ (void)old;
+ (void)val;
+}
+#define TRACE_ES1370_FRAME_ADDRESS_RD 0
+#define TRACE_ES1370_FRAME_ADDRESS_RD_ENABLED 0
+#define TRACE_ES1370_FRAME_ADDRESS_RD_BACKEND_DSTATE() (0)
+static inline void trace_es1370_frame_address_rd(int ch, uint32_t addr) {
+ (void)ch;
+ (void)addr;
+}
+#define TRACE_ES1370_FRAME_ADDRESS_WR 0
+#define TRACE_ES1370_FRAME_ADDRESS_WR_ENABLED 0
+#define TRACE_ES1370_FRAME_ADDRESS_WR_BACKEND_DSTATE() (0)
+static inline void trace_es1370_frame_address_wr(int ch, uint32_t addr) {
+ (void)ch;
+ (void)addr;
+}
+#define TRACE_ES1370_FRAME_COUNT_RD 0
+#define TRACE_ES1370_FRAME_COUNT_RD_ENABLED 0
+#define TRACE_ES1370_FRAME_COUNT_RD_BACKEND_DSTATE() (0)
+static inline void trace_es1370_frame_count_rd(int ch, uint32_t curr, uint32_t size) {
+ (void)ch;
+ (void)curr;
+ (void)size;
+}
+#define TRACE_ES1370_FRAME_COUNT_WR 0
+#define TRACE_ES1370_FRAME_COUNT_WR_ENABLED 0
+#define TRACE_ES1370_FRAME_COUNT_WR_BACKEND_DSTATE() (0)
+static inline void trace_es1370_frame_count_wr(int ch, uint32_t curr, uint32_t size) {
+ (void)ch;
+ (void)curr;
+ (void)size;
+}
+#define TRACE_ES1370_LOST_INTERRUPT 0
+#define TRACE_ES1370_LOST_INTERRUPT_ENABLED 0
+#define TRACE_ES1370_LOST_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_es1370_lost_interrupt(int ch) {
+ (void)ch;
+}
+#define TRACE_ES1370_SAMPLE_COUNT_RD 0
+#define TRACE_ES1370_SAMPLE_COUNT_RD_ENABLED 0
+#define TRACE_ES1370_SAMPLE_COUNT_RD_BACKEND_DSTATE() (0)
+static inline void trace_es1370_sample_count_rd(int ch, uint32_t curr, uint32_t num) {
+ (void)ch;
+ (void)curr;
+ (void)num;
+}
+#define TRACE_ES1370_SAMPLE_COUNT_WR 0
+#define TRACE_ES1370_SAMPLE_COUNT_WR_ENABLED 0
+#define TRACE_ES1370_SAMPLE_COUNT_WR_BACKEND_DSTATE() (0)
+static inline void trace_es1370_sample_count_wr(int ch, uint32_t curr, uint32_t num) {
+ (void)ch;
+ (void)curr;
+ (void)num;
+}
+#define TRACE_ES1370_STREAM_FORMAT 0
+#define TRACE_ES1370_STREAM_FORMAT_ENABLED 0
+#define TRACE_ES1370_STREAM_FORMAT_BACKEND_DSTATE() (0)
+static inline void trace_es1370_stream_format(int ch, uint32_t freq, const char *fmt, const char *mode, uint32_t shift) {
+ (void)ch;
+ (void)freq;
+ (void)fmt;
+ (void)mode;
+ (void)shift;
+}
+#define TRACE_ES1370_TRANSFER_AUDIO 0
+#define TRACE_ES1370_TRANSFER_AUDIO_ENABLED 0
+#define TRACE_ES1370_TRANSFER_AUDIO_BACKEND_DSTATE() (0)
+static inline void trace_es1370_transfer_audio(int ch, uint32_t f_curr, uint32_t f_size, uint32_t s_curr, uint32_t s_num, uint32_t leftover, bool irq) {
+ (void)ch;
+ (void)f_curr;
+ (void)f_size;
+ (void)s_curr;
+ (void)s_num;
+ (void)leftover;
+ (void)irq;
+}
+#define TRACE_HDA_AUDIO_ADJUST 0
+#define TRACE_HDA_AUDIO_ADJUST_ENABLED 0
+#define TRACE_HDA_AUDIO_ADJUST_BACKEND_DSTATE() (0)
+static inline void trace_hda_audio_adjust(const char *stream, int pos) {
+ (void)stream;
+ (void)pos;
+}
+#define TRACE_HDA_AUDIO_FORMAT 0
+#define TRACE_HDA_AUDIO_FORMAT_ENABLED 0
+#define TRACE_HDA_AUDIO_FORMAT_BACKEND_DSTATE() (0)
+static inline void trace_hda_audio_format(const char *stream, int chan, const char *fmt, int freq) {
+ (void)stream;
+ (void)chan;
+ (void)fmt;
+ (void)freq;
+}
+#define TRACE_HDA_AUDIO_OVERRUN 0
+#define TRACE_HDA_AUDIO_OVERRUN_ENABLED 0
+#define TRACE_HDA_AUDIO_OVERRUN_BACKEND_DSTATE() (0)
+static inline void trace_hda_audio_overrun(const char *stream) {
+ (void)stream;
+}
+#define TRACE_HDA_AUDIO_RUNNING 0
+#define TRACE_HDA_AUDIO_RUNNING_ENABLED 0
+#define TRACE_HDA_AUDIO_RUNNING_BACKEND_DSTATE() (0)
+static inline void trace_hda_audio_running(const char *stream, int nr, bool running) {
+ (void)stream;
+ (void)nr;
+ (void)running;
+}
+#define TRACE_PCSPK_IO_READ 0
+#define TRACE_PCSPK_IO_READ_ENABLED 0
+#define TRACE_PCSPK_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_pcspk_io_read(uint16_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PCSPK_IO_WRITE 0
+#define TRACE_PCSPK_IO_WRITE_ENABLED 0
+#define TRACE_PCSPK_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pcspk_io_write(uint16_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VIA_AC97_CODEC_WRITE 0
+#define TRACE_VIA_AC97_CODEC_WRITE_ENABLED 0
+#define TRACE_VIA_AC97_CODEC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via_ac97_codec_write(uint8_t addr, uint16_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VIA_AC97_SGD_FETCH 0
+#define TRACE_VIA_AC97_SGD_FETCH_ENABLED 0
+#define TRACE_VIA_AC97_SGD_FETCH_BACKEND_DSTATE() (0)
+static inline void trace_via_ac97_sgd_fetch(uint32_t curr, uint32_t addr, char stop, char eol, char flag, uint32_t len) {
+ (void)curr;
+ (void)addr;
+ (void)stop;
+ (void)eol;
+ (void)flag;
+ (void)len;
+}
+#define TRACE_VIA_AC97_SGD_READ 0
+#define TRACE_VIA_AC97_SGD_READ_ENABLED 0
+#define TRACE_VIA_AC97_SGD_READ_BACKEND_DSTATE() (0)
+static inline void trace_via_ac97_sgd_read(uint64_t addr, unsigned size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_VIA_AC97_SGD_WRITE 0
+#define TRACE_VIA_AC97_SGD_WRITE_ENABLED 0
+#define TRACE_VIA_AC97_SGD_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via_ac97_sgd_write(uint64_t addr, unsigned size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_VIRTIO_SND_GET_CONFIG 0
+#define TRACE_VIRTIO_SND_GET_CONFIG_ENABLED 0
+#define TRACE_VIRTIO_SND_GET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_get_config(void *vdev, uint32_t jacks, uint32_t streams, uint32_t chmaps) {
+ (void)vdev;
+ (void)jacks;
+ (void)streams;
+ (void)chmaps;
+}
+#define TRACE_VIRTIO_SND_GET_FEATURES 0
+#define TRACE_VIRTIO_SND_GET_FEATURES_ENABLED 0
+#define TRACE_VIRTIO_SND_GET_FEATURES_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_get_features(void *vdev, uint64_t features) {
+ (void)vdev;
+ (void)features;
+}
+#define TRACE_VIRTIO_SND_HANDLE_CHMAP_INFO 0
+#define TRACE_VIRTIO_SND_HANDLE_CHMAP_INFO_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_CHMAP_INFO_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_chmap_info(void) {
+}
+#define TRACE_VIRTIO_SND_HANDLE_CODE 0
+#define TRACE_VIRTIO_SND_HANDLE_CODE_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_CODE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_code(uint32_t val, const char *code) {
+ (void)val;
+ (void)code;
+}
+#define TRACE_VIRTIO_SND_HANDLE_CTRL 0
+#define TRACE_VIRTIO_SND_HANDLE_CTRL_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_CTRL_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_ctrl(void *vdev, void *vq) {
+ (void)vdev;
+ (void)vq;
+}
+#define TRACE_VIRTIO_SND_HANDLE_EVENT 0
+#define TRACE_VIRTIO_SND_HANDLE_EVENT_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_event(void) {
+}
+#define TRACE_VIRTIO_SND_HANDLE_PCM_INFO 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_INFO_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_INFO_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_pcm_info(uint32_t stream) {
+ (void)stream;
+}
+#define TRACE_VIRTIO_SND_HANDLE_PCM_RELEASE 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_RELEASE_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_RELEASE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_pcm_release(uint32_t stream) {
+ (void)stream;
+}
+#define TRACE_VIRTIO_SND_HANDLE_PCM_SET_PARAMS 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_SET_PARAMS_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_SET_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_pcm_set_params(uint32_t stream) {
+ (void)stream;
+}
+#define TRACE_VIRTIO_SND_HANDLE_PCM_START_STOP 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_START_STOP_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_PCM_START_STOP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_pcm_start_stop(const char *code, uint32_t stream) {
+ (void)code;
+ (void)stream;
+}
+#define TRACE_VIRTIO_SND_HANDLE_RX_XFER 0
+#define TRACE_VIRTIO_SND_HANDLE_RX_XFER_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_RX_XFER_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_rx_xfer(void) {
+}
+#define TRACE_VIRTIO_SND_HANDLE_TX_XFER 0
+#define TRACE_VIRTIO_SND_HANDLE_TX_XFER_ENABLED 0
+#define TRACE_VIRTIO_SND_HANDLE_TX_XFER_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_handle_tx_xfer(void) {
+}
+#define TRACE_VIRTIO_SND_PCM_STREAM_FLUSH 0
+#define TRACE_VIRTIO_SND_PCM_STREAM_FLUSH_ENABLED 0
+#define TRACE_VIRTIO_SND_PCM_STREAM_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_pcm_stream_flush(uint32_t stream) {
+ (void)stream;
+}
+#define TRACE_VIRTIO_SND_REALIZE 0
+#define TRACE_VIRTIO_SND_REALIZE_ENABLED 0
+#define TRACE_VIRTIO_SND_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_realize(void *snd) {
+ (void)snd;
+}
+#define TRACE_VIRTIO_SND_UNREALIZE 0
+#define TRACE_VIRTIO_SND_UNREALIZE_ENABLED 0
+#define TRACE_VIRTIO_SND_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_unrealize(void *snd) {
+ (void)snd;
+}
+#define TRACE_VIRTIO_SND_VM_STATE_RUNNING 0
+#define TRACE_VIRTIO_SND_VM_STATE_RUNNING_ENABLED 0
+#define TRACE_VIRTIO_SND_VM_STATE_RUNNING_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_vm_state_running(void) {
+}
+#define TRACE_VIRTIO_SND_VM_STATE_STOPPED 0
+#define TRACE_VIRTIO_SND_VM_STATE_STOPPED_ENABLED 0
+#define TRACE_VIRTIO_SND_VM_STATE_STOPPED_BACKEND_DSTATE() (0)
+static inline void trace_virtio_snd_vm_state_stopped(void) {
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_block.h b/trace/trace-hw_block.h
new file mode 100644
index 0000000000..23106fd3eb
--- /dev/null
+++ b/trace/trace-hw_block.h
@@ -0,0 +1,662 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_BLOCK_H
+#define TRACE_TRACE_HW_BLOCK_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_FDC_IOPORT_READ 0
+#define TRACE_FDC_IOPORT_READ_ENABLED 0
+#define TRACE_FDC_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_fdc_ioport_read(uint8_t reg, uint8_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_FDC_IOPORT_WRITE 0
+#define TRACE_FDC_IOPORT_WRITE_ENABLED 0
+#define TRACE_FDC_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_fdc_ioport_write(uint8_t reg, uint8_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_FDCTRL_TC_PULSE 0
+#define TRACE_FDCTRL_TC_PULSE_ENABLED 0
+#define TRACE_FDCTRL_TC_PULSE_BACKEND_DSTATE() (0)
+static inline void trace_fdctrl_tc_pulse(int level) {
+ (void)level;
+}
+#define TRACE_HD_GEOMETRY_GUESS 0
+#define TRACE_HD_GEOMETRY_GUESS_ENABLED 0
+#define TRACE_HD_GEOMETRY_GUESS_BACKEND_DSTATE() (0)
+static inline void trace_hd_geometry_guess(void *blk, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) {
+ (void)blk;
+ (void)cyls;
+ (void)heads;
+ (void)secs;
+ (void)trans;
+}
+#define TRACE_HD_GEOMETRY_LCHS_GUESS 0
+#define TRACE_HD_GEOMETRY_LCHS_GUESS_ENABLED 0
+#define TRACE_HD_GEOMETRY_LCHS_GUESS_BACKEND_DSTATE() (0)
+static inline void trace_hd_geometry_lchs_guess(void *blk, int cyls, int heads, int secs) {
+ (void)blk;
+ (void)cyls;
+ (void)heads;
+ (void)secs;
+}
+#define TRACE_M25P80_BINDING 0
+#define TRACE_M25P80_BINDING_ENABLED 0
+#define TRACE_M25P80_BINDING_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_binding(void *s) {
+ (void)s;
+}
+#define TRACE_M25P80_BINDING_NO_BDRV 0
+#define TRACE_M25P80_BINDING_NO_BDRV_ENABLED 0
+#define TRACE_M25P80_BINDING_NO_BDRV_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_binding_no_bdrv(void *s) {
+ (void)s;
+}
+#define TRACE_M25P80_CHIP_ERASE 0
+#define TRACE_M25P80_CHIP_ERASE_ENABLED 0
+#define TRACE_M25P80_CHIP_ERASE_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_chip_erase(void *s) {
+ (void)s;
+}
+#define TRACE_M25P80_COMMAND_DECODED 0
+#define TRACE_M25P80_COMMAND_DECODED_ENABLED 0
+#define TRACE_M25P80_COMMAND_DECODED_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_command_decoded(void *s, uint32_t cmd) {
+ (void)s;
+ (void)cmd;
+}
+#define TRACE_M25P80_COMPLETE_COLLECTING 0
+#define TRACE_M25P80_COMPLETE_COLLECTING_ENABLED 0
+#define TRACE_M25P80_COMPLETE_COLLECTING_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_complete_collecting(void *s, uint32_t cmd, int n, uint8_t ear, uint32_t cur_addr) {
+ (void)s;
+ (void)cmd;
+ (void)n;
+ (void)ear;
+ (void)cur_addr;
+}
+#define TRACE_M25P80_FLASH_ERASE 0
+#define TRACE_M25P80_FLASH_ERASE_ENABLED 0
+#define TRACE_M25P80_FLASH_ERASE_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_flash_erase(void *s, int offset, uint32_t len) {
+ (void)s;
+ (void)offset;
+ (void)len;
+}
+#define TRACE_M25P80_PAGE_PROGRAM 0
+#define TRACE_M25P80_PAGE_PROGRAM_ENABLED 0
+#define TRACE_M25P80_PAGE_PROGRAM_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_page_program(void *s, uint32_t addr, uint8_t tx) {
+ (void)s;
+ (void)addr;
+ (void)tx;
+}
+#define TRACE_M25P80_POPULATED_JEDEC 0
+#define TRACE_M25P80_POPULATED_JEDEC_ENABLED 0
+#define TRACE_M25P80_POPULATED_JEDEC_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_populated_jedec(void *s) {
+ (void)s;
+}
+#define TRACE_M25P80_PROGRAMMING_ZERO_TO_ONE 0
+#define TRACE_M25P80_PROGRAMMING_ZERO_TO_ONE_ENABLED 0
+#define TRACE_M25P80_PROGRAMMING_ZERO_TO_ONE_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_programming_zero_to_one(void *s, uint32_t addr, uint8_t prev, uint8_t data) {
+ (void)s;
+ (void)addr;
+ (void)prev;
+ (void)data;
+}
+#define TRACE_M25P80_READ_BYTE 0
+#define TRACE_M25P80_READ_BYTE_ENABLED 0
+#define TRACE_M25P80_READ_BYTE_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_read_byte(void *s, uint32_t addr, uint8_t v) {
+ (void)s;
+ (void)addr;
+ (void)v;
+}
+#define TRACE_M25P80_READ_DATA 0
+#define TRACE_M25P80_READ_DATA_ENABLED 0
+#define TRACE_M25P80_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_read_data(void *s, uint32_t pos, uint8_t v) {
+ (void)s;
+ (void)pos;
+ (void)v;
+}
+#define TRACE_M25P80_READ_SFDP 0
+#define TRACE_M25P80_READ_SFDP_ENABLED 0
+#define TRACE_M25P80_READ_SFDP_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_read_sfdp(void *s, uint32_t addr, uint8_t v) {
+ (void)s;
+ (void)addr;
+ (void)v;
+}
+#define TRACE_M25P80_RESET_DONE 0
+#define TRACE_M25P80_RESET_DONE_ENABLED 0
+#define TRACE_M25P80_RESET_DONE_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_reset_done(void *s) {
+ (void)s;
+}
+#define TRACE_M25P80_SELECT 0
+#define TRACE_M25P80_SELECT_ENABLED 0
+#define TRACE_M25P80_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_select(void *s, const char *what) {
+ (void)s;
+ (void)what;
+}
+#define TRACE_M25P80_TRANSFER 0
+#define TRACE_M25P80_TRANSFER_ENABLED 0
+#define TRACE_M25P80_TRANSFER_BACKEND_DSTATE() (0)
+static inline void trace_m25p80_transfer(void *s, uint8_t state, uint32_t len, uint8_t needed, uint32_t pos, uint32_t cur_addr, uint8_t t) {
+ (void)s;
+ (void)state;
+ (void)len;
+ (void)needed;
+ (void)pos;
+ (void)cur_addr;
+ (void)t;
+}
+#define TRACE_PFLASH_CHIP_ERASE_INVALID 0
+#define TRACE_PFLASH_CHIP_ERASE_INVALID_ENABLED 0
+#define TRACE_PFLASH_CHIP_ERASE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_pflash_chip_erase_invalid(const char *name, uint64_t offset) {
+ (void)name;
+ (void)offset;
+}
+#define TRACE_PFLASH_CHIP_ERASE_START 0
+#define TRACE_PFLASH_CHIP_ERASE_START_ENABLED 0
+#define TRACE_PFLASH_CHIP_ERASE_START_BACKEND_DSTATE() (0)
+static inline void trace_pflash_chip_erase_start(const char *name) {
+ (void)name;
+}
+#define TRACE_PFLASH_DATA_READ 0
+#define TRACE_PFLASH_DATA_READ_ENABLED 0
+#define TRACE_PFLASH_DATA_READ_BACKEND_DSTATE() (0)
+static inline void trace_pflash_data_read(const char *name, uint64_t offset, unsigned size, uint32_t value) {
+ (void)name;
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_PFLASH_DATA_WRITE 0
+#define TRACE_PFLASH_DATA_WRITE_ENABLED 0
+#define TRACE_PFLASH_DATA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_data_write(const char *name, uint64_t offset, unsigned size, uint32_t value) {
+ (void)name;
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_PFLASH_DATA_WRITE_BLOCK 0
+#define TRACE_PFLASH_DATA_WRITE_BLOCK_ENABLED 0
+#define TRACE_PFLASH_DATA_WRITE_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_pflash_data_write_block(const char *name, uint64_t offset, unsigned size, uint32_t value, uint64_t counter) {
+ (void)name;
+ (void)offset;
+ (void)size;
+ (void)value;
+ (void)counter;
+}
+#define TRACE_PFLASH_DEVICE_ID 0
+#define TRACE_PFLASH_DEVICE_ID_ENABLED 0
+#define TRACE_PFLASH_DEVICE_ID_BACKEND_DSTATE() (0)
+static inline void trace_pflash_device_id(const char *name, uint16_t id) {
+ (void)name;
+ (void)id;
+}
+#define TRACE_PFLASH_DEVICE_INFO 0
+#define TRACE_PFLASH_DEVICE_INFO_ENABLED 0
+#define TRACE_PFLASH_DEVICE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_pflash_device_info(const char *name, uint64_t offset) {
+ (void)name;
+ (void)offset;
+}
+#define TRACE_PFLASH_ERASE_COMPLETE 0
+#define TRACE_PFLASH_ERASE_COMPLETE_ENABLED 0
+#define TRACE_PFLASH_ERASE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_erase_complete(const char *name) {
+ (void)name;
+}
+#define TRACE_PFLASH_ERASE_TIMEOUT 0
+#define TRACE_PFLASH_ERASE_TIMEOUT_ENABLED 0
+#define TRACE_PFLASH_ERASE_TIMEOUT_BACKEND_DSTATE() (0)
+static inline void trace_pflash_erase_timeout(const char *name, int count) {
+ (void)name;
+ (void)count;
+}
+#define TRACE_PFLASH_IO_READ 0
+#define TRACE_PFLASH_IO_READ_ENABLED 0
+#define TRACE_PFLASH_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_pflash_io_read(const char *name, uint64_t offset, unsigned int size, uint32_t value, uint8_t cmd, uint8_t wcycle) {
+ (void)name;
+ (void)offset;
+ (void)size;
+ (void)value;
+ (void)cmd;
+ (void)wcycle;
+}
+#define TRACE_PFLASH_IO_WRITE 0
+#define TRACE_PFLASH_IO_WRITE_ENABLED 0
+#define TRACE_PFLASH_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_io_write(const char *name, uint64_t offset, unsigned int size, uint32_t value, uint8_t wcycle) {
+ (void)name;
+ (void)offset;
+ (void)size;
+ (void)value;
+ (void)wcycle;
+}
+#define TRACE_PFLASH_MANUFACTURER_ID 0
+#define TRACE_PFLASH_MANUFACTURER_ID_ENABLED 0
+#define TRACE_PFLASH_MANUFACTURER_ID_BACKEND_DSTATE() (0)
+static inline void trace_pflash_manufacturer_id(const char *name, uint16_t id) {
+ (void)name;
+ (void)id;
+}
+#define TRACE_PFLASH_MODE_READ_ARRAY 0
+#define TRACE_PFLASH_MODE_READ_ARRAY_ENABLED 0
+#define TRACE_PFLASH_MODE_READ_ARRAY_BACKEND_DSTATE() (0)
+static inline void trace_pflash_mode_read_array(const char *name) {
+ (void)name;
+}
+#define TRACE_PFLASH_POSTLOAD_CB 0
+#define TRACE_PFLASH_POSTLOAD_CB_ENABLED 0
+#define TRACE_PFLASH_POSTLOAD_CB_BACKEND_DSTATE() (0)
+static inline void trace_pflash_postload_cb(const char *name) {
+ (void)name;
+}
+#define TRACE_PFLASH_READ_DONE 0
+#define TRACE_PFLASH_READ_DONE_ENABLED 0
+#define TRACE_PFLASH_READ_DONE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_read_done(const char *name, uint64_t offset, uint64_t ret) {
+ (void)name;
+ (void)offset;
+ (void)ret;
+}
+#define TRACE_PFLASH_READ_STATUS 0
+#define TRACE_PFLASH_READ_STATUS_ENABLED 0
+#define TRACE_PFLASH_READ_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_pflash_read_status(const char *name, uint32_t ret) {
+ (void)name;
+ (void)ret;
+}
+#define TRACE_PFLASH_READ_UNKNOWN_STATE 0
+#define TRACE_PFLASH_READ_UNKNOWN_STATE_ENABLED 0
+#define TRACE_PFLASH_READ_UNKNOWN_STATE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_read_unknown_state(const char *name, uint8_t cmd) {
+ (void)name;
+ (void)cmd;
+}
+#define TRACE_PFLASH_RESET 0
+#define TRACE_PFLASH_RESET_ENABLED 0
+#define TRACE_PFLASH_RESET_BACKEND_DSTATE() (0)
+static inline void trace_pflash_reset(const char *name) {
+ (void)name;
+}
+#define TRACE_PFLASH_SECTOR_ERASE_START 0
+#define TRACE_PFLASH_SECTOR_ERASE_START_ENABLED 0
+#define TRACE_PFLASH_SECTOR_ERASE_START_BACKEND_DSTATE() (0)
+static inline void trace_pflash_sector_erase_start(const char *name, int width1, uint64_t start, int width2, uint64_t end) {
+ (void)name;
+ (void)width1;
+ (void)start;
+ (void)width2;
+ (void)end;
+}
+#define TRACE_PFLASH_TIMER_EXPIRED 0
+#define TRACE_PFLASH_TIMER_EXPIRED_ENABLED 0
+#define TRACE_PFLASH_TIMER_EXPIRED_BACKEND_DSTATE() (0)
+static inline void trace_pflash_timer_expired(const char *name, uint8_t cmd) {
+ (void)name;
+ (void)cmd;
+}
+#define TRACE_PFLASH_UNLOCK0_FAILED 0
+#define TRACE_PFLASH_UNLOCK0_FAILED_ENABLED 0
+#define TRACE_PFLASH_UNLOCK0_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_pflash_unlock0_failed(const char *name, uint64_t offset, uint8_t cmd, uint16_t addr0) {
+ (void)name;
+ (void)offset;
+ (void)cmd;
+ (void)addr0;
+}
+#define TRACE_PFLASH_UNLOCK1_FAILED 0
+#define TRACE_PFLASH_UNLOCK1_FAILED_ENABLED 0
+#define TRACE_PFLASH_UNLOCK1_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_pflash_unlock1_failed(const char *name, uint64_t offset, uint8_t cmd) {
+ (void)name;
+ (void)offset;
+ (void)cmd;
+}
+#define TRACE_PFLASH_UNSUPPORTED_DEVICE_CONFIGURATION 0
+#define TRACE_PFLASH_UNSUPPORTED_DEVICE_CONFIGURATION_ENABLED 0
+#define TRACE_PFLASH_UNSUPPORTED_DEVICE_CONFIGURATION_BACKEND_DSTATE() (0)
+static inline void trace_pflash_unsupported_device_configuration(const char *name, uint8_t width, uint8_t max) {
+ (void)name;
+ (void)width;
+ (void)max;
+}
+#define TRACE_PFLASH_WRITE 0
+#define TRACE_PFLASH_WRITE_ENABLED 0
+#define TRACE_PFLASH_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write(const char *name, const char *str) {
+ (void)name;
+ (void)str;
+}
+#define TRACE_PFLASH_WRITE_BLOCK_ABORT 0
+#define TRACE_PFLASH_WRITE_BLOCK_ABORT_ENABLED 0
+#define TRACE_PFLASH_WRITE_BLOCK_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_block_abort(const char *name) {
+ (void)name;
+}
+#define TRACE_PFLASH_WRITE_BLOCK_ERASE 0
+#define TRACE_PFLASH_WRITE_BLOCK_ERASE_ENABLED 0
+#define TRACE_PFLASH_WRITE_BLOCK_ERASE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_block_erase(const char *name, uint64_t offset, uint64_t len) {
+ (void)name;
+ (void)offset;
+ (void)len;
+}
+#define TRACE_PFLASH_WRITE_BLOCK_FLUSH 0
+#define TRACE_PFLASH_WRITE_BLOCK_FLUSH_ENABLED 0
+#define TRACE_PFLASH_WRITE_BLOCK_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_block_flush(const char *name) {
+ (void)name;
+}
+#define TRACE_PFLASH_WRITE_BLOCK_START 0
+#define TRACE_PFLASH_WRITE_BLOCK_START_ENABLED 0
+#define TRACE_PFLASH_WRITE_BLOCK_START_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_block_start(const char *name, uint32_t value) {
+ (void)name;
+ (void)value;
+}
+#define TRACE_PFLASH_WRITE_FAILED 0
+#define TRACE_PFLASH_WRITE_FAILED_ENABLED 0
+#define TRACE_PFLASH_WRITE_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_failed(const char *name, uint64_t offset, uint8_t cmd) {
+ (void)name;
+ (void)offset;
+ (void)cmd;
+}
+#define TRACE_PFLASH_WRITE_INVALID 0
+#define TRACE_PFLASH_WRITE_INVALID_ENABLED 0
+#define TRACE_PFLASH_WRITE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_invalid(const char *name, uint8_t cmd) {
+ (void)name;
+ (void)cmd;
+}
+#define TRACE_PFLASH_WRITE_INVALID_COMMAND 0
+#define TRACE_PFLASH_WRITE_INVALID_COMMAND_ENABLED 0
+#define TRACE_PFLASH_WRITE_INVALID_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_invalid_command(const char *name, uint8_t cmd) {
+ (void)name;
+ (void)cmd;
+}
+#define TRACE_PFLASH_WRITE_INVALID_STATE 0
+#define TRACE_PFLASH_WRITE_INVALID_STATE_ENABLED 0
+#define TRACE_PFLASH_WRITE_INVALID_STATE_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_invalid_state(const char *name, uint8_t cmd, int wc) {
+ (void)name;
+ (void)cmd;
+ (void)wc;
+}
+#define TRACE_PFLASH_WRITE_START 0
+#define TRACE_PFLASH_WRITE_START_ENABLED 0
+#define TRACE_PFLASH_WRITE_START_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_start(const char *name, uint8_t cmd) {
+ (void)name;
+ (void)cmd;
+}
+#define TRACE_PFLASH_WRITE_UNKNOWN 0
+#define TRACE_PFLASH_WRITE_UNKNOWN_ENABLED 0
+#define TRACE_PFLASH_WRITE_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_pflash_write_unknown(const char *name, uint8_t cmd) {
+ (void)name;
+ (void)cmd;
+}
+#define TRACE_SWIM_ISMCTRL_READ 0
+#define TRACE_SWIM_ISMCTRL_READ_ENABLED 0
+#define TRACE_SWIM_ISMCTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_swim_ismctrl_read(int reg, const char *name, unsigned size, uint64_t value) {
+ (void)reg;
+ (void)name;
+ (void)size;
+ (void)value;
+}
+#define TRACE_SWIM_ISMCTRL_WRITE 0
+#define TRACE_SWIM_ISMCTRL_WRITE_ENABLED 0
+#define TRACE_SWIM_ISMCTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_swim_ismctrl_write(int reg, const char *name, unsigned size, uint64_t value) {
+ (void)reg;
+ (void)name;
+ (void)size;
+ (void)value;
+}
+#define TRACE_SWIM_IWMCTRL_READ 0
+#define TRACE_SWIM_IWMCTRL_READ_ENABLED 0
+#define TRACE_SWIM_IWMCTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_swim_iwmctrl_read(int reg, const char *name, unsigned size, uint64_t value) {
+ (void)reg;
+ (void)name;
+ (void)size;
+ (void)value;
+}
+#define TRACE_SWIM_IWMCTRL_WRITE 0
+#define TRACE_SWIM_IWMCTRL_WRITE_ENABLED 0
+#define TRACE_SWIM_IWMCTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_swim_iwmctrl_write(int reg, const char *name, unsigned size, uint64_t value) {
+ (void)reg;
+ (void)name;
+ (void)size;
+ (void)value;
+}
+#define TRACE_SWIM_SWITCH_TO_ISM 0
+#define TRACE_SWIM_SWITCH_TO_ISM_ENABLED 0
+#define TRACE_SWIM_SWITCH_TO_ISM_BACKEND_DSTATE() (0)
+static inline void trace_swim_switch_to_ism(void) {
+}
+#define TRACE_SWIM_SWITCH_TO_IWM 0
+#define TRACE_SWIM_SWITCH_TO_IWM_ENABLED 0
+#define TRACE_SWIM_SWITCH_TO_IWM_BACKEND_DSTATE() (0)
+static inline void trace_swim_switch_to_iwm(void) {
+}
+#define TRACE_VIRTIO_BLK_HANDLE_READ 0
+#define TRACE_VIRTIO_BLK_HANDLE_READ_ENABLED 0
+#define TRACE_VIRTIO_BLK_HANDLE_READ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_handle_read(void *vdev, void *req, uint64_t sector, size_t nsectors) {
+ (void)vdev;
+ (void)req;
+ (void)sector;
+ (void)nsectors;
+}
+#define TRACE_VIRTIO_BLK_HANDLE_WRITE 0
+#define TRACE_VIRTIO_BLK_HANDLE_WRITE_ENABLED 0
+#define TRACE_VIRTIO_BLK_HANDLE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_handle_write(void *vdev, void *req, uint64_t sector, size_t nsectors) {
+ (void)vdev;
+ (void)req;
+ (void)sector;
+ (void)nsectors;
+}
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_APPEND 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_APPEND_ENABLED 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_APPEND_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_handle_zone_append(void *vdev, void *req, int64_t sector) {
+ (void)vdev;
+ (void)req;
+ (void)sector;
+}
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_MGMT 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_MGMT_ENABLED 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_MGMT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_handle_zone_mgmt(void *vdev, void *req, uint8_t op, int64_t sector, int64_t len) {
+ (void)vdev;
+ (void)req;
+ (void)op;
+ (void)sector;
+ (void)len;
+}
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_REPORT 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_REPORT_ENABLED 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_REPORT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_handle_zone_report(void *vdev, void *req, int64_t sector, unsigned int nr_zones) {
+ (void)vdev;
+ (void)req;
+ (void)sector;
+ (void)nr_zones;
+}
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_RESET_ALL 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_RESET_ALL_ENABLED 0
+#define TRACE_VIRTIO_BLK_HANDLE_ZONE_RESET_ALL_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_handle_zone_reset_all(void *vdev, void *req, int64_t sector, int64_t len) {
+ (void)vdev;
+ (void)req;
+ (void)sector;
+ (void)len;
+}
+#define TRACE_VIRTIO_BLK_REQ_COMPLETE 0
+#define TRACE_VIRTIO_BLK_REQ_COMPLETE_ENABLED 0
+#define TRACE_VIRTIO_BLK_REQ_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_req_complete(void *vdev, void *req, int status) {
+ (void)vdev;
+ (void)req;
+ (void)status;
+}
+#define TRACE_VIRTIO_BLK_RW_COMPLETE 0
+#define TRACE_VIRTIO_BLK_RW_COMPLETE_ENABLED 0
+#define TRACE_VIRTIO_BLK_RW_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_rw_complete(void *vdev, void *req, int ret) {
+ (void)vdev;
+ (void)req;
+ (void)ret;
+}
+#define TRACE_VIRTIO_BLK_SUBMIT_MULTIREQ 0
+#define TRACE_VIRTIO_BLK_SUBMIT_MULTIREQ_ENABLED 0
+#define TRACE_VIRTIO_BLK_SUBMIT_MULTIREQ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_submit_multireq(void *vdev, void *mrb, int start, int num_reqs, uint64_t offset, size_t size, bool is_write) {
+ (void)vdev;
+ (void)mrb;
+ (void)start;
+ (void)num_reqs;
+ (void)offset;
+ (void)size;
+ (void)is_write;
+}
+#define TRACE_VIRTIO_BLK_ZONE_APPEND_COMPLETE 0
+#define TRACE_VIRTIO_BLK_ZONE_APPEND_COMPLETE_ENABLED 0
+#define TRACE_VIRTIO_BLK_ZONE_APPEND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_zone_append_complete(void *vdev, void *req, int64_t sector, int ret) {
+ (void)vdev;
+ (void)req;
+ (void)sector;
+ (void)ret;
+}
+#define TRACE_VIRTIO_BLK_ZONE_MGMT_COMPLETE 0
+#define TRACE_VIRTIO_BLK_ZONE_MGMT_COMPLETE_ENABLED 0
+#define TRACE_VIRTIO_BLK_ZONE_MGMT_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_zone_mgmt_complete(void *vdev, void *req, int ret) {
+ (void)vdev;
+ (void)req;
+ (void)ret;
+}
+#define TRACE_VIRTIO_BLK_ZONE_REPORT_COMPLETE 0
+#define TRACE_VIRTIO_BLK_ZONE_REPORT_COMPLETE_ENABLED 0
+#define TRACE_VIRTIO_BLK_ZONE_REPORT_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_blk_zone_report_complete(void *vdev, void *req, unsigned int nr_zones, int ret) {
+ (void)vdev;
+ (void)req;
+ (void)nr_zones;
+ (void)ret;
+}
+#define TRACE_XEN_BLOCK_BLOCKDEV_ADD 0
+#define TRACE_XEN_BLOCK_BLOCKDEV_ADD_ENABLED 0
+#define TRACE_XEN_BLOCK_BLOCKDEV_ADD_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_blockdev_add(char *str) {
+ (void)str;
+}
+#define TRACE_XEN_BLOCK_BLOCKDEV_DEL 0
+#define TRACE_XEN_BLOCK_BLOCKDEV_DEL_ENABLED 0
+#define TRACE_XEN_BLOCK_BLOCKDEV_DEL_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_blockdev_del(const char *node_name) {
+ (void)node_name;
+}
+#define TRACE_XEN_BLOCK_CONNECT 0
+#define TRACE_XEN_BLOCK_CONNECT_ENABLED 0
+#define TRACE_XEN_BLOCK_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_connect(const char *type, uint32_t disk, uint32_t partition) {
+ (void)type;
+ (void)disk;
+ (void)partition;
+}
+#define TRACE_XEN_BLOCK_DEVICE_CREATE 0
+#define TRACE_XEN_BLOCK_DEVICE_CREATE_ENABLED 0
+#define TRACE_XEN_BLOCK_DEVICE_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_device_create(unsigned int number) {
+ (void)number;
+}
+#define TRACE_XEN_BLOCK_DEVICE_DESTROY 0
+#define TRACE_XEN_BLOCK_DEVICE_DESTROY_ENABLED 0
+#define TRACE_XEN_BLOCK_DEVICE_DESTROY_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_device_destroy(unsigned int number) {
+ (void)number;
+}
+#define TRACE_XEN_BLOCK_DISCONNECT 0
+#define TRACE_XEN_BLOCK_DISCONNECT_ENABLED 0
+#define TRACE_XEN_BLOCK_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_disconnect(const char *type, uint32_t disk, uint32_t partition) {
+ (void)type;
+ (void)disk;
+ (void)partition;
+}
+#define TRACE_XEN_BLOCK_REALIZE 0
+#define TRACE_XEN_BLOCK_REALIZE_ENABLED 0
+#define TRACE_XEN_BLOCK_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_realize(const char *type, uint32_t disk, uint32_t partition) {
+ (void)type;
+ (void)disk;
+ (void)partition;
+}
+#define TRACE_XEN_BLOCK_SIZE 0
+#define TRACE_XEN_BLOCK_SIZE_ENABLED 0
+#define TRACE_XEN_BLOCK_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_size(const char *type, uint32_t disk, uint32_t partition, int64_t sectors) {
+ (void)type;
+ (void)disk;
+ (void)partition;
+ (void)sectors;
+}
+#define TRACE_XEN_BLOCK_UNREALIZE 0
+#define TRACE_XEN_BLOCK_UNREALIZE_ENABLED 0
+#define TRACE_XEN_BLOCK_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_block_unrealize(const char *type, uint32_t disk, uint32_t partition) {
+ (void)type;
+ (void)disk;
+ (void)partition;
+}
+#define TRACE_XEN_CDROM_REALIZE 0
+#define TRACE_XEN_CDROM_REALIZE_ENABLED 0
+#define TRACE_XEN_CDROM_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_cdrom_realize(void) {
+}
+#define TRACE_XEN_CDROM_UNREALIZE 0
+#define TRACE_XEN_CDROM_UNREALIZE_ENABLED 0
+#define TRACE_XEN_CDROM_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_cdrom_unrealize(void) {
+}
+#define TRACE_XEN_DISK_REALIZE 0
+#define TRACE_XEN_DISK_REALIZE_ENABLED 0
+#define TRACE_XEN_DISK_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_disk_realize(void) {
+}
+#define TRACE_XEN_DISK_UNREALIZE 0
+#define TRACE_XEN_DISK_UNREALIZE_ENABLED 0
+#define TRACE_XEN_DISK_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_disk_unrealize(void) {
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_char.h b/trace/trace-hw_char.h
new file mode 100644
index 0000000000..1094ea94c6
--- /dev/null
+++ b/trace/trace-hw_char.h
@@ -0,0 +1,754 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_CHAR_H
+#define TRACE_TRACE_HW_CHAR_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CADENCE_UART_BAUDRATE 0
+#define TRACE_CADENCE_UART_BAUDRATE_ENABLED 0
+#define TRACE_CADENCE_UART_BAUDRATE_BACKEND_DSTATE() (0)
+static inline void trace_cadence_uart_baudrate(unsigned baudrate) {
+ (void)baudrate;
+}
+#define TRACE_CMSDK_APB_UART_READ 0
+#define TRACE_CMSDK_APB_UART_READ_ENABLED 0
+#define TRACE_CMSDK_APB_UART_READ_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_CMSDK_APB_UART_RECEIVE 0
+#define TRACE_CMSDK_APB_UART_RECEIVE_ENABLED 0
+#define TRACE_CMSDK_APB_UART_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_uart_receive(uint8_t c) {
+ (void)c;
+}
+#define TRACE_CMSDK_APB_UART_RESET 0
+#define TRACE_CMSDK_APB_UART_RESET_ENABLED 0
+#define TRACE_CMSDK_APB_UART_RESET_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_uart_reset(void) {
+}
+#define TRACE_CMSDK_APB_UART_SET_PARAMS 0
+#define TRACE_CMSDK_APB_UART_SET_PARAMS_ENABLED 0
+#define TRACE_CMSDK_APB_UART_SET_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_uart_set_params(int speed) {
+ (void)speed;
+}
+#define TRACE_CMSDK_APB_UART_TX 0
+#define TRACE_CMSDK_APB_UART_TX_ENABLED 0
+#define TRACE_CMSDK_APB_UART_TX_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_uart_tx(uint8_t c) {
+ (void)c;
+}
+#define TRACE_CMSDK_APB_UART_TX_PENDING 0
+#define TRACE_CMSDK_APB_UART_TX_PENDING_ENABLED 0
+#define TRACE_CMSDK_APB_UART_TX_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_uart_tx_pending(void) {
+}
+#define TRACE_CMSDK_APB_UART_WRITE 0
+#define TRACE_CMSDK_APB_UART_WRITE_ENABLED 0
+#define TRACE_CMSDK_APB_UART_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_uart_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ESCC_GET_QUEUE 0
+#define TRACE_ESCC_GET_QUEUE_ENABLED 0
+#define TRACE_ESCC_GET_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_escc_get_queue(char channel, int val) {
+ (void)channel;
+ (void)val;
+}
+#define TRACE_ESCC_HARD_RESET 0
+#define TRACE_ESCC_HARD_RESET_ENABLED 0
+#define TRACE_ESCC_HARD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_escc_hard_reset(void) {
+}
+#define TRACE_ESCC_KBD_COMMAND 0
+#define TRACE_ESCC_KBD_COMMAND_ENABLED 0
+#define TRACE_ESCC_KBD_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_escc_kbd_command(int val) {
+ (void)val;
+}
+#define TRACE_ESCC_MEM_READB_CTRL 0
+#define TRACE_ESCC_MEM_READB_CTRL_ENABLED 0
+#define TRACE_ESCC_MEM_READB_CTRL_BACKEND_DSTATE() (0)
+static inline void trace_escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) {
+ (void)channel;
+ (void)reg;
+ (void)val;
+}
+#define TRACE_ESCC_MEM_READB_DATA 0
+#define TRACE_ESCC_MEM_READB_DATA_ENABLED 0
+#define TRACE_ESCC_MEM_READB_DATA_BACKEND_DSTATE() (0)
+static inline void trace_escc_mem_readb_data(char channel, uint32_t ret) {
+ (void)channel;
+ (void)ret;
+}
+#define TRACE_ESCC_MEM_WRITEB_CTRL 0
+#define TRACE_ESCC_MEM_WRITEB_CTRL_ENABLED 0
+#define TRACE_ESCC_MEM_WRITEB_CTRL_BACKEND_DSTATE() (0)
+static inline void trace_escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) {
+ (void)channel;
+ (void)reg;
+ (void)val;
+}
+#define TRACE_ESCC_MEM_WRITEB_DATA 0
+#define TRACE_ESCC_MEM_WRITEB_DATA_ENABLED 0
+#define TRACE_ESCC_MEM_WRITEB_DATA_BACKEND_DSTATE() (0)
+static inline void trace_escc_mem_writeb_data(char channel, uint32_t val) {
+ (void)channel;
+ (void)val;
+}
+#define TRACE_ESCC_PUT_QUEUE 0
+#define TRACE_ESCC_PUT_QUEUE_ENABLED 0
+#define TRACE_ESCC_PUT_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_escc_put_queue(char channel, int b) {
+ (void)channel;
+ (void)b;
+}
+#define TRACE_ESCC_SERIAL_RECEIVE_BYTE 0
+#define TRACE_ESCC_SERIAL_RECEIVE_BYTE_ENABLED 0
+#define TRACE_ESCC_SERIAL_RECEIVE_BYTE_BACKEND_DSTATE() (0)
+static inline void trace_escc_serial_receive_byte(char channel, int ch) {
+ (void)channel;
+ (void)ch;
+}
+#define TRACE_ESCC_SOFT_RESET_CHN 0
+#define TRACE_ESCC_SOFT_RESET_CHN_ENABLED 0
+#define TRACE_ESCC_SOFT_RESET_CHN_BACKEND_DSTATE() (0)
+static inline void trace_escc_soft_reset_chn(char channel) {
+ (void)channel;
+}
+#define TRACE_ESCC_SUNKBD_EVENT_IN 0
+#define TRACE_ESCC_SUNKBD_EVENT_IN_ENABLED 0
+#define TRACE_ESCC_SUNKBD_EVENT_IN_BACKEND_DSTATE() (0)
+static inline void trace_escc_sunkbd_event_in(int ch, const char *name, int down) {
+ (void)ch;
+ (void)name;
+ (void)down;
+}
+#define TRACE_ESCC_SUNKBD_EVENT_OUT 0
+#define TRACE_ESCC_SUNKBD_EVENT_OUT_ENABLED 0
+#define TRACE_ESCC_SUNKBD_EVENT_OUT_BACKEND_DSTATE() (0)
+static inline void trace_escc_sunkbd_event_out(int ch) {
+ (void)ch;
+}
+#define TRACE_ESCC_SUNMOUSE_EVENT 0
+#define TRACE_ESCC_SUNMOUSE_EVENT_ENABLED 0
+#define TRACE_ESCC_SUNMOUSE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_escc_sunmouse_event(int dx, int dy, int buttons_state) {
+ (void)dx;
+ (void)dy;
+ (void)buttons_state;
+}
+#define TRACE_ESCC_UPDATE_IRQ 0
+#define TRACE_ESCC_UPDATE_IRQ_ENABLED 0
+#define TRACE_ESCC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_escc_update_irq(int irq) {
+ (void)irq;
+}
+#define TRACE_ESCC_UPDATE_PARAMETERS 0
+#define TRACE_ESCC_UPDATE_PARAMETERS_ENABLED 0
+#define TRACE_ESCC_UPDATE_PARAMETERS_BACKEND_DSTATE() (0)
+static inline void trace_escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) {
+ (void)channel;
+ (void)speed;
+ (void)parity;
+ (void)data_bits;
+ (void)stop_bits;
+}
+#define TRACE_EXYNOS_UART_CHANNEL_ERROR 0
+#define TRACE_EXYNOS_UART_CHANNEL_ERROR_ENABLED 0
+#define TRACE_EXYNOS_UART_CHANNEL_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_channel_error(uint32_t channel) {
+ (void)channel;
+}
+#define TRACE_EXYNOS_UART_DMABUSY 0
+#define TRACE_EXYNOS_UART_DMABUSY_ENABLED 0
+#define TRACE_EXYNOS_UART_DMABUSY_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_dmabusy(uint32_t channel) {
+ (void)channel;
+}
+#define TRACE_EXYNOS_UART_DMAREADY 0
+#define TRACE_EXYNOS_UART_DMAREADY_ENABLED 0
+#define TRACE_EXYNOS_UART_DMAREADY_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_dmaready(uint32_t channel) {
+ (void)channel;
+}
+#define TRACE_EXYNOS_UART_INTCLR 0
+#define TRACE_EXYNOS_UART_INTCLR_ENABLED 0
+#define TRACE_EXYNOS_UART_INTCLR_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_intclr(uint32_t channel, uint32_t reg) {
+ (void)channel;
+ (void)reg;
+}
+#define TRACE_EXYNOS_UART_IRQ_LOWERED 0
+#define TRACE_EXYNOS_UART_IRQ_LOWERED_ENABLED 0
+#define TRACE_EXYNOS_UART_IRQ_LOWERED_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_irq_lowered(uint32_t channel) {
+ (void)channel;
+}
+#define TRACE_EXYNOS_UART_IRQ_RAISED 0
+#define TRACE_EXYNOS_UART_IRQ_RAISED_ENABLED 0
+#define TRACE_EXYNOS_UART_IRQ_RAISED_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_irq_raised(uint32_t channel, uint32_t reg) {
+ (void)channel;
+ (void)reg;
+}
+#define TRACE_EXYNOS_UART_READ 0
+#define TRACE_EXYNOS_UART_READ_ENABLED 0
+#define TRACE_EXYNOS_UART_READ_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_read(uint32_t channel, uint32_t offset, const char *name, uint64_t val) {
+ (void)channel;
+ (void)offset;
+ (void)name;
+ (void)val;
+}
+#define TRACE_EXYNOS_UART_RO_WRITE 0
+#define TRACE_EXYNOS_UART_RO_WRITE_ENABLED 0
+#define TRACE_EXYNOS_UART_RO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_ro_write(uint32_t channel, const char *name, uint32_t reg) {
+ (void)channel;
+ (void)name;
+ (void)reg;
+}
+#define TRACE_EXYNOS_UART_RX 0
+#define TRACE_EXYNOS_UART_RX_ENABLED 0
+#define TRACE_EXYNOS_UART_RX_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_rx(uint32_t channel, uint8_t ch) {
+ (void)channel;
+ (void)ch;
+}
+#define TRACE_EXYNOS_UART_RX_ERROR 0
+#define TRACE_EXYNOS_UART_RX_ERROR_ENABLED 0
+#define TRACE_EXYNOS_UART_RX_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_rx_error(uint32_t channel) {
+ (void)channel;
+}
+#define TRACE_EXYNOS_UART_RX_FIFO_RESET 0
+#define TRACE_EXYNOS_UART_RX_FIFO_RESET_ENABLED 0
+#define TRACE_EXYNOS_UART_RX_FIFO_RESET_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_rx_fifo_reset(uint32_t channel) {
+ (void)channel;
+}
+#define TRACE_EXYNOS_UART_RX_TIMEOUT 0
+#define TRACE_EXYNOS_UART_RX_TIMEOUT_ENABLED 0
+#define TRACE_EXYNOS_UART_RX_TIMEOUT_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) {
+ (void)channel;
+ (void)stat;
+ (void)intsp;
+}
+#define TRACE_EXYNOS_UART_RXSIZE 0
+#define TRACE_EXYNOS_UART_RXSIZE_ENABLED 0
+#define TRACE_EXYNOS_UART_RXSIZE_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_rxsize(uint32_t channel, uint32_t size) {
+ (void)channel;
+ (void)size;
+}
+#define TRACE_EXYNOS_UART_TX 0
+#define TRACE_EXYNOS_UART_TX_ENABLED 0
+#define TRACE_EXYNOS_UART_TX_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_tx(uint32_t channel, uint8_t ch) {
+ (void)channel;
+ (void)ch;
+}
+#define TRACE_EXYNOS_UART_TX_FIFO_RESET 0
+#define TRACE_EXYNOS_UART_TX_FIFO_RESET_ENABLED 0
+#define TRACE_EXYNOS_UART_TX_FIFO_RESET_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_tx_fifo_reset(uint32_t channel) {
+ (void)channel;
+}
+#define TRACE_EXYNOS_UART_UPDATE_PARAMS 0
+#define TRACE_EXYNOS_UART_UPDATE_PARAMS_ENABLED 0
+#define TRACE_EXYNOS_UART_UPDATE_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop, uint64_t wordtime) {
+ (void)channel;
+ (void)speed;
+ (void)parity;
+ (void)data;
+ (void)stop;
+ (void)wordtime;
+}
+#define TRACE_EXYNOS_UART_WO_READ 0
+#define TRACE_EXYNOS_UART_WO_READ_ENABLED 0
+#define TRACE_EXYNOS_UART_WO_READ_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_wo_read(uint32_t channel, const char *name, uint32_t reg) {
+ (void)channel;
+ (void)name;
+ (void)reg;
+}
+#define TRACE_EXYNOS_UART_WRITE 0
+#define TRACE_EXYNOS_UART_WRITE_ENABLED 0
+#define TRACE_EXYNOS_UART_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_exynos_uart_write(uint32_t channel, uint32_t offset, const char *name, uint64_t val) {
+ (void)channel;
+ (void)offset;
+ (void)name;
+ (void)val;
+}
+#define TRACE_GOLDFISH_TTY_CAN_RECEIVE 0
+#define TRACE_GOLDFISH_TTY_CAN_RECEIVE_ENABLED 0
+#define TRACE_GOLDFISH_TTY_CAN_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_can_receive(void *dev, unsigned int available) {
+ (void)dev;
+ (void)available;
+}
+#define TRACE_GOLDFISH_TTY_INSTANCE_INIT 0
+#define TRACE_GOLDFISH_TTY_INSTANCE_INIT_ENABLED 0
+#define TRACE_GOLDFISH_TTY_INSTANCE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_instance_init(void *dev) {
+ (void)dev;
+}
+#define TRACE_GOLDFISH_TTY_READ 0
+#define TRACE_GOLDFISH_TTY_READ_ENABLED 0
+#define TRACE_GOLDFISH_TTY_READ_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) {
+ (void)dev;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_GOLDFISH_TTY_REALIZE 0
+#define TRACE_GOLDFISH_TTY_REALIZE_ENABLED 0
+#define TRACE_GOLDFISH_TTY_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_realize(void *dev) {
+ (void)dev;
+}
+#define TRACE_GOLDFISH_TTY_RECEIVE 0
+#define TRACE_GOLDFISH_TTY_RECEIVE_ENABLED 0
+#define TRACE_GOLDFISH_TTY_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_receive(void *dev, unsigned int size) {
+ (void)dev;
+ (void)size;
+}
+#define TRACE_GOLDFISH_TTY_RESET 0
+#define TRACE_GOLDFISH_TTY_RESET_ENABLED 0
+#define TRACE_GOLDFISH_TTY_RESET_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_reset(void *dev) {
+ (void)dev;
+}
+#define TRACE_GOLDFISH_TTY_UNREALIZE 0
+#define TRACE_GOLDFISH_TTY_UNREALIZE_ENABLED 0
+#define TRACE_GOLDFISH_TTY_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_unrealize(void *dev) {
+ (void)dev;
+}
+#define TRACE_GOLDFISH_TTY_WRITE 0
+#define TRACE_GOLDFISH_TTY_WRITE_ENABLED 0
+#define TRACE_GOLDFISH_TTY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_tty_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) {
+ (void)dev;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_GRLIB_APBUART_EVENT 0
+#define TRACE_GRLIB_APBUART_EVENT_ENABLED 0
+#define TRACE_GRLIB_APBUART_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_grlib_apbuart_event(int event) {
+ (void)event;
+}
+#define TRACE_GRLIB_APBUART_READL_UNKNOWN 0
+#define TRACE_GRLIB_APBUART_READL_UNKNOWN_ENABLED 0
+#define TRACE_GRLIB_APBUART_READL_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_grlib_apbuart_readl_unknown(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_GRLIB_APBUART_WRITEL_UNKNOWN 0
+#define TRACE_GRLIB_APBUART_WRITEL_UNKNOWN_ENABLED 0
+#define TRACE_GRLIB_APBUART_WRITEL_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_HTIF_UART_UNKNOWN_DEVICE_COMMAND 0
+#define TRACE_HTIF_UART_UNKNOWN_DEVICE_COMMAND_ENABLED 0
+#define TRACE_HTIF_UART_UNKNOWN_DEVICE_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_htif_uart_unknown_device_command(uint8_t device, uint8_t cmd, uint64_t payload) {
+ (void)device;
+ (void)cmd;
+ (void)payload;
+}
+#define TRACE_HTIF_UART_WRITE_TO_HOST 0
+#define TRACE_HTIF_UART_WRITE_TO_HOST_ENABLED 0
+#define TRACE_HTIF_UART_WRITE_TO_HOST_BACKEND_DSTATE() (0)
+static inline void trace_htif_uart_write_to_host(uint8_t device, uint8_t cmd, uint64_t payload) {
+ (void)device;
+ (void)cmd;
+ (void)payload;
+}
+#define TRACE_IMX_SERIAL_PUT_DATA 0
+#define TRACE_IMX_SERIAL_PUT_DATA_ENABLED 0
+#define TRACE_IMX_SERIAL_PUT_DATA_BACKEND_DSTATE() (0)
+static inline void trace_imx_serial_put_data(const char *chrname, uint32_t value) {
+ (void)chrname;
+ (void)value;
+}
+#define TRACE_IMX_SERIAL_READ 0
+#define TRACE_IMX_SERIAL_READ_ENABLED 0
+#define TRACE_IMX_SERIAL_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx_serial_read(const char *chrname, uint64_t addr, uint64_t value) {
+ (void)chrname;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_IMX_SERIAL_WRITE 0
+#define TRACE_IMX_SERIAL_WRITE_ENABLED 0
+#define TRACE_IMX_SERIAL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx_serial_write(const char *chrname, uint64_t addr, uint64_t value) {
+ (void)chrname;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_NRF51_UART_READ 0
+#define TRACE_NRF51_UART_READ_ENABLED 0
+#define TRACE_NRF51_UART_READ_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) {
+ (void)addr;
+ (void)r;
+ (void)size;
+}
+#define TRACE_NRF51_UART_WRITE 0
+#define TRACE_NRF51_UART_WRITE_ENABLED 0
+#define TRACE_NRF51_UART_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_PARALLEL_IOPORT_READ 0
+#define TRACE_PARALLEL_IOPORT_READ_ENABLED 0
+#define TRACE_PARALLEL_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) {
+ (void)desc;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_PARALLEL_IOPORT_WRITE 0
+#define TRACE_PARALLEL_IOPORT_WRITE_ENABLED 0
+#define TRACE_PARALLEL_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) {
+ (void)desc;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_PL011_BAUDRATE_CHANGE 0
+#define TRACE_PL011_BAUDRATE_CHANGE_ENABLED 0
+#define TRACE_PL011_BAUDRATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) {
+ (void)baudrate;
+ (void)clock;
+ (void)ibrd;
+ (void)fbrd;
+}
+#define TRACE_PL011_CAN_RECEIVE 0
+#define TRACE_PL011_CAN_RECEIVE_ENABLED 0
+#define TRACE_PL011_CAN_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_pl011_can_receive(uint32_t lcr, unsigned rx_fifo_used, unsigned rx_fifo_depth, unsigned rx_fifo_available) {
+ (void)lcr;
+ (void)rx_fifo_used;
+ (void)rx_fifo_depth;
+ (void)rx_fifo_available;
+}
+#define TRACE_PL011_FIFO_RX_FULL 0
+#define TRACE_PL011_FIFO_RX_FULL_ENABLED 0
+#define TRACE_PL011_FIFO_RX_FULL_BACKEND_DSTATE() (0)
+static inline void trace_pl011_fifo_rx_full(void) {
+}
+#define TRACE_PL011_FIFO_RX_PUT 0
+#define TRACE_PL011_FIFO_RX_PUT_ENABLED 0
+#define TRACE_PL011_FIFO_RX_PUT_BACKEND_DSTATE() (0)
+static inline void trace_pl011_fifo_rx_put(uint32_t c, unsigned read_count, unsigned rx_fifo_depth) {
+ (void)c;
+ (void)read_count;
+ (void)rx_fifo_depth;
+}
+#define TRACE_PL011_IRQ_STATE 0
+#define TRACE_PL011_IRQ_STATE_ENABLED 0
+#define TRACE_PL011_IRQ_STATE_BACKEND_DSTATE() (0)
+static inline void trace_pl011_irq_state(bool level) {
+ (void)level;
+}
+#define TRACE_PL011_READ 0
+#define TRACE_PL011_READ_ENABLED 0
+#define TRACE_PL011_READ_BACKEND_DSTATE() (0)
+static inline void trace_pl011_read(uint64_t addr, uint32_t value, const char *regname) {
+ (void)addr;
+ (void)value;
+ (void)regname;
+}
+#define TRACE_PL011_READ_FIFO 0
+#define TRACE_PL011_READ_FIFO_ENABLED 0
+#define TRACE_PL011_READ_FIFO_BACKEND_DSTATE() (0)
+static inline void trace_pl011_read_fifo(unsigned rx_fifo_used, unsigned rx_fifo_depth) {
+ (void)rx_fifo_used;
+ (void)rx_fifo_depth;
+}
+#define TRACE_PL011_RECEIVE 0
+#define TRACE_PL011_RECEIVE_ENABLED 0
+#define TRACE_PL011_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_pl011_receive(size_t size) {
+ (void)size;
+}
+#define TRACE_PL011_WRITE 0
+#define TRACE_PL011_WRITE_ENABLED 0
+#define TRACE_PL011_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pl011_write(uint64_t addr, uint32_t value, const char *regname) {
+ (void)addr;
+ (void)value;
+ (void)regname;
+}
+#define TRACE_SERIAL_READ 0
+#define TRACE_SERIAL_READ_ENABLED 0
+#define TRACE_SERIAL_READ_BACKEND_DSTATE() (0)
+static inline void trace_serial_read(uint16_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SERIAL_UPDATE_PARAMETERS 0
+#define TRACE_SERIAL_UPDATE_PARAMETERS_ENABLED 0
+#define TRACE_SERIAL_UPDATE_PARAMETERS_BACKEND_DSTATE() (0)
+static inline void trace_serial_update_parameters(uint64_t baudrate, char parity, int data_bits, int stop_bits) {
+ (void)baudrate;
+ (void)parity;
+ (void)data_bits;
+ (void)stop_bits;
+}
+#define TRACE_SERIAL_WRITE 0
+#define TRACE_SERIAL_WRITE_ENABLED 0
+#define TRACE_SERIAL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_serial_write(uint16_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SH_SERIAL_READ 0
+#define TRACE_SH_SERIAL_READ_ENABLED 0
+#define TRACE_SH_SERIAL_READ_BACKEND_DSTATE() (0)
+static inline void trace_sh_serial_read(char *id, unsigned size, uint64_t offs, uint64_t val) {
+ (void)id;
+ (void)size;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_SH_SERIAL_WRITE 0
+#define TRACE_SH_SERIAL_WRITE_ENABLED 0
+#define TRACE_SH_SERIAL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sh_serial_write(char *id, unsigned size, uint64_t offs, uint64_t val) {
+ (void)id;
+ (void)size;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_SHAKTI_UART_READ 0
+#define TRACE_SHAKTI_UART_READ_ENABLED 0
+#define TRACE_SHAKTI_UART_READ_BACKEND_DSTATE() (0)
+static inline void trace_shakti_uart_read(uint64_t addr, uint16_t r, unsigned int size) {
+ (void)addr;
+ (void)r;
+ (void)size;
+}
+#define TRACE_SHAKTI_UART_WRITE 0
+#define TRACE_SHAKTI_UART_WRITE_ENABLED 0
+#define TRACE_SHAKTI_UART_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_shakti_uart_write(uint64_t addr, uint64_t value, unsigned int size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_STM32F2XX_USART_DROP 0
+#define TRACE_STM32F2XX_USART_DROP_ENABLED 0
+#define TRACE_STM32F2XX_USART_DROP_BACKEND_DSTATE() (0)
+static inline void trace_stm32f2xx_usart_drop(char *id) {
+ (void)id;
+}
+#define TRACE_STM32F2XX_USART_READ 0
+#define TRACE_STM32F2XX_USART_READ_ENABLED 0
+#define TRACE_STM32F2XX_USART_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32f2xx_usart_read(char *id, unsigned size, uint64_t ofs, uint64_t val) {
+ (void)id;
+ (void)size;
+ (void)ofs;
+ (void)val;
+}
+#define TRACE_STM32F2XX_USART_RECEIVE 0
+#define TRACE_STM32F2XX_USART_RECEIVE_ENABLED 0
+#define TRACE_STM32F2XX_USART_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_stm32f2xx_usart_receive(char *id, uint8_t chr) {
+ (void)id;
+ (void)chr;
+}
+#define TRACE_STM32F2XX_USART_WRITE 0
+#define TRACE_STM32F2XX_USART_WRITE_ENABLED 0
+#define TRACE_STM32F2XX_USART_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32f2xx_usart_write(char *id, unsigned size, uint64_t ofs, uint64_t val) {
+ (void)id;
+ (void)size;
+ (void)ofs;
+ (void)val;
+}
+#define TRACE_STM32L4X5_USART_IRQ_LOWERED 0
+#define TRACE_STM32L4X5_USART_IRQ_LOWERED_ENABLED 0
+#define TRACE_STM32L4X5_USART_IRQ_LOWERED_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_irq_lowered(void) {
+}
+#define TRACE_STM32L4X5_USART_IRQ_RAISED 0
+#define TRACE_STM32L4X5_USART_IRQ_RAISED_ENABLED 0
+#define TRACE_STM32L4X5_USART_IRQ_RAISED_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_irq_raised(uint32_t reg) {
+ (void)reg;
+}
+#define TRACE_STM32L4X5_USART_OVERRUN_DETECTED 0
+#define TRACE_STM32L4X5_USART_OVERRUN_DETECTED_ENABLED 0
+#define TRACE_STM32L4X5_USART_OVERRUN_DETECTED_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_overrun_detected(uint8_t current, uint8_t received) {
+ (void)current;
+ (void)received;
+}
+#define TRACE_STM32L4X5_USART_READ 0
+#define TRACE_STM32L4X5_USART_READ_ENABLED 0
+#define TRACE_STM32L4X5_USART_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_read(uint64_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32L4X5_USART_RECEIVER_NOT_ENABLED 0
+#define TRACE_STM32L4X5_USART_RECEIVER_NOT_ENABLED_ENABLED 0
+#define TRACE_STM32L4X5_USART_RECEIVER_NOT_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_receiver_not_enabled(uint8_t ue_bit, uint8_t re_bit) {
+ (void)ue_bit;
+ (void)re_bit;
+}
+#define TRACE_STM32L4X5_USART_RX 0
+#define TRACE_STM32L4X5_USART_RX_ENABLED 0
+#define TRACE_STM32L4X5_USART_RX_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_rx(uint8_t c) {
+ (void)c;
+}
+#define TRACE_STM32L4X5_USART_TX 0
+#define TRACE_STM32L4X5_USART_TX_ENABLED 0
+#define TRACE_STM32L4X5_USART_TX_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_tx(uint8_t c) {
+ (void)c;
+}
+#define TRACE_STM32L4X5_USART_TX_PENDING 0
+#define TRACE_STM32L4X5_USART_TX_PENDING_ENABLED 0
+#define TRACE_STM32L4X5_USART_TX_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_tx_pending(void) {
+}
+#define TRACE_STM32L4X5_USART_UPDATE_PARAMS 0
+#define TRACE_STM32L4X5_USART_UPDATE_PARAMS_ENABLED 0
+#define TRACE_STM32L4X5_USART_UPDATE_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_update_params(int speed, uint8_t parity, int data, int stop) {
+ (void)speed;
+ (void)parity;
+ (void)data;
+ (void)stop;
+}
+#define TRACE_STM32L4X5_USART_WRITE 0
+#define TRACE_STM32L4X5_USART_WRITE_ENABLED 0
+#define TRACE_STM32L4X5_USART_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_usart_write(uint64_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_VIRTIO_CONSOLE_CHR_EVENT 0
+#define TRACE_VIRTIO_CONSOLE_CHR_EVENT_ENABLED 0
+#define TRACE_VIRTIO_CONSOLE_CHR_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_console_chr_event(unsigned int port, int event) {
+ (void)port;
+ (void)event;
+}
+#define TRACE_VIRTIO_CONSOLE_CHR_READ 0
+#define TRACE_VIRTIO_CONSOLE_CHR_READ_ENABLED 0
+#define TRACE_VIRTIO_CONSOLE_CHR_READ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_console_chr_read(unsigned int port, int size) {
+ (void)port;
+ (void)size;
+}
+#define TRACE_VIRTIO_CONSOLE_FLUSH_BUF 0
+#define TRACE_VIRTIO_CONSOLE_FLUSH_BUF_ENABLED 0
+#define TRACE_VIRTIO_CONSOLE_FLUSH_BUF_BACKEND_DSTATE() (0)
+static inline void trace_virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) {
+ (void)port;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_VIRTIO_SERIAL_HANDLE_CONTROL_MESSAGE 0
+#define TRACE_VIRTIO_SERIAL_HANDLE_CONTROL_MESSAGE_ENABLED 0
+#define TRACE_VIRTIO_SERIAL_HANDLE_CONTROL_MESSAGE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_serial_handle_control_message(uint16_t event, uint16_t value) {
+ (void)event;
+ (void)value;
+}
+#define TRACE_VIRTIO_SERIAL_HANDLE_CONTROL_MESSAGE_PORT 0
+#define TRACE_VIRTIO_SERIAL_HANDLE_CONTROL_MESSAGE_PORT_ENABLED 0
+#define TRACE_VIRTIO_SERIAL_HANDLE_CONTROL_MESSAGE_PORT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_serial_handle_control_message_port(unsigned int port) {
+ (void)port;
+}
+#define TRACE_VIRTIO_SERIAL_SEND_CONTROL_EVENT 0
+#define TRACE_VIRTIO_SERIAL_SEND_CONTROL_EVENT_ENABLED 0
+#define TRACE_VIRTIO_SERIAL_SEND_CONTROL_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) {
+ (void)port;
+ (void)event;
+ (void)value;
+}
+#define TRACE_VIRTIO_SERIAL_THROTTLE_PORT 0
+#define TRACE_VIRTIO_SERIAL_THROTTLE_PORT_ENABLED 0
+#define TRACE_VIRTIO_SERIAL_THROTTLE_PORT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_serial_throttle_port(unsigned int port, bool throttle) {
+ (void)port;
+ (void)throttle;
+}
+#define TRACE_XEN_CONSOLE_CONNECT 0
+#define TRACE_XEN_CONSOLE_CONNECT_ENABLED 0
+#define TRACE_XEN_CONSOLE_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_console_connect(unsigned int idx, unsigned int ring_ref, unsigned int port, unsigned int limit) {
+ (void)idx;
+ (void)ring_ref;
+ (void)port;
+ (void)limit;
+}
+#define TRACE_XEN_CONSOLE_DEVICE_CREATE 0
+#define TRACE_XEN_CONSOLE_DEVICE_CREATE_ENABLED 0
+#define TRACE_XEN_CONSOLE_DEVICE_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_console_device_create(unsigned int idx) {
+ (void)idx;
+}
+#define TRACE_XEN_CONSOLE_DEVICE_DESTROY 0
+#define TRACE_XEN_CONSOLE_DEVICE_DESTROY_ENABLED 0
+#define TRACE_XEN_CONSOLE_DEVICE_DESTROY_BACKEND_DSTATE() (0)
+static inline void trace_xen_console_device_destroy(unsigned int idx) {
+ (void)idx;
+}
+#define TRACE_XEN_CONSOLE_DISCONNECT 0
+#define TRACE_XEN_CONSOLE_DISCONNECT_ENABLED 0
+#define TRACE_XEN_CONSOLE_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_console_disconnect(unsigned int idx) {
+ (void)idx;
+}
+#define TRACE_XEN_CONSOLE_REALIZE 0
+#define TRACE_XEN_CONSOLE_REALIZE_ENABLED 0
+#define TRACE_XEN_CONSOLE_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_console_realize(unsigned int idx, const char *chrdev) {
+ (void)idx;
+ (void)chrdev;
+}
+#define TRACE_XEN_CONSOLE_UNREALIZE 0
+#define TRACE_XEN_CONSOLE_UNREALIZE_ENABLED 0
+#define TRACE_XEN_CONSOLE_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_console_unrealize(unsigned int idx) {
+ (void)idx;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_core.h b/trace/trace-hw_core.h
new file mode 100644
index 0000000000..ff6fa2181f
--- /dev/null
+++ b/trace/trace-hw_core.h
@@ -0,0 +1,211 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_CORE_H
+#define TRACE_TRACE_HW_CORE_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CLOCK_DISCONNECT 0
+#define TRACE_CLOCK_DISCONNECT_ENABLED 0
+#define TRACE_CLOCK_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_clock_disconnect(const char *clk) {
+ (void)clk;
+}
+#define TRACE_CLOCK_PROPAGATE 0
+#define TRACE_CLOCK_PROPAGATE_ENABLED 0
+#define TRACE_CLOCK_PROPAGATE_BACKEND_DSTATE() (0)
+static inline void trace_clock_propagate(const char *clk) {
+ (void)clk;
+}
+#define TRACE_CLOCK_SET 0
+#define TRACE_CLOCK_SET_ENABLED 0
+#define TRACE_CLOCK_SET_BACKEND_DSTATE() (0)
+static inline void trace_clock_set(const char *clk, uint64_t old, uint64_t new) {
+ (void)clk;
+ (void)old;
+ (void)new;
+}
+#define TRACE_CLOCK_SET_MUL_DIV 0
+#define TRACE_CLOCK_SET_MUL_DIV_ENABLED 0
+#define TRACE_CLOCK_SET_MUL_DIV_BACKEND_DSTATE() (0)
+static inline void trace_clock_set_mul_div(const char *clk, uint32_t oldmul, uint32_t mul, uint32_t olddiv, uint32_t div) {
+ (void)clk;
+ (void)oldmul;
+ (void)mul;
+ (void)olddiv;
+ (void)div;
+}
+#define TRACE_CLOCK_SET_SOURCE 0
+#define TRACE_CLOCK_SET_SOURCE_ENABLED 0
+#define TRACE_CLOCK_SET_SOURCE_BACKEND_DSTATE() (0)
+static inline void trace_clock_set_source(const char *clk, const char *src) {
+ (void)clk;
+ (void)src;
+}
+#define TRACE_CLOCK_UPDATE 0
+#define TRACE_CLOCK_UPDATE_ENABLED 0
+#define TRACE_CLOCK_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_clock_update(const char *clk, const char *src, uint64_t hz, int cb) {
+ (void)clk;
+ (void)src;
+ (void)hz;
+ (void)cb;
+}
+#define TRACE_CPU_RESET 0
+#define TRACE_CPU_RESET_ENABLED 0
+#define TRACE_CPU_RESET_BACKEND_DSTATE() (0)
+static inline void trace_cpu_reset(int cpu_index) {
+ (void)cpu_index;
+}
+#define TRACE_LOADER_WRITE_ROM 0
+#define TRACE_LOADER_WRITE_ROM_ENABLED 0
+#define TRACE_LOADER_WRITE_ROM_BACKEND_DSTATE() (0)
+static inline void trace_loader_write_rom(const char *name, uint64_t gpa, uint64_t size, bool isrom) {
+ (void)name;
+ (void)gpa;
+ (void)size;
+ (void)isrom;
+}
+#define TRACE_QDEV_UPDATE_PARENT_BUS 0
+#define TRACE_QDEV_UPDATE_PARENT_BUS_ENABLED 0
+#define TRACE_QDEV_UPDATE_PARENT_BUS_BACKEND_DSTATE() (0)
+static inline void trace_qdev_update_parent_bus(void *obj, const char *objtype, void *oldp, const char *oldptype, void *newp, const char *newptype) {
+ (void)obj;
+ (void)objtype;
+ (void)oldp;
+ (void)oldptype;
+ (void)newp;
+ (void)newptype;
+}
+#define TRACE_RESETTABLE_CHANGE_PARENT 0
+#define TRACE_RESETTABLE_CHANGE_PARENT_ENABLED 0
+#define TRACE_RESETTABLE_CHANGE_PARENT_BACKEND_DSTATE() (0)
+static inline void trace_resettable_change_parent(void *obj, void *o, unsigned oc, void *n, unsigned nc) {
+ (void)obj;
+ (void)o;
+ (void)oc;
+ (void)n;
+ (void)nc;
+}
+#define TRACE_RESETTABLE_PHASE_ENTER_BEGIN 0
+#define TRACE_RESETTABLE_PHASE_ENTER_BEGIN_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_ENTER_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_enter_begin(void *obj, const char *objtype, unsigned count, int type) {
+ (void)obj;
+ (void)objtype;
+ (void)count;
+ (void)type;
+}
+#define TRACE_RESETTABLE_PHASE_ENTER_END 0
+#define TRACE_RESETTABLE_PHASE_ENTER_END_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_ENTER_END_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_enter_end(void *obj, const char *objtype, unsigned count) {
+ (void)obj;
+ (void)objtype;
+ (void)count;
+}
+#define TRACE_RESETTABLE_PHASE_ENTER_EXEC 0
+#define TRACE_RESETTABLE_PHASE_ENTER_EXEC_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_ENTER_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_enter_exec(void *obj, const char *objtype, int type, int has_method) {
+ (void)obj;
+ (void)objtype;
+ (void)type;
+ (void)has_method;
+}
+#define TRACE_RESETTABLE_PHASE_EXIT_BEGIN 0
+#define TRACE_RESETTABLE_PHASE_EXIT_BEGIN_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_EXIT_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_exit_begin(void *obj, const char *objtype, unsigned count, int type) {
+ (void)obj;
+ (void)objtype;
+ (void)count;
+ (void)type;
+}
+#define TRACE_RESETTABLE_PHASE_EXIT_END 0
+#define TRACE_RESETTABLE_PHASE_EXIT_END_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_EXIT_END_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_exit_end(void *obj, const char *objtype, unsigned count) {
+ (void)obj;
+ (void)objtype;
+ (void)count;
+}
+#define TRACE_RESETTABLE_PHASE_EXIT_EXEC 0
+#define TRACE_RESETTABLE_PHASE_EXIT_EXEC_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_EXIT_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_exit_exec(void *obj, const char *objtype, int has_method) {
+ (void)obj;
+ (void)objtype;
+ (void)has_method;
+}
+#define TRACE_RESETTABLE_PHASE_HOLD_BEGIN 0
+#define TRACE_RESETTABLE_PHASE_HOLD_BEGIN_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_HOLD_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_hold_begin(void *obj, const char *objtype, unsigned count, int type) {
+ (void)obj;
+ (void)objtype;
+ (void)count;
+ (void)type;
+}
+#define TRACE_RESETTABLE_PHASE_HOLD_END 0
+#define TRACE_RESETTABLE_PHASE_HOLD_END_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_HOLD_END_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_hold_end(void *obj, const char *objtype, unsigned count) {
+ (void)obj;
+ (void)objtype;
+ (void)count;
+}
+#define TRACE_RESETTABLE_PHASE_HOLD_EXEC 0
+#define TRACE_RESETTABLE_PHASE_HOLD_EXEC_ENABLED 0
+#define TRACE_RESETTABLE_PHASE_HOLD_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_resettable_phase_hold_exec(void *obj, const char *objtype, int has_method) {
+ (void)obj;
+ (void)objtype;
+ (void)has_method;
+}
+#define TRACE_RESETTABLE_RESET 0
+#define TRACE_RESETTABLE_RESET_ENABLED 0
+#define TRACE_RESETTABLE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_resettable_reset(void *obj, int cold) {
+ (void)obj;
+ (void)cold;
+}
+#define TRACE_RESETTABLE_RESET_ASSERT_BEGIN 0
+#define TRACE_RESETTABLE_RESET_ASSERT_BEGIN_ENABLED 0
+#define TRACE_RESETTABLE_RESET_ASSERT_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_resettable_reset_assert_begin(void *obj, int cold) {
+ (void)obj;
+ (void)cold;
+}
+#define TRACE_RESETTABLE_RESET_ASSERT_END 0
+#define TRACE_RESETTABLE_RESET_ASSERT_END_ENABLED 0
+#define TRACE_RESETTABLE_RESET_ASSERT_END_BACKEND_DSTATE() (0)
+static inline void trace_resettable_reset_assert_end(void *obj) {
+ (void)obj;
+}
+#define TRACE_RESETTABLE_RESET_RELEASE_BEGIN 0
+#define TRACE_RESETTABLE_RESET_RELEASE_BEGIN_ENABLED 0
+#define TRACE_RESETTABLE_RESET_RELEASE_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_resettable_reset_release_begin(void *obj, int cold) {
+ (void)obj;
+ (void)cold;
+}
+#define TRACE_RESETTABLE_RESET_RELEASE_END 0
+#define TRACE_RESETTABLE_RESET_RELEASE_END_ENABLED 0
+#define TRACE_RESETTABLE_RESET_RELEASE_END_BACKEND_DSTATE() (0)
+static inline void trace_resettable_reset_release_end(void *obj) {
+ (void)obj;
+}
+#define TRACE_RESETTABLE_TRANSITIONAL_FUNCTION 0
+#define TRACE_RESETTABLE_TRANSITIONAL_FUNCTION_ENABLED 0
+#define TRACE_RESETTABLE_TRANSITIONAL_FUNCTION_BACKEND_DSTATE() (0)
+static inline void trace_resettable_transitional_function(void *obj, const char *objtype) {
+ (void)obj;
+ (void)objtype;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_display.h b/trace/trace-hw_display.h
new file mode 100644
index 0000000000..64d7f0a5a7
--- /dev/null
+++ b/trace/trace-hw_display.h
@@ -0,0 +1,1379 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_DISPLAY_H
+#define TRACE_TRACE_HW_DISPLAY_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_APPLE_GFX_COMMON_INIT 0
+#define TRACE_APPLE_GFX_COMMON_INIT_ENABLED 0
+#define TRACE_APPLE_GFX_COMMON_INIT_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_common_init(const char *device_name, size_t mmio_size) {
+ (void)device_name;
+ (void)mmio_size;
+}
+#define TRACE_APPLE_GFX_COMMON_REALIZE_MODES_PROPERTY 0
+#define TRACE_APPLE_GFX_COMMON_REALIZE_MODES_PROPERTY_ENABLED 0
+#define TRACE_APPLE_GFX_COMMON_REALIZE_MODES_PROPERTY_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_common_realize_modes_property(uint32_t num_modes) {
+ (void)num_modes;
+}
+#define TRACE_APPLE_GFX_CREATE_TASK 0
+#define TRACE_APPLE_GFX_CREATE_TASK_ENABLED 0
+#define TRACE_APPLE_GFX_CREATE_TASK_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_create_task(uint32_t vm_size, void *va) {
+ (void)vm_size;
+ (void)va;
+}
+#define TRACE_APPLE_GFX_CURSOR_MOVE 0
+#define TRACE_APPLE_GFX_CURSOR_MOVE_ENABLED 0
+#define TRACE_APPLE_GFX_CURSOR_MOVE_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_cursor_move(void) {
+}
+#define TRACE_APPLE_GFX_CURSOR_SET 0
+#define TRACE_APPLE_GFX_CURSOR_SET_ENABLED 0
+#define TRACE_APPLE_GFX_CURSOR_SET_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_cursor_set(uint32_t bpp, uint64_t width, uint64_t height) {
+ (void)bpp;
+ (void)width;
+ (void)height;
+}
+#define TRACE_APPLE_GFX_CURSOR_SHOW 0
+#define TRACE_APPLE_GFX_CURSOR_SHOW_ENABLED 0
+#define TRACE_APPLE_GFX_CURSOR_SHOW_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_cursor_show(uint32_t show) {
+ (void)show;
+}
+#define TRACE_APPLE_GFX_DESTROY_TASK 0
+#define TRACE_APPLE_GFX_DESTROY_TASK_ENABLED 0
+#define TRACE_APPLE_GFX_DESTROY_TASK_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_destroy_task(void *task, unsigned int num_mapped_regions) {
+ (void)task;
+ (void)num_mapped_regions;
+}
+#define TRACE_APPLE_GFX_DISPLAY_MODE 0
+#define TRACE_APPLE_GFX_DISPLAY_MODE_ENABLED 0
+#define TRACE_APPLE_GFX_DISPLAY_MODE_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_display_mode(uint32_t mode_idx, uint16_t width_px, uint16_t height_px) {
+ (void)mode_idx;
+ (void)width_px;
+ (void)height_px;
+}
+#define TRACE_APPLE_GFX_IOSFC_MAP_MEMORY 0
+#define TRACE_APPLE_GFX_IOSFC_MAP_MEMORY_ENABLED 0
+#define TRACE_APPLE_GFX_IOSFC_MAP_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_iosfc_map_memory(uint64_t phys, uint64_t len, uint32_t ro, void *va, void *e, void *f, void* va_result) {
+ (void)phys;
+ (void)len;
+ (void)ro;
+ (void)va;
+ (void)e;
+ (void)f;
+ (void)va_result;
+}
+#define TRACE_APPLE_GFX_IOSFC_MAP_MEMORY_NEW_REGION 0
+#define TRACE_APPLE_GFX_IOSFC_MAP_MEMORY_NEW_REGION_ENABLED 0
+#define TRACE_APPLE_GFX_IOSFC_MAP_MEMORY_NEW_REGION_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_iosfc_map_memory_new_region(size_t i, void *region, uint64_t start, uint64_t end) {
+ (void)i;
+ (void)region;
+ (void)start;
+ (void)end;
+}
+#define TRACE_APPLE_GFX_IOSFC_RAISE_IRQ 0
+#define TRACE_APPLE_GFX_IOSFC_RAISE_IRQ_ENABLED 0
+#define TRACE_APPLE_GFX_IOSFC_RAISE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_iosfc_raise_irq(uint32_t vector) {
+ (void)vector;
+}
+#define TRACE_APPLE_GFX_IOSFC_UNMAP_MEMORY 0
+#define TRACE_APPLE_GFX_IOSFC_UNMAP_MEMORY_ENABLED 0
+#define TRACE_APPLE_GFX_IOSFC_UNMAP_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_iosfc_unmap_memory(void *a, void *b, void *c, void *d, void *e, void *f) {
+ (void)a;
+ (void)b;
+ (void)c;
+ (void)d;
+ (void)e;
+ (void)f;
+}
+#define TRACE_APPLE_GFX_IOSFC_UNMAP_MEMORY_REGION 0
+#define TRACE_APPLE_GFX_IOSFC_UNMAP_MEMORY_REGION_ENABLED 0
+#define TRACE_APPLE_GFX_IOSFC_UNMAP_MEMORY_REGION_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_iosfc_unmap_memory_region(void* mem, void *region) {
+ (void)mem;
+ (void)region;
+}
+#define TRACE_APPLE_GFX_MAP_MEMORY 0
+#define TRACE_APPLE_GFX_MAP_MEMORY_ENABLED 0
+#define TRACE_APPLE_GFX_MAP_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_map_memory(void *task, uint32_t range_count, uint64_t virtual_offset, uint32_t read_only) {
+ (void)task;
+ (void)range_count;
+ (void)virtual_offset;
+ (void)read_only;
+}
+#define TRACE_APPLE_GFX_MAP_MEMORY_RANGE 0
+#define TRACE_APPLE_GFX_MAP_MEMORY_RANGE_ENABLED 0
+#define TRACE_APPLE_GFX_MAP_MEMORY_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_map_memory_range(uint32_t i, uint64_t phys_addr, uint64_t phys_len) {
+ (void)i;
+ (void)phys_addr;
+ (void)phys_len;
+}
+#define TRACE_APPLE_GFX_MMIO_IOSFC_READ 0
+#define TRACE_APPLE_GFX_MMIO_IOSFC_READ_ENABLED 0
+#define TRACE_APPLE_GFX_MMIO_IOSFC_READ_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_mmio_iosfc_read(uint64_t offset, uint64_t res) {
+ (void)offset;
+ (void)res;
+}
+#define TRACE_APPLE_GFX_MMIO_IOSFC_WRITE 0
+#define TRACE_APPLE_GFX_MMIO_IOSFC_WRITE_ENABLED 0
+#define TRACE_APPLE_GFX_MMIO_IOSFC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_mmio_iosfc_write(uint64_t offset, uint64_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_APPLE_GFX_MODE_CHANGE 0
+#define TRACE_APPLE_GFX_MODE_CHANGE_ENABLED 0
+#define TRACE_APPLE_GFX_MODE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_mode_change(uint64_t x, uint64_t y) {
+ (void)x;
+ (void)y;
+}
+#define TRACE_APPLE_GFX_NEW_FRAME 0
+#define TRACE_APPLE_GFX_NEW_FRAME_ENABLED 0
+#define TRACE_APPLE_GFX_NEW_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_new_frame(void) {
+}
+#define TRACE_APPLE_GFX_RAISE_IRQ 0
+#define TRACE_APPLE_GFX_RAISE_IRQ_ENABLED 0
+#define TRACE_APPLE_GFX_RAISE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_raise_irq(uint32_t vector) {
+ (void)vector;
+}
+#define TRACE_APPLE_GFX_READ 0
+#define TRACE_APPLE_GFX_READ_ENABLED 0
+#define TRACE_APPLE_GFX_READ_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_read(uint64_t offset, uint64_t res) {
+ (void)offset;
+ (void)res;
+}
+#define TRACE_APPLE_GFX_READ_MEMORY 0
+#define TRACE_APPLE_GFX_READ_MEMORY_ENABLED 0
+#define TRACE_APPLE_GFX_READ_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_read_memory(uint64_t phys_address, uint64_t length, void *dst) {
+ (void)phys_address;
+ (void)length;
+ (void)dst;
+}
+#define TRACE_APPLE_GFX_REMAP 0
+#define TRACE_APPLE_GFX_REMAP_ENABLED 0
+#define TRACE_APPLE_GFX_REMAP_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_remap(uint64_t retval, void *source_ptr, uint64_t target) {
+ (void)retval;
+ (void)source_ptr;
+ (void)target;
+}
+#define TRACE_APPLE_GFX_UNMAP_MEMORY 0
+#define TRACE_APPLE_GFX_UNMAP_MEMORY_ENABLED 0
+#define TRACE_APPLE_GFX_UNMAP_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_unmap_memory(void *task, uint64_t virtual_offset, uint64_t length) {
+ (void)task;
+ (void)virtual_offset;
+ (void)length;
+}
+#define TRACE_APPLE_GFX_WRITE 0
+#define TRACE_APPLE_GFX_WRITE_ENABLED 0
+#define TRACE_APPLE_GFX_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_apple_gfx_write(uint64_t offset, uint64_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_ARTIST_BLOCK_MOVE 0
+#define TRACE_ARTIST_BLOCK_MOVE_ENABLED 0
+#define TRACE_ARTIST_BLOCK_MOVE_BACKEND_DSTATE() (0)
+static inline void trace_artist_block_move(unsigned int start_x, unsigned int start_y, unsigned int dest_x, unsigned int dest_y, unsigned int width, unsigned int height) {
+ (void)start_x;
+ (void)start_y;
+ (void)dest_x;
+ (void)dest_y;
+ (void)width;
+ (void)height;
+}
+#define TRACE_ARTIST_DRAW_LINE 0
+#define TRACE_ARTIST_DRAW_LINE_ENABLED 0
+#define TRACE_ARTIST_DRAW_LINE_BACKEND_DSTATE() (0)
+static inline void trace_artist_draw_line(unsigned int start_x, unsigned int start_y, unsigned int end_x, unsigned int end_y) {
+ (void)start_x;
+ (void)start_y;
+ (void)end_x;
+ (void)end_y;
+}
+#define TRACE_ARTIST_FILL_WINDOW 0
+#define TRACE_ARTIST_FILL_WINDOW_ENABLED 0
+#define TRACE_ARTIST_FILL_WINDOW_BACKEND_DSTATE() (0)
+static inline void trace_artist_fill_window(unsigned int start_x, unsigned int start_y, unsigned int width, unsigned int height, uint32_t op, uint32_t ctlpln) {
+ (void)start_x;
+ (void)start_y;
+ (void)width;
+ (void)height;
+ (void)op;
+ (void)ctlpln;
+}
+#define TRACE_ARTIST_REG_READ 0
+#define TRACE_ARTIST_REG_READ_ENABLED 0
+#define TRACE_ARTIST_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_artist_reg_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_ARTIST_REG_WRITE 0
+#define TRACE_ARTIST_REG_WRITE_ENABLED 0
+#define TRACE_ARTIST_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_artist_reg_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_ARTIST_VRAM_READ 0
+#define TRACE_ARTIST_VRAM_READ_ENABLED 0
+#define TRACE_ARTIST_VRAM_READ_BACKEND_DSTATE() (0)
+static inline void trace_artist_vram_read(unsigned int size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ARTIST_VRAM_WRITE 0
+#define TRACE_ARTIST_VRAM_WRITE_ENABLED 0
+#define TRACE_ARTIST_VRAM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_artist_vram_write(unsigned int size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ATI_MM_READ 0
+#define TRACE_ATI_MM_READ_ENABLED 0
+#define TRACE_ATI_MM_READ_BACKEND_DSTATE() (0)
+static inline void trace_ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_ATI_MM_WRITE 0
+#define TRACE_ATI_MM_WRITE_ENABLED 0
+#define TRACE_ATI_MM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_CG3_READ 0
+#define TRACE_CG3_READ_ENABLED 0
+#define TRACE_CG3_READ_BACKEND_DSTATE() (0)
+static inline void trace_cg3_read(uint32_t addr, uint32_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_CG3_WRITE 0
+#define TRACE_CG3_WRITE_ENABLED 0
+#define TRACE_CG3_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_cg3_write(uint32_t addr, uint32_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_DM163_ACTIVATED_ROWS 0
+#define TRACE_DM163_ACTIVATED_ROWS_ENABLED 0
+#define TRACE_DM163_ACTIVATED_ROWS_BACKEND_DSTATE() (0)
+static inline void trace_dm163_activated_rows(int new_state) {
+ (void)new_state;
+}
+#define TRACE_DM163_BITS_PPI 0
+#define TRACE_DM163_BITS_PPI_ENABLED 0
+#define TRACE_DM163_BITS_PPI_BACKEND_DSTATE() (0)
+static inline void trace_dm163_bits_ppi(unsigned dest_width) {
+ (void)dest_width;
+}
+#define TRACE_DM163_CHANNELS 0
+#define TRACE_DM163_CHANNELS_ENABLED 0
+#define TRACE_DM163_CHANNELS_BACKEND_DSTATE() (0)
+static inline void trace_dm163_channels(int channel, uint8_t value) {
+ (void)channel;
+ (void)value;
+}
+#define TRACE_DM163_DCK 0
+#define TRACE_DM163_DCK_ENABLED 0
+#define TRACE_DM163_DCK_BACKEND_DSTATE() (0)
+static inline void trace_dm163_dck(unsigned new_state) {
+ (void)new_state;
+}
+#define TRACE_DM163_EN_B 0
+#define TRACE_DM163_EN_B_ENABLED 0
+#define TRACE_DM163_EN_B_BACKEND_DSTATE() (0)
+static inline void trace_dm163_en_b(unsigned new_state) {
+ (void)new_state;
+}
+#define TRACE_DM163_LAT_B 0
+#define TRACE_DM163_LAT_B_ENABLED 0
+#define TRACE_DM163_LAT_B_BACKEND_DSTATE() (0)
+static inline void trace_dm163_lat_b(unsigned new_state) {
+ (void)new_state;
+}
+#define TRACE_DM163_LEDS 0
+#define TRACE_DM163_LEDS_ENABLED 0
+#define TRACE_DM163_LEDS_BACKEND_DSTATE() (0)
+static inline void trace_dm163_leds(int led, uint32_t value) {
+ (void)led;
+ (void)value;
+}
+#define TRACE_DM163_REDRAW 0
+#define TRACE_DM163_REDRAW_ENABLED 0
+#define TRACE_DM163_REDRAW_BACKEND_DSTATE() (0)
+static inline void trace_dm163_redraw(uint8_t redraw) {
+ (void)redraw;
+}
+#define TRACE_DM163_REFRESH_RATE 0
+#define TRACE_DM163_REFRESH_RATE_ENABLED 0
+#define TRACE_DM163_REFRESH_RATE_BACKEND_DSTATE() (0)
+static inline void trace_dm163_refresh_rate(uint32_t rr) {
+ (void)rr;
+}
+#define TRACE_DM163_RST_B 0
+#define TRACE_DM163_RST_B_ENABLED 0
+#define TRACE_DM163_RST_B_BACKEND_DSTATE() (0)
+static inline void trace_dm163_rst_b(unsigned new_state) {
+ (void)new_state;
+}
+#define TRACE_DM163_SELBK 0
+#define TRACE_DM163_SELBK_ENABLED 0
+#define TRACE_DM163_SELBK_BACKEND_DSTATE() (0)
+static inline void trace_dm163_selbk(unsigned new_state) {
+ (void)new_state;
+}
+#define TRACE_DM163_SIN 0
+#define TRACE_DM163_SIN_ENABLED 0
+#define TRACE_DM163_SIN_BACKEND_DSTATE() (0)
+static inline void trace_dm163_sin(unsigned new_state) {
+ (void)new_state;
+}
+#define TRACE_DPCD_READ 0
+#define TRACE_DPCD_READ_ENABLED 0
+#define TRACE_DPCD_READ_BACKEND_DSTATE() (0)
+static inline void trace_dpcd_read(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_DPCD_WRITE 0
+#define TRACE_DPCD_WRITE_ENABLED 0
+#define TRACE_DPCD_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_dpcd_write(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_G364FB_READ 0
+#define TRACE_G364FB_READ_ENABLED 0
+#define TRACE_G364FB_READ_BACKEND_DSTATE() (0)
+static inline void trace_g364fb_read(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_G364FB_WRITE 0
+#define TRACE_G364FB_WRITE_ENABLED 0
+#define TRACE_G364FB_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_g364fb_write(uint64_t addr, uint32_t new) {
+ (void)addr;
+ (void)new;
+}
+#define TRACE_JAZZ_LED_READ 0
+#define TRACE_JAZZ_LED_READ_ENABLED 0
+#define TRACE_JAZZ_LED_READ_BACKEND_DSTATE() (0)
+static inline void trace_jazz_led_read(uint64_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_JAZZ_LED_WRITE 0
+#define TRACE_JAZZ_LED_WRITE_ENABLED 0
+#define TRACE_JAZZ_LED_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_jazz_led_write(uint64_t addr, uint8_t new) {
+ (void)addr;
+ (void)new;
+}
+#define TRACE_MACFB_CTRL_READ 0
+#define TRACE_MACFB_CTRL_READ_ENABLED 0
+#define TRACE_MACFB_CTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_macfb_ctrl_read(uint64_t addr, uint64_t value, unsigned int size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_MACFB_CTRL_WRITE 0
+#define TRACE_MACFB_CTRL_WRITE_ENABLED 0
+#define TRACE_MACFB_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_macfb_ctrl_write(uint64_t addr, uint64_t value, unsigned int size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_MACFB_SENSE_READ 0
+#define TRACE_MACFB_SENSE_READ_ENABLED 0
+#define TRACE_MACFB_SENSE_READ_BACKEND_DSTATE() (0)
+static inline void trace_macfb_sense_read(uint32_t value) {
+ (void)value;
+}
+#define TRACE_MACFB_SENSE_WRITE 0
+#define TRACE_MACFB_SENSE_WRITE_ENABLED 0
+#define TRACE_MACFB_SENSE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_macfb_sense_write(uint32_t value) {
+ (void)value;
+}
+#define TRACE_MACFB_UPDATE_MODE 0
+#define TRACE_MACFB_UPDATE_MODE_ENABLED 0
+#define TRACE_MACFB_UPDATE_MODE_BACKEND_DSTATE() (0)
+static inline void trace_macfb_update_mode(uint32_t width, uint32_t height, uint8_t depth) {
+ (void)width;
+ (void)height;
+ (void)depth;
+}
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_CAPPED 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_CAPPED_ENABLED 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_CAPPED_BACKEND_DSTATE() (0)
+static inline void trace_qxl_client_monitors_config_capped(int qid, int requested, int limit) {
+ (void)qid;
+ (void)requested;
+ (void)limit;
+}
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_CRC 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_CRC_ENABLED 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_CRC_BACKEND_DSTATE() (0)
+static inline void trace_qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) {
+ (void)qid;
+ (void)size;
+ (void)crc32;
+}
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_UNSUPPORTED_BY_DEVICE 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_UNSUPPORTED_BY_DEVICE_ENABLED 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_UNSUPPORTED_BY_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_client_monitors_config_unsupported_by_device(int qid, int revision) {
+ (void)qid;
+ (void)revision;
+}
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_UNSUPPORTED_BY_GUEST 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_UNSUPPORTED_BY_GUEST_ENABLED 0
+#define TRACE_QXL_CLIENT_MONITORS_CONFIG_UNSUPPORTED_BY_GUEST_BACKEND_DSTATE() (0)
+static inline void trace_qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) {
+ (void)qid;
+ (void)int_mask;
+ (void)client_monitors_config;
+}
+#define TRACE_QXL_CREATE_GUEST_PRIMARY 0
+#define TRACE_QXL_CREATE_GUEST_PRIMARY_ENABLED 0
+#define TRACE_QXL_CREATE_GUEST_PRIMARY_BACKEND_DSTATE() (0)
+static inline void trace_qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) {
+ (void)qid;
+ (void)width;
+ (void)height;
+ (void)mem;
+ (void)format;
+ (void)position;
+}
+#define TRACE_QXL_CREATE_GUEST_PRIMARY_REST 0
+#define TRACE_QXL_CREATE_GUEST_PRIMARY_REST_ENABLED 0
+#define TRACE_QXL_CREATE_GUEST_PRIMARY_REST_BACKEND_DSTATE() (0)
+static inline void trace_qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) {
+ (void)qid;
+ (void)stride;
+ (void)type;
+ (void)flags;
+}
+#define TRACE_QXL_DESTROY_PRIMARY 0
+#define TRACE_QXL_DESTROY_PRIMARY_ENABLED 0
+#define TRACE_QXL_DESTROY_PRIMARY_BACKEND_DSTATE() (0)
+static inline void trace_qxl_destroy_primary(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_ENTER_VGA_MODE 0
+#define TRACE_QXL_ENTER_VGA_MODE_ENABLED 0
+#define TRACE_QXL_ENTER_VGA_MODE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_enter_vga_mode(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_EXIT_VGA_MODE 0
+#define TRACE_QXL_EXIT_VGA_MODE_ENABLED 0
+#define TRACE_QXL_EXIT_VGA_MODE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_exit_vga_mode(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_HARD_RESET 0
+#define TRACE_QXL_HARD_RESET_ENABLED 0
+#define TRACE_QXL_HARD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_qxl_hard_reset(int qid, int64_t loadvm) {
+ (void)qid;
+ (void)loadvm;
+}
+#define TRACE_QXL_INTERFACE_ASYNC_COMPLETE_IO 0
+#define TRACE_QXL_INTERFACE_ASYNC_COMPLETE_IO_ENABLED 0
+#define TRACE_QXL_INTERFACE_ASYNC_COMPLETE_IO_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) {
+ (void)qid;
+ (void)current_async;
+ (void)cookie;
+}
+#define TRACE_QXL_INTERFACE_ATTACH_WORKER 0
+#define TRACE_QXL_INTERFACE_ATTACH_WORKER_ENABLED 0
+#define TRACE_QXL_INTERFACE_ATTACH_WORKER_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_attach_worker(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_INTERFACE_GET_INIT_INFO 0
+#define TRACE_QXL_INTERFACE_GET_INIT_INFO_ENABLED 0
+#define TRACE_QXL_INTERFACE_GET_INIT_INFO_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_get_init_info(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_INTERFACE_SET_COMPRESSION_LEVEL 0
+#define TRACE_QXL_INTERFACE_SET_COMPRESSION_LEVEL_ENABLED 0
+#define TRACE_QXL_INTERFACE_SET_COMPRESSION_LEVEL_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_set_compression_level(int qid, int64_t level) {
+ (void)qid;
+ (void)level;
+}
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_ENABLED 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) {
+ (void)qid;
+ (void)surface_id;
+ (void)dirty_left;
+ (void)dirty_right;
+ (void)dirty_top;
+ (void)dirty_bottom;
+}
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_OVERFLOW 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_OVERFLOW_ENABLED 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_update_area_complete_overflow(int qid, int max) {
+ (void)qid;
+ (void)max;
+}
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_REST 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_REST_ENABLED 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_REST_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) {
+ (void)qid;
+ (void)num_updated_rects;
+}
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_SCHEDULE_BH 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_SCHEDULE_BH_ENABLED 0
+#define TRACE_QXL_INTERFACE_UPDATE_AREA_COMPLETE_SCHEDULE_BH_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) {
+ (void)qid;
+ (void)num_dirty;
+}
+#define TRACE_QXL_INTERRUPT_CLIENT_MONITORS_CONFIG 0
+#define TRACE_QXL_INTERRUPT_CLIENT_MONITORS_CONFIG_ENABLED 0
+#define TRACE_QXL_INTERRUPT_CLIENT_MONITORS_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) {
+ (void)qid;
+ (void)num_heads;
+ (void)heads;
+}
+#define TRACE_QXL_IO_DESTROY_PRIMARY_IGNORED 0
+#define TRACE_QXL_IO_DESTROY_PRIMARY_IGNORED_ENABLED 0
+#define TRACE_QXL_IO_DESTROY_PRIMARY_IGNORED_BACKEND_DSTATE() (0)
+static inline void trace_qxl_io_destroy_primary_ignored(int qid, const char *mode) {
+ (void)qid;
+ (void)mode;
+}
+#define TRACE_QXL_IO_LOG 0
+#define TRACE_QXL_IO_LOG_ENABLED 0
+#define TRACE_QXL_IO_LOG_BACKEND_DSTATE() (0)
+static inline void trace_qxl_io_log(int qid, const char *log_buf) {
+ (void)qid;
+ (void)log_buf;
+}
+#define TRACE_QXL_IO_READ_UNEXPECTED 0
+#define TRACE_QXL_IO_READ_UNEXPECTED_ENABLED 0
+#define TRACE_QXL_IO_READ_UNEXPECTED_BACKEND_DSTATE() (0)
+static inline void trace_qxl_io_read_unexpected(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_IO_UNEXPECTED_VGA_MODE 0
+#define TRACE_QXL_IO_UNEXPECTED_VGA_MODE_ENABLED 0
+#define TRACE_QXL_IO_UNEXPECTED_VGA_MODE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) {
+ (void)qid;
+ (void)addr;
+ (void)val;
+ (void)desc;
+}
+#define TRACE_QXL_IO_WRITE 0
+#define TRACE_QXL_IO_WRITE_ENABLED 0
+#define TRACE_QXL_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) {
+ (void)qid;
+ (void)mode;
+ (void)addr;
+ (void)aname;
+ (void)val;
+ (void)size;
+ (void)async;
+}
+#define TRACE_QXL_MEMSLOT_ADD_GUEST 0
+#define TRACE_QXL_MEMSLOT_ADD_GUEST_ENABLED 0
+#define TRACE_QXL_MEMSLOT_ADD_GUEST_BACKEND_DSTATE() (0)
+static inline void trace_qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) {
+ (void)qid;
+ (void)slot_id;
+ (void)guest_start;
+ (void)guest_end;
+}
+#define TRACE_QXL_POST_LOAD 0
+#define TRACE_QXL_POST_LOAD_ENABLED 0
+#define TRACE_QXL_POST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_qxl_post_load(int qid, const char *mode) {
+ (void)qid;
+ (void)mode;
+}
+#define TRACE_QXL_PRE_LOAD 0
+#define TRACE_QXL_PRE_LOAD_ENABLED 0
+#define TRACE_QXL_PRE_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_qxl_pre_load(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_PRE_SAVE 0
+#define TRACE_QXL_PRE_SAVE_ENABLED 0
+#define TRACE_QXL_PRE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_pre_save(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_RENDER_BLIT 0
+#define TRACE_QXL_RENDER_BLIT_ENABLED 0
+#define TRACE_QXL_RENDER_BLIT_BACKEND_DSTATE() (0)
+static inline void trace_qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) {
+ (void)stride;
+ (void)left;
+ (void)right;
+ (void)top;
+ (void)bottom;
+}
+#define TRACE_QXL_RENDER_GUEST_PRIMARY_RESIZED 0
+#define TRACE_QXL_RENDER_GUEST_PRIMARY_RESIZED_ENABLED 0
+#define TRACE_QXL_RENDER_GUEST_PRIMARY_RESIZED_BACKEND_DSTATE() (0)
+static inline void trace_qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) {
+ (void)width;
+ (void)height;
+ (void)stride;
+ (void)bytes_pp;
+ (void)bits_pp;
+}
+#define TRACE_QXL_RENDER_UPDATE_AREA_DONE 0
+#define TRACE_QXL_RENDER_UPDATE_AREA_DONE_ENABLED 0
+#define TRACE_QXL_RENDER_UPDATE_AREA_DONE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_render_update_area_done(void *cookie) {
+ (void)cookie;
+}
+#define TRACE_QXL_RESET_SURFACES 0
+#define TRACE_QXL_RESET_SURFACES_ENABLED 0
+#define TRACE_QXL_RESET_SURFACES_BACKEND_DSTATE() (0)
+static inline void trace_qxl_reset_surfaces(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_RING_COMMAND_CHECK 0
+#define TRACE_QXL_RING_COMMAND_CHECK_ENABLED 0
+#define TRACE_QXL_RING_COMMAND_CHECK_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_command_check(int qid, const char *mode) {
+ (void)qid;
+ (void)mode;
+}
+#define TRACE_QXL_RING_COMMAND_GET 0
+#define TRACE_QXL_RING_COMMAND_GET_ENABLED 0
+#define TRACE_QXL_RING_COMMAND_GET_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_command_get(int qid, const char *mode) {
+ (void)qid;
+ (void)mode;
+}
+#define TRACE_QXL_RING_COMMAND_REQ_NOTIFICATION 0
+#define TRACE_QXL_RING_COMMAND_REQ_NOTIFICATION_ENABLED 0
+#define TRACE_QXL_RING_COMMAND_REQ_NOTIFICATION_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_command_req_notification(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_RING_CURSOR_CHECK 0
+#define TRACE_QXL_RING_CURSOR_CHECK_ENABLED 0
+#define TRACE_QXL_RING_CURSOR_CHECK_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_cursor_check(int qid, const char *mode) {
+ (void)qid;
+ (void)mode;
+}
+#define TRACE_QXL_RING_CURSOR_GET 0
+#define TRACE_QXL_RING_CURSOR_GET_ENABLED 0
+#define TRACE_QXL_RING_CURSOR_GET_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_cursor_get(int qid, const char *mode) {
+ (void)qid;
+ (void)mode;
+}
+#define TRACE_QXL_RING_CURSOR_REQ_NOTIFICATION 0
+#define TRACE_QXL_RING_CURSOR_REQ_NOTIFICATION_ENABLED 0
+#define TRACE_QXL_RING_CURSOR_REQ_NOTIFICATION_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_cursor_req_notification(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_RING_RES_PUSH 0
+#define TRACE_QXL_RING_RES_PUSH_ENABLED 0
+#define TRACE_QXL_RING_RES_PUSH_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) {
+ (void)qid;
+ (void)mode;
+ (void)surface_count;
+ (void)free_res;
+ (void)last_release;
+ (void)notify;
+}
+#define TRACE_QXL_RING_RES_PUSH_REST 0
+#define TRACE_QXL_RING_RES_PUSH_REST_ENABLED 0
+#define TRACE_QXL_RING_RES_PUSH_REST_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) {
+ (void)qid;
+ (void)ring_has;
+ (void)ring_size;
+ (void)prod;
+ (void)cons;
+}
+#define TRACE_QXL_RING_RES_PUT 0
+#define TRACE_QXL_RING_RES_PUT_ENABLED 0
+#define TRACE_QXL_RING_RES_PUT_BACKEND_DSTATE() (0)
+static inline void trace_qxl_ring_res_put(int qid, uint32_t free_res) {
+ (void)qid;
+ (void)free_res;
+}
+#define TRACE_QXL_SEND_EVENTS 0
+#define TRACE_QXL_SEND_EVENTS_ENABLED 0
+#define TRACE_QXL_SEND_EVENTS_BACKEND_DSTATE() (0)
+static inline void trace_qxl_send_events(int qid, uint32_t events) {
+ (void)qid;
+ (void)events;
+}
+#define TRACE_QXL_SEND_EVENTS_VM_STOPPED 0
+#define TRACE_QXL_SEND_EVENTS_VM_STOPPED_ENABLED 0
+#define TRACE_QXL_SEND_EVENTS_VM_STOPPED_BACKEND_DSTATE() (0)
+static inline void trace_qxl_send_events_vm_stopped(int qid, uint32_t events) {
+ (void)qid;
+ (void)events;
+}
+#define TRACE_QXL_SET_CLIENT_CAPABILITIES_UNSUPPORTED_BY_REVISION 0
+#define TRACE_QXL_SET_CLIENT_CAPABILITIES_UNSUPPORTED_BY_REVISION_ENABLED 0
+#define TRACE_QXL_SET_CLIENT_CAPABILITIES_UNSUPPORTED_BY_REVISION_BACKEND_DSTATE() (0)
+static inline void trace_qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) {
+ (void)qid;
+ (void)revision;
+}
+#define TRACE_QXL_SET_GUEST_BUG 0
+#define TRACE_QXL_SET_GUEST_BUG_ENABLED 0
+#define TRACE_QXL_SET_GUEST_BUG_BACKEND_DSTATE() (0)
+static inline void trace_qxl_set_guest_bug(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SET_MODE 0
+#define TRACE_QXL_SET_MODE_ENABLED 0
+#define TRACE_QXL_SET_MODE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) {
+ (void)qid;
+ (void)modenr;
+ (void)x_res;
+ (void)y_res;
+ (void)bits;
+ (void)devmem;
+}
+#define TRACE_QXL_SOFT_RESET 0
+#define TRACE_QXL_SOFT_RESET_ENABLED 0
+#define TRACE_QXL_SOFT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_qxl_soft_reset(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SPICE_DESTROY_SURFACE_WAIT 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACE_WAIT_ENABLED 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACE_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) {
+ (void)qid;
+ (void)id;
+ (void)async;
+}
+#define TRACE_QXL_SPICE_DESTROY_SURFACE_WAIT_COMPLETE 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACE_WAIT_COMPLETE_ENABLED 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACE_WAIT_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) {
+ (void)qid;
+ (void)id;
+}
+#define TRACE_QXL_SPICE_DESTROY_SURFACES 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACES_ENABLED 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACES_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_destroy_surfaces(int qid, int async) {
+ (void)qid;
+ (void)async;
+}
+#define TRACE_QXL_SPICE_DESTROY_SURFACES_COMPLETE 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACES_COMPLETE_ENABLED 0
+#define TRACE_QXL_SPICE_DESTROY_SURFACES_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_destroy_surfaces_complete(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SPICE_FLUSH_SURFACES_ASYNC 0
+#define TRACE_QXL_SPICE_FLUSH_SURFACES_ASYNC_ENABLED 0
+#define TRACE_QXL_SPICE_FLUSH_SURFACES_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) {
+ (void)qid;
+ (void)surface_count;
+ (void)num_free_res;
+}
+#define TRACE_QXL_SPICE_LOADVM_COMMANDS 0
+#define TRACE_QXL_SPICE_LOADVM_COMMANDS_ENABLED 0
+#define TRACE_QXL_SPICE_LOADVM_COMMANDS_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) {
+ (void)qid;
+ (void)ext;
+ (void)count;
+}
+#define TRACE_QXL_SPICE_MONITORS_CONFIG 0
+#define TRACE_QXL_SPICE_MONITORS_CONFIG_ENABLED 0
+#define TRACE_QXL_SPICE_MONITORS_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_monitors_config(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SPICE_OOM 0
+#define TRACE_QXL_SPICE_OOM_ENABLED 0
+#define TRACE_QXL_SPICE_OOM_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_oom(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SPICE_RESET_CURSOR 0
+#define TRACE_QXL_SPICE_RESET_CURSOR_ENABLED 0
+#define TRACE_QXL_SPICE_RESET_CURSOR_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_reset_cursor(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SPICE_RESET_IMAGE_CACHE 0
+#define TRACE_QXL_SPICE_RESET_IMAGE_CACHE_ENABLED 0
+#define TRACE_QXL_SPICE_RESET_IMAGE_CACHE_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_reset_image_cache(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SPICE_RESET_MEMSLOTS 0
+#define TRACE_QXL_SPICE_RESET_MEMSLOTS_ENABLED 0
+#define TRACE_QXL_SPICE_RESET_MEMSLOTS_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_reset_memslots(int qid) {
+ (void)qid;
+}
+#define TRACE_QXL_SPICE_UPDATE_AREA 0
+#define TRACE_QXL_SPICE_UPDATE_AREA_ENABLED 0
+#define TRACE_QXL_SPICE_UPDATE_AREA_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) {
+ (void)qid;
+ (void)surface_id;
+ (void)left;
+ (void)right;
+ (void)top;
+ (void)bottom;
+}
+#define TRACE_QXL_SPICE_UPDATE_AREA_REST 0
+#define TRACE_QXL_SPICE_UPDATE_AREA_REST_ENABLED 0
+#define TRACE_QXL_SPICE_UPDATE_AREA_REST_BACKEND_DSTATE() (0)
+static inline void trace_qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) {
+ (void)qid;
+ (void)num_dirty_rects;
+ (void)clear_dirty_region;
+}
+#define TRACE_QXL_SURFACES_DIRTY 0
+#define TRACE_QXL_SURFACES_DIRTY_ENABLED 0
+#define TRACE_QXL_SURFACES_DIRTY_BACKEND_DSTATE() (0)
+static inline void trace_qxl_surfaces_dirty(int qid, uint64_t offset, uint64_t size) {
+ (void)qid;
+ (void)offset;
+ (void)size;
+}
+#define TRACE_SII9022_READ_REG 0
+#define TRACE_SII9022_READ_REG_ENABLED 0
+#define TRACE_SII9022_READ_REG_BACKEND_DSTATE() (0)
+static inline void trace_sii9022_read_reg(uint8_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SII9022_SWITCH_MODE 0
+#define TRACE_SII9022_SWITCH_MODE_ENABLED 0
+#define TRACE_SII9022_SWITCH_MODE_BACKEND_DSTATE() (0)
+static inline void trace_sii9022_switch_mode(const char *mode) {
+ (void)mode;
+}
+#define TRACE_SII9022_WRITE_REG 0
+#define TRACE_SII9022_WRITE_REG_ENABLED 0
+#define TRACE_SII9022_WRITE_REG_BACKEND_DSTATE() (0)
+static inline void trace_sii9022_write_reg(uint8_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_2D_ENGINE_READ 0
+#define TRACE_SM501_2D_ENGINE_READ_ENABLED 0
+#define TRACE_SM501_2D_ENGINE_READ_BACKEND_DSTATE() (0)
+static inline void trace_sm501_2d_engine_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_2D_ENGINE_WRITE 0
+#define TRACE_SM501_2D_ENGINE_WRITE_ENABLED 0
+#define TRACE_SM501_2D_ENGINE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sm501_2d_engine_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_DISP_CTRL_READ 0
+#define TRACE_SM501_DISP_CTRL_READ_ENABLED 0
+#define TRACE_SM501_DISP_CTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_sm501_disp_ctrl_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_DISP_CTRL_WRITE 0
+#define TRACE_SM501_DISP_CTRL_WRITE_ENABLED 0
+#define TRACE_SM501_DISP_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sm501_disp_ctrl_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_I2C_READ 0
+#define TRACE_SM501_I2C_READ_ENABLED 0
+#define TRACE_SM501_I2C_READ_BACKEND_DSTATE() (0)
+static inline void trace_sm501_i2c_read(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_I2C_WRITE 0
+#define TRACE_SM501_I2C_WRITE_ENABLED 0
+#define TRACE_SM501_I2C_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sm501_i2c_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_PALETTE_READ 0
+#define TRACE_SM501_PALETTE_READ_ENABLED 0
+#define TRACE_SM501_PALETTE_READ_BACKEND_DSTATE() (0)
+static inline void trace_sm501_palette_read(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_SM501_PALETTE_WRITE 0
+#define TRACE_SM501_PALETTE_WRITE_ENABLED 0
+#define TRACE_SM501_PALETTE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sm501_palette_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_SYSTEM_CONFIG_READ 0
+#define TRACE_SM501_SYSTEM_CONFIG_READ_ENABLED 0
+#define TRACE_SM501_SYSTEM_CONFIG_READ_BACKEND_DSTATE() (0)
+static inline void trace_sm501_system_config_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SM501_SYSTEM_CONFIG_WRITE 0
+#define TRACE_SM501_SYSTEM_CONFIG_WRITE_ENABLED 0
+#define TRACE_SM501_SYSTEM_CONFIG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sm501_system_config_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VGA_CIRRUS_BITBLT_START 0
+#define TRACE_VGA_CIRRUS_BITBLT_START_ENABLED 0
+#define TRACE_VGA_CIRRUS_BITBLT_START_BACKEND_DSTATE() (0)
+static inline void trace_vga_cirrus_bitblt_start(uint8_t blt_rop, uint8_t blt_mode, uint8_t blt_modeext, int blt_width, int blt_height, int blt_dstpitch, int blt_srcpitch, uint32_t blt_dstaddr, uint32_t blt_srcaddr, uint8_t gr_val) {
+ (void)blt_rop;
+ (void)blt_mode;
+ (void)blt_modeext;
+ (void)blt_width;
+ (void)blt_height;
+ (void)blt_dstpitch;
+ (void)blt_srcpitch;
+ (void)blt_dstaddr;
+ (void)blt_srcaddr;
+ (void)gr_val;
+}
+#define TRACE_VGA_CIRRUS_READ_IO 0
+#define TRACE_VGA_CIRRUS_READ_IO_ENABLED 0
+#define TRACE_VGA_CIRRUS_READ_IO_BACKEND_DSTATE() (0)
+static inline void trace_vga_cirrus_read_io(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VGA_CIRRUS_WRITE_BLT 0
+#define TRACE_VGA_CIRRUS_WRITE_BLT_ENABLED 0
+#define TRACE_VGA_CIRRUS_WRITE_BLT_BACKEND_DSTATE() (0)
+static inline void trace_vga_cirrus_write_blt(uint32_t offset, uint32_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_VGA_CIRRUS_WRITE_GR 0
+#define TRACE_VGA_CIRRUS_WRITE_GR_ENABLED 0
+#define TRACE_VGA_CIRRUS_WRITE_GR_BACKEND_DSTATE() (0)
+static inline void trace_vga_cirrus_write_gr(uint8_t index, uint8_t val) {
+ (void)index;
+ (void)val;
+}
+#define TRACE_VGA_CIRRUS_WRITE_IO 0
+#define TRACE_VGA_CIRRUS_WRITE_IO_ENABLED 0
+#define TRACE_VGA_CIRRUS_WRITE_IO_BACKEND_DSTATE() (0)
+static inline void trace_vga_cirrus_write_io(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VGA_STD_READ_IO 0
+#define TRACE_VGA_STD_READ_IO_ENABLED 0
+#define TRACE_VGA_STD_READ_IO_BACKEND_DSTATE() (0)
+static inline void trace_vga_std_read_io(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VGA_STD_WRITE_IO 0
+#define TRACE_VGA_STD_WRITE_IO_ENABLED 0
+#define TRACE_VGA_STD_WRITE_IO_BACKEND_DSTATE() (0)
+static inline void trace_vga_std_write_io(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VGA_VBE_READ 0
+#define TRACE_VGA_VBE_READ_ENABLED 0
+#define TRACE_VGA_VBE_READ_BACKEND_DSTATE() (0)
+static inline void trace_vga_vbe_read(uint32_t index, uint32_t val) {
+ (void)index;
+ (void)val;
+}
+#define TRACE_VGA_VBE_WRITE 0
+#define TRACE_VGA_VBE_WRITE_ENABLED 0
+#define TRACE_VGA_VBE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vga_vbe_write(uint32_t index, uint32_t val) {
+ (void)index;
+ (void)val;
+}
+#define TRACE_VIRTIO_GPU_CMD_CTX_CREATE 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_CREATE_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) {
+ (void)ctx;
+ (void)name;
+}
+#define TRACE_VIRTIO_GPU_CMD_CTX_DESTROY 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_DESTROY_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_DESTROY_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_ctx_destroy(uint32_t ctx) {
+ (void)ctx;
+}
+#define TRACE_VIRTIO_GPU_CMD_CTX_RES_ATTACH 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_RES_ATTACH_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_RES_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) {
+ (void)ctx;
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_CTX_RES_DETACH 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_RES_DETACH_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_RES_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) {
+ (void)ctx;
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_CTX_SUBMIT 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_SUBMIT_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_CTX_SUBMIT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) {
+ (void)ctx;
+ (void)size;
+}
+#define TRACE_VIRTIO_GPU_CMD_GET_DISPLAY_INFO 0
+#define TRACE_VIRTIO_GPU_CMD_GET_DISPLAY_INFO_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_GET_DISPLAY_INFO_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_get_display_info(void) {
+}
+#define TRACE_VIRTIO_GPU_CMD_GET_EDID 0
+#define TRACE_VIRTIO_GPU_CMD_GET_EDID_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_GET_EDID_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_get_edid(uint32_t scanout) {
+ (void)scanout;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_BACK_ATTACH 0
+#define TRACE_VIRTIO_GPU_CMD_RES_BACK_ATTACH_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_BACK_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_back_attach(uint32_t res) {
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_BACK_DETACH 0
+#define TRACE_VIRTIO_GPU_CMD_RES_BACK_DETACH_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_BACK_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_back_detach(uint32_t res) {
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_2D 0
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_2D_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_2D_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) {
+ (void)res;
+ (void)fmt;
+ (void)w;
+ (void)h;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_3D 0
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_3D_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_3D_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) {
+ (void)res;
+ (void)fmt;
+ (void)w;
+ (void)h;
+ (void)d;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_BLOB 0
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_BLOB_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_CREATE_BLOB_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_create_blob(uint32_t res, uint64_t size) {
+ (void)res;
+ (void)size;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_FLUSH 0
+#define TRACE_VIRTIO_GPU_CMD_RES_FLUSH_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) {
+ (void)res;
+ (void)w;
+ (void)h;
+ (void)x;
+ (void)y;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_MAP_BLOB 0
+#define TRACE_VIRTIO_GPU_CMD_RES_MAP_BLOB_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_MAP_BLOB_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_map_blob(uint32_t res, void *vmr, void *mr) {
+ (void)res;
+ (void)vmr;
+ (void)mr;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_UNMAP_BLOB 0
+#define TRACE_VIRTIO_GPU_CMD_RES_UNMAP_BLOB_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_UNMAP_BLOB_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_unmap_blob(uint32_t res, void *mr, bool finish_unmapping) {
+ (void)res;
+ (void)mr;
+ (void)finish_unmapping;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_UNREF 0
+#define TRACE_VIRTIO_GPU_CMD_RES_UNREF_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_UNREF_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_unref(uint32_t res) {
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_FROMH_3D 0
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_FROMH_3D_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_FROMH_3D_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) {
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_TOH_2D 0
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_TOH_2D_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_TOH_2D_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) {
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_TOH_3D 0
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_TOH_3D_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_RES_XFER_TOH_3D_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) {
+ (void)res;
+}
+#define TRACE_VIRTIO_GPU_CMD_SET_SCANOUT 0
+#define TRACE_VIRTIO_GPU_CMD_SET_SCANOUT_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_SET_SCANOUT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) {
+ (void)id;
+ (void)res;
+ (void)w;
+ (void)h;
+ (void)x;
+ (void)y;
+}
+#define TRACE_VIRTIO_GPU_CMD_SET_SCANOUT_BLOB 0
+#define TRACE_VIRTIO_GPU_CMD_SET_SCANOUT_BLOB_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_SET_SCANOUT_BLOB_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_set_scanout_blob(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) {
+ (void)id;
+ (void)res;
+ (void)w;
+ (void)h;
+ (void)x;
+ (void)y;
+}
+#define TRACE_VIRTIO_GPU_CMD_SUSPENDED 0
+#define TRACE_VIRTIO_GPU_CMD_SUSPENDED_ENABLED 0
+#define TRACE_VIRTIO_GPU_CMD_SUSPENDED_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_cmd_suspended(uint32_t cmd) {
+ (void)cmd;
+}
+#define TRACE_VIRTIO_GPU_DEC_INFLIGHT_FENCES 0
+#define TRACE_VIRTIO_GPU_DEC_INFLIGHT_FENCES_ENABLED 0
+#define TRACE_VIRTIO_GPU_DEC_INFLIGHT_FENCES_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_dec_inflight_fences(uint32_t inflight) {
+ (void)inflight;
+}
+#define TRACE_VIRTIO_GPU_FEATURES 0
+#define TRACE_VIRTIO_GPU_FEATURES_ENABLED 0
+#define TRACE_VIRTIO_GPU_FEATURES_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_features(bool virgl) {
+ (void)virgl;
+}
+#define TRACE_VIRTIO_GPU_FENCE_CTRL 0
+#define TRACE_VIRTIO_GPU_FENCE_CTRL_ENABLED 0
+#define TRACE_VIRTIO_GPU_FENCE_CTRL_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) {
+ (void)fence;
+ (void)type;
+}
+#define TRACE_VIRTIO_GPU_FENCE_RESP 0
+#define TRACE_VIRTIO_GPU_FENCE_RESP_ENABLED 0
+#define TRACE_VIRTIO_GPU_FENCE_RESP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_fence_resp(uint64_t fence) {
+ (void)fence;
+}
+#define TRACE_VIRTIO_GPU_INC_INFLIGHT_FENCES 0
+#define TRACE_VIRTIO_GPU_INC_INFLIGHT_FENCES_ENABLED 0
+#define TRACE_VIRTIO_GPU_INC_INFLIGHT_FENCES_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_inc_inflight_fences(uint32_t inflight) {
+ (void)inflight;
+}
+#define TRACE_VIRTIO_GPU_UPDATE_CURSOR 0
+#define TRACE_VIRTIO_GPU_UPDATE_CURSOR_ENABLED 0
+#define TRACE_VIRTIO_GPU_UPDATE_CURSOR_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) {
+ (void)scanout;
+ (void)x;
+ (void)y;
+ (void)type;
+ (void)res;
+}
+#define TRACE_VMWARE_PALETTE_READ 0
+#define TRACE_VMWARE_PALETTE_READ_ENABLED 0
+#define TRACE_VMWARE_PALETTE_READ_BACKEND_DSTATE() (0)
+static inline void trace_vmware_palette_read(uint32_t index, uint32_t value) {
+ (void)index;
+ (void)value;
+}
+#define TRACE_VMWARE_PALETTE_WRITE 0
+#define TRACE_VMWARE_PALETTE_WRITE_ENABLED 0
+#define TRACE_VMWARE_PALETTE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vmware_palette_write(uint32_t index, uint32_t value) {
+ (void)index;
+ (void)value;
+}
+#define TRACE_VMWARE_SCRATCH_READ 0
+#define TRACE_VMWARE_SCRATCH_READ_ENABLED 0
+#define TRACE_VMWARE_SCRATCH_READ_BACKEND_DSTATE() (0)
+static inline void trace_vmware_scratch_read(uint32_t index, uint32_t value) {
+ (void)index;
+ (void)value;
+}
+#define TRACE_VMWARE_SCRATCH_WRITE 0
+#define TRACE_VMWARE_SCRATCH_WRITE_ENABLED 0
+#define TRACE_VMWARE_SCRATCH_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vmware_scratch_write(uint32_t index, uint32_t value) {
+ (void)index;
+ (void)value;
+}
+#define TRACE_VMWARE_SETMODE 0
+#define TRACE_VMWARE_SETMODE_ENABLED 0
+#define TRACE_VMWARE_SETMODE_BACKEND_DSTATE() (0)
+static inline void trace_vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) {
+ (void)w;
+ (void)h;
+ (void)bpp;
+}
+#define TRACE_VMWARE_UPDATE_RECT_DELAYED_FLUSH 0
+#define TRACE_VMWARE_UPDATE_RECT_DELAYED_FLUSH_ENABLED 0
+#define TRACE_VMWARE_UPDATE_RECT_DELAYED_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_vmware_update_rect_delayed_flush(void) {
+}
+#define TRACE_VMWARE_VALUE_READ 0
+#define TRACE_VMWARE_VALUE_READ_ENABLED 0
+#define TRACE_VMWARE_VALUE_READ_BACKEND_DSTATE() (0)
+static inline void trace_vmware_value_read(uint32_t index, uint32_t value) {
+ (void)index;
+ (void)value;
+}
+#define TRACE_VMWARE_VALUE_WRITE 0
+#define TRACE_VMWARE_VALUE_WRITE_ENABLED 0
+#define TRACE_VMWARE_VALUE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vmware_value_write(uint32_t index, uint32_t value) {
+ (void)index;
+ (void)value;
+}
+#define TRACE_VMWARE_VERIFY_RECT_GREATER_THAN_BOUND 0
+#define TRACE_VMWARE_VERIFY_RECT_GREATER_THAN_BOUND_ENABLED 0
+#define TRACE_VMWARE_VERIFY_RECT_GREATER_THAN_BOUND_BACKEND_DSTATE() (0)
+static inline void trace_vmware_verify_rect_greater_than_bound(const char *name, const char *param, int bound, int x) {
+ (void)name;
+ (void)param;
+ (void)bound;
+ (void)x;
+}
+#define TRACE_VMWARE_VERIFY_RECT_LESS_THAN_ZERO 0
+#define TRACE_VMWARE_VERIFY_RECT_LESS_THAN_ZERO_ENABLED 0
+#define TRACE_VMWARE_VERIFY_RECT_LESS_THAN_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_vmware_verify_rect_less_than_zero(const char *name, const char *param, int x) {
+ (void)name;
+ (void)param;
+ (void)x;
+}
+#define TRACE_VMWARE_VERIFY_RECT_SURFACE_BOUND_EXCEEDED 0
+#define TRACE_VMWARE_VERIFY_RECT_SURFACE_BOUND_EXCEEDED_ENABLED 0
+#define TRACE_VMWARE_VERIFY_RECT_SURFACE_BOUND_EXCEEDED_BACKEND_DSTATE() (0)
+static inline void trace_vmware_verify_rect_surface_bound_exceeded(const char *name, const char *component, int bound, const char *param1, int value1, const char *param2, int value2) {
+ (void)name;
+ (void)component;
+ (void)bound;
+ (void)param1;
+ (void)value1;
+ (void)param2;
+ (void)value2;
+}
+#define TRACE_XENFB_INPUT_CONNECTED 0
+#define TRACE_XENFB_INPUT_CONNECTED_ENABLED 0
+#define TRACE_XENFB_INPUT_CONNECTED_BACKEND_DSTATE() (0)
+static inline void trace_xenfb_input_connected(void *xendev, int abs_pointer_wanted) {
+ (void)xendev;
+ (void)abs_pointer_wanted;
+}
+#define TRACE_XENFB_KEY_EVENT 0
+#define TRACE_XENFB_KEY_EVENT_ENABLED 0
+#define TRACE_XENFB_KEY_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_xenfb_key_event(void *opaque, int scancode, int button_state) {
+ (void)opaque;
+ (void)scancode;
+ (void)button_state;
+}
+#define TRACE_XENFB_MOUSE_EVENT 0
+#define TRACE_XENFB_MOUSE_EVENT_ENABLED 0
+#define TRACE_XENFB_MOUSE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) {
+ (void)opaque;
+ (void)dx;
+ (void)dy;
+ (void)dz;
+ (void)button_state;
+ (void)abs_pointer_wanted;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_dma.h b/trace/trace-hw_dma.h
new file mode 100644
index 0000000000..8f6cd018c1
--- /dev/null
+++ b/trace/trace-hw_dma.h
@@ -0,0 +1,258 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_DMA_H
+#define TRACE_TRACE_HW_DMA_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ESPDMA_MEMORY_READ 0
+#define TRACE_ESPDMA_MEMORY_READ_ENABLED 0
+#define TRACE_ESPDMA_MEMORY_READ_BACKEND_DSTATE() (0)
+static inline void trace_espdma_memory_read(uint32_t addr, int len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_ESPDMA_MEMORY_WRITE 0
+#define TRACE_ESPDMA_MEMORY_WRITE_ENABLED 0
+#define TRACE_ESPDMA_MEMORY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_espdma_memory_write(uint32_t addr, int len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_I8257_UNREGISTERED_DMA 0
+#define TRACE_I8257_UNREGISTERED_DMA_ENABLED 0
+#define TRACE_I8257_UNREGISTERED_DMA_BACKEND_DSTATE() (0)
+static inline void trace_i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) {
+ (void)nchan;
+ (void)dma_pos;
+ (void)dma_len;
+}
+#define TRACE_JAZZIO_READ 0
+#define TRACE_JAZZIO_READ_ENABLED 0
+#define TRACE_JAZZIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_jazzio_read(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_JAZZIO_WRITE 0
+#define TRACE_JAZZIO_WRITE_ENABLED 0
+#define TRACE_JAZZIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_jazzio_write(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LEDMA_MEMORY_READ 0
+#define TRACE_LEDMA_MEMORY_READ_ENABLED 0
+#define TRACE_LEDMA_MEMORY_READ_BACKEND_DSTATE() (0)
+static inline void trace_ledma_memory_read(uint64_t addr, int len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_LEDMA_MEMORY_WRITE 0
+#define TRACE_LEDMA_MEMORY_WRITE_ENABLED 0
+#define TRACE_LEDMA_MEMORY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ledma_memory_write(uint64_t addr, int len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_PL330_CHAN_EXEC_UNDEF 0
+#define TRACE_PL330_CHAN_EXEC_UNDEF_ENABLED 0
+#define TRACE_PL330_CHAN_EXEC_UNDEF_BACKEND_DSTATE() (0)
+static inline void trace_pl330_chan_exec_undef(void) {
+}
+#define TRACE_PL330_DEBUG_EXEC 0
+#define TRACE_PL330_DEBUG_EXEC_ENABLED 0
+#define TRACE_PL330_DEBUG_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_pl330_debug_exec(uint8_t ch) {
+ (void)ch;
+}
+#define TRACE_PL330_DEBUG_EXEC_STALL 0
+#define TRACE_PL330_DEBUG_EXEC_STALL_ENABLED 0
+#define TRACE_PL330_DEBUG_EXEC_STALL_BACKEND_DSTATE() (0)
+static inline void trace_pl330_debug_exec_stall(void) {
+}
+#define TRACE_PL330_DMAEND 0
+#define TRACE_PL330_DMAEND_ENABLED 0
+#define TRACE_PL330_DMAEND_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmaend(void) {
+}
+#define TRACE_PL330_DMAGO 0
+#define TRACE_PL330_DMAGO_ENABLED 0
+#define TRACE_PL330_DMAGO_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmago(void) {
+}
+#define TRACE_PL330_DMAKILL 0
+#define TRACE_PL330_DMAKILL_ENABLED 0
+#define TRACE_PL330_DMAKILL_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmakill(void) {
+}
+#define TRACE_PL330_DMALD 0
+#define TRACE_PL330_DMALD_ENABLED 0
+#define TRACE_PL330_DMALD_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmald(uint8_t chan, uint32_t addr, uint32_t size, uint32_t num, char ch) {
+ (void)chan;
+ (void)addr;
+ (void)size;
+ (void)num;
+ (void)ch;
+}
+#define TRACE_PL330_DMALPEND 0
+#define TRACE_PL330_DMALPEND_ENABLED 0
+#define TRACE_PL330_DMALPEND_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmalpend(uint8_t nf, uint8_t bs, uint8_t lc, uint8_t ch, uint8_t flag) {
+ (void)nf;
+ (void)bs;
+ (void)lc;
+ (void)ch;
+ (void)flag;
+}
+#define TRACE_PL330_DMALPFALLTHROUGH 0
+#define TRACE_PL330_DMALPFALLTHROUGH_ENABLED 0
+#define TRACE_PL330_DMALPFALLTHROUGH_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmalpfallthrough(void) {
+}
+#define TRACE_PL330_DMALPITER 0
+#define TRACE_PL330_DMALPITER_ENABLED 0
+#define TRACE_PL330_DMALPITER_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmalpiter(void) {
+}
+#define TRACE_PL330_DMASEV_EVENT 0
+#define TRACE_PL330_DMASEV_EVENT_ENABLED 0
+#define TRACE_PL330_DMASEV_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmasev_event(uint8_t ev_id) {
+ (void)ev_id;
+}
+#define TRACE_PL330_DMASEV_EVIRQ 0
+#define TRACE_PL330_DMASEV_EVIRQ_ENABLED 0
+#define TRACE_PL330_DMASEV_EVIRQ_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmasev_evirq(uint8_t ev_id) {
+ (void)ev_id;
+}
+#define TRACE_PL330_DMAST 0
+#define TRACE_PL330_DMAST_ENABLED 0
+#define TRACE_PL330_DMAST_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmast(uint8_t chan, uint32_t addr, uint32_t sz, uint32_t num, char ch) {
+ (void)chan;
+ (void)addr;
+ (void)sz;
+ (void)num;
+ (void)ch;
+}
+#define TRACE_PL330_DMAWFE 0
+#define TRACE_PL330_DMAWFE_ENABLED 0
+#define TRACE_PL330_DMAWFE_BACKEND_DSTATE() (0)
+static inline void trace_pl330_dmawfe(uint8_t ev_id) {
+ (void)ev_id;
+}
+#define TRACE_PL330_EXEC 0
+#define TRACE_PL330_EXEC_ENABLED 0
+#define TRACE_PL330_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_pl330_exec(void) {
+}
+#define TRACE_PL330_EXEC_CYCLE 0
+#define TRACE_PL330_EXEC_CYCLE_ENABLED 0
+#define TRACE_PL330_EXEC_CYCLE_BACKEND_DSTATE() (0)
+static inline void trace_pl330_exec_cycle(uint32_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PL330_FAULT 0
+#define TRACE_PL330_FAULT_ENABLED 0
+#define TRACE_PL330_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_pl330_fault(void *ptr, uint32_t flags) {
+ (void)ptr;
+ (void)flags;
+}
+#define TRACE_PL330_FAULT_ABORT 0
+#define TRACE_PL330_FAULT_ABORT_ENABLED 0
+#define TRACE_PL330_FAULT_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_pl330_fault_abort(void) {
+}
+#define TRACE_PL330_HEXDUMP 0
+#define TRACE_PL330_HEXDUMP_ENABLED 0
+#define TRACE_PL330_HEXDUMP_BACKEND_DSTATE() (0)
+static inline void trace_pl330_hexdump(uint32_t offset, char *str) {
+ (void)offset;
+ (void)str;
+}
+#define TRACE_PL330_IOMEM_READ 0
+#define TRACE_PL330_IOMEM_READ_ENABLED 0
+#define TRACE_PL330_IOMEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_pl330_iomem_read(uint32_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_PL330_IOMEM_WRITE 0
+#define TRACE_PL330_IOMEM_WRITE_ENABLED 0
+#define TRACE_PL330_IOMEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pl330_iomem_write(uint32_t offset, uint32_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_PL330_IOMEM_WRITE_CLR 0
+#define TRACE_PL330_IOMEM_WRITE_CLR_ENABLED 0
+#define TRACE_PL330_IOMEM_WRITE_CLR_BACKEND_DSTATE() (0)
+static inline void trace_pl330_iomem_write_clr(int i) {
+ (void)i;
+}
+#define TRACE_RC4030_READ 0
+#define TRACE_RC4030_READ_ENABLED 0
+#define TRACE_RC4030_READ_BACKEND_DSTATE() (0)
+static inline void trace_rc4030_read(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_RC4030_WRITE 0
+#define TRACE_RC4030_WRITE_ENABLED 0
+#define TRACE_RC4030_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_rc4030_write(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SPARC32_DMA_ENABLE_LOWER 0
+#define TRACE_SPARC32_DMA_ENABLE_LOWER_ENABLED 0
+#define TRACE_SPARC32_DMA_ENABLE_LOWER_BACKEND_DSTATE() (0)
+static inline void trace_sparc32_dma_enable_lower(void) {
+}
+#define TRACE_SPARC32_DMA_ENABLE_RAISE 0
+#define TRACE_SPARC32_DMA_ENABLE_RAISE_ENABLED 0
+#define TRACE_SPARC32_DMA_ENABLE_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_sparc32_dma_enable_raise(void) {
+}
+#define TRACE_SPARC32_DMA_MEM_READL 0
+#define TRACE_SPARC32_DMA_MEM_READL_ENABLED 0
+#define TRACE_SPARC32_DMA_MEM_READL_BACKEND_DSTATE() (0)
+static inline void trace_sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_SPARC32_DMA_MEM_WRITEL 0
+#define TRACE_SPARC32_DMA_MEM_WRITEL_ENABLED 0
+#define TRACE_SPARC32_DMA_MEM_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) {
+ (void)addr;
+ (void)old;
+ (void)val;
+}
+#define TRACE_SPARC32_DMA_SET_IRQ_LOWER 0
+#define TRACE_SPARC32_DMA_SET_IRQ_LOWER_ENABLED 0
+#define TRACE_SPARC32_DMA_SET_IRQ_LOWER_BACKEND_DSTATE() (0)
+static inline void trace_sparc32_dma_set_irq_lower(void) {
+}
+#define TRACE_SPARC32_DMA_SET_IRQ_RAISE 0
+#define TRACE_SPARC32_DMA_SET_IRQ_RAISE_ENABLED 0
+#define TRACE_SPARC32_DMA_SET_IRQ_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_sparc32_dma_set_irq_raise(void) {
+}
+#define TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL 0
+#define TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL_ENABLED 0
+#define TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_xilinx_axidma_loading_desc_fail(uint32_t res) {
+ (void)res;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_fsi.h b/trace/trace-hw_fsi.h
new file mode 100644
index 0000000000..fd1d6edad0
--- /dev/null
+++ b/trace/trace-hw_fsi.h
@@ -0,0 +1,111 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_FSI_H
+#define TRACE_TRACE_HW_FSI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_FSI_ASPEED_APB2OPB_READ 0
+#define TRACE_FSI_ASPEED_APB2OPB_READ_ENABLED 0
+#define TRACE_FSI_ASPEED_APB2OPB_READ_BACKEND_DSTATE() (0)
+static inline void trace_fsi_aspeed_apb2opb_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_FSI_ASPEED_APB2OPB_WRITE 0
+#define TRACE_FSI_ASPEED_APB2OPB_WRITE_ENABLED 0
+#define TRACE_FSI_ASPEED_APB2OPB_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_fsi_aspeed_apb2opb_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_FSI_CFAM_CONFIG_READ 0
+#define TRACE_FSI_CFAM_CONFIG_READ_ENABLED 0
+#define TRACE_FSI_CFAM_CONFIG_READ_BACKEND_DSTATE() (0)
+static inline void trace_fsi_cfam_config_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_FSI_CFAM_CONFIG_WRITE 0
+#define TRACE_FSI_CFAM_CONFIG_WRITE_ENABLED 0
+#define TRACE_FSI_CFAM_CONFIG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_fsi_cfam_config_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_FSI_CFAM_CONFIG_WRITE_NOADDR 0
+#define TRACE_FSI_CFAM_CONFIG_WRITE_NOADDR_ENABLED 0
+#define TRACE_FSI_CFAM_CONFIG_WRITE_NOADDR_BACKEND_DSTATE() (0)
+static inline void trace_fsi_cfam_config_write_noaddr(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_FSI_CFAM_UNIMPLEMENTED_READ 0
+#define TRACE_FSI_CFAM_UNIMPLEMENTED_READ_ENABLED 0
+#define TRACE_FSI_CFAM_UNIMPLEMENTED_READ_BACKEND_DSTATE() (0)
+static inline void trace_fsi_cfam_unimplemented_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_FSI_CFAM_UNIMPLEMENTED_WRITE 0
+#define TRACE_FSI_CFAM_UNIMPLEMENTED_WRITE_ENABLED 0
+#define TRACE_FSI_CFAM_UNIMPLEMENTED_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_fsi_cfam_unimplemented_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_FSI_MASTER_READ 0
+#define TRACE_FSI_MASTER_READ_ENABLED 0
+#define TRACE_FSI_MASTER_READ_BACKEND_DSTATE() (0)
+static inline void trace_fsi_master_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_FSI_MASTER_WRITE 0
+#define TRACE_FSI_MASTER_WRITE_ENABLED 0
+#define TRACE_FSI_MASTER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_fsi_master_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_FSI_SCRATCHPAD_READ 0
+#define TRACE_FSI_SCRATCHPAD_READ_ENABLED 0
+#define TRACE_FSI_SCRATCHPAD_READ_BACKEND_DSTATE() (0)
+static inline void trace_fsi_scratchpad_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_FSI_SCRATCHPAD_WRITE 0
+#define TRACE_FSI_SCRATCHPAD_WRITE_ENABLED 0
+#define TRACE_FSI_SCRATCHPAD_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_fsi_scratchpad_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_FSI_SLAVE_READ 0
+#define TRACE_FSI_SLAVE_READ_ENABLED 0
+#define TRACE_FSI_SLAVE_READ_BACKEND_DSTATE() (0)
+static inline void trace_fsi_slave_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_FSI_SLAVE_WRITE 0
+#define TRACE_FSI_SLAVE_WRITE_ENABLED 0
+#define TRACE_FSI_SLAVE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_fsi_slave_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_gpio.h b/trace/trace-hw_gpio.h
new file mode 100644
index 0000000000..cd84233eea
--- /dev/null
+++ b/trace/trace-hw_gpio.h
@@ -0,0 +1,251 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_GPIO_H
+#define TRACE_TRACE_HW_GPIO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ASPEED_GPIO_READ 0
+#define TRACE_ASPEED_GPIO_READ_ENABLED 0
+#define TRACE_ASPEED_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_gpio_read(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_ASPEED_GPIO_WRITE 0
+#define TRACE_ASPEED_GPIO_WRITE_ENABLED 0
+#define TRACE_ASPEED_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_gpio_write(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_IMX_GPIO_READ 0
+#define TRACE_IMX_GPIO_READ_ENABLED 0
+#define TRACE_IMX_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx_gpio_read(const char *id, const char *reg, uint32_t value) {
+ (void)id;
+ (void)reg;
+ (void)value;
+}
+#define TRACE_IMX_GPIO_SET 0
+#define TRACE_IMX_GPIO_SET_ENABLED 0
+#define TRACE_IMX_GPIO_SET_BACKEND_DSTATE() (0)
+static inline void trace_imx_gpio_set(const char *id, int line, int level) {
+ (void)id;
+ (void)line;
+ (void)level;
+}
+#define TRACE_IMX_GPIO_WRITE 0
+#define TRACE_IMX_GPIO_WRITE_ENABLED 0
+#define TRACE_IMX_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx_gpio_write(const char *id, const char *reg, uint32_t value) {
+ (void)id;
+ (void)reg;
+ (void)value;
+}
+#define TRACE_NPCM7XX_GPIO_READ 0
+#define TRACE_NPCM7XX_GPIO_READ_ENABLED 0
+#define TRACE_NPCM7XX_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_gpio_read(const char *id, uint64_t offset, uint64_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_GPIO_SET_INPUT 0
+#define TRACE_NPCM7XX_GPIO_SET_INPUT_ENABLED 0
+#define TRACE_NPCM7XX_GPIO_SET_INPUT_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_gpio_set_input(const char *id, int32_t line, int32_t level) {
+ (void)id;
+ (void)line;
+ (void)level;
+}
+#define TRACE_NPCM7XX_GPIO_SET_OUTPUT 0
+#define TRACE_NPCM7XX_GPIO_SET_OUTPUT_ENABLED 0
+#define TRACE_NPCM7XX_GPIO_SET_OUTPUT_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_gpio_set_output(const char *id, int32_t line, int32_t level) {
+ (void)id;
+ (void)line;
+ (void)level;
+}
+#define TRACE_NPCM7XX_GPIO_UPDATE_EVENTS 0
+#define TRACE_NPCM7XX_GPIO_UPDATE_EVENTS_ENABLED 0
+#define TRACE_NPCM7XX_GPIO_UPDATE_EVENTS_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_gpio_update_events(const char *id, uint32_t evst, uint32_t even) {
+ (void)id;
+ (void)evst;
+ (void)even;
+}
+#define TRACE_NPCM7XX_GPIO_WRITE 0
+#define TRACE_NPCM7XX_GPIO_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_gpio_write(const char *id, uint64_t offset, uint64_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NRF51_GPIO_READ 0
+#define TRACE_NRF51_GPIO_READ_ENABLED 0
+#define TRACE_NRF51_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_gpio_read(uint64_t offset, uint64_t r) {
+ (void)offset;
+ (void)r;
+}
+#define TRACE_NRF51_GPIO_SET 0
+#define TRACE_NRF51_GPIO_SET_ENABLED 0
+#define TRACE_NRF51_GPIO_SET_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_gpio_set(int64_t line, int64_t value) {
+ (void)line;
+ (void)value;
+}
+#define TRACE_NRF51_GPIO_UPDATE_OUTPUT_IRQ 0
+#define TRACE_NRF51_GPIO_UPDATE_OUTPUT_IRQ_ENABLED 0
+#define TRACE_NRF51_GPIO_UPDATE_OUTPUT_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_gpio_update_output_irq(int64_t line, int64_t value) {
+ (void)line;
+ (void)value;
+}
+#define TRACE_NRF51_GPIO_WRITE 0
+#define TRACE_NRF51_GPIO_WRITE_ENABLED 0
+#define TRACE_NRF51_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_gpio_write(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_PCA955X_GPIO_CHANGE 0
+#define TRACE_PCA955X_GPIO_CHANGE_ENABLED 0
+#define TRACE_PCA955X_GPIO_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) {
+ (void)description;
+ (void)id;
+ (void)prev_state;
+ (void)current_state;
+}
+#define TRACE_PCA955X_GPIO_STATUS 0
+#define TRACE_PCA955X_GPIO_STATUS_ENABLED 0
+#define TRACE_PCA955X_GPIO_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_pca955x_gpio_status(const char *description, const char *buf) {
+ (void)description;
+ (void)buf;
+}
+#define TRACE_PL061_INPUT_CHANGE 0
+#define TRACE_PL061_INPUT_CHANGE_ENABLED 0
+#define TRACE_PL061_INPUT_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_pl061_input_change(const char *id, int gpio, int level) {
+ (void)id;
+ (void)gpio;
+ (void)level;
+}
+#define TRACE_PL061_READ 0
+#define TRACE_PL061_READ_ENABLED 0
+#define TRACE_PL061_READ_BACKEND_DSTATE() (0)
+static inline void trace_pl061_read(const char *id, uint64_t offset, uint64_t r) {
+ (void)id;
+ (void)offset;
+ (void)r;
+}
+#define TRACE_PL061_RESET 0
+#define TRACE_PL061_RESET_ENABLED 0
+#define TRACE_PL061_RESET_BACKEND_DSTATE() (0)
+static inline void trace_pl061_reset(const char *id) {
+ (void)id;
+}
+#define TRACE_PL061_SET_OUTPUT 0
+#define TRACE_PL061_SET_OUTPUT_ENABLED 0
+#define TRACE_PL061_SET_OUTPUT_BACKEND_DSTATE() (0)
+static inline void trace_pl061_set_output(const char *id, int gpio, int level) {
+ (void)id;
+ (void)gpio;
+ (void)level;
+}
+#define TRACE_PL061_UPDATE 0
+#define TRACE_PL061_UPDATE_ENABLED 0
+#define TRACE_PL061_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_pl061_update(const char *id, uint32_t dir, uint32_t data, uint32_t pullups, uint32_t floating) {
+ (void)id;
+ (void)dir;
+ (void)data;
+ (void)pullups;
+ (void)floating;
+}
+#define TRACE_PL061_UPDATE_ISTATE 0
+#define TRACE_PL061_UPDATE_ISTATE_ENABLED 0
+#define TRACE_PL061_UPDATE_ISTATE_BACKEND_DSTATE() (0)
+static inline void trace_pl061_update_istate(const char *id, uint32_t istate, uint32_t im, int level) {
+ (void)id;
+ (void)istate;
+ (void)im;
+ (void)level;
+}
+#define TRACE_PL061_WRITE 0
+#define TRACE_PL061_WRITE_ENABLED 0
+#define TRACE_PL061_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pl061_write(const char *id, uint64_t offset, uint64_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_SIFIVE_GPIO_READ 0
+#define TRACE_SIFIVE_GPIO_READ_ENABLED 0
+#define TRACE_SIFIVE_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_sifive_gpio_read(uint64_t offset, uint64_t r) {
+ (void)offset;
+ (void)r;
+}
+#define TRACE_SIFIVE_GPIO_SET 0
+#define TRACE_SIFIVE_GPIO_SET_ENABLED 0
+#define TRACE_SIFIVE_GPIO_SET_BACKEND_DSTATE() (0)
+static inline void trace_sifive_gpio_set(int64_t line, int64_t value) {
+ (void)line;
+ (void)value;
+}
+#define TRACE_SIFIVE_GPIO_UPDATE_OUTPUT_IRQ 0
+#define TRACE_SIFIVE_GPIO_UPDATE_OUTPUT_IRQ_ENABLED 0
+#define TRACE_SIFIVE_GPIO_UPDATE_OUTPUT_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sifive_gpio_update_output_irq(int64_t line, int64_t value) {
+ (void)line;
+ (void)value;
+}
+#define TRACE_SIFIVE_GPIO_WRITE 0
+#define TRACE_SIFIVE_GPIO_WRITE_ENABLED 0
+#define TRACE_SIFIVE_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sifive_gpio_write(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_STM32L4X5_GPIO_PINS 0
+#define TRACE_STM32L4X5_GPIO_PINS_ENABLED 0
+#define TRACE_STM32L4X5_GPIO_PINS_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_gpio_pins(char *gpio, uint16_t disconnected, uint16_t high) {
+ (void)gpio;
+ (void)disconnected;
+ (void)high;
+}
+#define TRACE_STM32L4X5_GPIO_READ 0
+#define TRACE_STM32L4X5_GPIO_READ_ENABLED 0
+#define TRACE_STM32L4X5_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_gpio_read(char *gpio, uint64_t addr) {
+ (void)gpio;
+ (void)addr;
+}
+#define TRACE_STM32L4X5_GPIO_UPDATE_IDR 0
+#define TRACE_STM32L4X5_GPIO_UPDATE_IDR_ENABLED 0
+#define TRACE_STM32L4X5_GPIO_UPDATE_IDR_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_gpio_update_idr(char *gpio, uint32_t old_idr, uint32_t new_idr) {
+ (void)gpio;
+ (void)old_idr;
+ (void)new_idr;
+}
+#define TRACE_STM32L4X5_GPIO_WRITE 0
+#define TRACE_STM32L4X5_GPIO_WRITE_ENABLED 0
+#define TRACE_STM32L4X5_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_gpio_write(char *gpio, uint64_t addr, uint64_t data) {
+ (void)gpio;
+ (void)addr;
+ (void)data;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_hppa.h b/trace/trace-hw_hppa.h
new file mode 100644
index 0000000000..e458f9d67e
--- /dev/null
+++ b/trace/trace-hw_hppa.h
@@ -0,0 +1,10 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_HPPA_H
+#define TRACE_TRACE_HW_HPPA_H
+
+/* No-op tracepoints for Android build */
+#define trace_event_get_state_backends(...) 0
+#define trace_event_get_state_dynamic(...) 0
+#define trace_event_set_state_dynamic(...) 0
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_hyperv.h b/trace/trace-hw_hyperv.h
new file mode 100644
index 0000000000..4023d692b5
--- /dev/null
+++ b/trace/trace-hw_hyperv.h
@@ -0,0 +1,254 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_HYPERV_H
+#define TRACE_TRACE_HW_HYPERV_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_HV_BALLOON_INCOMING_BALLOON 0
+#define TRACE_HV_BALLOON_INCOMING_BALLOON_ENABLED 0
+#define TRACE_HV_BALLOON_INCOMING_BALLOON_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_incoming_balloon(uint32_t trans_id, uint32_t range_count, uint32_t more_pages) {
+ (void)trans_id;
+ (void)range_count;
+ (void)more_pages;
+}
+#define TRACE_HV_BALLOON_INCOMING_CAPS 0
+#define TRACE_HV_BALLOON_INCOMING_CAPS_ENABLED 0
+#define TRACE_HV_BALLOON_INCOMING_CAPS_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_incoming_caps(uint32_t caps) {
+ (void)caps;
+}
+#define TRACE_HV_BALLOON_INCOMING_HOT_ADD 0
+#define TRACE_HV_BALLOON_INCOMING_HOT_ADD_ENABLED 0
+#define TRACE_HV_BALLOON_INCOMING_HOT_ADD_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_incoming_hot_add(uint32_t trans_id, uint32_t result, uint32_t count) {
+ (void)trans_id;
+ (void)result;
+ (void)count;
+}
+#define TRACE_HV_BALLOON_INCOMING_UNBALLOON 0
+#define TRACE_HV_BALLOON_INCOMING_UNBALLOON_ENABLED 0
+#define TRACE_HV_BALLOON_INCOMING_UNBALLOON_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_incoming_unballoon(uint32_t trans_id) {
+ (void)trans_id;
+}
+#define TRACE_HV_BALLOON_INCOMING_VERSION 0
+#define TRACE_HV_BALLOON_INCOMING_VERSION_ENABLED 0
+#define TRACE_HV_BALLOON_INCOMING_VERSION_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_incoming_version(uint16_t major, uint16_t minor) {
+ (void)major;
+ (void)minor;
+}
+#define TRACE_HV_BALLOON_MAP_SLOT 0
+#define TRACE_HV_BALLOON_MAP_SLOT_ENABLED 0
+#define TRACE_HV_BALLOON_MAP_SLOT_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_map_slot(unsigned int idx, unsigned int total_slots, uint64_t offset) {
+ (void)idx;
+ (void)total_slots;
+ (void)offset;
+}
+#define TRACE_HV_BALLOON_OUR_RANGE_ADD 0
+#define TRACE_HV_BALLOON_OUR_RANGE_ADD_ENABLED 0
+#define TRACE_HV_BALLOON_OUR_RANGE_ADD_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_our_range_add(uint64_t count, uint64_t start) {
+ (void)count;
+ (void)start;
+}
+#define TRACE_HV_BALLOON_OUTGOING_BALLOON 0
+#define TRACE_HV_BALLOON_OUTGOING_BALLOON_ENABLED 0
+#define TRACE_HV_BALLOON_OUTGOING_BALLOON_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_outgoing_balloon(uint32_t trans_id, uint64_t count, uint64_t rempages) {
+ (void)trans_id;
+ (void)count;
+ (void)rempages;
+}
+#define TRACE_HV_BALLOON_OUTGOING_HOT_ADD 0
+#define TRACE_HV_BALLOON_OUTGOING_HOT_ADD_ENABLED 0
+#define TRACE_HV_BALLOON_OUTGOING_HOT_ADD_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_outgoing_hot_add(uint32_t trans_id, uint64_t count, uint64_t start) {
+ (void)trans_id;
+ (void)count;
+ (void)start;
+}
+#define TRACE_HV_BALLOON_OUTGOING_UNBALLOON 0
+#define TRACE_HV_BALLOON_OUTGOING_UNBALLOON_ENABLED 0
+#define TRACE_HV_BALLOON_OUTGOING_UNBALLOON_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_outgoing_unballoon(uint32_t trans_id, uint64_t count, uint64_t start, uint64_t rempages) {
+ (void)trans_id;
+ (void)count;
+ (void)start;
+ (void)rempages;
+}
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_ENABLED 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_remove_response(uint64_t count, uint64_t start, unsigned int both) {
+ (void)count;
+ (void)start;
+ (void)both;
+}
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_COMMON 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_COMMON_ENABLED 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_COMMON_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_remove_response_common(uint64_t countcommon, uint64_t startcommon, uint64_t countrange, uint64_t startrange, uint64_t counthpr, uint64_t starthpr, uint64_t removed, unsigned int both) {
+ (void)countcommon;
+ (void)startcommon;
+ (void)countrange;
+ (void)startrange;
+ (void)counthpr;
+ (void)starthpr;
+ (void)removed;
+ (void)both;
+}
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_HOLE 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_HOLE_ENABLED 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_HOLE_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_remove_response_hole(uint64_t counthole, uint64_t starthole, uint64_t countrange, uint64_t startrange, uint64_t starthpr, unsigned int both) {
+ (void)counthole;
+ (void)starthole;
+ (void)countrange;
+ (void)startrange;
+ (void)starthpr;
+ (void)both;
+}
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_REMAINDER 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_REMAINDER_ENABLED 0
+#define TRACE_HV_BALLOON_REMOVE_RESPONSE_REMAINDER_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_remove_response_remainder(uint64_t count, uint64_t start, unsigned int both) {
+ (void)count;
+ (void)start;
+ (void)both;
+}
+#define TRACE_HV_BALLOON_STATE_CHANGE 0
+#define TRACE_HV_BALLOON_STATE_CHANGE_ENABLED 0
+#define TRACE_HV_BALLOON_STATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_state_change(const char *tostr) {
+ (void)tostr;
+}
+#define TRACE_HV_BALLOON_UNMAP_SLOT 0
+#define TRACE_HV_BALLOON_UNMAP_SLOT_ENABLED 0
+#define TRACE_HV_BALLOON_UNMAP_SLOT_BACKEND_DSTATE() (0)
+static inline void trace_hv_balloon_unmap_slot(unsigned int idx, unsigned int total_slots, uint64_t offset) {
+ (void)idx;
+ (void)total_slots;
+ (void)offset;
+}
+#define TRACE_VMBUS_CHANNEL_NOTIFY_GUEST 0
+#define TRACE_VMBUS_CHANNEL_NOTIFY_GUEST_ENABLED 0
+#define TRACE_VMBUS_CHANNEL_NOTIFY_GUEST_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_channel_notify_guest(uint32_t chan_id) {
+ (void)chan_id;
+}
+#define TRACE_VMBUS_CHANNEL_OPEN 0
+#define TRACE_VMBUS_CHANNEL_OPEN_ENABLED 0
+#define TRACE_VMBUS_CHANNEL_OPEN_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_channel_open(uint32_t chan_id, uint32_t status) {
+ (void)chan_id;
+ (void)status;
+}
+#define TRACE_VMBUS_CLOSE_CHANNEL 0
+#define TRACE_VMBUS_CLOSE_CHANNEL_ENABLED 0
+#define TRACE_VMBUS_CLOSE_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_close_channel(uint32_t chan_id) {
+ (void)chan_id;
+}
+#define TRACE_VMBUS_GPADL_BODY 0
+#define TRACE_VMBUS_GPADL_BODY_ENABLED 0
+#define TRACE_VMBUS_GPADL_BODY_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_gpadl_body(uint32_t gpadl_id) {
+ (void)gpadl_id;
+}
+#define TRACE_VMBUS_GPADL_CREATED 0
+#define TRACE_VMBUS_GPADL_CREATED_ENABLED 0
+#define TRACE_VMBUS_GPADL_CREATED_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_gpadl_created(uint32_t gpadl_id) {
+ (void)gpadl_id;
+}
+#define TRACE_VMBUS_GPADL_HEADER 0
+#define TRACE_VMBUS_GPADL_HEADER_ENABLED 0
+#define TRACE_VMBUS_GPADL_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_gpadl_header(uint32_t gpadl_id, uint16_t num_gfns) {
+ (void)gpadl_id;
+ (void)num_gfns;
+}
+#define TRACE_VMBUS_GPADL_TEARDOWN 0
+#define TRACE_VMBUS_GPADL_TEARDOWN_ENABLED 0
+#define TRACE_VMBUS_GPADL_TEARDOWN_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_gpadl_teardown(uint32_t gpadl_id) {
+ (void)gpadl_id;
+}
+#define TRACE_VMBUS_GPADL_TORNDOWN 0
+#define TRACE_VMBUS_GPADL_TORNDOWN_ENABLED 0
+#define TRACE_VMBUS_GPADL_TORNDOWN_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_gpadl_torndown(uint32_t gpadl_id) {
+ (void)gpadl_id;
+}
+#define TRACE_VMBUS_INITIATE_CONTACT 0
+#define TRACE_VMBUS_INITIATE_CONTACT_ENABLED 0
+#define TRACE_VMBUS_INITIATE_CONTACT_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_initiate_contact(uint16_t major, uint16_t minor, uint32_t vcpu, uint64_t monitor_page1, uint64_t monitor_page2, uint64_t interrupt_page) {
+ (void)major;
+ (void)minor;
+ (void)vcpu;
+ (void)monitor_page1;
+ (void)monitor_page2;
+ (void)interrupt_page;
+}
+#define TRACE_VMBUS_MSG_CB 0
+#define TRACE_VMBUS_MSG_CB_ENABLED 0
+#define TRACE_VMBUS_MSG_CB_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_msg_cb(int status) {
+ (void)status;
+}
+#define TRACE_VMBUS_OPEN_CHANNEL 0
+#define TRACE_VMBUS_OPEN_CHANNEL_ENABLED 0
+#define TRACE_VMBUS_OPEN_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_open_channel(uint32_t chan_id, uint32_t gpadl_id, uint32_t target_vp) {
+ (void)chan_id;
+ (void)gpadl_id;
+ (void)target_vp;
+}
+#define TRACE_VMBUS_POST_MSG 0
+#define TRACE_VMBUS_POST_MSG_ENABLED 0
+#define TRACE_VMBUS_POST_MSG_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_post_msg(uint32_t type, uint32_t size) {
+ (void)type;
+ (void)size;
+}
+#define TRACE_VMBUS_PROCESS_INCOMING_MESSAGE 0
+#define TRACE_VMBUS_PROCESS_INCOMING_MESSAGE_ENABLED 0
+#define TRACE_VMBUS_PROCESS_INCOMING_MESSAGE_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_process_incoming_message(uint32_t message_type) {
+ (void)message_type;
+}
+#define TRACE_VMBUS_RECV_MESSAGE 0
+#define TRACE_VMBUS_RECV_MESSAGE_ENABLED 0
+#define TRACE_VMBUS_RECV_MESSAGE_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_recv_message(uint32_t type, uint32_t size) {
+ (void)type;
+ (void)size;
+}
+#define TRACE_VMBUS_SEND_OFFER 0
+#define TRACE_VMBUS_SEND_OFFER_ENABLED 0
+#define TRACE_VMBUS_SEND_OFFER_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_send_offer(uint32_t chan_id, void *dev) {
+ (void)chan_id;
+ (void)dev;
+}
+#define TRACE_VMBUS_SIGNAL_EVENT 0
+#define TRACE_VMBUS_SIGNAL_EVENT_ENABLED 0
+#define TRACE_VMBUS_SIGNAL_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_signal_event(void) {
+}
+#define TRACE_VMBUS_TERMINATE_OFFERS 0
+#define TRACE_VMBUS_TERMINATE_OFFERS_ENABLED 0
+#define TRACE_VMBUS_TERMINATE_OFFERS_BACKEND_DSTATE() (0)
+static inline void trace_vmbus_terminate_offers(void) {
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_i2c.h b/trace/trace-hw_i2c.h
new file mode 100644
index 0000000000..4735731d07
--- /dev/null
+++ b/trace/trace-hw_i2c.h
@@ -0,0 +1,282 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_I2C_H
+#define TRACE_TRACE_HW_I2C_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALLWINNER_I2C_READ 0
+#define TRACE_ALLWINNER_I2C_READ_ENABLED 0
+#define TRACE_ALLWINNER_I2C_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_i2c_read(const char* reg_name, uint64_t offset, uint64_t value) {
+ (void)reg_name;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_ALLWINNER_I2C_WRITE 0
+#define TRACE_ALLWINNER_I2C_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_I2C_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_i2c_write(const char* reg_name, uint64_t offset, uint64_t value) {
+ (void)reg_name;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_ASPEED_I2C_BUS_CMD 0
+#define TRACE_ASPEED_I2C_BUS_CMD_ENABLED 0
+#define TRACE_ASPEED_I2C_BUS_CMD_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i2c_bus_cmd(uint32_t cmd, const char *cmd_flags, uint32_t count, uint32_t intr_status) {
+ (void)cmd;
+ (void)cmd_flags;
+ (void)count;
+ (void)intr_status;
+}
+#define TRACE_ASPEED_I2C_BUS_RAISE_INTERRUPT 0
+#define TRACE_ASPEED_I2C_BUS_RAISE_INTERRUPT_ENABLED 0
+#define TRACE_ASPEED_I2C_BUS_RAISE_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i2c_bus_raise_interrupt(uint32_t intr_status, const char *s) {
+ (void)intr_status;
+ (void)s;
+}
+#define TRACE_ASPEED_I2C_BUS_READ 0
+#define TRACE_ASPEED_I2C_BUS_READ_ENABLED 0
+#define TRACE_ASPEED_I2C_BUS_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i2c_bus_read(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) {
+ (void)busid;
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_ASPEED_I2C_BUS_RECV 0
+#define TRACE_ASPEED_I2C_BUS_RECV_ENABLED 0
+#define TRACE_ASPEED_I2C_BUS_RECV_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i2c_bus_recv(const char *mode, int i, int count, uint8_t byte) {
+ (void)mode;
+ (void)i;
+ (void)count;
+ (void)byte;
+}
+#define TRACE_ASPEED_I2C_BUS_SEND 0
+#define TRACE_ASPEED_I2C_BUS_SEND_ENABLED 0
+#define TRACE_ASPEED_I2C_BUS_SEND_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i2c_bus_send(const char *mode, int i, int count, uint8_t byte) {
+ (void)mode;
+ (void)i;
+ (void)count;
+ (void)byte;
+}
+#define TRACE_ASPEED_I2C_BUS_WRITE 0
+#define TRACE_ASPEED_I2C_BUS_WRITE_ENABLED 0
+#define TRACE_ASPEED_I2C_BUS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i2c_bus_write(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) {
+ (void)busid;
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_BITBANG_I2C_ADDR 0
+#define TRACE_BITBANG_I2C_ADDR_ENABLED 0
+#define TRACE_BITBANG_I2C_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_bitbang_i2c_addr(uint8_t addr) {
+ (void)addr;
+}
+#define TRACE_BITBANG_I2C_DATA 0
+#define TRACE_BITBANG_I2C_DATA_ENABLED 0
+#define TRACE_BITBANG_I2C_DATA_BACKEND_DSTATE() (0)
+static inline void trace_bitbang_i2c_data(unsigned clk, unsigned dat, unsigned old_out, unsigned new_out) {
+ (void)clk;
+ (void)dat;
+ (void)old_out;
+ (void)new_out;
+}
+#define TRACE_BITBANG_I2C_RECV 0
+#define TRACE_BITBANG_I2C_RECV_ENABLED 0
+#define TRACE_BITBANG_I2C_RECV_BACKEND_DSTATE() (0)
+static inline void trace_bitbang_i2c_recv(uint8_t byte) {
+ (void)byte;
+}
+#define TRACE_BITBANG_I2C_SEND 0
+#define TRACE_BITBANG_I2C_SEND_ENABLED 0
+#define TRACE_BITBANG_I2C_SEND_BACKEND_DSTATE() (0)
+static inline void trace_bitbang_i2c_send(uint8_t byte) {
+ (void)byte;
+}
+#define TRACE_BITBANG_I2C_STATE 0
+#define TRACE_BITBANG_I2C_STATE_ENABLED 0
+#define TRACE_BITBANG_I2C_STATE_BACKEND_DSTATE() (0)
+static inline void trace_bitbang_i2c_state(const char *old_state, const char *new_state) {
+ (void)old_state;
+ (void)new_state;
+}
+#define TRACE_I2C_ACK 0
+#define TRACE_I2C_ACK_ENABLED 0
+#define TRACE_I2C_ACK_BACKEND_DSTATE() (0)
+static inline void trace_i2c_ack(void) {
+}
+#define TRACE_I2C_EVENT 0
+#define TRACE_I2C_EVENT_ENABLED 0
+#define TRACE_I2C_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_i2c_event(const char *event, uint8_t address) {
+ (void)event;
+ (void)address;
+}
+#define TRACE_I2C_RECV 0
+#define TRACE_I2C_RECV_ENABLED 0
+#define TRACE_I2C_RECV_BACKEND_DSTATE() (0)
+static inline void trace_i2c_recv(uint8_t address, uint8_t data) {
+ (void)address;
+ (void)data;
+}
+#define TRACE_I2C_SEND 0
+#define TRACE_I2C_SEND_ENABLED 0
+#define TRACE_I2C_SEND_BACKEND_DSTATE() (0)
+static inline void trace_i2c_send(uint8_t address, uint8_t data) {
+ (void)address;
+ (void)data;
+}
+#define TRACE_I2C_SEND_ASYNC 0
+#define TRACE_I2C_SEND_ASYNC_ENABLED 0
+#define TRACE_I2C_SEND_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_i2c_send_async(uint8_t address, uint8_t data) {
+ (void)address;
+ (void)data;
+}
+#define TRACE_IMX_I2C_READ 0
+#define TRACE_IMX_I2C_READ_ENABLED 0
+#define TRACE_IMX_I2C_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx_i2c_read(const char *id, const char *reg, uint64_t ofs, uint64_t value) {
+ (void)id;
+ (void)reg;
+ (void)ofs;
+ (void)value;
+}
+#define TRACE_IMX_I2C_WRITE 0
+#define TRACE_IMX_I2C_WRITE_ENABLED 0
+#define TRACE_IMX_I2C_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx_i2c_write(const char *id, const char *reg, uint64_t ofs, uint64_t value) {
+ (void)id;
+ (void)reg;
+ (void)ofs;
+ (void)value;
+}
+#define TRACE_MPC_I2C_READ 0
+#define TRACE_MPC_I2C_READ_ENABLED 0
+#define TRACE_MPC_I2C_READ_BACKEND_DSTATE() (0)
+static inline void trace_mpc_i2c_read(uint64_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_MPC_I2C_WRITE 0
+#define TRACE_MPC_I2C_WRITE_ENABLED 0
+#define TRACE_MPC_I2C_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mpc_i2c_write(uint64_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_NPCM7XX_SMBUS_NACK 0
+#define TRACE_NPCM7XX_SMBUS_NACK_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_NACK_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_nack(const char *id) {
+ (void)id;
+}
+#define TRACE_NPCM7XX_SMBUS_READ 0
+#define TRACE_NPCM7XX_SMBUS_READ_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_read(const char *id, uint64_t offset, uint64_t value, unsigned size) {
+ (void)id;
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_NPCM7XX_SMBUS_RECV_BYTE 0
+#define TRACE_NPCM7XX_SMBUS_RECV_BYTE_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_RECV_BYTE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_recv_byte(const char *id, uint8_t value) {
+ (void)id;
+ (void)value;
+}
+#define TRACE_NPCM7XX_SMBUS_RECV_FIFO 0
+#define TRACE_NPCM7XX_SMBUS_RECV_FIFO_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_RECV_FIFO_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_recv_fifo(const char *id, uint8_t received, uint8_t expected) {
+ (void)id;
+ (void)received;
+ (void)expected;
+}
+#define TRACE_NPCM7XX_SMBUS_SEND_ADDRESS 0
+#define TRACE_NPCM7XX_SMBUS_SEND_ADDRESS_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_SEND_ADDRESS_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_send_address(const char *id, uint8_t addr, int recv, int success) {
+ (void)id;
+ (void)addr;
+ (void)recv;
+ (void)success;
+}
+#define TRACE_NPCM7XX_SMBUS_SEND_BYTE 0
+#define TRACE_NPCM7XX_SMBUS_SEND_BYTE_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_SEND_BYTE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_send_byte(const char *id, uint8_t value, int success) {
+ (void)id;
+ (void)value;
+ (void)success;
+}
+#define TRACE_NPCM7XX_SMBUS_START 0
+#define TRACE_NPCM7XX_SMBUS_START_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_START_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_start(const char *id, int success) {
+ (void)id;
+ (void)success;
+}
+#define TRACE_NPCM7XX_SMBUS_STOP 0
+#define TRACE_NPCM7XX_SMBUS_STOP_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_STOP_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_stop(const char *id) {
+ (void)id;
+}
+#define TRACE_NPCM7XX_SMBUS_WRITE 0
+#define TRACE_NPCM7XX_SMBUS_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_SMBUS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_smbus_write(const char *id, uint64_t offset, uint64_t value, unsigned size) {
+ (void)id;
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_PCA954X_READ_DATA 0
+#define TRACE_PCA954X_READ_DATA_ENABLED 0
+#define TRACE_PCA954X_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_pca954x_read_data(uint8_t value) {
+ (void)value;
+}
+#define TRACE_PCA954X_WRITE_BYTES 0
+#define TRACE_PCA954X_WRITE_BYTES_ENABLED 0
+#define TRACE_PCA954X_WRITE_BYTES_BACKEND_DSTATE() (0)
+static inline void trace_pca954x_write_bytes(uint8_t value) {
+ (void)value;
+}
+#define TRACE_SMBUS_IOPORT_READB 0
+#define TRACE_SMBUS_IOPORT_READB_ENABLED 0
+#define TRACE_SMBUS_IOPORT_READB_BACKEND_DSTATE() (0)
+static inline void trace_smbus_ioport_readb(uint16_t addr, uint8_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_SMBUS_IOPORT_WRITEB 0
+#define TRACE_SMBUS_IOPORT_WRITEB_ENABLED 0
+#define TRACE_SMBUS_IOPORT_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_smbus_ioport_writeb(uint16_t addr, uint8_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_SMBUS_TRANSACTION 0
+#define TRACE_SMBUS_TRANSACTION_ENABLED 0
+#define TRACE_SMBUS_TRANSACTION_BACKEND_DSTATE() (0)
+static inline void trace_smbus_transaction(uint8_t addr, uint8_t prot) {
+ (void)addr;
+ (void)prot;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_i386.h b/trace/trace-hw_i386.h
new file mode 100644
index 0000000000..845e29bfd4
--- /dev/null
+++ b/trace/trace-hw_i386.h
@@ -0,0 +1,875 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_I386_H
+#define TRACE_TRACE_HW_I386_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_AMDVI_ALL_INVAL 0
+#define TRACE_AMDVI_ALL_INVAL_ENABLED 0
+#define TRACE_AMDVI_ALL_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_all_inval(void) {
+}
+#define TRACE_AMDVI_CACHE_UPDATE 0
+#define TRACE_AMDVI_CACHE_UPDATE_ENABLED 0
+#define TRACE_AMDVI_CACHE_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_cache_update(uint16_t domid, uint8_t bus, uint8_t slot, uint8_t func, uint64_t gpa, uint64_t txaddr) {
+ (void)domid;
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)gpa;
+ (void)txaddr;
+}
+#define TRACE_AMDVI_COMMAND_ERROR 0
+#define TRACE_AMDVI_COMMAND_ERROR_ENABLED 0
+#define TRACE_AMDVI_COMMAND_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_command_error(uint64_t status) {
+ (void)status;
+}
+#define TRACE_AMDVI_COMMAND_EXEC 0
+#define TRACE_AMDVI_COMMAND_EXEC_ENABLED 0
+#define TRACE_AMDVI_COMMAND_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_command_exec(uint32_t head, uint32_t tail, uint64_t buf) {
+ (void)head;
+ (void)tail;
+ (void)buf;
+}
+#define TRACE_AMDVI_COMMAND_READ_FAIL 0
+#define TRACE_AMDVI_COMMAND_READ_FAIL_ENABLED 0
+#define TRACE_AMDVI_COMMAND_READ_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_command_read_fail(uint64_t addr, uint32_t head) {
+ (void)addr;
+ (void)head;
+}
+#define TRACE_AMDVI_COMPLETION_WAIT 0
+#define TRACE_AMDVI_COMPLETION_WAIT_ENABLED 0
+#define TRACE_AMDVI_COMPLETION_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_completion_wait(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_AMDVI_COMPLETION_WAIT_FAIL 0
+#define TRACE_AMDVI_COMPLETION_WAIT_FAIL_ENABLED 0
+#define TRACE_AMDVI_COMPLETION_WAIT_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_completion_wait_fail(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_AMDVI_CONTROL_STATUS 0
+#define TRACE_AMDVI_CONTROL_STATUS_ENABLED 0
+#define TRACE_AMDVI_CONTROL_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_control_status(uint64_t val) {
+ (void)val;
+}
+#define TRACE_AMDVI_DEVTAB_INVAL 0
+#define TRACE_AMDVI_DEVTAB_INVAL_ENABLED 0
+#define TRACE_AMDVI_DEVTAB_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_devtab_inval(uint8_t bus, uint8_t slot, uint8_t func) {
+ (void)bus;
+ (void)slot;
+ (void)func;
+}
+#define TRACE_AMDVI_DTE_GET_FAIL 0
+#define TRACE_AMDVI_DTE_GET_FAIL_ENABLED 0
+#define TRACE_AMDVI_DTE_GET_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_dte_get_fail(uint64_t addr, uint32_t offset) {
+ (void)addr;
+ (void)offset;
+}
+#define TRACE_AMDVI_ERR 0
+#define TRACE_AMDVI_ERR_ENABLED 0
+#define TRACE_AMDVI_ERR_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_err(const char *str) {
+ (void)str;
+}
+#define TRACE_AMDVI_EVNTLOG_FAIL 0
+#define TRACE_AMDVI_EVNTLOG_FAIL_ENABLED 0
+#define TRACE_AMDVI_EVNTLOG_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_evntlog_fail(uint64_t addr, uint32_t head) {
+ (void)addr;
+ (void)head;
+}
+#define TRACE_AMDVI_GET_PTE_HWERROR 0
+#define TRACE_AMDVI_GET_PTE_HWERROR_ENABLED 0
+#define TRACE_AMDVI_GET_PTE_HWERROR_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_get_pte_hwerror(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_AMDVI_INTR_INVAL 0
+#define TRACE_AMDVI_INTR_INVAL_ENABLED 0
+#define TRACE_AMDVI_INTR_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_intr_inval(void) {
+}
+#define TRACE_AMDVI_INVALID_DTE 0
+#define TRACE_AMDVI_INVALID_DTE_ENABLED 0
+#define TRACE_AMDVI_INVALID_DTE_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_invalid_dte(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_AMDVI_IOTLB_HIT 0
+#define TRACE_AMDVI_IOTLB_HIT_ENABLED 0
+#define TRACE_AMDVI_IOTLB_HIT_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_iotlb_hit(uint8_t bus, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) {
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)addr;
+ (void)txaddr;
+}
+#define TRACE_AMDVI_IOTLB_INVAL 0
+#define TRACE_AMDVI_IOTLB_INVAL_ENABLED 0
+#define TRACE_AMDVI_IOTLB_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_iotlb_inval(void) {
+}
+#define TRACE_AMDVI_IOTLB_RESET 0
+#define TRACE_AMDVI_IOTLB_RESET_ENABLED 0
+#define TRACE_AMDVI_IOTLB_RESET_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_iotlb_reset(void) {
+}
+#define TRACE_AMDVI_IR_DELIVERY_MODE 0
+#define TRACE_AMDVI_IR_DELIVERY_MODE_ENABLED 0
+#define TRACE_AMDVI_IR_DELIVERY_MODE_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_delivery_mode(const char *str) {
+ (void)str;
+}
+#define TRACE_AMDVI_IR_ERR 0
+#define TRACE_AMDVI_IR_ERR_ENABLED 0
+#define TRACE_AMDVI_IR_ERR_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_err(const char *str) {
+ (void)str;
+}
+#define TRACE_AMDVI_IR_INTCTL 0
+#define TRACE_AMDVI_IR_INTCTL_ENABLED 0
+#define TRACE_AMDVI_IR_INTCTL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_intctl(uint8_t val) {
+ (void)val;
+}
+#define TRACE_AMDVI_IR_IRTE 0
+#define TRACE_AMDVI_IR_IRTE_ENABLED 0
+#define TRACE_AMDVI_IR_IRTE_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_irte(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_AMDVI_IR_IRTE_GA_VAL 0
+#define TRACE_AMDVI_IR_IRTE_GA_VAL_ENABLED 0
+#define TRACE_AMDVI_IR_IRTE_GA_VAL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) {
+ (void)hi;
+ (void)lo;
+}
+#define TRACE_AMDVI_IR_IRTE_VAL 0
+#define TRACE_AMDVI_IR_IRTE_VAL_ENABLED 0
+#define TRACE_AMDVI_IR_IRTE_VAL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_irte_val(uint32_t data) {
+ (void)data;
+}
+#define TRACE_AMDVI_IR_REMAP_MSI 0
+#define TRACE_AMDVI_IR_REMAP_MSI_ENABLED 0
+#define TRACE_AMDVI_IR_REMAP_MSI_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_remap_msi(uint64_t addr, uint64_t data, uint64_t addr2, uint64_t data2) {
+ (void)addr;
+ (void)data;
+ (void)addr2;
+ (void)data2;
+}
+#define TRACE_AMDVI_IR_REMAP_MSI_REQ 0
+#define TRACE_AMDVI_IR_REMAP_MSI_REQ_ENABLED 0
+#define TRACE_AMDVI_IR_REMAP_MSI_REQ_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_remap_msi_req(uint64_t addr, uint64_t data, uint8_t devid) {
+ (void)addr;
+ (void)data;
+ (void)devid;
+}
+#define TRACE_AMDVI_IR_TARGET_ABORT 0
+#define TRACE_AMDVI_IR_TARGET_ABORT_ENABLED 0
+#define TRACE_AMDVI_IR_TARGET_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ir_target_abort(const char *str) {
+ (void)str;
+}
+#define TRACE_AMDVI_MEM_IR_WRITE 0
+#define TRACE_AMDVI_MEM_IR_WRITE_ENABLED 0
+#define TRACE_AMDVI_MEM_IR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_mem_ir_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AMDVI_MEM_IR_WRITE_REQ 0
+#define TRACE_AMDVI_MEM_IR_WRITE_REQ_ENABLED 0
+#define TRACE_AMDVI_MEM_IR_WRITE_REQ_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_mem_ir_write_req(uint64_t addr, uint64_t val, uint32_t size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_AMDVI_MMIO_READ 0
+#define TRACE_AMDVI_MMIO_READ_ENABLED 0
+#define TRACE_AMDVI_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_mmio_read(const char *reg, uint64_t addr, unsigned size, uint64_t offset) {
+ (void)reg;
+ (void)addr;
+ (void)size;
+ (void)offset;
+}
+#define TRACE_AMDVI_MMIO_READ_INVALID 0
+#define TRACE_AMDVI_MMIO_READ_INVALID_ENABLED 0
+#define TRACE_AMDVI_MMIO_READ_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_mmio_read_invalid(int max, uint64_t addr, unsigned size) {
+ (void)max;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_AMDVI_MMIO_WRITE 0
+#define TRACE_AMDVI_MMIO_WRITE_ENABLED 0
+#define TRACE_AMDVI_MMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_mmio_write(const char *reg, uint64_t addr, unsigned size, uint64_t val, uint64_t offset) {
+ (void)reg;
+ (void)addr;
+ (void)size;
+ (void)val;
+ (void)offset;
+}
+#define TRACE_AMDVI_MODE_INVALID 0
+#define TRACE_AMDVI_MODE_INVALID_ENABLED 0
+#define TRACE_AMDVI_MODE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_mode_invalid(uint8_t level, uint64_t addr) {
+ (void)level;
+ (void)addr;
+}
+#define TRACE_AMDVI_PAGE_FAULT 0
+#define TRACE_AMDVI_PAGE_FAULT_ENABLED 0
+#define TRACE_AMDVI_PAGE_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_page_fault(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_AMDVI_PAGES_INVAL 0
+#define TRACE_AMDVI_PAGES_INVAL_ENABLED 0
+#define TRACE_AMDVI_PAGES_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_pages_inval(uint16_t domid) {
+ (void)domid;
+}
+#define TRACE_AMDVI_PPR_EXEC 0
+#define TRACE_AMDVI_PPR_EXEC_ENABLED 0
+#define TRACE_AMDVI_PPR_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_ppr_exec(void) {
+}
+#define TRACE_AMDVI_PREFETCH_PAGES 0
+#define TRACE_AMDVI_PREFETCH_PAGES_ENABLED 0
+#define TRACE_AMDVI_PREFETCH_PAGES_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_prefetch_pages(void) {
+}
+#define TRACE_AMDVI_TRANSLATION_RESULT 0
+#define TRACE_AMDVI_TRANSLATION_RESULT_ENABLED 0
+#define TRACE_AMDVI_TRANSLATION_RESULT_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_translation_result(uint8_t bus, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) {
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)addr;
+ (void)txaddr;
+}
+#define TRACE_AMDVI_UNHANDLED_COMMAND 0
+#define TRACE_AMDVI_UNHANDLED_COMMAND_ENABLED 0
+#define TRACE_AMDVI_UNHANDLED_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_amdvi_unhandled_command(uint8_t type) {
+ (void)type;
+}
+#define TRACE_PORT92_READ 0
+#define TRACE_PORT92_READ_ENABLED 0
+#define TRACE_PORT92_READ_BACKEND_DSTATE() (0)
+static inline void trace_port92_read(uint8_t val) {
+ (void)val;
+}
+#define TRACE_PORT92_WRITE 0
+#define TRACE_PORT92_WRITE_ENABLED 0
+#define TRACE_PORT92_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_port92_write(uint8_t val) {
+ (void)val;
+}
+#define TRACE_VMMOUSE_DATA 0
+#define TRACE_VMMOUSE_DATA_ENABLED 0
+#define TRACE_VMMOUSE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_data(uint32_t size) {
+ (void)size;
+}
+#define TRACE_VMMOUSE_DISABLE 0
+#define TRACE_VMMOUSE_DISABLE_ENABLED 0
+#define TRACE_VMMOUSE_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_disable(void) {
+}
+#define TRACE_VMMOUSE_GET_STATUS 0
+#define TRACE_VMMOUSE_GET_STATUS_ENABLED 0
+#define TRACE_VMMOUSE_GET_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_get_status(void) {
+}
+#define TRACE_VMMOUSE_INIT 0
+#define TRACE_VMMOUSE_INIT_ENABLED 0
+#define TRACE_VMMOUSE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_init(void) {
+}
+#define TRACE_VMMOUSE_MOUSE_EVENT 0
+#define TRACE_VMMOUSE_MOUSE_EVENT_ENABLED 0
+#define TRACE_VMMOUSE_MOUSE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_mouse_event(int x, int y, int dz, int buttons_state) {
+ (void)x;
+ (void)y;
+ (void)dz;
+ (void)buttons_state;
+}
+#define TRACE_VMMOUSE_READ_ID 0
+#define TRACE_VMMOUSE_READ_ID_ENABLED 0
+#define TRACE_VMMOUSE_READ_ID_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_read_id(void) {
+}
+#define TRACE_VMMOUSE_REQUEST_ABSOLUTE 0
+#define TRACE_VMMOUSE_REQUEST_ABSOLUTE_ENABLED 0
+#define TRACE_VMMOUSE_REQUEST_ABSOLUTE_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_request_absolute(void) {
+}
+#define TRACE_VMMOUSE_REQUEST_RELATIVE 0
+#define TRACE_VMMOUSE_REQUEST_RELATIVE_ENABLED 0
+#define TRACE_VMMOUSE_REQUEST_RELATIVE_BACKEND_DSTATE() (0)
+static inline void trace_vmmouse_request_relative(void) {
+}
+#define TRACE_VMPORT_COMMAND 0
+#define TRACE_VMPORT_COMMAND_ENABLED 0
+#define TRACE_VMPORT_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_vmport_command(unsigned char command) {
+ (void)command;
+}
+#define TRACE_VMPORT_REGISTER 0
+#define TRACE_VMPORT_REGISTER_ENABLED 0
+#define TRACE_VMPORT_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_vmport_register(unsigned char command, void *func, void *opaque) {
+ (void)command;
+ (void)func;
+ (void)opaque;
+}
+#define TRACE_VTD_AS_UNMAP_WHOLE 0
+#define TRACE_VTD_AS_UNMAP_WHOLE_ENABLED 0
+#define TRACE_VTD_AS_UNMAP_WHOLE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_as_unmap_whole(uint8_t bus, uint8_t slot, uint8_t fn, uint64_t iova, uint64_t size) {
+ (void)bus;
+ (void)slot;
+ (void)fn;
+ (void)iova;
+ (void)size;
+}
+#define TRACE_VTD_CE_NOT_PRESENT 0
+#define TRACE_VTD_CE_NOT_PRESENT_ENABLED 0
+#define TRACE_VTD_CE_NOT_PRESENT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_ce_not_present(uint8_t bus, uint8_t devfn) {
+ (void)bus;
+ (void)devfn;
+}
+#define TRACE_VTD_CONTEXT_CACHE_RESET 0
+#define TRACE_VTD_CONTEXT_CACHE_RESET_ENABLED 0
+#define TRACE_VTD_CONTEXT_CACHE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_vtd_context_cache_reset(void) {
+}
+#define TRACE_VTD_DMAR_ENABLE 0
+#define TRACE_VTD_DMAR_ENABLE_ENABLED 0
+#define TRACE_VTD_DMAR_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_dmar_enable(bool en) {
+ (void)en;
+}
+#define TRACE_VTD_DMAR_FAULT 0
+#define TRACE_VTD_DMAR_FAULT_ENABLED 0
+#define TRACE_VTD_DMAR_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_dmar_fault(uint16_t sid, int fault, uint64_t addr, bool is_write) {
+ (void)sid;
+ (void)fault;
+ (void)addr;
+ (void)is_write;
+}
+#define TRACE_VTD_DMAR_TRANSLATE 0
+#define TRACE_VTD_DMAR_TRANSLATE_ENABLED 0
+#define TRACE_VTD_DMAR_TRANSLATE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_dmar_translate(uint8_t bus, uint8_t slot, uint8_t func, uint64_t iova, uint64_t gpa, uint64_t mask) {
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)iova;
+ (void)gpa;
+ (void)mask;
+}
+#define TRACE_VTD_FAULT_DISABLED 0
+#define TRACE_VTD_FAULT_DISABLED_ENABLED 0
+#define TRACE_VTD_FAULT_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_vtd_fault_disabled(void) {
+}
+#define TRACE_VTD_FRR_NEW 0
+#define TRACE_VTD_FRR_NEW_ENABLED 0
+#define TRACE_VTD_FRR_NEW_BACKEND_DSTATE() (0)
+static inline void trace_vtd_frr_new(int index, uint64_t hi, uint64_t lo) {
+ (void)index;
+ (void)hi;
+ (void)lo;
+}
+#define TRACE_VTD_FSTS_CLEAR_IP 0
+#define TRACE_VTD_FSTS_CLEAR_IP_ENABLED 0
+#define TRACE_VTD_FSTS_CLEAR_IP_BACKEND_DSTATE() (0)
+static inline void trace_vtd_fsts_clear_ip(void) {
+}
+#define TRACE_VTD_FSTS_PPF 0
+#define TRACE_VTD_FSTS_PPF_ENABLED 0
+#define TRACE_VTD_FSTS_PPF_BACKEND_DSTATE() (0)
+static inline void trace_vtd_fsts_ppf(bool set) {
+ (void)set;
+}
+#define TRACE_VTD_INV_DESC 0
+#define TRACE_VTD_INV_DESC_ENABLED 0
+#define TRACE_VTD_INV_DESC_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc(const char *type, uint64_t hi, uint64_t lo) {
+ (void)type;
+ (void)hi;
+ (void)lo;
+}
+#define TRACE_VTD_INV_DESC_CC_DEVICE 0
+#define TRACE_VTD_INV_DESC_CC_DEVICE_ENABLED 0
+#define TRACE_VTD_INV_DESC_CC_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_cc_device(uint8_t bus, uint8_t dev, uint8_t fn) {
+ (void)bus;
+ (void)dev;
+ (void)fn;
+}
+#define TRACE_VTD_INV_DESC_CC_DEVICES 0
+#define TRACE_VTD_INV_DESC_CC_DEVICES_ENABLED 0
+#define TRACE_VTD_INV_DESC_CC_DEVICES_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_cc_devices(uint16_t sid, uint16_t fmask) {
+ (void)sid;
+ (void)fmask;
+}
+#define TRACE_VTD_INV_DESC_CC_DOMAIN 0
+#define TRACE_VTD_INV_DESC_CC_DOMAIN_ENABLED 0
+#define TRACE_VTD_INV_DESC_CC_DOMAIN_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_cc_domain(uint16_t domain) {
+ (void)domain;
+}
+#define TRACE_VTD_INV_DESC_CC_GLOBAL 0
+#define TRACE_VTD_INV_DESC_CC_GLOBAL_ENABLED 0
+#define TRACE_VTD_INV_DESC_CC_GLOBAL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_cc_global(void) {
+}
+#define TRACE_VTD_INV_DESC_IEC 0
+#define TRACE_VTD_INV_DESC_IEC_ENABLED 0
+#define TRACE_VTD_INV_DESC_IEC_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_iec(uint32_t granularity, uint32_t index, uint32_t mask) {
+ (void)granularity;
+ (void)index;
+ (void)mask;
+}
+#define TRACE_VTD_INV_DESC_IOTLB_DOMAIN 0
+#define TRACE_VTD_INV_DESC_IOTLB_DOMAIN_ENABLED 0
+#define TRACE_VTD_INV_DESC_IOTLB_DOMAIN_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_iotlb_domain(uint16_t domain) {
+ (void)domain;
+}
+#define TRACE_VTD_INV_DESC_IOTLB_GLOBAL 0
+#define TRACE_VTD_INV_DESC_IOTLB_GLOBAL_ENABLED 0
+#define TRACE_VTD_INV_DESC_IOTLB_GLOBAL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_iotlb_global(void) {
+}
+#define TRACE_VTD_INV_DESC_IOTLB_PAGES 0
+#define TRACE_VTD_INV_DESC_IOTLB_PAGES_ENABLED 0
+#define TRACE_VTD_INV_DESC_IOTLB_PAGES_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_iotlb_pages(uint16_t domain, uint64_t addr, uint8_t mask) {
+ (void)domain;
+ (void)addr;
+ (void)mask;
+}
+#define TRACE_VTD_INV_DESC_IOTLB_PASID 0
+#define TRACE_VTD_INV_DESC_IOTLB_PASID_ENABLED 0
+#define TRACE_VTD_INV_DESC_IOTLB_PASID_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_iotlb_pasid(uint16_t domain, uint32_t pasid) {
+ (void)domain;
+ (void)pasid;
+}
+#define TRACE_VTD_INV_DESC_IOTLB_PASID_PAGES 0
+#define TRACE_VTD_INV_DESC_IOTLB_PASID_PAGES_ENABLED 0
+#define TRACE_VTD_INV_DESC_IOTLB_PASID_PAGES_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_iotlb_pasid_pages(uint16_t domain, uint64_t addr, uint8_t mask, uint32_t pasid) {
+ (void)domain;
+ (void)addr;
+ (void)mask;
+ (void)pasid;
+}
+#define TRACE_VTD_INV_DESC_PASID_CACHE_DSI 0
+#define TRACE_VTD_INV_DESC_PASID_CACHE_DSI_ENABLED 0
+#define TRACE_VTD_INV_DESC_PASID_CACHE_DSI_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_pasid_cache_dsi(uint16_t domain) {
+ (void)domain;
+}
+#define TRACE_VTD_INV_DESC_PASID_CACHE_GSI 0
+#define TRACE_VTD_INV_DESC_PASID_CACHE_GSI_ENABLED 0
+#define TRACE_VTD_INV_DESC_PASID_CACHE_GSI_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_pasid_cache_gsi(void) {
+}
+#define TRACE_VTD_INV_DESC_PASID_CACHE_PSI 0
+#define TRACE_VTD_INV_DESC_PASID_CACHE_PSI_ENABLED 0
+#define TRACE_VTD_INV_DESC_PASID_CACHE_PSI_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_pasid_cache_psi(uint16_t domain, uint32_t pasid) {
+ (void)domain;
+ (void)pasid;
+}
+#define TRACE_VTD_INV_DESC_WAIT_IRQ 0
+#define TRACE_VTD_INV_DESC_WAIT_IRQ_ENABLED 0
+#define TRACE_VTD_INV_DESC_WAIT_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_wait_irq(const char *msg) {
+ (void)msg;
+}
+#define TRACE_VTD_INV_DESC_WAIT_SW 0
+#define TRACE_VTD_INV_DESC_WAIT_SW_ENABLED 0
+#define TRACE_VTD_INV_DESC_WAIT_SW_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_wait_sw(uint64_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_VTD_INV_DESC_WAIT_WRITE_FAIL 0
+#define TRACE_VTD_INV_DESC_WAIT_WRITE_FAIL_ENABLED 0
+#define TRACE_VTD_INV_DESC_WAIT_WRITE_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_desc_wait_write_fail(uint64_t hi, uint64_t lo) {
+ (void)hi;
+ (void)lo;
+}
+#define TRACE_VTD_INV_QI_ENABLE 0
+#define TRACE_VTD_INV_QI_ENABLE_ENABLED 0
+#define TRACE_VTD_INV_QI_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_qi_enable(bool enable) {
+ (void)enable;
+}
+#define TRACE_VTD_INV_QI_FETCH 0
+#define TRACE_VTD_INV_QI_FETCH_ENABLED 0
+#define TRACE_VTD_INV_QI_FETCH_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_qi_fetch(void) {
+}
+#define TRACE_VTD_INV_QI_HEAD 0
+#define TRACE_VTD_INV_QI_HEAD_ENABLED 0
+#define TRACE_VTD_INV_QI_HEAD_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_qi_head(uint16_t head) {
+ (void)head;
+}
+#define TRACE_VTD_INV_QI_SETUP 0
+#define TRACE_VTD_INV_QI_SETUP_ENABLED 0
+#define TRACE_VTD_INV_QI_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_qi_setup(uint64_t addr, int size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_VTD_INV_QI_TAIL 0
+#define TRACE_VTD_INV_QI_TAIL_ENABLED 0
+#define TRACE_VTD_INV_QI_TAIL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_inv_qi_tail(uint16_t head) {
+ (void)head;
+}
+#define TRACE_VTD_IOTLB_CC_HIT 0
+#define TRACE_VTD_IOTLB_CC_HIT_ENABLED 0
+#define TRACE_VTD_IOTLB_CC_HIT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_iotlb_cc_hit(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen) {
+ (void)bus;
+ (void)devfn;
+ (void)high;
+ (void)low;
+ (void)gen;
+}
+#define TRACE_VTD_IOTLB_CC_UPDATE 0
+#define TRACE_VTD_IOTLB_CC_UPDATE_ENABLED 0
+#define TRACE_VTD_IOTLB_CC_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_iotlb_cc_update(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen1, uint32_t gen2) {
+ (void)bus;
+ (void)devfn;
+ (void)high;
+ (void)low;
+ (void)gen1;
+ (void)gen2;
+}
+#define TRACE_VTD_IOTLB_PAGE_HIT 0
+#define TRACE_VTD_IOTLB_PAGE_HIT_ENABLED 0
+#define TRACE_VTD_IOTLB_PAGE_HIT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_iotlb_page_hit(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) {
+ (void)sid;
+ (void)addr;
+ (void)slpte;
+ (void)domain;
+}
+#define TRACE_VTD_IOTLB_PAGE_UPDATE 0
+#define TRACE_VTD_IOTLB_PAGE_UPDATE_ENABLED 0
+#define TRACE_VTD_IOTLB_PAGE_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_iotlb_page_update(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) {
+ (void)sid;
+ (void)addr;
+ (void)slpte;
+ (void)domain;
+}
+#define TRACE_VTD_IOTLB_RESET 0
+#define TRACE_VTD_IOTLB_RESET_ENABLED 0
+#define TRACE_VTD_IOTLB_RESET_BACKEND_DSTATE() (0)
+static inline void trace_vtd_iotlb_reset(const char *reason) {
+ (void)reason;
+}
+#define TRACE_VTD_IR_ENABLE 0
+#define TRACE_VTD_IR_ENABLE_ENABLED 0
+#define TRACE_VTD_IR_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_ir_enable(bool en) {
+ (void)en;
+}
+#define TRACE_VTD_IR_IRTE_GET 0
+#define TRACE_VTD_IR_IRTE_GET_ENABLED 0
+#define TRACE_VTD_IR_IRTE_GET_BACKEND_DSTATE() (0)
+static inline void trace_vtd_ir_irte_get(int index, uint64_t lo, uint64_t hi) {
+ (void)index;
+ (void)lo;
+ (void)hi;
+}
+#define TRACE_VTD_IR_REMAP 0
+#define TRACE_VTD_IR_REMAP_ENABLED 0
+#define TRACE_VTD_IR_REMAP_BACKEND_DSTATE() (0)
+static inline void trace_vtd_ir_remap(int index, int tri, int vec, int deliver, uint32_t dest, int dest_mode) {
+ (void)index;
+ (void)tri;
+ (void)vec;
+ (void)deliver;
+ (void)dest;
+ (void)dest_mode;
+}
+#define TRACE_VTD_IR_REMAP_MSI 0
+#define TRACE_VTD_IR_REMAP_MSI_ENABLED 0
+#define TRACE_VTD_IR_REMAP_MSI_BACKEND_DSTATE() (0)
+static inline void trace_vtd_ir_remap_msi(uint64_t addr, uint64_t data, uint64_t addr2, uint64_t data2) {
+ (void)addr;
+ (void)data;
+ (void)addr2;
+ (void)data2;
+}
+#define TRACE_VTD_IR_REMAP_MSI_REQ 0
+#define TRACE_VTD_IR_REMAP_MSI_REQ_ENABLED 0
+#define TRACE_VTD_IR_REMAP_MSI_REQ_BACKEND_DSTATE() (0)
+static inline void trace_vtd_ir_remap_msi_req(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_VTD_IR_REMAP_TYPE 0
+#define TRACE_VTD_IR_REMAP_TYPE_ENABLED 0
+#define TRACE_VTD_IR_REMAP_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_ir_remap_type(const char *type) {
+ (void)type;
+}
+#define TRACE_VTD_IRQ_GENERATE 0
+#define TRACE_VTD_IRQ_GENERATE_ENABLED 0
+#define TRACE_VTD_IRQ_GENERATE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_irq_generate(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_VTD_PAGE_WALK_LEVEL 0
+#define TRACE_VTD_PAGE_WALK_LEVEL_ENABLED 0
+#define TRACE_VTD_PAGE_WALK_LEVEL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t end) {
+ (void)addr;
+ (void)level;
+ (void)start;
+ (void)end;
+}
+#define TRACE_VTD_PAGE_WALK_ONE 0
+#define TRACE_VTD_PAGE_WALK_ONE_ENABLED 0
+#define TRACE_VTD_PAGE_WALK_ONE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_page_walk_one(uint16_t domain, uint64_t iova, uint64_t gpa, uint64_t mask, int perm) {
+ (void)domain;
+ (void)iova;
+ (void)gpa;
+ (void)mask;
+ (void)perm;
+}
+#define TRACE_VTD_PAGE_WALK_ONE_SKIP_MAP 0
+#define TRACE_VTD_PAGE_WALK_ONE_SKIP_MAP_ENABLED 0
+#define TRACE_VTD_PAGE_WALK_ONE_SKIP_MAP_BACKEND_DSTATE() (0)
+static inline void trace_vtd_page_walk_one_skip_map(uint64_t iova, uint64_t mask, uint64_t translated) {
+ (void)iova;
+ (void)mask;
+ (void)translated;
+}
+#define TRACE_VTD_PAGE_WALK_ONE_SKIP_UNMAP 0
+#define TRACE_VTD_PAGE_WALK_ONE_SKIP_UNMAP_ENABLED 0
+#define TRACE_VTD_PAGE_WALK_ONE_SKIP_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_vtd_page_walk_one_skip_unmap(uint64_t iova, uint64_t mask) {
+ (void)iova;
+ (void)mask;
+}
+#define TRACE_VTD_PAGE_WALK_SKIP_READ 0
+#define TRACE_VTD_PAGE_WALK_SKIP_READ_ENABLED 0
+#define TRACE_VTD_PAGE_WALK_SKIP_READ_BACKEND_DSTATE() (0)
+static inline void trace_vtd_page_walk_skip_read(uint64_t iova, uint64_t next) {
+ (void)iova;
+ (void)next;
+}
+#define TRACE_VTD_PAGE_WALK_SKIP_RESERVE 0
+#define TRACE_VTD_PAGE_WALK_SKIP_RESERVE_ENABLED 0
+#define TRACE_VTD_PAGE_WALK_SKIP_RESERVE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) {
+ (void)iova;
+ (void)next;
+}
+#define TRACE_VTD_PASID_CACHE_RESET 0
+#define TRACE_VTD_PASID_CACHE_RESET_ENABLED 0
+#define TRACE_VTD_PASID_CACHE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_vtd_pasid_cache_reset(void) {
+}
+#define TRACE_VTD_PT_ENABLE_FAST_PATH 0
+#define TRACE_VTD_PT_ENABLE_FAST_PATH_ENABLED 0
+#define TRACE_VTD_PT_ENABLE_FAST_PATH_BACKEND_DSTATE() (0)
+static inline void trace_vtd_pt_enable_fast_path(uint16_t sid, bool success) {
+ (void)sid;
+ (void)success;
+}
+#define TRACE_VTD_RE_NOT_PRESENT 0
+#define TRACE_VTD_RE_NOT_PRESENT_ENABLED 0
+#define TRACE_VTD_RE_NOT_PRESENT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_re_not_present(uint8_t bus) {
+ (void)bus;
+}
+#define TRACE_VTD_REG_DMAR_ROOT 0
+#define TRACE_VTD_REG_DMAR_ROOT_ENABLED 0
+#define TRACE_VTD_REG_DMAR_ROOT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_dmar_root(uint64_t addr, bool scalable) {
+ (void)addr;
+ (void)scalable;
+}
+#define TRACE_VTD_REG_ICS_CLEAR_IP 0
+#define TRACE_VTD_REG_ICS_CLEAR_IP_ENABLED 0
+#define TRACE_VTD_REG_ICS_CLEAR_IP_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_ics_clear_ip(void) {
+}
+#define TRACE_VTD_REG_IR_ROOT 0
+#define TRACE_VTD_REG_IR_ROOT_ENABLED 0
+#define TRACE_VTD_REG_IR_ROOT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_ir_root(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_VTD_REG_READ 0
+#define TRACE_VTD_REG_READ_ENABLED 0
+#define TRACE_VTD_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_read(uint64_t addr, uint64_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_VTD_REG_WRITE 0
+#define TRACE_VTD_REG_WRITE_ENABLED 0
+#define TRACE_VTD_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_write(uint64_t addr, uint64_t size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_VTD_REG_WRITE_FECTL 0
+#define TRACE_VTD_REG_WRITE_FECTL_ENABLED 0
+#define TRACE_VTD_REG_WRITE_FECTL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_write_fectl(uint32_t value) {
+ (void)value;
+}
+#define TRACE_VTD_REG_WRITE_GCMD 0
+#define TRACE_VTD_REG_WRITE_GCMD_ENABLED 0
+#define TRACE_VTD_REG_WRITE_GCMD_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_write_gcmd(uint32_t status, uint32_t val) {
+ (void)status;
+ (void)val;
+}
+#define TRACE_VTD_REG_WRITE_IECTL 0
+#define TRACE_VTD_REG_WRITE_IECTL_ENABLED 0
+#define TRACE_VTD_REG_WRITE_IECTL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reg_write_iectl(uint32_t value) {
+ (void)value;
+}
+#define TRACE_VTD_REPLAY_CE_INVALID 0
+#define TRACE_VTD_REPLAY_CE_INVALID_ENABLED 0
+#define TRACE_VTD_REPLAY_CE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) {
+ (void)bus;
+ (void)dev;
+ (void)fn;
+}
+#define TRACE_VTD_REPLAY_CE_VALID 0
+#define TRACE_VTD_REPLAY_CE_VALID_ENABLED 0
+#define TRACE_VTD_REPLAY_CE_VALID_BACKEND_DSTATE() (0)
+static inline void trace_vtd_replay_ce_valid(const char *mode, uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain, uint64_t hi, uint64_t lo) {
+ (void)mode;
+ (void)bus;
+ (void)dev;
+ (void)fn;
+ (void)domain;
+ (void)hi;
+ (void)lo;
+}
+#define TRACE_VTD_RESET_EXIT 0
+#define TRACE_VTD_RESET_EXIT_ENABLED 0
+#define TRACE_VTD_RESET_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_reset_exit(void) {
+}
+#define TRACE_VTD_SWITCH_ADDRESS_SPACE 0
+#define TRACE_VTD_SWITCH_ADDRESS_SPACE_ENABLED 0
+#define TRACE_VTD_SWITCH_ADDRESS_SPACE_BACKEND_DSTATE() (0)
+static inline void trace_vtd_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) {
+ (void)bus;
+ (void)slot;
+ (void)fn;
+ (void)on;
+}
+#define TRACE_VTD_TRANSLATE_PT 0
+#define TRACE_VTD_TRANSLATE_PT_ENABLED 0
+#define TRACE_VTD_TRANSLATE_PT_BACKEND_DSTATE() (0)
+static inline void trace_vtd_translate_pt(uint16_t sid, uint64_t addr) {
+ (void)sid;
+ (void)addr;
+}
+#define TRACE_VTD_WARN_INVALID_QI_TAIL 0
+#define TRACE_VTD_WARN_INVALID_QI_TAIL_ENABLED 0
+#define TRACE_VTD_WARN_INVALID_QI_TAIL_BACKEND_DSTATE() (0)
+static inline void trace_vtd_warn_invalid_qi_tail(uint16_t tail) {
+ (void)tail;
+}
+#define TRACE_VTD_WARN_IR_TRIGGER 0
+#define TRACE_VTD_WARN_IR_TRIGGER_ENABLED 0
+#define TRACE_VTD_WARN_IR_TRIGGER_BACKEND_DSTATE() (0)
+static inline void trace_vtd_warn_ir_trigger(uint16_t sid, int index, int trig, int target) {
+ (void)sid;
+ (void)index;
+ (void)trig;
+ (void)target;
+}
+#define TRACE_VTD_WARN_IR_VECTOR 0
+#define TRACE_VTD_WARN_IR_VECTOR_ENABLED 0
+#define TRACE_VTD_WARN_IR_VECTOR_BACKEND_DSTATE() (0)
+static inline void trace_vtd_warn_ir_vector(uint16_t sid, int index, int vec, int target) {
+ (void)sid;
+ (void)index;
+ (void)vec;
+ (void)target;
+}
+#define TRACE_X86_GSI_INTERRUPT 0
+#define TRACE_X86_GSI_INTERRUPT_ENABLED 0
+#define TRACE_X86_GSI_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_x86_gsi_interrupt(int irqn, int level) {
+ (void)irqn;
+ (void)level;
+}
+#define TRACE_X86_IOMMU_IEC_NOTIFY 0
+#define TRACE_X86_IOMMU_IEC_NOTIFY_ENABLED 0
+#define TRACE_X86_IOMMU_IEC_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_x86_iommu_iec_notify(bool global, uint32_t index, uint32_t mask) {
+ (void)global;
+ (void)index;
+ (void)mask;
+}
+#define TRACE_X86_PIC_INTERRUPT 0
+#define TRACE_X86_PIC_INTERRUPT_ENABLED 0
+#define TRACE_X86_PIC_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_x86_pic_interrupt(int irqn, int level) {
+ (void)irqn;
+ (void)level;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_i386_kvm.h b/trace/trace-hw_i386_kvm.h
new file mode 100644
index 0000000000..414e8c0664
--- /dev/null
+++ b/trace/trace-hw_i386_kvm.h
@@ -0,0 +1,164 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_I386_KVM_H
+#define TRACE_TRACE_HW_I386_KVM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_KVM_XEN_BIND_PIRQ 0
+#define TRACE_KVM_XEN_BIND_PIRQ_ENABLED 0
+#define TRACE_KVM_XEN_BIND_PIRQ_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_bind_pirq(int pirq, int port) {
+ (void)pirq;
+ (void)port;
+}
+#define TRACE_KVM_XEN_GET_FREE_PIRQ 0
+#define TRACE_KVM_XEN_GET_FREE_PIRQ_ENABLED 0
+#define TRACE_KVM_XEN_GET_FREE_PIRQ_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_get_free_pirq(int pirq, int type) {
+ (void)pirq;
+ (void)type;
+}
+#define TRACE_KVM_XEN_MAP_PIRQ 0
+#define TRACE_KVM_XEN_MAP_PIRQ_ENABLED 0
+#define TRACE_KVM_XEN_MAP_PIRQ_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_map_pirq(int pirq, int gsi) {
+ (void)pirq;
+ (void)gsi;
+}
+#define TRACE_KVM_XEN_UNMAP_PIRQ 0
+#define TRACE_KVM_XEN_UNMAP_PIRQ_ENABLED 0
+#define TRACE_KVM_XEN_UNMAP_PIRQ_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_unmap_pirq(int pirq, int gsi) {
+ (void)pirq;
+ (void)gsi;
+}
+#define TRACE_KVM_XEN_UNMASK_PIRQ 0
+#define TRACE_KVM_XEN_UNMASK_PIRQ_ENABLED 0
+#define TRACE_KVM_XEN_UNMASK_PIRQ_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_unmask_pirq(int pirq, char *dev, int vector) {
+ (void)pirq;
+ (void)dev;
+ (void)vector;
+}
+#define TRACE_XEN_PRIMARY_CONSOLE_CREATE 0
+#define TRACE_XEN_PRIMARY_CONSOLE_CREATE_ENABLED 0
+#define TRACE_XEN_PRIMARY_CONSOLE_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_primary_console_create(void) {
+}
+#define TRACE_XEN_PRIMARY_CONSOLE_RESET 0
+#define TRACE_XEN_PRIMARY_CONSOLE_RESET_ENABLED 0
+#define TRACE_XEN_PRIMARY_CONSOLE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_xen_primary_console_reset(int port) {
+ (void)port;
+}
+#define TRACE_XENSTORE_DIRECTORY 0
+#define TRACE_XENSTORE_DIRECTORY_ENABLED 0
+#define TRACE_XENSTORE_DIRECTORY_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_directory(unsigned int tx_id, const char *path) {
+ (void)tx_id;
+ (void)path;
+}
+#define TRACE_XENSTORE_DIRECTORY_PART 0
+#define TRACE_XENSTORE_DIRECTORY_PART_ENABLED 0
+#define TRACE_XENSTORE_DIRECTORY_PART_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_directory_part(unsigned int tx_id, const char *path, unsigned int offset) {
+ (void)tx_id;
+ (void)path;
+ (void)offset;
+}
+#define TRACE_XENSTORE_ERROR 0
+#define TRACE_XENSTORE_ERROR_ENABLED 0
+#define TRACE_XENSTORE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_error(unsigned int id, unsigned int tx_id, const char *err) {
+ (void)id;
+ (void)tx_id;
+ (void)err;
+}
+#define TRACE_XENSTORE_GET_PERMS 0
+#define TRACE_XENSTORE_GET_PERMS_ENABLED 0
+#define TRACE_XENSTORE_GET_PERMS_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_get_perms(unsigned int tx_id, const char *path) {
+ (void)tx_id;
+ (void)path;
+}
+#define TRACE_XENSTORE_MKDIR 0
+#define TRACE_XENSTORE_MKDIR_ENABLED 0
+#define TRACE_XENSTORE_MKDIR_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_mkdir(unsigned int tx_id, const char *path) {
+ (void)tx_id;
+ (void)path;
+}
+#define TRACE_XENSTORE_READ 0
+#define TRACE_XENSTORE_READ_ENABLED 0
+#define TRACE_XENSTORE_READ_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_read(unsigned int tx_id, const char *path) {
+ (void)tx_id;
+ (void)path;
+}
+#define TRACE_XENSTORE_RESET_WATCHES 0
+#define TRACE_XENSTORE_RESET_WATCHES_ENABLED 0
+#define TRACE_XENSTORE_RESET_WATCHES_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_reset_watches(void) {
+}
+#define TRACE_XENSTORE_RM 0
+#define TRACE_XENSTORE_RM_ENABLED 0
+#define TRACE_XENSTORE_RM_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_rm(unsigned int tx_id, const char *path) {
+ (void)tx_id;
+ (void)path;
+}
+#define TRACE_XENSTORE_SET_PERMS 0
+#define TRACE_XENSTORE_SET_PERMS_ENABLED 0
+#define TRACE_XENSTORE_SET_PERMS_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_set_perms(unsigned int tx_id, const char *path) {
+ (void)tx_id;
+ (void)path;
+}
+#define TRACE_XENSTORE_TRANSACTION_END 0
+#define TRACE_XENSTORE_TRANSACTION_END_ENABLED 0
+#define TRACE_XENSTORE_TRANSACTION_END_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_transaction_end(unsigned int tx_id, bool commit) {
+ (void)tx_id;
+ (void)commit;
+}
+#define TRACE_XENSTORE_TRANSACTION_START 0
+#define TRACE_XENSTORE_TRANSACTION_START_ENABLED 0
+#define TRACE_XENSTORE_TRANSACTION_START_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_transaction_start(unsigned int new_tx) {
+ (void)new_tx;
+}
+#define TRACE_XENSTORE_UNWATCH 0
+#define TRACE_XENSTORE_UNWATCH_ENABLED 0
+#define TRACE_XENSTORE_UNWATCH_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_unwatch(const char *path, const char *token) {
+ (void)path;
+ (void)token;
+}
+#define TRACE_XENSTORE_WATCH 0
+#define TRACE_XENSTORE_WATCH_ENABLED 0
+#define TRACE_XENSTORE_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_watch(const char *path, const char *token) {
+ (void)path;
+ (void)token;
+}
+#define TRACE_XENSTORE_WATCH_EVENT 0
+#define TRACE_XENSTORE_WATCH_EVENT_ENABLED 0
+#define TRACE_XENSTORE_WATCH_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_watch_event(const char *path, const char *token) {
+ (void)path;
+ (void)token;
+}
+#define TRACE_XENSTORE_WRITE 0
+#define TRACE_XENSTORE_WRITE_ENABLED 0
+#define TRACE_XENSTORE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_xenstore_write(unsigned int tx_id, const char *path) {
+ (void)tx_id;
+ (void)path;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_i386_xen.h b/trace/trace-hw_i386_xen.h
new file mode 100644
index 0000000000..11734160e6
--- /dev/null
+++ b/trace/trace-hw_i386_xen.h
@@ -0,0 +1,31 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_I386_XEN_H
+#define TRACE_TRACE_HW_I386_XEN_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_XEN_PLATFORM_LOG 0
+#define TRACE_XEN_PLATFORM_LOG_ENABLED 0
+#define TRACE_XEN_PLATFORM_LOG_BACKEND_DSTATE() (0)
+static inline void trace_xen_platform_log(char *s) {
+ (void)s;
+}
+#define TRACE_XEN_PV_MMIO_READ 0
+#define TRACE_XEN_PV_MMIO_READ_ENABLED 0
+#define TRACE_XEN_PV_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_xen_pv_mmio_read(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_XEN_PV_MMIO_WRITE 0
+#define TRACE_XEN_PV_MMIO_WRITE_ENABLED 0
+#define TRACE_XEN_PV_MMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_xen_pv_mmio_write(uint64_t addr) {
+ (void)addr;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_ide.h b/trace/trace-hw_ide.h
new file mode 100644
index 0000000000..34db56a3a0
--- /dev/null
+++ b/trace/trace-hw_ide.h
@@ -0,0 +1,800 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_IDE_H
+#define TRACE_TRACE_HW_IDE_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_AHCI_CHECK_IRQ 0
+#define TRACE_AHCI_CHECK_IRQ_ENABLED 0
+#define TRACE_AHCI_CHECK_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_ahci_check_irq(void *s, uint32_t old, uint32_t new) {
+ (void)s;
+ (void)old;
+ (void)new;
+}
+#define TRACE_AHCI_CMD_DONE 0
+#define TRACE_AHCI_CMD_DONE_ENABLED 0
+#define TRACE_AHCI_CMD_DONE_BACKEND_DSTATE() (0)
+static inline void trace_ahci_cmd_done(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_DMA_PREPARE_BUF 0
+#define TRACE_AHCI_DMA_PREPARE_BUF_ENABLED 0
+#define TRACE_AHCI_DMA_PREPARE_BUF_BACKEND_DSTATE() (0)
+static inline void trace_ahci_dma_prepare_buf(void *s, int port, int32_t io_buffer_size, int32_t limit) {
+ (void)s;
+ (void)port;
+ (void)io_buffer_size;
+ (void)limit;
+}
+#define TRACE_AHCI_DMA_PREPARE_BUF_FAIL 0
+#define TRACE_AHCI_DMA_PREPARE_BUF_FAIL_ENABLED 0
+#define TRACE_AHCI_DMA_PREPARE_BUF_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_ahci_dma_prepare_buf_fail(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_DMA_RW_BUF 0
+#define TRACE_AHCI_DMA_RW_BUF_ENABLED 0
+#define TRACE_AHCI_DMA_RW_BUF_BACKEND_DSTATE() (0)
+static inline void trace_ahci_dma_rw_buf(void *s, int port, int l) {
+ (void)s;
+ (void)port;
+ (void)l;
+}
+#define TRACE_AHCI_IRQ_LOWER 0
+#define TRACE_AHCI_IRQ_LOWER_ENABLED 0
+#define TRACE_AHCI_IRQ_LOWER_BACKEND_DSTATE() (0)
+static inline void trace_ahci_irq_lower(void *s) {
+ (void)s;
+}
+#define TRACE_AHCI_IRQ_RAISE 0
+#define TRACE_AHCI_IRQ_RAISE_ENABLED 0
+#define TRACE_AHCI_IRQ_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_ahci_irq_raise(void *s) {
+ (void)s;
+}
+#define TRACE_AHCI_MEM_READ 0
+#define TRACE_AHCI_MEM_READ_ENABLED 0
+#define TRACE_AHCI_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_read(void *s, unsigned size, uint64_t addr, uint64_t val) {
+ (void)s;
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AHCI_MEM_READ_32 0
+#define TRACE_AHCI_MEM_READ_32_ENABLED 0
+#define TRACE_AHCI_MEM_READ_32_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_read_32(void *s, uint64_t addr, uint32_t val) {
+ (void)s;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AHCI_MEM_READ_32_DEFAULT 0
+#define TRACE_AHCI_MEM_READ_32_DEFAULT_ENABLED 0
+#define TRACE_AHCI_MEM_READ_32_DEFAULT_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_read_32_default(void *s, uint64_t addr, uint32_t val) {
+ (void)s;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AHCI_MEM_READ_32_HOST 0
+#define TRACE_AHCI_MEM_READ_32_HOST_ENABLED 0
+#define TRACE_AHCI_MEM_READ_32_HOST_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_read_32_host(void *s, const char *reg, uint64_t addr, uint32_t val) {
+ (void)s;
+ (void)reg;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AHCI_MEM_READ_32_HOST_DEFAULT 0
+#define TRACE_AHCI_MEM_READ_32_HOST_DEFAULT_ENABLED 0
+#define TRACE_AHCI_MEM_READ_32_HOST_DEFAULT_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_read_32_host_default(void *s, const char *reg, uint64_t addr) {
+ (void)s;
+ (void)reg;
+ (void)addr;
+}
+#define TRACE_AHCI_MEM_WRITE 0
+#define TRACE_AHCI_MEM_WRITE_ENABLED 0
+#define TRACE_AHCI_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_write(void *s, unsigned size, uint64_t addr, uint64_t val) {
+ (void)s;
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AHCI_MEM_WRITE_HOST 0
+#define TRACE_AHCI_MEM_WRITE_HOST_ENABLED 0
+#define TRACE_AHCI_MEM_WRITE_HOST_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_write_host(void *s, unsigned size, const char *reg, uint64_t addr, uint64_t val) {
+ (void)s;
+ (void)size;
+ (void)reg;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AHCI_MEM_WRITE_HOST_UNIMPL 0
+#define TRACE_AHCI_MEM_WRITE_HOST_UNIMPL_ENABLED 0
+#define TRACE_AHCI_MEM_WRITE_HOST_UNIMPL_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_write_host_unimpl(void *s, unsigned size, const char *reg, uint64_t addr) {
+ (void)s;
+ (void)size;
+ (void)reg;
+ (void)addr;
+}
+#define TRACE_AHCI_MEM_WRITE_UNIMPL 0
+#define TRACE_AHCI_MEM_WRITE_UNIMPL_ENABLED 0
+#define TRACE_AHCI_MEM_WRITE_UNIMPL_BACKEND_DSTATE() (0)
+static inline void trace_ahci_mem_write_unimpl(void *s, unsigned size, uint64_t addr, uint64_t val) {
+ (void)s;
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_AHCI_PIO_TRANSFER 0
+#define TRACE_AHCI_PIO_TRANSFER_ENABLED 0
+#define TRACE_AHCI_PIO_TRANSFER_BACKEND_DSTATE() (0)
+static inline void trace_ahci_pio_transfer(void *s, int port, const char *rw, uint32_t size, const char *tgt, const char *sgl) {
+ (void)s;
+ (void)port;
+ (void)rw;
+ (void)size;
+ (void)tgt;
+ (void)sgl;
+}
+#define TRACE_AHCI_POPULATE_SGLIST 0
+#define TRACE_AHCI_POPULATE_SGLIST_ENABLED 0
+#define TRACE_AHCI_POPULATE_SGLIST_BACKEND_DSTATE() (0)
+static inline void trace_ahci_populate_sglist(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_POPULATE_SGLIST_BAD_OFFSET 0
+#define TRACE_AHCI_POPULATE_SGLIST_BAD_OFFSET_ENABLED 0
+#define TRACE_AHCI_POPULATE_SGLIST_BAD_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_ahci_populate_sglist_bad_offset(void *s, int port, int off_idx, int64_t off_pos) {
+ (void)s;
+ (void)port;
+ (void)off_idx;
+ (void)off_pos;
+}
+#define TRACE_AHCI_POPULATE_SGLIST_NO_MAP 0
+#define TRACE_AHCI_POPULATE_SGLIST_NO_MAP_ENABLED 0
+#define TRACE_AHCI_POPULATE_SGLIST_NO_MAP_BACKEND_DSTATE() (0)
+static inline void trace_ahci_populate_sglist_no_map(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_POPULATE_SGLIST_NO_PRDTL 0
+#define TRACE_AHCI_POPULATE_SGLIST_NO_PRDTL_ENABLED 0
+#define TRACE_AHCI_POPULATE_SGLIST_NO_PRDTL_BACKEND_DSTATE() (0)
+static inline void trace_ahci_populate_sglist_no_prdtl(void *s, int port, uint16_t opts) {
+ (void)s;
+ (void)port;
+ (void)opts;
+}
+#define TRACE_AHCI_POPULATE_SGLIST_SHORT_MAP 0
+#define TRACE_AHCI_POPULATE_SGLIST_SHORT_MAP_ENABLED 0
+#define TRACE_AHCI_POPULATE_SGLIST_SHORT_MAP_BACKEND_DSTATE() (0)
+static inline void trace_ahci_populate_sglist_short_map(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_PORT_READ 0
+#define TRACE_AHCI_PORT_READ_ENABLED 0
+#define TRACE_AHCI_PORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_ahci_port_read(void *s, int port, const char *reg, int offset, uint32_t ret) {
+ (void)s;
+ (void)port;
+ (void)reg;
+ (void)offset;
+ (void)ret;
+}
+#define TRACE_AHCI_PORT_READ_DEFAULT 0
+#define TRACE_AHCI_PORT_READ_DEFAULT_ENABLED 0
+#define TRACE_AHCI_PORT_READ_DEFAULT_BACKEND_DSTATE() (0)
+static inline void trace_ahci_port_read_default(void *s, int port, const char *reg, int offset) {
+ (void)s;
+ (void)port;
+ (void)reg;
+ (void)offset;
+}
+#define TRACE_AHCI_PORT_WRITE 0
+#define TRACE_AHCI_PORT_WRITE_ENABLED 0
+#define TRACE_AHCI_PORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ahci_port_write(void *s, int port, const char *reg, int offset, uint32_t val) {
+ (void)s;
+ (void)port;
+ (void)reg;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_AHCI_PORT_WRITE_UNIMPL 0
+#define TRACE_AHCI_PORT_WRITE_UNIMPL_ENABLED 0
+#define TRACE_AHCI_PORT_WRITE_UNIMPL_BACKEND_DSTATE() (0)
+static inline void trace_ahci_port_write_unimpl(void *s, int port, const char *reg, int offset, uint32_t val) {
+ (void)s;
+ (void)port;
+ (void)reg;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_AHCI_RESET 0
+#define TRACE_AHCI_RESET_ENABLED 0
+#define TRACE_AHCI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_ahci_reset(void *s) {
+ (void)s;
+}
+#define TRACE_AHCI_RESET_PORT 0
+#define TRACE_AHCI_RESET_PORT_ENABLED 0
+#define TRACE_AHCI_RESET_PORT_BACKEND_DSTATE() (0)
+static inline void trace_ahci_reset_port(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_SET_SIGNATURE 0
+#define TRACE_AHCI_SET_SIGNATURE_ENABLED 0
+#define TRACE_AHCI_SET_SIGNATURE_BACKEND_DSTATE() (0)
+static inline void trace_ahci_set_signature(void *s, int port, uint8_t nsector, uint8_t sector, uint8_t lcyl, uint8_t hcyl, uint32_t sig) {
+ (void)s;
+ (void)port;
+ (void)nsector;
+ (void)sector;
+ (void)lcyl;
+ (void)hcyl;
+ (void)sig;
+}
+#define TRACE_AHCI_START_DMA 0
+#define TRACE_AHCI_START_DMA_ENABLED 0
+#define TRACE_AHCI_START_DMA_BACKEND_DSTATE() (0)
+static inline void trace_ahci_start_dma(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_TRIGGER_IRQ 0
+#define TRACE_AHCI_TRIGGER_IRQ_ENABLED 0
+#define TRACE_AHCI_TRIGGER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_ahci_trigger_irq(void *s, int port, const char *name, uint32_t val, uint32_t old, uint32_t new, uint32_t effective) {
+ (void)s;
+ (void)port;
+ (void)name;
+ (void)val;
+ (void)old;
+ (void)new;
+ (void)effective;
+}
+#define TRACE_AHCI_UNMAP_CLB_ADDRESS_NULL 0
+#define TRACE_AHCI_UNMAP_CLB_ADDRESS_NULL_ENABLED 0
+#define TRACE_AHCI_UNMAP_CLB_ADDRESS_NULL_BACKEND_DSTATE() (0)
+static inline void trace_ahci_unmap_clb_address_null(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_AHCI_UNMAP_FIS_ADDRESS_NULL 0
+#define TRACE_AHCI_UNMAP_FIS_ADDRESS_NULL_ENABLED 0
+#define TRACE_AHCI_UNMAP_FIS_ADDRESS_NULL_BACKEND_DSTATE() (0)
+static inline void trace_ahci_unmap_fis_address_null(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_ALLWINNER_AHCI_MEM_READ 0
+#define TRACE_ALLWINNER_AHCI_MEM_READ_ENABLED 0
+#define TRACE_ALLWINNER_AHCI_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) {
+ (void)s;
+ (void)a;
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_ALLWINNER_AHCI_MEM_WRITE 0
+#define TRACE_ALLWINNER_AHCI_MEM_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_AHCI_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) {
+ (void)s;
+ (void)a;
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_BMDMA_ADDR_READ 0
+#define TRACE_BMDMA_ADDR_READ_ENABLED 0
+#define TRACE_BMDMA_ADDR_READ_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_addr_read(uint64_t data) {
+ (void)data;
+}
+#define TRACE_BMDMA_ADDR_WRITE 0
+#define TRACE_BMDMA_ADDR_WRITE_ENABLED 0
+#define TRACE_BMDMA_ADDR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_addr_write(uint64_t data) {
+ (void)data;
+}
+#define TRACE_BMDMA_CMD_WRITEB 0
+#define TRACE_BMDMA_CMD_WRITEB_ENABLED 0
+#define TRACE_BMDMA_CMD_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_cmd_writeb(uint32_t val) {
+ (void)val;
+}
+#define TRACE_BMDMA_READ 0
+#define TRACE_BMDMA_READ_ENABLED 0
+#define TRACE_BMDMA_READ_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_read(uint64_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_BMDMA_READ_CMD646 0
+#define TRACE_BMDMA_READ_CMD646_ENABLED 0
+#define TRACE_BMDMA_READ_CMD646_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_read_cmd646(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_BMDMA_READ_VIA 0
+#define TRACE_BMDMA_READ_VIA_ENABLED 0
+#define TRACE_BMDMA_READ_VIA_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_read_via(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_BMDMA_RESET 0
+#define TRACE_BMDMA_RESET_ENABLED 0
+#define TRACE_BMDMA_RESET_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_reset(void) {
+}
+#define TRACE_BMDMA_WRITE 0
+#define TRACE_BMDMA_WRITE_ENABLED 0
+#define TRACE_BMDMA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_BMDMA_WRITE_CMD646 0
+#define TRACE_BMDMA_WRITE_CMD646_ENABLED 0
+#define TRACE_BMDMA_WRITE_CMD646_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_write_cmd646(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_BMDMA_WRITE_VIA 0
+#define TRACE_BMDMA_WRITE_VIA_ENABLED 0
+#define TRACE_BMDMA_WRITE_VIA_BACKEND_DSTATE() (0)
+static inline void trace_bmdma_write_via(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_CD_READ_SECTOR 0
+#define TRACE_CD_READ_SECTOR_ENABLED 0
+#define TRACE_CD_READ_SECTOR_BACKEND_DSTATE() (0)
+static inline void trace_cd_read_sector(int lba) {
+ (void)lba;
+}
+#define TRACE_CD_READ_SECTOR_CB 0
+#define TRACE_CD_READ_SECTOR_CB_ENABLED 0
+#define TRACE_CD_READ_SECTOR_CB_BACKEND_DSTATE() (0)
+static inline void trace_cd_read_sector_cb(int lba, int ret) {
+ (void)lba;
+ (void)ret;
+}
+#define TRACE_CD_READ_SECTOR_SYNC 0
+#define TRACE_CD_READ_SECTOR_SYNC_ENABLED 0
+#define TRACE_CD_READ_SECTOR_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_cd_read_sector_sync(int lba) {
+ (void)lba;
+}
+#define TRACE_EXECUTE_NCQ_COMMAND_READ 0
+#define TRACE_EXECUTE_NCQ_COMMAND_READ_ENABLED 0
+#define TRACE_EXECUTE_NCQ_COMMAND_READ_BACKEND_DSTATE() (0)
+static inline void trace_execute_ncq_command_read(void *s, int port, uint8_t tag, int count, int64_t lba) {
+ (void)s;
+ (void)port;
+ (void)tag;
+ (void)count;
+ (void)lba;
+}
+#define TRACE_EXECUTE_NCQ_COMMAND_UNSUP 0
+#define TRACE_EXECUTE_NCQ_COMMAND_UNSUP_ENABLED 0
+#define TRACE_EXECUTE_NCQ_COMMAND_UNSUP_BACKEND_DSTATE() (0)
+static inline void trace_execute_ncq_command_unsup(void *s, int port, uint8_t tag, uint8_t cmd) {
+ (void)s;
+ (void)port;
+ (void)tag;
+ (void)cmd;
+}
+#define TRACE_EXECUTE_NCQ_COMMAND_WRITE 0
+#define TRACE_EXECUTE_NCQ_COMMAND_WRITE_ENABLED 0
+#define TRACE_EXECUTE_NCQ_COMMAND_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_execute_ncq_command_write(void *s, int port, uint8_t tag, int count, int64_t lba) {
+ (void)s;
+ (void)port;
+ (void)tag;
+ (void)count;
+ (void)lba;
+}
+#define TRACE_HANDLE_CMD_BADFIS 0
+#define TRACE_HANDLE_CMD_BADFIS_ENABLED 0
+#define TRACE_HANDLE_CMD_BADFIS_BACKEND_DSTATE() (0)
+static inline void trace_handle_cmd_badfis(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_HANDLE_CMD_BADMAP 0
+#define TRACE_HANDLE_CMD_BADMAP_ENABLED 0
+#define TRACE_HANDLE_CMD_BADMAP_BACKEND_DSTATE() (0)
+static inline void trace_handle_cmd_badmap(void *s, int port, uint64_t len) {
+ (void)s;
+ (void)port;
+ (void)len;
+}
+#define TRACE_HANDLE_CMD_BADPORT 0
+#define TRACE_HANDLE_CMD_BADPORT_ENABLED 0
+#define TRACE_HANDLE_CMD_BADPORT_BACKEND_DSTATE() (0)
+static inline void trace_handle_cmd_badport(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_HANDLE_CMD_BUSY 0
+#define TRACE_HANDLE_CMD_BUSY_ENABLED 0
+#define TRACE_HANDLE_CMD_BUSY_BACKEND_DSTATE() (0)
+static inline void trace_handle_cmd_busy(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_HANDLE_CMD_FIS_DUMP 0
+#define TRACE_HANDLE_CMD_FIS_DUMP_ENABLED 0
+#define TRACE_HANDLE_CMD_FIS_DUMP_BACKEND_DSTATE() (0)
+static inline void trace_handle_cmd_fis_dump(void *s, int port, const char *fis) {
+ (void)s;
+ (void)port;
+ (void)fis;
+}
+#define TRACE_HANDLE_CMD_NOLIST 0
+#define TRACE_HANDLE_CMD_NOLIST_ENABLED 0
+#define TRACE_HANDLE_CMD_NOLIST_BACKEND_DSTATE() (0)
+static inline void trace_handle_cmd_nolist(void *s, int port) {
+ (void)s;
+ (void)port;
+}
+#define TRACE_HANDLE_CMD_UNHANDLED_FIS 0
+#define TRACE_HANDLE_CMD_UNHANDLED_FIS_ENABLED 0
+#define TRACE_HANDLE_CMD_UNHANDLED_FIS_BACKEND_DSTATE() (0)
+static inline void trace_handle_cmd_unhandled_fis(void *s, int port, uint8_t b0, uint8_t b1, uint8_t b2) {
+ (void)s;
+ (void)port;
+ (void)b0;
+ (void)b1;
+ (void)b2;
+}
+#define TRACE_HANDLE_REG_H2D_FIS_DUMP 0
+#define TRACE_HANDLE_REG_H2D_FIS_DUMP_ENABLED 0
+#define TRACE_HANDLE_REG_H2D_FIS_DUMP_BACKEND_DSTATE() (0)
+static inline void trace_handle_reg_h2d_fis_dump(void *s, int port, const char *fis) {
+ (void)s;
+ (void)port;
+ (void)fis;
+}
+#define TRACE_HANDLE_REG_H2D_FIS_PMP 0
+#define TRACE_HANDLE_REG_H2D_FIS_PMP_ENABLED 0
+#define TRACE_HANDLE_REG_H2D_FIS_PMP_BACKEND_DSTATE() (0)
+static inline void trace_handle_reg_h2d_fis_pmp(void *s, int port, char b0, char b1, char b2) {
+ (void)s;
+ (void)port;
+ (void)b0;
+ (void)b1;
+ (void)b2;
+}
+#define TRACE_HANDLE_REG_H2D_FIS_RES 0
+#define TRACE_HANDLE_REG_H2D_FIS_RES_ENABLED 0
+#define TRACE_HANDLE_REG_H2D_FIS_RES_BACKEND_DSTATE() (0)
+static inline void trace_handle_reg_h2d_fis_res(void *s, int port, char b0, char b1, char b2) {
+ (void)s;
+ (void)port;
+ (void)b0;
+ (void)b1;
+ (void)b2;
+}
+#define TRACE_IDE_ATAPI_CMD 0
+#define TRACE_IDE_ATAPI_CMD_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd(void *s, uint8_t cmd) {
+ (void)s;
+ (void)cmd;
+}
+#define TRACE_IDE_ATAPI_CMD_CHECK_STATUS 0
+#define TRACE_IDE_ATAPI_CMD_CHECK_STATUS_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_CHECK_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_check_status(void *s) {
+ (void)s;
+}
+#define TRACE_IDE_ATAPI_CMD_ERROR 0
+#define TRACE_IDE_ATAPI_CMD_ERROR_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_error(void *s, int sense_key, int asc) {
+ (void)s;
+ (void)sense_key;
+ (void)asc;
+}
+#define TRACE_IDE_ATAPI_CMD_PACKET 0
+#define TRACE_IDE_ATAPI_CMD_PACKET_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_packet(void *s, uint16_t limit, const char *packet) {
+ (void)s;
+ (void)limit;
+ (void)packet;
+}
+#define TRACE_IDE_ATAPI_CMD_READ 0
+#define TRACE_IDE_ATAPI_CMD_READ_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_READ_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_read(void *s, const char *method, int lba, int nb_sectors) {
+ (void)s;
+ (void)method;
+ (void)lba;
+ (void)nb_sectors;
+}
+#define TRACE_IDE_ATAPI_CMD_READ_DMA_CB_AIO 0
+#define TRACE_IDE_ATAPI_CMD_READ_DMA_CB_AIO_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_READ_DMA_CB_AIO_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_read_dma_cb_aio(void *s, int lba, int n) {
+ (void)s;
+ (void)lba;
+ (void)n;
+}
+#define TRACE_IDE_ATAPI_CMD_REPLY_END 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_reply_end(void *s, int tx_size, int elem_tx_size, int32_t index) {
+ (void)s;
+ (void)tx_size;
+ (void)elem_tx_size;
+ (void)index;
+}
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_BCL 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_BCL_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_BCL_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_reply_end_bcl(void *s, int bcl) {
+ (void)s;
+ (void)bcl;
+}
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_EOT 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_EOT_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_EOT_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_reply_end_eot(void *s, int status) {
+ (void)s;
+ (void)status;
+}
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_NEW 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_NEW_ENABLED 0
+#define TRACE_IDE_ATAPI_CMD_REPLY_END_NEW_BACKEND_DSTATE() (0)
+static inline void trace_ide_atapi_cmd_reply_end_new(void *s, int status) {
+ (void)s;
+ (void)status;
+}
+#define TRACE_IDE_BUS_EXEC_CMD 0
+#define TRACE_IDE_BUS_EXEC_CMD_ENABLED 0
+#define TRACE_IDE_BUS_EXEC_CMD_BACKEND_DSTATE() (0)
+static inline void trace_ide_bus_exec_cmd(void *bus, void *state, uint32_t cmd) {
+ (void)bus;
+ (void)state;
+ (void)cmd;
+}
+#define TRACE_IDE_BUS_RESET_AIO 0
+#define TRACE_IDE_BUS_RESET_AIO_ENABLED 0
+#define TRACE_IDE_BUS_RESET_AIO_BACKEND_DSTATE() (0)
+static inline void trace_ide_bus_reset_aio(void) {
+}
+#define TRACE_IDE_CANCEL_DMA_SYNC_BUFFERED 0
+#define TRACE_IDE_CANCEL_DMA_SYNC_BUFFERED_ENABLED 0
+#define TRACE_IDE_CANCEL_DMA_SYNC_BUFFERED_BACKEND_DSTATE() (0)
+static inline void trace_ide_cancel_dma_sync_buffered(void *fn, void *req) {
+ (void)fn;
+ (void)req;
+}
+#define TRACE_IDE_CANCEL_DMA_SYNC_REMAINING 0
+#define TRACE_IDE_CANCEL_DMA_SYNC_REMAINING_ENABLED 0
+#define TRACE_IDE_CANCEL_DMA_SYNC_REMAINING_BACKEND_DSTATE() (0)
+static inline void trace_ide_cancel_dma_sync_remaining(void) {
+}
+#define TRACE_IDE_CTRL_WRITE 0
+#define TRACE_IDE_CTRL_WRITE_ENABLED 0
+#define TRACE_IDE_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ide_ctrl_write(uint32_t addr, uint32_t val, void *bus) {
+ (void)addr;
+ (void)val;
+ (void)bus;
+}
+#define TRACE_IDE_DATA_READL 0
+#define TRACE_IDE_DATA_READL_ENABLED 0
+#define TRACE_IDE_DATA_READL_BACKEND_DSTATE() (0)
+static inline void trace_ide_data_readl(uint32_t addr, uint32_t val, void *bus, void *s) {
+ (void)addr;
+ (void)val;
+ (void)bus;
+ (void)s;
+}
+#define TRACE_IDE_DATA_READW 0
+#define TRACE_IDE_DATA_READW_ENABLED 0
+#define TRACE_IDE_DATA_READW_BACKEND_DSTATE() (0)
+static inline void trace_ide_data_readw(uint32_t addr, uint32_t val, void *bus, void *s) {
+ (void)addr;
+ (void)val;
+ (void)bus;
+ (void)s;
+}
+#define TRACE_IDE_DATA_WRITEL 0
+#define TRACE_IDE_DATA_WRITEL_ENABLED 0
+#define TRACE_IDE_DATA_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s) {
+ (void)addr;
+ (void)val;
+ (void)bus;
+ (void)s;
+}
+#define TRACE_IDE_DATA_WRITEW 0
+#define TRACE_IDE_DATA_WRITEW_ENABLED 0
+#define TRACE_IDE_DATA_WRITEW_BACKEND_DSTATE() (0)
+static inline void trace_ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) {
+ (void)addr;
+ (void)val;
+ (void)bus;
+ (void)s;
+}
+#define TRACE_IDE_DMA_CB 0
+#define TRACE_IDE_DMA_CB_ENABLED 0
+#define TRACE_IDE_DMA_CB_BACKEND_DSTATE() (0)
+static inline void trace_ide_dma_cb(void *s, int64_t sector_num, int n, const char *dma) {
+ (void)s;
+ (void)sector_num;
+ (void)n;
+ (void)dma;
+}
+#define TRACE_IDE_IOPORT_READ 0
+#define TRACE_IDE_IOPORT_READ_ENABLED 0
+#define TRACE_IDE_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+ (void)bus;
+ (void)s;
+}
+#define TRACE_IDE_IOPORT_WRITE 0
+#define TRACE_IDE_IOPORT_WRITE_ENABLED 0
+#define TRACE_IDE_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+ (void)bus;
+ (void)s;
+}
+#define TRACE_IDE_RESET 0
+#define TRACE_IDE_RESET_ENABLED 0
+#define TRACE_IDE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_ide_reset(void *s) {
+ (void)s;
+}
+#define TRACE_IDE_SECTOR_READ 0
+#define TRACE_IDE_SECTOR_READ_ENABLED 0
+#define TRACE_IDE_SECTOR_READ_BACKEND_DSTATE() (0)
+static inline void trace_ide_sector_read(int64_t sector_num, int nsectors) {
+ (void)sector_num;
+ (void)nsectors;
+}
+#define TRACE_IDE_SECTOR_WRITE 0
+#define TRACE_IDE_SECTOR_WRITE_ENABLED 0
+#define TRACE_IDE_SECTOR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ide_sector_write(int64_t sector_num, int nsectors) {
+ (void)sector_num;
+ (void)nsectors;
+}
+#define TRACE_IDE_STATUS_READ 0
+#define TRACE_IDE_STATUS_READ_ENABLED 0
+#define TRACE_IDE_STATUS_READ_BACKEND_DSTATE() (0)
+static inline void trace_ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) {
+ (void)addr;
+ (void)val;
+ (void)bus;
+ (void)s;
+}
+#define TRACE_NCQ_FINISH 0
+#define TRACE_NCQ_FINISH_ENABLED 0
+#define TRACE_NCQ_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_ncq_finish(void *s, int port, uint8_t tag) {
+ (void)s;
+ (void)port;
+ (void)tag;
+}
+#define TRACE_PROCESS_NCQ_COMMAND 0
+#define TRACE_PROCESS_NCQ_COMMAND_ENABLED 0
+#define TRACE_PROCESS_NCQ_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_process_ncq_command(void *s, int port, uint8_t tag, uint8_t cmd, uint64_t lba, uint64_t end) {
+ (void)s;
+ (void)port;
+ (void)tag;
+ (void)cmd;
+ (void)lba;
+ (void)end;
+}
+#define TRACE_PROCESS_NCQ_COMMAND_AUX 0
+#define TRACE_PROCESS_NCQ_COMMAND_AUX_ENABLED 0
+#define TRACE_PROCESS_NCQ_COMMAND_AUX_BACKEND_DSTATE() (0)
+static inline void trace_process_ncq_command_aux(void *s, int port, uint8_t tag) {
+ (void)s;
+ (void)port;
+ (void)tag;
+}
+#define TRACE_PROCESS_NCQ_COMMAND_FUA 0
+#define TRACE_PROCESS_NCQ_COMMAND_FUA_ENABLED 0
+#define TRACE_PROCESS_NCQ_COMMAND_FUA_BACKEND_DSTATE() (0)
+static inline void trace_process_ncq_command_fua(void *s, int port, uint8_t tag) {
+ (void)s;
+ (void)port;
+ (void)tag;
+}
+#define TRACE_PROCESS_NCQ_COMMAND_LARGE 0
+#define TRACE_PROCESS_NCQ_COMMAND_LARGE_ENABLED 0
+#define TRACE_PROCESS_NCQ_COMMAND_LARGE_BACKEND_DSTATE() (0)
+static inline void trace_process_ncq_command_large(void *s, int port, uint8_t tag, size_t prdtl, size_t size) {
+ (void)s;
+ (void)port;
+ (void)tag;
+ (void)prdtl;
+ (void)size;
+}
+#define TRACE_PROCESS_NCQ_COMMAND_MISMATCH 0
+#define TRACE_PROCESS_NCQ_COMMAND_MISMATCH_ENABLED 0
+#define TRACE_PROCESS_NCQ_COMMAND_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_process_ncq_command_mismatch(void *s, int port, uint8_t tag, uint8_t slot) {
+ (void)s;
+ (void)port;
+ (void)tag;
+ (void)slot;
+}
+#define TRACE_PROCESS_NCQ_COMMAND_PRIOICC 0
+#define TRACE_PROCESS_NCQ_COMMAND_PRIOICC_ENABLED 0
+#define TRACE_PROCESS_NCQ_COMMAND_PRIOICC_BACKEND_DSTATE() (0)
+static inline void trace_process_ncq_command_prioicc(void *s, int port, uint8_t tag) {
+ (void)s;
+ (void)port;
+ (void)tag;
+}
+#define TRACE_PROCESS_NCQ_COMMAND_RARC 0
+#define TRACE_PROCESS_NCQ_COMMAND_RARC_ENABLED 0
+#define TRACE_PROCESS_NCQ_COMMAND_RARC_BACKEND_DSTATE() (0)
+static inline void trace_process_ncq_command_rarc(void *s, int port, uint8_t tag) {
+ (void)s;
+ (void)port;
+ (void)tag;
+}
+#define TRACE_SII3112_READ 0
+#define TRACE_SII3112_READ_ENABLED 0
+#define TRACE_SII3112_READ_BACKEND_DSTATE() (0)
+static inline void trace_sii3112_read(int size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SII3112_SET_IRQ 0
+#define TRACE_SII3112_SET_IRQ_ENABLED 0
+#define TRACE_SII3112_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sii3112_set_irq(int channel, int level) {
+ (void)channel;
+ (void)level;
+}
+#define TRACE_SII3112_WRITE 0
+#define TRACE_SII3112_WRITE_ENABLED 0
+#define TRACE_SII3112_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sii3112_write(int size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_input.h b/trace/trace-hw_input.h
new file mode 100644
index 0000000000..015c789012
--- /dev/null
+++ b/trace/trace-hw_input.h
@@ -0,0 +1,271 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_INPUT_H
+#define TRACE_TRACE_HW_INPUT_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ADB_BUS_AUTOPOLL_BLOCK 0
+#define TRACE_ADB_BUS_AUTOPOLL_BLOCK_ENABLED 0
+#define TRACE_ADB_BUS_AUTOPOLL_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_adb_bus_autopoll_block(bool blocked) {
+ (void)blocked;
+}
+#define TRACE_ADB_BUS_AUTOPOLL_CB 0
+#define TRACE_ADB_BUS_AUTOPOLL_CB_ENABLED 0
+#define TRACE_ADB_BUS_AUTOPOLL_CB_BACKEND_DSTATE() (0)
+static inline void trace_adb_bus_autopoll_cb(uint16_t mask) {
+ (void)mask;
+}
+#define TRACE_ADB_BUS_AUTOPOLL_CB_DONE 0
+#define TRACE_ADB_BUS_AUTOPOLL_CB_DONE_ENABLED 0
+#define TRACE_ADB_BUS_AUTOPOLL_CB_DONE_BACKEND_DSTATE() (0)
+static inline void trace_adb_bus_autopoll_cb_done(uint16_t mask) {
+ (void)mask;
+}
+#define TRACE_ADB_BUS_REQUEST 0
+#define TRACE_ADB_BUS_REQUEST_ENABLED 0
+#define TRACE_ADB_BUS_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_adb_bus_request(uint8_t addr, const char *cmd, int size) {
+ (void)addr;
+ (void)cmd;
+ (void)size;
+}
+#define TRACE_ADB_BUS_REQUEST_DONE 0
+#define TRACE_ADB_BUS_REQUEST_DONE_ENABLED 0
+#define TRACE_ADB_BUS_REQUEST_DONE_BACKEND_DSTATE() (0)
+static inline void trace_adb_bus_request_done(uint8_t addr, const char *cmd, int size) {
+ (void)addr;
+ (void)cmd;
+ (void)size;
+}
+#define TRACE_ADB_DEVICE_KBD_NO_KEY 0
+#define TRACE_ADB_DEVICE_KBD_NO_KEY_ENABLED 0
+#define TRACE_ADB_DEVICE_KBD_NO_KEY_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_kbd_no_key(void) {
+}
+#define TRACE_ADB_DEVICE_KBD_READREG 0
+#define TRACE_ADB_DEVICE_KBD_READREG_ENABLED 0
+#define TRACE_ADB_DEVICE_KBD_READREG_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_kbd_readreg(int reg, uint8_t val0, uint8_t val1) {
+ (void)reg;
+ (void)val0;
+ (void)val1;
+}
+#define TRACE_ADB_DEVICE_KBD_REQUEST_CHANGE_ADDR 0
+#define TRACE_ADB_DEVICE_KBD_REQUEST_CHANGE_ADDR_ENABLED 0
+#define TRACE_ADB_DEVICE_KBD_REQUEST_CHANGE_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_kbd_request_change_addr(int devaddr) {
+ (void)devaddr;
+}
+#define TRACE_ADB_DEVICE_KBD_REQUEST_CHANGE_ADDR_AND_HANDLER 0
+#define TRACE_ADB_DEVICE_KBD_REQUEST_CHANGE_ADDR_AND_HANDLER_ENABLED 0
+#define TRACE_ADB_DEVICE_KBD_REQUEST_CHANGE_ADDR_AND_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_kbd_request_change_addr_and_handler(int devaddr, int handler) {
+ (void)devaddr;
+ (void)handler;
+}
+#define TRACE_ADB_DEVICE_KBD_WRITEREG 0
+#define TRACE_ADB_DEVICE_KBD_WRITEREG_ENABLED 0
+#define TRACE_ADB_DEVICE_KBD_WRITEREG_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_kbd_writereg(int reg, uint8_t val) {
+ (void)reg;
+ (void)val;
+}
+#define TRACE_ADB_DEVICE_MOUSE_FLUSH 0
+#define TRACE_ADB_DEVICE_MOUSE_FLUSH_ENABLED 0
+#define TRACE_ADB_DEVICE_MOUSE_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_mouse_flush(void) {
+}
+#define TRACE_ADB_DEVICE_MOUSE_READREG 0
+#define TRACE_ADB_DEVICE_MOUSE_READREG_ENABLED 0
+#define TRACE_ADB_DEVICE_MOUSE_READREG_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_mouse_readreg(int reg, uint8_t val0, uint8_t val1) {
+ (void)reg;
+ (void)val0;
+ (void)val1;
+}
+#define TRACE_ADB_DEVICE_MOUSE_REQUEST_CHANGE_ADDR 0
+#define TRACE_ADB_DEVICE_MOUSE_REQUEST_CHANGE_ADDR_ENABLED 0
+#define TRACE_ADB_DEVICE_MOUSE_REQUEST_CHANGE_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_mouse_request_change_addr(int devaddr) {
+ (void)devaddr;
+}
+#define TRACE_ADB_DEVICE_MOUSE_REQUEST_CHANGE_ADDR_AND_HANDLER 0
+#define TRACE_ADB_DEVICE_MOUSE_REQUEST_CHANGE_ADDR_AND_HANDLER_ENABLED 0
+#define TRACE_ADB_DEVICE_MOUSE_REQUEST_CHANGE_ADDR_AND_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_mouse_request_change_addr_and_handler(int devaddr, int handler) {
+ (void)devaddr;
+ (void)handler;
+}
+#define TRACE_ADB_DEVICE_MOUSE_WRITEREG 0
+#define TRACE_ADB_DEVICE_MOUSE_WRITEREG_ENABLED 0
+#define TRACE_ADB_DEVICE_MOUSE_WRITEREG_BACKEND_DSTATE() (0)
+static inline void trace_adb_device_mouse_writereg(int reg, uint8_t val) {
+ (void)reg;
+ (void)val;
+}
+#define TRACE_HID_KBD_QUEUE_EMPTY 0
+#define TRACE_HID_KBD_QUEUE_EMPTY_ENABLED 0
+#define TRACE_HID_KBD_QUEUE_EMPTY_BACKEND_DSTATE() (0)
+static inline void trace_hid_kbd_queue_empty(void) {
+}
+#define TRACE_HID_KBD_QUEUE_FULL 0
+#define TRACE_HID_KBD_QUEUE_FULL_ENABLED 0
+#define TRACE_HID_KBD_QUEUE_FULL_BACKEND_DSTATE() (0)
+static inline void trace_hid_kbd_queue_full(void) {
+}
+#define TRACE_LASIPS2_INTR 0
+#define TRACE_LASIPS2_INTR_ENABLED 0
+#define TRACE_LASIPS2_INTR_BACKEND_DSTATE() (0)
+static inline void trace_lasips2_intr(unsigned int val) {
+ (void)val;
+}
+#define TRACE_LASIPS2_REG_READ 0
+#define TRACE_LASIPS2_REG_READ_ENABLED 0
+#define TRACE_LASIPS2_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_lasips2_reg_read(unsigned int size, int id, uint64_t addr, const char *name, uint64_t val) {
+ (void)size;
+ (void)id;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_LASIPS2_REG_WRITE 0
+#define TRACE_LASIPS2_REG_WRITE_ENABLED 0
+#define TRACE_LASIPS2_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_lasips2_reg_write(unsigned int size, int id, uint64_t addr, const char *name, uint64_t val) {
+ (void)size;
+ (void)id;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_PCKBD_KBD_READ_DATA 0
+#define TRACE_PCKBD_KBD_READ_DATA_ENABLED 0
+#define TRACE_PCKBD_KBD_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_pckbd_kbd_read_data(uint32_t val) {
+ (void)val;
+}
+#define TRACE_PCKBD_KBD_READ_STATUS 0
+#define TRACE_PCKBD_KBD_READ_STATUS_ENABLED 0
+#define TRACE_PCKBD_KBD_READ_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_pckbd_kbd_read_status(int status) {
+ (void)status;
+}
+#define TRACE_PCKBD_KBD_WRITE_COMMAND 0
+#define TRACE_PCKBD_KBD_WRITE_COMMAND_ENABLED 0
+#define TRACE_PCKBD_KBD_WRITE_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_pckbd_kbd_write_command(uint64_t val) {
+ (void)val;
+}
+#define TRACE_PCKBD_KBD_WRITE_DATA 0
+#define TRACE_PCKBD_KBD_WRITE_DATA_ENABLED 0
+#define TRACE_PCKBD_KBD_WRITE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_pckbd_kbd_write_data(uint64_t val) {
+ (void)val;
+}
+#define TRACE_PCKBD_OUTPORT_WRITE 0
+#define TRACE_PCKBD_OUTPORT_WRITE_ENABLED 0
+#define TRACE_PCKBD_OUTPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pckbd_outport_write(uint32_t val) {
+ (void)val;
+}
+#define TRACE_PS2_KBD_RESET 0
+#define TRACE_PS2_KBD_RESET_ENABLED 0
+#define TRACE_PS2_KBD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_ps2_kbd_reset(void *opaque) {
+ (void)opaque;
+}
+#define TRACE_PS2_KEYBOARD_EVENT 0
+#define TRACE_PS2_KEYBOARD_EVENT_ENABLED 0
+#define TRACE_PS2_KEYBOARD_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_ps2_keyboard_event(void *opaque, int qcode, int down, unsigned int modifier, unsigned int modifiers, int set, int xlate) {
+ (void)opaque;
+ (void)qcode;
+ (void)down;
+ (void)modifier;
+ (void)modifiers;
+ (void)set;
+ (void)xlate;
+}
+#define TRACE_PS2_KEYBOARD_SET_TRANSLATION 0
+#define TRACE_PS2_KEYBOARD_SET_TRANSLATION_ENABLED 0
+#define TRACE_PS2_KEYBOARD_SET_TRANSLATION_BACKEND_DSTATE() (0)
+static inline void trace_ps2_keyboard_set_translation(void *opaque, int mode) {
+ (void)opaque;
+ (void)mode;
+}
+#define TRACE_PS2_MOUSE_FAKE_EVENT 0
+#define TRACE_PS2_MOUSE_FAKE_EVENT_ENABLED 0
+#define TRACE_PS2_MOUSE_FAKE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_ps2_mouse_fake_event(void *opaque) {
+ (void)opaque;
+}
+#define TRACE_PS2_MOUSE_RESET 0
+#define TRACE_PS2_MOUSE_RESET_ENABLED 0
+#define TRACE_PS2_MOUSE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_ps2_mouse_reset(void *opaque) {
+ (void)opaque;
+}
+#define TRACE_PS2_MOUSE_SEND_PACKET 0
+#define TRACE_PS2_MOUSE_SEND_PACKET_ENABLED 0
+#define TRACE_PS2_MOUSE_SEND_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) {
+ (void)s;
+ (void)dx1;
+ (void)dy1;
+ (void)dz1;
+ (void)b;
+}
+#define TRACE_PS2_PUT_KEYCODE 0
+#define TRACE_PS2_PUT_KEYCODE_ENABLED 0
+#define TRACE_PS2_PUT_KEYCODE_BACKEND_DSTATE() (0)
+static inline void trace_ps2_put_keycode(void *opaque, int keycode) {
+ (void)opaque;
+ (void)keycode;
+}
+#define TRACE_PS2_READ_DATA 0
+#define TRACE_PS2_READ_DATA_ENABLED 0
+#define TRACE_PS2_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_ps2_read_data(void *opaque) {
+ (void)opaque;
+}
+#define TRACE_PS2_RESET_KEYBOARD 0
+#define TRACE_PS2_RESET_KEYBOARD_ENABLED 0
+#define TRACE_PS2_RESET_KEYBOARD_BACKEND_DSTATE() (0)
+static inline void trace_ps2_reset_keyboard(void *s) {
+ (void)s;
+}
+#define TRACE_PS2_SET_LEDSTATE 0
+#define TRACE_PS2_SET_LEDSTATE_ENABLED 0
+#define TRACE_PS2_SET_LEDSTATE_BACKEND_DSTATE() (0)
+static inline void trace_ps2_set_ledstate(void *s, int ledstate) {
+ (void)s;
+ (void)ledstate;
+}
+#define TRACE_PS2_WRITE_KEYBOARD 0
+#define TRACE_PS2_WRITE_KEYBOARD_ENABLED 0
+#define TRACE_PS2_WRITE_KEYBOARD_BACKEND_DSTATE() (0)
+static inline void trace_ps2_write_keyboard(void *opaque, int val) {
+ (void)opaque;
+ (void)val;
+}
+#define TRACE_PS2_WRITE_MOUSE 0
+#define TRACE_PS2_WRITE_MOUSE_ENABLED 0
+#define TRACE_PS2_WRITE_MOUSE_BACKEND_DSTATE() (0)
+static inline void trace_ps2_write_mouse(void *opaque, int val) {
+ (void)opaque;
+ (void)val;
+}
+#define TRACE_VIRTIO_INPUT_QUEUE_FULL 0
+#define TRACE_VIRTIO_INPUT_QUEUE_FULL_ENABLED 0
+#define TRACE_VIRTIO_INPUT_QUEUE_FULL_BACKEND_DSTATE() (0)
+static inline void trace_virtio_input_queue_full(void) {
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_intc.h b/trace/trace-hw_intc.h
new file mode 100644
index 0000000000..1c1934c966
--- /dev/null
+++ b/trace/trace-hw_intc.h
@@ -0,0 +1,2119 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_INTC_H
+#define TRACE_TRACE_HW_INTC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_APIC_DELIVER_IRQ 0
+#define TRACE_APIC_DELIVER_IRQ_ENABLED 0
+#define TRACE_APIC_DELIVER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) {
+ (void)dest;
+ (void)dest_mode;
+ (void)delivery_mode;
+ (void)vector_num;
+ (void)trigger_mode;
+}
+#define TRACE_APIC_LOCAL_DELIVER 0
+#define TRACE_APIC_LOCAL_DELIVER_ENABLED 0
+#define TRACE_APIC_LOCAL_DELIVER_BACKEND_DSTATE() (0)
+static inline void trace_apic_local_deliver(int vector, uint32_t lvt) {
+ (void)vector;
+ (void)lvt;
+}
+#define TRACE_APIC_REGISTER_READ 0
+#define TRACE_APIC_REGISTER_READ_ENABLED 0
+#define TRACE_APIC_REGISTER_READ_BACKEND_DSTATE() (0)
+static inline void trace_apic_register_read(uint8_t reg, uint64_t val) {
+ (void)reg;
+ (void)val;
+}
+#define TRACE_APIC_REGISTER_WRITE 0
+#define TRACE_APIC_REGISTER_WRITE_ENABLED 0
+#define TRACE_APIC_REGISTER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_apic_register_write(uint8_t reg, uint64_t val) {
+ (void)reg;
+ (void)val;
+}
+#define TRACE_ASPEED_INTC_ALL_ISR_DONE 0
+#define TRACE_ASPEED_INTC_ALL_ISR_DONE_ENABLED 0
+#define TRACE_ASPEED_INTC_ALL_ISR_DONE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_all_isr_done(const char *s, int inpin_idx) {
+ (void)s;
+ (void)inpin_idx;
+}
+#define TRACE_ASPEED_INTC_ALL_ISR_DONE_BIT 0
+#define TRACE_ASPEED_INTC_ALL_ISR_DONE_BIT_ENABLED 0
+#define TRACE_ASPEED_INTC_ALL_ISR_DONE_BIT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_all_isr_done_bit(const char *s, int inpin_idx, int bit) {
+ (void)s;
+ (void)inpin_idx;
+ (void)bit;
+}
+#define TRACE_ASPEED_INTC_CLEAR_IRQ 0
+#define TRACE_ASPEED_INTC_CLEAR_IRQ_ENABLED 0
+#define TRACE_ASPEED_INTC_CLEAR_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_clear_irq(const char *s, int inpin_idx, int outpin_idx, int level) {
+ (void)s;
+ (void)inpin_idx;
+ (void)outpin_idx;
+ (void)level;
+}
+#define TRACE_ASPEED_INTC_ENABLE 0
+#define TRACE_ASPEED_INTC_ENABLE_ENABLED 0
+#define TRACE_ASPEED_INTC_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_enable(const char *s, uint32_t value) {
+ (void)s;
+ (void)value;
+}
+#define TRACE_ASPEED_INTC_MASK 0
+#define TRACE_ASPEED_INTC_MASK_ENABLED 0
+#define TRACE_ASPEED_INTC_MASK_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_mask(const char *s, uint32_t change, uint32_t value) {
+ (void)s;
+ (void)change;
+ (void)value;
+}
+#define TRACE_ASPEED_INTC_PENDING_IRQ 0
+#define TRACE_ASPEED_INTC_PENDING_IRQ_ENABLED 0
+#define TRACE_ASPEED_INTC_PENDING_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_pending_irq(const char *s, int inpin_idx, uint32_t value) {
+ (void)s;
+ (void)inpin_idx;
+ (void)value;
+}
+#define TRACE_ASPEED_INTC_READ 0
+#define TRACE_ASPEED_INTC_READ_ENABLED 0
+#define TRACE_ASPEED_INTC_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_read(const char *s, uint64_t offset, unsigned size, uint32_t value) {
+ (void)s;
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_ASPEED_INTC_SELECT 0
+#define TRACE_ASPEED_INTC_SELECT_ENABLED 0
+#define TRACE_ASPEED_INTC_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_select(const char *s, uint32_t value) {
+ (void)s;
+ (void)value;
+}
+#define TRACE_ASPEED_INTC_SET_IRQ 0
+#define TRACE_ASPEED_INTC_SET_IRQ_ENABLED 0
+#define TRACE_ASPEED_INTC_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_set_irq(const char *s, int inpin_idx, int level) {
+ (void)s;
+ (void)inpin_idx;
+ (void)level;
+}
+#define TRACE_ASPEED_INTC_TRIGGER_IRQ 0
+#define TRACE_ASPEED_INTC_TRIGGER_IRQ_ENABLED 0
+#define TRACE_ASPEED_INTC_TRIGGER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_trigger_irq(const char *s, int inpin_idx, int outpin_idx, uint32_t value) {
+ (void)s;
+ (void)inpin_idx;
+ (void)outpin_idx;
+ (void)value;
+}
+#define TRACE_ASPEED_INTC_UNMASK 0
+#define TRACE_ASPEED_INTC_UNMASK_ENABLED 0
+#define TRACE_ASPEED_INTC_UNMASK_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_unmask(const char *s, uint32_t change, uint32_t value) {
+ (void)s;
+ (void)change;
+ (void)value;
+}
+#define TRACE_ASPEED_INTC_UPDATE_IRQ 0
+#define TRACE_ASPEED_INTC_UPDATE_IRQ_ENABLED 0
+#define TRACE_ASPEED_INTC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_update_irq(const char *s, int inpin_idx, int outpin_idx, int level) {
+ (void)s;
+ (void)inpin_idx;
+ (void)outpin_idx;
+ (void)level;
+}
+#define TRACE_ASPEED_INTC_WRITE 0
+#define TRACE_ASPEED_INTC_WRITE_ENABLED 0
+#define TRACE_ASPEED_INTC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_intc_write(const char *s, uint64_t offset, unsigned size, uint32_t data) {
+ (void)s;
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_VIC_READ 0
+#define TRACE_ASPEED_VIC_READ_ENABLED 0
+#define TRACE_ASPEED_VIC_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) {
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_ASPEED_VIC_SET_IRQ 0
+#define TRACE_ASPEED_VIC_SET_IRQ_ENABLED 0
+#define TRACE_ASPEED_VIC_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_vic_set_irq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_ASPEED_VIC_UPDATE_FIQ 0
+#define TRACE_ASPEED_VIC_UPDATE_FIQ_ENABLED 0
+#define TRACE_ASPEED_VIC_UPDATE_FIQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_vic_update_fiq(int flags) {
+ (void)flags;
+}
+#define TRACE_ASPEED_VIC_UPDATE_IRQ 0
+#define TRACE_ASPEED_VIC_UPDATE_IRQ_ENABLED 0
+#define TRACE_ASPEED_VIC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_vic_update_irq(int flags) {
+ (void)flags;
+}
+#define TRACE_ASPEED_VIC_WRITE 0
+#define TRACE_ASPEED_VIC_WRITE_ENABLED 0
+#define TRACE_ASPEED_VIC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_BCM2835_IC_SET_CPU_IRQ 0
+#define TRACE_BCM2835_IC_SET_CPU_IRQ_ENABLED 0
+#define TRACE_BCM2835_IC_SET_CPU_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_ic_set_cpu_irq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_BCM2835_IC_SET_GPU_IRQ 0
+#define TRACE_BCM2835_IC_SET_GPU_IRQ_ENABLED 0
+#define TRACE_BCM2835_IC_SET_GPU_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_ic_set_gpu_irq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_CPU_GET_APIC_BASE 0
+#define TRACE_CPU_GET_APIC_BASE_ENABLED 0
+#define TRACE_CPU_GET_APIC_BASE_BACKEND_DSTATE() (0)
+static inline void trace_cpu_get_apic_base(uint64_t val) {
+ (void)val;
+}
+#define TRACE_CPU_SET_APIC_BASE 0
+#define TRACE_CPU_SET_APIC_BASE_ENABLED 0
+#define TRACE_CPU_SET_APIC_BASE_BACKEND_DSTATE() (0)
+static inline void trace_cpu_set_apic_base(uint64_t val) {
+ (void)val;
+}
+#define TRACE_FLIC_CREATE_DEVICE 0
+#define TRACE_FLIC_CREATE_DEVICE_ENABLED 0
+#define TRACE_FLIC_CREATE_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_flic_create_device(int err) {
+ (void)err;
+}
+#define TRACE_FLIC_RESET_FAILED 0
+#define TRACE_FLIC_RESET_FAILED_ENABLED 0
+#define TRACE_FLIC_RESET_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_flic_reset_failed(int err) {
+ (void)err;
+}
+#define TRACE_GIC_ACKNOWLEDGE_IRQ 0
+#define TRACE_GIC_ACKNOWLEDGE_IRQ_ENABLED 0
+#define TRACE_GIC_ACKNOWLEDGE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gic_acknowledge_irq(const char *s, int cpu, int irq) {
+ (void)s;
+ (void)cpu;
+ (void)irq;
+}
+#define TRACE_GIC_CPU_READ 0
+#define TRACE_GIC_CPU_READ_ENABLED 0
+#define TRACE_GIC_CPU_READ_BACKEND_DSTATE() (0)
+static inline void trace_gic_cpu_read(const char *s, int cpu, int addr, uint32_t val) {
+ (void)s;
+ (void)cpu;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_GIC_CPU_WRITE 0
+#define TRACE_GIC_CPU_WRITE_ENABLED 0
+#define TRACE_GIC_CPU_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gic_cpu_write(const char *s, int cpu, int addr, uint32_t val) {
+ (void)s;
+ (void)cpu;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_GIC_DISABLE_IRQ 0
+#define TRACE_GIC_DISABLE_IRQ_ENABLED 0
+#define TRACE_GIC_DISABLE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gic_disable_irq(int irq) {
+ (void)irq;
+}
+#define TRACE_GIC_DIST_READ 0
+#define TRACE_GIC_DIST_READ_ENABLED 0
+#define TRACE_GIC_DIST_READ_BACKEND_DSTATE() (0)
+static inline void trace_gic_dist_read(int addr, unsigned int size, uint32_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_GIC_DIST_WRITE 0
+#define TRACE_GIC_DIST_WRITE_ENABLED 0
+#define TRACE_GIC_DIST_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gic_dist_write(int addr, unsigned int size, uint32_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_GIC_ENABLE_IRQ 0
+#define TRACE_GIC_ENABLE_IRQ_ENABLED 0
+#define TRACE_GIC_ENABLE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gic_enable_irq(int irq) {
+ (void)irq;
+}
+#define TRACE_GIC_HYP_READ 0
+#define TRACE_GIC_HYP_READ_ENABLED 0
+#define TRACE_GIC_HYP_READ_BACKEND_DSTATE() (0)
+static inline void trace_gic_hyp_read(int addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_GIC_HYP_WRITE 0
+#define TRACE_GIC_HYP_WRITE_ENABLED 0
+#define TRACE_GIC_HYP_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gic_hyp_write(int addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_GIC_LR_ENTRY 0
+#define TRACE_GIC_LR_ENTRY_ENABLED 0
+#define TRACE_GIC_LR_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_gic_lr_entry(int cpu, int entry, uint32_t val) {
+ (void)cpu;
+ (void)entry;
+ (void)val;
+}
+#define TRACE_GIC_SET_IRQ 0
+#define TRACE_GIC_SET_IRQ_ENABLED 0
+#define TRACE_GIC_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gic_set_irq(int irq, int level, int cpumask, int target) {
+ (void)irq;
+ (void)level;
+ (void)cpumask;
+ (void)target;
+}
+#define TRACE_GIC_UPDATE_BESTIRQ 0
+#define TRACE_GIC_UPDATE_BESTIRQ_ENABLED 0
+#define TRACE_GIC_UPDATE_BESTIRQ_BACKEND_DSTATE() (0)
+static inline void trace_gic_update_bestirq(const char *s, int cpu, int irq, int prio, int priority_mask, int running_priority) {
+ (void)s;
+ (void)cpu;
+ (void)irq;
+ (void)prio;
+ (void)priority_mask;
+ (void)running_priority;
+}
+#define TRACE_GIC_UPDATE_MAINTENANCE_IRQ 0
+#define TRACE_GIC_UPDATE_MAINTENANCE_IRQ_ENABLED 0
+#define TRACE_GIC_UPDATE_MAINTENANCE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gic_update_maintenance_irq(int cpu, int val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GIC_UPDATE_SET_IRQ 0
+#define TRACE_GIC_UPDATE_SET_IRQ_ENABLED 0
+#define TRACE_GIC_UPDATE_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gic_update_set_irq(int cpu, const char *name, int level) {
+ (void)cpu;
+ (void)name;
+ (void)level;
+}
+#define TRACE_GICV3_CPUIF_SET_IRQS 0
+#define TRACE_GICV3_CPUIF_SET_IRQS_ENABLED 0
+#define TRACE_GICV3_CPUIF_SET_IRQS_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_cpuif_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) {
+ (void)cpuid;
+ (void)fiqlevel;
+ (void)irqlevel;
+}
+#define TRACE_GICV3_CPUIF_UPDATE 0
+#define TRACE_GICV3_CPUIF_UPDATE_ENABLED 0
+#define TRACE_GICV3_CPUIF_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_cpuif_update(uint32_t cpuid, int irq, int grp, int prio) {
+ (void)cpuid;
+ (void)irq;
+ (void)grp;
+ (void)prio;
+}
+#define TRACE_GICV3_CPUIF_VIRT_SET_IRQS 0
+#define TRACE_GICV3_CPUIF_VIRT_SET_IRQS_ENABLED 0
+#define TRACE_GICV3_CPUIF_VIRT_SET_IRQS_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) {
+ (void)cpuid;
+ (void)fiqlevel;
+ (void)irqlevel;
+}
+#define TRACE_GICV3_CPUIF_VIRT_SET_MAINT_IRQ 0
+#define TRACE_GICV3_CPUIF_VIRT_SET_MAINT_IRQ_ENABLED 0
+#define TRACE_GICV3_CPUIF_VIRT_SET_MAINT_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_cpuif_virt_set_maint_irq(uint32_t cpuid, int maintlevel) {
+ (void)cpuid;
+ (void)maintlevel;
+}
+#define TRACE_GICV3_CPUIF_VIRT_UPDATE 0
+#define TRACE_GICV3_CPUIF_VIRT_UPDATE_ENABLED 0
+#define TRACE_GICV3_CPUIF_VIRT_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_cpuif_virt_update(uint32_t cpuid, int idx, int hppvlpi, int grp, int prio) {
+ (void)cpuid;
+ (void)idx;
+ (void)hppvlpi;
+ (void)grp;
+ (void)prio;
+}
+#define TRACE_GICV3_DIST_BADREAD 0
+#define TRACE_GICV3_DIST_BADREAD_ENABLED 0
+#define TRACE_GICV3_DIST_BADREAD_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_dist_badread(uint64_t offset, unsigned size, bool secure) {
+ (void)offset;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GICV3_DIST_BADWRITE 0
+#define TRACE_GICV3_DIST_BADWRITE_ENABLED 0
+#define TRACE_GICV3_DIST_BADWRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_dist_badwrite(uint64_t offset, uint64_t data, unsigned size, bool secure) {
+ (void)offset;
+ (void)data;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GICV3_DIST_READ 0
+#define TRACE_GICV3_DIST_READ_ENABLED 0
+#define TRACE_GICV3_DIST_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_dist_read(uint64_t offset, uint64_t data, unsigned size, bool secure) {
+ (void)offset;
+ (void)data;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GICV3_DIST_SET_IRQ 0
+#define TRACE_GICV3_DIST_SET_IRQ_ENABLED 0
+#define TRACE_GICV3_DIST_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_dist_set_irq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_GICV3_DIST_WRITE 0
+#define TRACE_GICV3_DIST_WRITE_ENABLED 0
+#define TRACE_GICV3_DIST_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_dist_write(uint64_t offset, uint64_t data, unsigned size, bool secure) {
+ (void)offset;
+ (void)data;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GICV3_ICC_AP_READ 0
+#define TRACE_GICV3_ICC_AP_READ_ENABLED 0
+#define TRACE_GICV3_ICC_AP_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_AP_WRITE 0
+#define TRACE_GICV3_ICC_AP_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_AP_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_BPR_READ 0
+#define TRACE_GICV3_ICC_BPR_READ_ENABLED 0
+#define TRACE_GICV3_ICC_BPR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_bpr_read(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_BPR_WRITE 0
+#define TRACE_GICV3_ICC_BPR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_BPR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_bpr_write(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_CTLR_EL3_READ 0
+#define TRACE_GICV3_ICC_CTLR_EL3_READ_ENABLED 0
+#define TRACE_GICV3_ICC_CTLR_EL3_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_ctlr_el3_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_CTLR_EL3_WRITE 0
+#define TRACE_GICV3_ICC_CTLR_EL3_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_CTLR_EL3_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_ctlr_el3_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_CTLR_READ 0
+#define TRACE_GICV3_ICC_CTLR_READ_ENABLED 0
+#define TRACE_GICV3_ICC_CTLR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_ctlr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_CTLR_WRITE 0
+#define TRACE_GICV3_ICC_CTLR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_CTLR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_ctlr_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_DIR_WRITE 0
+#define TRACE_GICV3_ICC_DIR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_DIR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_dir_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_EOIR_WRITE 0
+#define TRACE_GICV3_ICC_EOIR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_EOIR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_eoir_write(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_GENERATE_SGI 0
+#define TRACE_GICV3_ICC_GENERATE_SGI_ENABLED 0
+#define TRACE_GICV3_ICC_GENERATE_SGI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_generate_sgi(uint32_t cpuid, int irq, int irm, uint32_t aff, uint32_t targetlist) {
+ (void)cpuid;
+ (void)irq;
+ (void)irm;
+ (void)aff;
+ (void)targetlist;
+}
+#define TRACE_GICV3_ICC_HPPIR0_READ 0
+#define TRACE_GICV3_ICC_HPPIR0_READ_ENABLED 0
+#define TRACE_GICV3_ICC_HPPIR0_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_hppir0_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_HPPIR1_READ 0
+#define TRACE_GICV3_ICC_HPPIR1_READ_ENABLED 0
+#define TRACE_GICV3_ICC_HPPIR1_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_hppir1_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_IAR0_READ 0
+#define TRACE_GICV3_ICC_IAR0_READ_ENABLED 0
+#define TRACE_GICV3_ICC_IAR0_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_iar0_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_IAR1_READ 0
+#define TRACE_GICV3_ICC_IAR1_READ_ENABLED 0
+#define TRACE_GICV3_ICC_IAR1_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_iar1_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_IGRPEN_READ 0
+#define TRACE_GICV3_ICC_IGRPEN_READ_ENABLED 0
+#define TRACE_GICV3_ICC_IGRPEN_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_igrpen_read(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_IGRPEN_WRITE 0
+#define TRACE_GICV3_ICC_IGRPEN_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_IGRPEN_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_igrpen_write(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_IGRPEN1_EL3_READ 0
+#define TRACE_GICV3_ICC_IGRPEN1_EL3_READ_ENABLED 0
+#define TRACE_GICV3_ICC_IGRPEN1_EL3_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_igrpen1_el3_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_IGRPEN1_EL3_WRITE 0
+#define TRACE_GICV3_ICC_IGRPEN1_EL3_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_IGRPEN1_EL3_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_igrpen1_el3_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_NMIAR1_READ 0
+#define TRACE_GICV3_ICC_NMIAR1_READ_ENABLED 0
+#define TRACE_GICV3_ICC_NMIAR1_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_nmiar1_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_PMR_READ 0
+#define TRACE_GICV3_ICC_PMR_READ_ENABLED 0
+#define TRACE_GICV3_ICC_PMR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_pmr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_PMR_WRITE 0
+#define TRACE_GICV3_ICC_PMR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICC_PMR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_pmr_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICC_RPR_READ 0
+#define TRACE_GICV3_ICC_RPR_READ_ENABLED 0
+#define TRACE_GICV3_ICC_RPR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icc_rpr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_AP_READ 0
+#define TRACE_GICV3_ICH_AP_READ_ENABLED 0
+#define TRACE_GICV3_ICH_AP_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_AP_WRITE 0
+#define TRACE_GICV3_ICH_AP_WRITE_ENABLED 0
+#define TRACE_GICV3_ICH_AP_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_EISR_READ 0
+#define TRACE_GICV3_ICH_EISR_READ_ENABLED 0
+#define TRACE_GICV3_ICH_EISR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_eisr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_ELRSR_READ 0
+#define TRACE_GICV3_ICH_ELRSR_READ_ENABLED 0
+#define TRACE_GICV3_ICH_ELRSR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_elrsr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_HCR_READ 0
+#define TRACE_GICV3_ICH_HCR_READ_ENABLED 0
+#define TRACE_GICV3_ICH_HCR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_hcr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_HCR_WRITE 0
+#define TRACE_GICV3_ICH_HCR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICH_HCR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_hcr_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_LR_READ 0
+#define TRACE_GICV3_ICH_LR_READ_ENABLED 0
+#define TRACE_GICV3_ICH_LR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_lr_read(int regno, uint32_t cpu, uint64_t val) {
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_LR_WRITE 0
+#define TRACE_GICV3_ICH_LR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICH_LR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_lr_write(int regno, uint32_t cpu, uint64_t val) {
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_LR32_READ 0
+#define TRACE_GICV3_ICH_LR32_READ_ENABLED 0
+#define TRACE_GICV3_ICH_LR32_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_lr32_read(int regno, uint32_t cpu, uint32_t val) {
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_LR32_WRITE 0
+#define TRACE_GICV3_ICH_LR32_WRITE_ENABLED 0
+#define TRACE_GICV3_ICH_LR32_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_lr32_write(int regno, uint32_t cpu, uint32_t val) {
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_LRC_READ 0
+#define TRACE_GICV3_ICH_LRC_READ_ENABLED 0
+#define TRACE_GICV3_ICH_LRC_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_lrc_read(int regno, uint32_t cpu, uint32_t val) {
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_LRC_WRITE 0
+#define TRACE_GICV3_ICH_LRC_WRITE_ENABLED 0
+#define TRACE_GICV3_ICH_LRC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_lrc_write(int regno, uint32_t cpu, uint32_t val) {
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_MISR_READ 0
+#define TRACE_GICV3_ICH_MISR_READ_ENABLED 0
+#define TRACE_GICV3_ICH_MISR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_misr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_VMCR_READ 0
+#define TRACE_GICV3_ICH_VMCR_READ_ENABLED 0
+#define TRACE_GICV3_ICH_VMCR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_VMCR_WRITE 0
+#define TRACE_GICV3_ICH_VMCR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICH_VMCR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICH_VTR_READ 0
+#define TRACE_GICV3_ICH_VTR_READ_ENABLED 0
+#define TRACE_GICV3_ICH_VTR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_ich_vtr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_AP_READ 0
+#define TRACE_GICV3_ICV_AP_READ_ENABLED 0
+#define TRACE_GICV3_ICV_AP_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_AP_WRITE 0
+#define TRACE_GICV3_ICV_AP_WRITE_ENABLED 0
+#define TRACE_GICV3_ICV_AP_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)regno;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_BPR_READ 0
+#define TRACE_GICV3_ICV_BPR_READ_ENABLED 0
+#define TRACE_GICV3_ICV_BPR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_bpr_read(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_BPR_WRITE 0
+#define TRACE_GICV3_ICV_BPR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICV_BPR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_bpr_write(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_CTLR_READ 0
+#define TRACE_GICV3_ICV_CTLR_READ_ENABLED 0
+#define TRACE_GICV3_ICV_CTLR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_ctlr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_CTLR_WRITE 0
+#define TRACE_GICV3_ICV_CTLR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICV_CTLR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_ctlr_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_DIR_WRITE 0
+#define TRACE_GICV3_ICV_DIR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICV_DIR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_dir_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_EOIR_WRITE 0
+#define TRACE_GICV3_ICV_EOIR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICV_EOIR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_eoir_write(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_HPPIR_READ 0
+#define TRACE_GICV3_ICV_HPPIR_READ_ENABLED 0
+#define TRACE_GICV3_ICV_HPPIR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_hppir_read(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_IAR_READ 0
+#define TRACE_GICV3_ICV_IAR_READ_ENABLED 0
+#define TRACE_GICV3_ICV_IAR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_iar_read(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_IGRPEN_READ 0
+#define TRACE_GICV3_ICV_IGRPEN_READ_ENABLED 0
+#define TRACE_GICV3_ICV_IGRPEN_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_igrpen_read(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_IGRPEN_WRITE 0
+#define TRACE_GICV3_ICV_IGRPEN_WRITE_ENABLED 0
+#define TRACE_GICV3_ICV_IGRPEN_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_igrpen_write(int grp, uint32_t cpu, uint64_t val) {
+ (void)grp;
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_NMIAR1_READ 0
+#define TRACE_GICV3_ICV_NMIAR1_READ_ENABLED 0
+#define TRACE_GICV3_ICV_NMIAR1_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_nmiar1_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_PMR_READ 0
+#define TRACE_GICV3_ICV_PMR_READ_ENABLED 0
+#define TRACE_GICV3_ICV_PMR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_pmr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_PMR_WRITE 0
+#define TRACE_GICV3_ICV_PMR_WRITE_ENABLED 0
+#define TRACE_GICV3_ICV_PMR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_pmr_write(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ICV_RPR_READ 0
+#define TRACE_GICV3_ICV_RPR_READ_ENABLED 0
+#define TRACE_GICV3_ICV_RPR_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_icv_rpr_read(uint32_t cpu, uint64_t val) {
+ (void)cpu;
+ (void)val;
+}
+#define TRACE_GICV3_ITS_BADREAD 0
+#define TRACE_GICV3_ITS_BADREAD_ENABLED 0
+#define TRACE_GICV3_ITS_BADREAD_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_badread(uint64_t offset, unsigned size) {
+ (void)offset;
+ (void)size;
+}
+#define TRACE_GICV3_ITS_BADWRITE 0
+#define TRACE_GICV3_ITS_BADWRITE_ENABLED 0
+#define TRACE_GICV3_ITS_BADWRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_badwrite(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_GICV3_ITS_CMD_CLEAR 0
+#define TRACE_GICV3_ITS_CMD_CLEAR_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_CLEAR_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_clear(uint32_t devid, uint32_t eventid) {
+ (void)devid;
+ (void)eventid;
+}
+#define TRACE_GICV3_ITS_CMD_DISCARD 0
+#define TRACE_GICV3_ITS_CMD_DISCARD_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_DISCARD_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_discard(uint32_t devid, uint32_t eventid) {
+ (void)devid;
+ (void)eventid;
+}
+#define TRACE_GICV3_ITS_CMD_INT 0
+#define TRACE_GICV3_ITS_CMD_INT_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_INT_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_int(uint32_t devid, uint32_t eventid) {
+ (void)devid;
+ (void)eventid;
+}
+#define TRACE_GICV3_ITS_CMD_INV 0
+#define TRACE_GICV3_ITS_CMD_INV_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_INV_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_inv(uint32_t devid, uint32_t eventid) {
+ (void)devid;
+ (void)eventid;
+}
+#define TRACE_GICV3_ITS_CMD_INVALL 0
+#define TRACE_GICV3_ITS_CMD_INVALL_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_INVALL_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_invall(void) {
+}
+#define TRACE_GICV3_ITS_CMD_MAPC 0
+#define TRACE_GICV3_ITS_CMD_MAPC_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_MAPC_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_mapc(uint32_t icid, uint64_t rdbase, int valid) {
+ (void)icid;
+ (void)rdbase;
+ (void)valid;
+}
+#define TRACE_GICV3_ITS_CMD_MAPD 0
+#define TRACE_GICV3_ITS_CMD_MAPD_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_MAPD_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_mapd(uint32_t devid, uint32_t size, uint64_t ittaddr, int valid) {
+ (void)devid;
+ (void)size;
+ (void)ittaddr;
+ (void)valid;
+}
+#define TRACE_GICV3_ITS_CMD_MAPI 0
+#define TRACE_GICV3_ITS_CMD_MAPI_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_MAPI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_mapi(uint32_t devid, uint32_t eventid, uint32_t icid) {
+ (void)devid;
+ (void)eventid;
+ (void)icid;
+}
+#define TRACE_GICV3_ITS_CMD_MAPTI 0
+#define TRACE_GICV3_ITS_CMD_MAPTI_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_MAPTI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_mapti(uint32_t devid, uint32_t eventid, uint32_t icid, uint32_t intid) {
+ (void)devid;
+ (void)eventid;
+ (void)icid;
+ (void)intid;
+}
+#define TRACE_GICV3_ITS_CMD_MOVALL 0
+#define TRACE_GICV3_ITS_CMD_MOVALL_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_MOVALL_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) {
+ (void)rd1;
+ (void)rd2;
+}
+#define TRACE_GICV3_ITS_CMD_MOVI 0
+#define TRACE_GICV3_ITS_CMD_MOVI_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_MOVI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) {
+ (void)devid;
+ (void)eventid;
+ (void)icid;
+}
+#define TRACE_GICV3_ITS_CMD_SYNC 0
+#define TRACE_GICV3_ITS_CMD_SYNC_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_sync(void) {
+}
+#define TRACE_GICV3_ITS_CMD_UNKNOWN 0
+#define TRACE_GICV3_ITS_CMD_UNKNOWN_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_unknown(unsigned cmd) {
+ (void)cmd;
+}
+#define TRACE_GICV3_ITS_CMD_VINVALL 0
+#define TRACE_GICV3_ITS_CMD_VINVALL_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_VINVALL_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_vinvall(uint32_t vpeid) {
+ (void)vpeid;
+}
+#define TRACE_GICV3_ITS_CMD_VMAPI 0
+#define TRACE_GICV3_ITS_CMD_VMAPI_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_VMAPI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint32_t doorbell) {
+ (void)devid;
+ (void)eventid;
+ (void)vpeid;
+ (void)doorbell;
+}
+#define TRACE_GICV3_ITS_CMD_VMAPP 0
+#define TRACE_GICV3_ITS_CMD_VMAPP_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_VMAPP_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, int valid, uint64_t vptaddr, uint32_t vptsize) {
+ (void)vpeid;
+ (void)rdbase;
+ (void)valid;
+ (void)vptaddr;
+ (void)vptsize;
+}
+#define TRACE_GICV3_ITS_CMD_VMAPTI 0
+#define TRACE_GICV3_ITS_CMD_VMAPTI_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_VMAPTI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint32_t vintid, uint32_t doorbell) {
+ (void)devid;
+ (void)eventid;
+ (void)vpeid;
+ (void)vintid;
+ (void)doorbell;
+}
+#define TRACE_GICV3_ITS_CMD_VMOVI 0
+#define TRACE_GICV3_ITS_CMD_VMOVI_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_VMOVI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_vmovi(uint32_t devid, uint32_t eventid, uint32_t vpeid, int dbvalid, uint32_t doorbell) {
+ (void)devid;
+ (void)eventid;
+ (void)vpeid;
+ (void)dbvalid;
+ (void)doorbell;
+}
+#define TRACE_GICV3_ITS_CMD_VMOVP 0
+#define TRACE_GICV3_ITS_CMD_VMOVP_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_VMOVP_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_vmovp(uint32_t vpeid, uint64_t rdbase) {
+ (void)vpeid;
+ (void)rdbase;
+}
+#define TRACE_GICV3_ITS_CMD_VSYNC 0
+#define TRACE_GICV3_ITS_CMD_VSYNC_ENABLED 0
+#define TRACE_GICV3_ITS_CMD_VSYNC_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cmd_vsync(void) {
+}
+#define TRACE_GICV3_ITS_CTE_READ 0
+#define TRACE_GICV3_ITS_CTE_READ_ENABLED 0
+#define TRACE_GICV3_ITS_CTE_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) {
+ (void)icid;
+ (void)valid;
+ (void)rdbase;
+}
+#define TRACE_GICV3_ITS_CTE_READ_FAULT 0
+#define TRACE_GICV3_ITS_CTE_READ_FAULT_ENABLED 0
+#define TRACE_GICV3_ITS_CTE_READ_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cte_read_fault(uint32_t icid) {
+ (void)icid;
+}
+#define TRACE_GICV3_ITS_CTE_WRITE 0
+#define TRACE_GICV3_ITS_CTE_WRITE_ENABLED 0
+#define TRACE_GICV3_ITS_CTE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) {
+ (void)icid;
+ (void)valid;
+ (void)rdbase;
+}
+#define TRACE_GICV3_ITS_DTE_READ 0
+#define TRACE_GICV3_ITS_DTE_READ_ENABLED 0
+#define TRACE_GICV3_ITS_DTE_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_dte_read(uint32_t devid, int valid, uint32_t size, uint64_t ittaddr) {
+ (void)devid;
+ (void)valid;
+ (void)size;
+ (void)ittaddr;
+}
+#define TRACE_GICV3_ITS_DTE_READ_FAULT 0
+#define TRACE_GICV3_ITS_DTE_READ_FAULT_ENABLED 0
+#define TRACE_GICV3_ITS_DTE_READ_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_dte_read_fault(uint32_t devid) {
+ (void)devid;
+}
+#define TRACE_GICV3_ITS_DTE_WRITE 0
+#define TRACE_GICV3_ITS_DTE_WRITE_ENABLED 0
+#define TRACE_GICV3_ITS_DTE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_dte_write(uint32_t devid, int valid, uint32_t size, uint64_t ittaddr) {
+ (void)devid;
+ (void)valid;
+ (void)size;
+ (void)ittaddr;
+}
+#define TRACE_GICV3_ITS_ITE_READ 0
+#define TRACE_GICV3_ITS_ITE_READ_ENABLED 0
+#define TRACE_GICV3_ITS_ITE_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_ite_read(uint64_t ittaddr, uint32_t eventid, int valid, int inttype, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) {
+ (void)ittaddr;
+ (void)eventid;
+ (void)valid;
+ (void)inttype;
+ (void)intid;
+ (void)icid;
+ (void)vpeid;
+ (void)doorbell;
+}
+#define TRACE_GICV3_ITS_ITE_READ_FAULT 0
+#define TRACE_GICV3_ITS_ITE_READ_FAULT_ENABLED 0
+#define TRACE_GICV3_ITS_ITE_READ_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_ite_read_fault(uint64_t ittaddr, uint32_t eventid) {
+ (void)ittaddr;
+ (void)eventid;
+}
+#define TRACE_GICV3_ITS_ITE_WRITE 0
+#define TRACE_GICV3_ITS_ITE_WRITE_ENABLED 0
+#define TRACE_GICV3_ITS_ITE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_ite_write(uint64_t ittaddr, uint32_t eventid, int valid, int inttype, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) {
+ (void)ittaddr;
+ (void)eventid;
+ (void)valid;
+ (void)inttype;
+ (void)intid;
+ (void)icid;
+ (void)vpeid;
+ (void)doorbell;
+}
+#define TRACE_GICV3_ITS_PROCESS_COMMAND 0
+#define TRACE_GICV3_ITS_PROCESS_COMMAND_ENABLED 0
+#define TRACE_GICV3_ITS_PROCESS_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_process_command(uint32_t rd_offset, uint8_t cmd) {
+ (void)rd_offset;
+ (void)cmd;
+}
+#define TRACE_GICV3_ITS_READ 0
+#define TRACE_GICV3_ITS_READ_ENABLED 0
+#define TRACE_GICV3_ITS_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_GICV3_ITS_TRANSLATION_WRITE 0
+#define TRACE_GICV3_ITS_TRANSLATION_WRITE_ENABLED 0
+#define TRACE_GICV3_ITS_TRANSLATION_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_translation_write(uint64_t offset, uint64_t data, unsigned size, uint32_t requester_id) {
+ (void)offset;
+ (void)data;
+ (void)size;
+ (void)requester_id;
+}
+#define TRACE_GICV3_ITS_VTE_READ 0
+#define TRACE_GICV3_ITS_VTE_READ_ENABLED 0
+#define TRACE_GICV3_ITS_VTE_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_vte_read(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t vptaddr, uint32_t rdbase) {
+ (void)vpeid;
+ (void)valid;
+ (void)vptsize;
+ (void)vptaddr;
+ (void)rdbase;
+}
+#define TRACE_GICV3_ITS_VTE_READ_FAULT 0
+#define TRACE_GICV3_ITS_VTE_READ_FAULT_ENABLED 0
+#define TRACE_GICV3_ITS_VTE_READ_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_vte_read_fault(uint32_t vpeid) {
+ (void)vpeid;
+}
+#define TRACE_GICV3_ITS_VTE_WRITE 0
+#define TRACE_GICV3_ITS_VTE_WRITE_ENABLED 0
+#define TRACE_GICV3_ITS_VTE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_vte_write(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t vptaddr, uint32_t rdbase) {
+ (void)vpeid;
+ (void)valid;
+ (void)vptsize;
+ (void)vptaddr;
+ (void)rdbase;
+}
+#define TRACE_GICV3_ITS_WRITE 0
+#define TRACE_GICV3_ITS_WRITE_ENABLED 0
+#define TRACE_GICV3_ITS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_its_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_GICV3_REDIST_BADREAD 0
+#define TRACE_GICV3_REDIST_BADREAD_ENABLED 0
+#define TRACE_GICV3_REDIST_BADREAD_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_redist_badread(uint32_t cpu, uint64_t offset, unsigned size, bool secure) {
+ (void)cpu;
+ (void)offset;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GICV3_REDIST_BADWRITE 0
+#define TRACE_GICV3_REDIST_BADWRITE_ENABLED 0
+#define TRACE_GICV3_REDIST_BADWRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_redist_badwrite(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) {
+ (void)cpu;
+ (void)offset;
+ (void)data;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GICV3_REDIST_READ 0
+#define TRACE_GICV3_REDIST_READ_ENABLED 0
+#define TRACE_GICV3_REDIST_READ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_redist_read(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) {
+ (void)cpu;
+ (void)offset;
+ (void)data;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GICV3_REDIST_SEND_SGI 0
+#define TRACE_GICV3_REDIST_SEND_SGI_ENABLED 0
+#define TRACE_GICV3_REDIST_SEND_SGI_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_redist_send_sgi(uint32_t cpu, int irq) {
+ (void)cpu;
+ (void)irq;
+}
+#define TRACE_GICV3_REDIST_SET_IRQ 0
+#define TRACE_GICV3_REDIST_SET_IRQ_ENABLED 0
+#define TRACE_GICV3_REDIST_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_redist_set_irq(uint32_t cpu, int irq, int level) {
+ (void)cpu;
+ (void)irq;
+ (void)level;
+}
+#define TRACE_GICV3_REDIST_WRITE 0
+#define TRACE_GICV3_REDIST_WRITE_ENABLED 0
+#define TRACE_GICV3_REDIST_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gicv3_redist_write(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) {
+ (void)cpu;
+ (void)offset;
+ (void)data;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_GOLDFISH_IRQ_REQUEST 0
+#define TRACE_GOLDFISH_IRQ_REQUEST_ENABLED 0
+#define TRACE_GOLDFISH_IRQ_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_irq_request(void *dev, int idx, int irq, int level) {
+ (void)dev;
+ (void)idx;
+ (void)irq;
+ (void)level;
+}
+#define TRACE_GOLDFISH_PIC_INSTANCE_INIT 0
+#define TRACE_GOLDFISH_PIC_INSTANCE_INIT_ENABLED 0
+#define TRACE_GOLDFISH_PIC_INSTANCE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_pic_instance_init(void *dev) {
+ (void)dev;
+}
+#define TRACE_GOLDFISH_PIC_READ 0
+#define TRACE_GOLDFISH_PIC_READ_ENABLED 0
+#define TRACE_GOLDFISH_PIC_READ_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_pic_read(void *dev, int idx, unsigned int addr, unsigned int size, uint64_t value) {
+ (void)dev;
+ (void)idx;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_GOLDFISH_PIC_REALIZE 0
+#define TRACE_GOLDFISH_PIC_REALIZE_ENABLED 0
+#define TRACE_GOLDFISH_PIC_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_pic_realize(void *dev, int idx) {
+ (void)dev;
+ (void)idx;
+}
+#define TRACE_GOLDFISH_PIC_RESET 0
+#define TRACE_GOLDFISH_PIC_RESET_ENABLED 0
+#define TRACE_GOLDFISH_PIC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_pic_reset(void *dev, int idx) {
+ (void)dev;
+ (void)idx;
+}
+#define TRACE_GOLDFISH_PIC_WRITE 0
+#define TRACE_GOLDFISH_PIC_WRITE_ENABLED 0
+#define TRACE_GOLDFISH_PIC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_pic_write(void *dev, int idx, unsigned int addr, unsigned int size, uint64_t value) {
+ (void)dev;
+ (void)idx;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_GRLIB_IRQMP_ACK 0
+#define TRACE_GRLIB_IRQMP_ACK_ENABLED 0
+#define TRACE_GRLIB_IRQMP_ACK_BACKEND_DSTATE() (0)
+static inline void trace_grlib_irqmp_ack(int intno) {
+ (void)intno;
+}
+#define TRACE_GRLIB_IRQMP_CHECK_IRQS 0
+#define TRACE_GRLIB_IRQMP_CHECK_IRQS_ENABLED 0
+#define TRACE_GRLIB_IRQMP_CHECK_IRQS_BACKEND_DSTATE() (0)
+static inline void trace_grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) {
+ (void)pend;
+ (void)force;
+ (void)mask;
+ (void)lvl1;
+ (void)lvl2;
+}
+#define TRACE_GRLIB_IRQMP_READL_UNKNOWN 0
+#define TRACE_GRLIB_IRQMP_READL_UNKNOWN_ENABLED 0
+#define TRACE_GRLIB_IRQMP_READL_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_grlib_irqmp_readl_unknown(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_GRLIB_IRQMP_SET_IRQ 0
+#define TRACE_GRLIB_IRQMP_SET_IRQ_ENABLED 0
+#define TRACE_GRLIB_IRQMP_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_grlib_irqmp_set_irq(int irq) {
+ (void)irq;
+}
+#define TRACE_GRLIB_IRQMP_WRITEL_UNKNOWN 0
+#define TRACE_GRLIB_IRQMP_WRITEL_UNKNOWN_ENABLED 0
+#define TRACE_GRLIB_IRQMP_WRITEL_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_HEATHROW_READ 0
+#define TRACE_HEATHROW_READ_ENABLED 0
+#define TRACE_HEATHROW_READ_BACKEND_DSTATE() (0)
+static inline void trace_heathrow_read(uint64_t addr, unsigned int n, uint64_t value) {
+ (void)addr;
+ (void)n;
+ (void)value;
+}
+#define TRACE_HEATHROW_SET_IRQ 0
+#define TRACE_HEATHROW_SET_IRQ_ENABLED 0
+#define TRACE_HEATHROW_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_heathrow_set_irq(int num, int level) {
+ (void)num;
+ (void)level;
+}
+#define TRACE_HEATHROW_WRITE 0
+#define TRACE_HEATHROW_WRITE_ENABLED 0
+#define TRACE_HEATHROW_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_heathrow_write(uint64_t addr, unsigned int n, uint64_t value) {
+ (void)addr;
+ (void)n;
+ (void)value;
+}
+#define TRACE_IOAPIC_CLEAR_REMOTE_IRR 0
+#define TRACE_IOAPIC_CLEAR_REMOTE_IRR_ENABLED 0
+#define TRACE_IOAPIC_CLEAR_REMOTE_IRR_BACKEND_DSTATE() (0)
+static inline void trace_ioapic_clear_remote_irr(int n, int vector) {
+ (void)n;
+ (void)vector;
+}
+#define TRACE_IOAPIC_EOI_BROADCAST 0
+#define TRACE_IOAPIC_EOI_BROADCAST_ENABLED 0
+#define TRACE_IOAPIC_EOI_BROADCAST_BACKEND_DSTATE() (0)
+static inline void trace_ioapic_eoi_broadcast(int vector) {
+ (void)vector;
+}
+#define TRACE_IOAPIC_EOI_DELAYED_REASSERT 0
+#define TRACE_IOAPIC_EOI_DELAYED_REASSERT_ENABLED 0
+#define TRACE_IOAPIC_EOI_DELAYED_REASSERT_BACKEND_DSTATE() (0)
+static inline void trace_ioapic_eoi_delayed_reassert(int vector) {
+ (void)vector;
+}
+#define TRACE_IOAPIC_MEM_READ 0
+#define TRACE_IOAPIC_MEM_READ_ENABLED 0
+#define TRACE_IOAPIC_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_ioapic_mem_read(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) {
+ (void)addr;
+ (void)regsel;
+ (void)size;
+ (void)val;
+}
+#define TRACE_IOAPIC_MEM_WRITE 0
+#define TRACE_IOAPIC_MEM_WRITE_ENABLED 0
+#define TRACE_IOAPIC_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ioapic_mem_write(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) {
+ (void)addr;
+ (void)regsel;
+ (void)size;
+ (void)val;
+}
+#define TRACE_IOAPIC_SET_IRQ 0
+#define TRACE_IOAPIC_SET_IRQ_ENABLED 0
+#define TRACE_IOAPIC_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_ioapic_set_irq(int vector, int level) {
+ (void)vector;
+ (void)level;
+}
+#define TRACE_IOAPIC_SET_REMOTE_IRR 0
+#define TRACE_IOAPIC_SET_REMOTE_IRR_ENABLED 0
+#define TRACE_IOAPIC_SET_REMOTE_IRR_BACKEND_DSTATE() (0)
+static inline void trace_ioapic_set_remote_irr(int n) {
+ (void)n;
+}
+#define TRACE_KVM_GET_IRQ_DELIVERED 0
+#define TRACE_KVM_GET_IRQ_DELIVERED_ENABLED 0
+#define TRACE_KVM_GET_IRQ_DELIVERED_BACKEND_DSTATE() (0)
+static inline void trace_kvm_get_irq_delivered(int irq_delivered) {
+ (void)irq_delivered;
+}
+#define TRACE_KVM_REPORT_IRQ_DELIVERED 0
+#define TRACE_KVM_REPORT_IRQ_DELIVERED_ENABLED 0
+#define TRACE_KVM_REPORT_IRQ_DELIVERED_BACKEND_DSTATE() (0)
+static inline void trace_kvm_report_irq_delivered(int irq_delivered) {
+ (void)irq_delivered;
+}
+#define TRACE_KVM_RESET_IRQ_DELIVERED 0
+#define TRACE_KVM_RESET_IRQ_DELIVERED_ENABLED 0
+#define TRACE_KVM_RESET_IRQ_DELIVERED_BACKEND_DSTATE() (0)
+static inline void trace_kvm_reset_irq_delivered(int irq_delivered) {
+ (void)irq_delivered;
+}
+#define TRACE_KVM_XIVE_CPU_CONNECT 0
+#define TRACE_KVM_XIVE_CPU_CONNECT_ENABLED 0
+#define TRACE_KVM_XIVE_CPU_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xive_cpu_connect(uint32_t id) {
+ (void)id;
+}
+#define TRACE_KVM_XIVE_SOURCE_RESET 0
+#define TRACE_KVM_XIVE_SOURCE_RESET_ENABLED 0
+#define TRACE_KVM_XIVE_SOURCE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xive_source_reset(uint32_t srcno) {
+ (void)srcno;
+}
+#define TRACE_LOONGARCH_EXTIOI_READW 0
+#define TRACE_LOONGARCH_EXTIOI_READW_ENABLED 0
+#define TRACE_LOONGARCH_EXTIOI_READW_BACKEND_DSTATE() (0)
+static inline void trace_loongarch_extioi_readw(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LOONGARCH_EXTIOI_SETIRQ 0
+#define TRACE_LOONGARCH_EXTIOI_SETIRQ_ENABLED 0
+#define TRACE_LOONGARCH_EXTIOI_SETIRQ_BACKEND_DSTATE() (0)
+static inline void trace_loongarch_extioi_setirq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_LOONGARCH_EXTIOI_WRITEW 0
+#define TRACE_LOONGARCH_EXTIOI_WRITEW_ENABLED 0
+#define TRACE_LOONGARCH_EXTIOI_WRITEW_BACKEND_DSTATE() (0)
+static inline void trace_loongarch_extioi_writew(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LOONGARCH_MSI_SET_IRQ 0
+#define TRACE_LOONGARCH_MSI_SET_IRQ_ENABLED 0
+#define TRACE_LOONGARCH_MSI_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_loongarch_msi_set_irq(int irq_num) {
+ (void)irq_num;
+}
+#define TRACE_LOONGARCH_PCH_PIC_IRQ_HANDLER 0
+#define TRACE_LOONGARCH_PCH_PIC_IRQ_HANDLER_ENABLED 0
+#define TRACE_LOONGARCH_PCH_PIC_IRQ_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_loongarch_pch_pic_irq_handler(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_LOONGARCH_PCH_PIC_READ 0
+#define TRACE_LOONGARCH_PCH_PIC_READ_ENABLED 0
+#define TRACE_LOONGARCH_PCH_PIC_READ_BACKEND_DSTATE() (0)
+static inline void trace_loongarch_pch_pic_read(unsigned size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LOONGARCH_PCH_PIC_WRITE 0
+#define TRACE_LOONGARCH_PCH_PIC_WRITE_ENABLED 0
+#define TRACE_LOONGARCH_PCH_PIC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_loongarch_pch_pic_write(unsigned size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LOONGSON_IPI_READ 0
+#define TRACE_LOONGSON_IPI_READ_ENABLED 0
+#define TRACE_LOONGSON_IPI_READ_BACKEND_DSTATE() (0)
+static inline void trace_loongson_ipi_read(unsigned size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LOONGSON_IPI_WRITE 0
+#define TRACE_LOONGSON_IPI_WRITE_ENABLED 0
+#define TRACE_LOONGSON_IPI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_loongson_ipi_write(unsigned size, uint64_t addr, uint64_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_NVIC_ACKNOWLEDGE_IRQ 0
+#define TRACE_NVIC_ACKNOWLEDGE_IRQ_ENABLED 0
+#define TRACE_NVIC_ACKNOWLEDGE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_nvic_acknowledge_irq(int irq, int prio) {
+ (void)irq;
+ (void)prio;
+}
+#define TRACE_NVIC_CLEAR_PENDING 0
+#define TRACE_NVIC_CLEAR_PENDING_ENABLED 0
+#define TRACE_NVIC_CLEAR_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_nvic_clear_pending(int irq, bool secure, int en, int prio) {
+ (void)irq;
+ (void)secure;
+ (void)en;
+ (void)prio;
+}
+#define TRACE_NVIC_COMPLETE_IRQ 0
+#define TRACE_NVIC_COMPLETE_IRQ_ENABLED 0
+#define TRACE_NVIC_COMPLETE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_nvic_complete_irq(int irq, bool secure) {
+ (void)irq;
+ (void)secure;
+}
+#define TRACE_NVIC_ESCALATE_DISABLED 0
+#define TRACE_NVIC_ESCALATE_DISABLED_ENABLED 0
+#define TRACE_NVIC_ESCALATE_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_nvic_escalate_disabled(int irq) {
+ (void)irq;
+}
+#define TRACE_NVIC_ESCALATE_PRIO 0
+#define TRACE_NVIC_ESCALATE_PRIO_ENABLED 0
+#define TRACE_NVIC_ESCALATE_PRIO_BACKEND_DSTATE() (0)
+static inline void trace_nvic_escalate_prio(int irq, int irqprio, int runprio) {
+ (void)irq;
+ (void)irqprio;
+ (void)runprio;
+}
+#define TRACE_NVIC_GET_PENDING_IRQ_INFO 0
+#define TRACE_NVIC_GET_PENDING_IRQ_INFO_ENABLED 0
+#define TRACE_NVIC_GET_PENDING_IRQ_INFO_BACKEND_DSTATE() (0)
+static inline void trace_nvic_get_pending_irq_info(int irq, bool secure) {
+ (void)irq;
+ (void)secure;
+}
+#define TRACE_NVIC_IRQ_UPDATE 0
+#define TRACE_NVIC_IRQ_UPDATE_ENABLED 0
+#define TRACE_NVIC_IRQ_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_nvic_irq_update(int vectpending, int pendprio, int exception_prio, int level) {
+ (void)vectpending;
+ (void)pendprio;
+ (void)exception_prio;
+ (void)level;
+}
+#define TRACE_NVIC_RECOMPUTE_STATE 0
+#define TRACE_NVIC_RECOMPUTE_STATE_ENABLED 0
+#define TRACE_NVIC_RECOMPUTE_STATE_BACKEND_DSTATE() (0)
+static inline void trace_nvic_recompute_state(int vectpending, int vectpending_prio, int exception_prio) {
+ (void)vectpending;
+ (void)vectpending_prio;
+ (void)exception_prio;
+}
+#define TRACE_NVIC_RECOMPUTE_STATE_SECURE 0
+#define TRACE_NVIC_RECOMPUTE_STATE_SECURE_ENABLED 0
+#define TRACE_NVIC_RECOMPUTE_STATE_SECURE_BACKEND_DSTATE() (0)
+static inline void trace_nvic_recompute_state_secure(int vectpending, bool vectpending_is_s_banked, int vectpending_prio, int exception_prio) {
+ (void)vectpending;
+ (void)vectpending_is_s_banked;
+ (void)vectpending_prio;
+ (void)exception_prio;
+}
+#define TRACE_NVIC_SET_IRQ_LEVEL 0
+#define TRACE_NVIC_SET_IRQ_LEVEL_ENABLED 0
+#define TRACE_NVIC_SET_IRQ_LEVEL_BACKEND_DSTATE() (0)
+static inline void trace_nvic_set_irq_level(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_NVIC_SET_NMI_LEVEL 0
+#define TRACE_NVIC_SET_NMI_LEVEL_ENABLED 0
+#define TRACE_NVIC_SET_NMI_LEVEL_BACKEND_DSTATE() (0)
+static inline void trace_nvic_set_nmi_level(int level) {
+ (void)level;
+}
+#define TRACE_NVIC_SET_PENDING 0
+#define TRACE_NVIC_SET_PENDING_ENABLED 0
+#define TRACE_NVIC_SET_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_nvic_set_pending(int irq, bool secure, bool targets_secure, bool derived, int en, int prio) {
+ (void)irq;
+ (void)secure;
+ (void)targets_secure;
+ (void)derived;
+ (void)en;
+ (void)prio;
+}
+#define TRACE_NVIC_SET_PRIO 0
+#define TRACE_NVIC_SET_PRIO_ENABLED 0
+#define TRACE_NVIC_SET_PRIO_BACKEND_DSTATE() (0)
+static inline void trace_nvic_set_prio(int irq, bool secure, uint8_t prio) {
+ (void)irq;
+ (void)secure;
+ (void)prio;
+}
+#define TRACE_NVIC_SYSREG_READ 0
+#define TRACE_NVIC_SYSREG_READ_ENABLED 0
+#define TRACE_NVIC_SYSREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_nvic_sysreg_read(uint64_t addr, uint32_t value, unsigned size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_NVIC_SYSREG_WRITE 0
+#define TRACE_NVIC_SYSREG_WRITE_ENABLED 0
+#define TRACE_NVIC_SYSREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nvic_sysreg_write(uint64_t addr, uint32_t value, unsigned size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_PIC_INTERRUPT 0
+#define TRACE_PIC_INTERRUPT_ENABLED 0
+#define TRACE_PIC_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_pic_interrupt(int irq, int intno) {
+ (void)irq;
+ (void)intno;
+}
+#define TRACE_PIC_IOPORT_READ 0
+#define TRACE_PIC_IOPORT_READ_ENABLED 0
+#define TRACE_PIC_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_pic_ioport_read(bool master, uint64_t addr, int val) {
+ (void)master;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PIC_IOPORT_WRITE 0
+#define TRACE_PIC_IOPORT_WRITE_ENABLED 0
+#define TRACE_PIC_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pic_ioport_write(bool master, uint64_t addr, uint64_t val) {
+ (void)master;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PIC_SET_IRQ 0
+#define TRACE_PIC_SET_IRQ_ENABLED 0
+#define TRACE_PIC_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_pic_set_irq(bool master, int irq, int level) {
+ (void)master;
+ (void)irq;
+ (void)level;
+}
+#define TRACE_PIC_UPDATE_IRQ 0
+#define TRACE_PIC_UPDATE_IRQ_ENABLED 0
+#define TRACE_PIC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_pic_update_irq(bool master, uint8_t imr, uint8_t irr, uint8_t padd) {
+ (void)master;
+ (void)imr;
+ (void)irr;
+ (void)padd;
+}
+#define TRACE_PNV_XIVE_IC_HW_TRIGGER 0
+#define TRACE_PNV_XIVE_IC_HW_TRIGGER_ENABLED 0
+#define TRACE_PNV_XIVE_IC_HW_TRIGGER_BACKEND_DSTATE() (0)
+static inline void trace_pnv_xive_ic_hw_trigger(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_QEMU_S390_AIRQ_SUPPRESSED 0
+#define TRACE_QEMU_S390_AIRQ_SUPPRESSED_ENABLED 0
+#define TRACE_QEMU_S390_AIRQ_SUPPRESSED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_s390_airq_suppressed(uint8_t type, uint8_t isc) {
+ (void)type;
+ (void)isc;
+}
+#define TRACE_QEMU_S390_SUPPRESS_AIRQ 0
+#define TRACE_QEMU_S390_SUPPRESS_AIRQ_ENABLED 0
+#define TRACE_QEMU_S390_SUPPRESS_AIRQ_BACKEND_DSTATE() (0)
+static inline void trace_qemu_s390_suppress_airq(uint8_t isc, const char *from, const char *to) {
+ (void)isc;
+ (void)from;
+ (void)to;
+}
+#define TRACE_SH_INTC_PENDING 0
+#define TRACE_SH_INTC_PENDING_ENABLED 0
+#define TRACE_SH_INTC_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_sh_intc_pending(int p, unsigned short v) {
+ (void)p;
+ (void)v;
+}
+#define TRACE_SH_INTC_READ 0
+#define TRACE_SH_INTC_READ_ENABLED 0
+#define TRACE_SH_INTC_READ_BACKEND_DSTATE() (0)
+static inline void trace_sh_intc_read(unsigned size, uint64_t offset, unsigned long val) {
+ (void)size;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_SH_INTC_REGISTER 0
+#define TRACE_SH_INTC_REGISTER_ENABLED 0
+#define TRACE_SH_INTC_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_sh_intc_register(const char *s, int id, unsigned short v, int c, int m) {
+ (void)s;
+ (void)id;
+ (void)v;
+ (void)c;
+ (void)m;
+}
+#define TRACE_SH_INTC_SET 0
+#define TRACE_SH_INTC_SET_ENABLED 0
+#define TRACE_SH_INTC_SET_BACKEND_DSTATE() (0)
+static inline void trace_sh_intc_set(int id, int enable) {
+ (void)id;
+ (void)enable;
+}
+#define TRACE_SH_INTC_SOURCES 0
+#define TRACE_SH_INTC_SOURCES_ENABLED 0
+#define TRACE_SH_INTC_SOURCES_BACKEND_DSTATE() (0)
+static inline void trace_sh_intc_sources(int p, int a, int c, int m, unsigned short v, const char *s1, const char *s2, const char *s3) {
+ (void)p;
+ (void)a;
+ (void)c;
+ (void)m;
+ (void)v;
+ (void)s1;
+ (void)s2;
+ (void)s3;
+}
+#define TRACE_SH_INTC_WRITE 0
+#define TRACE_SH_INTC_WRITE_ENABLED 0
+#define TRACE_SH_INTC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sh_intc_write(unsigned size, uint64_t offset, unsigned long val) {
+ (void)size;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_SLAVIO_CHECK_INTERRUPTS 0
+#define TRACE_SLAVIO_CHECK_INTERRUPTS_ENABLED 0
+#define TRACE_SLAVIO_CHECK_INTERRUPTS_BACKEND_DSTATE() (0)
+static inline void trace_slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) {
+ (void)pending;
+ (void)intregm_disabled;
+}
+#define TRACE_SLAVIO_INTCTL_MEM_READL 0
+#define TRACE_SLAVIO_INTCTL_MEM_READL_ENABLED 0
+#define TRACE_SLAVIO_INTCTL_MEM_READL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) {
+ (void)cpu;
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL 0
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_ENABLED 0
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) {
+ (void)cpu;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_CLEAR 0
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_CLEAR_ENABLED 0
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_CLEAR_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) {
+ (void)cpu;
+ (void)val;
+ (void)intreg_pending;
+}
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_SET 0
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_SET_ENABLED 0
+#define TRACE_SLAVIO_INTCTL_MEM_WRITEL_SET_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) {
+ (void)cpu;
+ (void)val;
+ (void)intreg_pending;
+}
+#define TRACE_SLAVIO_INTCTLM_MEM_READL 0
+#define TRACE_SLAVIO_INTCTLM_MEM_READL_ENABLED 0
+#define TRACE_SLAVIO_INTCTLM_MEM_READL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_ENABLED 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_DISABLE 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_DISABLE_ENABLED 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) {
+ (void)val;
+ (void)intregm_disabled;
+}
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_ENABLE 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_ENABLE_ENABLED 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) {
+ (void)val;
+ (void)intregm_disabled;
+}
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_TARGET 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_TARGET_ENABLED 0
+#define TRACE_SLAVIO_INTCTLM_MEM_WRITEL_TARGET_BACKEND_DSTATE() (0)
+static inline void trace_slavio_intctlm_mem_writel_target(uint32_t cpu) {
+ (void)cpu;
+}
+#define TRACE_SLAVIO_SET_IRQ 0
+#define TRACE_SLAVIO_SET_IRQ_ENABLED 0
+#define TRACE_SLAVIO_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) {
+ (void)target_cpu;
+ (void)irq;
+ (void)pil;
+ (void)level;
+}
+#define TRACE_SLAVIO_SET_TIMER_IRQ_CPU 0
+#define TRACE_SLAVIO_SET_TIMER_IRQ_CPU_ENABLED 0
+#define TRACE_SLAVIO_SET_TIMER_IRQ_CPU_BACKEND_DSTATE() (0)
+static inline void trace_slavio_set_timer_irq_cpu(int cpu, int level) {
+ (void)cpu;
+ (void)level;
+}
+#define TRACE_SPAPR_XIVE_CLAIM_IRQ 0
+#define TRACE_SPAPR_XIVE_CLAIM_IRQ_ENABLED 0
+#define TRACE_SPAPR_XIVE_CLAIM_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_claim_irq(uint32_t lisn, bool lsi) {
+ (void)lisn;
+ (void)lsi;
+}
+#define TRACE_SPAPR_XIVE_ESB 0
+#define TRACE_SPAPR_XIVE_ESB_ENABLED 0
+#define TRACE_SPAPR_XIVE_ESB_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_esb(uint64_t flags, uint64_t lisn, uint64_t offset, uint64_t data) {
+ (void)flags;
+ (void)lisn;
+ (void)offset;
+ (void)data;
+}
+#define TRACE_SPAPR_XIVE_FREE_IRQ 0
+#define TRACE_SPAPR_XIVE_FREE_IRQ_ENABLED 0
+#define TRACE_SPAPR_XIVE_FREE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_free_irq(uint32_t lisn) {
+ (void)lisn;
+}
+#define TRACE_SPAPR_XIVE_GET_OS_REPORTING_LINE 0
+#define TRACE_SPAPR_XIVE_GET_OS_REPORTING_LINE_ENABLED 0
+#define TRACE_SPAPR_XIVE_GET_OS_REPORTING_LINE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_get_os_reporting_line(uint64_t flags) {
+ (void)flags;
+}
+#define TRACE_SPAPR_XIVE_GET_QUEUE_CONFIG 0
+#define TRACE_SPAPR_XIVE_GET_QUEUE_CONFIG_ENABLED 0
+#define TRACE_SPAPR_XIVE_GET_QUEUE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_get_queue_config(uint64_t flags, uint64_t target, uint64_t priority) {
+ (void)flags;
+ (void)target;
+ (void)priority;
+}
+#define TRACE_SPAPR_XIVE_GET_QUEUE_INFO 0
+#define TRACE_SPAPR_XIVE_GET_QUEUE_INFO_ENABLED 0
+#define TRACE_SPAPR_XIVE_GET_QUEUE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_get_queue_info(uint64_t flags, uint64_t target, uint64_t priority) {
+ (void)flags;
+ (void)target;
+ (void)priority;
+}
+#define TRACE_SPAPR_XIVE_GET_SOURCE_CONFIG 0
+#define TRACE_SPAPR_XIVE_GET_SOURCE_CONFIG_ENABLED 0
+#define TRACE_SPAPR_XIVE_GET_SOURCE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_get_source_config(uint64_t flags, uint64_t lisn) {
+ (void)flags;
+ (void)lisn;
+}
+#define TRACE_SPAPR_XIVE_GET_SOURCE_INFO 0
+#define TRACE_SPAPR_XIVE_GET_SOURCE_INFO_ENABLED 0
+#define TRACE_SPAPR_XIVE_GET_SOURCE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_get_source_info(uint64_t flags, uint64_t lisn) {
+ (void)flags;
+ (void)lisn;
+}
+#define TRACE_SPAPR_XIVE_RESET 0
+#define TRACE_SPAPR_XIVE_RESET_ENABLED 0
+#define TRACE_SPAPR_XIVE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_reset(uint64_t flags) {
+ (void)flags;
+}
+#define TRACE_SPAPR_XIVE_SET_IRQ 0
+#define TRACE_SPAPR_XIVE_SET_IRQ_ENABLED 0
+#define TRACE_SPAPR_XIVE_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_set_irq(uint32_t lisn, uint32_t val) {
+ (void)lisn;
+ (void)val;
+}
+#define TRACE_SPAPR_XIVE_SET_OS_REPORTING_LINE 0
+#define TRACE_SPAPR_XIVE_SET_OS_REPORTING_LINE_ENABLED 0
+#define TRACE_SPAPR_XIVE_SET_OS_REPORTING_LINE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_set_os_reporting_line(uint64_t flags) {
+ (void)flags;
+}
+#define TRACE_SPAPR_XIVE_SET_QUEUE_CONFIG 0
+#define TRACE_SPAPR_XIVE_SET_QUEUE_CONFIG_ENABLED 0
+#define TRACE_SPAPR_XIVE_SET_QUEUE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_set_queue_config(uint64_t flags, uint64_t target, uint64_t priority, uint64_t qpage, uint64_t qsize) {
+ (void)flags;
+ (void)target;
+ (void)priority;
+ (void)qpage;
+ (void)qsize;
+}
+#define TRACE_SPAPR_XIVE_SET_SOURCE_CONFIG 0
+#define TRACE_SPAPR_XIVE_SET_SOURCE_CONFIG_ENABLED 0
+#define TRACE_SPAPR_XIVE_SET_SOURCE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_set_source_config(uint64_t flags, uint64_t lisn, uint64_t target, uint64_t priority, uint64_t eisn) {
+ (void)flags;
+ (void)lisn;
+ (void)target;
+ (void)priority;
+ (void)eisn;
+}
+#define TRACE_SPAPR_XIVE_SYNC 0
+#define TRACE_SPAPR_XIVE_SYNC_ENABLED 0
+#define TRACE_SPAPR_XIVE_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_spapr_xive_sync(uint64_t flags, uint64_t lisn) {
+ (void)flags;
+ (void)lisn;
+}
+#define TRACE_XICS_ICP_ACCEPT 0
+#define TRACE_XICS_ICP_ACCEPT_ENABLED 0
+#define TRACE_XICS_ICP_ACCEPT_BACKEND_DSTATE() (0)
+static inline void trace_xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) {
+ (void)old_xirr;
+ (void)new_xirr;
+}
+#define TRACE_XICS_ICP_CHECK_IPI 0
+#define TRACE_XICS_ICP_CHECK_IPI_ENABLED 0
+#define TRACE_XICS_ICP_CHECK_IPI_BACKEND_DSTATE() (0)
+static inline void trace_xics_icp_check_ipi(int server, uint8_t mfrr) {
+ (void)server;
+ (void)mfrr;
+}
+#define TRACE_XICS_ICP_EOI 0
+#define TRACE_XICS_ICP_EOI_ENABLED 0
+#define TRACE_XICS_ICP_EOI_BACKEND_DSTATE() (0)
+static inline void trace_xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) {
+ (void)server;
+ (void)xirr;
+ (void)new_xirr;
+}
+#define TRACE_XICS_ICP_IRQ 0
+#define TRACE_XICS_ICP_IRQ_ENABLED 0
+#define TRACE_XICS_ICP_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_xics_icp_irq(int server, int nr, uint8_t priority) {
+ (void)server;
+ (void)nr;
+ (void)priority;
+}
+#define TRACE_XICS_ICP_RAISE 0
+#define TRACE_XICS_ICP_RAISE_ENABLED 0
+#define TRACE_XICS_ICP_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_xics_icp_raise(uint32_t xirr, uint8_t pending_priority) {
+ (void)xirr;
+ (void)pending_priority;
+}
+#define TRACE_XICS_ICS_EOI 0
+#define TRACE_XICS_ICS_EOI_ENABLED 0
+#define TRACE_XICS_ICS_EOI_BACKEND_DSTATE() (0)
+static inline void trace_xics_ics_eoi(int nr) {
+ (void)nr;
+}
+#define TRACE_XICS_ICS_REJECT 0
+#define TRACE_XICS_ICS_REJECT_ENABLED 0
+#define TRACE_XICS_ICS_REJECT_BACKEND_DSTATE() (0)
+static inline void trace_xics_ics_reject(int nr, int srcno) {
+ (void)nr;
+ (void)srcno;
+}
+#define TRACE_XICS_ICS_SET_IRQ_LSI 0
+#define TRACE_XICS_ICS_SET_IRQ_LSI_ENABLED 0
+#define TRACE_XICS_ICS_SET_IRQ_LSI_BACKEND_DSTATE() (0)
+static inline void trace_xics_ics_set_irq_lsi(int srcno, int nr) {
+ (void)srcno;
+ (void)nr;
+}
+#define TRACE_XICS_ICS_SET_IRQ_MSI 0
+#define TRACE_XICS_ICS_SET_IRQ_MSI_ENABLED 0
+#define TRACE_XICS_ICS_SET_IRQ_MSI_BACKEND_DSTATE() (0)
+static inline void trace_xics_ics_set_irq_msi(int srcno, int nr) {
+ (void)srcno;
+ (void)nr;
+}
+#define TRACE_XICS_ICS_WRITE_XIVE 0
+#define TRACE_XICS_ICS_WRITE_XIVE_ENABLED 0
+#define TRACE_XICS_ICS_WRITE_XIVE_BACKEND_DSTATE() (0)
+static inline void trace_xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) {
+ (void)nr;
+ (void)srcno;
+ (void)server;
+ (void)priority;
+}
+#define TRACE_XICS_MASKED_PENDING 0
+#define TRACE_XICS_MASKED_PENDING_ENABLED 0
+#define TRACE_XICS_MASKED_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_xics_masked_pending(void) {
+}
+#define TRACE_XIVE_END_ENQUEUE 0
+#define TRACE_XIVE_END_ENQUEUE_ENABLED 0
+#define TRACE_XIVE_END_ENQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_xive_end_enqueue(uint8_t end_blk, uint32_t end_idx, uint32_t end_data) {
+ (void)end_blk;
+ (void)end_idx;
+ (void)end_data;
+}
+#define TRACE_XIVE_END_SOURCE_READ 0
+#define TRACE_XIVE_END_SOURCE_READ_ENABLED 0
+#define TRACE_XIVE_END_SOURCE_READ_BACKEND_DSTATE() (0)
+static inline void trace_xive_end_source_read(uint8_t end_blk, uint32_t end_idx, uint64_t addr) {
+ (void)end_blk;
+ (void)end_idx;
+ (void)addr;
+}
+#define TRACE_XIVE_ESCALATE_END 0
+#define TRACE_XIVE_ESCALATE_END_ENABLED 0
+#define TRACE_XIVE_ESCALATE_END_BACKEND_DSTATE() (0)
+static inline void trace_xive_escalate_end(uint8_t end_blk, uint32_t end_idx, uint8_t esc_blk, uint32_t esc_idx, uint32_t esc_data) {
+ (void)end_blk;
+ (void)end_idx;
+ (void)esc_blk;
+ (void)esc_idx;
+ (void)esc_data;
+}
+#define TRACE_XIVE_ESCALATE_ESB 0
+#define TRACE_XIVE_ESCALATE_ESB_ENABLED 0
+#define TRACE_XIVE_ESCALATE_ESB_BACKEND_DSTATE() (0)
+static inline void trace_xive_escalate_esb(uint8_t end_blk, uint32_t end_idx, uint32_t lisn) {
+ (void)end_blk;
+ (void)end_idx;
+ (void)lisn;
+}
+#define TRACE_XIVE_NVGC_BACKLOG_OP 0
+#define TRACE_XIVE_NVGC_BACKLOG_OP_ENABLED 0
+#define TRACE_XIVE_NVGC_BACKLOG_OP_BACKEND_DSTATE() (0)
+static inline void trace_xive_nvgc_backlog_op(bool c, uint8_t blk, uint32_t idx, uint8_t op, uint8_t priority, uint32_t rc) {
+ (void)c;
+ (void)blk;
+ (void)idx;
+ (void)op;
+ (void)priority;
+ (void)rc;
+}
+#define TRACE_XIVE_NVP_BACKLOG_OP 0
+#define TRACE_XIVE_NVP_BACKLOG_OP_ENABLED 0
+#define TRACE_XIVE_NVP_BACKLOG_OP_BACKEND_DSTATE() (0)
+static inline void trace_xive_nvp_backlog_op(uint8_t blk, uint32_t idx, uint8_t op, uint8_t priority, uint8_t rc) {
+ (void)blk;
+ (void)idx;
+ (void)op;
+ (void)priority;
+ (void)rc;
+}
+#define TRACE_XIVE_PRESENTER_NOTIFY 0
+#define TRACE_XIVE_PRESENTER_NOTIFY_ENABLED 0
+#define TRACE_XIVE_PRESENTER_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_xive_presenter_notify(uint8_t nvt_blk, uint32_t nvt_idx, uint8_t ring, uint8_t group_level) {
+ (void)nvt_blk;
+ (void)nvt_idx;
+ (void)ring;
+ (void)group_level;
+}
+#define TRACE_XIVE_REDISTRIBUTE 0
+#define TRACE_XIVE_REDISTRIBUTE_ENABLED 0
+#define TRACE_XIVE_REDISTRIBUTE_BACKEND_DSTATE() (0)
+static inline void trace_xive_redistribute(uint32_t index, uint8_t ring, uint8_t end_blk, uint32_t end_idx) {
+ (void)index;
+ (void)ring;
+ (void)end_blk;
+ (void)end_idx;
+}
+#define TRACE_XIVE_ROUTER_END_ESCALATE 0
+#define TRACE_XIVE_ROUTER_END_ESCALATE_ENABLED 0
+#define TRACE_XIVE_ROUTER_END_ESCALATE_BACKEND_DSTATE() (0)
+static inline void trace_xive_router_end_escalate(uint8_t end_blk, uint32_t end_idx, uint8_t esc_blk, uint32_t esc_idx, uint32_t end_data) {
+ (void)end_blk;
+ (void)end_idx;
+ (void)esc_blk;
+ (void)esc_idx;
+ (void)end_data;
+}
+#define TRACE_XIVE_ROUTER_END_NOTIFY 0
+#define TRACE_XIVE_ROUTER_END_NOTIFY_ENABLED 0
+#define TRACE_XIVE_ROUTER_END_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_xive_router_end_notify(uint8_t end_blk, uint32_t end_idx, uint32_t end_data) {
+ (void)end_blk;
+ (void)end_idx;
+ (void)end_data;
+}
+#define TRACE_XIVE_SOURCE_BLOCKED 0
+#define TRACE_XIVE_SOURCE_BLOCKED_ENABLED 0
+#define TRACE_XIVE_SOURCE_BLOCKED_BACKEND_DSTATE() (0)
+static inline void trace_xive_source_blocked(uint32_t srcno) {
+ (void)srcno;
+}
+#define TRACE_XIVE_SOURCE_ESB_READ 0
+#define TRACE_XIVE_SOURCE_ESB_READ_ENABLED 0
+#define TRACE_XIVE_SOURCE_ESB_READ_BACKEND_DSTATE() (0)
+static inline void trace_xive_source_esb_read(uint64_t addr, uint32_t srcno, uint64_t value) {
+ (void)addr;
+ (void)srcno;
+ (void)value;
+}
+#define TRACE_XIVE_SOURCE_ESB_WRITE 0
+#define TRACE_XIVE_SOURCE_ESB_WRITE_ENABLED 0
+#define TRACE_XIVE_SOURCE_ESB_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_xive_source_esb_write(uint64_t addr, uint32_t srcno, uint64_t value) {
+ (void)addr;
+ (void)srcno;
+ (void)value;
+}
+#define TRACE_XIVE_SOURCE_NOTIFY 0
+#define TRACE_XIVE_SOURCE_NOTIFY_ENABLED 0
+#define TRACE_XIVE_SOURCE_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_xive_source_notify(uint32_t srcno) {
+ (void)srcno;
+}
+#define TRACE_XIVE_TCTX_ACCEPT 0
+#define TRACE_XIVE_TCTX_ACCEPT_ENABLED 0
+#define TRACE_XIVE_TCTX_ACCEPT_BACKEND_DSTATE() (0)
+static inline void trace_xive_tctx_accept(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) {
+ (void)index;
+ (void)ring;
+ (void)ipb;
+ (void)pipr;
+ (void)cppr;
+ (void)nsr;
+}
+#define TRACE_XIVE_TCTX_NOTIFY 0
+#define TRACE_XIVE_TCTX_NOTIFY_ENABLED 0
+#define TRACE_XIVE_TCTX_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_xive_tctx_notify(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) {
+ (void)index;
+ (void)ring;
+ (void)ipb;
+ (void)pipr;
+ (void)cppr;
+ (void)nsr;
+}
+#define TRACE_XIVE_TCTX_SET_CPPR 0
+#define TRACE_XIVE_TCTX_SET_CPPR_ENABLED 0
+#define TRACE_XIVE_TCTX_SET_CPPR_BACKEND_DSTATE() (0)
+static inline void trace_xive_tctx_set_cppr(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) {
+ (void)index;
+ (void)ring;
+ (void)ipb;
+ (void)pipr;
+ (void)cppr;
+ (void)nsr;
+}
+#define TRACE_XIVE_TCTX_TM_READ 0
+#define TRACE_XIVE_TCTX_TM_READ_ENABLED 0
+#define TRACE_XIVE_TCTX_TM_READ_BACKEND_DSTATE() (0)
+static inline void trace_xive_tctx_tm_read(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) {
+ (void)index;
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_XIVE_TCTX_TM_WRITE 0
+#define TRACE_XIVE_TCTX_TM_WRITE_ENABLED 0
+#define TRACE_XIVE_TCTX_TM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_xive_tctx_tm_write(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) {
+ (void)index;
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_isa.h b/trace/trace-hw_isa.h
new file mode 100644
index 0000000000..cf918aaa0a
--- /dev/null
+++ b/trace/trace-hw_isa.h
@@ -0,0 +1,143 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_ISA_H
+#define TRACE_TRACE_HW_ISA_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_APM_IO_READ 0
+#define TRACE_APM_IO_READ_ENABLED 0
+#define TRACE_APM_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_apm_io_read(uint8_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_APM_IO_WRITE 0
+#define TRACE_APM_IO_WRITE_ENABLED 0
+#define TRACE_APM_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_apm_io_write(uint8_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ICH9_CC_READ 0
+#define TRACE_ICH9_CC_READ_ENABLED 0
+#define TRACE_ICH9_CC_READ_BACKEND_DSTATE() (0)
+static inline void trace_ich9_cc_read(uint64_t addr, uint64_t val, unsigned len) {
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_ICH9_CC_WRITE 0
+#define TRACE_ICH9_CC_WRITE_ENABLED 0
+#define TRACE_ICH9_CC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ich9_cc_write(uint64_t addr, uint64_t val, unsigned len) {
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_PC87312_IO_READ 0
+#define TRACE_PC87312_IO_READ_ENABLED 0
+#define TRACE_PC87312_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_pc87312_io_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PC87312_IO_WRITE 0
+#define TRACE_PC87312_IO_WRITE_ENABLED 0
+#define TRACE_PC87312_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pc87312_io_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUPERIO_CREATE_FLOPPY 0
+#define TRACE_SUPERIO_CREATE_FLOPPY_ENABLED 0
+#define TRACE_SUPERIO_CREATE_FLOPPY_BACKEND_DSTATE() (0)
+static inline void trace_superio_create_floppy(int id, uint16_t base, unsigned int irq) {
+ (void)id;
+ (void)base;
+ (void)irq;
+}
+#define TRACE_SUPERIO_CREATE_IDE 0
+#define TRACE_SUPERIO_CREATE_IDE_ENABLED 0
+#define TRACE_SUPERIO_CREATE_IDE_BACKEND_DSTATE() (0)
+static inline void trace_superio_create_ide(int id, uint16_t base, unsigned int irq) {
+ (void)id;
+ (void)base;
+ (void)irq;
+}
+#define TRACE_SUPERIO_CREATE_PARALLEL 0
+#define TRACE_SUPERIO_CREATE_PARALLEL_ENABLED 0
+#define TRACE_SUPERIO_CREATE_PARALLEL_BACKEND_DSTATE() (0)
+static inline void trace_superio_create_parallel(int id, uint16_t base, unsigned int irq) {
+ (void)id;
+ (void)base;
+ (void)irq;
+}
+#define TRACE_SUPERIO_CREATE_SERIAL 0
+#define TRACE_SUPERIO_CREATE_SERIAL_ENABLED 0
+#define TRACE_SUPERIO_CREATE_SERIAL_BACKEND_DSTATE() (0)
+static inline void trace_superio_create_serial(int id, uint16_t base, unsigned int irq) {
+ (void)id;
+ (void)base;
+ (void)irq;
+}
+#define TRACE_VIA_ISA_WRITE 0
+#define TRACE_VIA_ISA_WRITE_ENABLED 0
+#define TRACE_VIA_ISA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via_isa_write(uint32_t addr, uint32_t val, int len) {
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_VIA_PM_IO_READ 0
+#define TRACE_VIA_PM_IO_READ_ENABLED 0
+#define TRACE_VIA_PM_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_via_pm_io_read(uint32_t addr, uint32_t val, int len) {
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_VIA_PM_IO_WRITE 0
+#define TRACE_VIA_PM_IO_WRITE_ENABLED 0
+#define TRACE_VIA_PM_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via_pm_io_write(uint32_t addr, uint32_t val, int len) {
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_VIA_PM_READ 0
+#define TRACE_VIA_PM_READ_ENABLED 0
+#define TRACE_VIA_PM_READ_BACKEND_DSTATE() (0)
+static inline void trace_via_pm_read(uint32_t addr, uint32_t val, int len) {
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_VIA_PM_WRITE 0
+#define TRACE_VIA_PM_WRITE_ENABLED 0
+#define TRACE_VIA_PM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via_pm_write(uint32_t addr, uint32_t val, int len) {
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_VIA_SUPERIO_READ 0
+#define TRACE_VIA_SUPERIO_READ_ENABLED 0
+#define TRACE_VIA_SUPERIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_via_superio_read(uint8_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_VIA_SUPERIO_WRITE 0
+#define TRACE_VIA_SUPERIO_WRITE_ENABLED 0
+#define TRACE_VIA_SUPERIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via_superio_write(uint8_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_mem.h b/trace/trace-hw_mem.h
new file mode 100644
index 0000000000..9bb7eb77a8
--- /dev/null
+++ b/trace/trace-hw_mem.h
@@ -0,0 +1,40 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_MEM_H
+#define TRACE_TRACE_HW_MEM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MEMORY_DEVICE_PLUG 0
+#define TRACE_MEMORY_DEVICE_PLUG_ENABLED 0
+#define TRACE_MEMORY_DEVICE_PLUG_BACKEND_DSTATE() (0)
+static inline void trace_memory_device_plug(const char *id, uint64_t addr) {
+ (void)id;
+ (void)addr;
+}
+#define TRACE_MEMORY_DEVICE_PRE_PLUG 0
+#define TRACE_MEMORY_DEVICE_PRE_PLUG_ENABLED 0
+#define TRACE_MEMORY_DEVICE_PRE_PLUG_BACKEND_DSTATE() (0)
+static inline void trace_memory_device_pre_plug(const char *id, uint64_t addr) {
+ (void)id;
+ (void)addr;
+}
+#define TRACE_MEMORY_DEVICE_UNPLUG 0
+#define TRACE_MEMORY_DEVICE_UNPLUG_ENABLED 0
+#define TRACE_MEMORY_DEVICE_UNPLUG_BACKEND_DSTATE() (0)
+static inline void trace_memory_device_unplug(const char *id, uint64_t addr) {
+ (void)id;
+ (void)addr;
+}
+#define TRACE_MHP_PC_DIMM_ASSIGNED_SLOT 0
+#define TRACE_MHP_PC_DIMM_ASSIGNED_SLOT_ENABLED 0
+#define TRACE_MHP_PC_DIMM_ASSIGNED_SLOT_BACKEND_DSTATE() (0)
+static inline void trace_mhp_pc_dimm_assigned_slot(int slot) {
+ (void)slot;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_mips.h b/trace/trace-hw_mips.h
new file mode 100644
index 0000000000..60b2f8d5fe
--- /dev/null
+++ b/trace/trace-hw_mips.h
@@ -0,0 +1,25 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_MIPS_H
+#define TRACE_TRACE_HW_MIPS_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MALTA_FPGA_DISPLAY 0
+#define TRACE_MALTA_FPGA_DISPLAY_ENABLED 0
+#define TRACE_MALTA_FPGA_DISPLAY_BACKEND_DSTATE() (0)
+static inline void trace_malta_fpga_display(const char *text) {
+ (void)text;
+}
+#define TRACE_MALTA_FPGA_LEDS 0
+#define TRACE_MALTA_FPGA_LEDS_ENABLED 0
+#define TRACE_MALTA_FPGA_LEDS_BACKEND_DSTATE() (0)
+static inline void trace_malta_fpga_leds(const char *text) {
+ (void)text;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_misc.h b/trace/trace-hw_misc.h
new file mode 100644
index 0000000000..0a84abfef1
--- /dev/null
+++ b/trace/trace-hw_misc.h
@@ -0,0 +1,2062 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_MISC_H
+#define TRACE_TRACE_HW_MISC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALLWINNER_CPUCFG_CPU_RESET 0
+#define TRACE_ALLWINNER_CPUCFG_CPU_RESET_ENABLED 0
+#define TRACE_ALLWINNER_CPUCFG_CPU_RESET_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) {
+ (void)cpu_id;
+ (void)reset_addr;
+}
+#define TRACE_ALLWINNER_CPUCFG_READ 0
+#define TRACE_ALLWINNER_CPUCFG_READ_ENABLED 0
+#define TRACE_ALLWINNER_CPUCFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_CPUCFG_WRITE 0
+#define TRACE_ALLWINNER_CPUCFG_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_CPUCFG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_H3_DRAMC_ROWMIRROR_DISABLE 0
+#define TRACE_ALLWINNER_H3_DRAMC_ROWMIRROR_DISABLE_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMC_ROWMIRROR_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramc_rowmirror_disable(void) {
+}
+#define TRACE_ALLWINNER_H3_DRAMC_ROWMIRROR_ENABLE 0
+#define TRACE_ALLWINNER_H3_DRAMC_ROWMIRROR_ENABLE_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMC_ROWMIRROR_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramc_rowmirror_enable(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_ALLWINNER_H3_DRAMCOM_READ 0
+#define TRACE_ALLWINNER_H3_DRAMCOM_READ_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMCOM_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_H3_DRAMCOM_WRITE 0
+#define TRACE_ALLWINNER_H3_DRAMCOM_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMCOM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_H3_DRAMCTL_READ 0
+#define TRACE_ALLWINNER_H3_DRAMCTL_READ_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMCTL_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_H3_DRAMCTL_WRITE 0
+#define TRACE_ALLWINNER_H3_DRAMCTL_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMCTL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_H3_DRAMPHY_READ 0
+#define TRACE_ALLWINNER_H3_DRAMPHY_READ_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMPHY_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_H3_DRAMPHY_WRITE 0
+#define TRACE_ALLWINNER_H3_DRAMPHY_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_H3_DRAMPHY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELL_READ 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELL_READ_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELL_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramc_detect_cell_read(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELL_WRITE 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELL_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramc_detect_cell_write(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELLS_DISABLE 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELLS_DISABLE_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELLS_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramc_detect_cells_disable(void) {
+}
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELLS_ENABLE 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELLS_ENABLE_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMC_DETECT_CELLS_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramc_detect_cells_enable(void) {
+}
+#define TRACE_ALLWINNER_R40_DRAMC_MAP_ROWS 0
+#define TRACE_ALLWINNER_R40_DRAMC_MAP_ROWS_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMC_MAP_ROWS_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramc_map_rows(uint8_t row_bits, uint8_t bank_bits, uint8_t col_bits) {
+ (void)row_bits;
+ (void)bank_bits;
+ (void)col_bits;
+}
+#define TRACE_ALLWINNER_R40_DRAMC_OFFSET_TO_CELL 0
+#define TRACE_ALLWINNER_R40_DRAMC_OFFSET_TO_CELL_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMC_OFFSET_TO_CELL_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramc_offset_to_cell(uint64_t offset, int row, int bank, int col) {
+ (void)offset;
+ (void)row;
+ (void)bank;
+ (void)col;
+}
+#define TRACE_ALLWINNER_R40_DRAMCOM_READ 0
+#define TRACE_ALLWINNER_R40_DRAMCOM_READ_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMCOM_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramcom_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_R40_DRAMCOM_WRITE 0
+#define TRACE_ALLWINNER_R40_DRAMCOM_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMCOM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramcom_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_R40_DRAMCTL_READ 0
+#define TRACE_ALLWINNER_R40_DRAMCTL_READ_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMCTL_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramctl_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_R40_DRAMCTL_WRITE 0
+#define TRACE_ALLWINNER_R40_DRAMCTL_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMCTL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramctl_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_R40_DRAMPHY_READ 0
+#define TRACE_ALLWINNER_R40_DRAMPHY_READ_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMPHY_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramphy_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_R40_DRAMPHY_WRITE 0
+#define TRACE_ALLWINNER_R40_DRAMPHY_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_R40_DRAMPHY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_r40_dramphy_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_SID_READ 0
+#define TRACE_ALLWINNER_SID_READ_ENABLED 0
+#define TRACE_ALLWINNER_SID_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_SID_WRITE 0
+#define TRACE_ALLWINNER_SID_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_SID_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_SRAMC_READ 0
+#define TRACE_ALLWINNER_SRAMC_READ_ENABLED 0
+#define TRACE_ALLWINNER_SRAMC_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sramc_read(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ALLWINNER_SRAMC_WRITE 0
+#define TRACE_ALLWINNER_SRAMC_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_SRAMC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sramc_write(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_APC_MEM_READB 0
+#define TRACE_APC_MEM_READB_ENABLED 0
+#define TRACE_APC_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_apc_mem_readb(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_APC_MEM_WRITEB 0
+#define TRACE_APC_MEM_WRITEB_ENABLED 0
+#define TRACE_APC_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_apc_mem_writeb(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ARMSSE_CPU_PWRCTRL_READ 0
+#define TRACE_ARMSSE_CPU_PWRCTRL_READ_ENABLED 0
+#define TRACE_ARMSSE_CPU_PWRCTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_armsse_cpu_pwrctrl_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ARMSSE_CPU_PWRCTRL_WRITE 0
+#define TRACE_ARMSSE_CPU_PWRCTRL_WRITE_ENABLED 0
+#define TRACE_ARMSSE_CPU_PWRCTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_armsse_cpu_pwrctrl_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ARMSSE_CPUID_READ 0
+#define TRACE_ARMSSE_CPUID_READ_ENABLED 0
+#define TRACE_ARMSSE_CPUID_READ_BACKEND_DSTATE() (0)
+static inline void trace_armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ARMSSE_CPUID_WRITE 0
+#define TRACE_ARMSSE_CPUID_WRITE_ENABLED 0
+#define TRACE_ARMSSE_CPUID_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ARMSSE_MHU_READ 0
+#define TRACE_ARMSSE_MHU_READ_ENABLED 0
+#define TRACE_ARMSSE_MHU_READ_BACKEND_DSTATE() (0)
+static inline void trace_armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ARMSSE_MHU_WRITE 0
+#define TRACE_ARMSSE_MHU_WRITE_ENABLED 0
+#define TRACE_ARMSSE_MHU_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ASPEED_AST2700_SCU_READ 0
+#define TRACE_ASPEED_AST2700_SCU_READ_ENABLED 0
+#define TRACE_ASPEED_AST2700_SCU_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_ast2700_scu_read(uint64_t offset, unsigned size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_AST2700_SCU_WRITE 0
+#define TRACE_ASPEED_AST2700_SCU_WRITE_ENABLED 0
+#define TRACE_ASPEED_AST2700_SCU_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_ast2700_scu_write(uint64_t offset, unsigned size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_AST2700_SCUIO_READ 0
+#define TRACE_ASPEED_AST2700_SCUIO_READ_ENABLED 0
+#define TRACE_ASPEED_AST2700_SCUIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_ast2700_scuio_read(uint64_t offset, unsigned size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_AST2700_SCUIO_WRITE 0
+#define TRACE_ASPEED_AST2700_SCUIO_WRITE_ENABLED 0
+#define TRACE_ASPEED_AST2700_SCUIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_ast2700_scuio_write(uint64_t offset, unsigned size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_HACE_HASH_ADDR 0
+#define TRACE_ASPEED_HACE_HASH_ADDR_ENABLED 0
+#define TRACE_ASPEED_HACE_HASH_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_hace_hash_addr(const char *s, uint64_t addr) {
+ (void)s;
+ (void)addr;
+}
+#define TRACE_ASPEED_HACE_HASH_EXECUTE_ACC_MODE 0
+#define TRACE_ASPEED_HACE_HASH_EXECUTE_ACC_MODE_ENABLED 0
+#define TRACE_ASPEED_HACE_HASH_EXECUTE_ACC_MODE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_hace_hash_execute_acc_mode(bool final_request) {
+ (void)final_request;
+}
+#define TRACE_ASPEED_HACE_HASH_SG 0
+#define TRACE_ASPEED_HACE_HASH_SG_ENABLED 0
+#define TRACE_ASPEED_HACE_HASH_SG_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_hace_hash_sg(int index, uint64_t list_addr, uint64_t buf_addr, uint32_t len) {
+ (void)index;
+ (void)list_addr;
+ (void)buf_addr;
+ (void)len;
+}
+#define TRACE_ASPEED_HACE_HEXDUMP 0
+#define TRACE_ASPEED_HACE_HEXDUMP_ENABLED 0
+#define TRACE_ASPEED_HACE_HEXDUMP_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_hace_hexdump(const char *desc, uint32_t offset, char *s) {
+ (void)desc;
+ (void)offset;
+ (void)s;
+}
+#define TRACE_ASPEED_HACE_READ 0
+#define TRACE_ASPEED_HACE_READ_ENABLED 0
+#define TRACE_ASPEED_HACE_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_hace_read(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_HACE_WRITE 0
+#define TRACE_ASPEED_HACE_WRITE_ENABLED 0
+#define TRACE_ASPEED_HACE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_hace_write(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_I3C_DEVICE_READ 0
+#define TRACE_ASPEED_I3C_DEVICE_READ_ENABLED 0
+#define TRACE_ASPEED_I3C_DEVICE_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i3c_device_read(uint32_t deviceid, uint64_t offset, uint64_t data) {
+ (void)deviceid;
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_I3C_DEVICE_WRITE 0
+#define TRACE_ASPEED_I3C_DEVICE_WRITE_ENABLED 0
+#define TRACE_ASPEED_I3C_DEVICE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i3c_device_write(uint32_t deviceid, uint64_t offset, uint64_t data) {
+ (void)deviceid;
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_I3C_READ 0
+#define TRACE_ASPEED_I3C_READ_ENABLED 0
+#define TRACE_ASPEED_I3C_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i3c_read(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_I3C_WRITE 0
+#define TRACE_ASPEED_I3C_WRITE_ENABLED 0
+#define TRACE_ASPEED_I3C_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_i3c_write(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_PECI_RAISE_INTERRUPT 0
+#define TRACE_ASPEED_PECI_RAISE_INTERRUPT_ENABLED 0
+#define TRACE_ASPEED_PECI_RAISE_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_peci_raise_interrupt(uint32_t ctrl, uint32_t status) {
+ (void)ctrl;
+ (void)status;
+}
+#define TRACE_ASPEED_PECI_READ 0
+#define TRACE_ASPEED_PECI_READ_ENABLED 0
+#define TRACE_ASPEED_PECI_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_peci_read(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_PECI_WRITE 0
+#define TRACE_ASPEED_PECI_WRITE_ENABLED 0
+#define TRACE_ASPEED_PECI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_peci_write(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_ASPEED_SBC_HANDLE_CMD 0
+#define TRACE_ASPEED_SBC_HANDLE_CMD_ENABLED 0
+#define TRACE_ASPEED_SBC_HANDLE_CMD_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sbc_handle_cmd(uint32_t cmd, uint32_t addr, bool ret) {
+ (void)cmd;
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_ASPEED_SBC_IGNORE_CMD 0
+#define TRACE_ASPEED_SBC_IGNORE_CMD_ENABLED 0
+#define TRACE_ASPEED_SBC_IGNORE_CMD_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sbc_ignore_cmd(uint32_t cmd) {
+ (void)cmd;
+}
+#define TRACE_ASPEED_SBC_OTP_PROG 0
+#define TRACE_ASPEED_SBC_OTP_PROG_ENABLED 0
+#define TRACE_ASPEED_SBC_OTP_PROG_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sbc_otp_prog(uint32_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_SBC_OTP_READ 0
+#define TRACE_ASPEED_SBC_OTP_READ_ENABLED 0
+#define TRACE_ASPEED_SBC_OTP_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sbc_otp_read(uint32_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_SCU_READ 0
+#define TRACE_ASPEED_SCU_READ_ENABLED 0
+#define TRACE_ASPEED_SCU_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_scu_read(uint64_t offset, unsigned size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_SCU_WRITE 0
+#define TRACE_ASPEED_SCU_WRITE_ENABLED 0
+#define TRACE_ASPEED_SCU_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_SDMC_READ 0
+#define TRACE_ASPEED_SDMC_READ_ENABLED 0
+#define TRACE_ASPEED_SDMC_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sdmc_read(uint64_t reg, uint64_t data) {
+ (void)reg;
+ (void)data;
+}
+#define TRACE_ASPEED_SDMC_WRITE 0
+#define TRACE_ASPEED_SDMC_WRITE_ENABLED 0
+#define TRACE_ASPEED_SDMC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sdmc_write(uint64_t reg, uint64_t data) {
+ (void)reg;
+ (void)data;
+}
+#define TRACE_ASPEED_SLI_READ 0
+#define TRACE_ASPEED_SLI_READ_ENABLED 0
+#define TRACE_ASPEED_SLI_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sli_read(uint64_t offset, unsigned int size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_SLI_WRITE 0
+#define TRACE_ASPEED_SLI_WRITE_ENABLED 0
+#define TRACE_ASPEED_SLI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sli_write(uint64_t offset, unsigned int size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_SLIIO_READ 0
+#define TRACE_ASPEED_SLIIO_READ_ENABLED 0
+#define TRACE_ASPEED_SLIIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sliio_read(uint64_t offset, unsigned int size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_SLIIO_WRITE 0
+#define TRACE_ASPEED_SLIIO_WRITE_ENABLED 0
+#define TRACE_ASPEED_SLIIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sliio_write(uint64_t offset, unsigned int size, uint32_t data) {
+ (void)offset;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_XDMA_WRITE 0
+#define TRACE_ASPEED_XDMA_WRITE_ENABLED 0
+#define TRACE_ASPEED_XDMA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_xdma_write(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_AVR_POWER_READ 0
+#define TRACE_AVR_POWER_READ_ENABLED 0
+#define TRACE_AVR_POWER_READ_BACKEND_DSTATE() (0)
+static inline void trace_avr_power_read(uint8_t value) {
+ (void)value;
+}
+#define TRACE_AVR_POWER_WRITE 0
+#define TRACE_AVR_POWER_WRITE_ENABLED 0
+#define TRACE_AVR_POWER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_avr_power_write(uint8_t value) {
+ (void)value;
+}
+#define TRACE_AXP2XX_RX 0
+#define TRACE_AXP2XX_RX_ENABLED 0
+#define TRACE_AXP2XX_RX_BACKEND_DSTATE() (0)
+static inline void trace_axp2xx_rx(uint8_t reg, uint8_t data) {
+ (void)reg;
+ (void)data;
+}
+#define TRACE_AXP2XX_SELECT 0
+#define TRACE_AXP2XX_SELECT_ENABLED 0
+#define TRACE_AXP2XX_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_axp2xx_select(uint8_t reg) {
+ (void)reg;
+}
+#define TRACE_AXP2XX_TX 0
+#define TRACE_AXP2XX_TX_ENABLED 0
+#define TRACE_AXP2XX_TX_BACKEND_DSTATE() (0)
+static inline void trace_axp2xx_tx(uint8_t reg, uint8_t data) {
+ (void)reg;
+ (void)data;
+}
+#define TRACE_BCM2835_CPRMAN_READ 0
+#define TRACE_BCM2835_CPRMAN_READ_ENABLED 0
+#define TRACE_BCM2835_CPRMAN_READ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_cprman_read(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_BCM2835_CPRMAN_WRITE 0
+#define TRACE_BCM2835_CPRMAN_WRITE_ENABLED 0
+#define TRACE_BCM2835_CPRMAN_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_cprman_write(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_BCM2835_CPRMAN_WRITE_INVALID_MAGIC 0
+#define TRACE_BCM2835_CPRMAN_WRITE_INVALID_MAGIC_ENABLED 0
+#define TRACE_BCM2835_CPRMAN_WRITE_INVALID_MAGIC_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_BCM2835_MBOX_IRQ 0
+#define TRACE_BCM2835_MBOX_IRQ_ENABLED 0
+#define TRACE_BCM2835_MBOX_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_mbox_irq(unsigned level) {
+ (void)level;
+}
+#define TRACE_BCM2835_MBOX_PROPERTY 0
+#define TRACE_BCM2835_MBOX_PROPERTY_ENABLED 0
+#define TRACE_BCM2835_MBOX_PROPERTY_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) {
+ (void)tag;
+ (void)bufsize;
+ (void)resplen;
+}
+#define TRACE_BCM2835_MBOX_READ 0
+#define TRACE_BCM2835_MBOX_READ_ENABLED 0
+#define TRACE_BCM2835_MBOX_READ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) {
+ (void)size;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_BCM2835_MBOX_WRITE 0
+#define TRACE_BCM2835_MBOX_WRITE_ENABLED 0
+#define TRACE_BCM2835_MBOX_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) {
+ (void)size;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_CCM_CLOCK_FREQ 0
+#define TRACE_CCM_CLOCK_FREQ_ENABLED 0
+#define TRACE_CCM_CLOCK_FREQ_BACKEND_DSTATE() (0)
+static inline void trace_ccm_clock_freq(uint32_t clock, uint32_t freq) {
+ (void)clock;
+ (void)freq;
+}
+#define TRACE_CCM_ENTRY 0
+#define TRACE_CCM_ENTRY_ENABLED 0
+#define TRACE_CCM_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_ccm_entry(void) {
+}
+#define TRACE_CCM_FREQ 0
+#define TRACE_CCM_FREQ_ENABLED 0
+#define TRACE_CCM_FREQ_BACKEND_DSTATE() (0)
+static inline void trace_ccm_freq(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_CCM_READ_REG 0
+#define TRACE_CCM_READ_REG_ENABLED 0
+#define TRACE_CCM_READ_REG_BACKEND_DSTATE() (0)
+static inline void trace_ccm_read_reg(const char *reg_name, uint32_t value) {
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_CCM_WRITE_REG 0
+#define TRACE_CCM_WRITE_REG_ENABLED 0
+#define TRACE_CCM_WRITE_REG_BACKEND_DSTATE() (0)
+static inline void trace_ccm_write_reg(const char *reg_name, uint32_t value) {
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_DJMEMC_READ 0
+#define TRACE_DJMEMC_READ_ENABLED 0
+#define TRACE_DJMEMC_READ_BACKEND_DSTATE() (0)
+static inline void trace_djmemc_read(int reg, uint64_t value, unsigned int size) {
+ (void)reg;
+ (void)value;
+ (void)size;
+}
+#define TRACE_DJMEMC_WRITE 0
+#define TRACE_DJMEMC_WRITE_ENABLED 0
+#define TRACE_DJMEMC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_djmemc_write(int reg, uint64_t value, unsigned int size) {
+ (void)reg;
+ (void)value;
+ (void)size;
+}
+#define TRACE_ECC_DIAG_MEM_READB 0
+#define TRACE_ECC_DIAG_MEM_READB_ENABLED 0
+#define TRACE_ECC_DIAG_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_ecc_diag_mem_readb(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_ECC_DIAG_MEM_WRITEB 0
+#define TRACE_ECC_DIAG_MEM_WRITEB_ENABLED 0
+#define TRACE_ECC_DIAG_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_ecc_diag_mem_writeb(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ECC_MEM_READL_DR 0
+#define TRACE_ECC_MEM_READL_DR_ENABLED 0
+#define TRACE_ECC_MEM_READL_DR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_dr(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_ECR0 0
+#define TRACE_ECC_MEM_READL_ECR0_ENABLED 0
+#define TRACE_ECC_MEM_READL_ECR0_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_ecr0(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_ECR1 0
+#define TRACE_ECC_MEM_READL_ECR1_ENABLED 0
+#define TRACE_ECC_MEM_READL_ECR1_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_ecr1(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_MDR 0
+#define TRACE_ECC_MEM_READL_MDR_ENABLED 0
+#define TRACE_ECC_MEM_READL_MDR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_mdr(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_MER 0
+#define TRACE_ECC_MEM_READL_MER_ENABLED 0
+#define TRACE_ECC_MEM_READL_MER_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_mer(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_MFAR0 0
+#define TRACE_ECC_MEM_READL_MFAR0_ENABLED 0
+#define TRACE_ECC_MEM_READL_MFAR0_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_mfar0(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_MFAR1 0
+#define TRACE_ECC_MEM_READL_MFAR1_ENABLED 0
+#define TRACE_ECC_MEM_READL_MFAR1_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_mfar1(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_MFSR 0
+#define TRACE_ECC_MEM_READL_MFSR_ENABLED 0
+#define TRACE_ECC_MEM_READL_MFSR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_mfsr(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_READL_VCR 0
+#define TRACE_ECC_MEM_READL_VCR_ENABLED 0
+#define TRACE_ECC_MEM_READL_VCR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_readl_vcr(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_ECC_MEM_WRITEL_DR 0
+#define TRACE_ECC_MEM_WRITEL_DR_ENABLED 0
+#define TRACE_ECC_MEM_WRITEL_DR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_writel_dr(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ECC_MEM_WRITEL_ECR0 0
+#define TRACE_ECC_MEM_WRITEL_ECR0_ENABLED 0
+#define TRACE_ECC_MEM_WRITEL_ECR0_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_writel_ecr0(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ECC_MEM_WRITEL_ECR1 0
+#define TRACE_ECC_MEM_WRITEL_ECR1_ENABLED 0
+#define TRACE_ECC_MEM_WRITEL_ECR1_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_writel_ecr1(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ECC_MEM_WRITEL_MDR 0
+#define TRACE_ECC_MEM_WRITEL_MDR_ENABLED 0
+#define TRACE_ECC_MEM_WRITEL_MDR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_writel_mdr(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ECC_MEM_WRITEL_MER 0
+#define TRACE_ECC_MEM_WRITEL_MER_ENABLED 0
+#define TRACE_ECC_MEM_WRITEL_MER_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_writel_mer(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ECC_MEM_WRITEL_MFSR 0
+#define TRACE_ECC_MEM_WRITEL_MFSR_ENABLED 0
+#define TRACE_ECC_MEM_WRITEL_MFSR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_writel_mfsr(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ECC_MEM_WRITEL_VCR 0
+#define TRACE_ECC_MEM_WRITEL_VCR_ENABLED 0
+#define TRACE_ECC_MEM_WRITEL_VCR_BACKEND_DSTATE() (0)
+static inline void trace_ecc_mem_writel_vcr(uint32_t val) {
+ (void)val;
+}
+#define TRACE_EMPTY_SLOT_WRITE 0
+#define TRACE_EMPTY_SLOT_WRITE_ENABLED 0
+#define TRACE_EMPTY_SLOT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) {
+ (void)addr;
+ (void)width;
+ (void)value;
+ (void)size;
+ (void)name;
+}
+#define TRACE_GRLIB_AHB_PNP_READ 0
+#define TRACE_GRLIB_AHB_PNP_READ_ENABLED 0
+#define TRACE_GRLIB_AHB_PNP_READ_BACKEND_DSTATE() (0)
+static inline void trace_grlib_ahb_pnp_read(uint64_t addr, unsigned size, uint32_t value) {
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_GRLIB_APB_PNP_READ 0
+#define TRACE_GRLIB_APB_PNP_READ_ENABLED 0
+#define TRACE_GRLIB_APB_PNP_READ_BACKEND_DSTATE() (0)
+static inline void trace_grlib_apb_pnp_read(uint64_t addr, unsigned size, uint32_t value) {
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_I2C_ECHO_EVENT 0
+#define TRACE_I2C_ECHO_EVENT_ENABLED 0
+#define TRACE_I2C_ECHO_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_i2c_echo_event(const char *id, const char *event) {
+ (void)id;
+ (void)event;
+}
+#define TRACE_I2C_ECHO_RECV 0
+#define TRACE_I2C_ECHO_RECV_ENABLED 0
+#define TRACE_I2C_ECHO_RECV_BACKEND_DSTATE() (0)
+static inline void trace_i2c_echo_recv(const char *id, uint8_t data) {
+ (void)id;
+ (void)data;
+}
+#define TRACE_I2C_ECHO_SEND 0
+#define TRACE_I2C_ECHO_SEND_ENABLED 0
+#define TRACE_I2C_ECHO_SEND_BACKEND_DSTATE() (0)
+static inline void trace_i2c_echo_send(const char *id, uint8_t data) {
+ (void)id;
+ (void)data;
+}
+#define TRACE_IMX6_ANALOG_GET_PERIPH_CLK 0
+#define TRACE_IMX6_ANALOG_GET_PERIPH_CLK_ENABLED 0
+#define TRACE_IMX6_ANALOG_GET_PERIPH_CLK_BACKEND_DSTATE() (0)
+static inline void trace_imx6_analog_get_periph_clk(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_IMX6_ANALOG_GET_PLL2_CLK 0
+#define TRACE_IMX6_ANALOG_GET_PLL2_CLK_ENABLED 0
+#define TRACE_IMX6_ANALOG_GET_PLL2_CLK_BACKEND_DSTATE() (0)
+static inline void trace_imx6_analog_get_pll2_clk(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_IMX6_ANALOG_GET_PLL2_PFD0_CLK 0
+#define TRACE_IMX6_ANALOG_GET_PLL2_PFD0_CLK_ENABLED 0
+#define TRACE_IMX6_ANALOG_GET_PLL2_PFD0_CLK_BACKEND_DSTATE() (0)
+static inline void trace_imx6_analog_get_pll2_pfd0_clk(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_IMX6_ANALOG_GET_PLL2_PFD2_CLK 0
+#define TRACE_IMX6_ANALOG_GET_PLL2_PFD2_CLK_ENABLED 0
+#define TRACE_IMX6_ANALOG_GET_PLL2_PFD2_CLK_BACKEND_DSTATE() (0)
+static inline void trace_imx6_analog_get_pll2_pfd2_clk(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_IMX6_ANALOG_READ 0
+#define TRACE_IMX6_ANALOG_READ_ENABLED 0
+#define TRACE_IMX6_ANALOG_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx6_analog_read(const char *reg, uint32_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_IMX6_ANALOG_WRITE 0
+#define TRACE_IMX6_ANALOG_WRITE_ENABLED 0
+#define TRACE_IMX6_ANALOG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx6_analog_write(const char *reg, uint32_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_IMX6_CCM_GET_AHB_CLK 0
+#define TRACE_IMX6_CCM_GET_AHB_CLK_ENABLED 0
+#define TRACE_IMX6_CCM_GET_AHB_CLK_BACKEND_DSTATE() (0)
+static inline void trace_imx6_ccm_get_ahb_clk(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_IMX6_CCM_GET_CLOCK_FREQUENCY 0
+#define TRACE_IMX6_CCM_GET_CLOCK_FREQUENCY_ENABLED 0
+#define TRACE_IMX6_CCM_GET_CLOCK_FREQUENCY_BACKEND_DSTATE() (0)
+static inline void trace_imx6_ccm_get_clock_frequency(unsigned clock, uint32_t freq) {
+ (void)clock;
+ (void)freq;
+}
+#define TRACE_IMX6_CCM_GET_IPG_CLK 0
+#define TRACE_IMX6_CCM_GET_IPG_CLK_ENABLED 0
+#define TRACE_IMX6_CCM_GET_IPG_CLK_BACKEND_DSTATE() (0)
+static inline void trace_imx6_ccm_get_ipg_clk(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_IMX6_CCM_GET_PER_CLK 0
+#define TRACE_IMX6_CCM_GET_PER_CLK_ENABLED 0
+#define TRACE_IMX6_CCM_GET_PER_CLK_BACKEND_DSTATE() (0)
+static inline void trace_imx6_ccm_get_per_clk(uint32_t freq) {
+ (void)freq;
+}
+#define TRACE_IMX6_CCM_READ 0
+#define TRACE_IMX6_CCM_READ_ENABLED 0
+#define TRACE_IMX6_CCM_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx6_ccm_read(const char *reg, uint32_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_IMX6_CCM_RESET 0
+#define TRACE_IMX6_CCM_RESET_ENABLED 0
+#define TRACE_IMX6_CCM_RESET_BACKEND_DSTATE() (0)
+static inline void trace_imx6_ccm_reset(void) {
+}
+#define TRACE_IMX6_CCM_WRITE 0
+#define TRACE_IMX6_CCM_WRITE_ENABLED 0
+#define TRACE_IMX6_CCM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx6_ccm_write(const char *reg, uint32_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_IMX6_CLEAR_RESET_BIT 0
+#define TRACE_IMX6_CLEAR_RESET_BIT_ENABLED 0
+#define TRACE_IMX6_CLEAR_RESET_BIT_BACKEND_DSTATE() (0)
+static inline void trace_imx6_clear_reset_bit(const char *reg_name, uint32_t value) {
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_IMX6_SRC_READ 0
+#define TRACE_IMX6_SRC_READ_ENABLED 0
+#define TRACE_IMX6_SRC_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx6_src_read(const char *reg_name, uint32_t value) {
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_IMX6_SRC_RESET 0
+#define TRACE_IMX6_SRC_RESET_ENABLED 0
+#define TRACE_IMX6_SRC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_imx6_src_reset(void) {
+}
+#define TRACE_IMX6_SRC_WRITE 0
+#define TRACE_IMX6_SRC_WRITE_ENABLED 0
+#define TRACE_IMX6_SRC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx6_src_write(const char *reg_name, uint64_t value) {
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_IMX7_GPR_READ 0
+#define TRACE_IMX7_GPR_READ_ENABLED 0
+#define TRACE_IMX7_GPR_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx7_gpr_read(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_IMX7_GPR_WRITE 0
+#define TRACE_IMX7_GPR_WRITE_ENABLED 0
+#define TRACE_IMX7_GPR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx7_gpr_write(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_IMX7_SNVS_READ 0
+#define TRACE_IMX7_SNVS_READ_ENABLED 0
+#define TRACE_IMX7_SNVS_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx7_snvs_read(uint64_t offset, uint64_t value, unsigned size) {
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_IMX7_SNVS_WRITE 0
+#define TRACE_IMX7_SNVS_WRITE_ENABLED 0
+#define TRACE_IMX7_SNVS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx7_snvs_write(uint64_t offset, uint64_t value, unsigned size) {
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_IMX7_SRC_READ 0
+#define TRACE_IMX7_SRC_READ_ENABLED 0
+#define TRACE_IMX7_SRC_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx7_src_read(const char *reg_name, uint32_t value) {
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_IMX7_SRC_WRITE 0
+#define TRACE_IMX7_SRC_WRITE_ENABLED 0
+#define TRACE_IMX7_SRC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx7_src_write(const char *reg_name, uint32_t value) {
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_IOSB_READ 0
+#define TRACE_IOSB_READ_ENABLED 0
+#define TRACE_IOSB_READ_BACKEND_DSTATE() (0)
+static inline void trace_iosb_read(int reg, uint64_t value, unsigned int size) {
+ (void)reg;
+ (void)value;
+ (void)size;
+}
+#define TRACE_IOSB_WRITE 0
+#define TRACE_IOSB_WRITE_ENABLED 0
+#define TRACE_IOSB_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_iosb_write(int reg, uint64_t value, unsigned int size) {
+ (void)reg;
+ (void)value;
+ (void)size;
+}
+#define TRACE_IOTKIT_SECCTL_NS_READ 0
+#define TRACE_IOTKIT_SECCTL_NS_READ_ENABLED 0
+#define TRACE_IOTKIT_SECCTL_NS_READ_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IOTKIT_SECCTL_NS_WRITE 0
+#define TRACE_IOTKIT_SECCTL_NS_WRITE_ENABLED 0
+#define TRACE_IOTKIT_SECCTL_NS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IOTKIT_SECCTL_S_READ 0
+#define TRACE_IOTKIT_SECCTL_S_READ_ENABLED 0
+#define TRACE_IOTKIT_SECCTL_S_READ_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IOTKIT_SECCTL_S_WRITE 0
+#define TRACE_IOTKIT_SECCTL_S_WRITE_ENABLED 0
+#define TRACE_IOTKIT_SECCTL_S_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IOTKIT_SYSCTL_READ 0
+#define TRACE_IOTKIT_SYSCTL_READ_ENABLED 0
+#define TRACE_IOTKIT_SYSCTL_READ_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IOTKIT_SYSCTL_RESET 0
+#define TRACE_IOTKIT_SYSCTL_RESET_ENABLED 0
+#define TRACE_IOTKIT_SYSCTL_RESET_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_sysctl_reset(void) {
+}
+#define TRACE_IOTKIT_SYSCTL_WRITE 0
+#define TRACE_IOTKIT_SYSCTL_WRITE_ENABLED 0
+#define TRACE_IOTKIT_SYSCTL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IOTKIT_SYSINFO_READ 0
+#define TRACE_IOTKIT_SYSINFO_READ_ENABLED 0
+#define TRACE_IOTKIT_SYSINFO_READ_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IOTKIT_SYSINFO_WRITE 0
+#define TRACE_IOTKIT_SYSINFO_WRITE_ENABLED 0
+#define TRACE_IOTKIT_SYSINFO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IVSHMEM_FLAT_ADD_VECTOR_FAILURE 0
+#define TRACE_IVSHMEM_FLAT_ADD_VECTOR_FAILURE_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_ADD_VECTOR_FAILURE_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_add_vector_failure(uint16_t vector_id, uint32_t vector_fd, uint16_t peer_id) {
+ (void)vector_id;
+ (void)vector_fd;
+ (void)peer_id;
+}
+#define TRACE_IVSHMEM_FLAT_ADD_VECTOR_SUCCESS 0
+#define TRACE_IVSHMEM_FLAT_ADD_VECTOR_SUCCESS_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_ADD_VECTOR_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_add_vector_success(uint16_t vector_id, uint32_t vector_fd, uint16_t peer_id) {
+ (void)vector_id;
+ (void)vector_fd;
+ (void)peer_id;
+}
+#define TRACE_IVSHMEM_FLAT_INTERRUPT_INVALID_PEER 0
+#define TRACE_IVSHMEM_FLAT_INTERRUPT_INVALID_PEER_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_INTERRUPT_INVALID_PEER_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_interrupt_invalid_peer(uint16_t peer_id) {
+ (void)peer_id;
+}
+#define TRACE_IVSHMEM_FLAT_INTERRUPT_PEER 0
+#define TRACE_IVSHMEM_FLAT_INTERRUPT_PEER_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_INTERRUPT_PEER_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_interrupt_peer(uint16_t peer_id, uint16_t vector_id) {
+ (void)peer_id;
+ (void)vector_id;
+}
+#define TRACE_IVSHMEM_FLAT_IRQ_HANDLER 0
+#define TRACE_IVSHMEM_FLAT_IRQ_HANDLER_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_IRQ_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_irq_handler(uint16_t vector_id) {
+ (void)vector_id;
+}
+#define TRACE_IVSHMEM_FLAT_IRQ_RESOLVED 0
+#define TRACE_IVSHMEM_FLAT_IRQ_RESOLVED_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_IRQ_RESOLVED_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_irq_resolved(const char *irq_qompath) {
+ (void)irq_qompath;
+}
+#define TRACE_IVSHMEM_FLAT_MMIO_MAP 0
+#define TRACE_IVSHMEM_FLAT_MMIO_MAP_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_MMIO_MAP_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_mmio_map(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_IVSHMEM_FLAT_NEW_PEER 0
+#define TRACE_IVSHMEM_FLAT_NEW_PEER_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_NEW_PEER_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_new_peer(uint16_t peer_id) {
+ (void)peer_id;
+}
+#define TRACE_IVSHMEM_FLAT_PROTO_VER_OWN_ID 0
+#define TRACE_IVSHMEM_FLAT_PROTO_VER_OWN_ID_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_PROTO_VER_OWN_ID_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_proto_ver_own_id(uint64_t proto_ver, uint16_t peer_id) {
+ (void)proto_ver;
+ (void)peer_id;
+}
+#define TRACE_IVSHMEM_FLAT_READ_MMR 0
+#define TRACE_IVSHMEM_FLAT_READ_MMR_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_READ_MMR_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_read_mmr(uint64_t addr_offset) {
+ (void)addr_offset;
+}
+#define TRACE_IVSHMEM_FLAT_READ_MMR_DOORBELL 0
+#define TRACE_IVSHMEM_FLAT_READ_MMR_DOORBELL_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_READ_MMR_DOORBELL_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_read_mmr_doorbell(void) {
+}
+#define TRACE_IVSHMEM_FLAT_READ_WRITE_MMR_INVALID 0
+#define TRACE_IVSHMEM_FLAT_READ_WRITE_MMR_INVALID_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_READ_WRITE_MMR_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_read_write_mmr_invalid(uint64_t addr_offset) {
+ (void)addr_offset;
+}
+#define TRACE_IVSHMEM_FLAT_SHMEM_MAP 0
+#define TRACE_IVSHMEM_FLAT_SHMEM_MAP_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_SHMEM_MAP_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_shmem_map(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_IVSHMEM_FLAT_SHMEM_SIZE 0
+#define TRACE_IVSHMEM_FLAT_SHMEM_SIZE_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_SHMEM_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_shmem_size(int fd, uint64_t size) {
+ (void)fd;
+ (void)size;
+}
+#define TRACE_IVSHMEM_FLAT_WRITE_MMR 0
+#define TRACE_IVSHMEM_FLAT_WRITE_MMR_ENABLED 0
+#define TRACE_IVSHMEM_FLAT_WRITE_MMR_BACKEND_DSTATE() (0)
+static inline void trace_ivshmem_flat_write_mmr(uint64_t addr_offset) {
+ (void)addr_offset;
+}
+#define TRACE_LASI_CHIP_MEM_VALID 0
+#define TRACE_LASI_CHIP_MEM_VALID_ENABLED 0
+#define TRACE_LASI_CHIP_MEM_VALID_BACKEND_DSTATE() (0)
+static inline void trace_lasi_chip_mem_valid(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LASI_CHIP_READ 0
+#define TRACE_LASI_CHIP_READ_ENABLED 0
+#define TRACE_LASI_CHIP_READ_BACKEND_DSTATE() (0)
+static inline void trace_lasi_chip_read(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LASI_CHIP_WRITE 0
+#define TRACE_LASI_CHIP_WRITE_ENABLED 0
+#define TRACE_LASI_CHIP_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_lasi_chip_write(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LED_CHANGE_INTENSITY 0
+#define TRACE_LED_CHANGE_INTENSITY_ENABLED 0
+#define TRACE_LED_CHANGE_INTENSITY_BACKEND_DSTATE() (0)
+static inline void trace_led_change_intensity(const char *color, const char *desc, uint8_t old_intensity_percent, uint8_t new_intensity_percent) {
+ (void)color;
+ (void)desc;
+ (void)old_intensity_percent;
+ (void)new_intensity_percent;
+}
+#define TRACE_LED_SET_INTENSITY 0
+#define TRACE_LED_SET_INTENSITY_ENABLED 0
+#define TRACE_LED_SET_INTENSITY_BACKEND_DSTATE() (0)
+static inline void trace_led_set_intensity(const char *color, const char *desc, uint8_t intensity_percent) {
+ (void)color;
+ (void)desc;
+ (void)intensity_percent;
+}
+#define TRACE_MOS6522_GET_NEXT_IRQ_TIME 0
+#define TRACE_MOS6522_GET_NEXT_IRQ_TIME_ENABLED 0
+#define TRACE_MOS6522_GET_NEXT_IRQ_TIME_BACKEND_DSTATE() (0)
+static inline void trace_mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) {
+ (void)latch;
+ (void)d;
+ (void)delta;
+}
+#define TRACE_MOS6522_READ 0
+#define TRACE_MOS6522_READ_ENABLED 0
+#define TRACE_MOS6522_READ_BACKEND_DSTATE() (0)
+static inline void trace_mos6522_read(uint64_t addr, const char *name, unsigned val) {
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_MOS6522_SET_COUNTER 0
+#define TRACE_MOS6522_SET_COUNTER_ENABLED 0
+#define TRACE_MOS6522_SET_COUNTER_BACKEND_DSTATE() (0)
+static inline void trace_mos6522_set_counter(int index, unsigned int val) {
+ (void)index;
+ (void)val;
+}
+#define TRACE_MOS6522_SET_SR_INT 0
+#define TRACE_MOS6522_SET_SR_INT_ENABLED 0
+#define TRACE_MOS6522_SET_SR_INT_BACKEND_DSTATE() (0)
+static inline void trace_mos6522_set_sr_int(void) {
+}
+#define TRACE_MOS6522_WRITE 0
+#define TRACE_MOS6522_WRITE_ENABLED 0
+#define TRACE_MOS6522_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mos6522_write(uint64_t addr, const char *name, uint64_t val) {
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_MPS2_FPGAIO_READ 0
+#define TRACE_MPS2_FPGAIO_READ_ENABLED 0
+#define TRACE_MPS2_FPGAIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_MPS2_FPGAIO_RESET 0
+#define TRACE_MPS2_FPGAIO_RESET_ENABLED 0
+#define TRACE_MPS2_FPGAIO_RESET_BACKEND_DSTATE() (0)
+static inline void trace_mps2_fpgaio_reset(void) {
+}
+#define TRACE_MPS2_FPGAIO_WRITE 0
+#define TRACE_MPS2_FPGAIO_WRITE_ENABLED 0
+#define TRACE_MPS2_FPGAIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_MPS2_SCC_CFG_READ 0
+#define TRACE_MPS2_SCC_CFG_READ_ENABLED 0
+#define TRACE_MPS2_SCC_CFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) {
+ (void)function;
+ (void)device;
+ (void)value;
+}
+#define TRACE_MPS2_SCC_CFG_WRITE 0
+#define TRACE_MPS2_SCC_CFG_WRITE_ENABLED 0
+#define TRACE_MPS2_SCC_CFG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) {
+ (void)function;
+ (void)device;
+ (void)value;
+}
+#define TRACE_MPS2_SCC_READ 0
+#define TRACE_MPS2_SCC_READ_ENABLED 0
+#define TRACE_MPS2_SCC_READ_BACKEND_DSTATE() (0)
+static inline void trace_mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_MPS2_SCC_RESET 0
+#define TRACE_MPS2_SCC_RESET_ENABLED 0
+#define TRACE_MPS2_SCC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_mps2_scc_reset(void) {
+}
+#define TRACE_MPS2_SCC_WRITE 0
+#define TRACE_MPS2_SCC_WRITE_ENABLED 0
+#define TRACE_MPS2_SCC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_MSF2_SYSREG_READ 0
+#define TRACE_MSF2_SYSREG_READ_ENABLED 0
+#define TRACE_MSF2_SYSREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_msf2_sysreg_read(uint64_t offset, uint32_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_MSF2_SYSREG_WRITE 0
+#define TRACE_MSF2_SYSREG_WRITE_ENABLED 0
+#define TRACE_MSF2_SYSREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) {
+ (void)offset;
+ (void)val;
+ (void)prev;
+}
+#define TRACE_MSF2_SYSREG_WRITE_PLL_STATUS 0
+#define TRACE_MSF2_SYSREG_WRITE_PLL_STATUS_ENABLED 0
+#define TRACE_MSF2_SYSREG_WRITE_PLL_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_msf2_sysreg_write_pll_status(void) {
+}
+#define TRACE_NPCM_CLK_READ 0
+#define TRACE_NPCM_CLK_READ_ENABLED 0
+#define TRACE_NPCM_CLK_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm_clk_read(uint64_t offset, uint32_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM_CLK_WRITE 0
+#define TRACE_NPCM_CLK_WRITE_ENABLED 0
+#define TRACE_NPCM_CLK_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm_clk_write(uint64_t offset, uint32_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM_GCR_READ 0
+#define TRACE_NPCM_GCR_READ_ENABLED 0
+#define TRACE_NPCM_GCR_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gcr_read(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM_GCR_WRITE 0
+#define TRACE_NPCM_GCR_WRITE_ENABLED 0
+#define TRACE_NPCM_GCR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gcr_write(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_MFT_CAPTURE 0
+#define TRACE_NPCM7XX_MFT_CAPTURE_ENABLED 0
+#define TRACE_NPCM7XX_MFT_CAPTURE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_mft_capture(const char *name, int irq_level) {
+ (void)name;
+ (void)irq_level;
+}
+#define TRACE_NPCM7XX_MFT_READ 0
+#define TRACE_NPCM7XX_MFT_READ_ENABLED 0
+#define TRACE_NPCM7XX_MFT_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_mft_read(const char *name, uint64_t offset, uint16_t value) {
+ (void)name;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_MFT_RPM 0
+#define TRACE_NPCM7XX_MFT_RPM_ENABLED 0
+#define TRACE_NPCM7XX_MFT_RPM_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_mft_rpm(const char *clock, uint32_t clock_hz, int state, int32_t cnt, uint32_t rpm, uint32_t duty) {
+ (void)clock;
+ (void)clock_hz;
+ (void)state;
+ (void)cnt;
+ (void)rpm;
+ (void)duty;
+}
+#define TRACE_NPCM7XX_MFT_SET_DUTY 0
+#define TRACE_NPCM7XX_MFT_SET_DUTY_ENABLED 0
+#define TRACE_NPCM7XX_MFT_SET_DUTY_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_mft_set_duty(const char *name, int n, int value) {
+ (void)name;
+ (void)n;
+ (void)value;
+}
+#define TRACE_NPCM7XX_MFT_UPDATE_CLOCK 0
+#define TRACE_NPCM7XX_MFT_UPDATE_CLOCK_ENABLED 0
+#define TRACE_NPCM7XX_MFT_UPDATE_CLOCK_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_mft_update_clock(const char *name, uint16_t sel, uint64_t clock_period, uint64_t prescaled_clock_period) {
+ (void)name;
+ (void)sel;
+ (void)clock_period;
+ (void)prescaled_clock_period;
+}
+#define TRACE_NPCM7XX_MFT_WRITE 0
+#define TRACE_NPCM7XX_MFT_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_MFT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_mft_write(const char *name, uint64_t offset, uint16_t value) {
+ (void)name;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_PWM_READ 0
+#define TRACE_NPCM7XX_PWM_READ_ENABLED 0
+#define TRACE_NPCM7XX_PWM_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_pwm_read(const char *id, uint64_t offset, uint32_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_PWM_UPDATE_DUTY 0
+#define TRACE_NPCM7XX_PWM_UPDATE_DUTY_ENABLED 0
+#define TRACE_NPCM7XX_PWM_UPDATE_DUTY_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_pwm_update_duty(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) {
+ (void)id;
+ (void)index;
+ (void)old_value;
+ (void)new_value;
+}
+#define TRACE_NPCM7XX_PWM_UPDATE_FREQ 0
+#define TRACE_NPCM7XX_PWM_UPDATE_FREQ_ENABLED 0
+#define TRACE_NPCM7XX_PWM_UPDATE_FREQ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_pwm_update_freq(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) {
+ (void)id;
+ (void)index;
+ (void)old_value;
+ (void)new_value;
+}
+#define TRACE_NPCM7XX_PWM_WRITE 0
+#define TRACE_NPCM7XX_PWM_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_PWM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_pwm_write(const char *id, uint64_t offset, uint32_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_RNG_READ 0
+#define TRACE_NPCM7XX_RNG_READ_ENABLED 0
+#define TRACE_NPCM7XX_RNG_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_rng_read(uint64_t offset, uint64_t value, unsigned size) {
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_NPCM7XX_RNG_WRITE 0
+#define TRACE_NPCM7XX_RNG_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_RNG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_rng_write(uint64_t offset, uint64_t value, unsigned size) {
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_SLAVIO_AUX1_MEM_READB 0
+#define TRACE_SLAVIO_AUX1_MEM_READB_ENABLED 0
+#define TRACE_SLAVIO_AUX1_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_aux1_mem_readb(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_SLAVIO_AUX1_MEM_WRITEB 0
+#define TRACE_SLAVIO_AUX1_MEM_WRITEB_ENABLED 0
+#define TRACE_SLAVIO_AUX1_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_aux1_mem_writeb(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SLAVIO_AUX2_MEM_READB 0
+#define TRACE_SLAVIO_AUX2_MEM_READB_ENABLED 0
+#define TRACE_SLAVIO_AUX2_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_aux2_mem_readb(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_SLAVIO_AUX2_MEM_WRITEB 0
+#define TRACE_SLAVIO_AUX2_MEM_WRITEB_ENABLED 0
+#define TRACE_SLAVIO_AUX2_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_aux2_mem_writeb(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SLAVIO_CFG_MEM_READB 0
+#define TRACE_SLAVIO_CFG_MEM_READB_ENABLED 0
+#define TRACE_SLAVIO_CFG_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_cfg_mem_readb(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_SLAVIO_CFG_MEM_WRITEB 0
+#define TRACE_SLAVIO_CFG_MEM_WRITEB_ENABLED 0
+#define TRACE_SLAVIO_CFG_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_cfg_mem_writeb(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SLAVIO_DIAG_MEM_READB 0
+#define TRACE_SLAVIO_DIAG_MEM_READB_ENABLED 0
+#define TRACE_SLAVIO_DIAG_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_diag_mem_readb(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_SLAVIO_DIAG_MEM_WRITEB 0
+#define TRACE_SLAVIO_DIAG_MEM_WRITEB_ENABLED 0
+#define TRACE_SLAVIO_DIAG_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_diag_mem_writeb(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SLAVIO_LED_MEM_READW 0
+#define TRACE_SLAVIO_LED_MEM_READW_ENABLED 0
+#define TRACE_SLAVIO_LED_MEM_READW_BACKEND_DSTATE() (0)
+static inline void trace_slavio_led_mem_readw(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_SLAVIO_LED_MEM_WRITEW 0
+#define TRACE_SLAVIO_LED_MEM_WRITEW_ENABLED 0
+#define TRACE_SLAVIO_LED_MEM_WRITEW_BACKEND_DSTATE() (0)
+static inline void trace_slavio_led_mem_writew(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SLAVIO_MDM_MEM_READB 0
+#define TRACE_SLAVIO_MDM_MEM_READB_ENABLED 0
+#define TRACE_SLAVIO_MDM_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_mdm_mem_readb(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_SLAVIO_MDM_MEM_WRITEB 0
+#define TRACE_SLAVIO_MDM_MEM_WRITEB_ENABLED 0
+#define TRACE_SLAVIO_MDM_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_slavio_mdm_mem_writeb(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SLAVIO_MISC_UPDATE_IRQ_LOWER 0
+#define TRACE_SLAVIO_MISC_UPDATE_IRQ_LOWER_ENABLED 0
+#define TRACE_SLAVIO_MISC_UPDATE_IRQ_LOWER_BACKEND_DSTATE() (0)
+static inline void trace_slavio_misc_update_irq_lower(void) {
+}
+#define TRACE_SLAVIO_MISC_UPDATE_IRQ_RAISE 0
+#define TRACE_SLAVIO_MISC_UPDATE_IRQ_RAISE_ENABLED 0
+#define TRACE_SLAVIO_MISC_UPDATE_IRQ_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_slavio_misc_update_irq_raise(void) {
+}
+#define TRACE_SLAVIO_SET_POWER_FAIL 0
+#define TRACE_SLAVIO_SET_POWER_FAIL_ENABLED 0
+#define TRACE_SLAVIO_SET_POWER_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_set_power_fail(int power_failing, uint8_t config) {
+ (void)power_failing;
+ (void)config;
+}
+#define TRACE_SLAVIO_SYSCTRL_MEM_READL 0
+#define TRACE_SLAVIO_SYSCTRL_MEM_READL_ENABLED 0
+#define TRACE_SLAVIO_SYSCTRL_MEM_READL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_sysctrl_mem_readl(uint32_t ret) {
+ (void)ret;
+}
+#define TRACE_SLAVIO_SYSCTRL_MEM_WRITEL 0
+#define TRACE_SLAVIO_SYSCTRL_MEM_WRITEL_ENABLED 0
+#define TRACE_SLAVIO_SYSCTRL_MEM_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_sysctrl_mem_writel(uint32_t val) {
+ (void)val;
+}
+#define TRACE_STM32_RCC_PULSE_ENABLE 0
+#define TRACE_STM32_RCC_PULSE_ENABLE_ENABLED 0
+#define TRACE_STM32_RCC_PULSE_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_stm32_rcc_pulse_enable(int line, int level) {
+ (void)line;
+ (void)level;
+}
+#define TRACE_STM32_RCC_PULSE_RESET 0
+#define TRACE_STM32_RCC_PULSE_RESET_ENABLED 0
+#define TRACE_STM32_RCC_PULSE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_stm32_rcc_pulse_reset(int line, int level) {
+ (void)line;
+ (void)level;
+}
+#define TRACE_STM32_RCC_READ 0
+#define TRACE_STM32_RCC_READ_ENABLED 0
+#define TRACE_STM32_RCC_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32_rcc_read(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32_RCC_WRITE 0
+#define TRACE_STM32_RCC_WRITE_ENABLED 0
+#define TRACE_STM32_RCC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32_rcc_write(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32F4XX_EXTI_READ 0
+#define TRACE_STM32F4XX_EXTI_READ_ENABLED 0
+#define TRACE_STM32F4XX_EXTI_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32f4xx_exti_read(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_STM32F4XX_EXTI_SET_IRQ 0
+#define TRACE_STM32F4XX_EXTI_SET_IRQ_ENABLED 0
+#define TRACE_STM32F4XX_EXTI_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_stm32f4xx_exti_set_irq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_STM32F4XX_EXTI_WRITE 0
+#define TRACE_STM32F4XX_EXTI_WRITE_ENABLED 0
+#define TRACE_STM32F4XX_EXTI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32f4xx_exti_write(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32F4XX_PULSE_EXTI 0
+#define TRACE_STM32F4XX_PULSE_EXTI_ENABLED 0
+#define TRACE_STM32F4XX_PULSE_EXTI_BACKEND_DSTATE() (0)
+static inline void trace_stm32f4xx_pulse_exti(int irq) {
+ (void)irq;
+}
+#define TRACE_STM32F4XX_SYSCFG_READ 0
+#define TRACE_STM32F4XX_SYSCFG_READ_ENABLED 0
+#define TRACE_STM32F4XX_SYSCFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32f4xx_syscfg_read(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_STM32F4XX_SYSCFG_SET_IRQ 0
+#define TRACE_STM32F4XX_SYSCFG_SET_IRQ_ENABLED 0
+#define TRACE_STM32F4XX_SYSCFG_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_stm32f4xx_syscfg_set_irq(int gpio, int line, int level) {
+ (void)gpio;
+ (void)line;
+ (void)level;
+}
+#define TRACE_STM32F4XX_SYSCFG_WRITE 0
+#define TRACE_STM32F4XX_SYSCFG_WRITE_ENABLED 0
+#define TRACE_STM32F4XX_SYSCFG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32L4X5_EXTI_READ 0
+#define TRACE_STM32L4X5_EXTI_READ_ENABLED 0
+#define TRACE_STM32L4X5_EXTI_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_exti_read(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32L4X5_EXTI_SET_IRQ 0
+#define TRACE_STM32L4X5_EXTI_SET_IRQ_ENABLED 0
+#define TRACE_STM32L4X5_EXTI_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_exti_set_irq(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+#define TRACE_STM32L4X5_EXTI_WRITE 0
+#define TRACE_STM32L4X5_EXTI_WRITE_ENABLED 0
+#define TRACE_STM32L4X5_EXTI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_exti_write(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32L4X5_RCC_MUX_DISABLE 0
+#define TRACE_STM32L4X5_RCC_MUX_DISABLE_ENABLED 0
+#define TRACE_STM32L4X5_RCC_MUX_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_mux_disable(uint32_t mux_id) {
+ (void)mux_id;
+}
+#define TRACE_STM32L4X5_RCC_MUX_ENABLE 0
+#define TRACE_STM32L4X5_RCC_MUX_ENABLE_ENABLED 0
+#define TRACE_STM32L4X5_RCC_MUX_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_mux_enable(uint32_t mux_id) {
+ (void)mux_id;
+}
+#define TRACE_STM32L4X5_RCC_MUX_SET_FACTOR 0
+#define TRACE_STM32L4X5_RCC_MUX_SET_FACTOR_ENABLED 0
+#define TRACE_STM32L4X5_RCC_MUX_SET_FACTOR_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_mux_set_factor(uint32_t mux_id, uint32_t old_multiplier, uint32_t new_multiplier, uint32_t old_divider, uint32_t new_divider) {
+ (void)mux_id;
+ (void)old_multiplier;
+ (void)new_multiplier;
+ (void)old_divider;
+ (void)new_divider;
+}
+#define TRACE_STM32L4X5_RCC_MUX_SET_SRC 0
+#define TRACE_STM32L4X5_RCC_MUX_SET_SRC_ENABLED 0
+#define TRACE_STM32L4X5_RCC_MUX_SET_SRC_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_mux_set_src(uint32_t mux_id, uint32_t old_src, uint32_t new_src) {
+ (void)mux_id;
+ (void)old_src;
+ (void)new_src;
+}
+#define TRACE_STM32L4X5_RCC_MUX_UPDATE 0
+#define TRACE_STM32L4X5_RCC_MUX_UPDATE_ENABLED 0
+#define TRACE_STM32L4X5_RCC_MUX_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_mux_update(uint32_t mux_id, uint32_t src, uint64_t src_freq, uint32_t multiplier, uint32_t divider) {
+ (void)mux_id;
+ (void)src;
+ (void)src_freq;
+ (void)multiplier;
+ (void)divider;
+}
+#define TRACE_STM32L4X5_RCC_PLL_CHANNEL_DISABLE 0
+#define TRACE_STM32L4X5_RCC_PLL_CHANNEL_DISABLE_ENABLED 0
+#define TRACE_STM32L4X5_RCC_PLL_CHANNEL_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_pll_channel_disable(uint32_t pll_id, uint32_t channel_id) {
+ (void)pll_id;
+ (void)channel_id;
+}
+#define TRACE_STM32L4X5_RCC_PLL_CHANNEL_ENABLE 0
+#define TRACE_STM32L4X5_RCC_PLL_CHANNEL_ENABLE_ENABLED 0
+#define TRACE_STM32L4X5_RCC_PLL_CHANNEL_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_pll_channel_enable(uint32_t pll_id, uint32_t channel_id) {
+ (void)pll_id;
+ (void)channel_id;
+}
+#define TRACE_STM32L4X5_RCC_PLL_SET_CHANNEL_DIVIDER 0
+#define TRACE_STM32L4X5_RCC_PLL_SET_CHANNEL_DIVIDER_ENABLED 0
+#define TRACE_STM32L4X5_RCC_PLL_SET_CHANNEL_DIVIDER_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_pll_set_channel_divider(uint32_t pll_id, uint32_t channel_id, uint32_t old_divider, uint32_t new_divider) {
+ (void)pll_id;
+ (void)channel_id;
+ (void)old_divider;
+ (void)new_divider;
+}
+#define TRACE_STM32L4X5_RCC_PLL_SET_VCO_MULTIPLIER 0
+#define TRACE_STM32L4X5_RCC_PLL_SET_VCO_MULTIPLIER_ENABLED 0
+#define TRACE_STM32L4X5_RCC_PLL_SET_VCO_MULTIPLIER_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_pll_set_vco_multiplier(uint32_t pll_id, uint32_t old_multiplier, uint32_t new_multiplier) {
+ (void)pll_id;
+ (void)old_multiplier;
+ (void)new_multiplier;
+}
+#define TRACE_STM32L4X5_RCC_PLL_UPDATE 0
+#define TRACE_STM32L4X5_RCC_PLL_UPDATE_ENABLED 0
+#define TRACE_STM32L4X5_RCC_PLL_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_pll_update(uint32_t pll_id, uint32_t channel_id, uint64_t vco_freq, uint64_t old_freq, uint64_t new_freq) {
+ (void)pll_id;
+ (void)channel_id;
+ (void)vco_freq;
+ (void)old_freq;
+ (void)new_freq;
+}
+#define TRACE_STM32L4X5_RCC_READ 0
+#define TRACE_STM32L4X5_RCC_READ_ENABLED 0
+#define TRACE_STM32L4X5_RCC_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_read(uint64_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32L4X5_RCC_WRITE 0
+#define TRACE_STM32L4X5_RCC_WRITE_ENABLED 0
+#define TRACE_STM32L4X5_RCC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_rcc_write(uint64_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_STM32L4X5_SYSCFG_FORWARD_EXTI 0
+#define TRACE_STM32L4X5_SYSCFG_FORWARD_EXTI_ENABLED 0
+#define TRACE_STM32L4X5_SYSCFG_FORWARD_EXTI_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_syscfg_forward_exti(int irq) {
+ (void)irq;
+}
+#define TRACE_STM32L4X5_SYSCFG_READ 0
+#define TRACE_STM32L4X5_SYSCFG_READ_ENABLED 0
+#define TRACE_STM32L4X5_SYSCFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_syscfg_read(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_STM32L4X5_SYSCFG_SET_IRQ 0
+#define TRACE_STM32L4X5_SYSCFG_SET_IRQ_ENABLED 0
+#define TRACE_STM32L4X5_SYSCFG_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_syscfg_set_irq(int gpio, int line, int level) {
+ (void)gpio;
+ (void)line;
+ (void)level;
+}
+#define TRACE_STM32L4X5_SYSCFG_WRITE 0
+#define TRACE_STM32L4X5_SYSCFG_WRITE_ENABLED 0
+#define TRACE_STM32L4X5_SYSCFG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_stm32l4x5_syscfg_write(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_TZ_MPC_IOMMU_NOTIFY 0
+#define TRACE_TZ_MPC_IOMMU_NOTIFY_ENABLED 0
+#define TRACE_TZ_MPC_IOMMU_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_tz_mpc_iommu_notify(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_TZ_MPC_MEM_BLOCKED_READ 0
+#define TRACE_TZ_MPC_MEM_BLOCKED_READ_ENABLED 0
+#define TRACE_TZ_MPC_MEM_BLOCKED_READ_BACKEND_DSTATE() (0)
+static inline void trace_tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) {
+ (void)addr;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_TZ_MPC_MEM_BLOCKED_WRITE 0
+#define TRACE_TZ_MPC_MEM_BLOCKED_WRITE_ENABLED 0
+#define TRACE_TZ_MPC_MEM_BLOCKED_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) {
+ (void)addr;
+ (void)data;
+ (void)size;
+ (void)secure;
+}
+#define TRACE_TZ_MPC_REG_READ 0
+#define TRACE_TZ_MPC_REG_READ_ENABLED 0
+#define TRACE_TZ_MPC_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_TZ_MPC_REG_WRITE 0
+#define TRACE_TZ_MPC_REG_WRITE_ENABLED 0
+#define TRACE_TZ_MPC_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_TZ_MPC_TRANSLATE 0
+#define TRACE_TZ_MPC_TRANSLATE_ENABLED 0
+#define TRACE_TZ_MPC_TRANSLATE_BACKEND_DSTATE() (0)
+static inline void trace_tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) {
+ (void)addr;
+ (void)flags;
+ (void)idx;
+ (void)res;
+}
+#define TRACE_TZ_MSC_ACCESS_BLOCKED 0
+#define TRACE_TZ_MSC_ACCESS_BLOCKED_ENABLED 0
+#define TRACE_TZ_MSC_ACCESS_BLOCKED_BACKEND_DSTATE() (0)
+static inline void trace_tz_msc_access_blocked(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_TZ_MSC_CFG_NONSEC 0
+#define TRACE_TZ_MSC_CFG_NONSEC_ENABLED 0
+#define TRACE_TZ_MSC_CFG_NONSEC_BACKEND_DSTATE() (0)
+static inline void trace_tz_msc_cfg_nonsec(int level) {
+ (void)level;
+}
+#define TRACE_TZ_MSC_CFG_SEC_RESP 0
+#define TRACE_TZ_MSC_CFG_SEC_RESP_ENABLED 0
+#define TRACE_TZ_MSC_CFG_SEC_RESP_BACKEND_DSTATE() (0)
+static inline void trace_tz_msc_cfg_sec_resp(int level) {
+ (void)level;
+}
+#define TRACE_TZ_MSC_IRQ_CLEAR 0
+#define TRACE_TZ_MSC_IRQ_CLEAR_ENABLED 0
+#define TRACE_TZ_MSC_IRQ_CLEAR_BACKEND_DSTATE() (0)
+static inline void trace_tz_msc_irq_clear(int level) {
+ (void)level;
+}
+#define TRACE_TZ_MSC_RESET 0
+#define TRACE_TZ_MSC_RESET_ENABLED 0
+#define TRACE_TZ_MSC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_tz_msc_reset(void) {
+}
+#define TRACE_TZ_MSC_UPDATE_IRQ 0
+#define TRACE_TZ_MSC_UPDATE_IRQ_ENABLED 0
+#define TRACE_TZ_MSC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_tz_msc_update_irq(int level) {
+ (void)level;
+}
+#define TRACE_TZ_PPC_CFG_AP 0
+#define TRACE_TZ_PPC_CFG_AP_ENABLED 0
+#define TRACE_TZ_PPC_CFG_AP_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_cfg_ap(int n, int level) {
+ (void)n;
+ (void)level;
+}
+#define TRACE_TZ_PPC_CFG_NONSEC 0
+#define TRACE_TZ_PPC_CFG_NONSEC_ENABLED 0
+#define TRACE_TZ_PPC_CFG_NONSEC_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_cfg_nonsec(int n, int level) {
+ (void)n;
+ (void)level;
+}
+#define TRACE_TZ_PPC_CFG_SEC_RESP 0
+#define TRACE_TZ_PPC_CFG_SEC_RESP_ENABLED 0
+#define TRACE_TZ_PPC_CFG_SEC_RESP_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_cfg_sec_resp(int level) {
+ (void)level;
+}
+#define TRACE_TZ_PPC_IRQ_CLEAR 0
+#define TRACE_TZ_PPC_IRQ_CLEAR_ENABLED 0
+#define TRACE_TZ_PPC_IRQ_CLEAR_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_irq_clear(int level) {
+ (void)level;
+}
+#define TRACE_TZ_PPC_IRQ_ENABLE 0
+#define TRACE_TZ_PPC_IRQ_ENABLE_ENABLED 0
+#define TRACE_TZ_PPC_IRQ_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_irq_enable(int level) {
+ (void)level;
+}
+#define TRACE_TZ_PPC_READ_BLOCKED 0
+#define TRACE_TZ_PPC_READ_BLOCKED_ENABLED 0
+#define TRACE_TZ_PPC_READ_BLOCKED_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) {
+ (void)n;
+ (void)offset;
+ (void)secure;
+ (void)user;
+}
+#define TRACE_TZ_PPC_RESET 0
+#define TRACE_TZ_PPC_RESET_ENABLED 0
+#define TRACE_TZ_PPC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_reset(void) {
+}
+#define TRACE_TZ_PPC_UPDATE_IRQ 0
+#define TRACE_TZ_PPC_UPDATE_IRQ_ENABLED 0
+#define TRACE_TZ_PPC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_update_irq(int level) {
+ (void)level;
+}
+#define TRACE_TZ_PPC_WRITE_BLOCKED 0
+#define TRACE_TZ_PPC_WRITE_BLOCKED_ENABLED 0
+#define TRACE_TZ_PPC_WRITE_BLOCKED_BACKEND_DSTATE() (0)
+static inline void trace_tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) {
+ (void)n;
+ (void)offset;
+ (void)secure;
+ (void)user;
+}
+#define TRACE_VIA1_ADB_NETBSD_ENUM_HACK 0
+#define TRACE_VIA1_ADB_NETBSD_ENUM_HACK_ENABLED 0
+#define TRACE_VIA1_ADB_NETBSD_ENUM_HACK_BACKEND_DSTATE() (0)
+static inline void trace_via1_adb_netbsd_enum_hack(void) {
+}
+#define TRACE_VIA1_ADB_POLL 0
+#define TRACE_VIA1_ADB_POLL_ENABLED 0
+#define TRACE_VIA1_ADB_POLL_BACKEND_DSTATE() (0)
+static inline void trace_via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) {
+ (void)data;
+ (void)vadbint;
+ (void)status;
+ (void)index;
+ (void)size;
+}
+#define TRACE_VIA1_ADB_RECEIVE 0
+#define TRACE_VIA1_ADB_RECEIVE_ENABLED 0
+#define TRACE_VIA1_ADB_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) {
+ (void)state;
+ (void)data;
+ (void)vadbint;
+ (void)status;
+ (void)index;
+ (void)size;
+}
+#define TRACE_VIA1_ADB_SEND 0
+#define TRACE_VIA1_ADB_SEND_ENABLED 0
+#define TRACE_VIA1_ADB_SEND_BACKEND_DSTATE() (0)
+static inline void trace_via1_adb_send(const char *state, uint8_t data, const char *vadbint) {
+ (void)state;
+ (void)data;
+ (void)vadbint;
+}
+#define TRACE_VIA1_AUXMODE 0
+#define TRACE_VIA1_AUXMODE_ENABLED 0
+#define TRACE_VIA1_AUXMODE_BACKEND_DSTATE() (0)
+static inline void trace_via1_auxmode(int mode) {
+ (void)mode;
+}
+#define TRACE_VIA1_RTC_CMD_INVALID 0
+#define TRACE_VIA1_RTC_CMD_INVALID_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_invalid(int value) {
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_PRAM_READ 0
+#define TRACE_VIA1_RTC_CMD_PRAM_READ_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_PRAM_READ_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_pram_read(int addr, int value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_PRAM_SECT_READ 0
+#define TRACE_VIA1_RTC_CMD_PRAM_SECT_READ_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_PRAM_SECT_READ_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) {
+ (void)sector;
+ (void)offset;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_PRAM_SECT_WRITE 0
+#define TRACE_VIA1_RTC_CMD_PRAM_SECT_WRITE_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_PRAM_SECT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) {
+ (void)sector;
+ (void)offset;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_PRAM_WRITE 0
+#define TRACE_VIA1_RTC_CMD_PRAM_WRITE_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_PRAM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_pram_write(int addr, int value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_SECONDS_READ 0
+#define TRACE_VIA1_RTC_CMD_SECONDS_READ_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_SECONDS_READ_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_seconds_read(int reg, int value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_SECONDS_WRITE 0
+#define TRACE_VIA1_RTC_CMD_SECONDS_WRITE_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_SECONDS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_seconds_write(int reg, int value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_TEST_WRITE 0
+#define TRACE_VIA1_RTC_CMD_TEST_WRITE_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_TEST_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_test_write(int value) {
+ (void)value;
+}
+#define TRACE_VIA1_RTC_CMD_WPROTECT_WRITE 0
+#define TRACE_VIA1_RTC_CMD_WPROTECT_WRITE_ENABLED 0
+#define TRACE_VIA1_RTC_CMD_WPROTECT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_cmd_wprotect_write(int value) {
+ (void)value;
+}
+#define TRACE_VIA1_RTC_INTERNAL_CMD 0
+#define TRACE_VIA1_RTC_INTERNAL_CMD_ENABLED 0
+#define TRACE_VIA1_RTC_INTERNAL_CMD_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_internal_cmd(int cmd) {
+ (void)cmd;
+}
+#define TRACE_VIA1_RTC_INTERNAL_IGNORE_CMD 0
+#define TRACE_VIA1_RTC_INTERNAL_IGNORE_CMD_ENABLED 0
+#define TRACE_VIA1_RTC_INTERNAL_IGNORE_CMD_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_internal_ignore_cmd(int cmd) {
+ (void)cmd;
+}
+#define TRACE_VIA1_RTC_INTERNAL_SET_ALT 0
+#define TRACE_VIA1_RTC_INTERNAL_SET_ALT_ENABLED 0
+#define TRACE_VIA1_RTC_INTERNAL_SET_ALT_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_internal_set_alt(int alt, int sector, int offset) {
+ (void)alt;
+ (void)sector;
+ (void)offset;
+}
+#define TRACE_VIA1_RTC_INTERNAL_SET_CMD 0
+#define TRACE_VIA1_RTC_INTERNAL_SET_CMD_ENABLED 0
+#define TRACE_VIA1_RTC_INTERNAL_SET_CMD_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_internal_set_cmd(int cmd) {
+ (void)cmd;
+}
+#define TRACE_VIA1_RTC_INTERNAL_STATUS 0
+#define TRACE_VIA1_RTC_INTERNAL_STATUS_ENABLED 0
+#define TRACE_VIA1_RTC_INTERNAL_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_internal_status(int cmd, int alt, int value) {
+ (void)cmd;
+ (void)alt;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_INTERNAL_TIME 0
+#define TRACE_VIA1_RTC_INTERNAL_TIME_ENABLED 0
+#define TRACE_VIA1_RTC_INTERNAL_TIME_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_internal_time(uint32_t time) {
+ (void)time;
+}
+#define TRACE_VIA1_RTC_UPDATE_DATA_IN 0
+#define TRACE_VIA1_RTC_UPDATE_DATA_IN_ENABLED 0
+#define TRACE_VIA1_RTC_UPDATE_DATA_IN_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_update_data_in(int count, int value) {
+ (void)count;
+ (void)value;
+}
+#define TRACE_VIA1_RTC_UPDATE_DATA_OUT 0
+#define TRACE_VIA1_RTC_UPDATE_DATA_OUT_ENABLED 0
+#define TRACE_VIA1_RTC_UPDATE_DATA_OUT_BACKEND_DSTATE() (0)
+static inline void trace_via1_rtc_update_data_out(int count, int value) {
+ (void)count;
+ (void)value;
+}
+#define TRACE_VIA1_TIMER_HACK_STATE 0
+#define TRACE_VIA1_TIMER_HACK_STATE_ENABLED 0
+#define TRACE_VIA1_TIMER_HACK_STATE_BACKEND_DSTATE() (0)
+static inline void trace_via1_timer_hack_state(int state) {
+ (void)state;
+}
+#define TRACE_VIRT_CTRL_INSTANCE_INIT 0
+#define TRACE_VIRT_CTRL_INSTANCE_INIT_ENABLED 0
+#define TRACE_VIRT_CTRL_INSTANCE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_virt_ctrl_instance_init(void *dev) {
+ (void)dev;
+}
+#define TRACE_VIRT_CTRL_READ 0
+#define TRACE_VIRT_CTRL_READ_ENABLED 0
+#define TRACE_VIRT_CTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_virt_ctrl_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) {
+ (void)dev;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_VIRT_CTRL_REALIZE 0
+#define TRACE_VIRT_CTRL_REALIZE_ENABLED 0
+#define TRACE_VIRT_CTRL_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_virt_ctrl_realize(void *dev) {
+ (void)dev;
+}
+#define TRACE_VIRT_CTRL_RESET 0
+#define TRACE_VIRT_CTRL_RESET_ENABLED 0
+#define TRACE_VIRT_CTRL_RESET_BACKEND_DSTATE() (0)
+static inline void trace_virt_ctrl_reset(void *dev) {
+ (void)dev;
+}
+#define TRACE_VIRT_CTRL_WRITE 0
+#define TRACE_VIRT_CTRL_WRITE_ENABLED 0
+#define TRACE_VIRT_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_virt_ctrl_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) {
+ (void)dev;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_misc_macio.h b/trace/trace-hw_misc_macio.h
new file mode 100644
index 0000000000..9847566131
--- /dev/null
+++ b/trace/trace-hw_misc_macio.h
@@ -0,0 +1,231 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_MISC_MACIO_H
+#define TRACE_TRACE_HW_MISC_MACIO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CUDA_DATA_RECV 0
+#define TRACE_CUDA_DATA_RECV_ENABLED 0
+#define TRACE_CUDA_DATA_RECV_BACKEND_DSTATE() (0)
+static inline void trace_cuda_data_recv(uint8_t data) {
+ (void)data;
+}
+#define TRACE_CUDA_DATA_SEND 0
+#define TRACE_CUDA_DATA_SEND_ENABLED 0
+#define TRACE_CUDA_DATA_SEND_BACKEND_DSTATE() (0)
+static inline void trace_cuda_data_send(uint8_t data) {
+ (void)data;
+}
+#define TRACE_CUDA_DELAY_SET_SR_INT 0
+#define TRACE_CUDA_DELAY_SET_SR_INT_ENABLED 0
+#define TRACE_CUDA_DELAY_SET_SR_INT_BACKEND_DSTATE() (0)
+static inline void trace_cuda_delay_set_sr_int(void) {
+}
+#define TRACE_CUDA_PACKET_RECEIVE 0
+#define TRACE_CUDA_PACKET_RECEIVE_ENABLED 0
+#define TRACE_CUDA_PACKET_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_cuda_packet_receive(int len) {
+ (void)len;
+}
+#define TRACE_CUDA_PACKET_RECEIVE_DATA 0
+#define TRACE_CUDA_PACKET_RECEIVE_DATA_ENABLED 0
+#define TRACE_CUDA_PACKET_RECEIVE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_cuda_packet_receive_data(int i, const uint8_t data) {
+ (void)i;
+ (void)data;
+}
+#define TRACE_CUDA_PACKET_SEND 0
+#define TRACE_CUDA_PACKET_SEND_ENABLED 0
+#define TRACE_CUDA_PACKET_SEND_BACKEND_DSTATE() (0)
+static inline void trace_cuda_packet_send(int len) {
+ (void)len;
+}
+#define TRACE_CUDA_PACKET_SEND_DATA 0
+#define TRACE_CUDA_PACKET_SEND_DATA_ENABLED 0
+#define TRACE_CUDA_PACKET_SEND_DATA_BACKEND_DSTATE() (0)
+static inline void trace_cuda_packet_send_data(int i, const uint8_t data) {
+ (void)i;
+ (void)data;
+}
+#define TRACE_CUDA_RECEIVE_PACKET_CMD 0
+#define TRACE_CUDA_RECEIVE_PACKET_CMD_ENABLED 0
+#define TRACE_CUDA_RECEIVE_PACKET_CMD_BACKEND_DSTATE() (0)
+static inline void trace_cuda_receive_packet_cmd(const char *cmd) {
+ (void)cmd;
+}
+#define TRACE_MACIO_GPIO_IRQ_ASSERT 0
+#define TRACE_MACIO_GPIO_IRQ_ASSERT_ENABLED 0
+#define TRACE_MACIO_GPIO_IRQ_ASSERT_BACKEND_DSTATE() (0)
+static inline void trace_macio_gpio_irq_assert(int gpio) {
+ (void)gpio;
+}
+#define TRACE_MACIO_GPIO_IRQ_DEASSERT 0
+#define TRACE_MACIO_GPIO_IRQ_DEASSERT_ENABLED 0
+#define TRACE_MACIO_GPIO_IRQ_DEASSERT_BACKEND_DSTATE() (0)
+static inline void trace_macio_gpio_irq_deassert(int gpio) {
+ (void)gpio;
+}
+#define TRACE_MACIO_GPIO_READ 0
+#define TRACE_MACIO_GPIO_READ_ENABLED 0
+#define TRACE_MACIO_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_macio_gpio_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MACIO_GPIO_WRITE 0
+#define TRACE_MACIO_GPIO_WRITE_ENABLED 0
+#define TRACE_MACIO_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_macio_gpio_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MACIO_SET_GPIO 0
+#define TRACE_MACIO_SET_GPIO_ENABLED 0
+#define TRACE_MACIO_SET_GPIO_BACKEND_DSTATE() (0)
+static inline void trace_macio_set_gpio(int gpio, bool state) {
+ (void)gpio;
+ (void)state;
+}
+#define TRACE_MACIO_TIMER_READ 0
+#define TRACE_MACIO_TIMER_READ_ENABLED 0
+#define TRACE_MACIO_TIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_macio_timer_read(uint64_t addr, unsigned len, uint32_t val) {
+ (void)addr;
+ (void)len;
+ (void)val;
+}
+#define TRACE_MACIO_TIMER_WRITE 0
+#define TRACE_MACIO_TIMER_WRITE_ENABLED 0
+#define TRACE_MACIO_TIMER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_macio_timer_write(uint64_t addr, unsigned len, uint64_t val) {
+ (void)addr;
+ (void)len;
+ (void)val;
+}
+#define TRACE_PMU_ADB_POLL 0
+#define TRACE_PMU_ADB_POLL_ENABLED 0
+#define TRACE_PMU_ADB_POLL_BACKEND_DSTATE() (0)
+static inline void trace_pmu_adb_poll(int olen) {
+ (void)olen;
+}
+#define TRACE_PMU_CMD_ADB_NOBUS 0
+#define TRACE_PMU_CMD_ADB_NOBUS_ENABLED 0
+#define TRACE_PMU_CMD_ADB_NOBUS_BACKEND_DSTATE() (0)
+static inline void trace_pmu_cmd_adb_nobus(void) {
+}
+#define TRACE_PMU_CMD_ADB_REPLY 0
+#define TRACE_PMU_CMD_ADB_REPLY_ENABLED 0
+#define TRACE_PMU_CMD_ADB_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_pmu_cmd_adb_reply(int len) {
+ (void)len;
+}
+#define TRACE_PMU_CMD_ADB_REQUEST 0
+#define TRACE_PMU_CMD_ADB_REQUEST_ENABLED 0
+#define TRACE_PMU_CMD_ADB_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_pmu_cmd_adb_request(int inlen, int indata0, int indata1, int indata2, int indata3, int indata4) {
+ (void)inlen;
+ (void)indata0;
+ (void)indata1;
+ (void)indata2;
+ (void)indata3;
+ (void)indata4;
+}
+#define TRACE_PMU_CMD_SET_ADB_AUTOPOLL 0
+#define TRACE_PMU_CMD_SET_ADB_AUTOPOLL_ENABLED 0
+#define TRACE_PMU_CMD_SET_ADB_AUTOPOLL_BACKEND_DSTATE() (0)
+static inline void trace_pmu_cmd_set_adb_autopoll(int mask) {
+ (void)mask;
+}
+#define TRACE_PMU_CMD_SET_INT_MASK 0
+#define TRACE_PMU_CMD_SET_INT_MASK_ENABLED 0
+#define TRACE_PMU_CMD_SET_INT_MASK_BACKEND_DSTATE() (0)
+static inline void trace_pmu_cmd_set_int_mask(int intmask) {
+ (void)intmask;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_CLEAR_TREQ 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CLEAR_TREQ_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CLEAR_TREQ_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_clear_treq(int state) {
+ (void)state;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_cmd(int cmd, int cmdlen, int rsplen) {
+ (void)cmd;
+ (void)cmdlen;
+ (void)rsplen;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_RESP_COMPLETE 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_RESP_COMPLETE_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_RESP_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_cmd_resp_complete(int ier) {
+ (void)ier;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_SEND_RESP 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_SEND_RESP_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_SEND_RESP_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_cmd_send_resp(int pos, int len) {
+ (void)pos;
+ (void)len;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_SEND_RESP_SIZE 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_SEND_RESP_SIZE_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_SEND_RESP_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_cmd_send_resp_size(int len) {
+ (void)len;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_TOOBIG 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_TOOBIG_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMD_TOOBIG_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_cmd_toobig(int len) {
+ (void)len;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_CMDLEN 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMDLEN_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_CMDLEN_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_cmdlen(int len) {
+ (void)len;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_ERROR 0
+#define TRACE_PMU_DEBUG_PROTOCOL_ERROR_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_error(int portB) {
+ (void)portB;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_RESP_SIZE 0
+#define TRACE_PMU_DEBUG_PROTOCOL_RESP_SIZE_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_RESP_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_resp_size(int size) {
+ (void)size;
+}
+#define TRACE_PMU_DEBUG_PROTOCOL_STRING 0
+#define TRACE_PMU_DEBUG_PROTOCOL_STRING_ENABLED 0
+#define TRACE_PMU_DEBUG_PROTOCOL_STRING_BACKEND_DSTATE() (0)
+static inline void trace_pmu_debug_protocol_string(const char *str) {
+ (void)str;
+}
+#define TRACE_PMU_DISPATCH_CMD 0
+#define TRACE_PMU_DISPATCH_CMD_ENABLED 0
+#define TRACE_PMU_DISPATCH_CMD_BACKEND_DSTATE() (0)
+static inline void trace_pmu_dispatch_cmd(const char *name) {
+ (void)name;
+}
+#define TRACE_PMU_DISPATCH_UNKNOWN_CMD 0
+#define TRACE_PMU_DISPATCH_UNKNOWN_CMD_ENABLED 0
+#define TRACE_PMU_DISPATCH_UNKNOWN_CMD_BACKEND_DSTATE() (0)
+static inline void trace_pmu_dispatch_unknown_cmd(int cmd) {
+ (void)cmd;
+}
+#define TRACE_PMU_ONE_SEC_TIMER 0
+#define TRACE_PMU_ONE_SEC_TIMER_ENABLED 0
+#define TRACE_PMU_ONE_SEC_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_pmu_one_sec_timer(void) {
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_net.h b/trace/trace-hw_net.h
new file mode 100644
index 0000000000..778397d7a2
--- /dev/null
+++ b/trace/trace-hw_net.h
@@ -0,0 +1,3021 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_NET_H
+#define TRACE_TRACE_HW_NET_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_mii_read_reg(uint32_t reg, uint32_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_mii_write_reg(uint32_t reg, uint32_t value) {
+ (void)reg;
+ (void)value;
+}
+#define TRACE_ALLWINNER_SUN8I_EMAC_READ 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_READ_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_receive(uint32_t desc, uint32_t paddr, uint32_t bytes) {
+ (void)desc;
+ (void)paddr;
+ (void)bytes;
+}
+#define TRACE_ALLWINNER_SUN8I_EMAC_RESET 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_RESET_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_reset(void) {
+}
+#define TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_set_link(bool active) {
+ (void)active;
+}
+#define TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_transmit(uint32_t desc, uint32_t paddr, uint32_t bytes) {
+ (void)desc;
+ (void)paddr;
+ (void)bytes;
+}
+#define TRACE_ALLWINNER_SUN8I_EMAC_WRITE 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_SUN8I_EMAC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_DP8393X_LOAD_CAM 0
+#define TRACE_DP8393X_LOAD_CAM_ENABLED 0
+#define TRACE_DP8393X_LOAD_CAM_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_load_cam(int idx, int cam0, int cam1, int cam2, int cam3, int cam4, int cam5) {
+ (void)idx;
+ (void)cam0;
+ (void)cam1;
+ (void)cam2;
+ (void)cam3;
+ (void)cam4;
+ (void)cam5;
+}
+#define TRACE_DP8393X_LOAD_CAM_DONE 0
+#define TRACE_DP8393X_LOAD_CAM_DONE_ENABLED 0
+#define TRACE_DP8393X_LOAD_CAM_DONE_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_load_cam_done(int cen) {
+ (void)cen;
+}
+#define TRACE_DP8393X_LOWER_IRQ 0
+#define TRACE_DP8393X_LOWER_IRQ_ENABLED 0
+#define TRACE_DP8393X_LOWER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_lower_irq(void) {
+}
+#define TRACE_DP8393X_RAISE_IRQ 0
+#define TRACE_DP8393X_RAISE_IRQ_ENABLED 0
+#define TRACE_DP8393X_RAISE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_raise_irq(int isr) {
+ (void)isr;
+}
+#define TRACE_DP8393X_READ 0
+#define TRACE_DP8393X_READ_ENABLED 0
+#define TRACE_DP8393X_READ_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_read(int reg, const char *name, int val, int size) {
+ (void)reg;
+ (void)name;
+ (void)val;
+ (void)size;
+}
+#define TRACE_DP8393X_READ_RRA_REGS 0
+#define TRACE_DP8393X_READ_RRA_REGS_ENABLED 0
+#define TRACE_DP8393X_READ_RRA_REGS_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_read_rra_regs(int crba0, int crba1, int rbwc0, int rbwc1) {
+ (void)crba0;
+ (void)crba1;
+ (void)rbwc0;
+ (void)rbwc1;
+}
+#define TRACE_DP8393X_RECEIVE_NOT_NETCARD 0
+#define TRACE_DP8393X_RECEIVE_NOT_NETCARD_ENABLED 0
+#define TRACE_DP8393X_RECEIVE_NOT_NETCARD_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_receive_not_netcard(void) {
+}
+#define TRACE_DP8393X_RECEIVE_OVERSIZE 0
+#define TRACE_DP8393X_RECEIVE_OVERSIZE_ENABLED 0
+#define TRACE_DP8393X_RECEIVE_OVERSIZE_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_receive_oversize(int size) {
+ (void)size;
+}
+#define TRACE_DP8393X_RECEIVE_PACKET 0
+#define TRACE_DP8393X_RECEIVE_PACKET_ENABLED 0
+#define TRACE_DP8393X_RECEIVE_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_receive_packet(int crba) {
+ (void)crba;
+}
+#define TRACE_DP8393X_RECEIVE_WRITE_STATUS 0
+#define TRACE_DP8393X_RECEIVE_WRITE_STATUS_ENABLED 0
+#define TRACE_DP8393X_RECEIVE_WRITE_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_receive_write_status(int crba) {
+ (void)crba;
+}
+#define TRACE_DP8393X_TRANSMIT_PACKET 0
+#define TRACE_DP8393X_TRANSMIT_PACKET_ENABLED 0
+#define TRACE_DP8393X_TRANSMIT_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_transmit_packet(int ttda) {
+ (void)ttda;
+}
+#define TRACE_DP8393X_TRANSMIT_TXLEN_ERROR 0
+#define TRACE_DP8393X_TRANSMIT_TXLEN_ERROR_ENABLED 0
+#define TRACE_DP8393X_TRANSMIT_TXLEN_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_transmit_txlen_error(int len) {
+ (void)len;
+}
+#define TRACE_DP8393X_WRITE 0
+#define TRACE_DP8393X_WRITE_ENABLED 0
+#define TRACE_DP8393X_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_write(int reg, const char *name, int val, int size) {
+ (void)reg;
+ (void)name;
+ (void)val;
+ (void)size;
+}
+#define TRACE_DP8393X_WRITE_INVALID 0
+#define TRACE_DP8393X_WRITE_INVALID_ENABLED 0
+#define TRACE_DP8393X_WRITE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_write_invalid(int reg) {
+ (void)reg;
+}
+#define TRACE_DP8393X_WRITE_INVALID_DCR 0
+#define TRACE_DP8393X_WRITE_INVALID_DCR_ENABLED 0
+#define TRACE_DP8393X_WRITE_INVALID_DCR_BACKEND_DSTATE() (0)
+static inline void trace_dp8393x_write_invalid_dcr(const char *name) {
+ (void)name;
+}
+#define TRACE_E1000_RECEIVER_OVERRUN 0
+#define TRACE_E1000_RECEIVER_OVERRUN_ENABLED 0
+#define TRACE_E1000_RECEIVER_OVERRUN_BACKEND_DSTATE() (0)
+static inline void trace_e1000_receiver_overrun(size_t s, uint32_t rdh, uint32_t rdt) {
+ (void)s;
+ (void)rdh;
+ (void)rdt;
+}
+#define TRACE_E1000E_CB_PCI_REALIZE 0
+#define TRACE_E1000E_CB_PCI_REALIZE_ENABLED 0
+#define TRACE_E1000E_CB_PCI_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_cb_pci_realize(void) {
+}
+#define TRACE_E1000E_CB_PCI_UNINIT 0
+#define TRACE_E1000E_CB_PCI_UNINIT_ENABLED 0
+#define TRACE_E1000E_CB_PCI_UNINIT_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_cb_pci_uninit(void) {
+}
+#define TRACE_E1000E_CB_POST_LOAD 0
+#define TRACE_E1000E_CB_POST_LOAD_ENABLED 0
+#define TRACE_E1000E_CB_POST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_cb_post_load(void) {
+}
+#define TRACE_E1000E_CB_PRE_SAVE 0
+#define TRACE_E1000E_CB_PRE_SAVE_ENABLED 0
+#define TRACE_E1000E_CB_PRE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_cb_pre_save(void) {
+}
+#define TRACE_E1000E_CB_QDEV_RESET_HOLD 0
+#define TRACE_E1000E_CB_QDEV_RESET_HOLD_ENABLED 0
+#define TRACE_E1000E_CB_QDEV_RESET_HOLD_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_cb_qdev_reset_hold(void) {
+}
+#define TRACE_E1000E_CFG_SUPPORT_VIRTIO 0
+#define TRACE_E1000E_CFG_SUPPORT_VIRTIO_ENABLED 0
+#define TRACE_E1000E_CFG_SUPPORT_VIRTIO_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_cfg_support_virtio(bool support) {
+ (void)support;
+}
+#define TRACE_E1000E_CORE_CTRL_PHY_RESET 0
+#define TRACE_E1000E_CORE_CTRL_PHY_RESET_ENABLED 0
+#define TRACE_E1000E_CORE_CTRL_PHY_RESET_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_ctrl_phy_reset(void) {
+}
+#define TRACE_E1000E_CORE_CTRL_SW_RESET 0
+#define TRACE_E1000E_CORE_CTRL_SW_RESET_ENABLED 0
+#define TRACE_E1000E_CORE_CTRL_SW_RESET_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_ctrl_sw_reset(void) {
+}
+#define TRACE_E1000E_CORE_CTRL_WRITE 0
+#define TRACE_E1000E_CORE_CTRL_WRITE_ENABLED 0
+#define TRACE_E1000E_CORE_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_ctrl_write(uint64_t index, uint32_t val) {
+ (void)index;
+ (void)val;
+}
+#define TRACE_E1000E_CORE_MDIC_READ 0
+#define TRACE_E1000E_CORE_MDIC_READ_ENABLED 0
+#define TRACE_E1000E_CORE_MDIC_READ_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) {
+ (void)page;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_E1000E_CORE_MDIC_READ_UNHANDLED 0
+#define TRACE_E1000E_CORE_MDIC_READ_UNHANDLED_ENABLED 0
+#define TRACE_E1000E_CORE_MDIC_READ_UNHANDLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) {
+ (void)page;
+ (void)addr;
+}
+#define TRACE_E1000E_CORE_MDIC_WRITE 0
+#define TRACE_E1000E_CORE_MDIC_WRITE_ENABLED 0
+#define TRACE_E1000E_CORE_MDIC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) {
+ (void)page;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED 0
+#define TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED_ENABLED 0
+#define TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) {
+ (void)page;
+ (void)addr;
+}
+#define TRACE_E1000E_CORE_READ 0
+#define TRACE_E1000E_CORE_READ_ENABLED 0
+#define TRACE_E1000E_CORE_READ_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) {
+ (void)index;
+ (void)size;
+ (void)val;
+}
+#define TRACE_E1000E_CORE_WRITE 0
+#define TRACE_E1000E_CORE_WRITE_ENABLED 0
+#define TRACE_E1000E_CORE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) {
+ (void)index;
+ (void)size;
+ (void)val;
+}
+#define TRACE_E1000E_IO_READ_ADDR 0
+#define TRACE_E1000E_IO_READ_ADDR_ENABLED 0
+#define TRACE_E1000E_IO_READ_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_io_read_addr(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_E1000E_IO_READ_DATA 0
+#define TRACE_E1000E_IO_READ_DATA_ENABLED 0
+#define TRACE_E1000E_IO_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_io_read_data(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_E1000E_IO_WRITE_ADDR 0
+#define TRACE_E1000E_IO_WRITE_ADDR_ENABLED 0
+#define TRACE_E1000E_IO_WRITE_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_io_write_addr(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_E1000E_IO_WRITE_DATA 0
+#define TRACE_E1000E_IO_WRITE_DATA_ENABLED 0
+#define TRACE_E1000E_IO_WRITE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_io_write_data(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_E1000E_IRQ_ADD_MSI_OTHER 0
+#define TRACE_E1000E_IRQ_ADD_MSI_OTHER_ENABLED 0
+#define TRACE_E1000E_IRQ_ADD_MSI_OTHER_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_add_msi_other(uint32_t new_val) {
+ (void)new_val;
+}
+#define TRACE_E1000E_IRQ_CLEAR 0
+#define TRACE_E1000E_IRQ_CLEAR_ENABLED 0
+#define TRACE_E1000E_IRQ_CLEAR_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_clear(uint32_t offset, uint32_t old, uint32_t new) {
+ (void)offset;
+ (void)old;
+ (void)new;
+}
+#define TRACE_E1000E_IRQ_EITR_SET 0
+#define TRACE_E1000E_IRQ_EITR_SET_ENABLED 0
+#define TRACE_E1000E_IRQ_EITR_SET_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_eitr_set(uint32_t eitr_num, uint32_t val) {
+ (void)eitr_num;
+ (void)val;
+}
+#define TRACE_E1000E_IRQ_FIRE_ALL_TIMERS 0
+#define TRACE_E1000E_IRQ_FIRE_ALL_TIMERS_ENABLED 0
+#define TRACE_E1000E_IRQ_FIRE_ALL_TIMERS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_fire_all_timers(uint32_t val) {
+ (void)val;
+}
+#define TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS 0
+#define TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS_ENABLED 0
+#define TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_fire_delayed_interrupts(void) {
+}
+#define TRACE_E1000E_IRQ_FIX_ICR_ASSERTED 0
+#define TRACE_E1000E_IRQ_FIX_ICR_ASSERTED_ENABLED 0
+#define TRACE_E1000E_IRQ_FIX_ICR_ASSERTED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_fix_icr_asserted(uint32_t new_val) {
+ (void)new_val;
+}
+#define TRACE_E1000E_IRQ_IAM_CLEAR_EIAME 0
+#define TRACE_E1000E_IRQ_IAM_CLEAR_EIAME_ENABLED 0
+#define TRACE_E1000E_IRQ_IAM_CLEAR_EIAME_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) {
+ (void)iam;
+ (void)cause;
+}
+#define TRACE_E1000E_IRQ_ICR_CLEAR_EIAC 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_EIAC_ENABLED 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_EIAC_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) {
+ (void)icr;
+ (void)eiac;
+}
+#define TRACE_E1000E_IRQ_ICR_CLEAR_IAME 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_IAME_ENABLED 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_IAME_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_icr_clear_iame(void) {
+}
+#define TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS_ENABLED 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_icr_clear_icr_bit_ims(uint32_t icr, uint32_t ims) {
+ (void)icr;
+ (void)ims;
+}
+#define TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ_ENABLED 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_icr_clear_nonmsix_icr_read(void) {
+}
+#define TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS_ENABLED 0
+#define TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_icr_clear_zero_ims(void) {
+}
+#define TRACE_E1000E_IRQ_ICR_PROCESS_IAME 0
+#define TRACE_E1000E_IRQ_ICR_PROCESS_IAME_ENABLED 0
+#define TRACE_E1000E_IRQ_ICR_PROCESS_IAME_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_icr_process_iame(void) {
+}
+#define TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC 0
+#define TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC_ENABLED 0
+#define TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_ims_clear_set_imc(uint32_t val) {
+ (void)val;
+}
+#define TRACE_E1000E_IRQ_ITR_SET 0
+#define TRACE_E1000E_IRQ_ITR_SET_ENABLED 0
+#define TRACE_E1000E_IRQ_ITR_SET_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_itr_set(uint32_t val) {
+ (void)val;
+}
+#define TRACE_E1000E_IRQ_LEGACY_NOTIFY 0
+#define TRACE_E1000E_IRQ_LEGACY_NOTIFY_ENABLED 0
+#define TRACE_E1000E_IRQ_LEGACY_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_legacy_notify(bool level) {
+ (void)level;
+}
+#define TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED 0
+#define TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED_ENABLED 0
+#define TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_legacy_notify_postponed(void) {
+}
+#define TRACE_E1000E_IRQ_MSI_NOTIFY 0
+#define TRACE_E1000E_IRQ_MSI_NOTIFY_ENABLED 0
+#define TRACE_E1000E_IRQ_MSI_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_msi_notify(uint32_t cause) {
+ (void)cause;
+}
+#define TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED 0
+#define TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED_ENABLED 0
+#define TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_msi_notify_postponed(void) {
+}
+#define TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC 0
+#define TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC_ENABLED 0
+#define TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_msix_notify_postponed_vec(int idx) {
+ (void)idx;
+}
+#define TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC 0
+#define TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC_ENABLED 0
+#define TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_msix_notify_vec(uint32_t vector) {
+ (void)vector;
+}
+#define TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING 0
+#define TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING_ENABLED 0
+#define TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) {
+ (void)cause;
+ (void)int_cfg;
+ (void)vec;
+}
+#define TRACE_E1000E_IRQ_PENDING_INTERRUPTS 0
+#define TRACE_E1000E_IRQ_PENDING_INTERRUPTS_ENABLED 0
+#define TRACE_E1000E_IRQ_PENDING_INTERRUPTS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_pending_interrupts(uint32_t pending, uint32_t icr, uint32_t ims) {
+ (void)pending;
+ (void)icr;
+ (void)ims;
+}
+#define TRACE_E1000E_IRQ_POSTPONED_BY_XITR 0
+#define TRACE_E1000E_IRQ_POSTPONED_BY_XITR_ENABLED 0
+#define TRACE_E1000E_IRQ_POSTPONED_BY_XITR_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_postponed_by_xitr(uint32_t reg) {
+ (void)reg;
+}
+#define TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING 0
+#define TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING_ENABLED 0
+#define TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_rdtr_fpd_not_running(void) {
+}
+#define TRACE_E1000E_IRQ_RDTR_FPD_RUNNING 0
+#define TRACE_E1000E_IRQ_RDTR_FPD_RUNNING_ENABLED 0
+#define TRACE_E1000E_IRQ_RDTR_FPD_RUNNING_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_rdtr_fpd_running(void) {
+}
+#define TRACE_E1000E_IRQ_READ_ICS 0
+#define TRACE_E1000E_IRQ_READ_ICS_ENABLED 0
+#define TRACE_E1000E_IRQ_READ_ICS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_read_ics(uint32_t ics) {
+ (void)ics;
+}
+#define TRACE_E1000E_IRQ_READ_IMS 0
+#define TRACE_E1000E_IRQ_READ_IMS_ENABLED 0
+#define TRACE_E1000E_IRQ_READ_IMS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_read_ims(uint32_t ims) {
+ (void)ims;
+}
+#define TRACE_E1000E_IRQ_REARM_TIMER 0
+#define TRACE_E1000E_IRQ_REARM_TIMER_ENABLED 0
+#define TRACE_E1000E_IRQ_REARM_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_rearm_timer(uint32_t reg, int64_t delay_ns) {
+ (void)reg;
+ (void)delay_ns;
+}
+#define TRACE_E1000E_IRQ_SET 0
+#define TRACE_E1000E_IRQ_SET_ENABLED 0
+#define TRACE_E1000E_IRQ_SET_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_set(uint32_t offset, uint32_t old, uint32_t new) {
+ (void)offset;
+ (void)old;
+ (void)new;
+}
+#define TRACE_E1000E_IRQ_THROTTLING_TIMER 0
+#define TRACE_E1000E_IRQ_THROTTLING_TIMER_ENABLED 0
+#define TRACE_E1000E_IRQ_THROTTLING_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_throttling_timer(uint32_t reg) {
+ (void)reg;
+}
+#define TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING 0
+#define TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING_ENABLED 0
+#define TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_tidv_fpd_not_running(void) {
+}
+#define TRACE_E1000E_IRQ_TIDV_FPD_RUNNING 0
+#define TRACE_E1000E_IRQ_TIDV_FPD_RUNNING_ENABLED 0
+#define TRACE_E1000E_IRQ_TIDV_FPD_RUNNING_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_tidv_fpd_running(void) {
+}
+#define TRACE_E1000E_IRQ_WRITE_ICS 0
+#define TRACE_E1000E_IRQ_WRITE_ICS_ENABLED 0
+#define TRACE_E1000E_IRQ_WRITE_ICS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_irq_write_ics(uint32_t val) {
+ (void)val;
+}
+#define TRACE_E1000E_LINK_AUTONEG_FLOWCTL 0
+#define TRACE_E1000E_LINK_AUTONEG_FLOWCTL_ENABLED 0
+#define TRACE_E1000E_LINK_AUTONEG_FLOWCTL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_link_autoneg_flowctl(bool enabled) {
+ (void)enabled;
+}
+#define TRACE_E1000E_LINK_READ_PARAMS 0
+#define TRACE_E1000E_LINK_READ_PARAMS_ENABLED 0
+#define TRACE_E1000E_LINK_READ_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_link_read_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) {
+ (void)autodetect;
+ (void)speed;
+ (void)force_spd;
+ (void)force_dplx;
+ (void)rx_fctl;
+ (void)tx_fctl;
+}
+#define TRACE_E1000E_LINK_SET_EXT_PARAMS 0
+#define TRACE_E1000E_LINK_SET_EXT_PARAMS_ENABLED 0
+#define TRACE_E1000E_LINK_SET_EXT_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_link_set_ext_params(bool asd_check, bool speed_select_bypass) {
+ (void)asd_check;
+ (void)speed_select_bypass;
+}
+#define TRACE_E1000E_LINK_SET_PARAMS 0
+#define TRACE_E1000E_LINK_SET_PARAMS_ENABLED 0
+#define TRACE_E1000E_LINK_SET_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_link_set_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) {
+ (void)autodetect;
+ (void)speed;
+ (void)force_spd;
+ (void)force_dplx;
+ (void)rx_fctl;
+ (void)tx_fctl;
+}
+#define TRACE_E1000E_LINK_STATUS 0
+#define TRACE_E1000E_LINK_STATUS_ENABLED 0
+#define TRACE_E1000E_LINK_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t asdv) {
+ (void)link_up;
+ (void)full_dplx;
+ (void)speed;
+ (void)asdv;
+}
+#define TRACE_E1000E_LINK_STATUS_CHANGED 0
+#define TRACE_E1000E_LINK_STATUS_CHANGED_ENABLED 0
+#define TRACE_E1000E_LINK_STATUS_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_link_status_changed(bool status) {
+ (void)status;
+}
+#define TRACE_E1000E_MAC_SET_PERMANENT 0
+#define TRACE_E1000E_MAC_SET_PERMANENT_ENABLED 0
+#define TRACE_E1000E_MAC_SET_PERMANENT_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_E1000E_MAC_SET_SW 0
+#define TRACE_E1000E_MAC_SET_SW_ENABLED 0
+#define TRACE_E1000E_MAC_SET_SW_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_E1000E_MSI_INIT_FAIL 0
+#define TRACE_E1000E_MSI_INIT_FAIL_ENABLED 0
+#define TRACE_E1000E_MSI_INIT_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_msi_init_fail(int32_t res) {
+ (void)res;
+}
+#define TRACE_E1000E_MSIX_INIT_FAIL 0
+#define TRACE_E1000E_MSIX_INIT_FAIL_ENABLED 0
+#define TRACE_E1000E_MSIX_INIT_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_msix_init_fail(int32_t res) {
+ (void)res;
+}
+#define TRACE_E1000E_MSIX_USE_VECTOR_FAIL 0
+#define TRACE_E1000E_MSIX_USE_VECTOR_FAIL_ENABLED 0
+#define TRACE_E1000E_MSIX_USE_VECTOR_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) {
+ (void)vec;
+ (void)res;
+}
+#define TRACE_E1000E_RING_FREE_SPACE 0
+#define TRACE_E1000E_RING_FREE_SPACE_ENABLED 0
+#define TRACE_E1000E_RING_FREE_SPACE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_ring_free_space(int ridx, uint32_t rdlen, uint32_t rdh, uint32_t rdt) {
+ (void)ridx;
+ (void)rdlen;
+ (void)rdh;
+ (void)rdt;
+}
+#define TRACE_E1000E_RX_CAN_RECV 0
+#define TRACE_E1000E_RX_CAN_RECV_ENABLED 0
+#define TRACE_E1000E_RX_CAN_RECV_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_can_recv(void) {
+}
+#define TRACE_E1000E_RX_CAN_RECV_RINGS_FULL 0
+#define TRACE_E1000E_RX_CAN_RECV_RINGS_FULL_ENABLED 0
+#define TRACE_E1000E_RX_CAN_RECV_RINGS_FULL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_can_recv_rings_full(void) {
+}
+#define TRACE_E1000E_RX_DESC_BUFF_SIZES 0
+#define TRACE_E1000E_RX_DESC_BUFF_SIZES_ENABLED 0
+#define TRACE_E1000E_RX_DESC_BUFF_SIZES_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_desc_buff_sizes(uint32_t b0, uint32_t b1, uint32_t b2, uint32_t b3) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+}
+#define TRACE_E1000E_RX_DESC_BUFF_WRITE 0
+#define TRACE_E1000E_RX_DESC_BUFF_WRITE_ENABLED 0
+#define TRACE_E1000E_RX_DESC_BUFF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) {
+ (void)idx;
+ (void)addr;
+ (void)offset;
+ (void)source;
+ (void)len;
+}
+#define TRACE_E1000E_RX_DESC_LEN 0
+#define TRACE_E1000E_RX_DESC_LEN_ENABLED 0
+#define TRACE_E1000E_RX_DESC_LEN_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_desc_len(uint8_t rx_desc_len) {
+ (void)rx_desc_len;
+}
+#define TRACE_E1000E_RX_DESC_PS_READ 0
+#define TRACE_E1000E_RX_DESC_PS_READ_ENABLED 0
+#define TRACE_E1000E_RX_DESC_PS_READ_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_desc_ps_read(uint64_t a0, uint64_t a1, uint64_t a2, uint64_t a3) {
+ (void)a0;
+ (void)a1;
+ (void)a2;
+ (void)a3;
+}
+#define TRACE_E1000E_RX_DESC_PS_WRITE 0
+#define TRACE_E1000E_RX_DESC_PS_WRITE_ENABLED 0
+#define TRACE_E1000E_RX_DESC_PS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_desc_ps_write(uint16_t a0, uint16_t a1, uint16_t a2, uint16_t a3) {
+ (void)a0;
+ (void)a1;
+ (void)a2;
+ (void)a3;
+}
+#define TRACE_E1000E_RX_DESCR 0
+#define TRACE_E1000E_RX_DESCR_ENABLED 0
+#define TRACE_E1000E_RX_DESCR_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_descr(int ridx, uint64_t base, uint8_t len) {
+ (void)ridx;
+ (void)base;
+ (void)len;
+}
+#define TRACE_E1000E_RX_FLT_DROPPED 0
+#define TRACE_E1000E_RX_FLT_DROPPED_ENABLED 0
+#define TRACE_E1000E_RX_FLT_DROPPED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_flt_dropped(void) {
+}
+#define TRACE_E1000E_RX_HAS_BUFFERS 0
+#define TRACE_E1000E_RX_HAS_BUFFERS_ENABLED 0
+#define TRACE_E1000E_RX_HAS_BUFFERS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_has_buffers(int ridx, uint32_t free_desc, size_t total_size, uint32_t desc_buf_size) {
+ (void)ridx;
+ (void)free_desc;
+ (void)total_size;
+ (void)desc_buf_size;
+}
+#define TRACE_E1000E_RX_INTERRUPT_DELAYED 0
+#define TRACE_E1000E_RX_INTERRUPT_DELAYED_ENABLED 0
+#define TRACE_E1000E_RX_INTERRUPT_DELAYED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_interrupt_delayed(uint32_t causes) {
+ (void)causes;
+}
+#define TRACE_E1000E_RX_INTERRUPT_SET 0
+#define TRACE_E1000E_RX_INTERRUPT_SET_ENABLED 0
+#define TRACE_E1000E_RX_INTERRUPT_SET_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_interrupt_set(uint32_t causes) {
+ (void)causes;
+}
+#define TRACE_E1000E_RX_METADATA_ACK 0
+#define TRACE_E1000E_RX_METADATA_ACK_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_ACK_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_ack(void) {
+}
+#define TRACE_E1000E_RX_METADATA_IP_ID 0
+#define TRACE_E1000E_RX_METADATA_IP_ID_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_IP_ID_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_ip_id(uint16_t ip_id) {
+ (void)ip_id;
+}
+#define TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED 0
+#define TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_ipv6_filtering_disabled(void) {
+}
+#define TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED 0
+#define TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_ipv6_sum_disabled(void) {
+}
+#define TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED 0
+#define TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_l3_cso_disabled(void) {
+}
+#define TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED 0
+#define TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_l3_csum_validation_failed(void) {
+}
+#define TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED 0
+#define TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_l4_cso_disabled(void) {
+}
+#define TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED 0
+#define TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_l4_csum_validation_failed(void) {
+}
+#define TRACE_E1000E_RX_METADATA_PKT_TYPE 0
+#define TRACE_E1000E_RX_METADATA_PKT_TYPE_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_PKT_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_pkt_type(uint32_t pkt_type) {
+ (void)pkt_type;
+}
+#define TRACE_E1000E_RX_METADATA_PROTOCOLS 0
+#define TRACE_E1000E_RX_METADATA_PROTOCOLS_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_PROTOCOLS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_protocols(bool hasip4, bool hasip6, int l4hdr_protocol) {
+ (void)hasip4;
+ (void)hasip6;
+ (void)l4hdr_protocol;
+}
+#define TRACE_E1000E_RX_METADATA_RSS 0
+#define TRACE_E1000E_RX_METADATA_RSS_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_RSS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_rss(uint32_t rss, uint32_t mrq) {
+ (void)rss;
+ (void)mrq;
+}
+#define TRACE_E1000E_RX_METADATA_STATUS_FLAGS 0
+#define TRACE_E1000E_RX_METADATA_STATUS_FLAGS_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_STATUS_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_status_flags(uint32_t status_flags) {
+ (void)status_flags;
+}
+#define TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO 0
+#define TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_virthdr_no_csum_info(void) {
+}
+#define TRACE_E1000E_RX_METADATA_VLAN 0
+#define TRACE_E1000E_RX_METADATA_VLAN_ENABLED 0
+#define TRACE_E1000E_RX_METADATA_VLAN_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_metadata_vlan(uint16_t vlan_tag) {
+ (void)vlan_tag;
+}
+#define TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST 0
+#define TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST_ENABLED 0
+#define TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_not_written_to_guest(int queue_idx) {
+ (void)queue_idx;
+}
+#define TRACE_E1000E_RX_NULL_DESCRIPTOR 0
+#define TRACE_E1000E_RX_NULL_DESCRIPTOR_ENABLED 0
+#define TRACE_E1000E_RX_NULL_DESCRIPTOR_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_null_descriptor(void) {
+}
+#define TRACE_E1000E_RX_RECEIVE_IOV 0
+#define TRACE_E1000E_RX_RECEIVE_IOV_ENABLED 0
+#define TRACE_E1000E_RX_RECEIVE_IOV_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_receive_iov(int iovcnt) {
+ (void)iovcnt;
+}
+#define TRACE_E1000E_RX_RSS_DISABLED 0
+#define TRACE_E1000E_RX_RSS_DISABLED_ENABLED 0
+#define TRACE_E1000E_RX_RSS_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_rss_disabled(void) {
+}
+#define TRACE_E1000E_RX_RSS_IP4 0
+#define TRACE_E1000E_RX_RSS_IP4_ENABLED 0
+#define TRACE_E1000E_RX_RSS_IP4_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_rss_ip4(int l4hdr_proto, uint32_t mrqc, bool tcpipv4_enabled, bool ipv4_enabled) {
+ (void)l4hdr_proto;
+ (void)mrqc;
+ (void)tcpipv4_enabled;
+ (void)ipv4_enabled;
+}
+#define TRACE_E1000E_RX_RSS_IP6 0
+#define TRACE_E1000E_RX_RSS_IP6_ENABLED 0
+#define TRACE_E1000E_RX_RSS_IP6_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, int l4hdr_proto, bool has_ext_headers, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6ex_enabled, bool ipv6ex_enabled, bool ipv6_enabled) {
+ (void)ex_dis;
+ (void)new_ex_dis;
+ (void)l4hdr_proto;
+ (void)has_ext_headers;
+ (void)ex_dst_valid;
+ (void)ex_src_valid;
+ (void)mrqc;
+ (void)tcpipv6ex_enabled;
+ (void)ipv6ex_enabled;
+ (void)ipv6_enabled;
+}
+#define TRACE_E1000E_RX_RSS_IP6_RFCTL 0
+#define TRACE_E1000E_RX_RSS_IP6_RFCTL_ENABLED 0
+#define TRACE_E1000E_RX_RSS_IP6_RFCTL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) {
+ (void)rfctl;
+}
+#define TRACE_E1000E_RX_RSS_STARTED 0
+#define TRACE_E1000E_RX_RSS_STARTED_ENABLED 0
+#define TRACE_E1000E_RX_RSS_STARTED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_rss_started(void) {
+}
+#define TRACE_E1000E_RX_RSS_TYPE 0
+#define TRACE_E1000E_RX_RSS_TYPE_ENABLED 0
+#define TRACE_E1000E_RX_RSS_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_rss_type(uint32_t type) {
+ (void)type;
+}
+#define TRACE_E1000E_RX_SET_CSO 0
+#define TRACE_E1000E_RX_SET_CSO_ENABLED 0
+#define TRACE_E1000E_RX_SET_CSO_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_set_cso(int cso_state) {
+ (void)cso_state;
+}
+#define TRACE_E1000E_RX_SET_RCTL 0
+#define TRACE_E1000E_RX_SET_RCTL_ENABLED 0
+#define TRACE_E1000E_RX_SET_RCTL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_set_rctl(uint32_t rctl) {
+ (void)rctl;
+}
+#define TRACE_E1000E_RX_SET_RDT 0
+#define TRACE_E1000E_RX_SET_RDT_ENABLED 0
+#define TRACE_E1000E_RX_SET_RDT_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_set_rdt(int queue_idx, uint32_t val) {
+ (void)queue_idx;
+ (void)val;
+}
+#define TRACE_E1000E_RX_SET_RFCTL 0
+#define TRACE_E1000E_RX_SET_RFCTL_ENABLED 0
+#define TRACE_E1000E_RX_SET_RFCTL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_set_rfctl(uint32_t val) {
+ (void)val;
+}
+#define TRACE_E1000E_RX_START_RECV 0
+#define TRACE_E1000E_RX_START_RECV_ENABLED 0
+#define TRACE_E1000E_RX_START_RECV_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_start_recv(void) {
+}
+#define TRACE_E1000E_RX_WRITTEN_TO_GUEST 0
+#define TRACE_E1000E_RX_WRITTEN_TO_GUEST_ENABLED 0
+#define TRACE_E1000E_RX_WRITTEN_TO_GUEST_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_rx_written_to_guest(int queue_idx) {
+ (void)queue_idx;
+}
+#define TRACE_E1000E_TX_DESCR 0
+#define TRACE_E1000E_TX_DESCR_ENABLED 0
+#define TRACE_E1000E_TX_DESCR_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_tx_descr(void *addr, uint32_t lower, uint32_t upper) {
+ (void)addr;
+ (void)lower;
+ (void)upper;
+}
+#define TRACE_E1000E_TX_DISABLED 0
+#define TRACE_E1000E_TX_DISABLED_ENABLED 0
+#define TRACE_E1000E_TX_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_tx_disabled(void) {
+}
+#define TRACE_E1000E_VLAN_VET 0
+#define TRACE_E1000E_VLAN_VET_ENABLED 0
+#define TRACE_E1000E_VLAN_VET_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_vlan_vet(uint16_t vet) {
+ (void)vet;
+}
+#define TRACE_E1000E_VM_STATE_RUNNING 0
+#define TRACE_E1000E_VM_STATE_RUNNING_ENABLED 0
+#define TRACE_E1000E_VM_STATE_RUNNING_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_vm_state_running(void) {
+}
+#define TRACE_E1000E_VM_STATE_STOPPED 0
+#define TRACE_E1000E_VM_STATE_STOPPED_ENABLED 0
+#define TRACE_E1000E_VM_STATE_STOPPED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_vm_state_stopped(void) {
+}
+#define TRACE_E1000E_WRN_IO_ADDR_FLASH 0
+#define TRACE_E1000E_WRN_IO_ADDR_FLASH_ENABLED 0
+#define TRACE_E1000E_WRN_IO_ADDR_FLASH_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_io_addr_flash(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_E1000E_WRN_IO_ADDR_UNDEFINED 0
+#define TRACE_E1000E_WRN_IO_ADDR_UNDEFINED_ENABLED 0
+#define TRACE_E1000E_WRN_IO_ADDR_UNDEFINED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_io_addr_undefined(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_E1000E_WRN_IO_ADDR_UNKNOWN 0
+#define TRACE_E1000E_WRN_IO_ADDR_UNKNOWN_ENABLED 0
+#define TRACE_E1000E_WRN_IO_ADDR_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_io_addr_unknown(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_E1000E_WRN_IO_READ_UNKNOWN 0
+#define TRACE_E1000E_WRN_IO_READ_UNKNOWN_ENABLED 0
+#define TRACE_E1000E_WRN_IO_READ_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_io_read_unknown(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_E1000E_WRN_IO_WRITE_UNKNOWN 0
+#define TRACE_E1000E_WRN_IO_WRITE_UNKNOWN_ENABLED 0
+#define TRACE_E1000E_WRN_IO_WRITE_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_io_write_unknown(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED 0
+#define TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED_ENABLED 0
+#define TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_iscsi_filtering_not_supported(void) {
+}
+#define TRACE_E1000E_WRN_MSIX_INVALID 0
+#define TRACE_E1000E_WRN_MSIX_INVALID_ENABLED 0
+#define TRACE_E1000E_WRN_MSIX_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) {
+ (void)cause;
+ (void)cfg;
+}
+#define TRACE_E1000E_WRN_MSIX_VEC_WRONG 0
+#define TRACE_E1000E_WRN_MSIX_VEC_WRONG_ENABLED 0
+#define TRACE_E1000E_WRN_MSIX_VEC_WRONG_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) {
+ (void)cause;
+ (void)cfg;
+}
+#define TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED 0
+#define TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED_ENABLED 0
+#define TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_nfsr_filtering_not_supported(void) {
+}
+#define TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED 0
+#define TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED_ENABLED 0
+#define TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_nfsw_filtering_not_supported(void) {
+}
+#define TRACE_E1000E_WRN_NO_SNAP_SUPPORT 0
+#define TRACE_E1000E_WRN_NO_SNAP_SUPPORT_ENABLED 0
+#define TRACE_E1000E_WRN_NO_SNAP_SUPPORT_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_no_snap_support(void) {
+}
+#define TRACE_E1000E_WRN_NO_TS_SUPPORT 0
+#define TRACE_E1000E_WRN_NO_TS_SUPPORT_ENABLED 0
+#define TRACE_E1000E_WRN_NO_TS_SUPPORT_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_no_ts_support(void) {
+}
+#define TRACE_E1000E_WRN_REGS_READ_TRIVIAL 0
+#define TRACE_E1000E_WRN_REGS_READ_TRIVIAL_ENABLED 0
+#define TRACE_E1000E_WRN_REGS_READ_TRIVIAL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_regs_read_trivial(uint32_t index) {
+ (void)index;
+}
+#define TRACE_E1000E_WRN_REGS_READ_UNKNOWN 0
+#define TRACE_E1000E_WRN_REGS_READ_UNKNOWN_ENABLED 0
+#define TRACE_E1000E_WRN_REGS_READ_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) {
+ (void)index;
+ (void)size;
+}
+#define TRACE_E1000E_WRN_REGS_WRITE_RO 0
+#define TRACE_E1000E_WRN_REGS_WRITE_RO_ENABLED 0
+#define TRACE_E1000E_WRN_REGS_WRITE_RO_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) {
+ (void)index;
+ (void)size;
+ (void)val;
+}
+#define TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL 0
+#define TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL_ENABLED 0
+#define TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_regs_write_trivial(uint32_t index) {
+ (void)index;
+}
+#define TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN 0
+#define TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN_ENABLED 0
+#define TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val) {
+ (void)index;
+ (void)size;
+ (void)val;
+}
+#define TRACE_E1000X_LINK_NEGOTIATION_DONE 0
+#define TRACE_E1000X_LINK_NEGOTIATION_DONE_ENABLED 0
+#define TRACE_E1000X_LINK_NEGOTIATION_DONE_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_link_negotiation_done(void) {
+}
+#define TRACE_E1000X_LINK_NEGOTIATION_START 0
+#define TRACE_E1000X_LINK_NEGOTIATION_START_ENABLED 0
+#define TRACE_E1000X_LINK_NEGOTIATION_START_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_link_negotiation_start(void) {
+}
+#define TRACE_E1000X_MAC_INDICATE 0
+#define TRACE_E1000X_MAC_INDICATE_ENABLED 0
+#define TRACE_E1000X_MAC_INDICATE_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_E1000X_RX_CAN_RECV_DISABLED 0
+#define TRACE_E1000X_RX_CAN_RECV_DISABLED_ENABLED 0
+#define TRACE_E1000X_RX_CAN_RECV_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) {
+ (void)link_up;
+ (void)rx_enabled;
+ (void)pci_master;
+}
+#define TRACE_E1000X_RX_DISABLED 0
+#define TRACE_E1000X_RX_DISABLED_ENABLED 0
+#define TRACE_E1000X_RX_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_disabled(uint32_t rctl_reg) {
+ (void)rctl_reg;
+}
+#define TRACE_E1000X_RX_FLT_INEXACT_MISMATCH 0
+#define TRACE_E1000X_RX_FLT_INEXACT_MISMATCH_ENABLED 0
+#define TRACE_E1000X_RX_FLT_INEXACT_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+ (void)mo;
+ (void)mta;
+ (void)mta_val;
+}
+#define TRACE_E1000X_RX_FLT_UCAST_MATCH 0
+#define TRACE_E1000X_RX_FLT_UCAST_MATCH_ENABLED 0
+#define TRACE_E1000X_RX_FLT_UCAST_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)idx;
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_E1000X_RX_FLT_UCAST_MISMATCH 0
+#define TRACE_E1000X_RX_FLT_UCAST_MISMATCH_ENABLED 0
+#define TRACE_E1000X_RX_FLT_UCAST_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_E1000X_RX_FLT_VLAN_MATCH 0
+#define TRACE_E1000X_RX_FLT_VLAN_MATCH_ENABLED 0
+#define TRACE_E1000X_RX_FLT_VLAN_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_flt_vlan_match(uint16_t vid) {
+ (void)vid;
+}
+#define TRACE_E1000X_RX_FLT_VLAN_MISMATCH 0
+#define TRACE_E1000X_RX_FLT_VLAN_MISMATCH_ENABLED 0
+#define TRACE_E1000X_RX_FLT_VLAN_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_flt_vlan_mismatch(uint16_t vid) {
+ (void)vid;
+}
+#define TRACE_E1000X_RX_LINK_DOWN 0
+#define TRACE_E1000X_RX_LINK_DOWN_ENABLED 0
+#define TRACE_E1000X_RX_LINK_DOWN_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_link_down(uint32_t status_reg) {
+ (void)status_reg;
+}
+#define TRACE_E1000X_RX_OVERSIZED 0
+#define TRACE_E1000X_RX_OVERSIZED_ENABLED 0
+#define TRACE_E1000X_RX_OVERSIZED_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_rx_oversized(size_t size) {
+ (void)size;
+}
+#define TRACE_E1000X_VLAN_IS_VLAN_PKT 0
+#define TRACE_E1000X_VLAN_IS_VLAN_PKT_ENABLED 0
+#define TRACE_E1000X_VLAN_IS_VLAN_PKT_BACKEND_DSTATE() (0)
+static inline void trace_e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) {
+ (void)is_vlan_pkt;
+ (void)eth_proto;
+ (void)vet;
+}
+#define TRACE_ETHLITE_PKT_LOST 0
+#define TRACE_ETHLITE_PKT_LOST_ENABLED 0
+#define TRACE_ETHLITE_PKT_LOST_BACKEND_DSTATE() (0)
+static inline void trace_ethlite_pkt_lost(uint32_t rx_ctrl) {
+ (void)rx_ctrl;
+}
+#define TRACE_ETHLITE_PKT_SIZE_TOO_BIG 0
+#define TRACE_ETHLITE_PKT_SIZE_TOO_BIG_ENABLED 0
+#define TRACE_ETHLITE_PKT_SIZE_TOO_BIG_BACKEND_DSTATE() (0)
+static inline void trace_ethlite_pkt_size_too_big(uint64_t size) {
+ (void)size;
+}
+#define TRACE_I82596_CA_INIT 0
+#define TRACE_I82596_CA_INIT_ENABLED 0
+#define TRACE_I82596_CA_INIT_BACKEND_DSTATE() (0)
+static inline void trace_i82596_ca_init(uint32_t scb, uint8_t mode, uint32_t base) {
+ (void)scb;
+ (void)mode;
+ (void)base;
+}
+#define TRACE_I82596_DUMP 0
+#define TRACE_I82596_DUMP_ENABLED 0
+#define TRACE_I82596_DUMP_BACKEND_DSTATE() (0)
+static inline void trace_i82596_dump(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_I82596_FLUSH_QUEUE 0
+#define TRACE_I82596_FLUSH_QUEUE_ENABLED 0
+#define TRACE_I82596_FLUSH_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_i82596_flush_queue(int count) {
+ (void)count;
+}
+#define TRACE_I82596_IOPORT_WRITE 0
+#define TRACE_I82596_IOPORT_WRITE_ENABLED 0
+#define TRACE_I82596_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_i82596_ioport_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_I82596_NEW_MAC 0
+#define TRACE_I82596_NEW_MAC_ENABLED 0
+#define TRACE_I82596_NEW_MAC_BACKEND_DSTATE() (0)
+static inline void trace_i82596_new_mac(const char *id_with_mac) {
+ (void)id_with_mac;
+}
+#define TRACE_I82596_RECEIVE_ANALYSIS 0
+#define TRACE_I82596_RECEIVE_ANALYSIS_ENABLED 0
+#define TRACE_I82596_RECEIVE_ANALYSIS_BACKEND_DSTATE() (0)
+static inline void trace_i82596_receive_analysis(const char *s) {
+ (void)s;
+}
+#define TRACE_I82596_RECEIVE_IOV 0
+#define TRACE_I82596_RECEIVE_IOV_ENABLED 0
+#define TRACE_I82596_RECEIVE_IOV_BACKEND_DSTATE() (0)
+static inline void trace_i82596_receive_iov(size_t size, int iovcnt) {
+ (void)size;
+ (void)iovcnt;
+}
+#define TRACE_I82596_RECEIVE_PACKET 0
+#define TRACE_I82596_RECEIVE_PACKET_ENABLED 0
+#define TRACE_I82596_RECEIVE_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_i82596_receive_packet(const uint8_t *buf, size_t size) {
+ (void)buf;
+ (void)size;
+}
+#define TRACE_I82596_RECEIVE_QUEUE_FULL 0
+#define TRACE_I82596_RECEIVE_QUEUE_FULL_ENABLED 0
+#define TRACE_I82596_RECEIVE_QUEUE_FULL_BACKEND_DSTATE() (0)
+static inline void trace_i82596_receive_queue_full(void) {
+}
+#define TRACE_I82596_RECEIVE_SUSPENDED 0
+#define TRACE_I82596_RECEIVE_SUSPENDED_ENABLED 0
+#define TRACE_I82596_RECEIVE_SUSPENDED_BACKEND_DSTATE() (0)
+static inline void trace_i82596_receive_suspended(void) {
+}
+#define TRACE_I82596_RX_COMPLETE 0
+#define TRACE_I82596_RX_COMPLETE_ENABLED 0
+#define TRACE_I82596_RX_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_complete(uint32_t crc, uint32_t align, uint32_t resource) {
+ (void)crc;
+ (void)align;
+ (void)resource;
+}
+#define TRACE_I82596_RX_INCOMPLETE 0
+#define TRACE_I82596_RX_INCOMPLETE_ENABLED 0
+#define TRACE_I82596_RX_INCOMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_incomplete(size_t copied, size_t total) {
+ (void)copied;
+ (void)total;
+}
+#define TRACE_I82596_RX_OUT_OF_RBDS 0
+#define TRACE_I82596_RX_OUT_OF_RBDS_ENABLED 0
+#define TRACE_I82596_RX_OUT_OF_RBDS_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_out_of_rbds(void) {
+}
+#define TRACE_I82596_RX_RBD 0
+#define TRACE_I82596_RX_RBD_ENABLED 0
+#define TRACE_I82596_RX_RBD_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_rbd(uint64_t addr, uint16_t count, uint32_t buf, uint16_t size) {
+ (void)addr;
+ (void)count;
+ (void)buf;
+ (void)size;
+}
+#define TRACE_I82596_RX_RFD 0
+#define TRACE_I82596_RX_RFD_ENABLED 0
+#define TRACE_I82596_RX_RFD_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_rfd(uint64_t addr, uint16_t status, uint16_t cmd, uint32_t link, uint32_t rbd) {
+ (void)addr;
+ (void)status;
+ (void)cmd;
+ (void)link;
+ (void)rbd;
+}
+#define TRACE_I82596_RX_RFD_UPDATE 0
+#define TRACE_I82596_RX_RFD_UPDATE_ENABLED 0
+#define TRACE_I82596_RX_RFD_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_rfd_update(uint32_t addr, uint32_t next_rfd) {
+ (void)addr;
+ (void)next_rfd;
+}
+#define TRACE_I82596_RX_SHORT_FRAME 0
+#define TRACE_I82596_RX_SHORT_FRAME_ENABLED 0
+#define TRACE_I82596_RX_SHORT_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_short_frame(size_t size) {
+ (void)size;
+}
+#define TRACE_I82596_RX_STATE_CHANGE 0
+#define TRACE_I82596_RX_STATE_CHANGE_ENABLED 0
+#define TRACE_I82596_RX_STATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_i82596_rx_state_change(uint8_t old_state, uint8_t new_state) {
+ (void)old_state;
+ (void)new_state;
+}
+#define TRACE_I82596_S_RESET 0
+#define TRACE_I82596_S_RESET_ENABLED 0
+#define TRACE_I82596_S_RESET_BACKEND_DSTATE() (0)
+static inline void trace_i82596_s_reset(void *s) {
+ (void)s;
+}
+#define TRACE_I82596_SCB_COMMAND 0
+#define TRACE_I82596_SCB_COMMAND_ENABLED 0
+#define TRACE_I82596_SCB_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_i82596_scb_command(uint8_t cuc, uint8_t ruc) {
+ (void)cuc;
+ (void)ruc;
+}
+#define TRACE_I82596_SET_MULTICAST 0
+#define TRACE_I82596_SET_MULTICAST_ENABLED 0
+#define TRACE_I82596_SET_MULTICAST_BACKEND_DSTATE() (0)
+static inline void trace_i82596_set_multicast(uint16_t count) {
+ (void)count;
+}
+#define TRACE_I82596_TRANSMIT 0
+#define TRACE_I82596_TRANSMIT_ENABLED 0
+#define TRACE_I82596_TRANSMIT_BACKEND_DSTATE() (0)
+static inline void trace_i82596_transmit(uint32_t size, uint32_t addr) {
+ (void)size;
+ (void)addr;
+}
+#define TRACE_I82596_TX_TBD 0
+#define TRACE_I82596_TX_TBD_ENABLED 0
+#define TRACE_I82596_TX_TBD_BACKEND_DSTATE() (0)
+static inline void trace_i82596_tx_tbd(uint64_t addr, uint16_t size, uint32_t buf) {
+ (void)addr;
+ (void)size;
+ (void)buf;
+}
+#define TRACE_I82596_TX_TFD 0
+#define TRACE_I82596_TX_TFD_ENABLED 0
+#define TRACE_I82596_TX_TFD_BACKEND_DSTATE() (0)
+static inline void trace_i82596_tx_tfd(uint64_t addr, uint16_t status, uint16_t cmd, uint32_t link, uint32_t tbd) {
+ (void)addr;
+ (void)status;
+ (void)cmd;
+ (void)link;
+ (void)tbd;
+}
+#define TRACE_IGB_CORE_MDIC_READ 0
+#define TRACE_IGB_CORE_MDIC_READ_ENABLED 0
+#define TRACE_IGB_CORE_MDIC_READ_BACKEND_DSTATE() (0)
+static inline void trace_igb_core_mdic_read(uint32_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_IGB_CORE_MDIC_READ_UNHANDLED 0
+#define TRACE_IGB_CORE_MDIC_READ_UNHANDLED_ENABLED 0
+#define TRACE_IGB_CORE_MDIC_READ_UNHANDLED_BACKEND_DSTATE() (0)
+static inline void trace_igb_core_mdic_read_unhandled(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_IGB_CORE_MDIC_WRITE 0
+#define TRACE_IGB_CORE_MDIC_WRITE_ENABLED 0
+#define TRACE_IGB_CORE_MDIC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_igb_core_mdic_write(uint32_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED 0
+#define TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED_ENABLED 0
+#define TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED_BACKEND_DSTATE() (0)
+static inline void trace_igb_core_mdic_write_unhandled(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_IGB_CORE_VF_RESET 0
+#define TRACE_IGB_CORE_VF_RESET_ENABLED 0
+#define TRACE_IGB_CORE_VF_RESET_BACKEND_DSTATE() (0)
+static inline void trace_igb_core_vf_reset(uint16_t vfn) {
+ (void)vfn;
+}
+#define TRACE_IGB_IRQ_EITR_SET 0
+#define TRACE_IGB_IRQ_EITR_SET_ENABLED 0
+#define TRACE_IGB_IRQ_EITR_SET_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_eitr_set(uint32_t eitr_num, uint32_t val) {
+ (void)eitr_num;
+ (void)val;
+}
+#define TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR 0
+#define TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR_ENABLED 0
+#define TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_icr_clear_gpie_nsicr(void) {
+}
+#define TRACE_IGB_IRQ_READ_IAM 0
+#define TRACE_IGB_IRQ_READ_IAM_ENABLED 0
+#define TRACE_IGB_IRQ_READ_IAM_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_read_iam(uint32_t icr) {
+ (void)icr;
+}
+#define TRACE_IGB_IRQ_SET_IAM 0
+#define TRACE_IGB_IRQ_SET_IAM_ENABLED 0
+#define TRACE_IGB_IRQ_SET_IAM_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_set_iam(uint32_t icr) {
+ (void)icr;
+}
+#define TRACE_IGB_IRQ_WRITE_EIAC 0
+#define TRACE_IGB_IRQ_WRITE_EIAC_ENABLED 0
+#define TRACE_IGB_IRQ_WRITE_EIAC_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_write_eiac(uint32_t val) {
+ (void)val;
+}
+#define TRACE_IGB_IRQ_WRITE_EIAM 0
+#define TRACE_IGB_IRQ_WRITE_EIAM_ENABLED 0
+#define TRACE_IGB_IRQ_WRITE_EIAM_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_write_eiam(uint32_t val, bool msix) {
+ (void)val;
+ (void)msix;
+}
+#define TRACE_IGB_IRQ_WRITE_EICR 0
+#define TRACE_IGB_IRQ_WRITE_EICR_ENABLED 0
+#define TRACE_IGB_IRQ_WRITE_EICR_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_write_eicr(uint32_t val, bool msix) {
+ (void)val;
+ (void)msix;
+}
+#define TRACE_IGB_IRQ_WRITE_EICS 0
+#define TRACE_IGB_IRQ_WRITE_EICS_ENABLED 0
+#define TRACE_IGB_IRQ_WRITE_EICS_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_write_eics(uint32_t val, bool msix) {
+ (void)val;
+ (void)msix;
+}
+#define TRACE_IGB_IRQ_WRITE_EIMC 0
+#define TRACE_IGB_IRQ_WRITE_EIMC_ENABLED 0
+#define TRACE_IGB_IRQ_WRITE_EIMC_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_write_eimc(uint32_t val, bool msix) {
+ (void)val;
+ (void)msix;
+}
+#define TRACE_IGB_IRQ_WRITE_EIMS 0
+#define TRACE_IGB_IRQ_WRITE_EIMS_ENABLED 0
+#define TRACE_IGB_IRQ_WRITE_EIMS_BACKEND_DSTATE() (0)
+static inline void trace_igb_irq_write_eims(uint32_t val, bool msix) {
+ (void)val;
+ (void)msix;
+}
+#define TRACE_IGB_LINK_SET_EXT_PARAMS 0
+#define TRACE_IGB_LINK_SET_EXT_PARAMS_ENABLED 0
+#define TRACE_IGB_LINK_SET_EXT_PARAMS_BACKEND_DSTATE() (0)
+static inline void trace_igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) {
+ (void)asd_check;
+ (void)speed_select_bypass;
+ (void)pfrstd;
+}
+#define TRACE_IGB_RX_DESC_BUFF_SIZE 0
+#define TRACE_IGB_RX_DESC_BUFF_SIZE_ENABLED 0
+#define TRACE_IGB_RX_DESC_BUFF_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_igb_rx_desc_buff_size(uint32_t b) {
+ (void)b;
+}
+#define TRACE_IGB_RX_DESC_BUFF_WRITE 0
+#define TRACE_IGB_RX_DESC_BUFF_WRITE_ENABLED 0
+#define TRACE_IGB_RX_DESC_BUFF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_igb_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) {
+ (void)idx;
+ (void)addr;
+ (void)offset;
+ (void)source;
+ (void)len;
+}
+#define TRACE_IGB_RX_METADATA_RSS 0
+#define TRACE_IGB_RX_METADATA_RSS_ENABLED 0
+#define TRACE_IGB_RX_METADATA_RSS_BACKEND_DSTATE() (0)
+static inline void trace_igb_rx_metadata_rss(uint32_t rss, uint16_t rss_pkt_type) {
+ (void)rss;
+ (void)rss_pkt_type;
+}
+#define TRACE_IGB_SET_PFMAILBOX 0
+#define TRACE_IGB_SET_PFMAILBOX_ENABLED 0
+#define TRACE_IGB_SET_PFMAILBOX_BACKEND_DSTATE() (0)
+static inline void trace_igb_set_pfmailbox(uint32_t vf_num, uint32_t val) {
+ (void)vf_num;
+ (void)val;
+}
+#define TRACE_IGB_SET_VFMAILBOX 0
+#define TRACE_IGB_SET_VFMAILBOX_ENABLED 0
+#define TRACE_IGB_SET_VFMAILBOX_BACKEND_DSTATE() (0)
+static inline void trace_igb_set_vfmailbox(uint32_t vf_num, uint32_t val) {
+ (void)vf_num;
+ (void)val;
+}
+#define TRACE_IGB_WRITE_CONFIG 0
+#define TRACE_IGB_WRITE_CONFIG_ENABLED 0
+#define TRACE_IGB_WRITE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_igb_write_config(uint32_t address, uint32_t val, int len) {
+ (void)address;
+ (void)val;
+ (void)len;
+}
+#define TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP 0
+#define TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP_ENABLED 0
+#define TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP_BACKEND_DSTATE() (0)
+static inline void trace_igb_wrn_rx_desc_modes_not_supp(int desc_type) {
+ (void)desc_type;
+}
+#define TRACE_IGBVF_WRITE_CONFIG 0
+#define TRACE_IGBVF_WRITE_CONFIG_ENABLED 0
+#define TRACE_IGBVF_WRITE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_igbvf_write_config(uint32_t address, uint32_t val, int len) {
+ (void)address;
+ (void)val;
+ (void)len;
+}
+#define TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN 0
+#define TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN_ENABLED 0
+#define TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_igbvf_wrn_io_addr_unknown(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_IMX_ENET_READ_BD 0
+#define TRACE_IMX_ENET_READ_BD_ENABLED 0
+#define TRACE_IMX_ENET_READ_BD_BACKEND_DSTATE() (0)
+static inline void trace_imx_enet_read_bd(uint64_t addr, int flags, int len, int data, int options, int status) {
+ (void)addr;
+ (void)flags;
+ (void)len;
+ (void)data;
+ (void)options;
+ (void)status;
+}
+#define TRACE_IMX_ENET_RECEIVE 0
+#define TRACE_IMX_ENET_RECEIVE_ENABLED 0
+#define TRACE_IMX_ENET_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_imx_enet_receive(size_t size) {
+ (void)size;
+}
+#define TRACE_IMX_ENET_RECEIVE_LAST 0
+#define TRACE_IMX_ENET_RECEIVE_LAST_ENABLED 0
+#define TRACE_IMX_ENET_RECEIVE_LAST_BACKEND_DSTATE() (0)
+static inline void trace_imx_enet_receive_last(int last) {
+ (void)last;
+}
+#define TRACE_IMX_ENET_RECEIVE_LEN 0
+#define TRACE_IMX_ENET_RECEIVE_LEN_ENABLED 0
+#define TRACE_IMX_ENET_RECEIVE_LEN_BACKEND_DSTATE() (0)
+static inline void trace_imx_enet_receive_len(uint64_t addr, int len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_IMX_ETH_READ 0
+#define TRACE_IMX_ETH_READ_ENABLED 0
+#define TRACE_IMX_ETH_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx_eth_read(int reg, const char *reg_name, uint32_t value) {
+ (void)reg;
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_IMX_ETH_RX_BD_FULL 0
+#define TRACE_IMX_ETH_RX_BD_FULL_ENABLED 0
+#define TRACE_IMX_ETH_RX_BD_FULL_BACKEND_DSTATE() (0)
+static inline void trace_imx_eth_rx_bd_full(void) {
+}
+#define TRACE_IMX_ETH_TX_BD_BUSY 0
+#define TRACE_IMX_ETH_TX_BD_BUSY_ENABLED 0
+#define TRACE_IMX_ETH_TX_BD_BUSY_BACKEND_DSTATE() (0)
+static inline void trace_imx_eth_tx_bd_busy(void) {
+}
+#define TRACE_IMX_ETH_WRITE 0
+#define TRACE_IMX_ETH_WRITE_ENABLED 0
+#define TRACE_IMX_ETH_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx_eth_write(int reg, const char *reg_name, uint64_t value) {
+ (void)reg;
+ (void)reg_name;
+ (void)value;
+}
+#define TRACE_IMX_FEC_READ_BD 0
+#define TRACE_IMX_FEC_READ_BD_ENABLED 0
+#define TRACE_IMX_FEC_READ_BD_BACKEND_DSTATE() (0)
+static inline void trace_imx_fec_read_bd(uint64_t addr, int flags, int len, int data) {
+ (void)addr;
+ (void)flags;
+ (void)len;
+ (void)data;
+}
+#define TRACE_IMX_FEC_RECEIVE 0
+#define TRACE_IMX_FEC_RECEIVE_ENABLED 0
+#define TRACE_IMX_FEC_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_imx_fec_receive(size_t size) {
+ (void)size;
+}
+#define TRACE_IMX_FEC_RECEIVE_LAST 0
+#define TRACE_IMX_FEC_RECEIVE_LAST_ENABLED 0
+#define TRACE_IMX_FEC_RECEIVE_LAST_BACKEND_DSTATE() (0)
+static inline void trace_imx_fec_receive_last(int last) {
+ (void)last;
+}
+#define TRACE_IMX_FEC_RECEIVE_LEN 0
+#define TRACE_IMX_FEC_RECEIVE_LEN_ENABLED 0
+#define TRACE_IMX_FEC_RECEIVE_LEN_BACKEND_DSTATE() (0)
+static inline void trace_imx_fec_receive_len(uint64_t addr, int len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_IMX_PHY_READ_NUM 0
+#define TRACE_IMX_PHY_READ_NUM_ENABLED 0
+#define TRACE_IMX_PHY_READ_NUM_BACKEND_DSTATE() (0)
+static inline void trace_imx_phy_read_num(int phy, int configured) {
+ (void)phy;
+ (void)configured;
+}
+#define TRACE_IMX_PHY_WRITE_NUM 0
+#define TRACE_IMX_PHY_WRITE_NUM_ENABLED 0
+#define TRACE_IMX_PHY_WRITE_NUM_BACKEND_DSTATE() (0)
+static inline void trace_imx_phy_write_num(int phy, int configured) {
+ (void)phy;
+ (void)configured;
+}
+#define TRACE_LAN9118_PHY_READ 0
+#define TRACE_LAN9118_PHY_READ_ENABLED 0
+#define TRACE_LAN9118_PHY_READ_BACKEND_DSTATE() (0)
+static inline void trace_lan9118_phy_read(uint16_t val, int reg) {
+ (void)val;
+ (void)reg;
+}
+#define TRACE_LAN9118_PHY_RESET 0
+#define TRACE_LAN9118_PHY_RESET_ENABLED 0
+#define TRACE_LAN9118_PHY_RESET_BACKEND_DSTATE() (0)
+static inline void trace_lan9118_phy_reset(void) {
+}
+#define TRACE_LAN9118_PHY_UPDATE_LINK 0
+#define TRACE_LAN9118_PHY_UPDATE_LINK_ENABLED 0
+#define TRACE_LAN9118_PHY_UPDATE_LINK_BACKEND_DSTATE() (0)
+static inline void trace_lan9118_phy_update_link(const char *s) {
+ (void)s;
+}
+#define TRACE_LAN9118_PHY_WRITE 0
+#define TRACE_LAN9118_PHY_WRITE_ENABLED 0
+#define TRACE_LAN9118_PHY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_lan9118_phy_write(uint16_t val, int reg) {
+ (void)val;
+ (void)reg;
+}
+#define TRACE_LANCE_MEM_READW 0
+#define TRACE_LANCE_MEM_READW_ENABLED 0
+#define TRACE_LANCE_MEM_READW_BACKEND_DSTATE() (0)
+static inline void trace_lance_mem_readw(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_LANCE_MEM_WRITEW 0
+#define TRACE_LANCE_MEM_WRITEW_ENABLED 0
+#define TRACE_LANCE_MEM_WRITEW_BACKEND_DSTATE() (0)
+static inline void trace_lance_mem_writew(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LASI_82596_MEM_READW 0
+#define TRACE_LASI_82596_MEM_READW_ENABLED 0
+#define TRACE_LASI_82596_MEM_READW_BACKEND_DSTATE() (0)
+static inline void trace_lasi_82596_mem_readw(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_LASI_82596_MEM_WRITEW 0
+#define TRACE_LASI_82596_MEM_WRITEW_ENABLED 0
+#define TRACE_LASI_82596_MEM_WRITEW_BACKEND_DSTATE() (0)
+static inline void trace_lasi_82596_mem_writew(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_NE2000_IOPORT_READ 0
+#define TRACE_NE2000_IOPORT_READ_ENABLED 0
+#define TRACE_NE2000_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_ne2000_ioport_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_NE2000_IOPORT_WRITE 0
+#define TRACE_NE2000_IOPORT_WRITE_ENABLED 0
+#define TRACE_NE2000_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ne2000_ioport_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_NE2000_READ 0
+#define TRACE_NE2000_READ_ENABLED 0
+#define TRACE_NE2000_READ_BACKEND_DSTATE() (0)
+static inline void trace_ne2000_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_NE2000_WRITE 0
+#define TRACE_NE2000_WRITE_ENABLED 0
+#define TRACE_NE2000_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ne2000_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM 0
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM_ENABLED 0
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) {
+ (void)l3hdr_off;
+ (void)csl;
+ (void)cntr;
+ (void)csum;
+ (void)csum_valid;
+}
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY 0
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY_ENABLED 0
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l3_csum_validate_entry(void) {
+}
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4 0
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4_ENABLED 0
+#define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l3_csum_validate_not_ip4(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) {
+ (void)l4hdr_off;
+ (void)csl;
+ (void)cntr;
+ (void)csum;
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_calc_entry(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_calc_ip4_tcp(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_calc_ip4_udp(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_calc_ip6_tcp(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_calc_ip6_udp(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) {
+ (void)cntr;
+ (void)csl;
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) {
+ (void)cso;
+ (void)csum;
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_fix_entry(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_fix_ip4_fragment(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_fix_not_xxp(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) {
+ (void)l4_cso;
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) {
+ (void)l4_cso;
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_validate_csum(bool csum_valid) {
+ (void)csum_valid;
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_validate_entry(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_validate_ip4_fragment(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_validate_not_xxp(void) {
+}
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM_ENABLED 0
+#define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) {
+}
+#define TRACE_NET_RX_PKT_PARSED 0
+#define TRACE_NET_RX_PKT_PARSED_ENABLED 0
+#define TRACE_NET_RX_PKT_PARSED_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_parsed(bool ip4, bool ip6, int l4proto, size_t l3o, size_t l4o, size_t l5o) {
+ (void)ip4;
+ (void)ip6;
+ (void)l4proto;
+ (void)l3o;
+ (void)l4o;
+ (void)l5o;
+}
+#define TRACE_NET_RX_PKT_RSS_ADD_CHUNK 0
+#define TRACE_NET_RX_PKT_RSS_ADD_CHUNK_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_ADD_CHUNK_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) {
+ (void)ptr;
+ (void)size;
+ (void)input_offset;
+}
+#define TRACE_NET_RX_PKT_RSS_HASH 0
+#define TRACE_NET_RX_PKT_RSS_HASH_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_HASH_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) {
+ (void)rss_length;
+ (void)rss_hash;
+}
+#define TRACE_NET_RX_PKT_RSS_IP4 0
+#define TRACE_NET_RX_PKT_RSS_IP4_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP4_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip4(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP4_TCP 0
+#define TRACE_NET_RX_PKT_RSS_IP4_TCP_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP4_TCP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip4_tcp(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP4_UDP 0
+#define TRACE_NET_RX_PKT_RSS_IP4_UDP_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP4_UDP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip4_udp(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP6 0
+#define TRACE_NET_RX_PKT_RSS_IP6_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP6_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip6(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP6_EX 0
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip6_ex(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_TCP 0
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_TCP_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_TCP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip6_ex_tcp(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_UDP 0
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_UDP_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP6_EX_UDP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip6_ex_udp(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP6_TCP 0
+#define TRACE_NET_RX_PKT_RSS_IP6_TCP_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP6_TCP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip6_tcp(void) {
+}
+#define TRACE_NET_RX_PKT_RSS_IP6_UDP 0
+#define TRACE_NET_RX_PKT_RSS_IP6_UDP_ENABLED 0
+#define TRACE_NET_RX_PKT_RSS_IP6_UDP_BACKEND_DSTATE() (0)
+static inline void trace_net_rx_pkt_rss_ip6_udp(void) {
+}
+#define TRACE_NPCM_GMAC_DEBUG_DESC_DATA 0
+#define TRACE_NPCM_GMAC_DEBUG_DESC_DATA_ENABLED 0
+#define TRACE_NPCM_GMAC_DEBUG_DESC_DATA_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_debug_desc_data(const char* name, void* addr, uint32_t des0, uint32_t des1, uint32_t des2, uint32_t des3) {
+ (void)name;
+ (void)addr;
+ (void)des0;
+ (void)des1;
+ (void)des2;
+ (void)des3;
+}
+#define TRACE_NPCM_GMAC_MDIO_ACCESS 0
+#define TRACE_NPCM_GMAC_MDIO_ACCESS_ENABLED 0
+#define TRACE_NPCM_GMAC_MDIO_ACCESS_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_mdio_access(const char *name, uint8_t is_write, uint8_t pa, uint8_t gr, uint16_t val) {
+ (void)name;
+ (void)is_write;
+ (void)pa;
+ (void)gr;
+ (void)val;
+}
+#define TRACE_NPCM_GMAC_PACKET_DESC_READ 0
+#define TRACE_NPCM_GMAC_PACKET_DESC_READ_ENABLED 0
+#define TRACE_NPCM_GMAC_PACKET_DESC_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_packet_desc_read(const char* name, uint32_t desc_addr) {
+ (void)name;
+ (void)desc_addr;
+}
+#define TRACE_NPCM_GMAC_PACKET_RECEIVE 0
+#define TRACE_NPCM_GMAC_PACKET_RECEIVE_ENABLED 0
+#define TRACE_NPCM_GMAC_PACKET_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_packet_receive(const char* name, uint32_t len) {
+ (void)name;
+ (void)len;
+}
+#define TRACE_NPCM_GMAC_PACKET_RECEIVED 0
+#define TRACE_NPCM_GMAC_PACKET_RECEIVED_ENABLED 0
+#define TRACE_NPCM_GMAC_PACKET_RECEIVED_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_packet_received(const char* name, uint32_t len) {
+ (void)name;
+ (void)len;
+}
+#define TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER 0
+#define TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER_ENABLED 0
+#define TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_packet_receiving_buffer(const char* name, uint32_t buf_len, uint32_t rx_buf_addr) {
+ (void)name;
+ (void)buf_len;
+ (void)rx_buf_addr;
+}
+#define TRACE_NPCM_GMAC_PACKET_SENT 0
+#define TRACE_NPCM_GMAC_PACKET_SENT_ENABLED 0
+#define TRACE_NPCM_GMAC_PACKET_SENT_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_packet_sent(const char* name, uint16_t len) {
+ (void)name;
+ (void)len;
+}
+#define TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA 0
+#define TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA_ENABLED 0
+#define TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_packet_tx_desc_data(const char* name, uint32_t tdes0, uint32_t tdes1) {
+ (void)name;
+ (void)tdes0;
+ (void)tdes1;
+}
+#define TRACE_NPCM_GMAC_REG_READ 0
+#define TRACE_NPCM_GMAC_REG_READ_ENABLED 0
+#define TRACE_NPCM_GMAC_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_reg_read(const char *name, uint64_t offset, uint32_t value) {
+ (void)name;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM_GMAC_REG_WRITE 0
+#define TRACE_NPCM_GMAC_REG_WRITE_ENABLED 0
+#define TRACE_NPCM_GMAC_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_reg_write(const char *name, uint64_t offset, uint32_t value) {
+ (void)name;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM_GMAC_RESET 0
+#define TRACE_NPCM_GMAC_RESET_ENABLED 0
+#define TRACE_NPCM_GMAC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_reset(const char *name, uint16_t value) {
+ (void)name;
+ (void)value;
+}
+#define TRACE_NPCM_GMAC_SET_LINK 0
+#define TRACE_NPCM_GMAC_SET_LINK_ENABLED 0
+#define TRACE_NPCM_GMAC_SET_LINK_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_set_link(bool active) {
+ (void)active;
+}
+#define TRACE_NPCM_GMAC_TX_DESC_OWNER 0
+#define TRACE_NPCM_GMAC_TX_DESC_OWNER_ENABLED 0
+#define TRACE_NPCM_GMAC_TX_DESC_OWNER_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_tx_desc_owner(const char* name, uint32_t desc_addr) {
+ (void)name;
+ (void)desc_addr;
+}
+#define TRACE_NPCM_GMAC_UPDATE_IRQ 0
+#define TRACE_NPCM_GMAC_UPDATE_IRQ_ENABLED 0
+#define TRACE_NPCM_GMAC_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_npcm_gmac_update_irq(const char *name, uint32_t status, uint32_t intr_en, int level) {
+ (void)name;
+ (void)status;
+ (void)intr_en;
+ (void)level;
+}
+#define TRACE_NPCM_PCS_REG_READ 0
+#define TRACE_NPCM_PCS_REG_READ_ENABLED 0
+#define TRACE_NPCM_PCS_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm_pcs_reg_read(const char *name, uint16_t indirect_access_base, uint64_t offset, uint16_t value) {
+ (void)name;
+ (void)indirect_access_base;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM_PCS_REG_WRITE 0
+#define TRACE_NPCM_PCS_REG_WRITE_ENABLED 0
+#define TRACE_NPCM_PCS_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm_pcs_reg_write(const char *name, uint16_t indirect_access_base, uint64_t offset, uint16_t value) {
+ (void)name;
+ (void)indirect_access_base;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_EMC_CAN_RECEIVE 0
+#define TRACE_NPCM7XX_EMC_CAN_RECEIVE_ENABLED 0
+#define TRACE_NPCM7XX_EMC_CAN_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_can_receive(int can_receive) {
+ (void)can_receive;
+}
+#define TRACE_NPCM7XX_EMC_CPU_OWNED_DESC 0
+#define TRACE_NPCM7XX_EMC_CPU_OWNED_DESC_ENABLED 0
+#define TRACE_NPCM7XX_EMC_CPU_OWNED_DESC_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_cpu_owned_desc(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_NPCM7XX_EMC_PACKET_DROPPED 0
+#define TRACE_NPCM7XX_EMC_PACKET_DROPPED_ENABLED 0
+#define TRACE_NPCM7XX_EMC_PACKET_DROPPED_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_packet_dropped(uint32_t len) {
+ (void)len;
+}
+#define TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT 0
+#define TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT_ENABLED 0
+#define TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_packet_filtered_out(const char* fail_reason) {
+ (void)fail_reason;
+}
+#define TRACE_NPCM7XX_EMC_RECEIVED_PACKET 0
+#define TRACE_NPCM7XX_EMC_RECEIVED_PACKET_ENABLED 0
+#define TRACE_NPCM7XX_EMC_RECEIVED_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_received_packet(uint32_t len) {
+ (void)len;
+}
+#define TRACE_NPCM7XX_EMC_RECEIVING_PACKET 0
+#define TRACE_NPCM7XX_EMC_RECEIVING_PACKET_ENABLED 0
+#define TRACE_NPCM7XX_EMC_RECEIVING_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_receiving_packet(uint32_t len) {
+ (void)len;
+}
+#define TRACE_NPCM7XX_EMC_REG_READ 0
+#define TRACE_NPCM7XX_EMC_REG_READ_ENABLED 0
+#define TRACE_NPCM7XX_EMC_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_reg_read(int emc_num, uint32_t result, const char *name, int regno) {
+ (void)emc_num;
+ (void)result;
+ (void)name;
+ (void)regno;
+}
+#define TRACE_NPCM7XX_EMC_REG_WRITE 0
+#define TRACE_NPCM7XX_EMC_REG_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_EMC_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_reg_write(int emc_num, const char *name, int regno, uint32_t value) {
+ (void)emc_num;
+ (void)name;
+ (void)regno;
+ (void)value;
+}
+#define TRACE_NPCM7XX_EMC_RESET 0
+#define TRACE_NPCM7XX_EMC_RESET_ENABLED 0
+#define TRACE_NPCM7XX_EMC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_reset(int emc_num) {
+ (void)emc_num;
+}
+#define TRACE_NPCM7XX_EMC_RX_DONE 0
+#define TRACE_NPCM7XX_EMC_RX_DONE_ENABLED 0
+#define TRACE_NPCM7XX_EMC_RX_DONE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_rx_done(uint32_t crxdsa) {
+ (void)crxdsa;
+}
+#define TRACE_NPCM7XX_EMC_SENT_PACKET 0
+#define TRACE_NPCM7XX_EMC_SENT_PACKET_ENABLED 0
+#define TRACE_NPCM7XX_EMC_SENT_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_sent_packet(uint32_t len) {
+ (void)len;
+}
+#define TRACE_NPCM7XX_EMC_SET_MISTA 0
+#define TRACE_NPCM7XX_EMC_SET_MISTA_ENABLED 0
+#define TRACE_NPCM7XX_EMC_SET_MISTA_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_set_mista(uint32_t flags) {
+ (void)flags;
+}
+#define TRACE_NPCM7XX_EMC_TX_DONE 0
+#define TRACE_NPCM7XX_EMC_TX_DONE_ENABLED 0
+#define TRACE_NPCM7XX_EMC_TX_DONE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_tx_done(uint32_t ctxdsa) {
+ (void)ctxdsa;
+}
+#define TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ 0
+#define TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ_ENABLED 0
+#define TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_update_rx_irq(int level) {
+ (void)level;
+}
+#define TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ 0
+#define TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ_ENABLED 0
+#define TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_emc_update_tx_irq(int level) {
+ (void)level;
+}
+#define TRACE_OPEN_ETH_DESC_READ 0
+#define TRACE_OPEN_ETH_DESC_READ_ENABLED 0
+#define TRACE_OPEN_ETH_DESC_READ_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_desc_read(uint32_t addr, uint32_t v) {
+ (void)addr;
+ (void)v;
+}
+#define TRACE_OPEN_ETH_DESC_WRITE 0
+#define TRACE_OPEN_ETH_DESC_WRITE_ENABLED 0
+#define TRACE_OPEN_ETH_DESC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_desc_write(uint32_t addr, uint32_t v) {
+ (void)addr;
+ (void)v;
+}
+#define TRACE_OPEN_ETH_MII_READ 0
+#define TRACE_OPEN_ETH_MII_READ_ENABLED 0
+#define TRACE_OPEN_ETH_MII_READ_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_mii_read(unsigned idx, uint16_t v) {
+ (void)idx;
+ (void)v;
+}
+#define TRACE_OPEN_ETH_MII_WRITE 0
+#define TRACE_OPEN_ETH_MII_WRITE_ENABLED 0
+#define TRACE_OPEN_ETH_MII_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_mii_write(unsigned idx, uint16_t v) {
+ (void)idx;
+ (void)v;
+}
+#define TRACE_OPEN_ETH_RECEIVE 0
+#define TRACE_OPEN_ETH_RECEIVE_ENABLED 0
+#define TRACE_OPEN_ETH_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_receive(unsigned len) {
+ (void)len;
+}
+#define TRACE_OPEN_ETH_RECEIVE_DESC 0
+#define TRACE_OPEN_ETH_RECEIVE_DESC_ENABLED 0
+#define TRACE_OPEN_ETH_RECEIVE_DESC_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_receive_desc(uint32_t addr, uint32_t len_flags) {
+ (void)addr;
+ (void)len_flags;
+}
+#define TRACE_OPEN_ETH_RECEIVE_MCAST 0
+#define TRACE_OPEN_ETH_RECEIVE_MCAST_ENABLED 0
+#define TRACE_OPEN_ETH_RECEIVE_MCAST_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) {
+ (void)idx;
+ (void)h0;
+ (void)h1;
+}
+#define TRACE_OPEN_ETH_RECEIVE_REJECT 0
+#define TRACE_OPEN_ETH_RECEIVE_REJECT_ENABLED 0
+#define TRACE_OPEN_ETH_RECEIVE_REJECT_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_receive_reject(void) {
+}
+#define TRACE_OPEN_ETH_REG_READ 0
+#define TRACE_OPEN_ETH_REG_READ_ENABLED 0
+#define TRACE_OPEN_ETH_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_reg_read(uint32_t addr, uint32_t v) {
+ (void)addr;
+ (void)v;
+}
+#define TRACE_OPEN_ETH_REG_WRITE 0
+#define TRACE_OPEN_ETH_REG_WRITE_ENABLED 0
+#define TRACE_OPEN_ETH_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_reg_write(uint32_t addr, uint32_t v) {
+ (void)addr;
+ (void)v;
+}
+#define TRACE_OPEN_ETH_START_XMIT 0
+#define TRACE_OPEN_ETH_START_XMIT_ENABLED 0
+#define TRACE_OPEN_ETH_START_XMIT_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) {
+ (void)addr;
+ (void)len;
+ (void)tx_len;
+}
+#define TRACE_OPEN_ETH_UPDATE_IRQ 0
+#define TRACE_OPEN_ETH_UPDATE_IRQ_ENABLED 0
+#define TRACE_OPEN_ETH_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_open_eth_update_irq(uint32_t v) {
+ (void)v;
+}
+#define TRACE_PCNET_APROM_READB 0
+#define TRACE_PCNET_APROM_READB_ENABLED 0
+#define TRACE_PCNET_APROM_READB_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) {
+ (void)opaque;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PCNET_APROM_WRITEB 0
+#define TRACE_PCNET_APROM_WRITEB_ENABLED 0
+#define TRACE_PCNET_APROM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) {
+ (void)opaque;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PCNET_INIT 0
+#define TRACE_PCNET_INIT_ENABLED 0
+#define TRACE_PCNET_INIT_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_init(void *s, uint64_t init_addr) {
+ (void)s;
+ (void)init_addr;
+}
+#define TRACE_PCNET_IOPORT_READ 0
+#define TRACE_PCNET_IOPORT_READ_ENABLED 0
+#define TRACE_PCNET_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) {
+ (void)opaque;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PCNET_IOPORT_WRITE 0
+#define TRACE_PCNET_IOPORT_WRITE_ENABLED 0
+#define TRACE_PCNET_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) {
+ (void)opaque;
+ (void)addr;
+ (void)data;
+ (void)size;
+}
+#define TRACE_PCNET_ISR_CHANGE 0
+#define TRACE_PCNET_ISR_CHANGE_ENABLED 0
+#define TRACE_PCNET_ISR_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) {
+ (void)s;
+ (void)isr;
+ (void)isr_old;
+}
+#define TRACE_PCNET_RLEN_TLEN 0
+#define TRACE_PCNET_RLEN_TLEN_ENABLED 0
+#define TRACE_PCNET_RLEN_TLEN_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) {
+ (void)s;
+ (void)rlen;
+ (void)tlen;
+}
+#define TRACE_PCNET_S_RESET 0
+#define TRACE_PCNET_S_RESET_ENABLED 0
+#define TRACE_PCNET_S_RESET_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_s_reset(void *s) {
+ (void)s;
+}
+#define TRACE_PCNET_SS32_RDRA_TDRA 0
+#define TRACE_PCNET_SS32_RDRA_TDRA_ENABLED 0
+#define TRACE_PCNET_SS32_RDRA_TDRA_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) {
+ (void)s;
+ (void)ss32;
+ (void)rdra;
+ (void)rcvrl;
+ (void)tdra;
+ (void)xmtrl;
+}
+#define TRACE_PCNET_USER_INT 0
+#define TRACE_PCNET_USER_INT_ENABLED 0
+#define TRACE_PCNET_USER_INT_BACKEND_DSTATE() (0)
+static inline void trace_pcnet_user_int(void *s) {
+ (void)s;
+}
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE 0
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE_ENABLED 0
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_add_rxbuf_to_page(uint32_t ptr, uint32_t rx_bufs, uint64_t bd) {
+ (void)ptr;
+ (void)rx_bufs;
+ (void)bd;
+}
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL 0
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_ENABLED 0
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_add_rxbuf_to_pool(int pool, uint64_t len, int32_t count) {
+ (void)pool;
+ (void)len;
+ (void)count;
+}
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE 0
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE_ENABLED 0
+#define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_add_rxbuf_to_pool_create(int pool, uint64_t len) {
+ (void)pool;
+ (void)len;
+}
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE 0
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_ENABLED 0
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_get_rx_bd_from_page(int buf_ptr, uint64_t bd) {
+ (void)buf_ptr;
+ (void)bd;
+}
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND 0
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND_ENABLED 0
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_ptr, uint32_t rx_bufs) {
+ (void)use_buf_ptr;
+ (void)rx_bufs;
+}
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND 0
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND_ENABLED 0
+#define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_get_rx_bd_from_pool_found(int pool, int32_t count, uint32_t rx_bufs) {
+ (void)pool;
+ (void)count;
+ (void)rx_bufs;
+}
+#define TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER 0
+#define TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER_ENABLED 0
+#define TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_h_add_logical_lan_buffer(uint64_t reg, uint64_t buf) {
+ (void)reg;
+ (void)buf;
+}
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_ENABLED 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_h_send_logical_lan(uint64_t reg, uint64_t continue_token) {
+ (void)reg;
+ (void)continue_token;
+}
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC_ENABLED 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) {
+ (void)buf;
+}
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS_ENABLED 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) {
+ (void)rx_bufs;
+}
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL_ENABLED 0
+#define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) {
+ (void)nbufs;
+ (void)total_len;
+}
+#define TRACE_SPAPR_VLAN_RECEIVE 0
+#define TRACE_SPAPR_VLAN_RECEIVE_ENABLED 0
+#define TRACE_SPAPR_VLAN_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_receive(const char *id, uint32_t rx_bufs) {
+ (void)id;
+ (void)rx_bufs;
+}
+#define TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED 0
+#define TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED_ENABLED 0
+#define TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_receive_dma_completed(void) {
+}
+#define TRACE_SPAPR_VLAN_RECEIVE_WROTE 0
+#define TRACE_SPAPR_VLAN_RECEIVE_WROTE_ENABLED 0
+#define TRACE_SPAPR_VLAN_RECEIVE_WROTE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vlan_receive_wrote(uint64_t ptr, uint64_t hi, uint64_t lo) {
+ (void)ptr;
+ (void)hi;
+ (void)lo;
+}
+#define TRACE_SUNGEM_MII_INVALID_OP 0
+#define TRACE_SUNGEM_MII_INVALID_OP_ENABLED 0
+#define TRACE_SUNGEM_MII_INVALID_OP_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mii_invalid_op(uint8_t op) {
+ (void)op;
+}
+#define TRACE_SUNGEM_MII_INVALID_SOF 0
+#define TRACE_SUNGEM_MII_INVALID_SOF_ENABLED 0
+#define TRACE_SUNGEM_MII_INVALID_SOF_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mii_invalid_sof(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SUNGEM_MII_READ 0
+#define TRACE_SUNGEM_MII_READ_ENABLED 0
+#define TRACE_SUNGEM_MII_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mii_read(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) {
+ (void)phy_addr;
+ (void)reg_addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MII_WRITE 0
+#define TRACE_SUNGEM_MII_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MII_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mii_write(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) {
+ (void)phy_addr;
+ (void)reg_addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_GREG_READ 0
+#define TRACE_SUNGEM_MMIO_GREG_READ_ENABLED 0
+#define TRACE_SUNGEM_MMIO_GREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_greg_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_GREG_WRITE 0
+#define TRACE_SUNGEM_MMIO_GREG_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MMIO_GREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_greg_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_MAC_READ 0
+#define TRACE_SUNGEM_MMIO_MAC_READ_ENABLED 0
+#define TRACE_SUNGEM_MMIO_MAC_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_mac_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_MAC_WRITE 0
+#define TRACE_SUNGEM_MMIO_MAC_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MMIO_MAC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_mac_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_MIF_READ 0
+#define TRACE_SUNGEM_MMIO_MIF_READ_ENABLED 0
+#define TRACE_SUNGEM_MMIO_MIF_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_mif_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_MIF_WRITE 0
+#define TRACE_SUNGEM_MMIO_MIF_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MMIO_MIF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_mif_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_PCS_READ 0
+#define TRACE_SUNGEM_MMIO_PCS_READ_ENABLED 0
+#define TRACE_SUNGEM_MMIO_PCS_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_pcs_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_PCS_WRITE 0
+#define TRACE_SUNGEM_MMIO_PCS_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MMIO_PCS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_pcs_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_RXDMA_READ 0
+#define TRACE_SUNGEM_MMIO_RXDMA_READ_ENABLED 0
+#define TRACE_SUNGEM_MMIO_RXDMA_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_rxdma_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_RXDMA_WRITE 0
+#define TRACE_SUNGEM_MMIO_RXDMA_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MMIO_RXDMA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_rxdma_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_TXDMA_READ 0
+#define TRACE_SUNGEM_MMIO_TXDMA_READ_ENABLED 0
+#define TRACE_SUNGEM_MMIO_TXDMA_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_txdma_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_TXDMA_WRITE 0
+#define TRACE_SUNGEM_MMIO_TXDMA_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MMIO_TXDMA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_txdma_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_WOL_READ 0
+#define TRACE_SUNGEM_MMIO_WOL_READ_ENABLED 0
+#define TRACE_SUNGEM_MMIO_WOL_READ_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_wol_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_MMIO_WOL_WRITE 0
+#define TRACE_SUNGEM_MMIO_WOL_WRITE_ENABLED 0
+#define TRACE_SUNGEM_MMIO_WOL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_mmio_wol_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUNGEM_RESET 0
+#define TRACE_SUNGEM_RESET_ENABLED 0
+#define TRACE_SUNGEM_RESET_BACKEND_DSTATE() (0)
+static inline void trace_sungem_reset(bool pci_reset) {
+ (void)pci_reset;
+}
+#define TRACE_SUNGEM_RX_BAD_FRAME_SIZE 0
+#define TRACE_SUNGEM_RX_BAD_FRAME_SIZE_ENABLED 0
+#define TRACE_SUNGEM_RX_BAD_FRAME_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_bad_frame_size(size_t size) {
+ (void)size;
+}
+#define TRACE_SUNGEM_RX_CHECK 0
+#define TRACE_SUNGEM_RX_CHECK_ENABLED 0
+#define TRACE_SUNGEM_RX_CHECK_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_check(bool full, uint32_t kick, uint32_t done) {
+ (void)full;
+ (void)kick;
+ (void)done;
+}
+#define TRACE_SUNGEM_RX_DESC 0
+#define TRACE_SUNGEM_RX_DESC_ENABLED 0
+#define TRACE_SUNGEM_RX_DESC_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_desc(uint64_t control, uint64_t buffer) {
+ (void)control;
+ (void)buffer;
+}
+#define TRACE_SUNGEM_RX_DISABLED 0
+#define TRACE_SUNGEM_RX_DISABLED_ENABLED 0
+#define TRACE_SUNGEM_RX_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_disabled(void) {
+}
+#define TRACE_SUNGEM_RX_KICK 0
+#define TRACE_SUNGEM_RX_KICK_ENABLED 0
+#define TRACE_SUNGEM_RX_KICK_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_kick(uint64_t val) {
+ (void)val;
+}
+#define TRACE_SUNGEM_RX_MAC_CHECK 0
+#define TRACE_SUNGEM_RX_MAC_CHECK_ENABLED 0
+#define TRACE_SUNGEM_RX_MAC_CHECK_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_mac_check(uint32_t mac0, uint32_t mac1, uint32_t mac2) {
+ (void)mac0;
+ (void)mac1;
+ (void)mac2;
+}
+#define TRACE_SUNGEM_RX_MAC_COMPARE 0
+#define TRACE_SUNGEM_RX_MAC_COMPARE_ENABLED 0
+#define TRACE_SUNGEM_RX_MAC_COMPARE_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_mac_compare(uint32_t mac0, uint32_t mac1, uint32_t mac2) {
+ (void)mac0;
+ (void)mac1;
+ (void)mac2;
+}
+#define TRACE_SUNGEM_RX_MAC_DISABLED 0
+#define TRACE_SUNGEM_RX_MAC_DISABLED_ENABLED 0
+#define TRACE_SUNGEM_RX_MAC_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_mac_disabled(void) {
+}
+#define TRACE_SUNGEM_RX_MAC_MULTICAST 0
+#define TRACE_SUNGEM_RX_MAC_MULTICAST_ENABLED 0
+#define TRACE_SUNGEM_RX_MAC_MULTICAST_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_mac_multicast(void) {
+}
+#define TRACE_SUNGEM_RX_PACKET 0
+#define TRACE_SUNGEM_RX_PACKET_ENABLED 0
+#define TRACE_SUNGEM_RX_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_packet(size_t size) {
+ (void)size;
+}
+#define TRACE_SUNGEM_RX_PROCESS 0
+#define TRACE_SUNGEM_RX_PROCESS_ENABLED 0
+#define TRACE_SUNGEM_RX_PROCESS_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_process(uint32_t done, uint32_t kick, uint32_t size) {
+ (void)done;
+ (void)kick;
+ (void)size;
+}
+#define TRACE_SUNGEM_RX_RESET 0
+#define TRACE_SUNGEM_RX_RESET_ENABLED 0
+#define TRACE_SUNGEM_RX_RESET_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_reset(void) {
+}
+#define TRACE_SUNGEM_RX_RINGFULL 0
+#define TRACE_SUNGEM_RX_RINGFULL_ENABLED 0
+#define TRACE_SUNGEM_RX_RINGFULL_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_ringfull(void) {
+}
+#define TRACE_SUNGEM_RX_TXDMA_DISABLED 0
+#define TRACE_SUNGEM_RX_TXDMA_DISABLED_ENABLED 0
+#define TRACE_SUNGEM_RX_TXDMA_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_txdma_disabled(void) {
+}
+#define TRACE_SUNGEM_RX_UNMATCHED 0
+#define TRACE_SUNGEM_RX_UNMATCHED_ENABLED 0
+#define TRACE_SUNGEM_RX_UNMATCHED_BACKEND_DSTATE() (0)
+static inline void trace_sungem_rx_unmatched(void) {
+}
+#define TRACE_SUNGEM_TX_CHECKSUM 0
+#define TRACE_SUNGEM_TX_CHECKSUM_ENABLED 0
+#define TRACE_SUNGEM_TX_CHECKSUM_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_checksum(uint16_t start, uint16_t off) {
+ (void)start;
+ (void)off;
+}
+#define TRACE_SUNGEM_TX_CHECKSUM_OOB 0
+#define TRACE_SUNGEM_TX_CHECKSUM_OOB_ENABLED 0
+#define TRACE_SUNGEM_TX_CHECKSUM_OOB_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_checksum_oob(void) {
+}
+#define TRACE_SUNGEM_TX_DESC 0
+#define TRACE_SUNGEM_TX_DESC_ENABLED 0
+#define TRACE_SUNGEM_TX_DESC_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_desc(uint32_t comp, uint64_t control, uint64_t buffer) {
+ (void)comp;
+ (void)control;
+ (void)buffer;
+}
+#define TRACE_SUNGEM_TX_DISABLED 0
+#define TRACE_SUNGEM_TX_DISABLED_ENABLED 0
+#define TRACE_SUNGEM_TX_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_disabled(void) {
+}
+#define TRACE_SUNGEM_TX_FINISHED 0
+#define TRACE_SUNGEM_TX_FINISHED_ENABLED 0
+#define TRACE_SUNGEM_TX_FINISHED_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_finished(uint32_t size) {
+ (void)size;
+}
+#define TRACE_SUNGEM_TX_KICK 0
+#define TRACE_SUNGEM_TX_KICK_ENABLED 0
+#define TRACE_SUNGEM_TX_KICK_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_kick(void) {
+}
+#define TRACE_SUNGEM_TX_OVERFLOW 0
+#define TRACE_SUNGEM_TX_OVERFLOW_ENABLED 0
+#define TRACE_SUNGEM_TX_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_overflow(void) {
+}
+#define TRACE_SUNGEM_TX_PROCESS 0
+#define TRACE_SUNGEM_TX_PROCESS_ENABLED 0
+#define TRACE_SUNGEM_TX_PROCESS_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_process(uint32_t comp, uint32_t kick, uint32_t size) {
+ (void)comp;
+ (void)kick;
+ (void)size;
+}
+#define TRACE_SUNGEM_TX_RESET 0
+#define TRACE_SUNGEM_TX_RESET_ENABLED 0
+#define TRACE_SUNGEM_TX_RESET_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_reset(void) {
+}
+#define TRACE_SUNGEM_TX_UNFINISHED 0
+#define TRACE_SUNGEM_TX_UNFINISHED_ENABLED 0
+#define TRACE_SUNGEM_TX_UNFINISHED_BACKEND_DSTATE() (0)
+static inline void trace_sungem_tx_unfinished(void) {
+}
+#define TRACE_SUNHME_ERX_READ 0
+#define TRACE_SUNHME_ERX_READ_ENABLED 0
+#define TRACE_SUNHME_ERX_READ_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_erx_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_ERX_WRITE 0
+#define TRACE_SUNHME_ERX_WRITE_ENABLED 0
+#define TRACE_SUNHME_ERX_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_erx_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_ETX_READ 0
+#define TRACE_SUNHME_ETX_READ_ENABLED 0
+#define TRACE_SUNHME_ETX_READ_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_etx_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_ETX_WRITE 0
+#define TRACE_SUNHME_ETX_WRITE_ENABLED 0
+#define TRACE_SUNHME_ETX_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_etx_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_MAC_READ 0
+#define TRACE_SUNHME_MAC_READ_ENABLED 0
+#define TRACE_SUNHME_MAC_READ_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_mac_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_MAC_WRITE 0
+#define TRACE_SUNHME_MAC_WRITE_ENABLED 0
+#define TRACE_SUNHME_MAC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_mac_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_MIF_READ 0
+#define TRACE_SUNHME_MIF_READ_ENABLED 0
+#define TRACE_SUNHME_MIF_READ_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_mif_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_MIF_WRITE 0
+#define TRACE_SUNHME_MIF_WRITE_ENABLED 0
+#define TRACE_SUNHME_MIF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_mif_write(uint8_t addr, uint16_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_MII_READ 0
+#define TRACE_SUNHME_MII_READ_ENABLED 0
+#define TRACE_SUNHME_MII_READ_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_mii_read(uint8_t addr, uint16_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_MII_WRITE 0
+#define TRACE_SUNHME_MII_WRITE_ENABLED 0
+#define TRACE_SUNHME_MII_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_mii_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_RX_DESC 0
+#define TRACE_SUNHME_RX_DESC_ENABLED 0
+#define TRACE_SUNHME_RX_DESC_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) {
+ (void)addr;
+ (void)offset;
+ (void)status;
+ (void)len;
+ (void)cr;
+ (void)nr;
+}
+#define TRACE_SUNHME_RX_FILTER_ACCEPT 0
+#define TRACE_SUNHME_RX_FILTER_ACCEPT_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_ACCEPT_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_accept(void) {
+}
+#define TRACE_SUNHME_RX_FILTER_BCAST_MATCH 0
+#define TRACE_SUNHME_RX_FILTER_BCAST_MATCH_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_BCAST_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_bcast_match(void) {
+}
+#define TRACE_SUNHME_RX_FILTER_DESTMAC 0
+#define TRACE_SUNHME_RX_FILTER_DESTMAC_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_DESTMAC_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_destmac(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_SUNHME_RX_FILTER_HASH_MATCH 0
+#define TRACE_SUNHME_RX_FILTER_HASH_MATCH_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_HASH_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_hash_match(void) {
+}
+#define TRACE_SUNHME_RX_FILTER_HASH_NOMATCH 0
+#define TRACE_SUNHME_RX_FILTER_HASH_NOMATCH_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_HASH_NOMATCH_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_hash_nomatch(void) {
+}
+#define TRACE_SUNHME_RX_FILTER_LOCAL_MATCH 0
+#define TRACE_SUNHME_RX_FILTER_LOCAL_MATCH_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_LOCAL_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_local_match(void) {
+}
+#define TRACE_SUNHME_RX_FILTER_PROMISC_MATCH 0
+#define TRACE_SUNHME_RX_FILTER_PROMISC_MATCH_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_PROMISC_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_promisc_match(void) {
+}
+#define TRACE_SUNHME_RX_FILTER_REJECT 0
+#define TRACE_SUNHME_RX_FILTER_REJECT_ENABLED 0
+#define TRACE_SUNHME_RX_FILTER_REJECT_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_filter_reject(void) {
+}
+#define TRACE_SUNHME_RX_INCOMING 0
+#define TRACE_SUNHME_RX_INCOMING_ENABLED 0
+#define TRACE_SUNHME_RX_INCOMING_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_incoming(size_t len) {
+ (void)len;
+}
+#define TRACE_SUNHME_RX_NORXD 0
+#define TRACE_SUNHME_RX_NORXD_ENABLED 0
+#define TRACE_SUNHME_RX_NORXD_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_norxd(void) {
+}
+#define TRACE_SUNHME_RX_XSUM_CALC 0
+#define TRACE_SUNHME_RX_XSUM_CALC_ENABLED 0
+#define TRACE_SUNHME_RX_XSUM_CALC_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_rx_xsum_calc(uint16_t xsum) {
+ (void)xsum;
+}
+#define TRACE_SUNHME_SEB_READ 0
+#define TRACE_SUNHME_SEB_READ_ENABLED 0
+#define TRACE_SUNHME_SEB_READ_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_seb_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_SEB_WRITE 0
+#define TRACE_SUNHME_SEB_WRITE_ENABLED 0
+#define TRACE_SUNHME_SEB_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_seb_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUNHME_TX_DESC 0
+#define TRACE_SUNHME_TX_DESC_ENABLED 0
+#define TRACE_SUNHME_TX_DESC_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_tx_desc(uint64_t buffer, uint32_t status, int cr, int nr) {
+ (void)buffer;
+ (void)status;
+ (void)cr;
+ (void)nr;
+}
+#define TRACE_SUNHME_TX_DONE 0
+#define TRACE_SUNHME_TX_DONE_ENABLED 0
+#define TRACE_SUNHME_TX_DONE_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_tx_done(int len) {
+ (void)len;
+}
+#define TRACE_SUNHME_TX_XSUM_ADD 0
+#define TRACE_SUNHME_TX_XSUM_ADD_ENABLED 0
+#define TRACE_SUNHME_TX_XSUM_ADD_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_tx_xsum_add(int offset, int len) {
+ (void)offset;
+ (void)len;
+}
+#define TRACE_SUNHME_TX_XSUM_STUFF 0
+#define TRACE_SUNHME_TX_XSUM_STUFF_ENABLED 0
+#define TRACE_SUNHME_TX_XSUM_STUFF_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_tx_xsum_stuff(uint16_t xsum, int offset) {
+ (void)xsum;
+ (void)offset;
+}
+#define TRACE_SUNHME_UPDATE_IRQ 0
+#define TRACE_SUNHME_UPDATE_IRQ_ENABLED 0
+#define TRACE_SUNHME_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sunhme_update_irq(uint32_t mifmask, uint32_t mif, uint32_t sebmask, uint32_t seb, int level) {
+ (void)mifmask;
+ (void)mif;
+ (void)sebmask;
+ (void)seb;
+ (void)level;
+}
+#define TRACE_TULIP_DESCRIPTOR 0
+#define TRACE_TULIP_DESCRIPTOR_ENABLED 0
+#define TRACE_TULIP_DESCRIPTOR_BACKEND_DSTATE() (0)
+static inline void trace_tulip_descriptor(const char *prefix, uint32_t addr, uint32_t status, uint32_t control, uint32_t len1, uint32_t len2, uint32_t buf1, uint32_t buf2) {
+ (void)prefix;
+ (void)addr;
+ (void)status;
+ (void)control;
+ (void)len1;
+ (void)len2;
+ (void)buf1;
+ (void)buf2;
+}
+#define TRACE_TULIP_IRQ 0
+#define TRACE_TULIP_IRQ_ENABLED 0
+#define TRACE_TULIP_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_tulip_irq(uint32_t mask, uint32_t en, const char *state) {
+ (void)mask;
+ (void)en;
+ (void)state;
+}
+#define TRACE_TULIP_MII_READ 0
+#define TRACE_TULIP_MII_READ_ENABLED 0
+#define TRACE_TULIP_MII_READ_BACKEND_DSTATE() (0)
+static inline void trace_tulip_mii_read(int phy, int reg, uint16_t data) {
+ (void)phy;
+ (void)reg;
+ (void)data;
+}
+#define TRACE_TULIP_MII_WRITE 0
+#define TRACE_TULIP_MII_WRITE_ENABLED 0
+#define TRACE_TULIP_MII_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tulip_mii_write(int phy, int reg, uint16_t data) {
+ (void)phy;
+ (void)reg;
+ (void)data;
+}
+#define TRACE_TULIP_RECEIVE 0
+#define TRACE_TULIP_RECEIVE_ENABLED 0
+#define TRACE_TULIP_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_tulip_receive(const uint8_t *buf, size_t len) {
+ (void)buf;
+ (void)len;
+}
+#define TRACE_TULIP_REG_READ 0
+#define TRACE_TULIP_REG_READ_ENABLED 0
+#define TRACE_TULIP_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_tulip_reg_read(uint64_t addr, const char *name, int size, uint64_t val) {
+ (void)addr;
+ (void)name;
+ (void)size;
+ (void)val;
+}
+#define TRACE_TULIP_REG_WRITE 0
+#define TRACE_TULIP_REG_WRITE_ENABLED 0
+#define TRACE_TULIP_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tulip_reg_write(uint64_t addr, const char *name, int size, uint64_t val) {
+ (void)addr;
+ (void)name;
+ (void)size;
+ (void)val;
+}
+#define TRACE_TULIP_RESET 0
+#define TRACE_TULIP_RESET_ENABLED 0
+#define TRACE_TULIP_RESET_BACKEND_DSTATE() (0)
+static inline void trace_tulip_reset(void) {
+}
+#define TRACE_TULIP_RX_STATE 0
+#define TRACE_TULIP_RX_STATE_ENABLED 0
+#define TRACE_TULIP_RX_STATE_BACKEND_DSTATE() (0)
+static inline void trace_tulip_rx_state(const char *state) {
+ (void)state;
+}
+#define TRACE_TULIP_SETUP_FILTER 0
+#define TRACE_TULIP_SETUP_FILTER_ENABLED 0
+#define TRACE_TULIP_SETUP_FILTER_BACKEND_DSTATE() (0)
+static inline void trace_tulip_setup_filter(int n, uint8_t a, uint8_t b, uint8_t c, uint8_t d, uint8_t e, uint8_t f) {
+ (void)n;
+ (void)a;
+ (void)b;
+ (void)c;
+ (void)d;
+ (void)e;
+ (void)f;
+}
+#define TRACE_TULIP_SETUP_FRAME 0
+#define TRACE_TULIP_SETUP_FRAME_ENABLED 0
+#define TRACE_TULIP_SETUP_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_tulip_setup_frame(void) {
+}
+#define TRACE_TULIP_TX_STATE 0
+#define TRACE_TULIP_TX_STATE_ENABLED 0
+#define TRACE_TULIP_TX_STATE_BACKEND_DSTATE() (0)
+static inline void trace_tulip_tx_state(const char *state) {
+ (void)state;
+}
+#define TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY 0
+#define TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY_ENABLED 0
+#define TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_announce_notify(void) {
+}
+#define TRACE_VIRTIO_NET_ANNOUNCE_TIMER 0
+#define TRACE_VIRTIO_NET_ANNOUNCE_TIMER_ENABLED 0
+#define TRACE_VIRTIO_NET_ANNOUNCE_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_announce_timer(int round) {
+ (void)round;
+}
+#define TRACE_VIRTIO_NET_HANDLE_ANNOUNCE 0
+#define TRACE_VIRTIO_NET_HANDLE_ANNOUNCE_ENABLED 0
+#define TRACE_VIRTIO_NET_HANDLE_ANNOUNCE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_handle_announce(int round) {
+ (void)round;
+}
+#define TRACE_VIRTIO_NET_POST_LOAD_DEVICE 0
+#define TRACE_VIRTIO_NET_POST_LOAD_DEVICE_ENABLED 0
+#define TRACE_VIRTIO_NET_POST_LOAD_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_post_load_device(void) {
+}
+#define TRACE_VIRTIO_NET_RSS_ATTACH_EBPF 0
+#define TRACE_VIRTIO_NET_RSS_ATTACH_EBPF_ENABLED 0
+#define TRACE_VIRTIO_NET_RSS_ATTACH_EBPF_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_rss_attach_ebpf(void *nic, int prog_fd) {
+ (void)nic;
+ (void)prog_fd;
+}
+#define TRACE_VIRTIO_NET_RSS_DISABLE 0
+#define TRACE_VIRTIO_NET_RSS_DISABLE_ENABLED 0
+#define TRACE_VIRTIO_NET_RSS_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_rss_disable(void *nic) {
+ (void)nic;
+}
+#define TRACE_VIRTIO_NET_RSS_ENABLE 0
+#define TRACE_VIRTIO_NET_RSS_ENABLE_ENABLED 0
+#define TRACE_VIRTIO_NET_RSS_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_rss_enable(void *nic, uint32_t p1, uint16_t p2, uint8_t p3) {
+ (void)nic;
+ (void)p1;
+ (void)p2;
+ (void)p3;
+}
+#define TRACE_VIRTIO_NET_RSS_ERROR 0
+#define TRACE_VIRTIO_NET_RSS_ERROR_ENABLED 0
+#define TRACE_VIRTIO_NET_RSS_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_rss_error(void *nic, const char *msg, uint32_t value) {
+ (void)nic;
+ (void)msg;
+ (void)value;
+}
+#define TRACE_VIRTIO_NET_RSS_LOAD 0
+#define TRACE_VIRTIO_NET_RSS_LOAD_ENABLED 0
+#define TRACE_VIRTIO_NET_RSS_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_virtio_net_rss_load(void *nic, size_t nfds, void *fds) {
+ (void)nic;
+ (void)nfds;
+ (void)fds;
+}
+#define TRACE_XEN_NETDEV_CONNECT 0
+#define TRACE_XEN_NETDEV_CONNECT_ENABLED 0
+#define TRACE_XEN_NETDEV_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_connect(int dev, unsigned int tx, unsigned int rx, int port) {
+ (void)dev;
+ (void)tx;
+ (void)rx;
+ (void)port;
+}
+#define TRACE_XEN_NETDEV_CREATE 0
+#define TRACE_XEN_NETDEV_CREATE_ENABLED 0
+#define TRACE_XEN_NETDEV_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_create(int dev) {
+ (void)dev;
+}
+#define TRACE_XEN_NETDEV_DESTROY 0
+#define TRACE_XEN_NETDEV_DESTROY_ENABLED 0
+#define TRACE_XEN_NETDEV_DESTROY_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_destroy(int dev) {
+ (void)dev;
+}
+#define TRACE_XEN_NETDEV_DISCONNECT 0
+#define TRACE_XEN_NETDEV_DISCONNECT_ENABLED 0
+#define TRACE_XEN_NETDEV_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_disconnect(int dev) {
+ (void)dev;
+}
+#define TRACE_XEN_NETDEV_FRONTEND_CHANGED 0
+#define TRACE_XEN_NETDEV_FRONTEND_CHANGED_ENABLED 0
+#define TRACE_XEN_NETDEV_FRONTEND_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_frontend_changed(const char *dev, int state) {
+ (void)dev;
+ (void)state;
+}
+#define TRACE_XEN_NETDEV_REALIZE 0
+#define TRACE_XEN_NETDEV_REALIZE_ENABLED 0
+#define TRACE_XEN_NETDEV_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_realize(int dev, const char *info, const char *peer) {
+ (void)dev;
+ (void)info;
+ (void)peer;
+}
+#define TRACE_XEN_NETDEV_RX 0
+#define TRACE_XEN_NETDEV_RX_ENABLED 0
+#define TRACE_XEN_NETDEV_RX_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_rx(int dev, int idx, int status, int flags) {
+ (void)dev;
+ (void)idx;
+ (void)status;
+ (void)flags;
+}
+#define TRACE_XEN_NETDEV_TX 0
+#define TRACE_XEN_NETDEV_TX_ENABLED 0
+#define TRACE_XEN_NETDEV_TX_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_tx(int dev, int ref, int off, int len, unsigned int flags, const char *c, const char *d, const char *m, const char *e) {
+ (void)dev;
+ (void)ref;
+ (void)off;
+ (void)len;
+ (void)flags;
+ (void)c;
+ (void)d;
+ (void)m;
+ (void)e;
+}
+#define TRACE_XEN_NETDEV_UNREALIZE 0
+#define TRACE_XEN_NETDEV_UNREALIZE_ENABLED 0
+#define TRACE_XEN_NETDEV_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_netdev_unrealize(int dev) {
+ (void)dev;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_net_can.h b/trace/trace-hw_net_can.h
new file mode 100644
index 0000000000..404656b9ae
--- /dev/null
+++ b/trace/trace-hw_net_can.h
@@ -0,0 +1,126 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_NET_CAN_H
+#define TRACE_TRACE_HW_NET_CAN_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_XLNX_CAN_FILTER_ID_PRE_WRITE 0
+#define TRACE_XLNX_CAN_FILTER_ID_PRE_WRITE_ENABLED 0
+#define TRACE_XLNX_CAN_FILTER_ID_PRE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_filter_id_pre_write(uint8_t filter_num, uint32_t value) {
+ (void)filter_num;
+ (void)value;
+}
+#define TRACE_XLNX_CAN_FILTER_MASK_PRE_WRITE 0
+#define TRACE_XLNX_CAN_FILTER_MASK_PRE_WRITE_ENABLED 0
+#define TRACE_XLNX_CAN_FILTER_MASK_PRE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_filter_mask_pre_write(uint8_t filter_num, uint32_t value) {
+ (void)filter_num;
+ (void)value;
+}
+#define TRACE_XLNX_CAN_RESET 0
+#define TRACE_XLNX_CAN_RESET_ENABLED 0
+#define TRACE_XLNX_CAN_RESET_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_reset(uint32_t val) {
+ (void)val;
+}
+#define TRACE_XLNX_CAN_RX_DATA 0
+#define TRACE_XLNX_CAN_RX_DATA_ENABLED 0
+#define TRACE_XLNX_CAN_RX_DATA_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_rx_data(uint32_t id, uint32_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) {
+ (void)id;
+ (void)dlc;
+ (void)db0;
+ (void)db1;
+ (void)db2;
+ (void)db3;
+ (void)db4;
+ (void)db5;
+ (void)db6;
+ (void)db7;
+}
+#define TRACE_XLNX_CAN_RX_DISCARD 0
+#define TRACE_XLNX_CAN_RX_DISCARD_ENABLED 0
+#define TRACE_XLNX_CAN_RX_DISCARD_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_rx_discard(uint32_t status) {
+ (void)status;
+}
+#define TRACE_XLNX_CAN_RX_FIFO_FILTER_REJECT 0
+#define TRACE_XLNX_CAN_RX_FIFO_FILTER_REJECT_ENABLED 0
+#define TRACE_XLNX_CAN_RX_FIFO_FILTER_REJECT_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_rx_fifo_filter_reject(uint32_t id, uint8_t dlc) {
+ (void)id;
+ (void)dlc;
+}
+#define TRACE_XLNX_CAN_TX_DATA 0
+#define TRACE_XLNX_CAN_TX_DATA_ENABLED 0
+#define TRACE_XLNX_CAN_TX_DATA_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_tx_data(uint32_t id, uint8_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) {
+ (void)id;
+ (void)dlc;
+ (void)db0;
+ (void)db1;
+ (void)db2;
+ (void)db3;
+ (void)db4;
+ (void)db5;
+ (void)db6;
+ (void)db7;
+}
+#define TRACE_XLNX_CAN_UPDATE_IRQ 0
+#define TRACE_XLNX_CAN_UPDATE_IRQ_ENABLED 0
+#define TRACE_XLNX_CAN_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_can_update_irq(uint32_t isr, uint32_t ier, uint32_t irq) {
+ (void)isr;
+ (void)ier;
+ (void)irq;
+}
+#define TRACE_XLNX_CANFD_RESET 0
+#define TRACE_XLNX_CANFD_RESET_ENABLED 0
+#define TRACE_XLNX_CANFD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_canfd_reset(char *path, uint32_t val) {
+ (void)path;
+ (void)val;
+}
+#define TRACE_XLNX_CANFD_RX_DATA 0
+#define TRACE_XLNX_CANFD_RX_DATA_ENABLED 0
+#define TRACE_XLNX_CANFD_RX_DATA_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_canfd_rx_data(char *path, uint32_t id, uint8_t dlc, uint8_t flags) {
+ (void)path;
+ (void)id;
+ (void)dlc;
+ (void)flags;
+}
+#define TRACE_XLNX_CANFD_RX_FIFO_FILTER_REJECT 0
+#define TRACE_XLNX_CANFD_RX_FIFO_FILTER_REJECT_ENABLED 0
+#define TRACE_XLNX_CANFD_RX_FIFO_FILTER_REJECT_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_canfd_rx_fifo_filter_reject(char *path, uint32_t id, uint8_t dlc) {
+ (void)path;
+ (void)id;
+ (void)dlc;
+}
+#define TRACE_XLNX_CANFD_TX_DATA 0
+#define TRACE_XLNX_CANFD_TX_DATA_ENABLED 0
+#define TRACE_XLNX_CANFD_TX_DATA_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_canfd_tx_data(char *path, uint32_t id, uint8_t dlc, uint8_t flgas) {
+ (void)path;
+ (void)id;
+ (void)dlc;
+ (void)flgas;
+}
+#define TRACE_XLNX_CANFD_UPDATE_IRQ 0
+#define TRACE_XLNX_CANFD_UPDATE_IRQ_ENABLED 0
+#define TRACE_XLNX_CANFD_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_canfd_update_irq(char *path, uint32_t isr, uint32_t ier, uint32_t irq) {
+ (void)path;
+ (void)isr;
+ (void)ier;
+ (void)irq;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_nubus.h b/trace/trace-hw_nubus.h
new file mode 100644
index 0000000000..e481725675
--- /dev/null
+++ b/trace/trace-hw_nubus.h
@@ -0,0 +1,43 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_NUBUS_H
+#define TRACE_TRACE_HW_NUBUS_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_NUBUS_SLOT_READ 0
+#define TRACE_NUBUS_SLOT_READ_ENABLED 0
+#define TRACE_NUBUS_SLOT_READ_BACKEND_DSTATE() (0)
+static inline void trace_nubus_slot_read(uint64_t addr, int size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_NUBUS_SLOT_WRITE 0
+#define TRACE_NUBUS_SLOT_WRITE_ENABLED 0
+#define TRACE_NUBUS_SLOT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nubus_slot_write(uint64_t addr, uint64_t val, int size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_NUBUS_SUPER_SLOT_READ 0
+#define TRACE_NUBUS_SUPER_SLOT_READ_ENABLED 0
+#define TRACE_NUBUS_SUPER_SLOT_READ_BACKEND_DSTATE() (0)
+static inline void trace_nubus_super_slot_read(uint64_t addr, int size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_NUBUS_SUPER_SLOT_WRITE 0
+#define TRACE_NUBUS_SUPER_SLOT_WRITE_ENABLED 0
+#define TRACE_NUBUS_SUPER_SLOT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nubus_super_slot_write(uint64_t addr, uint64_t val, int size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_nvme.h b/trace/trace-hw_nvme.h
new file mode 100644
index 0000000000..d50ddebe82
--- /dev/null
+++ b/trace/trace-hw_nvme.h
@@ -0,0 +1,1461 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_NVME_H
+#define TRACE_TRACE_HW_NVME_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_PCI_NVME_ADMIN_CMD 0
+#define TRACE_PCI_NVME_ADMIN_CMD_ENABLED 0
+#define TRACE_PCI_NVME_ADMIN_CMD_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opname) {
+ (void)cid;
+ (void)sqid;
+ (void)opcode;
+ (void)opname;
+}
+#define TRACE_PCI_NVME_AER 0
+#define TRACE_PCI_NVME_AER_ENABLED 0
+#define TRACE_PCI_NVME_AER_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_aer(uint16_t cid) {
+ (void)cid;
+}
+#define TRACE_PCI_NVME_AER_AERL_EXCEEDED 0
+#define TRACE_PCI_NVME_AER_AERL_EXCEEDED_ENABLED 0
+#define TRACE_PCI_NVME_AER_AERL_EXCEEDED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_aer_aerl_exceeded(void) {
+}
+#define TRACE_PCI_NVME_AER_MASKED 0
+#define TRACE_PCI_NVME_AER_MASKED_ENABLED 0
+#define TRACE_PCI_NVME_AER_MASKED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_aer_masked(uint8_t type, uint8_t mask) {
+ (void)type;
+ (void)mask;
+}
+#define TRACE_PCI_NVME_AER_POST_CQE 0
+#define TRACE_PCI_NVME_AER_POST_CQE_ENABLED 0
+#define TRACE_PCI_NVME_AER_POST_CQE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_aer_post_cqe(uint8_t typ, uint8_t info, uint8_t log_page) {
+ (void)typ;
+ (void)info;
+ (void)log_page;
+}
+#define TRACE_PCI_NVME_AIO_COPY_IN_CB 0
+#define TRACE_PCI_NVME_AIO_COPY_IN_CB_ENABLED 0
+#define TRACE_PCI_NVME_AIO_COPY_IN_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_aio_copy_in_cb(uint16_t cid) {
+ (void)cid;
+}
+#define TRACE_PCI_NVME_AIO_DISCARD_CB 0
+#define TRACE_PCI_NVME_AIO_DISCARD_CB_ENABLED 0
+#define TRACE_PCI_NVME_AIO_DISCARD_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_aio_discard_cb(uint16_t cid) {
+ (void)cid;
+}
+#define TRACE_PCI_NVME_AIO_FLUSH_CB 0
+#define TRACE_PCI_NVME_AIO_FLUSH_CB_ENABLED 0
+#define TRACE_PCI_NVME_AIO_FLUSH_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_aio_flush_cb(uint16_t cid, const char *blkname) {
+ (void)cid;
+ (void)blkname;
+}
+#define TRACE_PCI_NVME_BLOCK_STATUS 0
+#define TRACE_PCI_NVME_BLOCK_STATUS_ENABLED 0
+#define TRACE_PCI_NVME_BLOCK_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret, bool zeroed) {
+ (void)offset;
+ (void)bytes;
+ (void)pnum;
+ (void)ret;
+ (void)zeroed;
+}
+#define TRACE_PCI_NVME_CLEAR_NS_CLOSE 0
+#define TRACE_PCI_NVME_CLEAR_NS_CLOSE_ENABLED 0
+#define TRACE_PCI_NVME_CLEAR_NS_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_clear_ns_close(uint32_t state, uint64_t slba) {
+ (void)state;
+ (void)slba;
+}
+#define TRACE_PCI_NVME_CLEAR_NS_RESET 0
+#define TRACE_PCI_NVME_CLEAR_NS_RESET_ENABLED 0
+#define TRACE_PCI_NVME_CLEAR_NS_RESET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_clear_ns_reset(uint32_t state, uint64_t slba) {
+ (void)state;
+ (void)slba;
+}
+#define TRACE_PCI_NVME_CLOSE_ZONE 0
+#define TRACE_PCI_NVME_CLOSE_ZONE_ENABLED 0
+#define TRACE_PCI_NVME_CLOSE_ZONE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_close_zone(uint64_t slba, uint32_t zone_idx, int all) {
+ (void)slba;
+ (void)zone_idx;
+ (void)all;
+}
+#define TRACE_PCI_NVME_COMPARE 0
+#define TRACE_PCI_NVME_COMPARE_ENABLED 0
+#define TRACE_PCI_NVME_COMPARE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_compare(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) {
+ (void)cid;
+ (void)nsid;
+ (void)slba;
+ (void)nlb;
+}
+#define TRACE_PCI_NVME_COMPARE_DATA_CB 0
+#define TRACE_PCI_NVME_COMPARE_DATA_CB_ENABLED 0
+#define TRACE_PCI_NVME_COMPARE_DATA_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_compare_data_cb(uint16_t cid) {
+ (void)cid;
+}
+#define TRACE_PCI_NVME_COMPARE_MDATA_CB 0
+#define TRACE_PCI_NVME_COMPARE_MDATA_CB_ENABLED 0
+#define TRACE_PCI_NVME_COMPARE_MDATA_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_compare_mdata_cb(uint16_t cid) {
+ (void)cid;
+}
+#define TRACE_PCI_NVME_COPY 0
+#define TRACE_PCI_NVME_COPY_ENABLED 0
+#define TRACE_PCI_NVME_COPY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_copy(uint16_t cid, uint32_t nsid, uint16_t nr, uint8_t format) {
+ (void)cid;
+ (void)nsid;
+ (void)nr;
+ (void)format;
+}
+#define TRACE_PCI_NVME_COPY_OUT 0
+#define TRACE_PCI_NVME_COPY_OUT_ENABLED 0
+#define TRACE_PCI_NVME_COPY_OUT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_copy_out(uint64_t slba, uint32_t nlb) {
+ (void)slba;
+ (void)nlb;
+}
+#define TRACE_PCI_NVME_COPY_SOURCE_RANGE 0
+#define TRACE_PCI_NVME_COPY_SOURCE_RANGE_ENABLED 0
+#define TRACE_PCI_NVME_COPY_SOURCE_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_copy_source_range(uint64_t slba, uint32_t nlb) {
+ (void)slba;
+ (void)nlb;
+}
+#define TRACE_PCI_NVME_CREATE_CQ 0
+#define TRACE_PCI_NVME_CREATE_CQ_ENABLED 0
+#define TRACE_PCI_NVME_CREATE_CQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_create_cq(uint64_t addr, uint16_t cqid, uint16_t vector, uint16_t size, uint16_t qflags, int ien) {
+ (void)addr;
+ (void)cqid;
+ (void)vector;
+ (void)size;
+ (void)qflags;
+ (void)ien;
+}
+#define TRACE_PCI_NVME_CREATE_SQ 0
+#define TRACE_PCI_NVME_CREATE_SQ_ENABLED 0
+#define TRACE_PCI_NVME_CREATE_SQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_create_sq(uint64_t addr, uint16_t sqid, uint16_t cqid, uint16_t qsize, uint16_t qflags) {
+ (void)addr;
+ (void)sqid;
+ (void)cqid;
+ (void)qsize;
+ (void)qflags;
+}
+#define TRACE_PCI_NVME_DBBUF_CONFIG 0
+#define TRACE_PCI_NVME_DBBUF_CONFIG_ENABLED 0
+#define TRACE_PCI_NVME_DBBUF_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dbbuf_config(uint64_t dbs_addr, uint64_t eis_addr) {
+ (void)dbs_addr;
+ (void)eis_addr;
+}
+#define TRACE_PCI_NVME_DEL_CQ 0
+#define TRACE_PCI_NVME_DEL_CQ_ENABLED 0
+#define TRACE_PCI_NVME_DEL_CQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_del_cq(uint16_t cqid) {
+ (void)cqid;
+}
+#define TRACE_PCI_NVME_DEL_SQ 0
+#define TRACE_PCI_NVME_DEL_SQ_ENABLED 0
+#define TRACE_PCI_NVME_DEL_SQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_del_sq(uint16_t qid) {
+ (void)qid;
+}
+#define TRACE_PCI_NVME_DIF_CHECK 0
+#define TRACE_PCI_NVME_DIF_CHECK_ENABLED 0
+#define TRACE_PCI_NVME_DIF_CHECK_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_check(uint8_t prinfo, uint16_t chksum_len) {
+ (void)prinfo;
+ (void)chksum_len;
+}
+#define TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF_CRC16 0
+#define TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF_CRC16_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF_CRC16_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_pract_generate_dif_crc16(size_t len, size_t lba_size, size_t chksum_len, uint16_t apptag, uint32_t reftag) {
+ (void)len;
+ (void)lba_size;
+ (void)chksum_len;
+ (void)apptag;
+ (void)reftag;
+}
+#define TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF_CRC64 0
+#define TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF_CRC64_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF_CRC64_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_pract_generate_dif_crc64(size_t len, size_t lba_size, size_t chksum_len, uint16_t apptag, uint64_t reftag) {
+ (void)len;
+ (void)lba_size;
+ (void)chksum_len;
+ (void)apptag;
+ (void)reftag;
+}
+#define TRACE_PCI_NVME_DIF_PRCHK_APPTAG 0
+#define TRACE_PCI_NVME_DIF_PRCHK_APPTAG_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRCHK_APPTAG_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_prchk_apptag(uint16_t apptag, uint16_t elbat, uint16_t elbatm) {
+ (void)apptag;
+ (void)elbat;
+ (void)elbatm;
+}
+#define TRACE_PCI_NVME_DIF_PRCHK_DISABLED_CRC16 0
+#define TRACE_PCI_NVME_DIF_PRCHK_DISABLED_CRC16_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRCHK_DISABLED_CRC16_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_prchk_disabled_crc16(uint16_t apptag, uint32_t reftag) {
+ (void)apptag;
+ (void)reftag;
+}
+#define TRACE_PCI_NVME_DIF_PRCHK_DISABLED_CRC64 0
+#define TRACE_PCI_NVME_DIF_PRCHK_DISABLED_CRC64_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRCHK_DISABLED_CRC64_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_prchk_disabled_crc64(uint16_t apptag, uint64_t reftag) {
+ (void)apptag;
+ (void)reftag;
+}
+#define TRACE_PCI_NVME_DIF_PRCHK_GUARD_CRC16 0
+#define TRACE_PCI_NVME_DIF_PRCHK_GUARD_CRC16_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRCHK_GUARD_CRC16_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_prchk_guard_crc16(uint16_t guard, uint16_t crc) {
+ (void)guard;
+ (void)crc;
+}
+#define TRACE_PCI_NVME_DIF_PRCHK_GUARD_CRC64 0
+#define TRACE_PCI_NVME_DIF_PRCHK_GUARD_CRC64_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRCHK_GUARD_CRC64_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_prchk_guard_crc64(uint64_t guard, uint64_t crc) {
+ (void)guard;
+ (void)crc;
+}
+#define TRACE_PCI_NVME_DIF_PRCHK_REFTAG_CRC16 0
+#define TRACE_PCI_NVME_DIF_PRCHK_REFTAG_CRC16_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRCHK_REFTAG_CRC16_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_prchk_reftag_crc16(uint32_t reftag, uint32_t elbrt) {
+ (void)reftag;
+ (void)elbrt;
+}
+#define TRACE_PCI_NVME_DIF_PRCHK_REFTAG_CRC64 0
+#define TRACE_PCI_NVME_DIF_PRCHK_REFTAG_CRC64_ENABLED 0
+#define TRACE_PCI_NVME_DIF_PRCHK_REFTAG_CRC64_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_prchk_reftag_crc64(uint64_t reftag, uint64_t elbrt) {
+ (void)reftag;
+ (void)elbrt;
+}
+#define TRACE_PCI_NVME_DIF_RW 0
+#define TRACE_PCI_NVME_DIF_RW_ENABLED 0
+#define TRACE_PCI_NVME_DIF_RW_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_rw(uint8_t pract, uint8_t prinfo) {
+ (void)pract;
+ (void)prinfo;
+}
+#define TRACE_PCI_NVME_DIF_RW_CB 0
+#define TRACE_PCI_NVME_DIF_RW_CB_ENABLED 0
+#define TRACE_PCI_NVME_DIF_RW_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_rw_cb(uint16_t cid, const char *blkname) {
+ (void)cid;
+ (void)blkname;
+}
+#define TRACE_PCI_NVME_DIF_RW_CHECK_CB 0
+#define TRACE_PCI_NVME_DIF_RW_CHECK_CB_ENABLED 0
+#define TRACE_PCI_NVME_DIF_RW_CHECK_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_rw_check_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) {
+ (void)cid;
+ (void)prinfo;
+ (void)apptag;
+ (void)appmask;
+ (void)reftag;
+}
+#define TRACE_PCI_NVME_DIF_RW_MDATA_IN_CB 0
+#define TRACE_PCI_NVME_DIF_RW_MDATA_IN_CB_ENABLED 0
+#define TRACE_PCI_NVME_DIF_RW_MDATA_IN_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_rw_mdata_in_cb(uint16_t cid, const char *blkname) {
+ (void)cid;
+ (void)blkname;
+}
+#define TRACE_PCI_NVME_DIF_RW_MDATA_OUT_CB 0
+#define TRACE_PCI_NVME_DIF_RW_MDATA_OUT_CB_ENABLED 0
+#define TRACE_PCI_NVME_DIF_RW_MDATA_OUT_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dif_rw_mdata_out_cb(uint16_t cid, const char *blkname) {
+ (void)cid;
+ (void)blkname;
+}
+#define TRACE_PCI_NVME_DMA_READ 0
+#define TRACE_PCI_NVME_DMA_READ_ENABLED 0
+#define TRACE_PCI_NVME_DMA_READ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dma_read(uint64_t prp1, uint64_t prp2) {
+ (void)prp1;
+ (void)prp2;
+}
+#define TRACE_PCI_NVME_DSM 0
+#define TRACE_PCI_NVME_DSM_ENABLED 0
+#define TRACE_PCI_NVME_DSM_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dsm(uint32_t nr, uint32_t attr) {
+ (void)nr;
+ (void)attr;
+}
+#define TRACE_PCI_NVME_DSM_DEALLOCATE 0
+#define TRACE_PCI_NVME_DSM_DEALLOCATE_ENABLED 0
+#define TRACE_PCI_NVME_DSM_DEALLOCATE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dsm_deallocate(uint64_t slba, uint32_t nlb) {
+ (void)slba;
+ (void)nlb;
+}
+#define TRACE_PCI_NVME_DSM_SINGLE_RANGE_LIMIT_EXCEEDED 0
+#define TRACE_PCI_NVME_DSM_SINGLE_RANGE_LIMIT_EXCEEDED_ENABLED 0
+#define TRACE_PCI_NVME_DSM_SINGLE_RANGE_LIMIT_EXCEEDED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_dsm_single_range_limit_exceeded(uint32_t nlb, uint32_t dmrsl) {
+ (void)nlb;
+ (void)dmrsl;
+}
+#define TRACE_PCI_NVME_ENQUEUE_EVENT 0
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_ENABLED 0
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_enqueue_event(uint8_t typ, uint8_t info, uint8_t log_page) {
+ (void)typ;
+ (void)info;
+ (void)log_page;
+}
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_MASKED 0
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_MASKED_ENABLED 0
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_MASKED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_enqueue_event_masked(uint8_t typ) {
+ (void)typ;
+}
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_NOQUEUE 0
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_NOQUEUE_ENABLED 0
+#define TRACE_PCI_NVME_ENQUEUE_EVENT_NOQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_enqueue_event_noqueue(int queued) {
+ (void)queued;
+}
+#define TRACE_PCI_NVME_ENQUEUE_REQ_COMPLETION 0
+#define TRACE_PCI_NVME_ENQUEUE_REQ_COMPLETION_ENABLED 0
+#define TRACE_PCI_NVME_ENQUEUE_REQ_COMPLETION_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_enqueue_req_completion(uint16_t cid, uint16_t cqid, uint32_t dw0, uint32_t dw1, uint16_t status) {
+ (void)cid;
+ (void)cqid;
+ (void)dw0;
+ (void)dw1;
+ (void)status;
+}
+#define TRACE_PCI_NVME_ERR_ADDR_READ 0
+#define TRACE_PCI_NVME_ERR_ADDR_READ_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ADDR_READ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_addr_read(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_PCI_NVME_ERR_ADDR_WRITE 0
+#define TRACE_PCI_NVME_ERR_ADDR_WRITE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ADDR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_addr_write(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_PCI_NVME_ERR_AIO 0
+#define TRACE_PCI_NVME_ERR_AIO_ENABLED 0
+#define TRACE_PCI_NVME_ERR_AIO_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_aio(uint16_t cid, const char *errname, uint16_t status) {
+ (void)cid;
+ (void)errname;
+ (void)status;
+}
+#define TRACE_PCI_NVME_ERR_APPEND_NOT_AT_START 0
+#define TRACE_PCI_NVME_ERR_APPEND_NOT_AT_START_ENABLED 0
+#define TRACE_PCI_NVME_ERR_APPEND_NOT_AT_START_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_append_not_at_start(uint64_t slba, uint64_t zone) {
+ (void)slba;
+ (void)zone;
+}
+#define TRACE_PCI_NVME_ERR_CFS 0
+#define TRACE_PCI_NVME_ERR_CFS_ENABLED 0
+#define TRACE_PCI_NVME_ERR_CFS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_cfs(void) {
+}
+#define TRACE_PCI_NVME_ERR_CMB_INVALID_CBA 0
+#define TRACE_PCI_NVME_ERR_CMB_INVALID_CBA_ENABLED 0
+#define TRACE_PCI_NVME_ERR_CMB_INVALID_CBA_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_cmb_invalid_cba(uint64_t cmbmsc) {
+ (void)cmbmsc;
+}
+#define TRACE_PCI_NVME_ERR_CMB_NOT_ENABLED 0
+#define TRACE_PCI_NVME_ERR_CMB_NOT_ENABLED_ENABLED 0
+#define TRACE_PCI_NVME_ERR_CMB_NOT_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_cmb_not_enabled(uint64_t cmbmsc) {
+ (void)cmbmsc;
+}
+#define TRACE_PCI_NVME_ERR_COPY_INVALID_FORMAT 0
+#define TRACE_PCI_NVME_ERR_COPY_INVALID_FORMAT_ENABLED 0
+#define TRACE_PCI_NVME_ERR_COPY_INVALID_FORMAT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_copy_invalid_format(uint8_t format) {
+ (void)format;
+}
+#define TRACE_PCI_NVME_ERR_IGNORED_MMIO_VF_OFFLINE 0
+#define TRACE_PCI_NVME_ERR_IGNORED_MMIO_VF_OFFLINE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_IGNORED_MMIO_VF_OFFLINE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_ignored_mmio_vf_offline(uint64_t addr, unsigned size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PCI_NVME_ERR_INSUFF_ACTIVE_RES 0
+#define TRACE_PCI_NVME_ERR_INSUFF_ACTIVE_RES_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INSUFF_ACTIVE_RES_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_insuff_active_res(uint32_t max_active) {
+ (void)max_active;
+}
+#define TRACE_PCI_NVME_ERR_INSUFF_OPEN_RES 0
+#define TRACE_PCI_NVME_ERR_INSUFF_OPEN_RES_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INSUFF_OPEN_RES_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_insuff_open_res(uint32_t max_open) {
+ (void)max_open;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_ADMIN_OPC 0
+#define TRACE_PCI_NVME_ERR_INVALID_ADMIN_OPC_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_ADMIN_OPC_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_admin_opc(uint8_t opc) {
+ (void)opc;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ADDR 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ADDR_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_cq_addr(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_CQID 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_CQID_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_CQID_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_cq_cqid(uint16_t cqid) {
+ (void)cqid;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ENTRY_SIZE 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ENTRY_SIZE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ENTRY_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_cq_entry_size(uint8_t iosqes, uint8_t iocqes) {
+ (void)iosqes;
+ (void)iocqes;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_QFLAGS 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_QFLAGS_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_QFLAGS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_cq_qflags(uint16_t qflags) {
+ (void)qflags;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_SIZE 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_SIZE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_cq_size(uint16_t size) {
+ (void)size;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_VECTOR 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_VECTOR_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_VECTOR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_cq_vector(uint16_t vector) {
+ (void)vector;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_ADDR 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_ADDR_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_sq_addr(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_CQID 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_CQID_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_CQID_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) {
+ (void)cqid;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_QFLAGS 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_QFLAGS_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_QFLAGS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_sq_qflags(uint16_t qflags) {
+ (void)qflags;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SIZE 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SIZE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_sq_size(uint16_t qsize) {
+ (void)qsize;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SQID 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SQID_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SQID_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_create_sq_sqid(uint16_t sqid) {
+ (void)sqid;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_CQID 0
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_CQID_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_CQID_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_del_cq_cqid(uint16_t cqid) {
+ (void)cqid;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_NOTEMPTY 0
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_NOTEMPTY_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_NOTEMPTY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_del_cq_notempty(uint16_t cqid) {
+ (void)cqid;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_SQ 0
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_SQ_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_DEL_SQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_del_sq(uint16_t qid) {
+ (void)qid;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_DMA 0
+#define TRACE_PCI_NVME_ERR_INVALID_DMA_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_DMA_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_dma(void) {
+}
+#define TRACE_PCI_NVME_ERR_INVALID_GETFEAT 0
+#define TRACE_PCI_NVME_ERR_INVALID_GETFEAT_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_GETFEAT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_getfeat(int dw10) {
+ (void)dw10;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_IDENTIFY_CNS 0
+#define TRACE_PCI_NVME_ERR_INVALID_IDENTIFY_CNS_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_IDENTIFY_CNS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_identify_cns(uint16_t cns) {
+ (void)cns;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_IOCSCI 0
+#define TRACE_PCI_NVME_ERR_INVALID_IOCSCI_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_IOCSCI_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_iocsci(uint32_t idx) {
+ (void)idx;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_LBA_RANGE 0
+#define TRACE_PCI_NVME_ERR_INVALID_LBA_RANGE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_LBA_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limit) {
+ (void)start;
+ (void)len;
+ (void)limit;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE 0
+#define TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_log_page(uint16_t cid, uint16_t lid) {
+ (void)cid;
+ (void)lid;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE_OFFSET 0
+#define TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE_OFFSET_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_log_page_offset(uint64_t ofs, uint64_t size) {
+ (void)ofs;
+ (void)size;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_MGMT_ACTION 0
+#define TRACE_PCI_NVME_ERR_INVALID_MGMT_ACTION_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_MGMT_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_mgmt_action(uint8_t action) {
+ (void)action;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_NUM_SGLD 0
+#define TRACE_PCI_NVME_ERR_INVALID_NUM_SGLD_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_NUM_SGLD_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_num_sgld(uint16_t cid, uint8_t typ) {
+ (void)cid;
+ (void)typ;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_OPC 0
+#define TRACE_PCI_NVME_ERR_INVALID_OPC_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_OPC_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_opc(uint8_t opc) {
+ (void)opc;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_PRP2_ALIGN 0
+#define TRACE_PCI_NVME_ERR_INVALID_PRP2_ALIGN_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_PRP2_ALIGN_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_prp2_align(uint64_t prp2) {
+ (void)prp2;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_PRPLIST_ENT 0
+#define TRACE_PCI_NVME_ERR_INVALID_PRPLIST_ENT_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_PRPLIST_ENT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_prplist_ent(uint64_t prplist) {
+ (void)prplist;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_SETFEAT 0
+#define TRACE_PCI_NVME_ERR_INVALID_SETFEAT_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_SETFEAT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_setfeat(uint32_t dw10) {
+ (void)dw10;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_SGL_EXCESS_LENGTH 0
+#define TRACE_PCI_NVME_ERR_INVALID_SGL_EXCESS_LENGTH_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_SGL_EXCESS_LENGTH_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_sgl_excess_length(uint32_t residual) {
+ (void)residual;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_SGLD 0
+#define TRACE_PCI_NVME_ERR_INVALID_SGLD_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_SGLD_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_sgld(uint16_t cid, uint8_t typ) {
+ (void)cid;
+ (void)typ;
+}
+#define TRACE_PCI_NVME_ERR_INVALID_ZONE_STATE_TRANSITION 0
+#define TRACE_PCI_NVME_ERR_INVALID_ZONE_STATE_TRANSITION_ENABLED 0
+#define TRACE_PCI_NVME_ERR_INVALID_ZONE_STATE_TRANSITION_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_invalid_zone_state_transition(uint8_t action, uint64_t slba, uint8_t attrs) {
+ (void)action;
+ (void)slba;
+ (void)attrs;
+}
+#define TRACE_PCI_NVME_ERR_MDTS 0
+#define TRACE_PCI_NVME_ERR_MDTS_ENABLED 0
+#define TRACE_PCI_NVME_ERR_MDTS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_mdts(size_t len) {
+ (void)len;
+}
+#define TRACE_PCI_NVME_ERR_REQ_STATUS 0
+#define TRACE_PCI_NVME_ERR_REQ_STATUS_ENABLED 0
+#define TRACE_PCI_NVME_ERR_REQ_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_req_status(uint16_t cid, uint32_t nsid, uint16_t status, uint8_t opc) {
+ (void)cid;
+ (void)nsid;
+ (void)status;
+ (void)opc;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail(void) {
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ACQ_MISALIGNED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ACQ_MISALIGNED_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ACQ_MISALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_acq_misaligned(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ACQENT_SZ_ZERO 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ACQENT_SZ_ZERO_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ACQENT_SZ_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_acqent_sz_zero(void) {
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ASQ_MISALIGNED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ASQ_MISALIGNED_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ASQ_MISALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_asq_misaligned(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ASQENT_SZ_ZERO 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ASQENT_SZ_ZERO_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ASQENT_SZ_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_asqent_sz_zero(void) {
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQ 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQ_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_cq(void) {
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_LARGE 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_LARGE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_LARGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_cqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) {
+ (void)log2ps;
+ (void)maxlog2ps;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_SMALL 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_SMALL_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_SMALL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_cqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) {
+ (void)log2ps;
+ (void)maxlog2ps;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CSS 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CSS_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_CSS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_css(uint8_t css) {
+ (void)css;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_LARGE 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_LARGE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_LARGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_page_too_large(uint8_t log2ps, uint8_t maxlog2ps) {
+ (void)log2ps;
+ (void)maxlog2ps;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_SMALL 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_SMALL_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_SMALL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_page_too_small(uint8_t log2ps, uint8_t maxlog2ps) {
+ (void)log2ps;
+ (void)maxlog2ps;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQ 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQ_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_sq(void) {
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_LARGE 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_LARGE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_LARGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_sqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) {
+ (void)log2ps;
+ (void)maxlog2ps;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_SMALL 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_SMALL_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_SMALL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_sqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) {
+ (void)log2ps;
+ (void)maxlog2ps;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_VIRT_STATE 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_VIRT_STATE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_VIRT_STATE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_virt_state(uint16_t vq, uint16_t vi) {
+ (void)vq;
+ (void)vi;
+}
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ZASL_TOO_SMALL 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ZASL_TOO_SMALL_ENABLED 0
+#define TRACE_PCI_NVME_ERR_STARTFAIL_ZASL_TOO_SMALL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_startfail_zasl_too_small(uint32_t zasl, uint32_t pagesz) {
+ (void)zasl;
+ (void)pagesz;
+}
+#define TRACE_PCI_NVME_ERR_UNALIGNED_ZONE_CMD 0
+#define TRACE_PCI_NVME_ERR_UNALIGNED_ZONE_CMD_ENABLED 0
+#define TRACE_PCI_NVME_ERR_UNALIGNED_ZONE_CMD_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_unaligned_zone_cmd(uint8_t action, uint64_t slba, uint64_t zslba) {
+ (void)action;
+ (void)slba;
+ (void)zslba;
+}
+#define TRACE_PCI_NVME_ERR_WRITE_NOT_AT_WP 0
+#define TRACE_PCI_NVME_ERR_WRITE_NOT_AT_WP_ENABLED 0
+#define TRACE_PCI_NVME_ERR_WRITE_NOT_AT_WP_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_write_not_at_wp(uint64_t slba, uint64_t zone, uint64_t wp) {
+ (void)slba;
+ (void)zone;
+ (void)wp;
+}
+#define TRACE_PCI_NVME_ERR_ZASL 0
+#define TRACE_PCI_NVME_ERR_ZASL_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZASL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zasl(size_t len) {
+ (void)len;
+}
+#define TRACE_PCI_NVME_ERR_ZD_EXTENSION_MAP_ERROR 0
+#define TRACE_PCI_NVME_ERR_ZD_EXTENSION_MAP_ERROR_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZD_EXTENSION_MAP_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zd_extension_map_error(uint32_t zone_idx) {
+ (void)zone_idx;
+}
+#define TRACE_PCI_NVME_ERR_ZONE_BOUNDARY 0
+#define TRACE_PCI_NVME_ERR_ZONE_BOUNDARY_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZONE_BOUNDARY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zone_boundary(uint64_t slba, uint32_t nlb, uint64_t zcap) {
+ (void)slba;
+ (void)nlb;
+ (void)zcap;
+}
+#define TRACE_PCI_NVME_ERR_ZONE_INVALID_WRITE 0
+#define TRACE_PCI_NVME_ERR_ZONE_INVALID_WRITE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZONE_INVALID_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zone_invalid_write(uint64_t slba, uint64_t wp) {
+ (void)slba;
+ (void)wp;
+}
+#define TRACE_PCI_NVME_ERR_ZONE_IS_FULL 0
+#define TRACE_PCI_NVME_ERR_ZONE_IS_FULL_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZONE_IS_FULL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zone_is_full(uint64_t zslba) {
+ (void)zslba;
+}
+#define TRACE_PCI_NVME_ERR_ZONE_IS_OFFLINE 0
+#define TRACE_PCI_NVME_ERR_ZONE_IS_OFFLINE_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZONE_IS_OFFLINE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zone_is_offline(uint64_t zslba) {
+ (void)zslba;
+}
+#define TRACE_PCI_NVME_ERR_ZONE_IS_READ_ONLY 0
+#define TRACE_PCI_NVME_ERR_ZONE_IS_READ_ONLY_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZONE_IS_READ_ONLY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zone_is_read_only(uint64_t zslba) {
+ (void)zslba;
+}
+#define TRACE_PCI_NVME_ERR_ZONE_READ_NOT_OK 0
+#define TRACE_PCI_NVME_ERR_ZONE_READ_NOT_OK_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZONE_READ_NOT_OK_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zone_read_not_ok(uint64_t slba, uint32_t nlb, uint16_t status) {
+ (void)slba;
+ (void)nlb;
+ (void)status;
+}
+#define TRACE_PCI_NVME_ERR_ZONE_WRITE_NOT_OK 0
+#define TRACE_PCI_NVME_ERR_ZONE_WRITE_NOT_OK_ENABLED 0
+#define TRACE_PCI_NVME_ERR_ZONE_WRITE_NOT_OK_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_err_zone_write_not_ok(uint64_t slba, uint32_t nlb, uint16_t status) {
+ (void)slba;
+ (void)nlb;
+ (void)status;
+}
+#define TRACE_PCI_NVME_FDP_RUH_CHANGE 0
+#define TRACE_PCI_NVME_FDP_RUH_CHANGE_ENABLED 0
+#define TRACE_PCI_NVME_FDP_RUH_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_fdp_ruh_change(uint16_t rgid, uint16_t ruhid) {
+ (void)rgid;
+ (void)ruhid;
+}
+#define TRACE_PCI_NVME_FINISH_ZONE 0
+#define TRACE_PCI_NVME_FINISH_ZONE_ENABLED 0
+#define TRACE_PCI_NVME_FINISH_ZONE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_finish_zone(uint64_t slba, uint32_t zone_idx, int all) {
+ (void)slba;
+ (void)zone_idx;
+ (void)all;
+}
+#define TRACE_PCI_NVME_FLUSH_NS 0
+#define TRACE_PCI_NVME_FLUSH_NS_ENABLED 0
+#define TRACE_PCI_NVME_FLUSH_NS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_flush_ns(uint32_t nsid) {
+ (void)nsid;
+}
+#define TRACE_PCI_NVME_FORMAT_SET 0
+#define TRACE_PCI_NVME_FORMAT_SET_ENABLED 0
+#define TRACE_PCI_NVME_FORMAT_SET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_format_set(uint32_t nsid, uint8_t lbaf, uint8_t mset, uint8_t pi, uint8_t pil) {
+ (void)nsid;
+ (void)lbaf;
+ (void)mset;
+ (void)pi;
+ (void)pil;
+}
+#define TRACE_PCI_NVME_GET_LOG 0
+#define TRACE_PCI_NVME_GET_LOG_ENABLED 0
+#define TRACE_PCI_NVME_GET_LOG_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_get_log(uint16_t cid, uint8_t lid, uint8_t lsp, uint8_t rae, uint32_t len, uint64_t off) {
+ (void)cid;
+ (void)lid;
+ (void)lsp;
+ (void)rae;
+ (void)len;
+ (void)off;
+}
+#define TRACE_PCI_NVME_GETFEAT 0
+#define TRACE_PCI_NVME_GETFEAT_ENABLED 0
+#define TRACE_PCI_NVME_GETFEAT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_getfeat(uint16_t cid, uint32_t nsid, uint8_t fid, uint8_t sel, uint32_t cdw11) {
+ (void)cid;
+ (void)nsid;
+ (void)fid;
+ (void)sel;
+ (void)cdw11;
+}
+#define TRACE_PCI_NVME_GETFEAT_NUMQ 0
+#define TRACE_PCI_NVME_GETFEAT_NUMQ_ENABLED 0
+#define TRACE_PCI_NVME_GETFEAT_NUMQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_getfeat_numq(int result) {
+ (void)result;
+}
+#define TRACE_PCI_NVME_GETFEAT_TIMESTAMP 0
+#define TRACE_PCI_NVME_GETFEAT_TIMESTAMP_ENABLED 0
+#define TRACE_PCI_NVME_GETFEAT_TIMESTAMP_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_getfeat_timestamp(uint64_t ts) {
+ (void)ts;
+}
+#define TRACE_PCI_NVME_GETFEAT_VWCACHE 0
+#define TRACE_PCI_NVME_GETFEAT_VWCACHE_ENABLED 0
+#define TRACE_PCI_NVME_GETFEAT_VWCACHE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_getfeat_vwcache(const char* result) {
+ (void)result;
+}
+#define TRACE_PCI_NVME_IDENTIFY 0
+#define TRACE_PCI_NVME_IDENTIFY_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify(uint16_t cid, uint8_t cns, uint16_t ctrlid, uint8_t csi) {
+ (void)cid;
+ (void)cns;
+ (void)ctrlid;
+ (void)csi;
+}
+#define TRACE_PCI_NVME_IDENTIFY_CMD_SET 0
+#define TRACE_PCI_NVME_IDENTIFY_CMD_SET_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_CMD_SET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_cmd_set(void) {
+}
+#define TRACE_PCI_NVME_IDENTIFY_CTRL 0
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_ctrl(void) {
+}
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_CSI 0
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_CSI_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_CSI_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_ctrl_csi(uint8_t csi) {
+ (void)csi;
+}
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_LIST 0
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_LIST_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_CTRL_LIST_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_ctrl_list(uint8_t cns, uint16_t cntid) {
+ (void)cns;
+ (void)cntid;
+}
+#define TRACE_PCI_NVME_IDENTIFY_NS 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_ns(uint32_t ns) {
+ (void)ns;
+}
+#define TRACE_PCI_NVME_IDENTIFY_NS_CSI 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_CSI_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_CSI_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_ns_csi(uint32_t ns, uint8_t csi) {
+ (void)ns;
+ (void)csi;
+}
+#define TRACE_PCI_NVME_IDENTIFY_NS_DESCR_LIST 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_DESCR_LIST_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_DESCR_LIST_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_ns_descr_list(uint32_t ns) {
+ (void)ns;
+}
+#define TRACE_PCI_NVME_IDENTIFY_NS_IND 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_IND_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_NS_IND_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_ns_ind(uint32_t nsid) {
+ (void)nsid;
+}
+#define TRACE_PCI_NVME_IDENTIFY_NSLIST 0
+#define TRACE_PCI_NVME_IDENTIFY_NSLIST_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_NSLIST_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_nslist(uint32_t ns) {
+ (void)ns;
+}
+#define TRACE_PCI_NVME_IDENTIFY_NSLIST_CSI 0
+#define TRACE_PCI_NVME_IDENTIFY_NSLIST_CSI_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_NSLIST_CSI_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_nslist_csi(uint16_t ns, uint8_t csi) {
+ (void)ns;
+ (void)csi;
+}
+#define TRACE_PCI_NVME_IDENTIFY_PRI_CTRL_CAP 0
+#define TRACE_PCI_NVME_IDENTIFY_PRI_CTRL_CAP_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_PRI_CTRL_CAP_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_pri_ctrl_cap(uint16_t cntlid) {
+ (void)cntlid;
+}
+#define TRACE_PCI_NVME_IDENTIFY_SEC_CTRL_LIST 0
+#define TRACE_PCI_NVME_IDENTIFY_SEC_CTRL_LIST_ENABLED 0
+#define TRACE_PCI_NVME_IDENTIFY_SEC_CTRL_LIST_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_identify_sec_ctrl_list(uint16_t cntlid, uint8_t numcntl) {
+ (void)cntlid;
+ (void)numcntl;
+}
+#define TRACE_PCI_NVME_IO_CMD 0
+#define TRACE_PCI_NVME_IO_CMD_ENABLED 0
+#define TRACE_PCI_NVME_IO_CMD_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) {
+ (void)cid;
+ (void)nsid;
+ (void)sqid;
+ (void)opcode;
+ (void)opname;
+}
+#define TRACE_PCI_NVME_IRQ_MASKED 0
+#define TRACE_PCI_NVME_IRQ_MASKED_ENABLED 0
+#define TRACE_PCI_NVME_IRQ_MASKED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_irq_masked(void) {
+}
+#define TRACE_PCI_NVME_IRQ_MSIX 0
+#define TRACE_PCI_NVME_IRQ_MSIX_ENABLED 0
+#define TRACE_PCI_NVME_IRQ_MSIX_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_irq_msix(uint32_t vector) {
+ (void)vector;
+}
+#define TRACE_PCI_NVME_IRQ_PIN 0
+#define TRACE_PCI_NVME_IRQ_PIN_ENABLED 0
+#define TRACE_PCI_NVME_IRQ_PIN_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_irq_pin(void) {
+}
+#define TRACE_PCI_NVME_MAP_ADDR 0
+#define TRACE_PCI_NVME_MAP_ADDR_ENABLED 0
+#define TRACE_PCI_NVME_MAP_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_map_addr(uint64_t addr, uint64_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_PCI_NVME_MAP_ADDR_CMB 0
+#define TRACE_PCI_NVME_MAP_ADDR_CMB_ENABLED 0
+#define TRACE_PCI_NVME_MAP_ADDR_CMB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_PCI_NVME_MAP_PRP 0
+#define TRACE_PCI_NVME_MAP_PRP_ENABLED 0
+#define TRACE_PCI_NVME_MAP_PRP_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2, int num_prps) {
+ (void)trans_len;
+ (void)len;
+ (void)prp1;
+ (void)prp2;
+ (void)num_prps;
+}
+#define TRACE_PCI_NVME_MAP_SGL 0
+#define TRACE_PCI_NVME_MAP_SGL_ENABLED 0
+#define TRACE_PCI_NVME_MAP_SGL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_map_sgl(uint8_t typ, uint64_t len) {
+ (void)typ;
+ (void)len;
+}
+#define TRACE_PCI_NVME_MISC_CB 0
+#define TRACE_PCI_NVME_MISC_CB_ENABLED 0
+#define TRACE_PCI_NVME_MISC_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_misc_cb(uint16_t cid) {
+ (void)cid;
+}
+#define TRACE_PCI_NVME_MMIO_ACQADDR 0
+#define TRACE_PCI_NVME_MMIO_ACQADDR_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_ACQADDR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_acqaddr(uint64_t data) {
+ (void)data;
+}
+#define TRACE_PCI_NVME_MMIO_ACQADDR_HI 0
+#define TRACE_PCI_NVME_MMIO_ACQADDR_HI_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_ACQADDR_HI_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_acqaddr_hi(uint64_t data, uint64_t new_addr) {
+ (void)data;
+ (void)new_addr;
+}
+#define TRACE_PCI_NVME_MMIO_AQATTR 0
+#define TRACE_PCI_NVME_MMIO_AQATTR_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_AQATTR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_aqattr(uint64_t data) {
+ (void)data;
+}
+#define TRACE_PCI_NVME_MMIO_ASQADDR 0
+#define TRACE_PCI_NVME_MMIO_ASQADDR_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_ASQADDR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_asqaddr(uint64_t data) {
+ (void)data;
+}
+#define TRACE_PCI_NVME_MMIO_ASQADDR_HI 0
+#define TRACE_PCI_NVME_MMIO_ASQADDR_HI_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_ASQADDR_HI_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_asqaddr_hi(uint64_t data, uint64_t new_addr) {
+ (void)data;
+ (void)new_addr;
+}
+#define TRACE_PCI_NVME_MMIO_CFG 0
+#define TRACE_PCI_NVME_MMIO_CFG_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_CFG_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_cfg(uint64_t data) {
+ (void)data;
+}
+#define TRACE_PCI_NVME_MMIO_DOORBELL_CQ 0
+#define TRACE_PCI_NVME_MMIO_DOORBELL_CQ_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_DOORBELL_CQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_doorbell_cq(uint16_t cqid, uint16_t new_head) {
+ (void)cqid;
+ (void)new_head;
+}
+#define TRACE_PCI_NVME_MMIO_DOORBELL_SQ 0
+#define TRACE_PCI_NVME_MMIO_DOORBELL_SQ_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_DOORBELL_SQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_doorbell_sq(uint16_t sqid, uint16_t new_tail) {
+ (void)sqid;
+ (void)new_tail;
+}
+#define TRACE_PCI_NVME_MMIO_INTM_CLR 0
+#define TRACE_PCI_NVME_MMIO_INTM_CLR_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_INTM_CLR_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_intm_clr(uint64_t data, uint64_t new_mask) {
+ (void)data;
+ (void)new_mask;
+}
+#define TRACE_PCI_NVME_MMIO_INTM_SET 0
+#define TRACE_PCI_NVME_MMIO_INTM_SET_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_INTM_SET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_intm_set(uint64_t data, uint64_t new_mask) {
+ (void)data;
+ (void)new_mask;
+}
+#define TRACE_PCI_NVME_MMIO_READ 0
+#define TRACE_PCI_NVME_MMIO_READ_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_read(uint64_t addr, unsigned size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PCI_NVME_MMIO_SHUTDOWN_CLEARED 0
+#define TRACE_PCI_NVME_MMIO_SHUTDOWN_CLEARED_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_SHUTDOWN_CLEARED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_shutdown_cleared(void) {
+}
+#define TRACE_PCI_NVME_MMIO_SHUTDOWN_SET 0
+#define TRACE_PCI_NVME_MMIO_SHUTDOWN_SET_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_SHUTDOWN_SET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_shutdown_set(void) {
+}
+#define TRACE_PCI_NVME_MMIO_START_SUCCESS 0
+#define TRACE_PCI_NVME_MMIO_START_SUCCESS_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_START_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_start_success(void) {
+}
+#define TRACE_PCI_NVME_MMIO_STOPPED 0
+#define TRACE_PCI_NVME_MMIO_STOPPED_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_STOPPED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_stopped(void) {
+}
+#define TRACE_PCI_NVME_MMIO_WRITE 0
+#define TRACE_PCI_NVME_MMIO_WRITE_ENABLED 0
+#define TRACE_PCI_NVME_MMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_mmio_write(uint64_t addr, uint64_t data, unsigned size) {
+ (void)addr;
+ (void)data;
+ (void)size;
+}
+#define TRACE_PCI_NVME_NO_OUTSTANDING_AERS 0
+#define TRACE_PCI_NVME_NO_OUTSTANDING_AERS_ENABLED 0
+#define TRACE_PCI_NVME_NO_OUTSTANDING_AERS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_no_outstanding_aers(void) {
+}
+#define TRACE_PCI_NVME_NS_ATTACHMENT 0
+#define TRACE_PCI_NVME_NS_ATTACHMENT_ENABLED 0
+#define TRACE_PCI_NVME_NS_ATTACHMENT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ns_attachment(uint16_t cid, uint8_t sel) {
+ (void)cid;
+ (void)sel;
+}
+#define TRACE_PCI_NVME_NS_ATTACHMENT_ATTACH 0
+#define TRACE_PCI_NVME_NS_ATTACHMENT_ATTACH_ENABLED 0
+#define TRACE_PCI_NVME_NS_ATTACHMENT_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ns_attachment_attach(uint16_t cntlid, uint32_t nsid) {
+ (void)cntlid;
+ (void)nsid;
+}
+#define TRACE_PCI_NVME_OFFLINE_ZONE 0
+#define TRACE_PCI_NVME_OFFLINE_ZONE_ENABLED 0
+#define TRACE_PCI_NVME_OFFLINE_ZONE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) {
+ (void)slba;
+ (void)zone_idx;
+ (void)all;
+}
+#define TRACE_PCI_NVME_OPEN_ZONE 0
+#define TRACE_PCI_NVME_OPEN_ZONE_ENABLED 0
+#define TRACE_PCI_NVME_OPEN_ZONE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_open_zone(uint64_t slba, uint32_t zone_idx, int all) {
+ (void)slba;
+ (void)zone_idx;
+ (void)all;
+}
+#define TRACE_PCI_NVME_PCI_RESET 0
+#define TRACE_PCI_NVME_PCI_RESET_ENABLED 0
+#define TRACE_PCI_NVME_PCI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_pci_reset(void) {
+}
+#define TRACE_PCI_NVME_PROCESS_AERS 0
+#define TRACE_PCI_NVME_PROCESS_AERS_ENABLED 0
+#define TRACE_PCI_NVME_PROCESS_AERS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_process_aers(int queued) {
+ (void)queued;
+}
+#define TRACE_PCI_NVME_READ 0
+#define TRACE_PCI_NVME_READ_ENABLED 0
+#define TRACE_PCI_NVME_READ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) {
+ (void)cid;
+ (void)nsid;
+ (void)nlb;
+ (void)count;
+ (void)lba;
+}
+#define TRACE_PCI_NVME_RESET_ZONE 0
+#define TRACE_PCI_NVME_RESET_ZONE_ENABLED 0
+#define TRACE_PCI_NVME_RESET_ZONE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) {
+ (void)slba;
+ (void)zone_idx;
+ (void)all;
+}
+#define TRACE_PCI_NVME_RW_CB 0
+#define TRACE_PCI_NVME_RW_CB_ENABLED 0
+#define TRACE_PCI_NVME_RW_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_rw_cb(uint16_t cid, const char *blkname) {
+ (void)cid;
+ (void)blkname;
+}
+#define TRACE_PCI_NVME_RW_COMPLETE_CB 0
+#define TRACE_PCI_NVME_RW_COMPLETE_CB_ENABLED 0
+#define TRACE_PCI_NVME_RW_COMPLETE_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_rw_complete_cb(uint16_t cid, const char *blkname) {
+ (void)cid;
+ (void)blkname;
+}
+#define TRACE_PCI_NVME_SET_DESCRIPTOR_EXTENSION 0
+#define TRACE_PCI_NVME_SET_DESCRIPTOR_EXTENSION_ENABLED 0
+#define TRACE_PCI_NVME_SET_DESCRIPTOR_EXTENSION_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) {
+ (void)slba;
+ (void)zone_idx;
+}
+#define TRACE_PCI_NVME_SETFEAT 0
+#define TRACE_PCI_NVME_SETFEAT_ENABLED 0
+#define TRACE_PCI_NVME_SETFEAT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_setfeat(uint16_t cid, uint32_t nsid, uint8_t fid, uint8_t save, uint32_t cdw11) {
+ (void)cid;
+ (void)nsid;
+ (void)fid;
+ (void)save;
+ (void)cdw11;
+}
+#define TRACE_PCI_NVME_SETFEAT_NUMQ 0
+#define TRACE_PCI_NVME_SETFEAT_NUMQ_ENABLED 0
+#define TRACE_PCI_NVME_SETFEAT_NUMQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_setfeat_numq(int reqcq, int reqsq, int gotcq, int gotsq) {
+ (void)reqcq;
+ (void)reqsq;
+ (void)gotcq;
+ (void)gotsq;
+}
+#define TRACE_PCI_NVME_SETFEAT_TIMESTAMP 0
+#define TRACE_PCI_NVME_SETFEAT_TIMESTAMP_ENABLED 0
+#define TRACE_PCI_NVME_SETFEAT_TIMESTAMP_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_setfeat_timestamp(uint64_t ts) {
+ (void)ts;
+}
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_CQ 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_CQ_ENABLED 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_CQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_db_wr_invalid_cq(uint32_t qid) {
+ (void)qid;
+}
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_CQHEAD 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_CQHEAD_ENABLED 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_CQHEAD_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t new_head) {
+ (void)qid;
+ (void)new_head;
+}
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_SQ 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_SQ_ENABLED 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_SQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) {
+ (void)qid;
+}
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_SQTAIL 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_SQTAIL_ENABLED 0
+#define TRACE_PCI_NVME_UB_DB_WR_INVALID_SQTAIL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail) {
+ (void)qid;
+ (void)new_tail;
+}
+#define TRACE_PCI_NVME_UB_DB_WR_MISALIGNED 0
+#define TRACE_PCI_NVME_UB_DB_WR_MISALIGNED_ENABLED 0
+#define TRACE_PCI_NVME_UB_DB_WR_MISALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_db_wr_misaligned(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_PCI_NVME_UB_MMIORD_INVALID_OFS 0
+#define TRACE_PCI_NVME_UB_MMIORD_INVALID_OFS_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIORD_INVALID_OFS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiord_invalid_ofs(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_PCI_NVME_UB_MMIORD_MISALIGNED32 0
+#define TRACE_PCI_NVME_UB_MMIORD_MISALIGNED32_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIORD_MISALIGNED32_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiord_misaligned32(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_PCI_NVME_UB_MMIORD_TOOSMALL 0
+#define TRACE_PCI_NVME_UB_MMIORD_TOOSMALL_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIORD_TOOSMALL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiord_toosmall(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_CMBLOC_RESERVED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_CMBLOC_RESERVED_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_CMBLOC_RESERVED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_cmbloc_reserved(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_CMBSZ_READONLY 0
+#define TRACE_PCI_NVME_UB_MMIOWR_CMBSZ_READONLY_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_CMBSZ_READONLY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_cmbsz_readonly(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_INTMASK_WITH_MSIX 0
+#define TRACE_PCI_NVME_UB_MMIOWR_INTMASK_WITH_MSIX_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_INTMASK_WITH_MSIX_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_intmask_with_msix(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_INVALID 0
+#define TRACE_PCI_NVME_UB_MMIOWR_INVALID_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_invalid(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_MISALIGNED32 0
+#define TRACE_PCI_NVME_UB_MMIOWR_MISALIGNED32_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_MISALIGNED32_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_misaligned32(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRCAP_READONLY 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRCAP_READONLY_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRCAP_READONLY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_pmrcap_readonly(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_PMREBS_READONLY 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMREBS_READONLY_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMREBS_READONLY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_pmrebs_readonly(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRSTS_READONLY 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRSTS_READONLY_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRSTS_READONLY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_pmrsts_readonly(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRSWTP_READONLY 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRSWTP_READONLY_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_PMRSWTP_READONLY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_pmrswtp_readonly(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_RO_CSTS 0
+#define TRACE_PCI_NVME_UB_MMIOWR_RO_CSTS_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_RO_CSTS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_ro_csts(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_SSRESET_UNSUPPORTED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_SSRESET_UNSUPPORTED_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_SSRESET_UNSUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_ssreset_unsupported(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_SSRESET_W1C_UNSUPPORTED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_SSRESET_W1C_UNSUPPORTED_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_SSRESET_W1C_UNSUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_ssreset_w1c_unsupported(void) {
+}
+#define TRACE_PCI_NVME_UB_MMIOWR_TOOSMALL 0
+#define TRACE_PCI_NVME_UB_MMIOWR_TOOSMALL_ENABLED 0
+#define TRACE_PCI_NVME_UB_MMIOWR_TOOSMALL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_mmiowr_toosmall(uint64_t offset, unsigned size) {
+ (void)offset;
+ (void)size;
+}
+#define TRACE_PCI_NVME_UB_TOO_MANY_MAPPINGS 0
+#define TRACE_PCI_NVME_UB_TOO_MANY_MAPPINGS_ENABLED 0
+#define TRACE_PCI_NVME_UB_TOO_MANY_MAPPINGS_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_too_many_mappings(void) {
+}
+#define TRACE_PCI_NVME_UB_UNKNOWN_CSS_VALUE 0
+#define TRACE_PCI_NVME_UB_UNKNOWN_CSS_VALUE_ENABLED 0
+#define TRACE_PCI_NVME_UB_UNKNOWN_CSS_VALUE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_ub_unknown_css_value(void) {
+}
+#define TRACE_PCI_NVME_UPDATE_CQ_EVENTIDX 0
+#define TRACE_PCI_NVME_UPDATE_CQ_EVENTIDX_ENABLED 0
+#define TRACE_PCI_NVME_UPDATE_CQ_EVENTIDX_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_update_cq_eventidx(uint16_t cqid, uint16_t new_eventidx) {
+ (void)cqid;
+ (void)new_eventidx;
+}
+#define TRACE_PCI_NVME_UPDATE_CQ_HEAD 0
+#define TRACE_PCI_NVME_UPDATE_CQ_HEAD_ENABLED 0
+#define TRACE_PCI_NVME_UPDATE_CQ_HEAD_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_update_cq_head(uint16_t cqid, uint16_t new_head) {
+ (void)cqid;
+ (void)new_head;
+}
+#define TRACE_PCI_NVME_UPDATE_SQ_EVENTIDX 0
+#define TRACE_PCI_NVME_UPDATE_SQ_EVENTIDX_ENABLED 0
+#define TRACE_PCI_NVME_UPDATE_SQ_EVENTIDX_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_update_sq_eventidx(uint16_t sqid, uint16_t new_eventidx) {
+ (void)sqid;
+ (void)new_eventidx;
+}
+#define TRACE_PCI_NVME_UPDATE_SQ_TAIL 0
+#define TRACE_PCI_NVME_UPDATE_SQ_TAIL_ENABLED 0
+#define TRACE_PCI_NVME_UPDATE_SQ_TAIL_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_update_sq_tail(uint16_t sqid, uint16_t new_tail) {
+ (void)sqid;
+ (void)new_tail;
+}
+#define TRACE_PCI_NVME_VERIFY 0
+#define TRACE_PCI_NVME_VERIFY_ENABLED 0
+#define TRACE_PCI_NVME_VERIFY_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_verify(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) {
+ (void)cid;
+ (void)nsid;
+ (void)slba;
+ (void)nlb;
+}
+#define TRACE_PCI_NVME_VERIFY_CB 0
+#define TRACE_PCI_NVME_VERIFY_CB_ENABLED 0
+#define TRACE_PCI_NVME_VERIFY_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_verify_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) {
+ (void)cid;
+ (void)prinfo;
+ (void)apptag;
+ (void)appmask;
+ (void)reftag;
+}
+#define TRACE_PCI_NVME_VERIFY_MDATA_IN_CB 0
+#define TRACE_PCI_NVME_VERIFY_MDATA_IN_CB_ENABLED 0
+#define TRACE_PCI_NVME_VERIFY_MDATA_IN_CB_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_verify_mdata_in_cb(uint16_t cid, const char *blkname) {
+ (void)cid;
+ (void)blkname;
+}
+#define TRACE_PCI_NVME_VIRT_MNGMT 0
+#define TRACE_PCI_NVME_VIRT_MNGMT_ENABLED 0
+#define TRACE_PCI_NVME_VIRT_MNGMT_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_virt_mngmt(uint16_t cid, uint16_t act, uint16_t cntlid, const char* rt, uint16_t nr) {
+ (void)cid;
+ (void)act;
+ (void)cntlid;
+ (void)rt;
+ (void)nr;
+}
+#define TRACE_PCI_NVME_WRITE 0
+#define TRACE_PCI_NVME_WRITE_ENABLED 0
+#define TRACE_PCI_NVME_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) {
+ (void)cid;
+ (void)verb;
+ (void)nsid;
+ (void)nlb;
+ (void)count;
+ (void)lba;
+}
+#define TRACE_PCI_NVME_ZD_EXTENSION_SET 0
+#define TRACE_PCI_NVME_ZD_EXTENSION_SET_ENABLED 0
+#define TRACE_PCI_NVME_ZD_EXTENSION_SET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_zd_extension_set(uint32_t zone_idx) {
+ (void)zone_idx;
+}
+#define TRACE_PCI_NVME_ZNS_ZONE_RESET 0
+#define TRACE_PCI_NVME_ZNS_ZONE_RESET_ENABLED 0
+#define TRACE_PCI_NVME_ZNS_ZONE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_zns_zone_reset(uint64_t zslba) {
+ (void)zslba;
+}
+#define TRACE_PCI_NVME_ZONED_ZRWA_IMPLICIT_FLUSH 0
+#define TRACE_PCI_NVME_ZONED_ZRWA_IMPLICIT_FLUSH_ENABLED 0
+#define TRACE_PCI_NVME_ZONED_ZRWA_IMPLICIT_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_pci_nvme_zoned_zrwa_implicit_flush(uint64_t zslba, uint32_t nlb) {
+ (void)zslba;
+ (void)nlb;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_nvram.h b/trace/trace-hw_nvram.h
new file mode 100644
index 0000000000..27a2413eb6
--- /dev/null
+++ b/trace/trace-hw_nvram.h
@@ -0,0 +1,128 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_NVRAM_H
+#define TRACE_TRACE_HW_NVRAM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ASPEED_OTP_PROG 0
+#define TRACE_ASPEED_OTP_PROG_ENABLED 0
+#define TRACE_ASPEED_OTP_PROG_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_otp_prog(uint32_t addr, uint32_t prog_value, uint32_t value) {
+ (void)addr;
+ (void)prog_value;
+ (void)value;
+}
+#define TRACE_ASPEED_OTP_PROG_BIT 0
+#define TRACE_ASPEED_OTP_PROG_BIT_ENABLED 0
+#define TRACE_ASPEED_OTP_PROG_BIT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_otp_prog_bit(int bit) {
+ (void)bit;
+}
+#define TRACE_ASPEED_OTP_PROG_CONFLICT 0
+#define TRACE_ASPEED_OTP_PROG_CONFLICT_ENABLED 0
+#define TRACE_ASPEED_OTP_PROG_CONFLICT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_otp_prog_conflict(uint32_t addr, uint32_t bits) {
+ (void)addr;
+ (void)bits;
+}
+#define TRACE_FW_CFG_ADD_BYTES 0
+#define TRACE_FW_CFG_ADD_BYTES_ENABLED 0
+#define TRACE_FW_CFG_ADD_BYTES_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_add_bytes(uint16_t key_value, const char *key_name, size_t len) {
+ (void)key_value;
+ (void)key_name;
+ (void)len;
+}
+#define TRACE_FW_CFG_ADD_FILE 0
+#define TRACE_FW_CFG_ADD_FILE_ENABLED 0
+#define TRACE_FW_CFG_ADD_FILE_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_add_file(void *s, int index, char *name, size_t len) {
+ (void)s;
+ (void)index;
+ (void)name;
+ (void)len;
+}
+#define TRACE_FW_CFG_ADD_I16 0
+#define TRACE_FW_CFG_ADD_I16_ENABLED 0
+#define TRACE_FW_CFG_ADD_I16_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_add_i16(uint16_t key_value, const char *key_name, uint16_t value) {
+ (void)key_value;
+ (void)key_name;
+ (void)value;
+}
+#define TRACE_FW_CFG_ADD_I32 0
+#define TRACE_FW_CFG_ADD_I32_ENABLED 0
+#define TRACE_FW_CFG_ADD_I32_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_add_i32(uint16_t key_value, const char *key_name, uint32_t value) {
+ (void)key_value;
+ (void)key_name;
+ (void)value;
+}
+#define TRACE_FW_CFG_ADD_I64 0
+#define TRACE_FW_CFG_ADD_I64_ENABLED 0
+#define TRACE_FW_CFG_ADD_I64_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_add_i64(uint16_t key_value, const char *key_name, uint64_t value) {
+ (void)key_value;
+ (void)key_name;
+ (void)value;
+}
+#define TRACE_FW_CFG_ADD_STRING 0
+#define TRACE_FW_CFG_ADD_STRING_ENABLED 0
+#define TRACE_FW_CFG_ADD_STRING_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_add_string(uint16_t key_value, const char *key_name, const char *value) {
+ (void)key_value;
+ (void)key_name;
+ (void)value;
+}
+#define TRACE_FW_CFG_READ 0
+#define TRACE_FW_CFG_READ_ENABLED 0
+#define TRACE_FW_CFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_read(void *s, uint64_t ret) {
+ (void)s;
+ (void)ret;
+}
+#define TRACE_FW_CFG_SELECT 0
+#define TRACE_FW_CFG_SELECT_ENABLED 0
+#define TRACE_FW_CFG_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_fw_cfg_select(void *s, uint16_t key_value, const char *key_name, int ret) {
+ (void)s;
+ (void)key_value;
+ (void)key_name;
+ (void)ret;
+}
+#define TRACE_MACIO_NVRAM_READ 0
+#define TRACE_MACIO_NVRAM_READ_ENABLED 0
+#define TRACE_MACIO_NVRAM_READ_BACKEND_DSTATE() (0)
+static inline void trace_macio_nvram_read(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MACIO_NVRAM_WRITE 0
+#define TRACE_MACIO_NVRAM_WRITE_ENABLED 0
+#define TRACE_MACIO_NVRAM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_macio_nvram_write(uint32_t addr, uint8_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_NVRAM_READ 0
+#define TRACE_NVRAM_READ_ENABLED 0
+#define TRACE_NVRAM_READ_BACKEND_DSTATE() (0)
+static inline void trace_nvram_read(uint32_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_NVRAM_WRITE 0
+#define TRACE_NVRAM_WRITE_ENABLED 0
+#define TRACE_NVRAM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nvram_write(uint32_t addr, uint32_t old, uint32_t val) {
+ (void)addr;
+ (void)old;
+ (void)val;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_pci.h b/trace/trace-hw_pci.h
new file mode 100644
index 0000000000..4e7f1e7fab
--- /dev/null
+++ b/trace/trace-hw_pci.h
@@ -0,0 +1,184 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_PCI_H
+#define TRACE_TRACE_HW_PCI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MSIX_WRITE_CONFIG 0
+#define TRACE_MSIX_WRITE_CONFIG_ENABLED 0
+#define TRACE_MSIX_WRITE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_msix_write_config(char *name, bool enabled, bool masked) {
+ (void)name;
+ (void)enabled;
+ (void)masked;
+}
+#define TRACE_PCI_BAD_PCIR_OFFSET 0
+#define TRACE_PCI_BAD_PCIR_OFFSET_ENABLED 0
+#define TRACE_PCI_BAD_PCIR_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_pci_bad_pcir_offset(uint16_t pcir_offset) {
+ (void)pcir_offset;
+}
+#define TRACE_PCI_BAD_ROM_MAGIC 0
+#define TRACE_PCI_BAD_ROM_MAGIC_ENABLED 0
+#define TRACE_PCI_BAD_ROM_MAGIC_BACKEND_DSTATE() (0)
+static inline void trace_pci_bad_rom_magic(uint16_t bad_rom_magic, uint16_t good_rom_magic) {
+ (void)bad_rom_magic;
+ (void)good_rom_magic;
+}
+#define TRACE_PCI_CFG_READ 0
+#define TRACE_PCI_CFG_READ_ENABLED 0
+#define TRACE_PCI_CFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_pci_cfg_read(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) {
+ (void)dev;
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_PCI_CFG_WRITE 0
+#define TRACE_PCI_CFG_WRITE_ENABLED 0
+#define TRACE_PCI_CFG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pci_cfg_write(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) {
+ (void)dev;
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_PCI_PM_BAD_TRANSITION 0
+#define TRACE_PCI_PM_BAD_TRANSITION_ENABLED 0
+#define TRACE_PCI_PM_BAD_TRANSITION_BACKEND_DSTATE() (0)
+static inline void trace_pci_pm_bad_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) {
+ (void)dev;
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)old;
+ (void)new;
+}
+#define TRACE_PCI_PM_TRANSITION 0
+#define TRACE_PCI_PM_TRANSITION_ENABLED 0
+#define TRACE_PCI_PM_TRANSITION_BACKEND_DSTATE() (0)
+static inline void trace_pci_pm_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) {
+ (void)dev;
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)old;
+ (void)new;
+}
+#define TRACE_PCI_ROM_AND_PCI_IDS 0
+#define TRACE_PCI_ROM_AND_PCI_IDS_ENABLED 0
+#define TRACE_PCI_ROM_AND_PCI_IDS_BACKEND_DSTATE() (0)
+static inline void trace_pci_rom_and_pci_ids(char *romfile, uint16_t vendor_id, uint16_t device_id, uint16_t rom_vendor_id, uint16_t rom_device_id) {
+ (void)romfile;
+ (void)vendor_id;
+ (void)device_id;
+ (void)rom_vendor_id;
+ (void)rom_device_id;
+}
+#define TRACE_PCI_ROM_CHECKSUM_CHANGE 0
+#define TRACE_PCI_ROM_CHECKSUM_CHANGE_ENABLED 0
+#define TRACE_PCI_ROM_CHECKSUM_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_pci_rom_checksum_change(uint8_t old_checksum, uint8_t new_checksum) {
+ (void)old_checksum;
+ (void)new_checksum;
+}
+#define TRACE_PCI_ROUTE_IRQ 0
+#define TRACE_PCI_ROUTE_IRQ_ENABLED 0
+#define TRACE_PCI_ROUTE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) {
+ (void)dev_irq;
+ (void)dev_path;
+ (void)parent_irq;
+ (void)parent_path;
+}
+#define TRACE_PCI_UPDATE_MAPPINGS_ADD 0
+#define TRACE_PCI_UPDATE_MAPPINGS_ADD_ENABLED 0
+#define TRACE_PCI_UPDATE_MAPPINGS_ADD_BACKEND_DSTATE() (0)
+static inline void trace_pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) {
+ (void)dev;
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)bar;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PCI_UPDATE_MAPPINGS_DEL 0
+#define TRACE_PCI_UPDATE_MAPPINGS_DEL_ENABLED 0
+#define TRACE_PCI_UPDATE_MAPPINGS_DEL_BACKEND_DSTATE() (0)
+static inline void trace_pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) {
+ (void)dev;
+ (void)bus;
+ (void)slot;
+ (void)func;
+ (void)bar;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PCIE_CAP_SLOT_WRITE_CONFIG 0
+#define TRACE_PCIE_CAP_SLOT_WRITE_CONFIG_ENABLED 0
+#define TRACE_PCIE_CAP_SLOT_WRITE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_pcie_cap_slot_write_config(const char *parent, const char *child, const char *pds, const char *old_pic, const char *new_pic, const char *old_aic, const char *new_aic, const char *old_power, const char *new_power) {
+ (void)parent;
+ (void)child;
+ (void)pds;
+ (void)old_pic;
+ (void)new_pic;
+ (void)old_aic;
+ (void)new_aic;
+ (void)old_power;
+ (void)new_power;
+}
+#define TRACE_SHPC_SLOT_COMMAND 0
+#define TRACE_SHPC_SLOT_COMMAND_ENABLED 0
+#define TRACE_SHPC_SLOT_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_shpc_slot_command(const char *parent, int pci_slot, const char *child, const char *old_pic, const char *new_pic, const char *old_aic, const char *new_aic, const char *old_state, const char *new_state) {
+ (void)parent;
+ (void)pci_slot;
+ (void)child;
+ (void)old_pic;
+ (void)new_pic;
+ (void)old_aic;
+ (void)new_aic;
+ (void)old_state;
+ (void)new_state;
+}
+#define TRACE_SRIOV_CONFIG_WRITE 0
+#define TRACE_SRIOV_CONFIG_WRITE_ENABLED 0
+#define TRACE_SRIOV_CONFIG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sriov_config_write(const char *name, int slot, int fun, uint32_t offset, uint32_t val, uint32_t len) {
+ (void)name;
+ (void)slot;
+ (void)fun;
+ (void)offset;
+ (void)val;
+ (void)len;
+}
+#define TRACE_SRIOV_REGISTER_VFS 0
+#define TRACE_SRIOV_REGISTER_VFS_ENABLED 0
+#define TRACE_SRIOV_REGISTER_VFS_BACKEND_DSTATE() (0)
+static inline void trace_sriov_register_vfs(const char *name, int slot, int function, int num_vfs) {
+ (void)name;
+ (void)slot;
+ (void)function;
+ (void)num_vfs;
+}
+#define TRACE_SRIOV_UNREGISTER_VFS 0
+#define TRACE_SRIOV_UNREGISTER_VFS_ENABLED 0
+#define TRACE_SRIOV_UNREGISTER_VFS_BACKEND_DSTATE() (0)
+static inline void trace_sriov_unregister_vfs(const char *name, int slot, int function) {
+ (void)name;
+ (void)slot;
+ (void)function;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_pci_host.h b/trace/trace-hw_pci_host.h
new file mode 100644
index 0000000000..44b16c548f
--- /dev/null
+++ b/trace/trace-hw_pci_host.h
@@ -0,0 +1,442 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_PCI_HOST_H
+#define TRACE_TRACE_HW_PCI_HOST_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ASPEED_PCIE_CFG_READ 0
+#define TRACE_ASPEED_PCIE_CFG_READ_ENABLED 0
+#define TRACE_ASPEED_PCIE_CFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_cfg_read(uint32_t id, uint64_t addr, uint32_t value) {
+ (void)id;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_PCIE_CFG_RW 0
+#define TRACE_ASPEED_PCIE_CFG_RW_ENABLED 0
+#define TRACE_ASPEED_PCIE_CFG_RW_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_cfg_rw(uint32_t id, const char *dir, uint8_t bus, uint8_t devfn, uint64_t addr, uint64_t data) {
+ (void)id;
+ (void)dir;
+ (void)bus;
+ (void)devfn;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_ASPEED_PCIE_CFG_WRITE 0
+#define TRACE_ASPEED_PCIE_CFG_WRITE_ENABLED 0
+#define TRACE_ASPEED_PCIE_CFG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_cfg_write(uint32_t id, uint64_t addr, uint32_t value) {
+ (void)id;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_PCIE_PHY_READ 0
+#define TRACE_ASPEED_PCIE_PHY_READ_ENABLED 0
+#define TRACE_ASPEED_PCIE_PHY_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_phy_read(uint32_t id, uint64_t addr, uint32_t value) {
+ (void)id;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_PCIE_PHY_WRITE 0
+#define TRACE_ASPEED_PCIE_PHY_WRITE_ENABLED 0
+#define TRACE_ASPEED_PCIE_PHY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_phy_write(uint32_t id, uint64_t addr, uint32_t value) {
+ (void)id;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_PCIE_RC_INTX_SET_IRQ 0
+#define TRACE_ASPEED_PCIE_RC_INTX_SET_IRQ_ENABLED 0
+#define TRACE_ASPEED_PCIE_RC_INTX_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_rc_intx_set_irq(uint32_t id, int num, int level) {
+ (void)id;
+ (void)num;
+ (void)level;
+}
+#define TRACE_ASPEED_PCIE_RC_MSI_CLEAR_IRQ 0
+#define TRACE_ASPEED_PCIE_RC_MSI_CLEAR_IRQ_ENABLED 0
+#define TRACE_ASPEED_PCIE_RC_MSI_CLEAR_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_rc_msi_clear_irq(uint32_t id, int level) {
+ (void)id;
+ (void)level;
+}
+#define TRACE_ASPEED_PCIE_RC_MSI_NOTIFY 0
+#define TRACE_ASPEED_PCIE_RC_MSI_NOTIFY_ENABLED 0
+#define TRACE_ASPEED_PCIE_RC_MSI_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_rc_msi_notify(uint32_t id, uint64_t addr, uint64_t data) {
+ (void)id;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_ASPEED_PCIE_RC_MSI_SET_IRQ 0
+#define TRACE_ASPEED_PCIE_RC_MSI_SET_IRQ_ENABLED 0
+#define TRACE_ASPEED_PCIE_RC_MSI_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_pcie_rc_msi_set_irq(uint32_t id, uint64_t unm, int level) {
+ (void)id;
+ (void)unm;
+ (void)level;
+}
+#define TRACE_ASTRO_CHIP_MEM_VALID 0
+#define TRACE_ASTRO_CHIP_MEM_VALID_ENABLED 0
+#define TRACE_ASTRO_CHIP_MEM_VALID_BACKEND_DSTATE() (0)
+static inline void trace_astro_chip_mem_valid(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ASTRO_CHIP_READ 0
+#define TRACE_ASTRO_CHIP_READ_ENABLED 0
+#define TRACE_ASTRO_CHIP_READ_BACKEND_DSTATE() (0)
+static inline void trace_astro_chip_read(uint64_t addr, int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_ASTRO_CHIP_WRITE 0
+#define TRACE_ASTRO_CHIP_WRITE_ENABLED 0
+#define TRACE_ASTRO_CHIP_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_astro_chip_write(uint64_t addr, int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_BONITO_SPCICONF_SMALL_ACCESS 0
+#define TRACE_BONITO_SPCICONF_SMALL_ACCESS_ENABLED 0
+#define TRACE_BONITO_SPCICONF_SMALL_ACCESS_BACKEND_DSTATE() (0)
+static inline void trace_bonito_spciconf_small_access(uint64_t addr, unsigned size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_DINO_CHIP_MEM_VALID 0
+#define TRACE_DINO_CHIP_MEM_VALID_ENABLED 0
+#define TRACE_DINO_CHIP_MEM_VALID_BACKEND_DSTATE() (0)
+static inline void trace_dino_chip_mem_valid(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_DINO_CHIP_READ 0
+#define TRACE_DINO_CHIP_READ_ENABLED 0
+#define TRACE_DINO_CHIP_READ_BACKEND_DSTATE() (0)
+static inline void trace_dino_chip_read(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_DINO_CHIP_WRITE 0
+#define TRACE_DINO_CHIP_WRITE_ENABLED 0
+#define TRACE_DINO_CHIP_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_dino_chip_write(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_ELROY_PCI_CONFIG_DATA_READ 0
+#define TRACE_ELROY_PCI_CONFIG_DATA_READ_ENABLED 0
+#define TRACE_ELROY_PCI_CONFIG_DATA_READ_BACKEND_DSTATE() (0)
+static inline void trace_elroy_pci_config_data_read(uint64_t addr, int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_ELROY_PCI_CONFIG_DATA_WRITE 0
+#define TRACE_ELROY_PCI_CONFIG_DATA_WRITE_ENABLED 0
+#define TRACE_ELROY_PCI_CONFIG_DATA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_elroy_pci_config_data_write(uint64_t addr, int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_ELROY_READ 0
+#define TRACE_ELROY_READ_ENABLED 0
+#define TRACE_ELROY_READ_BACKEND_DSTATE() (0)
+static inline void trace_elroy_read(uint64_t addr, int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_ELROY_WRITE 0
+#define TRACE_ELROY_WRITE_ENABLED 0
+#define TRACE_ELROY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_elroy_write(uint64_t addr, int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_GRACKLE_SET_IRQ 0
+#define TRACE_GRACKLE_SET_IRQ_ENABLED 0
+#define TRACE_GRACKLE_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_grackle_set_irq(int irq_num, int level) {
+ (void)irq_num;
+ (void)level;
+}
+#define TRACE_GT64120_ISD_REMAP 0
+#define TRACE_GT64120_ISD_REMAP_ENABLED 0
+#define TRACE_GT64120_ISD_REMAP_BACKEND_DSTATE() (0)
+static inline void trace_gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) {
+ (void)from_length;
+ (void)from_addr;
+ (void)to_length;
+ (void)to_addr;
+}
+#define TRACE_GT64120_READ 0
+#define TRACE_GT64120_READ_ENABLED 0
+#define TRACE_GT64120_READ_BACKEND_DSTATE() (0)
+static inline void trace_gt64120_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_GT64120_READ_INTREG 0
+#define TRACE_GT64120_READ_INTREG_ENABLED 0
+#define TRACE_GT64120_READ_INTREG_BACKEND_DSTATE() (0)
+static inline void trace_gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) {
+ (void)regname;
+ (void)size;
+ (void)value;
+}
+#define TRACE_GT64120_WRITE 0
+#define TRACE_GT64120_WRITE_ENABLED 0
+#define TRACE_GT64120_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_gt64120_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_GT64120_WRITE_INTREG 0
+#define TRACE_GT64120_WRITE_INTREG_ENABLED 0
+#define TRACE_GT64120_WRITE_INTREG_BACKEND_DSTATE() (0)
+static inline void trace_gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) {
+ (void)regname;
+ (void)size;
+ (void)value;
+}
+#define TRACE_IOSAPIC_REG_READ 0
+#define TRACE_IOSAPIC_REG_READ_ENABLED 0
+#define TRACE_IOSAPIC_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_iosapic_reg_read(uint64_t reg_select, int size, uint64_t val) {
+ (void)reg_select;
+ (void)size;
+ (void)val;
+}
+#define TRACE_IOSAPIC_REG_WRITE 0
+#define TRACE_IOSAPIC_REG_WRITE_ENABLED 0
+#define TRACE_IOSAPIC_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_iosapic_reg_write(uint64_t reg_select, int size, uint64_t val) {
+ (void)reg_select;
+ (void)size;
+ (void)val;
+}
+#define TRACE_MV64361_REG_READ 0
+#define TRACE_MV64361_REG_READ_ENABLED 0
+#define TRACE_MV64361_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_mv64361_reg_read(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MV64361_REG_WRITE 0
+#define TRACE_MV64361_REG_WRITE_ENABLED 0
+#define TRACE_MV64361_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mv64361_reg_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MV64361_REGION_ENABLE 0
+#define TRACE_MV64361_REGION_ENABLE_ENABLED 0
+#define TRACE_MV64361_REGION_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_mv64361_region_enable(const char *op, int num) {
+ (void)op;
+ (void)num;
+}
+#define TRACE_MV64361_REGION_MAP 0
+#define TRACE_MV64361_REGION_MAP_ENABLED 0
+#define TRACE_MV64361_REGION_MAP_BACKEND_DSTATE() (0)
+static inline void trace_mv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t moffs) {
+ (void)name;
+ (void)poffs;
+ (void)size;
+ (void)moffs;
+}
+#define TRACE_PNV_PHB4_XIVE_NOTIFY 0
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_ENABLED 0
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) {
+ (void)notif_port;
+ (void)data;
+}
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_ABT 0
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_ABT_ENABLED 0
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_ABT_BACKEND_DSTATE() (0)
+static inline void trace_pnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) {
+ (void)notif_port;
+ (void)data;
+}
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_IC 0
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_IC_ENABLED 0
+#define TRACE_PNV_PHB4_XIVE_NOTIFY_IC_BACKEND_DSTATE() (0)
+static inline void trace_pnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_PPC440_PCIX_MAP_IRQ 0
+#define TRACE_PPC440_PCIX_MAP_IRQ_ENABLED 0
+#define TRACE_PPC440_PCIX_MAP_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) {
+ (void)devfn;
+ (void)irq_num;
+ (void)slot;
+}
+#define TRACE_PPC440_PCIX_REG_READ 0
+#define TRACE_PPC440_PCIX_REG_READ_ENABLED 0
+#define TRACE_PPC440_PCIX_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_ppc440_pcix_reg_read(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PPC440_PCIX_REG_WRITE 0
+#define TRACE_PPC440_PCIX_REG_WRITE_ENABLED 0
+#define TRACE_PPC440_PCIX_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_PPC440_PCIX_SET_IRQ 0
+#define TRACE_PPC440_PCIX_SET_IRQ_ENABLED 0
+#define TRACE_PPC440_PCIX_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_ppc440_pcix_set_irq(int irq_num) {
+ (void)irq_num;
+}
+#define TRACE_PPC440_PCIX_UPDATE_PIM 0
+#define TRACE_PPC440_PCIX_UPDATE_PIM_ENABLED 0
+#define TRACE_PPC440_PCIX_UPDATE_PIM_BACKEND_DSTATE() (0)
+static inline void trace_ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) {
+ (void)idx;
+ (void)size;
+ (void)la;
+}
+#define TRACE_PPC440_PCIX_UPDATE_POM 0
+#define TRACE_PPC440_PCIX_UPDATE_POM_ENABLED 0
+#define TRACE_PPC440_PCIX_UPDATE_POM_BACKEND_DSTATE() (0)
+static inline void trace_ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) {
+ (void)idx;
+ (void)size;
+ (void)la;
+ (void)pcia;
+}
+#define TRACE_PPC4XX_PCI_MAP_IRQ 0
+#define TRACE_PPC4XX_PCI_MAP_IRQ_ENABLED 0
+#define TRACE_PPC4XX_PCI_MAP_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) {
+ (void)devfn;
+ (void)irq_num;
+ (void)slot;
+}
+#define TRACE_PPC4XX_PCI_SET_IRQ 0
+#define TRACE_PPC4XX_PCI_SET_IRQ_ENABLED 0
+#define TRACE_PPC4XX_PCI_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_pci_set_irq(int irq_num) {
+ (void)irq_num;
+}
+#define TRACE_SABRE_CLEAR_REQUEST 0
+#define TRACE_SABRE_CLEAR_REQUEST_ENABLED 0
+#define TRACE_SABRE_CLEAR_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_sabre_clear_request(int irq_num) {
+ (void)irq_num;
+}
+#define TRACE_SABRE_CONFIG_READ 0
+#define TRACE_SABRE_CONFIG_READ_ENABLED 0
+#define TRACE_SABRE_CONFIG_READ_BACKEND_DSTATE() (0)
+static inline void trace_sabre_config_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SABRE_CONFIG_WRITE 0
+#define TRACE_SABRE_CONFIG_WRITE_ENABLED 0
+#define TRACE_SABRE_CONFIG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sabre_config_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SABRE_PCI_CONFIG_READ 0
+#define TRACE_SABRE_PCI_CONFIG_READ_ENABLED 0
+#define TRACE_SABRE_PCI_CONFIG_READ_BACKEND_DSTATE() (0)
+static inline void trace_sabre_pci_config_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SABRE_PCI_CONFIG_WRITE 0
+#define TRACE_SABRE_PCI_CONFIG_WRITE_ENABLED 0
+#define TRACE_SABRE_PCI_CONFIG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sabre_pci_config_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SABRE_PCI_SET_IRQ 0
+#define TRACE_SABRE_PCI_SET_IRQ_ENABLED 0
+#define TRACE_SABRE_PCI_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sabre_pci_set_irq(int irq_num, int level) {
+ (void)irq_num;
+ (void)level;
+}
+#define TRACE_SABRE_PCI_SET_OBIO_IRQ 0
+#define TRACE_SABRE_PCI_SET_OBIO_IRQ_ENABLED 0
+#define TRACE_SABRE_PCI_SET_OBIO_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sabre_pci_set_obio_irq(int irq_num, int level) {
+ (void)irq_num;
+ (void)level;
+}
+#define TRACE_SABRE_SET_REQUEST 0
+#define TRACE_SABRE_SET_REQUEST_ENABLED 0
+#define TRACE_SABRE_SET_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_sabre_set_request(int irq_num) {
+ (void)irq_num;
+}
+#define TRACE_UNIN_DATA_READ 0
+#define TRACE_UNIN_DATA_READ_ENABLED 0
+#define TRACE_UNIN_DATA_READ_BACKEND_DSTATE() (0)
+static inline void trace_unin_data_read(uint64_t addr, unsigned len, uint64_t val) {
+ (void)addr;
+ (void)len;
+ (void)val;
+}
+#define TRACE_UNIN_DATA_WRITE 0
+#define TRACE_UNIN_DATA_WRITE_ENABLED 0
+#define TRACE_UNIN_DATA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_unin_data_write(uint64_t addr, unsigned len, uint64_t val) {
+ (void)addr;
+ (void)len;
+ (void)val;
+}
+#define TRACE_UNIN_GET_CONFIG_REG 0
+#define TRACE_UNIN_GET_CONFIG_REG_ENABLED 0
+#define TRACE_UNIN_GET_CONFIG_REG_BACKEND_DSTATE() (0)
+static inline void trace_unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) {
+ (void)reg;
+ (void)addr;
+ (void)retval;
+}
+#define TRACE_UNIN_READ 0
+#define TRACE_UNIN_READ_ENABLED 0
+#define TRACE_UNIN_READ_BACKEND_DSTATE() (0)
+static inline void trace_unin_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_UNIN_SET_IRQ 0
+#define TRACE_UNIN_SET_IRQ_ENABLED 0
+#define TRACE_UNIN_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_unin_set_irq(int irq_num, int level) {
+ (void)irq_num;
+ (void)level;
+}
+#define TRACE_UNIN_WRITE 0
+#define TRACE_UNIN_WRITE_ENABLED 0
+#define TRACE_UNIN_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_unin_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_ppc.h b/trace/trace-hw_ppc.h
new file mode 100644
index 0000000000..67a93d3c38
--- /dev/null
+++ b/trace/trace-hw_ppc.h
@@ -0,0 +1,1004 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_PPC_H
+#define TRACE_TRACE_HW_PPC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_OCM_MAP 0
+#define TRACE_OCM_MAP_ENABLED 0
+#define TRACE_OCM_MAP_BACKEND_DSTATE() (0)
+static inline void trace_ocm_map(const char* prefix, uint32_t isarc) {
+ (void)prefix;
+ (void)isarc;
+}
+#define TRACE_OCM_UNMAP 0
+#define TRACE_OCM_UNMAP_ENABLED 0
+#define TRACE_OCM_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_ocm_unmap(const char* prefix, uint32_t isarc) {
+ (void)prefix;
+ (void)isarc;
+}
+#define TRACE_OCM_UPDATE_MAPPINGS 0
+#define TRACE_OCM_UPDATE_MAPPINGS_ENABLED 0
+#define TRACE_OCM_UPDATE_MAPPINGS_BACKEND_DSTATE() (0)
+static inline void trace_ocm_update_mappings(uint32_t isarc, uint32_t isacntl, uint32_t dsarc, uint32_t dsacntl, uint32_t ocm_isarc, uint32_t ocm_isacntl, uint32_t ocm_dsarc, uint32_t ocm_dsacntl) {
+ (void)isarc;
+ (void)isacntl;
+ (void)dsarc;
+ (void)dsacntl;
+ (void)ocm_isarc;
+ (void)ocm_isacntl;
+ (void)ocm_dsarc;
+ (void)ocm_dsacntl;
+}
+#define TRACE_OPBA_READB 0
+#define TRACE_OPBA_READB_ENABLED 0
+#define TRACE_OPBA_READB_BACKEND_DSTATE() (0)
+static inline void trace_opba_readb(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_OPBA_WRITEB 0
+#define TRACE_OPBA_WRITEB_ENABLED 0
+#define TRACE_OPBA_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_opba_writeb(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_ADU_XSCOM_READ 0
+#define TRACE_PNV_ADU_XSCOM_READ_ENABLED 0
+#define TRACE_PNV_ADU_XSCOM_READ_BACKEND_DSTATE() (0)
+static inline void trace_pnv_adu_xscom_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_ADU_XSCOM_WRITE 0
+#define TRACE_PNV_ADU_XSCOM_WRITE_ENABLED 0
+#define TRACE_PNV_ADU_XSCOM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pnv_adu_xscom_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_CHIPTOD_XSCOM_READ 0
+#define TRACE_PNV_CHIPTOD_XSCOM_READ_ENABLED 0
+#define TRACE_PNV_CHIPTOD_XSCOM_READ_BACKEND_DSTATE() (0)
+static inline void trace_pnv_chiptod_xscom_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_CHIPTOD_XSCOM_WRITE 0
+#define TRACE_PNV_CHIPTOD_XSCOM_WRITE_ENABLED 0
+#define TRACE_PNV_CHIPTOD_XSCOM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pnv_chiptod_xscom_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_SBE_CMD_TIMER_EXPIRED 0
+#define TRACE_PNV_SBE_CMD_TIMER_EXPIRED_ENABLED 0
+#define TRACE_PNV_SBE_CMD_TIMER_EXPIRED_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_cmd_timer_expired(void) {
+}
+#define TRACE_PNV_SBE_CMD_TIMER_START 0
+#define TRACE_PNV_SBE_CMD_TIMER_START_ENABLED 0
+#define TRACE_PNV_SBE_CMD_TIMER_START_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_cmd_timer_start(uint64_t ns) {
+ (void)ns;
+}
+#define TRACE_PNV_SBE_CMD_TIMER_STOP 0
+#define TRACE_PNV_SBE_CMD_TIMER_STOP_ENABLED 0
+#define TRACE_PNV_SBE_CMD_TIMER_STOP_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_cmd_timer_stop(void) {
+}
+#define TRACE_PNV_SBE_MSG_RECV 0
+#define TRACE_PNV_SBE_MSG_RECV_ENABLED 0
+#define TRACE_PNV_SBE_MSG_RECV_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_msg_recv(uint16_t cmd, uint16_t seq, uint16_t ctrl_flags) {
+ (void)cmd;
+ (void)seq;
+ (void)ctrl_flags;
+}
+#define TRACE_PNV_SBE_REG_SET_HOST_DOORBELL 0
+#define TRACE_PNV_SBE_REG_SET_HOST_DOORBELL_ENABLED 0
+#define TRACE_PNV_SBE_REG_SET_HOST_DOORBELL_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_reg_set_host_doorbell(uint64_t val) {
+ (void)val;
+}
+#define TRACE_PNV_SBE_XSCOM_CTRL_READ 0
+#define TRACE_PNV_SBE_XSCOM_CTRL_READ_ENABLED 0
+#define TRACE_PNV_SBE_XSCOM_CTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_xscom_ctrl_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_SBE_XSCOM_CTRL_WRITE 0
+#define TRACE_PNV_SBE_XSCOM_CTRL_WRITE_ENABLED 0
+#define TRACE_PNV_SBE_XSCOM_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_xscom_ctrl_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_SBE_XSCOM_MBOX_READ 0
+#define TRACE_PNV_SBE_XSCOM_MBOX_READ_ENABLED 0
+#define TRACE_PNV_SBE_XSCOM_MBOX_READ_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_xscom_mbox_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_SBE_XSCOM_MBOX_WRITE 0
+#define TRACE_PNV_SBE_XSCOM_MBOX_WRITE_ENABLED 0
+#define TRACE_PNV_SBE_XSCOM_MBOX_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pnv_sbe_xscom_mbox_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PPC_DCR_READ 0
+#define TRACE_PPC_DCR_READ_ENABLED 0
+#define TRACE_PPC_DCR_READ_BACKEND_DSTATE() (0)
+static inline void trace_ppc_dcr_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PPC_DCR_WRITE 0
+#define TRACE_PPC_DCR_WRITE_ENABLED 0
+#define TRACE_PPC_DCR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ppc_dcr_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PPC_DECR_EXCP 0
+#define TRACE_PPC_DECR_EXCP_ENABLED 0
+#define TRACE_PPC_DECR_EXCP_BACKEND_DSTATE() (0)
+static inline void trace_ppc_decr_excp(const char *action) {
+ (void)action;
+}
+#define TRACE_PPC_DECR_LOAD 0
+#define TRACE_PPC_DECR_LOAD_ENABLED 0
+#define TRACE_PPC_DECR_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_ppc_decr_load(uint64_t tb) {
+ (void)tb;
+}
+#define TRACE_PPC_DECR_STORE 0
+#define TRACE_PPC_DECR_STORE_ENABLED 0
+#define TRACE_PPC_DECR_STORE_BACKEND_DSTATE() (0)
+static inline void trace_ppc_decr_store(uint32_t nr_bits, uint64_t decr, uint64_t value) {
+ (void)nr_bits;
+ (void)decr;
+ (void)value;
+}
+#define TRACE_PPC_IRQ_CPU 0
+#define TRACE_PPC_IRQ_CPU_ENABLED 0
+#define TRACE_PPC_IRQ_CPU_BACKEND_DSTATE() (0)
+static inline void trace_ppc_irq_cpu(const char *action) {
+ (void)action;
+}
+#define TRACE_PPC_IRQ_RESET 0
+#define TRACE_PPC_IRQ_RESET_ENABLED 0
+#define TRACE_PPC_IRQ_RESET_BACKEND_DSTATE() (0)
+static inline void trace_ppc_irq_reset(const char *name) {
+ (void)name;
+}
+#define TRACE_PPC_IRQ_SET 0
+#define TRACE_PPC_IRQ_SET_ENABLED 0
+#define TRACE_PPC_IRQ_SET_BACKEND_DSTATE() (0)
+static inline void trace_ppc_irq_set(void *env, uint32_t pin, uint32_t level) {
+ (void)env;
+ (void)pin;
+ (void)level;
+}
+#define TRACE_PPC_IRQ_SET_EXIT 0
+#define TRACE_PPC_IRQ_SET_EXIT_ENABLED 0
+#define TRACE_PPC_IRQ_SET_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_ppc_irq_set_exit(void *env, uint32_t irq, uint32_t level, uint32_t pending, uint32_t request) {
+ (void)env;
+ (void)irq;
+ (void)level;
+ (void)pending;
+ (void)request;
+}
+#define TRACE_PPC_IRQ_SET_STATE 0
+#define TRACE_PPC_IRQ_SET_STATE_ENABLED 0
+#define TRACE_PPC_IRQ_SET_STATE_BACKEND_DSTATE() (0)
+static inline void trace_ppc_irq_set_state(const char *name, uint32_t level) {
+ (void)name;
+ (void)level;
+}
+#define TRACE_PPC_TB_ADJUST 0
+#define TRACE_PPC_TB_ADJUST_ENABLED 0
+#define TRACE_PPC_TB_ADJUST_BACKEND_DSTATE() (0)
+static inline void trace_ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) {
+ (void)offs1;
+ (void)offs2;
+ (void)diff;
+ (void)seconds;
+}
+#define TRACE_PPC_TB_LOAD 0
+#define TRACE_PPC_TB_LOAD_ENABLED 0
+#define TRACE_PPC_TB_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_ppc_tb_load(uint64_t tb) {
+ (void)tb;
+}
+#define TRACE_PPC_TB_STORE 0
+#define TRACE_PPC_TB_STORE_ENABLED 0
+#define TRACE_PPC_TB_STORE_BACKEND_DSTATE() (0)
+static inline void trace_ppc_tb_store(uint64_t tb, uint64_t offset) {
+ (void)tb;
+ (void)offset;
+}
+#define TRACE_PPC405_GPIO_READ 0
+#define TRACE_PPC405_GPIO_READ_ENABLED 0
+#define TRACE_PPC405_GPIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_ppc405_gpio_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PPC405_GPIO_WRITE 0
+#define TRACE_PPC405_GPIO_WRITE_ENABLED 0
+#define TRACE_PPC405_GPIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ppc405_gpio_write(uint64_t addr, uint32_t size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_PPC405EP_CLOCKS_COMPUTE 0
+#define TRACE_PPC405EP_CLOCKS_COMPUTE_ENABLED 0
+#define TRACE_PPC405EP_CLOCKS_COMPUTE_BACKEND_DSTATE() (0)
+static inline void trace_ppc405ep_clocks_compute(const char *param, uint32_t param2, uint32_t val) {
+ (void)param;
+ (void)param2;
+ (void)val;
+}
+#define TRACE_PPC405EP_CLOCKS_SETUP 0
+#define TRACE_PPC405EP_CLOCKS_SETUP_ENABLED 0
+#define TRACE_PPC405EP_CLOCKS_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_ppc405ep_clocks_setup(const char *trace) {
+ (void)trace;
+}
+#define TRACE_PPC40X_SET_TB_CLK 0
+#define TRACE_PPC40X_SET_TB_CLK_ENABLED 0
+#define TRACE_PPC40X_SET_TB_CLK_BACKEND_DSTATE() (0)
+static inline void trace_ppc40x_set_tb_clk(uint32_t value) {
+ (void)value;
+}
+#define TRACE_PPC40X_STORE_PIT 0
+#define TRACE_PPC40X_STORE_PIT_ENABLED 0
+#define TRACE_PPC40X_STORE_PIT_BACKEND_DSTATE() (0)
+static inline void trace_ppc40x_store_pit(uint64_t value) {
+ (void)value;
+}
+#define TRACE_PPC40X_STORE_TCR 0
+#define TRACE_PPC40X_STORE_TCR_ENABLED 0
+#define TRACE_PPC40X_STORE_TCR_BACKEND_DSTATE() (0)
+static inline void trace_ppc40x_store_tcr(uint64_t value) {
+ (void)value;
+}
+#define TRACE_PPC40X_STORE_TSR 0
+#define TRACE_PPC40X_STORE_TSR_ENABLED 0
+#define TRACE_PPC40X_STORE_TSR_BACKEND_DSTATE() (0)
+static inline void trace_ppc40x_store_tsr(uint64_t value) {
+ (void)value;
+}
+#define TRACE_PPC40X_TIMERS_INIT 0
+#define TRACE_PPC40X_TIMERS_INIT_ENABLED 0
+#define TRACE_PPC40X_TIMERS_INIT_BACKEND_DSTATE() (0)
+static inline void trace_ppc40x_timers_init(uint32_t value) {
+ (void)value;
+}
+#define TRACE_PPC4XX_FIT 0
+#define TRACE_PPC4XX_FIT_ENABLED 0
+#define TRACE_PPC4XX_FIT_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_fit(uint32_t ir, uint64_t tcr, uint64_t tsr) {
+ (void)ir;
+ (void)tcr;
+ (void)tsr;
+}
+#define TRACE_PPC4XX_GPT_READ 0
+#define TRACE_PPC4XX_GPT_READ_ENABLED 0
+#define TRACE_PPC4XX_GPT_READ_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_gpt_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PPC4XX_GPT_WRITE 0
+#define TRACE_PPC4XX_GPT_WRITE_ENABLED 0
+#define TRACE_PPC4XX_GPT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_gpt_write(uint64_t addr, uint32_t size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_PPC4XX_PIT 0
+#define TRACE_PPC4XX_PIT_ENABLED 0
+#define TRACE_PPC4XX_PIT_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_pit(uint32_t ar, uint32_t ir, uint64_t tcr, uint64_t tsr, uint64_t reload) {
+ (void)ar;
+ (void)ir;
+ (void)tcr;
+ (void)tsr;
+ (void)reload;
+}
+#define TRACE_PPC4XX_PIT_START 0
+#define TRACE_PPC4XX_PIT_START_ENABLED 0
+#define TRACE_PPC4XX_PIT_START_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_pit_start(uint64_t reload) {
+ (void)reload;
+}
+#define TRACE_PPC4XX_PIT_STOP 0
+#define TRACE_PPC4XX_PIT_STOP_ENABLED 0
+#define TRACE_PPC4XX_PIT_STOP_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_pit_stop(void) {
+}
+#define TRACE_PPC4XX_SDRAM_ENABLE 0
+#define TRACE_PPC4XX_SDRAM_ENABLE_ENABLED 0
+#define TRACE_PPC4XX_SDRAM_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_sdram_enable(const char *trace) {
+ (void)trace;
+}
+#define TRACE_PPC4XX_SDRAM_INIT 0
+#define TRACE_PPC4XX_SDRAM_INIT_ENABLED 0
+#define TRACE_PPC4XX_SDRAM_INIT_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_sdram_init(uint64_t base, uint64_t size, uint32_t bcr) {
+ (void)base;
+ (void)size;
+ (void)bcr;
+}
+#define TRACE_PPC4XX_SDRAM_MAP 0
+#define TRACE_PPC4XX_SDRAM_MAP_ENABLED 0
+#define TRACE_PPC4XX_SDRAM_MAP_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_sdram_map(uint64_t addr, uint64_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PPC4XX_SDRAM_UNMAP 0
+#define TRACE_PPC4XX_SDRAM_UNMAP_ENABLED 0
+#define TRACE_PPC4XX_SDRAM_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_sdram_unmap(uint64_t addr, uint64_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_PPC4XX_WDT 0
+#define TRACE_PPC4XX_WDT_ENABLED 0
+#define TRACE_PPC4XX_WDT_BACKEND_DSTATE() (0)
+static inline void trace_ppc4xx_wdt(uint64_t tcr, uint64_t tsr) {
+ (void)tcr;
+ (void)tsr;
+}
+#define TRACE_PREP_SYSTEMIO_READ 0
+#define TRACE_PREP_SYSTEMIO_READ_ENABLED 0
+#define TRACE_PREP_SYSTEMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_prep_systemio_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PREP_SYSTEMIO_WRITE 0
+#define TRACE_PREP_SYSTEMIO_WRITE_ENABLED 0
+#define TRACE_PREP_SYSTEMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_prep_systemio_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_RS6000MC_ID_READ 0
+#define TRACE_RS6000MC_ID_READ_ENABLED 0
+#define TRACE_RS6000MC_ID_READ_BACKEND_DSTATE() (0)
+static inline void trace_rs6000mc_id_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_RS6000MC_PARITY_READ 0
+#define TRACE_RS6000MC_PARITY_READ_ENABLED 0
+#define TRACE_RS6000MC_PARITY_READ_BACKEND_DSTATE() (0)
+static inline void trace_rs6000mc_parity_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_RS6000MC_PRESENCE_READ 0
+#define TRACE_RS6000MC_PRESENCE_READ_ENABLED 0
+#define TRACE_RS6000MC_PRESENCE_READ_BACKEND_DSTATE() (0)
+static inline void trace_rs6000mc_presence_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_RS6000MC_SIZE_READ 0
+#define TRACE_RS6000MC_SIZE_READ_ENABLED 0
+#define TRACE_RS6000MC_SIZE_READ_BACKEND_DSTATE() (0)
+static inline void trace_rs6000mc_size_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_RS6000MC_SIZE_WRITE 0
+#define TRACE_RS6000MC_SIZE_WRITE_ENABLED 0
+#define TRACE_RS6000MC_SIZE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_rs6000mc_size_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SPAPR_CAS_CONTINUE 0
+#define TRACE_SPAPR_CAS_CONTINUE_ENABLED 0
+#define TRACE_SPAPR_CAS_CONTINUE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_cas_continue(unsigned long n) {
+ (void)n;
+}
+#define TRACE_SPAPR_CAS_PVR 0
+#define TRACE_SPAPR_CAS_PVR_ENABLED 0
+#define TRACE_SPAPR_CAS_PVR_BACKEND_DSTATE() (0)
+static inline void trace_spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) {
+ (void)cur_pvr;
+ (void)explicit_match;
+ (void)new_pvr;
+}
+#define TRACE_SPAPR_DRC_ATTACH 0
+#define TRACE_SPAPR_DRC_ATTACH_ENABLED 0
+#define TRACE_SPAPR_DRC_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_attach(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_AWAITING_QUIESCE 0
+#define TRACE_SPAPR_DRC_AWAITING_QUIESCE_ENABLED 0
+#define TRACE_SPAPR_DRC_AWAITING_QUIESCE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_awaiting_quiesce(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_REALIZE 0
+#define TRACE_SPAPR_DRC_REALIZE_ENABLED 0
+#define TRACE_SPAPR_DRC_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_realize(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_REALIZE_CHILD 0
+#define TRACE_SPAPR_DRC_REALIZE_CHILD_ENABLED 0
+#define TRACE_SPAPR_DRC_REALIZE_CHILD_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_realize_child(uint32_t index, const char *childname) {
+ (void)index;
+ (void)childname;
+}
+#define TRACE_SPAPR_DRC_REALIZE_COMPLETE 0
+#define TRACE_SPAPR_DRC_REALIZE_COMPLETE_ENABLED 0
+#define TRACE_SPAPR_DRC_REALIZE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_realize_complete(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_RESET 0
+#define TRACE_SPAPR_DRC_RESET_ENABLED 0
+#define TRACE_SPAPR_DRC_RESET_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_reset(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_SET_ALLOCATION_STATE 0
+#define TRACE_SPAPR_DRC_SET_ALLOCATION_STATE_ENABLED 0
+#define TRACE_SPAPR_DRC_SET_ALLOCATION_STATE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_set_allocation_state(uint32_t index, int state) {
+ (void)index;
+ (void)state;
+}
+#define TRACE_SPAPR_DRC_SET_ALLOCATION_STATE_FINALIZING 0
+#define TRACE_SPAPR_DRC_SET_ALLOCATION_STATE_FINALIZING_ENABLED 0
+#define TRACE_SPAPR_DRC_SET_ALLOCATION_STATE_FINALIZING_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_set_allocation_state_finalizing(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_SET_CONFIGURED 0
+#define TRACE_SPAPR_DRC_SET_CONFIGURED_ENABLED 0
+#define TRACE_SPAPR_DRC_SET_CONFIGURED_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_set_configured(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_SET_DR_INDICATOR 0
+#define TRACE_SPAPR_DRC_SET_DR_INDICATOR_ENABLED 0
+#define TRACE_SPAPR_DRC_SET_DR_INDICATOR_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_set_dr_indicator(uint32_t index, int state) {
+ (void)index;
+ (void)state;
+}
+#define TRACE_SPAPR_DRC_SET_ISOLATION_STATE 0
+#define TRACE_SPAPR_DRC_SET_ISOLATION_STATE_ENABLED 0
+#define TRACE_SPAPR_DRC_SET_ISOLATION_STATE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_set_isolation_state(uint32_t index, int state) {
+ (void)index;
+ (void)state;
+}
+#define TRACE_SPAPR_DRC_SET_ISOLATION_STATE_FINALIZING 0
+#define TRACE_SPAPR_DRC_SET_ISOLATION_STATE_FINALIZING_ENABLED 0
+#define TRACE_SPAPR_DRC_SET_ISOLATION_STATE_FINALIZING_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_set_isolation_state_finalizing(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_UNPLUG_REQUEST 0
+#define TRACE_SPAPR_DRC_UNPLUG_REQUEST_ENABLED 0
+#define TRACE_SPAPR_DRC_UNPLUG_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_unplug_request(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_DRC_UNREALIZE 0
+#define TRACE_SPAPR_DRC_UNREALIZE_ENABLED 0
+#define TRACE_SPAPR_DRC_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_drc_unrealize(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_H_RESIZE_HPT_COMMIT 0
+#define TRACE_SPAPR_H_RESIZE_HPT_COMMIT_ENABLED 0
+#define TRACE_SPAPR_H_RESIZE_HPT_COMMIT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_h_resize_hpt_commit(uint64_t flags, uint64_t shift) {
+ (void)flags;
+ (void)shift;
+}
+#define TRACE_SPAPR_H_RESIZE_HPT_PREPARE 0
+#define TRACE_SPAPR_H_RESIZE_HPT_PREPARE_ENABLED 0
+#define TRACE_SPAPR_H_RESIZE_HPT_PREPARE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_h_resize_hpt_prepare(uint64_t flags, uint64_t shift) {
+ (void)flags;
+ (void)shift;
+}
+#define TRACE_SPAPR_H_TPM_COMM 0
+#define TRACE_SPAPR_H_TPM_COMM_ENABLED 0
+#define TRACE_SPAPR_H_TPM_COMM_BACKEND_DSTATE() (0)
+static inline void trace_spapr_h_tpm_comm(const char *device_path, uint64_t operation) {
+ (void)device_path;
+ (void)operation;
+}
+#define TRACE_SPAPR_IOMMU_DDW_CREATE 0
+#define TRACE_SPAPR_IOMMU_DDW_CREATE_ENABLED 0
+#define TRACE_SPAPR_IOMMU_DDW_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, uint64_t pg_size, uint64_t req_size, uint64_t start, uint32_t liobn) {
+ (void)buid;
+ (void)cfgaddr;
+ (void)pg_size;
+ (void)req_size;
+ (void)start;
+ (void)liobn;
+}
+#define TRACE_SPAPR_IOMMU_DDW_QUERY 0
+#define TRACE_SPAPR_IOMMU_DDW_QUERY_ENABLED 0
+#define TRACE_SPAPR_IOMMU_DDW_QUERY_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_ddw_query(uint64_t buid, uint32_t cfgaddr, unsigned wa, uint64_t win_size, uint32_t pgmask) {
+ (void)buid;
+ (void)cfgaddr;
+ (void)wa;
+ (void)win_size;
+ (void)pgmask;
+}
+#define TRACE_SPAPR_IOMMU_DDW_REMOVE 0
+#define TRACE_SPAPR_IOMMU_DDW_REMOVE_ENABLED 0
+#define TRACE_SPAPR_IOMMU_DDW_REMOVE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_ddw_remove(uint32_t liobn) {
+ (void)liobn;
+}
+#define TRACE_SPAPR_IOMMU_DDW_RESET 0
+#define TRACE_SPAPR_IOMMU_DDW_RESET_ENABLED 0
+#define TRACE_SPAPR_IOMMU_DDW_RESET_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_ddw_reset(uint64_t buid, uint32_t cfgaddr) {
+ (void)buid;
+ (void)cfgaddr;
+}
+#define TRACE_SPAPR_IOMMU_GET 0
+#define TRACE_SPAPR_IOMMU_GET_ENABLED 0
+#define TRACE_SPAPR_IOMMU_GET_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) {
+ (void)liobn;
+ (void)ioba;
+ (void)ret;
+ (void)tce;
+}
+#define TRACE_SPAPR_IOMMU_INDIRECT 0
+#define TRACE_SPAPR_IOMMU_INDIRECT_ENABLED 0
+#define TRACE_SPAPR_IOMMU_INDIRECT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) {
+ (void)liobn;
+ (void)ioba;
+ (void)tce;
+ (void)iobaN;
+ (void)tceN;
+ (void)ret;
+}
+#define TRACE_SPAPR_IOMMU_NEW_TABLE 0
+#define TRACE_SPAPR_IOMMU_NEW_TABLE_ENABLED 0
+#define TRACE_SPAPR_IOMMU_NEW_TABLE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_new_table(uint64_t liobn, void *table, int fd) {
+ (void)liobn;
+ (void)table;
+ (void)fd;
+}
+#define TRACE_SPAPR_IOMMU_PCI_GET 0
+#define TRACE_SPAPR_IOMMU_PCI_GET_ENABLED 0
+#define TRACE_SPAPR_IOMMU_PCI_GET_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) {
+ (void)liobn;
+ (void)ioba;
+ (void)ret;
+ (void)tce;
+}
+#define TRACE_SPAPR_IOMMU_PCI_INDIRECT 0
+#define TRACE_SPAPR_IOMMU_PCI_INDIRECT_ENABLED 0
+#define TRACE_SPAPR_IOMMU_PCI_INDIRECT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) {
+ (void)liobn;
+ (void)ioba;
+ (void)tce;
+ (void)iobaN;
+ (void)tceN;
+ (void)ret;
+}
+#define TRACE_SPAPR_IOMMU_PCI_PUT 0
+#define TRACE_SPAPR_IOMMU_PCI_PUT_ENABLED 0
+#define TRACE_SPAPR_IOMMU_PCI_PUT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) {
+ (void)liobn;
+ (void)ioba;
+ (void)tce;
+ (void)ret;
+}
+#define TRACE_SPAPR_IOMMU_PCI_STUFF 0
+#define TRACE_SPAPR_IOMMU_PCI_STUFF_ENABLED 0
+#define TRACE_SPAPR_IOMMU_PCI_STUFF_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) {
+ (void)liobn;
+ (void)ioba;
+ (void)tce_value;
+ (void)npages;
+ (void)ret;
+}
+#define TRACE_SPAPR_IOMMU_POST_LOAD 0
+#define TRACE_SPAPR_IOMMU_POST_LOAD_ENABLED 0
+#define TRACE_SPAPR_IOMMU_POST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) {
+ (void)liobn;
+ (void)pre_nb;
+ (void)post_nb;
+ (void)offs;
+ (void)ps;
+}
+#define TRACE_SPAPR_IOMMU_PRE_SAVE 0
+#define TRACE_SPAPR_IOMMU_PRE_SAVE_ENABLED 0
+#define TRACE_SPAPR_IOMMU_PRE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) {
+ (void)liobn;
+ (void)nb;
+ (void)offs;
+ (void)ps;
+}
+#define TRACE_SPAPR_IOMMU_PUT 0
+#define TRACE_SPAPR_IOMMU_PUT_ENABLED 0
+#define TRACE_SPAPR_IOMMU_PUT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) {
+ (void)liobn;
+ (void)ioba;
+ (void)tce;
+ (void)ret;
+}
+#define TRACE_SPAPR_IOMMU_STUFF 0
+#define TRACE_SPAPR_IOMMU_STUFF_ENABLED 0
+#define TRACE_SPAPR_IOMMU_STUFF_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) {
+ (void)liobn;
+ (void)ioba;
+ (void)tce_value;
+ (void)npages;
+ (void)ret;
+}
+#define TRACE_SPAPR_IOMMU_XLATE 0
+#define TRACE_SPAPR_IOMMU_XLATE_ENABLED 0
+#define TRACE_SPAPR_IOMMU_XLATE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) {
+ (void)liobn;
+ (void)ioba;
+ (void)tce;
+ (void)perm;
+ (void)pgsize;
+}
+#define TRACE_SPAPR_OVEC_PARSE_VECTOR 0
+#define TRACE_SPAPR_OVEC_PARSE_VECTOR_ENABLED 0
+#define TRACE_SPAPR_OVEC_PARSE_VECTOR_BACKEND_DSTATE() (0)
+static inline void trace_spapr_ovec_parse_vector(int vector, int byte, uint16_t vec_len, uint8_t entry) {
+ (void)vector;
+ (void)byte;
+ (void)vec_len;
+ (void)entry;
+}
+#define TRACE_SPAPR_OVEC_POPULATE_DT 0
+#define TRACE_SPAPR_OVEC_POPULATE_DT_ENABLED 0
+#define TRACE_SPAPR_OVEC_POPULATE_DT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_ovec_populate_dt(int byte, uint16_t vec_len, uint8_t entry) {
+ (void)byte;
+ (void)vec_len;
+ (void)entry;
+}
+#define TRACE_SPAPR_PCI_LSI_SET 0
+#define TRACE_SPAPR_PCI_LSI_SET_ENABLED 0
+#define TRACE_SPAPR_PCI_LSI_SET_BACKEND_DSTATE() (0)
+static inline void trace_spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) {
+ (void)busname;
+ (void)pin;
+ (void)irq;
+}
+#define TRACE_SPAPR_PCI_MSI 0
+#define TRACE_SPAPR_PCI_MSI_ENABLED 0
+#define TRACE_SPAPR_PCI_MSI_BACKEND_DSTATE() (0)
+static inline void trace_spapr_pci_msi(const char *msg, uint32_t ca) {
+ (void)msg;
+ (void)ca;
+}
+#define TRACE_SPAPR_PCI_MSI_RETRY 0
+#define TRACE_SPAPR_PCI_MSI_RETRY_ENABLED 0
+#define TRACE_SPAPR_PCI_MSI_RETRY_BACKEND_DSTATE() (0)
+static inline void trace_spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) {
+ (void)config_addr;
+ (void)req_num;
+ (void)max_irqs;
+}
+#define TRACE_SPAPR_PCI_MSI_SETUP 0
+#define TRACE_SPAPR_PCI_MSI_SETUP_ENABLED 0
+#define TRACE_SPAPR_PCI_MSI_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) {
+ (void)name;
+ (void)vector;
+ (void)addr;
+}
+#define TRACE_SPAPR_PCI_MSI_WRITE 0
+#define TRACE_SPAPR_PCI_MSI_WRITE_ENABLED 0
+#define TRACE_SPAPR_PCI_MSI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) {
+ (void)addr;
+ (void)data;
+ (void)dt_irq;
+}
+#define TRACE_SPAPR_PCI_RTAS_IBM_CHANGE_MSI 0
+#define TRACE_SPAPR_PCI_RTAS_IBM_CHANGE_MSI_ENABLED 0
+#define TRACE_SPAPR_PCI_RTAS_IBM_CHANGE_MSI_BACKEND_DSTATE() (0)
+static inline void trace_spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) {
+ (void)cfg;
+ (void)func;
+ (void)req;
+ (void)first;
+}
+#define TRACE_SPAPR_PCI_RTAS_IBM_QUERY_INTERRUPT_SOURCE_NUMBER 0
+#define TRACE_SPAPR_PCI_RTAS_IBM_QUERY_INTERRUPT_SOURCE_NUMBER_ENABLED 0
+#define TRACE_SPAPR_PCI_RTAS_IBM_QUERY_INTERRUPT_SOURCE_NUMBER_BACKEND_DSTATE() (0)
+static inline void trace_spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) {
+ (void)ioa;
+ (void)intr;
+}
+#define TRACE_SPAPR_RTAS_GET_SENSOR_STATE_INVALID 0
+#define TRACE_SPAPR_RTAS_GET_SENSOR_STATE_INVALID_ENABLED 0
+#define TRACE_SPAPR_RTAS_GET_SENSOR_STATE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_spapr_rtas_get_sensor_state_invalid(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_RTAS_GET_SENSOR_STATE_NOT_SUPPORTED 0
+#define TRACE_SPAPR_RTAS_GET_SENSOR_STATE_NOT_SUPPORTED_ENABLED 0
+#define TRACE_SPAPR_RTAS_GET_SENSOR_STATE_NOT_SUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_spapr_rtas_get_sensor_state_not_supported(uint32_t index, uint32_t type) {
+ (void)index;
+ (void)type;
+}
+#define TRACE_SPAPR_RTAS_IBM_CONFIGURE_CONNECTOR_INVALID 0
+#define TRACE_SPAPR_RTAS_IBM_CONFIGURE_CONNECTOR_INVALID_ENABLED 0
+#define TRACE_SPAPR_RTAS_IBM_CONFIGURE_CONNECTOR_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_spapr_rtas_ibm_configure_connector_invalid(uint32_t index) {
+ (void)index;
+}
+#define TRACE_SPAPR_TPM_EXECUTE 0
+#define TRACE_SPAPR_TPM_EXECUTE_ENABLED 0
+#define TRACE_SPAPR_TPM_EXECUTE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_tpm_execute(uint64_t data_in, uint64_t data_in_sz, uint64_t data_out, uint64_t data_out_sz) {
+ (void)data_in;
+ (void)data_in_sz;
+ (void)data_out;
+ (void)data_out_sz;
+}
+#define TRACE_SPAPR_UPDATE_DT 0
+#define TRACE_SPAPR_UPDATE_DT_ENABLED 0
+#define TRACE_SPAPR_UPDATE_DT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_update_dt(unsigned cb) {
+ (void)cb;
+}
+#define TRACE_SPAPR_UPDATE_DT_FAILED_CHECK 0
+#define TRACE_SPAPR_UPDATE_DT_FAILED_CHECK_ENABLED 0
+#define TRACE_SPAPR_UPDATE_DT_FAILED_CHECK_BACKEND_DSTATE() (0)
+static inline void trace_spapr_update_dt_failed_check(unsigned cbold, unsigned cbnew, unsigned magic) {
+ (void)cbold;
+ (void)cbnew;
+ (void)magic;
+}
+#define TRACE_SPAPR_UPDATE_DT_FAILED_SIZE 0
+#define TRACE_SPAPR_UPDATE_DT_FAILED_SIZE_ENABLED 0
+#define TRACE_SPAPR_UPDATE_DT_FAILED_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_update_dt_failed_size(unsigned cbold, unsigned cbnew, unsigned magic) {
+ (void)cbold;
+ (void)cbnew;
+ (void)magic;
+}
+#define TRACE_SPAPR_VIO_FREE_CRQ 0
+#define TRACE_SPAPR_VIO_FREE_CRQ_ENABLED 0
+#define TRACE_SPAPR_VIO_FREE_CRQ_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vio_free_crq(uint32_t reg) {
+ (void)reg;
+}
+#define TRACE_SPAPR_VIO_H_REG_CRQ 0
+#define TRACE_SPAPR_VIO_H_REG_CRQ_ENABLED 0
+#define TRACE_SPAPR_VIO_H_REG_CRQ_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vio_h_reg_crq(uint64_t reg, uint64_t queue_addr, uint64_t queue_len) {
+ (void)reg;
+ (void)queue_addr;
+ (void)queue_len;
+}
+#define TRACE_VOF_AVAIL 0
+#define TRACE_VOF_AVAIL_ENABLED 0
+#define TRACE_VOF_AVAIL_BACKEND_DSTATE() (0)
+static inline void trace_vof_avail(uint64_t start, uint64_t end, uint64_t size) {
+ (void)start;
+ (void)end;
+ (void)size;
+}
+#define TRACE_VOF_CLAIM 0
+#define TRACE_VOF_CLAIM_ENABLED 0
+#define TRACE_VOF_CLAIM_BACKEND_DSTATE() (0)
+static inline void trace_vof_claim(uint32_t virt, uint32_t size, uint32_t align, uint32_t ret) {
+ (void)virt;
+ (void)size;
+ (void)align;
+ (void)ret;
+}
+#define TRACE_VOF_CLAIMED 0
+#define TRACE_VOF_CLAIMED_ENABLED 0
+#define TRACE_VOF_CLAIMED_BACKEND_DSTATE() (0)
+static inline void trace_vof_claimed(uint64_t start, uint64_t end, uint64_t size) {
+ (void)start;
+ (void)end;
+ (void)size;
+}
+#define TRACE_VOF_ERROR_PARAM 0
+#define TRACE_VOF_ERROR_PARAM_ENABLED 0
+#define TRACE_VOF_ERROR_PARAM_BACKEND_DSTATE() (0)
+static inline void trace_vof_error_param(const char *method, int nargscheck, int nretcheck, int nargs, int nret) {
+ (void)method;
+ (void)nargscheck;
+ (void)nretcheck;
+ (void)nargs;
+ (void)nret;
+}
+#define TRACE_VOF_ERROR_STR_TRUNCATED 0
+#define TRACE_VOF_ERROR_STR_TRUNCATED_ENABLED 0
+#define TRACE_VOF_ERROR_STR_TRUNCATED_BACKEND_DSTATE() (0)
+static inline void trace_vof_error_str_truncated(const char *s, int len) {
+ (void)s;
+ (void)len;
+}
+#define TRACE_VOF_ERROR_UNKNOWN_IHANDLE_CLOSE 0
+#define TRACE_VOF_ERROR_UNKNOWN_IHANDLE_CLOSE_ENABLED 0
+#define TRACE_VOF_ERROR_UNKNOWN_IHANDLE_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_vof_error_unknown_ihandle_close(uint32_t ih) {
+ (void)ih;
+}
+#define TRACE_VOF_ERROR_UNKNOWN_METHOD 0
+#define TRACE_VOF_ERROR_UNKNOWN_METHOD_ENABLED 0
+#define TRACE_VOF_ERROR_UNKNOWN_METHOD_BACKEND_DSTATE() (0)
+static inline void trace_vof_error_unknown_method(const char *method) {
+ (void)method;
+}
+#define TRACE_VOF_ERROR_UNKNOWN_PATH 0
+#define TRACE_VOF_ERROR_UNKNOWN_PATH_ENABLED 0
+#define TRACE_VOF_ERROR_UNKNOWN_PATH_BACKEND_DSTATE() (0)
+static inline void trace_vof_error_unknown_path(const char *path) {
+ (void)path;
+}
+#define TRACE_VOF_ERROR_UNKNOWN_SERVICE 0
+#define TRACE_VOF_ERROR_UNKNOWN_SERVICE_ENABLED 0
+#define TRACE_VOF_ERROR_UNKNOWN_SERVICE_BACKEND_DSTATE() (0)
+static inline void trace_vof_error_unknown_service(const char *service, int nargs, int nret) {
+ (void)service;
+ (void)nargs;
+ (void)nret;
+}
+#define TRACE_VOF_ERROR_WRITE 0
+#define TRACE_VOF_ERROR_WRITE_ENABLED 0
+#define TRACE_VOF_ERROR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vof_error_write(uint32_t ih) {
+ (void)ih;
+}
+#define TRACE_VOF_FINDDEVICE 0
+#define TRACE_VOF_FINDDEVICE_ENABLED 0
+#define TRACE_VOF_FINDDEVICE_BACKEND_DSTATE() (0)
+static inline void trace_vof_finddevice(const char *path, uint32_t ph) {
+ (void)path;
+ (void)ph;
+}
+#define TRACE_VOF_GETPROP 0
+#define TRACE_VOF_GETPROP_ENABLED 0
+#define TRACE_VOF_GETPROP_BACKEND_DSTATE() (0)
+static inline void trace_vof_getprop(uint32_t ph, const char *prop, uint32_t ret, const char *val) {
+ (void)ph;
+ (void)prop;
+ (void)ret;
+ (void)val;
+}
+#define TRACE_VOF_GETPROPLEN 0
+#define TRACE_VOF_GETPROPLEN_ENABLED 0
+#define TRACE_VOF_GETPROPLEN_BACKEND_DSTATE() (0)
+static inline void trace_vof_getproplen(uint32_t ph, const char *prop, uint32_t ret) {
+ (void)ph;
+ (void)prop;
+ (void)ret;
+}
+#define TRACE_VOF_INSTANCE_TO_PACKAGE 0
+#define TRACE_VOF_INSTANCE_TO_PACKAGE_ENABLED 0
+#define TRACE_VOF_INSTANCE_TO_PACKAGE_BACKEND_DSTATE() (0)
+static inline void trace_vof_instance_to_package(uint32_t ih, uint32_t ph) {
+ (void)ih;
+ (void)ph;
+}
+#define TRACE_VOF_INSTANCE_TO_PATH 0
+#define TRACE_VOF_INSTANCE_TO_PATH_ENABLED 0
+#define TRACE_VOF_INSTANCE_TO_PATH_BACKEND_DSTATE() (0)
+static inline void trace_vof_instance_to_path(uint32_t ih, uint32_t ph, const char *tmp, int ret) {
+ (void)ih;
+ (void)ph;
+ (void)tmp;
+ (void)ret;
+}
+#define TRACE_VOF_INTERPRET 0
+#define TRACE_VOF_INTERPRET_ENABLED 0
+#define TRACE_VOF_INTERPRET_BACKEND_DSTATE() (0)
+static inline void trace_vof_interpret(const char *cmd, uint32_t param1, uint32_t param2, uint32_t ret, uint32_t ret2) {
+ (void)cmd;
+ (void)param1;
+ (void)param2;
+ (void)ret;
+ (void)ret2;
+}
+#define TRACE_VOF_METHOD 0
+#define TRACE_VOF_METHOD_ENABLED 0
+#define TRACE_VOF_METHOD_BACKEND_DSTATE() (0)
+static inline void trace_vof_method(uint32_t ihandle, const char *method, uint32_t param, uint32_t ret, uint32_t ret2) {
+ (void)ihandle;
+ (void)method;
+ (void)param;
+ (void)ret;
+ (void)ret2;
+}
+#define TRACE_VOF_OPEN 0
+#define TRACE_VOF_OPEN_ENABLED 0
+#define TRACE_VOF_OPEN_BACKEND_DSTATE() (0)
+static inline void trace_vof_open(const char *path, uint32_t ph, uint32_t ih) {
+ (void)path;
+ (void)ph;
+ (void)ih;
+}
+#define TRACE_VOF_PACKAGE_TO_PATH 0
+#define TRACE_VOF_PACKAGE_TO_PATH_ENABLED 0
+#define TRACE_VOF_PACKAGE_TO_PATH_BACKEND_DSTATE() (0)
+static inline void trace_vof_package_to_path(uint32_t ph, const char *tmp, int ret) {
+ (void)ph;
+ (void)tmp;
+ (void)ret;
+}
+#define TRACE_VOF_RELEASE 0
+#define TRACE_VOF_RELEASE_ENABLED 0
+#define TRACE_VOF_RELEASE_BACKEND_DSTATE() (0)
+static inline void trace_vof_release(uint32_t virt, uint32_t size, uint32_t ret) {
+ (void)virt;
+ (void)size;
+ (void)ret;
+}
+#define TRACE_VOF_SETPROP 0
+#define TRACE_VOF_SETPROP_ENABLED 0
+#define TRACE_VOF_SETPROP_BACKEND_DSTATE() (0)
+static inline void trace_vof_setprop(uint32_t ph, const char *prop, const char *val, uint32_t vallen, uint32_t ret) {
+ (void)ph;
+ (void)prop;
+ (void)val;
+ (void)vallen;
+ (void)ret;
+}
+#define TRACE_VOF_WRITE 0
+#define TRACE_VOF_WRITE_ENABLED 0
+#define TRACE_VOF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vof_write(uint32_t ih, unsigned cb, const char *msg) {
+ (void)ih;
+ (void)cb;
+ (void)msg;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_remote.h b/trace/trace-hw_remote.h
new file mode 100644
index 0000000000..362e523318
--- /dev/null
+++ b/trace/trace-hw_remote.h
@@ -0,0 +1,91 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_REMOTE_H
+#define TRACE_TRACE_HW_REMOTE_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MPQEMU_RECV_IO_ERROR 0
+#define TRACE_MPQEMU_RECV_IO_ERROR_ENABLED 0
+#define TRACE_MPQEMU_RECV_IO_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_mpqemu_recv_io_error(int cmd, int size, int nfds) {
+ (void)cmd;
+ (void)size;
+ (void)nfds;
+}
+#define TRACE_MPQEMU_SEND_IO_ERROR 0
+#define TRACE_MPQEMU_SEND_IO_ERROR_ENABLED 0
+#define TRACE_MPQEMU_SEND_IO_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_mpqemu_send_io_error(int cmd, int size, int nfds) {
+ (void)cmd;
+ (void)size;
+ (void)nfds;
+}
+#define TRACE_VFU_BAR_REGISTER 0
+#define TRACE_VFU_BAR_REGISTER_ENABLED 0
+#define TRACE_VFU_BAR_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_vfu_bar_register(int i, uint64_t addr, uint64_t size) {
+ (void)i;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_VFU_BAR_RW_ENTER 0
+#define TRACE_VFU_BAR_RW_ENTER_ENABLED 0
+#define TRACE_VFU_BAR_RW_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_vfu_bar_rw_enter(const char *op, uint64_t addr) {
+ (void)op;
+ (void)addr;
+}
+#define TRACE_VFU_BAR_RW_EXIT 0
+#define TRACE_VFU_BAR_RW_EXIT_ENABLED 0
+#define TRACE_VFU_BAR_RW_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_vfu_bar_rw_exit(const char *op, uint64_t addr) {
+ (void)op;
+ (void)addr;
+}
+#define TRACE_VFU_CFG_READ 0
+#define TRACE_VFU_CFG_READ_ENABLED 0
+#define TRACE_VFU_CFG_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfu_cfg_read(uint32_t offset, uint32_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_VFU_CFG_WRITE 0
+#define TRACE_VFU_CFG_WRITE_ENABLED 0
+#define TRACE_VFU_CFG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfu_cfg_write(uint32_t offset, uint32_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_VFU_DMA_REGISTER 0
+#define TRACE_VFU_DMA_REGISTER_ENABLED 0
+#define TRACE_VFU_DMA_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_vfu_dma_register(uint64_t gpa, size_t len) {
+ (void)gpa;
+ (void)len;
+}
+#define TRACE_VFU_DMA_UNREGISTER 0
+#define TRACE_VFU_DMA_UNREGISTER_ENABLED 0
+#define TRACE_VFU_DMA_UNREGISTER_BACKEND_DSTATE() (0)
+static inline void trace_vfu_dma_unregister(uint64_t gpa) {
+ (void)gpa;
+}
+#define TRACE_VFU_INTERRUPT 0
+#define TRACE_VFU_INTERRUPT_ENABLED 0
+#define TRACE_VFU_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_vfu_interrupt(int pirq) {
+ (void)pirq;
+}
+#define TRACE_VFU_PROP 0
+#define TRACE_VFU_PROP_ENABLED 0
+#define TRACE_VFU_PROP_BACKEND_DSTATE() (0)
+static inline void trace_vfu_prop(const char *prop, const char *val) {
+ (void)prop;
+ (void)val;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_riscv.h b/trace/trace-hw_riscv.h
new file mode 100644
index 0000000000..932c67f408
--- /dev/null
+++ b/trace/trace-hw_riscv.h
@@ -0,0 +1,194 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_RISCV_H
+#define TRACE_TRACE_HW_RISCV_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_RISCV_IOMMU_ATS 0
+#define TRACE_RISCV_IOMMU_ATS_ENABLED 0
+#define TRACE_RISCV_IOMMU_ATS_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_ats(const char *id, unsigned b, unsigned d, unsigned f, uint64_t iova) {
+ (void)id;
+ (void)b;
+ (void)d;
+ (void)f;
+ (void)iova;
+}
+#define TRACE_RISCV_IOMMU_ATS_INVAL 0
+#define TRACE_RISCV_IOMMU_ATS_INVAL_ENABLED 0
+#define TRACE_RISCV_IOMMU_ATS_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_ats_inval(const char *id) {
+ (void)id;
+}
+#define TRACE_RISCV_IOMMU_ATS_PRGR 0
+#define TRACE_RISCV_IOMMU_ATS_PRGR_ENABLED 0
+#define TRACE_RISCV_IOMMU_ATS_PRGR_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_ats_prgr(const char *id) {
+ (void)id;
+}
+#define TRACE_RISCV_IOMMU_CMD 0
+#define TRACE_RISCV_IOMMU_CMD_ENABLED 0
+#define TRACE_RISCV_IOMMU_CMD_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_cmd(const char *id, uint64_t l, uint64_t u) {
+ (void)id;
+ (void)l;
+ (void)u;
+}
+#define TRACE_RISCV_IOMMU_DMA 0
+#define TRACE_RISCV_IOMMU_DMA_ENABLED 0
+#define TRACE_RISCV_IOMMU_DMA_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_dma(const char *id, unsigned b, unsigned d, unsigned f, unsigned pasid, const char *dir, uint64_t iova, uint64_t phys) {
+ (void)id;
+ (void)b;
+ (void)d;
+ (void)f;
+ (void)pasid;
+ (void)dir;
+ (void)iova;
+ (void)phys;
+}
+#define TRACE_RISCV_IOMMU_FLT 0
+#define TRACE_RISCV_IOMMU_FLT_ENABLED 0
+#define TRACE_RISCV_IOMMU_FLT_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_flt(const char *id, unsigned b, unsigned d, unsigned f, uint64_t reason, uint64_t iova) {
+ (void)id;
+ (void)b;
+ (void)d;
+ (void)f;
+ (void)reason;
+ (void)iova;
+}
+#define TRACE_RISCV_IOMMU_HPM_CYCLE_WRITE 0
+#define TRACE_RISCV_IOMMU_HPM_CYCLE_WRITE_ENABLED 0
+#define TRACE_RISCV_IOMMU_HPM_CYCLE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_hpm_cycle_write(uint32_t ovf, uint64_t val) {
+ (void)ovf;
+ (void)val;
+}
+#define TRACE_RISCV_IOMMU_HPM_EVT_WRITE 0
+#define TRACE_RISCV_IOMMU_HPM_EVT_WRITE_ENABLED 0
+#define TRACE_RISCV_IOMMU_HPM_EVT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_hpm_evt_write(uint32_t ctr_idx, uint32_t ovf, uint64_t val) {
+ (void)ctr_idx;
+ (void)ovf;
+ (void)val;
+}
+#define TRACE_RISCV_IOMMU_HPM_INCR_CTR 0
+#define TRACE_RISCV_IOMMU_HPM_INCR_CTR_ENABLED 0
+#define TRACE_RISCV_IOMMU_HPM_INCR_CTR_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_hpm_incr_ctr(uint64_t cntr_val) {
+ (void)cntr_val;
+}
+#define TRACE_RISCV_IOMMU_HPM_IOCNTINH_CY 0
+#define TRACE_RISCV_IOMMU_HPM_IOCNTINH_CY_ENABLED 0
+#define TRACE_RISCV_IOMMU_HPM_IOCNTINH_CY_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_hpm_iocntinh_cy(bool prev_cy_inh) {
+ (void)prev_cy_inh;
+}
+#define TRACE_RISCV_IOMMU_HPM_READ 0
+#define TRACE_RISCV_IOMMU_HPM_READ_ENABLED 0
+#define TRACE_RISCV_IOMMU_HPM_READ_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_hpm_read(uint64_t cycle, uint32_t inhibit, uint64_t ctr_prev, uint64_t ctr_val) {
+ (void)cycle;
+ (void)inhibit;
+ (void)ctr_prev;
+ (void)ctr_val;
+}
+#define TRACE_RISCV_IOMMU_ICVEC_WRITE 0
+#define TRACE_RISCV_IOMMU_ICVEC_WRITE_ENABLED 0
+#define TRACE_RISCV_IOMMU_ICVEC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_icvec_write(uint32_t orig, uint32_t actual) {
+ (void)orig;
+ (void)actual;
+}
+#define TRACE_RISCV_IOMMU_MRIF_NOTIFICATION 0
+#define TRACE_RISCV_IOMMU_MRIF_NOTIFICATION_ENABLED 0
+#define TRACE_RISCV_IOMMU_MRIF_NOTIFICATION_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_mrif_notification(const char *id, uint32_t nid, uint64_t phys) {
+ (void)id;
+ (void)nid;
+ (void)phys;
+}
+#define TRACE_RISCV_IOMMU_MSI 0
+#define TRACE_RISCV_IOMMU_MSI_ENABLED 0
+#define TRACE_RISCV_IOMMU_MSI_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_msi(const char *id, unsigned b, unsigned d, unsigned f, uint64_t iova, uint64_t phys) {
+ (void)id;
+ (void)b;
+ (void)d;
+ (void)f;
+ (void)iova;
+ (void)phys;
+}
+#define TRACE_RISCV_IOMMU_NEW 0
+#define TRACE_RISCV_IOMMU_NEW_ENABLED 0
+#define TRACE_RISCV_IOMMU_NEW_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_new(const char *id, unsigned b, unsigned d, unsigned f) {
+ (void)id;
+ (void)b;
+ (void)d;
+ (void)f;
+}
+#define TRACE_RISCV_IOMMU_NOTIFIER_ADD 0
+#define TRACE_RISCV_IOMMU_NOTIFIER_ADD_ENABLED 0
+#define TRACE_RISCV_IOMMU_NOTIFIER_ADD_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_notifier_add(const char *id) {
+ (void)id;
+}
+#define TRACE_RISCV_IOMMU_NOTIFIER_DEL 0
+#define TRACE_RISCV_IOMMU_NOTIFIER_DEL_ENABLED 0
+#define TRACE_RISCV_IOMMU_NOTIFIER_DEL_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_notifier_del(const char *id) {
+ (void)id;
+}
+#define TRACE_RISCV_IOMMU_NOTIFY_INT_VECTOR 0
+#define TRACE_RISCV_IOMMU_NOTIFY_INT_VECTOR_ENABLED 0
+#define TRACE_RISCV_IOMMU_NOTIFY_INT_VECTOR_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_notify_int_vector(uint32_t cause, uint32_t vector) {
+ (void)cause;
+ (void)vector;
+}
+#define TRACE_RISCV_IOMMU_PCI_RESET_HOLD 0
+#define TRACE_RISCV_IOMMU_PCI_RESET_HOLD_ENABLED 0
+#define TRACE_RISCV_IOMMU_PCI_RESET_HOLD_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_pci_reset_hold(int reset_type) {
+ (void)reset_type;
+}
+#define TRACE_RISCV_IOMMU_PRI 0
+#define TRACE_RISCV_IOMMU_PRI_ENABLED 0
+#define TRACE_RISCV_IOMMU_PRI_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_pri(const char *id, unsigned b, unsigned d, unsigned f, uint64_t iova) {
+ (void)id;
+ (void)b;
+ (void)d;
+ (void)f;
+ (void)iova;
+}
+#define TRACE_RISCV_IOMMU_SYS_IRQ_SENT 0
+#define TRACE_RISCV_IOMMU_SYS_IRQ_SENT_ENABLED 0
+#define TRACE_RISCV_IOMMU_SYS_IRQ_SENT_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_sys_irq_sent(uint32_t vector) {
+ (void)vector;
+}
+#define TRACE_RISCV_IOMMU_SYS_MSI_SENT 0
+#define TRACE_RISCV_IOMMU_SYS_MSI_SENT_ENABLED 0
+#define TRACE_RISCV_IOMMU_SYS_MSI_SENT_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_sys_msi_sent(uint32_t vector, uint64_t msi_addr, uint32_t msi_data, uint32_t result) {
+ (void)vector;
+ (void)msi_addr;
+ (void)msi_data;
+ (void)result;
+}
+#define TRACE_RISCV_IOMMU_SYS_RESET_HOLD 0
+#define TRACE_RISCV_IOMMU_SYS_RESET_HOLD_ENABLED 0
+#define TRACE_RISCV_IOMMU_SYS_RESET_HOLD_BACKEND_DSTATE() (0)
+static inline void trace_riscv_iommu_sys_reset_hold(int reset_type) {
+ (void)reset_type;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_rtc.h b/trace/trace-hw_rtc.h
new file mode 100644
index 0000000000..31c5ef1033
--- /dev/null
+++ b/trace/trace-hw_rtc.h
@@ -0,0 +1,181 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_RTC_H
+#define TRACE_TRACE_HW_RTC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALLWINNER_RTC_READ 0
+#define TRACE_ALLWINNER_RTC_READ_ENABLED 0
+#define TRACE_ALLWINNER_RTC_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_rtc_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ALLWINNER_RTC_WRITE 0
+#define TRACE_ALLWINNER_RTC_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_RTC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_rtc_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_RTC_READ 0
+#define TRACE_ASPEED_RTC_READ_ENABLED 0
+#define TRACE_ASPEED_RTC_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_rtc_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_ASPEED_RTC_WRITE 0
+#define TRACE_ASPEED_RTC_WRITE_ENABLED 0
+#define TRACE_ASPEED_RTC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_rtc_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_DS1338_RECV 0
+#define TRACE_DS1338_RECV_ENABLED 0
+#define TRACE_DS1338_RECV_BACKEND_DSTATE() (0)
+static inline void trace_ds1338_recv(uint32_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_DS1338_SEND 0
+#define TRACE_DS1338_SEND_ENABLED 0
+#define TRACE_DS1338_SEND_BACKEND_DSTATE() (0)
+static inline void trace_ds1338_send(uint32_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_GOLDFISH_RTC_READ 0
+#define TRACE_GOLDFISH_RTC_READ_ENABLED 0
+#define TRACE_GOLDFISH_RTC_READ_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_rtc_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_GOLDFISH_RTC_WRITE 0
+#define TRACE_GOLDFISH_RTC_WRITE_ENABLED 0
+#define TRACE_GOLDFISH_RTC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_goldfish_rtc_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_M48TXX_NVRAM_IO_READ 0
+#define TRACE_M48TXX_NVRAM_IO_READ_ENABLED 0
+#define TRACE_M48TXX_NVRAM_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_m48txx_nvram_io_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_M48TXX_NVRAM_IO_WRITE 0
+#define TRACE_M48TXX_NVRAM_IO_WRITE_ENABLED 0
+#define TRACE_M48TXX_NVRAM_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_m48txx_nvram_io_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_M48TXX_NVRAM_MEM_READ 0
+#define TRACE_M48TXX_NVRAM_MEM_READ_ENABLED 0
+#define TRACE_M48TXX_NVRAM_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_m48txx_nvram_mem_read(uint32_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_M48TXX_NVRAM_MEM_WRITE 0
+#define TRACE_M48TXX_NVRAM_MEM_WRITE_ENABLED 0
+#define TRACE_M48TXX_NVRAM_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_m48txx_nvram_mem_write(uint32_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_MC146818_RTC_IOPORT_READ 0
+#define TRACE_MC146818_RTC_IOPORT_READ_ENABLED 0
+#define TRACE_MC146818_RTC_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_mc146818_rtc_ioport_read(uint8_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_MC146818_RTC_IOPORT_WRITE 0
+#define TRACE_MC146818_RTC_IOPORT_WRITE_ENABLED 0
+#define TRACE_MC146818_RTC_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mc146818_rtc_ioport_write(uint8_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_PL031_ALARM_RAISED 0
+#define TRACE_PL031_ALARM_RAISED_ENABLED 0
+#define TRACE_PL031_ALARM_RAISED_BACKEND_DSTATE() (0)
+static inline void trace_pl031_alarm_raised(void) {
+}
+#define TRACE_PL031_IRQ_STATE 0
+#define TRACE_PL031_IRQ_STATE_ENABLED 0
+#define TRACE_PL031_IRQ_STATE_BACKEND_DSTATE() (0)
+static inline void trace_pl031_irq_state(int level) {
+ (void)level;
+}
+#define TRACE_PL031_READ 0
+#define TRACE_PL031_READ_ENABLED 0
+#define TRACE_PL031_READ_BACKEND_DSTATE() (0)
+static inline void trace_pl031_read(uint32_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_PL031_SET_ALARM 0
+#define TRACE_PL031_SET_ALARM_ENABLED 0
+#define TRACE_PL031_SET_ALARM_BACKEND_DSTATE() (0)
+static inline void trace_pl031_set_alarm(uint32_t ticks) {
+ (void)ticks;
+}
+#define TRACE_PL031_WRITE 0
+#define TRACE_PL031_WRITE_ENABLED 0
+#define TRACE_PL031_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pl031_write(uint32_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_RS5C372_RECV 0
+#define TRACE_RS5C372_RECV_ENABLED 0
+#define TRACE_RS5C372_RECV_BACKEND_DSTATE() (0)
+static inline void trace_rs5c372_recv(uint32_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_RS5C372_SEND 0
+#define TRACE_RS5C372_SEND_ENABLED 0
+#define TRACE_RS5C372_SEND_BACKEND_DSTATE() (0)
+static inline void trace_rs5c372_send(uint32_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUN4V_RTC_READ 0
+#define TRACE_SUN4V_RTC_READ_ENABLED 0
+#define TRACE_SUN4V_RTC_READ_BACKEND_DSTATE() (0)
+static inline void trace_sun4v_rtc_read(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SUN4V_RTC_WRITE 0
+#define TRACE_SUN4V_RTC_WRITE_ENABLED 0
+#define TRACE_SUN4V_RTC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sun4v_rtc_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_XLNX_ZYNQMP_RTC_GETTIME 0
+#define TRACE_XLNX_ZYNQMP_RTC_GETTIME_ENABLED 0
+#define TRACE_XLNX_ZYNQMP_RTC_GETTIME_BACKEND_DSTATE() (0)
+static inline void trace_xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int sec) {
+ (void)year;
+ (void)month;
+ (void)day;
+ (void)hour;
+ (void)min;
+ (void)sec;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_s390x.h b/trace/trace-hw_s390x.h
new file mode 100644
index 0000000000..3bb80cc287
--- /dev/null
+++ b/trace/trace-hw_s390x.h
@@ -0,0 +1,223 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_S390X_H
+#define TRACE_TRACE_HW_S390X_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CSS_ADAPTER_INTERRUPT 0
+#define TRACE_CSS_ADAPTER_INTERRUPT_ENABLED 0
+#define TRACE_CSS_ADAPTER_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_css_adapter_interrupt(uint8_t isc) {
+ (void)isc;
+}
+#define TRACE_CSS_ASSIGN_SUBCH 0
+#define TRACE_CSS_ASSIGN_SUBCH_ENABLED 0
+#define TRACE_CSS_ASSIGN_SUBCH_BACKEND_DSTATE() (0)
+static inline void trace_css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) {
+ (void)do_assign;
+ (void)cssid;
+ (void)ssid;
+ (void)schid;
+ (void)devno;
+}
+#define TRACE_CSS_CHPID_ADD 0
+#define TRACE_CSS_CHPID_ADD_ENABLED 0
+#define TRACE_CSS_CHPID_ADD_BACKEND_DSTATE() (0)
+static inline void trace_css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) {
+ (void)cssid;
+ (void)chpid;
+ (void)type;
+}
+#define TRACE_CSS_CRW 0
+#define TRACE_CSS_CRW_ENABLED 0
+#define TRACE_CSS_CRW_BACKEND_DSTATE() (0)
+static inline void trace_css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) {
+ (void)rsc;
+ (void)erc;
+ (void)rsid;
+ (void)chained;
+}
+#define TRACE_CSS_DO_SIC 0
+#define TRACE_CSS_DO_SIC_ENABLED 0
+#define TRACE_CSS_DO_SIC_BACKEND_DSTATE() (0)
+static inline void trace_css_do_sic(uint16_t mode, uint8_t isc) {
+ (void)mode;
+ (void)isc;
+}
+#define TRACE_CSS_ENABLE_FACILITY 0
+#define TRACE_CSS_ENABLE_FACILITY_ENABLED 0
+#define TRACE_CSS_ENABLE_FACILITY_BACKEND_DSTATE() (0)
+static inline void trace_css_enable_facility(const char *facility) {
+ (void)facility;
+}
+#define TRACE_CSS_IO_INTERRUPT 0
+#define TRACE_CSS_IO_INTERRUPT_ENABLED 0
+#define TRACE_CSS_IO_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) {
+ (void)cssid;
+ (void)ssid;
+ (void)schid;
+ (void)intparm;
+ (void)isc;
+ (void)conditional;
+}
+#define TRACE_CSS_NEW_IMAGE 0
+#define TRACE_CSS_NEW_IMAGE_ENABLED 0
+#define TRACE_CSS_NEW_IMAGE_BACKEND_DSTATE() (0)
+static inline void trace_css_new_image(uint8_t cssid, const char *default_cssid) {
+ (void)cssid;
+ (void)default_cssid;
+}
+#define TRACE_S390_PCI_BAR 0
+#define TRACE_S390_PCI_BAR_ENABLED 0
+#define TRACE_S390_PCI_BAR_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_bar(uint32_t bar, uint32_t addr, uint64_t size, uint32_t barsize) {
+ (void)bar;
+ (void)addr;
+ (void)size;
+ (void)barsize;
+}
+#define TRACE_S390_PCI_CLP_CAP 0
+#define TRACE_S390_PCI_CLP_CAP_ENABLED 0
+#define TRACE_S390_PCI_CLP_CAP_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_clp_cap(const char *id, uint32_t cap) {
+ (void)id;
+ (void)cap;
+}
+#define TRACE_S390_PCI_CLP_CAP_SIZE 0
+#define TRACE_S390_PCI_CLP_CAP_SIZE_ENABLED 0
+#define TRACE_S390_PCI_CLP_CAP_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_clp_cap_size(const char *id, uint32_t size, uint32_t cap) {
+ (void)id;
+ (void)size;
+ (void)cap;
+}
+#define TRACE_S390_PCI_CLP_DEV_INFO 0
+#define TRACE_S390_PCI_CLP_DEV_INFO_ENABLED 0
+#define TRACE_S390_PCI_CLP_DEV_INFO_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_clp_dev_info(const char *id) {
+ (void)id;
+}
+#define TRACE_S390_PCI_INVALID 0
+#define TRACE_S390_PCI_INVALID_ENABLED 0
+#define TRACE_S390_PCI_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_invalid(const char *cmd, uint32_t fh) {
+ (void)cmd;
+ (void)fh;
+}
+#define TRACE_S390_PCI_IOMMU_XLATE 0
+#define TRACE_S390_PCI_IOMMU_XLATE_ENABLED 0
+#define TRACE_S390_PCI_IOMMU_XLATE_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_iommu_xlate(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_S390_PCI_IRQS 0
+#define TRACE_S390_PCI_IRQS_ENABLED 0
+#define TRACE_S390_PCI_IRQS_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_irqs(const char *str, uint32_t id) {
+ (void)str;
+ (void)id;
+}
+#define TRACE_S390_PCI_KVM_AIF 0
+#define TRACE_S390_PCI_KVM_AIF_ENABLED 0
+#define TRACE_S390_PCI_KVM_AIF_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_kvm_aif(const char *str) {
+ (void)str;
+}
+#define TRACE_S390_PCI_LIST 0
+#define TRACE_S390_PCI_LIST_ENABLED 0
+#define TRACE_S390_PCI_LIST_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_list(uint32_t rc) {
+ (void)rc;
+}
+#define TRACE_S390_PCI_LIST_ENTRY 0
+#define TRACE_S390_PCI_LIST_ENTRY_ENABLED 0
+#define TRACE_S390_PCI_LIST_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_list_entry(uint32_t g_l2, uint32_t vid, uint32_t did, uint32_t fid, uint32_t fh) {
+ (void)g_l2;
+ (void)vid;
+ (void)did;
+ (void)fid;
+ (void)fh;
+}
+#define TRACE_S390_PCI_MSI_CTRL_WRITE 0
+#define TRACE_S390_PCI_MSI_CTRL_WRITE_ENABLED 0
+#define TRACE_S390_PCI_MSI_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_msi_ctrl_write(uint64_t data, uint32_t idx, uint32_t vec) {
+ (void)data;
+ (void)idx;
+ (void)vec;
+}
+#define TRACE_S390_PCI_NODEV 0
+#define TRACE_S390_PCI_NODEV_ENABLED 0
+#define TRACE_S390_PCI_NODEV_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_nodev(const char *cmd, uint32_t fh) {
+ (void)cmd;
+ (void)fh;
+}
+#define TRACE_S390_PCI_SCLP_NODEV 0
+#define TRACE_S390_PCI_SCLP_NODEV_ENABLED 0
+#define TRACE_S390_PCI_SCLP_NODEV_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_sclp_nodev(const char *str, uint32_t aid) {
+ (void)str;
+ (void)aid;
+}
+#define TRACE_S390_PCI_UNKNOWN 0
+#define TRACE_S390_PCI_UNKNOWN_ENABLED 0
+#define TRACE_S390_PCI_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_s390_pci_unknown(const char *msg, uint32_t cmd) {
+ (void)msg;
+ (void)cmd;
+}
+#define TRACE_S390_PCIHOST 0
+#define TRACE_S390_PCIHOST_ENABLED 0
+#define TRACE_S390_PCIHOST_BACKEND_DSTATE() (0)
+static inline void trace_s390_pcihost(const char *msg) {
+ (void)msg;
+}
+#define TRACE_S390_SKEYS_GET_NONZERO 0
+#define TRACE_S390_SKEYS_GET_NONZERO_ENABLED 0
+#define TRACE_S390_SKEYS_GET_NONZERO_BACKEND_DSTATE() (0)
+static inline void trace_s390_skeys_get_nonzero(int rc) {
+ (void)rc;
+}
+#define TRACE_S390_SKEYS_SET_NONZERO 0
+#define TRACE_S390_SKEYS_SET_NONZERO_ENABLED 0
+#define TRACE_S390_SKEYS_SET_NONZERO_BACKEND_DSTATE() (0)
+static inline void trace_s390_skeys_set_nonzero(int rc) {
+ (void)rc;
+}
+#define TRACE_VIRTIO_CCW_INTERPRET_CCW 0
+#define TRACE_VIRTIO_CCW_INTERPRET_CCW_ENABLED 0
+#define TRACE_VIRTIO_CCW_INTERPRET_CCW_BACKEND_DSTATE() (0)
+static inline void trace_virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) {
+ (void)cssid;
+ (void)ssid;
+ (void)schid;
+ (void)cmd_code;
+}
+#define TRACE_VIRTIO_CCW_NEW_DEVICE 0
+#define TRACE_VIRTIO_CCW_NEW_DEVICE_ENABLED 0
+#define TRACE_VIRTIO_CCW_NEW_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) {
+ (void)cssid;
+ (void)ssid;
+ (void)schid;
+ (void)devno;
+ (void)devno_mode;
+}
+#define TRACE_VIRTIO_CCW_SET_IND 0
+#define TRACE_VIRTIO_CCW_SET_IND_ENABLED 0
+#define TRACE_VIRTIO_CCW_SET_IND_BACKEND_DSTATE() (0)
+static inline void trace_virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) {
+ (void)ind_loc;
+ (void)ind_old;
+ (void)ind_new;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_scsi.h b/trace/trace-hw_scsi.h
new file mode 100644
index 0000000000..90e91df6f5
--- /dev/null
+++ b/trace/trace-hw_scsi.h
@@ -0,0 +1,2519 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_SCSI_H
+#define TRACE_TRACE_HW_SCSI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ESP_COMMAND_COMPLETE 0
+#define TRACE_ESP_COMMAND_COMPLETE_ENABLED 0
+#define TRACE_ESP_COMMAND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_esp_command_complete(void) {
+}
+#define TRACE_ESP_COMMAND_COMPLETE_DEFERRED 0
+#define TRACE_ESP_COMMAND_COMPLETE_DEFERRED_ENABLED 0
+#define TRACE_ESP_COMMAND_COMPLETE_DEFERRED_BACKEND_DSTATE() (0)
+static inline void trace_esp_command_complete_deferred(void) {
+}
+#define TRACE_ESP_COMMAND_COMPLETE_FAIL 0
+#define TRACE_ESP_COMMAND_COMPLETE_FAIL_ENABLED 0
+#define TRACE_ESP_COMMAND_COMPLETE_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_esp_command_complete_fail(void) {
+}
+#define TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED 0
+#define TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED_ENABLED 0
+#define TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED_BACKEND_DSTATE() (0)
+static inline void trace_esp_command_complete_unexpected(void) {
+}
+#define TRACE_ESP_DMA_DISABLE 0
+#define TRACE_ESP_DMA_DISABLE_ENABLED 0
+#define TRACE_ESP_DMA_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_esp_dma_disable(void) {
+}
+#define TRACE_ESP_DMA_ENABLE 0
+#define TRACE_ESP_DMA_ENABLE_ENABLED 0
+#define TRACE_ESP_DMA_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_esp_dma_enable(void) {
+}
+#define TRACE_ESP_DO_COMMAND_PHASE 0
+#define TRACE_ESP_DO_COMMAND_PHASE_ENABLED 0
+#define TRACE_ESP_DO_COMMAND_PHASE_BACKEND_DSTATE() (0)
+static inline void trace_esp_do_command_phase(uint8_t busid) {
+ (void)busid;
+}
+#define TRACE_ESP_DO_DMA 0
+#define TRACE_ESP_DO_DMA_ENABLED 0
+#define TRACE_ESP_DO_DMA_BACKEND_DSTATE() (0)
+static inline void trace_esp_do_dma(uint32_t cmdlen, uint32_t len) {
+ (void)cmdlen;
+ (void)len;
+}
+#define TRACE_ESP_DO_IDENTIFY 0
+#define TRACE_ESP_DO_IDENTIFY_ENABLED 0
+#define TRACE_ESP_DO_IDENTIFY_BACKEND_DSTATE() (0)
+static inline void trace_esp_do_identify(uint8_t byte) {
+ (void)byte;
+}
+#define TRACE_ESP_ERROR_FIFO_OVERRUN 0
+#define TRACE_ESP_ERROR_FIFO_OVERRUN_ENABLED 0
+#define TRACE_ESP_ERROR_FIFO_OVERRUN_BACKEND_DSTATE() (0)
+static inline void trace_esp_error_fifo_overrun(void) {
+}
+#define TRACE_ESP_ERROR_INVALID_WRITE 0
+#define TRACE_ESP_ERROR_INVALID_WRITE_ENABLED 0
+#define TRACE_ESP_ERROR_INVALID_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_esp_error_invalid_write(uint32_t val, uint32_t addr) {
+ (void)val;
+ (void)addr;
+}
+#define TRACE_ESP_ERROR_UNHANDLED_COMMAND 0
+#define TRACE_ESP_ERROR_UNHANDLED_COMMAND_ENABLED 0
+#define TRACE_ESP_ERROR_UNHANDLED_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_esp_error_unhandled_command(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_GET_CMD 0
+#define TRACE_ESP_GET_CMD_ENABLED 0
+#define TRACE_ESP_GET_CMD_BACKEND_DSTATE() (0)
+static inline void trace_esp_get_cmd(uint32_t dmalen, int target) {
+ (void)dmalen;
+ (void)target;
+}
+#define TRACE_ESP_HANDLE_SATN_STOP 0
+#define TRACE_ESP_HANDLE_SATN_STOP_ENABLED 0
+#define TRACE_ESP_HANDLE_SATN_STOP_BACKEND_DSTATE() (0)
+static inline void trace_esp_handle_satn_stop(uint32_t cmdlen) {
+ (void)cmdlen;
+}
+#define TRACE_ESP_HANDLE_TI 0
+#define TRACE_ESP_HANDLE_TI_ENABLED 0
+#define TRACE_ESP_HANDLE_TI_BACKEND_DSTATE() (0)
+static inline void trace_esp_handle_ti(uint32_t minlen) {
+ (void)minlen;
+}
+#define TRACE_ESP_HANDLE_TI_CMD 0
+#define TRACE_ESP_HANDLE_TI_CMD_ENABLED 0
+#define TRACE_ESP_HANDLE_TI_CMD_BACKEND_DSTATE() (0)
+static inline void trace_esp_handle_ti_cmd(uint32_t cmdlen) {
+ (void)cmdlen;
+}
+#define TRACE_ESP_INVALID_CMD 0
+#define TRACE_ESP_INVALID_CMD_ENABLED 0
+#define TRACE_ESP_INVALID_CMD_BACKEND_DSTATE() (0)
+static inline void trace_esp_invalid_cmd(uint8_t cmd, uint8_t asc_mode) {
+ (void)cmd;
+ (void)asc_mode;
+}
+#define TRACE_ESP_LOWER_DRQ 0
+#define TRACE_ESP_LOWER_DRQ_ENABLED 0
+#define TRACE_ESP_LOWER_DRQ_BACKEND_DSTATE() (0)
+static inline void trace_esp_lower_drq(void) {
+}
+#define TRACE_ESP_LOWER_IRQ 0
+#define TRACE_ESP_LOWER_IRQ_ENABLED 0
+#define TRACE_ESP_LOWER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_esp_lower_irq(void) {
+}
+#define TRACE_ESP_MEM_READB 0
+#define TRACE_ESP_MEM_READB_ENABLED 0
+#define TRACE_ESP_MEM_READB_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_readb(uint32_t saddr, uint8_t reg) {
+ (void)saddr;
+ (void)reg;
+}
+#define TRACE_ESP_MEM_WRITEB 0
+#define TRACE_ESP_MEM_WRITEB_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) {
+ (void)saddr;
+ (void)reg;
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET 0
+#define TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_bus_reset(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_DISSEL 0
+#define TRACE_ESP_MEM_WRITEB_CMD_DISSEL_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_DISSEL_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_dissel(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_ENSEL 0
+#define TRACE_ESP_MEM_WRITEB_CMD_ENSEL_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_ENSEL_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_ensel(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_FLUSH 0
+#define TRACE_ESP_MEM_WRITEB_CMD_FLUSH_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_flush(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_ICCS 0
+#define TRACE_ESP_MEM_WRITEB_CMD_ICCS_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_ICCS_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_iccs(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_MSGACC 0
+#define TRACE_ESP_MEM_WRITEB_CMD_MSGACC_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_MSGACC_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_msgacc(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_NOP 0
+#define TRACE_ESP_MEM_WRITEB_CMD_NOP_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_NOP_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_nop(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_PAD 0
+#define TRACE_ESP_MEM_WRITEB_CMD_PAD_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_PAD_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_pad(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_RESET 0
+#define TRACE_ESP_MEM_WRITEB_CMD_RESET_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_reset(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_RSTATN 0
+#define TRACE_ESP_MEM_WRITEB_CMD_RSTATN_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_RSTATN_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_rstatn(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_SATN 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SATN_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SATN_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_satn(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_SEL 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SEL_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SEL_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_sel(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_SELATN 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SELATN_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SELATN_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_selatn(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_SELATNS 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SELATNS_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_SELATNS_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_selatns(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_MEM_WRITEB_CMD_TI 0
+#define TRACE_ESP_MEM_WRITEB_CMD_TI_ENABLED 0
+#define TRACE_ESP_MEM_WRITEB_CMD_TI_BACKEND_DSTATE() (0)
+static inline void trace_esp_mem_writeb_cmd_ti(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_PCI_DMA_ABORT 0
+#define TRACE_ESP_PCI_DMA_ABORT_ENABLED 0
+#define TRACE_ESP_PCI_DMA_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_dma_abort(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_PCI_DMA_BLAST 0
+#define TRACE_ESP_PCI_DMA_BLAST_ENABLED 0
+#define TRACE_ESP_PCI_DMA_BLAST_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_dma_blast(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_PCI_DMA_IDLE 0
+#define TRACE_ESP_PCI_DMA_IDLE_ENABLED 0
+#define TRACE_ESP_PCI_DMA_IDLE_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_dma_idle(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_PCI_DMA_READ 0
+#define TRACE_ESP_PCI_DMA_READ_ENABLED 0
+#define TRACE_ESP_PCI_DMA_READ_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_dma_read(uint32_t saddr, uint32_t reg) {
+ (void)saddr;
+ (void)reg;
+}
+#define TRACE_ESP_PCI_DMA_START 0
+#define TRACE_ESP_PCI_DMA_START_ENABLED 0
+#define TRACE_ESP_PCI_DMA_START_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_dma_start(uint32_t val) {
+ (void)val;
+}
+#define TRACE_ESP_PCI_DMA_WRITE 0
+#define TRACE_ESP_PCI_DMA_WRITE_ENABLED 0
+#define TRACE_ESP_PCI_DMA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) {
+ (void)saddr;
+ (void)reg;
+ (void)val;
+}
+#define TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION 0
+#define TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION_ENABLED 0
+#define TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_error_invalid_dma_direction(void) {
+}
+#define TRACE_ESP_PCI_ERROR_INVALID_READ 0
+#define TRACE_ESP_PCI_ERROR_INVALID_READ_ENABLED 0
+#define TRACE_ESP_PCI_ERROR_INVALID_READ_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_error_invalid_read(uint32_t reg) {
+ (void)reg;
+}
+#define TRACE_ESP_PCI_ERROR_INVALID_WRITE 0
+#define TRACE_ESP_PCI_ERROR_INVALID_WRITE_ENABLED 0
+#define TRACE_ESP_PCI_ERROR_INVALID_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_error_invalid_write(uint32_t reg) {
+ (void)reg;
+}
+#define TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA 0
+#define TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA_ENABLED 0
+#define TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) {
+ (void)val;
+ (void)addr;
+}
+#define TRACE_ESP_PCI_SBAC_READ 0
+#define TRACE_ESP_PCI_SBAC_READ_ENABLED 0
+#define TRACE_ESP_PCI_SBAC_READ_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_sbac_read(uint32_t reg) {
+ (void)reg;
+}
+#define TRACE_ESP_PCI_SBAC_WRITE 0
+#define TRACE_ESP_PCI_SBAC_WRITE_ENABLED 0
+#define TRACE_ESP_PCI_SBAC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_esp_pci_sbac_write(uint32_t reg, uint32_t val) {
+ (void)reg;
+ (void)val;
+}
+#define TRACE_ESP_PDMA_READ 0
+#define TRACE_ESP_PDMA_READ_ENABLED 0
+#define TRACE_ESP_PDMA_READ_BACKEND_DSTATE() (0)
+static inline void trace_esp_pdma_read(int size) {
+ (void)size;
+}
+#define TRACE_ESP_PDMA_WRITE 0
+#define TRACE_ESP_PDMA_WRITE_ENABLED 0
+#define TRACE_ESP_PDMA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_esp_pdma_write(int size) {
+ (void)size;
+}
+#define TRACE_ESP_RAISE_DRQ 0
+#define TRACE_ESP_RAISE_DRQ_ENABLED 0
+#define TRACE_ESP_RAISE_DRQ_BACKEND_DSTATE() (0)
+static inline void trace_esp_raise_drq(void) {
+}
+#define TRACE_ESP_RAISE_IRQ 0
+#define TRACE_ESP_RAISE_IRQ_ENABLED 0
+#define TRACE_ESP_RAISE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_esp_raise_irq(void) {
+}
+#define TRACE_ESP_SET_PHASE 0
+#define TRACE_ESP_SET_PHASE_ENABLED 0
+#define TRACE_ESP_SET_PHASE_BACKEND_DSTATE() (0)
+static inline void trace_esp_set_phase(const char *phase) {
+ (void)phase;
+}
+#define TRACE_ESP_TRANSFER_DATA 0
+#define TRACE_ESP_TRANSFER_DATA_ENABLED 0
+#define TRACE_ESP_TRANSFER_DATA_BACKEND_DSTATE() (0)
+static inline void trace_esp_transfer_data(uint32_t dma_left, int32_t ti_size) {
+ (void)dma_left;
+ (void)ti_size;
+}
+#define TRACE_ESP_WRITE_RESPONSE 0
+#define TRACE_ESP_WRITE_RESPONSE_ENABLED 0
+#define TRACE_ESP_WRITE_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_esp_write_response(uint32_t status) {
+ (void)status;
+}
+#define TRACE_LASI_NCR710_COMMAND_COMPLETE 0
+#define TRACE_LASI_NCR710_COMMAND_COMPLETE_ENABLED 0
+#define TRACE_LASI_NCR710_COMMAND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_command_complete(uint32_t status, size_t resid) {
+ (void)status;
+ (void)resid;
+}
+#define TRACE_LASI_NCR710_DEVICE_REALIZE 0
+#define TRACE_LASI_NCR710_DEVICE_REALIZE_ENABLED 0
+#define TRACE_LASI_NCR710_DEVICE_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_device_realize(void) {
+}
+#define TRACE_LASI_NCR710_DEVICE_RESET 0
+#define TRACE_LASI_NCR710_DEVICE_RESET_ENABLED 0
+#define TRACE_LASI_NCR710_DEVICE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_device_reset(void) {
+}
+#define TRACE_LASI_NCR710_HANDLE_LEGACY_CMDLINE 0
+#define TRACE_LASI_NCR710_HANDLE_LEGACY_CMDLINE_ENABLED 0
+#define TRACE_LASI_NCR710_HANDLE_LEGACY_CMDLINE_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_handle_legacy_cmdline(int busnr, int found_drives) {
+ (void)busnr;
+ (void)found_drives;
+}
+#define TRACE_LASI_NCR710_LEGACY_DRIVE_FOUND 0
+#define TRACE_LASI_NCR710_LEGACY_DRIVE_FOUND_ENABLED 0
+#define TRACE_LASI_NCR710_LEGACY_DRIVE_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_legacy_drive_found(int busnr, int unit) {
+ (void)busnr;
+ (void)unit;
+}
+#define TRACE_LASI_NCR710_REG_FORWARD_READ 0
+#define TRACE_LASI_NCR710_REG_FORWARD_READ_ENABLED 0
+#define TRACE_LASI_NCR710_REG_FORWARD_READ_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_reg_forward_read(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LASI_NCR710_REG_FORWARD_WRITE 0
+#define TRACE_LASI_NCR710_REG_FORWARD_WRITE_ENABLED 0
+#define TRACE_LASI_NCR710_REG_FORWARD_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_reg_forward_write(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_LASI_NCR710_REG_READ 0
+#define TRACE_LASI_NCR710_REG_READ_ENABLED 0
+#define TRACE_LASI_NCR710_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_reg_read(uint32_t addr, uint32_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_LASI_NCR710_REG_READ_HVERSION 0
+#define TRACE_LASI_NCR710_REG_READ_HVERSION_ENABLED 0
+#define TRACE_LASI_NCR710_REG_READ_HVERSION_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_reg_read_hversion(uint32_t hversion) {
+ (void)hversion;
+}
+#define TRACE_LASI_NCR710_REG_READ_ID 0
+#define TRACE_LASI_NCR710_REG_READ_ID_ENABLED 0
+#define TRACE_LASI_NCR710_REG_READ_ID_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_reg_read_id(uint32_t hw_type, uint32_t sversion, uint32_t val) {
+ (void)hw_type;
+ (void)sversion;
+ (void)val;
+}
+#define TRACE_LASI_NCR710_REG_WRITE 0
+#define TRACE_LASI_NCR710_REG_WRITE_ENABLED 0
+#define TRACE_LASI_NCR710_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_reg_write(uint32_t addr, uint32_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_LASI_NCR710_REQUEST_CANCELLED 0
+#define TRACE_LASI_NCR710_REQUEST_CANCELLED_ENABLED 0
+#define TRACE_LASI_NCR710_REQUEST_CANCELLED_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_request_cancelled(void *req) {
+ (void)req;
+}
+#define TRACE_LASI_NCR710_SCSI_DEVICE_CREATED 0
+#define TRACE_LASI_NCR710_SCSI_DEVICE_CREATED_ENABLED 0
+#define TRACE_LASI_NCR710_SCSI_DEVICE_CREATED_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_scsi_device_created(const char *type) {
+ (void)type;
+}
+#define TRACE_LASI_NCR710_TIMERS_INITIALIZED 0
+#define TRACE_LASI_NCR710_TIMERS_INITIALIZED_ENABLED 0
+#define TRACE_LASI_NCR710_TIMERS_INITIALIZED_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_timers_initialized(uint64_t reselection) {
+ (void)reselection;
+}
+#define TRACE_LASI_NCR710_TRANSFER_DATA 0
+#define TRACE_LASI_NCR710_TRANSFER_DATA_ENABLED 0
+#define TRACE_LASI_NCR710_TRANSFER_DATA_BACKEND_DSTATE() (0)
+static inline void trace_lasi_ncr710_transfer_data(uint32_t len) {
+ (void)len;
+}
+#define TRACE_LSI_ADD_MSG_BYTE 0
+#define TRACE_LSI_ADD_MSG_BYTE_ENABLED 0
+#define TRACE_LSI_ADD_MSG_BYTE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_add_msg_byte(uint8_t data) {
+ (void)data;
+}
+#define TRACE_LSI_ADD_MSG_BYTE_ERROR 0
+#define TRACE_LSI_ADD_MSG_BYTE_ERROR_ENABLED 0
+#define TRACE_LSI_ADD_MSG_BYTE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_lsi_add_msg_byte_error(void) {
+}
+#define TRACE_LSI_AWOKEN 0
+#define TRACE_LSI_AWOKEN_ENABLED 0
+#define TRACE_LSI_AWOKEN_BACKEND_DSTATE() (0)
+static inline void trace_lsi_awoken(void) {
+}
+#define TRACE_LSI_BAD_PHASE_INTERRUPT 0
+#define TRACE_LSI_BAD_PHASE_INTERRUPT_ENABLED 0
+#define TRACE_LSI_BAD_PHASE_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_bad_phase_interrupt(void) {
+}
+#define TRACE_LSI_BAD_PHASE_JUMP 0
+#define TRACE_LSI_BAD_PHASE_JUMP_ENABLED 0
+#define TRACE_LSI_BAD_PHASE_JUMP_BACKEND_DSTATE() (0)
+static inline void trace_lsi_bad_phase_jump(uint32_t dsp) {
+ (void)dsp;
+}
+#define TRACE_LSI_BAD_SELECTION 0
+#define TRACE_LSI_BAD_SELECTION_ENABLED 0
+#define TRACE_LSI_BAD_SELECTION_BACKEND_DSTATE() (0)
+static inline void trace_lsi_bad_selection(uint32_t id) {
+ (void)id;
+}
+#define TRACE_LSI_COMMAND_COMPLETE 0
+#define TRACE_LSI_COMMAND_COMPLETE_ENABLED 0
+#define TRACE_LSI_COMMAND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_command_complete(uint32_t status) {
+ (void)status;
+}
+#define TRACE_LSI_DO_COMMAND 0
+#define TRACE_LSI_DO_COMMAND_ENABLED 0
+#define TRACE_LSI_DO_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_command(uint32_t dbc) {
+ (void)dbc;
+}
+#define TRACE_LSI_DO_DMA 0
+#define TRACE_LSI_DO_DMA_ENABLED 0
+#define TRACE_LSI_DO_DMA_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_dma(uint64_t addr, int len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_LSI_DO_DMA_UNAVAILABLE 0
+#define TRACE_LSI_DO_DMA_UNAVAILABLE_ENABLED 0
+#define TRACE_LSI_DO_DMA_UNAVAILABLE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_dma_unavailable(void) {
+}
+#define TRACE_LSI_DO_MSGIN 0
+#define TRACE_LSI_DO_MSGIN_ENABLED 0
+#define TRACE_LSI_DO_MSGIN_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgin(uint32_t dbc, int len) {
+ (void)dbc;
+ (void)len;
+}
+#define TRACE_LSI_DO_MSGOUT 0
+#define TRACE_LSI_DO_MSGOUT_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout(uint32_t dbc) {
+ (void)dbc;
+}
+#define TRACE_LSI_DO_MSGOUT_ABORT 0
+#define TRACE_LSI_DO_MSGOUT_ABORT_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_abort(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_LSI_DO_MSGOUT_BUSDEVICERESET 0
+#define TRACE_LSI_DO_MSGOUT_BUSDEVICERESET_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_BUSDEVICERESET_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_busdevicereset(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_LSI_DO_MSGOUT_CLEARQUEUE 0
+#define TRACE_LSI_DO_MSGOUT_CLEARQUEUE_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_CLEARQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_clearqueue(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_LSI_DO_MSGOUT_DISCONNECT 0
+#define TRACE_LSI_DO_MSGOUT_DISCONNECT_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_disconnect(void) {
+}
+#define TRACE_LSI_DO_MSGOUT_EXTENDED 0
+#define TRACE_LSI_DO_MSGOUT_EXTENDED_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_EXTENDED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_extended(uint8_t msg, uint8_t len) {
+ (void)msg;
+ (void)len;
+}
+#define TRACE_LSI_DO_MSGOUT_IGNORED 0
+#define TRACE_LSI_DO_MSGOUT_IGNORED_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_IGNORED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_ignored(const char *msg) {
+ (void)msg;
+}
+#define TRACE_LSI_DO_MSGOUT_NOOP 0
+#define TRACE_LSI_DO_MSGOUT_NOOP_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_NOOP_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_noop(void) {
+}
+#define TRACE_LSI_DO_MSGOUT_SELECT 0
+#define TRACE_LSI_DO_MSGOUT_SELECT_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_select(int id) {
+ (void)id;
+}
+#define TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE 0
+#define TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE_ENABLED 0
+#define TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_msgout_simplequeue(uint8_t select_tag) {
+ (void)select_tag;
+}
+#define TRACE_LSI_DO_STATUS 0
+#define TRACE_LSI_DO_STATUS_ENABLED 0
+#define TRACE_LSI_DO_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_status(uint32_t dbc, uint8_t status) {
+ (void)dbc;
+ (void)status;
+}
+#define TRACE_LSI_DO_STATUS_ERROR 0
+#define TRACE_LSI_DO_STATUS_ERROR_ENABLED 0
+#define TRACE_LSI_DO_STATUS_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_lsi_do_status_error(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT 0
+#define TRACE_LSI_EXECUTE_SCRIPT_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script(uint32_t dsp, uint32_t insn, uint32_t addr) {
+ (void)dsp;
+ (void)insn;
+ (void)addr;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE 0
+#define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_blockmove_badphase(const char *phase, const char *expected) {
+ (void)phase;
+ (void)expected;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_blockmove_delayed(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_io_alreadyreselected(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_io_clear(const char *atn, const char *ack, const char *tm, const char *cc) {
+ (void)atn;
+ (void)ack;
+ (void)tm;
+ (void)cc;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_io_disconnect(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_io_opcode(const char *opcode, int reg, const char *opname, uint8_t data8, uint32_t sfbr, const char *ssfbr) {
+ (void)opcode;
+ (void)reg;
+ (void)opname;
+ (void)data8;
+ (void)sfbr;
+ (void)ssfbr;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_io_selected(uint8_t id, const char *atn) {
+ (void)id;
+ (void)atn;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_SET 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_SET_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_IO_SET_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_io_set(const char *atn, const char *ack, const char *tm, const char *cc) {
+ (void)atn;
+ (void)ack;
+ (void)tm;
+ (void)cc;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD 0
+#define TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_mm_load(int reg, int n, uint32_t addr, int data) {
+ (void)reg;
+ (void)n;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_MM_STORE 0
+#define TRACE_LSI_EXECUTE_SCRIPT_MM_STORE_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_MM_STORE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_mm_store(int reg, int n, uint32_t addr) {
+ (void)reg;
+ (void)n;
+ (void)addr;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_STOP 0
+#define TRACE_LSI_EXECUTE_SCRIPT_STOP_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_STOP_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_stop(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_CALL 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_CALL_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_CALL_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_call(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_cc_failed(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_compc(int result) {
+ (void)result;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, char op, int result) {
+ (void)sfbr;
+ (void)mask;
+ (void)op;
+ (void)result;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_compp(const char *phase, char op, const char *insn_phase) {
+ (void)phase;
+ (void)op;
+ (void)insn_phase;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_delayedselect_timeout(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_illegal(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_interrupt(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_jump(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_NOP 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_NOP_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_NOP_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_nop(void) {
+}
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN_ENABLED 0
+#define TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_lsi_execute_script_tc_return(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_LSI_MEMCPY 0
+#define TRACE_LSI_MEMCPY_ENABLED 0
+#define TRACE_LSI_MEMCPY_BACKEND_DSTATE() (0)
+static inline void trace_lsi_memcpy(uint32_t dest, uint32_t src, int count) {
+ (void)dest;
+ (void)src;
+ (void)count;
+}
+#define TRACE_LSI_QUEUE_COMMAND 0
+#define TRACE_LSI_QUEUE_COMMAND_ENABLED 0
+#define TRACE_LSI_QUEUE_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_lsi_queue_command(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_LSI_QUEUE_REQ 0
+#define TRACE_LSI_QUEUE_REQ_ENABLED 0
+#define TRACE_LSI_QUEUE_REQ_BACKEND_DSTATE() (0)
+static inline void trace_lsi_queue_req(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_LSI_QUEUE_REQ_ERROR 0
+#define TRACE_LSI_QUEUE_REQ_ERROR_ENABLED 0
+#define TRACE_LSI_QUEUE_REQ_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_lsi_queue_req_error(void *p) {
+ (void)p;
+}
+#define TRACE_LSI_REG_READ 0
+#define TRACE_LSI_REG_READ_ENABLED 0
+#define TRACE_LSI_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_lsi_reg_read(const char *name, int offset, uint8_t ret) {
+ (void)name;
+ (void)offset;
+ (void)ret;
+}
+#define TRACE_LSI_REG_WRITE 0
+#define TRACE_LSI_REG_WRITE_ENABLED 0
+#define TRACE_LSI_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_lsi_reg_write(const char *name, int offset, uint8_t val) {
+ (void)name;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_LSI_RESELECT 0
+#define TRACE_LSI_RESELECT_ENABLED 0
+#define TRACE_LSI_RESELECT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_reselect(int id) {
+ (void)id;
+}
+#define TRACE_LSI_RESET 0
+#define TRACE_LSI_RESET_ENABLED 0
+#define TRACE_LSI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_lsi_reset(void) {
+}
+#define TRACE_LSI_SCRIPT_DMA_INTERRUPT 0
+#define TRACE_LSI_SCRIPT_DMA_INTERRUPT_ENABLED 0
+#define TRACE_LSI_SCRIPT_DMA_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_script_dma_interrupt(uint8_t stat, uint8_t dstat) {
+ (void)stat;
+ (void)dstat;
+}
+#define TRACE_LSI_SCRIPT_SCSI_INTERRUPT 0
+#define TRACE_LSI_SCRIPT_SCSI_INTERRUPT_ENABLED 0
+#define TRACE_LSI_SCRIPT_SCSI_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_script_scsi_interrupt(uint8_t stat1, uint8_t stat0, uint8_t sist1, uint8_t sist0) {
+ (void)stat1;
+ (void)stat0;
+ (void)sist1;
+ (void)sist0;
+}
+#define TRACE_LSI_SCRIPTS_TIMER_START 0
+#define TRACE_LSI_SCRIPTS_TIMER_START_ENABLED 0
+#define TRACE_LSI_SCRIPTS_TIMER_START_BACKEND_DSTATE() (0)
+static inline void trace_lsi_scripts_timer_start(void) {
+}
+#define TRACE_LSI_SCRIPTS_TIMER_TRIGGERED 0
+#define TRACE_LSI_SCRIPTS_TIMER_TRIGGERED_ENABLED 0
+#define TRACE_LSI_SCRIPTS_TIMER_TRIGGERED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_scripts_timer_triggered(void) {
+}
+#define TRACE_LSI_TRANSFER_DATA 0
+#define TRACE_LSI_TRANSFER_DATA_ENABLED 0
+#define TRACE_LSI_TRANSFER_DATA_BACKEND_DSTATE() (0)
+static inline void trace_lsi_transfer_data(uint32_t tag, uint32_t len) {
+ (void)tag;
+ (void)len;
+}
+#define TRACE_LSI_UPDATE_IRQ 0
+#define TRACE_LSI_UPDATE_IRQ_ENABLED 0
+#define TRACE_LSI_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) {
+ (void)level;
+ (void)dstat;
+ (void)sist1;
+ (void)sist0;
+}
+#define TRACE_LSI_UPDATE_IRQ_DISCONNECTED 0
+#define TRACE_LSI_UPDATE_IRQ_DISCONNECTED_ENABLED 0
+#define TRACE_LSI_UPDATE_IRQ_DISCONNECTED_BACKEND_DSTATE() (0)
+static inline void trace_lsi_update_irq_disconnected(void) {
+}
+#define TRACE_LSI_WAIT_RESELECT 0
+#define TRACE_LSI_WAIT_RESELECT_ENABLED 0
+#define TRACE_LSI_WAIT_RESELECT_BACKEND_DSTATE() (0)
+static inline void trace_lsi_wait_reselect(void) {
+}
+#define TRACE_MEGASAS_ABORT_FRAME 0
+#define TRACE_MEGASAS_ABORT_FRAME_ENABLED 0
+#define TRACE_MEGASAS_ABORT_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_megasas_abort_frame(int cmd, int abort_cmd) {
+ (void)cmd;
+ (void)abort_cmd;
+}
+#define TRACE_MEGASAS_ABORT_INVALID_CONTEXT 0
+#define TRACE_MEGASAS_ABORT_INVALID_CONTEXT_ENABLED 0
+#define TRACE_MEGASAS_ABORT_INVALID_CONTEXT_BACKEND_DSTATE() (0)
+static inline void trace_megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) {
+ (void)cmd;
+ (void)context;
+ (void)abort_cmd;
+}
+#define TRACE_MEGASAS_ABORT_NO_CMD 0
+#define TRACE_MEGASAS_ABORT_NO_CMD_ENABLED 0
+#define TRACE_MEGASAS_ABORT_NO_CMD_BACKEND_DSTATE() (0)
+static inline void trace_megasas_abort_no_cmd(int cmd, uint64_t context) {
+ (void)cmd;
+ (void)context;
+}
+#define TRACE_MEGASAS_COMMAND_COMPLETE 0
+#define TRACE_MEGASAS_COMMAND_COMPLETE_ENABLED 0
+#define TRACE_MEGASAS_COMMAND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_command_complete(int cmd, uint32_t status, uint32_t resid) {
+ (void)cmd;
+ (void)status;
+ (void)resid;
+}
+#define TRACE_MEGASAS_DCMD_DUMMY 0
+#define TRACE_MEGASAS_DCMD_DUMMY_ENABLED 0
+#define TRACE_MEGASAS_DCMD_DUMMY_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_dummy(int cmd, unsigned long size) {
+ (void)cmd;
+ (void)size;
+}
+#define TRACE_MEGASAS_DCMD_ENTER 0
+#define TRACE_MEGASAS_DCMD_ENTER_ENABLED 0
+#define TRACE_MEGASAS_DCMD_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_enter(int cmd, const char *dcmd, int len) {
+ (void)cmd;
+ (void)dcmd;
+ (void)len;
+}
+#define TRACE_MEGASAS_DCMD_INTERNAL_FINISH 0
+#define TRACE_MEGASAS_DCMD_INTERNAL_FINISH_ENABLED 0
+#define TRACE_MEGASAS_DCMD_INTERNAL_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_internal_finish(int cmd, int opcode, int lun) {
+ (void)cmd;
+ (void)opcode;
+ (void)lun;
+}
+#define TRACE_MEGASAS_DCMD_INTERNAL_INVALID 0
+#define TRACE_MEGASAS_DCMD_INTERNAL_INVALID_ENABLED 0
+#define TRACE_MEGASAS_DCMD_INTERNAL_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_internal_invalid(int cmd, int opcode) {
+ (void)cmd;
+ (void)opcode;
+}
+#define TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT 0
+#define TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT_ENABLED 0
+#define TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) {
+ (void)cmd;
+ (void)desc;
+ (void)dev;
+}
+#define TRACE_MEGASAS_DCMD_INVALID_SGE 0
+#define TRACE_MEGASAS_DCMD_INVALID_SGE_ENABLED 0
+#define TRACE_MEGASAS_DCMD_INVALID_SGE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_invalid_sge(int cmd, int count) {
+ (void)cmd;
+ (void)count;
+}
+#define TRACE_MEGASAS_DCMD_INVALID_XFER_LEN 0
+#define TRACE_MEGASAS_DCMD_INVALID_XFER_LEN_ENABLED 0
+#define TRACE_MEGASAS_DCMD_INVALID_XFER_LEN_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) {
+ (void)cmd;
+ (void)size;
+ (void)max;
+}
+#define TRACE_MEGASAS_DCMD_LD_GET_INFO 0
+#define TRACE_MEGASAS_DCMD_LD_GET_INFO_ENABLED 0
+#define TRACE_MEGASAS_DCMD_LD_GET_INFO_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_ld_get_info(int cmd, int ld_id) {
+ (void)cmd;
+ (void)ld_id;
+}
+#define TRACE_MEGASAS_DCMD_LD_GET_LIST 0
+#define TRACE_MEGASAS_DCMD_LD_GET_LIST_ENABLED 0
+#define TRACE_MEGASAS_DCMD_LD_GET_LIST_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_ld_get_list(int cmd, int num, int max) {
+ (void)cmd;
+ (void)num;
+ (void)max;
+}
+#define TRACE_MEGASAS_DCMD_LD_LIST_QUERY 0
+#define TRACE_MEGASAS_DCMD_LD_LIST_QUERY_ENABLED 0
+#define TRACE_MEGASAS_DCMD_LD_LIST_QUERY_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_ld_list_query(int cmd, int flags) {
+ (void)cmd;
+ (void)flags;
+}
+#define TRACE_MEGASAS_DCMD_PD_GET_INFO 0
+#define TRACE_MEGASAS_DCMD_PD_GET_INFO_ENABLED 0
+#define TRACE_MEGASAS_DCMD_PD_GET_INFO_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_pd_get_info(int cmd, int pd_id) {
+ (void)cmd;
+ (void)pd_id;
+}
+#define TRACE_MEGASAS_DCMD_PD_GET_LIST 0
+#define TRACE_MEGASAS_DCMD_PD_GET_LIST_ENABLED 0
+#define TRACE_MEGASAS_DCMD_PD_GET_LIST_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) {
+ (void)cmd;
+ (void)num;
+ (void)max;
+ (void)offset;
+}
+#define TRACE_MEGASAS_DCMD_PD_LIST_QUERY 0
+#define TRACE_MEGASAS_DCMD_PD_LIST_QUERY_ENABLED 0
+#define TRACE_MEGASAS_DCMD_PD_LIST_QUERY_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_pd_list_query(int cmd, int flags) {
+ (void)cmd;
+ (void)flags;
+}
+#define TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED 0
+#define TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED_ENABLED 0
+#define TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_req_alloc_failed(int cmd, const char *desc) {
+ (void)cmd;
+ (void)desc;
+}
+#define TRACE_MEGASAS_DCMD_RESET_LD 0
+#define TRACE_MEGASAS_DCMD_RESET_LD_ENABLED 0
+#define TRACE_MEGASAS_DCMD_RESET_LD_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_reset_ld(int cmd, int target_id) {
+ (void)cmd;
+ (void)target_id;
+}
+#define TRACE_MEGASAS_DCMD_SET_FW_TIME 0
+#define TRACE_MEGASAS_DCMD_SET_FW_TIME_ENABLED 0
+#define TRACE_MEGASAS_DCMD_SET_FW_TIME_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_set_fw_time(int cmd, unsigned long time) {
+ (void)cmd;
+ (void)time;
+}
+#define TRACE_MEGASAS_DCMD_UNHANDLED 0
+#define TRACE_MEGASAS_DCMD_UNHANDLED_ENABLED 0
+#define TRACE_MEGASAS_DCMD_UNHANDLED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_unhandled(int cmd, int opcode, int len) {
+ (void)cmd;
+ (void)opcode;
+ (void)len;
+}
+#define TRACE_MEGASAS_DCMD_UNSUPPORTED 0
+#define TRACE_MEGASAS_DCMD_UNSUPPORTED_ENABLED 0
+#define TRACE_MEGASAS_DCMD_UNSUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_unsupported(int cmd, unsigned long size) {
+ (void)cmd;
+ (void)size;
+}
+#define TRACE_MEGASAS_DCMD_ZERO_SGE 0
+#define TRACE_MEGASAS_DCMD_ZERO_SGE_ENABLED 0
+#define TRACE_MEGASAS_DCMD_ZERO_SGE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_dcmd_zero_sge(int cmd) {
+ (void)cmd;
+}
+#define TRACE_MEGASAS_FINISH_DCMD 0
+#define TRACE_MEGASAS_FINISH_DCMD_ENABLED 0
+#define TRACE_MEGASAS_FINISH_DCMD_BACKEND_DSTATE() (0)
+static inline void trace_megasas_finish_dcmd(int cmd, int size) {
+ (void)cmd;
+ (void)size;
+}
+#define TRACE_MEGASAS_FRAME_BUSY 0
+#define TRACE_MEGASAS_FRAME_BUSY_ENABLED 0
+#define TRACE_MEGASAS_FRAME_BUSY_BACKEND_DSTATE() (0)
+static inline void trace_megasas_frame_busy(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_MEGASAS_HANDLE_DCMD 0
+#define TRACE_MEGASAS_HANDLE_DCMD_ENABLED 0
+#define TRACE_MEGASAS_HANDLE_DCMD_BACKEND_DSTATE() (0)
+static inline void trace_megasas_handle_dcmd(int cmd, int opcode) {
+ (void)cmd;
+ (void)opcode;
+}
+#define TRACE_MEGASAS_HANDLE_IO 0
+#define TRACE_MEGASAS_HANDLE_IO_ENABLED 0
+#define TRACE_MEGASAS_HANDLE_IO_BACKEND_DSTATE() (0)
+static inline void trace_megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) {
+ (void)cmd;
+ (void)frame;
+ (void)dev;
+ (void)lun;
+ (void)lba;
+ (void)count;
+}
+#define TRACE_MEGASAS_HANDLE_SCSI 0
+#define TRACE_MEGASAS_HANDLE_SCSI_ENABLED 0
+#define TRACE_MEGASAS_HANDLE_SCSI_BACKEND_DSTATE() (0)
+static inline void trace_megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) {
+ (void)frame;
+ (void)bus;
+ (void)dev;
+ (void)lun;
+ (void)sdev;
+ (void)size;
+}
+#define TRACE_MEGASAS_INIT 0
+#define TRACE_MEGASAS_INIT_ENABLED 0
+#define TRACE_MEGASAS_INIT_BACKEND_DSTATE() (0)
+static inline void trace_megasas_init(int sges, int cmds, const char *mode) {
+ (void)sges;
+ (void)cmds;
+ (void)mode;
+}
+#define TRACE_MEGASAS_INIT_FIRMWARE 0
+#define TRACE_MEGASAS_INIT_FIRMWARE_ENABLED 0
+#define TRACE_MEGASAS_INIT_FIRMWARE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_init_firmware(uint64_t pa) {
+ (void)pa;
+}
+#define TRACE_MEGASAS_INIT_QUEUE 0
+#define TRACE_MEGASAS_INIT_QUEUE_ENABLED 0
+#define TRACE_MEGASAS_INIT_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_init_queue(uint64_t queue_pa, int queue_len, uint32_t head, uint32_t tail, uint32_t flags) {
+ (void)queue_pa;
+ (void)queue_len;
+ (void)head;
+ (void)tail;
+ (void)flags;
+}
+#define TRACE_MEGASAS_INITQ_MAP_FAILED 0
+#define TRACE_MEGASAS_INITQ_MAP_FAILED_ENABLED 0
+#define TRACE_MEGASAS_INITQ_MAP_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_initq_map_failed(int frame) {
+ (void)frame;
+}
+#define TRACE_MEGASAS_INITQ_MAPPED 0
+#define TRACE_MEGASAS_INITQ_MAPPED_ENABLED 0
+#define TRACE_MEGASAS_INITQ_MAPPED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_initq_mapped(uint64_t pa) {
+ (void)pa;
+}
+#define TRACE_MEGASAS_INITQ_MISMATCH 0
+#define TRACE_MEGASAS_INITQ_MISMATCH_ENABLED 0
+#define TRACE_MEGASAS_INITQ_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_megasas_initq_mismatch(int queue_len, int fw_cmds) {
+ (void)queue_len;
+ (void)fw_cmds;
+}
+#define TRACE_MEGASAS_INTR_DISABLED 0
+#define TRACE_MEGASAS_INTR_DISABLED_ENABLED 0
+#define TRACE_MEGASAS_INTR_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_intr_disabled(void) {
+}
+#define TRACE_MEGASAS_INTR_ENABLED 0
+#define TRACE_MEGASAS_INTR_ENABLED_ENABLED 0
+#define TRACE_MEGASAS_INTR_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_intr_enabled(void) {
+}
+#define TRACE_MEGASAS_IO_COMPLETE 0
+#define TRACE_MEGASAS_IO_COMPLETE_ENABLED 0
+#define TRACE_MEGASAS_IO_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_io_complete(int cmd, uint32_t len) {
+ (void)cmd;
+ (void)len;
+}
+#define TRACE_MEGASAS_IO_READ_START 0
+#define TRACE_MEGASAS_IO_READ_START_ENABLED 0
+#define TRACE_MEGASAS_IO_READ_START_BACKEND_DSTATE() (0)
+static inline void trace_megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) {
+ (void)cmd;
+ (void)lba;
+ (void)count;
+ (void)len;
+}
+#define TRACE_MEGASAS_IO_TARGET_NOT_PRESENT 0
+#define TRACE_MEGASAS_IO_TARGET_NOT_PRESENT_ENABLED 0
+#define TRACE_MEGASAS_IO_TARGET_NOT_PRESENT_BACKEND_DSTATE() (0)
+static inline void trace_megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) {
+ (void)cmd;
+ (void)frame;
+ (void)dev;
+ (void)lun;
+}
+#define TRACE_MEGASAS_IO_WRITE_START 0
+#define TRACE_MEGASAS_IO_WRITE_START_ENABLED 0
+#define TRACE_MEGASAS_IO_WRITE_START_BACKEND_DSTATE() (0)
+static inline void trace_megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) {
+ (void)cmd;
+ (void)lba;
+ (void)count;
+ (void)len;
+}
+#define TRACE_MEGASAS_IOV_READ_OVERFLOW 0
+#define TRACE_MEGASAS_IOV_READ_OVERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOV_READ_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iov_read_overflow(int cmd, int bytes, int len) {
+ (void)cmd;
+ (void)bytes;
+ (void)len;
+}
+#define TRACE_MEGASAS_IOV_READ_UNDERFLOW 0
+#define TRACE_MEGASAS_IOV_READ_UNDERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOV_READ_UNDERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iov_read_underflow(int cmd, int bytes, int len) {
+ (void)cmd;
+ (void)bytes;
+ (void)len;
+}
+#define TRACE_MEGASAS_IOV_WRITE_OVERFLOW 0
+#define TRACE_MEGASAS_IOV_WRITE_OVERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOV_WRITE_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iov_write_overflow(int cmd, int bytes, int len) {
+ (void)cmd;
+ (void)bytes;
+ (void)len;
+}
+#define TRACE_MEGASAS_IOV_WRITE_UNDERFLOW 0
+#define TRACE_MEGASAS_IOV_WRITE_UNDERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOV_WRITE_UNDERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iov_write_underflow(int cmd, int bytes, int len) {
+ (void)cmd;
+ (void)bytes;
+ (void)len;
+}
+#define TRACE_MEGASAS_IOVEC_OVERFLOW 0
+#define TRACE_MEGASAS_IOVEC_OVERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOVEC_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iovec_overflow(int cmd, int len, int limit) {
+ (void)cmd;
+ (void)len;
+ (void)limit;
+}
+#define TRACE_MEGASAS_IOVEC_SGL_INVALID 0
+#define TRACE_MEGASAS_IOVEC_SGL_INVALID_ENABLED 0
+#define TRACE_MEGASAS_IOVEC_SGL_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) {
+ (void)cmd;
+ (void)index;
+ (void)pa;
+ (void)len;
+}
+#define TRACE_MEGASAS_IOVEC_SGL_OVERFLOW 0
+#define TRACE_MEGASAS_IOVEC_SGL_OVERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOVEC_SGL_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iovec_sgl_overflow(int cmd, int index, int limit) {
+ (void)cmd;
+ (void)index;
+ (void)limit;
+}
+#define TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW 0
+#define TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iovec_sgl_underflow(int cmd, int index) {
+ (void)cmd;
+ (void)index;
+}
+#define TRACE_MEGASAS_IOVEC_UNDERFLOW 0
+#define TRACE_MEGASAS_IOVEC_UNDERFLOW_ENABLED 0
+#define TRACE_MEGASAS_IOVEC_UNDERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_iovec_underflow(int cmd, int len, int limit) {
+ (void)cmd;
+ (void)len;
+ (void)limit;
+}
+#define TRACE_MEGASAS_IRQ_LOWER 0
+#define TRACE_MEGASAS_IRQ_LOWER_ENABLED 0
+#define TRACE_MEGASAS_IRQ_LOWER_BACKEND_DSTATE() (0)
+static inline void trace_megasas_irq_lower(void) {
+}
+#define TRACE_MEGASAS_IRQ_RAISE 0
+#define TRACE_MEGASAS_IRQ_RAISE_ENABLED 0
+#define TRACE_MEGASAS_IRQ_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_irq_raise(void) {
+}
+#define TRACE_MEGASAS_MMIO_INVALID_READL 0
+#define TRACE_MEGASAS_MMIO_INVALID_READL_ENABLED 0
+#define TRACE_MEGASAS_MMIO_INVALID_READL_BACKEND_DSTATE() (0)
+static inline void trace_megasas_mmio_invalid_readl(unsigned long addr) {
+ (void)addr;
+}
+#define TRACE_MEGASAS_MMIO_INVALID_WRITEL 0
+#define TRACE_MEGASAS_MMIO_INVALID_WRITEL_ENABLED 0
+#define TRACE_MEGASAS_MMIO_INVALID_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MEGASAS_MMIO_READL 0
+#define TRACE_MEGASAS_MMIO_READL_ENABLED 0
+#define TRACE_MEGASAS_MMIO_READL_BACKEND_DSTATE() (0)
+static inline void trace_megasas_mmio_readl(const char *reg, uint32_t val) {
+ (void)reg;
+ (void)val;
+}
+#define TRACE_MEGASAS_MMIO_WRITEL 0
+#define TRACE_MEGASAS_MMIO_WRITEL_ENABLED 0
+#define TRACE_MEGASAS_MMIO_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_megasas_mmio_writel(const char *reg, uint32_t val) {
+ (void)reg;
+ (void)val;
+}
+#define TRACE_MEGASAS_MSI_ENABLED 0
+#define TRACE_MEGASAS_MSI_ENABLED_ENABLED 0
+#define TRACE_MEGASAS_MSI_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_msi_enabled(int vector) {
+ (void)vector;
+}
+#define TRACE_MEGASAS_MSI_RAISE 0
+#define TRACE_MEGASAS_MSI_RAISE_ENABLED 0
+#define TRACE_MEGASAS_MSI_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_msi_raise(int vector) {
+ (void)vector;
+}
+#define TRACE_MEGASAS_MSIX_ENABLED 0
+#define TRACE_MEGASAS_MSIX_ENABLED_ENABLED 0
+#define TRACE_MEGASAS_MSIX_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_msix_enabled(int vector) {
+ (void)vector;
+}
+#define TRACE_MEGASAS_MSIX_RAISE 0
+#define TRACE_MEGASAS_MSIX_RAISE_ENABLED 0
+#define TRACE_MEGASAS_MSIX_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_msix_raise(int vector) {
+ (void)vector;
+}
+#define TRACE_MEGASAS_QF_BUSY 0
+#define TRACE_MEGASAS_QF_BUSY_ENABLED 0
+#define TRACE_MEGASAS_QF_BUSY_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_busy(unsigned long pa) {
+ (void)pa;
+}
+#define TRACE_MEGASAS_QF_COMPLETE 0
+#define TRACE_MEGASAS_QF_COMPLETE_ENABLED 0
+#define TRACE_MEGASAS_QF_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_complete(uint64_t context, uint32_t head, uint32_t tail, int busy) {
+ (void)context;
+ (void)head;
+ (void)tail;
+ (void)busy;
+}
+#define TRACE_MEGASAS_QF_COMPLETE_NOIRQ 0
+#define TRACE_MEGASAS_QF_COMPLETE_NOIRQ_ENABLED 0
+#define TRACE_MEGASAS_QF_COMPLETE_NOIRQ_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_complete_noirq(uint64_t context) {
+ (void)context;
+}
+#define TRACE_MEGASAS_QF_ENQUEUE 0
+#define TRACE_MEGASAS_QF_ENQUEUE_ENABLED 0
+#define TRACE_MEGASAS_QF_ENQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, uint32_t head, uint32_t tail, unsigned int busy) {
+ (void)index;
+ (void)count;
+ (void)context;
+ (void)head;
+ (void)tail;
+ (void)busy;
+}
+#define TRACE_MEGASAS_QF_MAP_FAILED 0
+#define TRACE_MEGASAS_QF_MAP_FAILED_ENABLED 0
+#define TRACE_MEGASAS_QF_MAP_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_map_failed(int cmd, unsigned long frame) {
+ (void)cmd;
+ (void)frame;
+}
+#define TRACE_MEGASAS_QF_MAPPED 0
+#define TRACE_MEGASAS_QF_MAPPED_ENABLED 0
+#define TRACE_MEGASAS_QF_MAPPED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_mapped(unsigned int index) {
+ (void)index;
+}
+#define TRACE_MEGASAS_QF_NEW 0
+#define TRACE_MEGASAS_QF_NEW_ENABLED 0
+#define TRACE_MEGASAS_QF_NEW_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_new(unsigned int index, uint64_t frame) {
+ (void)index;
+ (void)frame;
+}
+#define TRACE_MEGASAS_QF_UPDATE 0
+#define TRACE_MEGASAS_QF_UPDATE_ENABLED 0
+#define TRACE_MEGASAS_QF_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_qf_update(uint32_t head, uint32_t tail, unsigned int busy) {
+ (void)head;
+ (void)tail;
+ (void)busy;
+}
+#define TRACE_MEGASAS_RESET 0
+#define TRACE_MEGASAS_RESET_ENABLED 0
+#define TRACE_MEGASAS_RESET_BACKEND_DSTATE() (0)
+static inline void trace_megasas_reset(int fw_state) {
+ (void)fw_state;
+}
+#define TRACE_MEGASAS_SCSI_COMPLETE 0
+#define TRACE_MEGASAS_SCSI_COMPLETE_ENABLED 0
+#define TRACE_MEGASAS_SCSI_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) {
+ (void)cmd;
+ (void)status;
+ (void)len;
+ (void)xfer;
+}
+#define TRACE_MEGASAS_SCSI_INVALID_CDB_LEN 0
+#define TRACE_MEGASAS_SCSI_INVALID_CDB_LEN_ENABLED 0
+#define TRACE_MEGASAS_SCSI_INVALID_CDB_LEN_BACKEND_DSTATE() (0)
+static inline void trace_megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) {
+ (void)frame;
+ (void)bus;
+ (void)dev;
+ (void)lun;
+ (void)len;
+}
+#define TRACE_MEGASAS_SCSI_NODATA 0
+#define TRACE_MEGASAS_SCSI_NODATA_ENABLED 0
+#define TRACE_MEGASAS_SCSI_NODATA_BACKEND_DSTATE() (0)
+static inline void trace_megasas_scsi_nodata(int cmd) {
+ (void)cmd;
+}
+#define TRACE_MEGASAS_SCSI_READ_START 0
+#define TRACE_MEGASAS_SCSI_READ_START_ENABLED 0
+#define TRACE_MEGASAS_SCSI_READ_START_BACKEND_DSTATE() (0)
+static inline void trace_megasas_scsi_read_start(int cmd, int len) {
+ (void)cmd;
+ (void)len;
+}
+#define TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED 0
+#define TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED_ENABLED 0
+#define TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) {
+ (void)frame;
+ (void)dev;
+ (void)lun;
+}
+#define TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT 0
+#define TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT_ENABLED 0
+#define TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT_BACKEND_DSTATE() (0)
+static inline void trace_megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) {
+ (void)frame;
+ (void)bus;
+ (void)dev;
+ (void)lun;
+}
+#define TRACE_MEGASAS_SCSI_WRITE_START 0
+#define TRACE_MEGASAS_SCSI_WRITE_START_ENABLED 0
+#define TRACE_MEGASAS_SCSI_WRITE_START_BACKEND_DSTATE() (0)
+static inline void trace_megasas_scsi_write_start(int cmd, int len) {
+ (void)cmd;
+ (void)len;
+}
+#define TRACE_MEGASAS_UNHANDLED_FRAME_CMD 0
+#define TRACE_MEGASAS_UNHANDLED_FRAME_CMD_ENABLED 0
+#define TRACE_MEGASAS_UNHANDLED_FRAME_CMD_BACKEND_DSTATE() (0)
+static inline void trace_megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) {
+ (void)cmd;
+ (void)frame_cmd;
+}
+#define TRACE_MPTSAS_COMMAND_COMPLETE 0
+#define TRACE_MPTSAS_COMMAND_COMPLETE_ENABLED 0
+#define TRACE_MPTSAS_COMMAND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) {
+ (void)dev;
+ (void)ctx;
+ (void)status;
+ (void)resid;
+}
+#define TRACE_MPTSAS_CONFIG_SAS_DEVICE 0
+#define TRACE_MPTSAS_CONFIG_SAS_DEVICE_ENABLED 0
+#define TRACE_MPTSAS_CONFIG_SAS_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) {
+ (void)dev;
+ (void)address;
+ (void)port;
+ (void)phy_handle;
+ (void)dev_handle;
+ (void)page;
+}
+#define TRACE_MPTSAS_CONFIG_SAS_PHY 0
+#define TRACE_MPTSAS_CONFIG_SAS_PHY_ENABLED 0
+#define TRACE_MPTSAS_CONFIG_SAS_PHY_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) {
+ (void)dev;
+ (void)address;
+ (void)port;
+ (void)phy_handle;
+ (void)dev_handle;
+ (void)page;
+}
+#define TRACE_MPTSAS_DIAG_READ 0
+#define TRACE_MPTSAS_DIAG_READ_ENABLED 0
+#define TRACE_MPTSAS_DIAG_READ_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) {
+ (void)dev;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MPTSAS_DIAG_WRITE 0
+#define TRACE_MPTSAS_DIAG_WRITE_ENABLED 0
+#define TRACE_MPTSAS_DIAG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) {
+ (void)dev;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MPTSAS_IRQ_INTX 0
+#define TRACE_MPTSAS_IRQ_INTX_ENABLED 0
+#define TRACE_MPTSAS_IRQ_INTX_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_irq_intx(void *dev, int level) {
+ (void)dev;
+ (void)level;
+}
+#define TRACE_MPTSAS_IRQ_MSI 0
+#define TRACE_MPTSAS_IRQ_MSI_ENABLED 0
+#define TRACE_MPTSAS_IRQ_MSI_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_irq_msi(void *dev) {
+ (void)dev;
+}
+#define TRACE_MPTSAS_MMIO_READ 0
+#define TRACE_MPTSAS_MMIO_READ_ENABLED 0
+#define TRACE_MPTSAS_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) {
+ (void)dev;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MPTSAS_MMIO_UNHANDLED_READ 0
+#define TRACE_MPTSAS_MMIO_UNHANDLED_READ_ENABLED 0
+#define TRACE_MPTSAS_MMIO_UNHANDLED_READ_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_mmio_unhandled_read(void *dev, uint32_t addr) {
+ (void)dev;
+ (void)addr;
+}
+#define TRACE_MPTSAS_MMIO_UNHANDLED_WRITE 0
+#define TRACE_MPTSAS_MMIO_UNHANDLED_WRITE_ENABLED 0
+#define TRACE_MPTSAS_MMIO_UNHANDLED_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) {
+ (void)dev;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MPTSAS_MMIO_WRITE 0
+#define TRACE_MPTSAS_MMIO_WRITE_ENABLED 0
+#define TRACE_MPTSAS_MMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) {
+ (void)dev;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_MPTSAS_PROCESS_MESSAGE 0
+#define TRACE_MPTSAS_PROCESS_MESSAGE_ENABLED 0
+#define TRACE_MPTSAS_PROCESS_MESSAGE_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_process_message(void *dev, int msg, uint32_t ctx) {
+ (void)dev;
+ (void)msg;
+ (void)ctx;
+}
+#define TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST 0
+#define TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST_ENABLED 0
+#define TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, uint64_t len) {
+ (void)dev;
+ (void)bus;
+ (void)target;
+ (void)lun;
+ (void)len;
+}
+#define TRACE_MPTSAS_RESET 0
+#define TRACE_MPTSAS_RESET_ENABLED 0
+#define TRACE_MPTSAS_RESET_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_reset(void *dev) {
+ (void)dev;
+}
+#define TRACE_MPTSAS_SCSI_OVERFLOW 0
+#define TRACE_MPTSAS_SCSI_OVERFLOW_ENABLED 0
+#define TRACE_MPTSAS_SCSI_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) {
+ (void)dev;
+ (void)ctx;
+ (void)req;
+ (void)found;
+}
+#define TRACE_MPTSAS_SGL_OVERFLOW 0
+#define TRACE_MPTSAS_SGL_OVERFLOW_ENABLED 0
+#define TRACE_MPTSAS_SGL_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) {
+ (void)dev;
+ (void)ctx;
+ (void)req;
+ (void)found;
+}
+#define TRACE_MPTSAS_UNHANDLED_CMD 0
+#define TRACE_MPTSAS_UNHANDLED_CMD_ENABLED 0
+#define TRACE_MPTSAS_UNHANDLED_CMD_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) {
+ (void)dev;
+ (void)ctx;
+ (void)msg_cmd;
+}
+#define TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD 0
+#define TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD_ENABLED 0
+#define TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD_BACKEND_DSTATE() (0)
+static inline void trace_mptsas_unhandled_doorbell_cmd(void *dev, int cmd) {
+ (void)dev;
+ (void)cmd;
+}
+#define TRACE_NCR710_BAD_SELECTION 0
+#define TRACE_NCR710_BAD_SELECTION_ENABLED 0
+#define TRACE_NCR710_BAD_SELECTION_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_bad_selection(uint32_t target) {
+ (void)target;
+}
+#define TRACE_NCR710_COMMAND_COMPLETE 0
+#define TRACE_NCR710_COMMAND_COMPLETE_ENABLED 0
+#define TRACE_NCR710_COMMAND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_command_complete(uint32_t tag, uint8_t status) {
+ (void)tag;
+ (void)status;
+}
+#define TRACE_NCR710_DEVICE_REALIZE 0
+#define TRACE_NCR710_DEVICE_REALIZE_ENABLED 0
+#define TRACE_NCR710_DEVICE_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_device_realize(void) {
+}
+#define TRACE_NCR710_DISCONNECT 0
+#define TRACE_NCR710_DISCONNECT_ENABLED 0
+#define TRACE_NCR710_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_disconnect(uint8_t waiting) {
+ (void)waiting;
+}
+#define TRACE_NCR710_PARITY_SENSE_CHANGED 0
+#define TRACE_NCR710_PARITY_SENSE_CHANGED_ENABLED 0
+#define TRACE_NCR710_PARITY_SENSE_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_parity_sense_changed(const char *parity) {
+ (void)parity;
+}
+#define TRACE_NCR710_REG_READ 0
+#define TRACE_NCR710_REG_READ_ENABLED 0
+#define TRACE_NCR710_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_reg_read(const char *name, int offset, uint8_t ret) {
+ (void)name;
+ (void)offset;
+ (void)ret;
+}
+#define TRACE_NCR710_REG_WRITE 0
+#define TRACE_NCR710_REG_WRITE_ENABLED 0
+#define TRACE_NCR710_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_reg_write(const char *name, int offset, uint8_t val) {
+ (void)name;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_NCR710_RESET 0
+#define TRACE_NCR710_RESET_ENABLED 0
+#define TRACE_NCR710_RESET_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_reset(void) {
+}
+#define TRACE_NCR710_SCRIPT_DMA_INTERRUPT 0
+#define TRACE_NCR710_SCRIPT_DMA_INTERRUPT_ENABLED 0
+#define TRACE_NCR710_SCRIPT_DMA_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_script_dma_interrupt(uint8_t stat, uint8_t dstat) {
+ (void)stat;
+ (void)dstat;
+}
+#define TRACE_NCR710_SCRIPT_SCSI_INTERRUPT 0
+#define TRACE_NCR710_SCRIPT_SCSI_INTERRUPT_ENABLED 0
+#define TRACE_NCR710_SCRIPT_SCSI_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_ncr710_script_scsi_interrupt(uint8_t stat0, uint8_t sstat0) {
+ (void)stat0;
+ (void)sstat0;
+}
+#define TRACE_PVSCSI_CMP_RING_PUT 0
+#define TRACE_PVSCSI_CMP_RING_PUT_ENABLED 0
+#define TRACE_PVSCSI_CMP_RING_PUT_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_cmp_ring_put(unsigned long addr) {
+ (void)addr;
+}
+#define TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN 0
+#define TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN_ENABLED 0
+#define TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_command_complete_data_run(void) {
+}
+#define TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND 0
+#define TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND_ENABLED 0
+#define TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_command_complete_not_found(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN 0
+#define TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN_ENABLED 0
+#define TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_command_complete_sense_len(int len) {
+ (void)len;
+}
+#define TRACE_PVSCSI_COMPLETE_REQUEST 0
+#define TRACE_PVSCSI_COMPLETE_REQUEST_ENABLED 0
+#define TRACE_PVSCSI_COMPLETE_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) {
+ (void)context;
+ (void)len;
+ (void)sense_key;
+}
+#define TRACE_PVSCSI_CONVERT_SGLIST 0
+#define TRACE_PVSCSI_CONVERT_SGLIST_ENABLED 0
+#define TRACE_PVSCSI_CONVERT_SGLIST_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) {
+ (void)context;
+ (void)addr;
+ (void)resid;
+}
+#define TRACE_PVSCSI_GET_NEXT_SG_ELEM 0
+#define TRACE_PVSCSI_GET_NEXT_SG_ELEM_ENABLED 0
+#define TRACE_PVSCSI_GET_NEXT_SG_ELEM_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_get_next_sg_elem(uint32_t flags) {
+ (void)flags;
+}
+#define TRACE_PVSCSI_GET_SG_LIST 0
+#define TRACE_PVSCSI_GET_SG_LIST_ENABLED 0
+#define TRACE_PVSCSI_GET_SG_LIST_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_get_sg_list(int nsg, size_t size) {
+ (void)nsg;
+ (void)size;
+}
+#define TRACE_PVSCSI_INIT_MSI_FAIL 0
+#define TRACE_PVSCSI_INIT_MSI_FAIL_ENABLED 0
+#define TRACE_PVSCSI_INIT_MSI_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_init_msi_fail(int res) {
+ (void)res;
+}
+#define TRACE_PVSCSI_IO_READ 0
+#define TRACE_PVSCSI_IO_READ_ENABLED 0
+#define TRACE_PVSCSI_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_io_read(const char* cmd, uint64_t status) {
+ (void)cmd;
+ (void)status;
+}
+#define TRACE_PVSCSI_IO_READ_UNKNOWN 0
+#define TRACE_PVSCSI_IO_READ_UNKNOWN_ENABLED 0
+#define TRACE_PVSCSI_IO_READ_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_io_read_unknown(unsigned long addr, unsigned sz) {
+ (void)addr;
+ (void)sz;
+}
+#define TRACE_PVSCSI_IO_WRITE 0
+#define TRACE_PVSCSI_IO_WRITE_ENABLED 0
+#define TRACE_PVSCSI_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_io_write(const char* cmd, uint64_t val) {
+ (void)cmd;
+ (void)val;
+}
+#define TRACE_PVSCSI_IO_WRITE_UNKNOWN 0
+#define TRACE_PVSCSI_IO_WRITE_UNKNOWN_ENABLED 0
+#define TRACE_PVSCSI_IO_WRITE_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) {
+ (void)addr;
+ (void)sz;
+ (void)val;
+}
+#define TRACE_PVSCSI_MSG_RING_PUT 0
+#define TRACE_PVSCSI_MSG_RING_PUT_ENABLED 0
+#define TRACE_PVSCSI_MSG_RING_PUT_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_msg_ring_put(unsigned long addr) {
+ (void)addr;
+}
+#define TRACE_PVSCSI_ON_CMD_ABORT 0
+#define TRACE_PVSCSI_ON_CMD_ABORT_ENABLED 0
+#define TRACE_PVSCSI_ON_CMD_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) {
+ (void)ctx;
+ (void)tgt;
+}
+#define TRACE_PVSCSI_ON_CMD_ARRIVED 0
+#define TRACE_PVSCSI_ON_CMD_ARRIVED_ENABLED 0
+#define TRACE_PVSCSI_ON_CMD_ARRIVED_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_on_cmd_arrived(const char* cmd) {
+ (void)cmd;
+}
+#define TRACE_PVSCSI_ON_CMD_NOIMPL 0
+#define TRACE_PVSCSI_ON_CMD_NOIMPL_ENABLED 0
+#define TRACE_PVSCSI_ON_CMD_NOIMPL_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_on_cmd_noimpl(const char* cmd) {
+ (void)cmd;
+}
+#define TRACE_PVSCSI_ON_CMD_RESET_DEV 0
+#define TRACE_PVSCSI_ON_CMD_RESET_DEV_ENABLED 0
+#define TRACE_PVSCSI_ON_CMD_RESET_DEV_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) {
+ (void)tgt;
+ (void)lun;
+ (void)dev;
+}
+#define TRACE_PVSCSI_ON_CMD_UNKNOWN 0
+#define TRACE_PVSCSI_ON_CMD_UNKNOWN_ENABLED 0
+#define TRACE_PVSCSI_ON_CMD_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_on_cmd_unknown(uint64_t cmd_id) {
+ (void)cmd_id;
+}
+#define TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA 0
+#define TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA_ENABLED 0
+#define TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_on_cmd_unknown_data(uint32_t data) {
+ (void)data;
+}
+#define TRACE_PVSCSI_PROCESS_IO 0
+#define TRACE_PVSCSI_PROCESS_IO_ENABLED 0
+#define TRACE_PVSCSI_PROCESS_IO_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_process_io(unsigned long addr) {
+ (void)addr;
+}
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR 0
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_ENABLED 0
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) {
+ (void)cmd;
+ (void)ctx;
+}
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR 0
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR_ENABLED 0
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_process_req_descr_invalid_dir(void) {
+}
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE 0
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE_ENABLED 0
+#define TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_process_req_descr_unknown_device(void) {
+}
+#define TRACE_PVSCSI_RING_FLUSH_CMP 0
+#define TRACE_PVSCSI_RING_FLUSH_CMP_ENABLED 0
+#define TRACE_PVSCSI_RING_FLUSH_CMP_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) {
+ (void)filled_cmp_ptr;
+}
+#define TRACE_PVSCSI_RING_FLUSH_MSG 0
+#define TRACE_PVSCSI_RING_FLUSH_MSG_ENABLED 0
+#define TRACE_PVSCSI_RING_FLUSH_MSG_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) {
+ (void)filled_cmp_ptr;
+}
+#define TRACE_PVSCSI_RING_INIT_DATA 0
+#define TRACE_PVSCSI_RING_INIT_DATA_ENABLED 0
+#define TRACE_PVSCSI_RING_INIT_DATA_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) {
+ (void)txr_len_log2;
+ (void)rxr_len_log2;
+}
+#define TRACE_PVSCSI_RING_INIT_MSG 0
+#define TRACE_PVSCSI_RING_INIT_MSG_ENABLED 0
+#define TRACE_PVSCSI_RING_INIT_MSG_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_ring_init_msg(uint32_t len_log2) {
+ (void)len_log2;
+}
+#define TRACE_PVSCSI_STATE 0
+#define TRACE_PVSCSI_STATE_ENABLED 0
+#define TRACE_PVSCSI_STATE_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_state(const char* state) {
+ (void)state;
+}
+#define TRACE_PVSCSI_TX_RINGS_NUM_PAGES 0
+#define TRACE_PVSCSI_TX_RINGS_NUM_PAGES_ENABLED 0
+#define TRACE_PVSCSI_TX_RINGS_NUM_PAGES_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_tx_rings_num_pages(const char* label, uint32_t num) {
+ (void)label;
+ (void)num;
+}
+#define TRACE_PVSCSI_TX_RINGS_PPN 0
+#define TRACE_PVSCSI_TX_RINGS_PPN_ENABLED 0
+#define TRACE_PVSCSI_TX_RINGS_PPN_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) {
+ (void)label;
+ (void)ppn;
+}
+#define TRACE_PVSCSI_UPDATE_IRQ_LEVEL 0
+#define TRACE_PVSCSI_UPDATE_IRQ_LEVEL_ENABLED 0
+#define TRACE_PVSCSI_UPDATE_IRQ_LEVEL_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) {
+ (void)raise;
+ (void)mask;
+ (void)status;
+}
+#define TRACE_PVSCSI_UPDATE_IRQ_MSI 0
+#define TRACE_PVSCSI_UPDATE_IRQ_MSI_ENABLED 0
+#define TRACE_PVSCSI_UPDATE_IRQ_MSI_BACKEND_DSTATE() (0)
+static inline void trace_pvscsi_update_irq_msi(void) {
+}
+#define TRACE_SCSI_BUS_DRAINED_BEGIN 0
+#define TRACE_SCSI_BUS_DRAINED_BEGIN_ENABLED 0
+#define TRACE_SCSI_BUS_DRAINED_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_scsi_bus_drained_begin(void *bus, void *sdev) {
+ (void)bus;
+ (void)sdev;
+}
+#define TRACE_SCSI_BUS_DRAINED_END 0
+#define TRACE_SCSI_BUS_DRAINED_END_ENABLED 0
+#define TRACE_SCSI_BUS_DRAINED_END_BACKEND_DSTATE() (0)
+static inline void trace_scsi_bus_drained_end(void *bus, void *sdev) {
+ (void)bus;
+ (void)sdev;
+}
+#define TRACE_SCSI_DEVICE_SET_UA 0
+#define TRACE_SCSI_DEVICE_SET_UA_ENABLED 0
+#define TRACE_SCSI_DEVICE_SET_UA_BACKEND_DSTATE() (0)
+static inline void trace_scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) {
+ (void)target;
+ (void)lun;
+ (void)key;
+ (void)asc;
+ (void)ascq;
+}
+#define TRACE_SCSI_DISK_AIO_SGIO_COMMAND 0
+#define TRACE_SCSI_DISK_AIO_SGIO_COMMAND_ENABLED 0
+#define TRACE_SCSI_DISK_AIO_SGIO_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_aio_sgio_command(uint32_t tag, uint8_t cmd, uint64_t lba, int len, uint32_t timeout) {
+ (void)tag;
+ (void)cmd;
+ (void)lba;
+ (void)len;
+ (void)timeout;
+}
+#define TRACE_SCSI_DISK_CHECK_CONDITION 0
+#define TRACE_SCSI_DISK_CHECK_CONDITION_ENABLED 0
+#define TRACE_SCSI_DISK_CHECK_CONDITION_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) {
+ (void)tag;
+ (void)key;
+ (void)asc;
+ (void)ascq;
+}
+#define TRACE_SCSI_DISK_DMA_COMMAND_READ 0
+#define TRACE_SCSI_DISK_DMA_COMMAND_READ_ENABLED 0
+#define TRACE_SCSI_DISK_DMA_COMMAND_READ_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) {
+ (void)lba;
+ (void)len;
+}
+#define TRACE_SCSI_DISK_DMA_COMMAND_WRITE 0
+#define TRACE_SCSI_DISK_DMA_COMMAND_WRITE_ENABLED 0
+#define TRACE_SCSI_DISK_DMA_COMMAND_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_dma_command_WRITE(const char *cmd, uint64_t lba, int len) {
+ (void)cmd;
+ (void)lba;
+ (void)len;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_FORMAT_UNIT 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_FORMAT_UNIT_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_FORMAT_UNIT_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_FORMAT_UNIT(size_t xfer) {
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_MODE_SELECT(size_t xfer) {
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_MODE_SELECT_10(size_t xfer) {
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_SAI_16(void) {
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_SAI_unsupported(void) {
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_SEEK_10(uint64_t lba) {
+ (void)lba;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_UNKNOWN(int cmd, const char *name) {
+ (void)cmd;
+ (void)name;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_UNMAP(size_t xfer) {
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_VERIFY(int bytchk) {
+ (void)bytchk;
+}
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_command_WRITE_SAME(int cmd, size_t xfer) {
+ (void)cmd;
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_MODE_SENSE 0
+#define TRACE_SCSI_DISK_EMULATE_MODE_SENSE_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_MODE_SENSE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_mode_sense(int cmd, int page, size_t xfer, int control) {
+ (void)cmd;
+ (void)page;
+ (void)xfer;
+ (void)control;
+}
+#define TRACE_SCSI_DISK_EMULATE_READ_DATA 0
+#define TRACE_SCSI_DISK_EMULATE_READ_DATA_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_read_data(int buflen) {
+ (void)buflen;
+}
+#define TRACE_SCSI_DISK_EMULATE_READ_TOC 0
+#define TRACE_SCSI_DISK_EMULATE_READ_TOC_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_READ_TOC_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_read_toc(int start_track, int format, int msf) {
+ (void)start_track;
+ (void)format;
+ (void)msf;
+}
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_vpd_page_00(size_t xfer) {
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_vpd_page_80(size_t xfer) {
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_vpd_page_80_not_supported(void) {
+}
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_vpd_page_83(size_t xfer) {
+ (void)xfer;
+}
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_vpd_page_b0_not_supported(void) {
+}
+#define TRACE_SCSI_DISK_EMULATE_WRITE_DATA 0
+#define TRACE_SCSI_DISK_EMULATE_WRITE_DATA_ENABLED 0
+#define TRACE_SCSI_DISK_EMULATE_WRITE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_emulate_write_data(int buflen) {
+ (void)buflen;
+}
+#define TRACE_SCSI_DISK_MODE_SELECT_PAGE_TRUNCATED 0
+#define TRACE_SCSI_DISK_MODE_SELECT_PAGE_TRUNCATED_ENABLED 0
+#define TRACE_SCSI_DISK_MODE_SELECT_PAGE_TRUNCATED_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_mode_select_page_truncated(int page, int len, int page_len) {
+ (void)page;
+ (void)len;
+ (void)page_len;
+}
+#define TRACE_SCSI_DISK_MODE_SELECT_SET_BLOCKSIZE 0
+#define TRACE_SCSI_DISK_MODE_SELECT_SET_BLOCKSIZE_ENABLED 0
+#define TRACE_SCSI_DISK_MODE_SELECT_SET_BLOCKSIZE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_mode_select_set_blocksize(int blocksize) {
+ (void)blocksize;
+}
+#define TRACE_SCSI_DISK_NEW_REQUEST 0
+#define TRACE_SCSI_DISK_NEW_REQUEST_ENABLED 0
+#define TRACE_SCSI_DISK_NEW_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_new_request(uint32_t lun, uint32_t tag, const char *line) {
+ (void)lun;
+ (void)tag;
+ (void)line;
+}
+#define TRACE_SCSI_DISK_READ_COMPLETE 0
+#define TRACE_SCSI_DISK_READ_COMPLETE_ENABLED 0
+#define TRACE_SCSI_DISK_READ_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_read_complete(uint32_t tag, size_t size) {
+ (void)tag;
+ (void)size;
+}
+#define TRACE_SCSI_DISK_READ_DATA_COUNT 0
+#define TRACE_SCSI_DISK_READ_DATA_COUNT_ENABLED 0
+#define TRACE_SCSI_DISK_READ_DATA_COUNT_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_read_data_count(uint32_t sector_count) {
+ (void)sector_count;
+}
+#define TRACE_SCSI_DISK_READ_DATA_INVALID 0
+#define TRACE_SCSI_DISK_READ_DATA_INVALID_ENABLED 0
+#define TRACE_SCSI_DISK_READ_DATA_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_read_data_invalid(void) {
+}
+#define TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO 0
+#define TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO_ENABLED 0
+#define TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_write_complete_noio(uint32_t tag, size_t size) {
+ (void)tag;
+ (void)size;
+}
+#define TRACE_SCSI_DISK_WRITE_DATA_INVALID 0
+#define TRACE_SCSI_DISK_WRITE_DATA_INVALID_ENABLED 0
+#define TRACE_SCSI_DISK_WRITE_DATA_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_scsi_disk_write_data_invalid(void) {
+}
+#define TRACE_SCSI_GENERIC_AIO_SGIO_COMMAND 0
+#define TRACE_SCSI_GENERIC_AIO_SGIO_COMMAND_ENABLED 0
+#define TRACE_SCSI_GENERIC_AIO_SGIO_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_aio_sgio_command(uint32_t tag, uint8_t cmd, uint32_t timeout) {
+ (void)tag;
+ (void)cmd;
+ (void)timeout;
+}
+#define TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO 0
+#define TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO_ENABLED 0
+#define TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_command_complete_noio(void *req, uint32_t tag, int statuc) {
+ (void)req;
+ (void)tag;
+ (void)statuc;
+}
+#define TRACE_SCSI_GENERIC_IOCTL_SGIO_COMMAND 0
+#define TRACE_SCSI_GENERIC_IOCTL_SGIO_COMMAND_ENABLED 0
+#define TRACE_SCSI_GENERIC_IOCTL_SGIO_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_ioctl_sgio_command(uint8_t cmd, uint32_t timeout) {
+ (void)cmd;
+ (void)timeout;
+}
+#define TRACE_SCSI_GENERIC_IOCTL_SGIO_DONE 0
+#define TRACE_SCSI_GENERIC_IOCTL_SGIO_DONE_ENABLED 0
+#define TRACE_SCSI_GENERIC_IOCTL_SGIO_DONE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_ioctl_sgio_done(uint8_t cmd, int ret, uint8_t status, uint8_t host_status) {
+ (void)cmd;
+ (void)ret;
+ (void)status;
+ (void)host_status;
+}
+#define TRACE_SCSI_GENERIC_READ_COMPLETE 0
+#define TRACE_SCSI_GENERIC_READ_COMPLETE_ENABLED 0
+#define TRACE_SCSI_GENERIC_READ_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_read_complete(uint32_t tag, int len) {
+ (void)tag;
+ (void)len;
+}
+#define TRACE_SCSI_GENERIC_READ_DATA 0
+#define TRACE_SCSI_GENERIC_READ_DATA_ENABLED 0
+#define TRACE_SCSI_GENERIC_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_read_data(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE 0
+#define TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE_ENABLED 0
+#define TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_realize_blocksize(int blocksize) {
+ (void)blocksize;
+}
+#define TRACE_SCSI_GENERIC_REALIZE_TYPE 0
+#define TRACE_SCSI_GENERIC_REALIZE_TYPE_ENABLED 0
+#define TRACE_SCSI_GENERIC_REALIZE_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_realize_type(int type) {
+ (void)type;
+}
+#define TRACE_SCSI_GENERIC_SEND_COMMAND 0
+#define TRACE_SCSI_GENERIC_SEND_COMMAND_ENABLED 0
+#define TRACE_SCSI_GENERIC_SEND_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_send_command(const char *line) {
+ (void)line;
+}
+#define TRACE_SCSI_GENERIC_WRITE_COMPLETE 0
+#define TRACE_SCSI_GENERIC_WRITE_COMPLETE_ENABLED 0
+#define TRACE_SCSI_GENERIC_WRITE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_write_complete(int ret) {
+ (void)ret;
+}
+#define TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE 0
+#define TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE_ENABLED 0
+#define TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_write_complete_blocksize(int blocksize) {
+ (void)blocksize;
+}
+#define TRACE_SCSI_GENERIC_WRITE_DATA 0
+#define TRACE_SCSI_GENERIC_WRITE_DATA_ENABLED 0
+#define TRACE_SCSI_GENERIC_WRITE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_scsi_generic_write_data(uint32_t tag) {
+ (void)tag;
+}
+#define TRACE_SCSI_INQUIRY 0
+#define TRACE_SCSI_INQUIRY_ENABLED 0
+#define TRACE_SCSI_INQUIRY_BACKEND_DSTATE() (0)
+static inline void trace_scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+ (void)cdb1;
+ (void)cdb2;
+}
+#define TRACE_SCSI_REPORT_LUNS 0
+#define TRACE_SCSI_REPORT_LUNS_ENABLED 0
+#define TRACE_SCSI_REPORT_LUNS_BACKEND_DSTATE() (0)
+static inline void trace_scsi_report_luns(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SCSI_REQ_ALLOC 0
+#define TRACE_SCSI_REQ_ALLOC_ENABLED 0
+#define TRACE_SCSI_REQ_ALLOC_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_alloc(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SCSI_REQ_BUILD_SENSE 0
+#define TRACE_SCSI_REQ_BUILD_SENSE_ENABLED 0
+#define TRACE_SCSI_REQ_BUILD_SENSE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+ (void)key;
+ (void)asc;
+ (void)ascq;
+}
+#define TRACE_SCSI_REQ_CANCEL 0
+#define TRACE_SCSI_REQ_CANCEL_ENABLED 0
+#define TRACE_SCSI_REQ_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_cancel(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SCSI_REQ_CONTINUE 0
+#define TRACE_SCSI_REQ_CONTINUE_ENABLED 0
+#define TRACE_SCSI_REQ_CONTINUE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_continue(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SCSI_REQ_CONTINUE_CANCELED 0
+#define TRACE_SCSI_REQ_CONTINUE_CANCELED_ENABLED 0
+#define TRACE_SCSI_REQ_CONTINUE_CANCELED_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_continue_canceled(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SCSI_REQ_DATA 0
+#define TRACE_SCSI_REQ_DATA_ENABLED 0
+#define TRACE_SCSI_REQ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_data(int target, int lun, int tag, int len) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+ (void)len;
+}
+#define TRACE_SCSI_REQ_DATA_CANCELED 0
+#define TRACE_SCSI_REQ_DATA_CANCELED_ENABLED 0
+#define TRACE_SCSI_REQ_DATA_CANCELED_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_data_canceled(int target, int lun, int tag, int len) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+ (void)len;
+}
+#define TRACE_SCSI_REQ_DEQUEUE 0
+#define TRACE_SCSI_REQ_DEQUEUE_ENABLED 0
+#define TRACE_SCSI_REQ_DEQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_dequeue(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SCSI_REQ_PARSE_BAD 0
+#define TRACE_SCSI_REQ_PARSE_BAD_ENABLED 0
+#define TRACE_SCSI_REQ_PARSE_BAD_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_parse_bad(int target, int lun, int tag, int cmd) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+ (void)cmd;
+}
+#define TRACE_SCSI_REQ_PARSED 0
+#define TRACE_SCSI_REQ_PARSED_ENABLED 0
+#define TRACE_SCSI_REQ_PARSED_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+ (void)cmd;
+ (void)mode;
+ (void)xfer;
+}
+#define TRACE_SCSI_REQ_PARSED_LBA 0
+#define TRACE_SCSI_REQ_PARSED_LBA_ENABLED 0
+#define TRACE_SCSI_REQ_PARSED_LBA_BACKEND_DSTATE() (0)
+static inline void trace_scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+ (void)cmd;
+ (void)lba;
+}
+#define TRACE_SCSI_REQUEST_SENSE 0
+#define TRACE_SCSI_REQUEST_SENSE_ENABLED 0
+#define TRACE_SCSI_REQUEST_SENSE_BACKEND_DSTATE() (0)
+static inline void trace_scsi_request_sense(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SCSI_TEST_UNIT_READY 0
+#define TRACE_SCSI_TEST_UNIT_READY_ENABLED 0
+#define TRACE_SCSI_TEST_UNIT_READY_BACKEND_DSTATE() (0)
+static inline void trace_scsi_test_unit_ready(int target, int lun, int tag) {
+ (void)target;
+ (void)lun;
+ (void)tag;
+}
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_ENABLED 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_command_complete(uint32_t tag, uint32_t status, void *req) {
+ (void)tag;
+ (void)status;
+ (void)req;
+}
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1_ENABLED 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_command_complete_sense_data1(uint32_t len, unsigned s0, unsigned s1, unsigned s2, unsigned s3, unsigned s4, unsigned s5, unsigned s6, unsigned s7) {
+ (void)len;
+ (void)s0;
+ (void)s1;
+ (void)s2;
+ (void)s3;
+ (void)s4;
+ (void)s5;
+ (void)s6;
+ (void)s7;
+}
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2_ENABLED 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_command_complete_sense_data2(unsigned s8, unsigned s9, unsigned s10, unsigned s11, unsigned s12, unsigned s13, unsigned s14, unsigned s15) {
+ (void)s8;
+ (void)s9;
+ (void)s10;
+ (void)s11;
+ (void)s12;
+ (void)s13;
+ (void)s14;
+ (void)s15;
+}
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS_ENABLED 0
+#define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_command_complete_status(uint32_t status) {
+ (void)status;
+}
+#define TRACE_SPAPR_VSCSI_DO_CRQ 0
+#define TRACE_SPAPR_VSCSI_DO_CRQ_ENABLED 0
+#define TRACE_SPAPR_VSCSI_DO_CRQ_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_do_crq(unsigned c0, unsigned c1) {
+ (void)c0;
+ (void)c1;
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_direct(void) {
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_dma_read_error(int rc) {
+ (void)rc;
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DONE 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DONE_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_DONE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_done(unsigned desc_num, unsigned desc_offset, uint64_t va, uint32_t len) {
+ (void)desc_num;
+ (void)desc_offset;
+ (void)va;
+ (void)len;
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_indirect(uint32_t qtag, unsigned desc, unsigned local_desc) {
+ (void)qtag;
+ (void)desc;
+ (void)local_desc;
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_indirect_seg_ext(uint32_t qtag, unsigned n, unsigned desc, uint64_t va, uint32_t len) {
+ (void)qtag;
+ (void)n;
+ (void)desc;
+ (void)va;
+ (void)len;
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_no_data(void) {
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_out_of_desc(void) {
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_out_of_desc_boundary(unsigned offset, unsigned desc, uint32_t len) {
+ (void)offset;
+ (void)desc;
+ (void)len;
+}
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE_ENABLED 0
+#define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_fetch_desc_out_of_range(unsigned desc, unsigned desc_offset) {
+ (void)desc;
+ (void)desc_offset;
+}
+#define TRACE_SPAPR_VSCSI_LOAD_REQUEST 0
+#define TRACE_SPAPR_VSCSI_LOAD_REQUEST_ENABLED 0
+#define TRACE_SPAPR_VSCSI_LOAD_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_load_request(uint32_t qtag, unsigned desc, unsigned offset) {
+ (void)qtag;
+ (void)desc;
+ (void)offset;
+}
+#define TRACE_SPAPR_VSCSI_PROCESS_LOGIN 0
+#define TRACE_SPAPR_VSCSI_PROCESS_LOGIN_ENABLED 0
+#define TRACE_SPAPR_VSCSI_PROCESS_LOGIN_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_process_login(void) {
+}
+#define TRACE_SPAPR_VSCSI_PROCESS_TSK_MGMT 0
+#define TRACE_SPAPR_VSCSI_PROCESS_TSK_MGMT_ENABLED 0
+#define TRACE_SPAPR_VSCSI_PROCESS_TSK_MGMT_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_process_tsk_mgmt(uint8_t func) {
+ (void)func;
+}
+#define TRACE_SPAPR_VSCSI_QUEUE_CMD 0
+#define TRACE_SPAPR_VSCSI_QUEUE_CMD_ENABLED 0
+#define TRACE_SPAPR_VSCSI_QUEUE_CMD_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char *cmd, int lun, int ret) {
+ (void)qtag;
+ (void)cdb;
+ (void)cmd;
+ (void)lun;
+ (void)ret;
+}
+#define TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE 0
+#define TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE_ENABLED 0
+#define TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_queue_cmd_no_drive(uint64_t lun) {
+ (void)lun;
+}
+#define TRACE_SPAPR_VSCSI_SAVE_REQUEST 0
+#define TRACE_SPAPR_VSCSI_SAVE_REQUEST_ENABLED 0
+#define TRACE_SPAPR_VSCSI_SAVE_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_save_request(uint32_t qtag, unsigned desc, unsigned offset) {
+ (void)qtag;
+ (void)desc;
+ (void)offset;
+}
+#define TRACE_SPAPR_VSCSI_SEND_RSP 0
+#define TRACE_SPAPR_VSCSI_SEND_RSP_ENABLED 0
+#define TRACE_SPAPR_VSCSI_SEND_RSP_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) {
+ (void)status;
+ (void)res_in;
+ (void)res_out;
+}
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA 0
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_ENABLED 0
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_srp_indirect_data(uint32_t len) {
+ (void)len;
+}
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF 0
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF_ENABLED 0
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_srp_indirect_data_buf(unsigned a, unsigned b, unsigned c, unsigned d) {
+ (void)a;
+ (void)b;
+ (void)c;
+ (void)d;
+}
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW 0
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW_ENABLED 0
+#define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_srp_indirect_data_rw(int writing, int rc) {
+ (void)writing;
+ (void)rc;
+}
+#define TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA 0
+#define TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA_ENABLED 0
+#define TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_srp_transfer_data(uint32_t len) {
+ (void)len;
+}
+#define TRACE_SPAPR_VSCSI_TRANSFER_DATA 0
+#define TRACE_SPAPR_VSCSI_TRANSFER_DATA_ENABLED 0
+#define TRACE_SPAPR_VSCSI_TRANSFER_DATA_BACKEND_DSTATE() (0)
+static inline void trace_spapr_vscsi_transfer_data(uint32_t tag, uint32_t len, void *req) {
+ (void)tag;
+ (void)len;
+ (void)req;
+}
+#define TRACE_VIRTIO_SCSI_AN_REQ 0
+#define TRACE_VIRTIO_SCSI_AN_REQ_ENABLED 0
+#define TRACE_VIRTIO_SCSI_AN_REQ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_scsi_an_req(int lun, uint32_t event_requested) {
+ (void)lun;
+ (void)event_requested;
+}
+#define TRACE_VIRTIO_SCSI_AN_RESP 0
+#define TRACE_VIRTIO_SCSI_AN_RESP_ENABLED 0
+#define TRACE_VIRTIO_SCSI_AN_RESP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_scsi_an_resp(int lun, int response) {
+ (void)lun;
+ (void)response;
+}
+#define TRACE_VIRTIO_SCSI_CMD_REQ 0
+#define TRACE_VIRTIO_SCSI_CMD_REQ_ENABLED 0
+#define TRACE_VIRTIO_SCSI_CMD_REQ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_scsi_cmd_req(int lun, uint32_t tag, uint8_t cmd) {
+ (void)lun;
+ (void)tag;
+ (void)cmd;
+}
+#define TRACE_VIRTIO_SCSI_CMD_RESP 0
+#define TRACE_VIRTIO_SCSI_CMD_RESP_ENABLED 0
+#define TRACE_VIRTIO_SCSI_CMD_RESP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_scsi_cmd_resp(int lun, uint32_t tag, int response, uint8_t status) {
+ (void)lun;
+ (void)tag;
+ (void)response;
+ (void)status;
+}
+#define TRACE_VIRTIO_SCSI_EVENT 0
+#define TRACE_VIRTIO_SCSI_EVENT_ENABLED 0
+#define TRACE_VIRTIO_SCSI_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_scsi_event(int lun, int event, int reason) {
+ (void)lun;
+ (void)event;
+ (void)reason;
+}
+#define TRACE_VIRTIO_SCSI_TMF_REQ 0
+#define TRACE_VIRTIO_SCSI_TMF_REQ_ENABLED 0
+#define TRACE_VIRTIO_SCSI_TMF_REQ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_scsi_tmf_req(int lun, uint32_t tag, int subtype) {
+ (void)lun;
+ (void)tag;
+ (void)subtype;
+}
+#define TRACE_VIRTIO_SCSI_TMF_RESP 0
+#define TRACE_VIRTIO_SCSI_TMF_RESP_ENABLED 0
+#define TRACE_VIRTIO_SCSI_TMF_RESP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_scsi_tmf_resp(int lun, uint32_t tag, int response) {
+ (void)lun;
+ (void)tag;
+ (void)response;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_sd.h b/trace/trace-hw_sd.h
new file mode 100644
index 0000000000..c375527b4e
--- /dev/null
+++ b/trace/trace-hw_sd.h
@@ -0,0 +1,443 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_SD_H
+#define TRACE_TRACE_HW_SD_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALLWINNER_SDHOST_PROCESS_DESC 0
+#define TRACE_ALLWINNER_SDHOST_PROCESS_DESC_ENABLED 0
+#define TRACE_ALLWINNER_SDHOST_PROCESS_DESC_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sdhost_process_desc(uint64_t desc_addr, uint32_t desc_size, bool is_write, uint32_t max_bytes) {
+ (void)desc_addr;
+ (void)desc_size;
+ (void)is_write;
+ (void)max_bytes;
+}
+#define TRACE_ALLWINNER_SDHOST_READ 0
+#define TRACE_ALLWINNER_SDHOST_READ_ENABLED 0
+#define TRACE_ALLWINNER_SDHOST_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sdhost_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_SDHOST_SET_INSERTED 0
+#define TRACE_ALLWINNER_SDHOST_SET_INSERTED_ENABLED 0
+#define TRACE_ALLWINNER_SDHOST_SET_INSERTED_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sdhost_set_inserted(bool inserted) {
+ (void)inserted;
+}
+#define TRACE_ALLWINNER_SDHOST_UPDATE_IRQ 0
+#define TRACE_ALLWINNER_SDHOST_UPDATE_IRQ_ENABLED 0
+#define TRACE_ALLWINNER_SDHOST_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sdhost_update_irq(uint32_t irq) {
+ (void)irq;
+}
+#define TRACE_ALLWINNER_SDHOST_WRITE 0
+#define TRACE_ALLWINNER_SDHOST_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_SDHOST_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_sdhost_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ASPEED_SDHCI_READ 0
+#define TRACE_ASPEED_SDHCI_READ_ENABLED 0
+#define TRACE_ASPEED_SDHCI_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sdhci_read(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_SDHCI_WRITE 0
+#define TRACE_ASPEED_SDHCI_WRITE_ENABLED 0
+#define TRACE_ASPEED_SDHCI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_sdhci_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_BCM2835_SDHOST_EDM_CHANGE 0
+#define TRACE_BCM2835_SDHOST_EDM_CHANGE_ENABLED 0
+#define TRACE_BCM2835_SDHOST_EDM_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_sdhost_edm_change(const char *why, uint32_t edm) {
+ (void)why;
+ (void)edm;
+}
+#define TRACE_BCM2835_SDHOST_READ 0
+#define TRACE_BCM2835_SDHOST_READ_ENABLED 0
+#define TRACE_BCM2835_SDHOST_READ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_BCM2835_SDHOST_UPDATE_IRQ 0
+#define TRACE_BCM2835_SDHOST_UPDATE_IRQ_ENABLED 0
+#define TRACE_BCM2835_SDHOST_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_sdhost_update_irq(uint32_t irq) {
+ (void)irq;
+}
+#define TRACE_BCM2835_SDHOST_WRITE 0
+#define TRACE_BCM2835_SDHOST_WRITE_ENABLED 0
+#define TRACE_BCM2835_SDHOST_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_PL181_COMMAND_RESPONSE_PENDING 0
+#define TRACE_PL181_COMMAND_RESPONSE_PENDING_ENABLED 0
+#define TRACE_PL181_COMMAND_RESPONSE_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_pl181_command_response_pending(void) {
+}
+#define TRACE_PL181_COMMAND_SEND 0
+#define TRACE_PL181_COMMAND_SEND_ENABLED 0
+#define TRACE_PL181_COMMAND_SEND_BACKEND_DSTATE() (0)
+static inline void trace_pl181_command_send(uint8_t cmd, uint32_t arg) {
+ (void)cmd;
+ (void)arg;
+}
+#define TRACE_PL181_COMMAND_SENT 0
+#define TRACE_PL181_COMMAND_SENT_ENABLED 0
+#define TRACE_PL181_COMMAND_SENT_BACKEND_DSTATE() (0)
+static inline void trace_pl181_command_sent(void) {
+}
+#define TRACE_PL181_COMMAND_TIMEOUT 0
+#define TRACE_PL181_COMMAND_TIMEOUT_ENABLED 0
+#define TRACE_PL181_COMMAND_TIMEOUT_BACKEND_DSTATE() (0)
+static inline void trace_pl181_command_timeout(void) {
+}
+#define TRACE_PL181_DATA_ENGINE_IDLE 0
+#define TRACE_PL181_DATA_ENGINE_IDLE_ENABLED 0
+#define TRACE_PL181_DATA_ENGINE_IDLE_BACKEND_DSTATE() (0)
+static inline void trace_pl181_data_engine_idle(void) {
+}
+#define TRACE_PL181_FIFO_POP 0
+#define TRACE_PL181_FIFO_POP_ENABLED 0
+#define TRACE_PL181_FIFO_POP_BACKEND_DSTATE() (0)
+static inline void trace_pl181_fifo_pop(uint32_t data) {
+ (void)data;
+}
+#define TRACE_PL181_FIFO_PUSH 0
+#define TRACE_PL181_FIFO_PUSH_ENABLED 0
+#define TRACE_PL181_FIFO_PUSH_BACKEND_DSTATE() (0)
+static inline void trace_pl181_fifo_push(uint32_t data) {
+ (void)data;
+}
+#define TRACE_PL181_FIFO_TRANSFER_COMPLETE 0
+#define TRACE_PL181_FIFO_TRANSFER_COMPLETE_ENABLED 0
+#define TRACE_PL181_FIFO_TRANSFER_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_pl181_fifo_transfer_complete(void) {
+}
+#define TRACE_SDBUS_COMMAND 0
+#define TRACE_SDBUS_COMMAND_ENABLED 0
+#define TRACE_SDBUS_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_sdbus_command(const char *bus_name, uint8_t cmd, uint32_t arg) {
+ (void)bus_name;
+ (void)cmd;
+ (void)arg;
+}
+#define TRACE_SDBUS_GET_CMD_LINE 0
+#define TRACE_SDBUS_GET_CMD_LINE_ENABLED 0
+#define TRACE_SDBUS_GET_CMD_LINE_BACKEND_DSTATE() (0)
+static inline void trace_sdbus_get_cmd_line(const char *bus_name, bool cmd_line) {
+ (void)bus_name;
+ (void)cmd_line;
+}
+#define TRACE_SDBUS_GET_DAT_LINES 0
+#define TRACE_SDBUS_GET_DAT_LINES_ENABLED 0
+#define TRACE_SDBUS_GET_DAT_LINES_BACKEND_DSTATE() (0)
+static inline void trace_sdbus_get_dat_lines(const char *bus_name, uint8_t dat_lines) {
+ (void)bus_name;
+ (void)dat_lines;
+}
+#define TRACE_SDBUS_READ 0
+#define TRACE_SDBUS_READ_ENABLED 0
+#define TRACE_SDBUS_READ_BACKEND_DSTATE() (0)
+static inline void trace_sdbus_read(const char *bus_name, uint8_t value) {
+ (void)bus_name;
+ (void)value;
+}
+#define TRACE_SDBUS_SET_VOLTAGE 0
+#define TRACE_SDBUS_SET_VOLTAGE_ENABLED 0
+#define TRACE_SDBUS_SET_VOLTAGE_BACKEND_DSTATE() (0)
+static inline void trace_sdbus_set_voltage(const char *bus_name, uint16_t millivolts) {
+ (void)bus_name;
+ (void)millivolts;
+}
+#define TRACE_SDBUS_WRITE 0
+#define TRACE_SDBUS_WRITE_ENABLED 0
+#define TRACE_SDBUS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sdbus_write(const char *bus_name, uint8_t value) {
+ (void)bus_name;
+ (void)value;
+}
+#define TRACE_SDCARD_APP_COMMAND 0
+#define TRACE_SDCARD_APP_COMMAND_ENABLED 0
+#define TRACE_SDCARD_APP_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_app_command(const char *proto, const char *acmd_desc, uint8_t acmd, uint32_t arg, const char *mode, const char *state) {
+ (void)proto;
+ (void)acmd_desc;
+ (void)acmd;
+ (void)arg;
+ (void)mode;
+ (void)state;
+}
+#define TRACE_SDCARD_EJECTED 0
+#define TRACE_SDCARD_EJECTED_ENABLED 0
+#define TRACE_SDCARD_EJECTED_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_ejected(void) {
+}
+#define TRACE_SDCARD_ERASE 0
+#define TRACE_SDCARD_ERASE_ENABLED 0
+#define TRACE_SDCARD_ERASE_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_erase(uint32_t first, uint32_t last) {
+ (void)first;
+ (void)last;
+}
+#define TRACE_SDCARD_EXT_CSD_UPDATE 0
+#define TRACE_SDCARD_EXT_CSD_UPDATE_ENABLED 0
+#define TRACE_SDCARD_EXT_CSD_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_ext_csd_update(unsigned index, uint8_t oval, uint8_t nval) {
+ (void)index;
+ (void)oval;
+ (void)nval;
+}
+#define TRACE_SDCARD_INQUIRY_CMD41 0
+#define TRACE_SDCARD_INQUIRY_CMD41_ENABLED 0
+#define TRACE_SDCARD_INQUIRY_CMD41_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_inquiry_cmd41(void) {
+}
+#define TRACE_SDCARD_INSERTED 0
+#define TRACE_SDCARD_INSERTED_ENABLED 0
+#define TRACE_SDCARD_INSERTED_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_inserted(bool readonly) {
+ (void)readonly;
+}
+#define TRACE_SDCARD_LOCK 0
+#define TRACE_SDCARD_LOCK_ENABLED 0
+#define TRACE_SDCARD_LOCK_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_lock(void) {
+}
+#define TRACE_SDCARD_NORMAL_COMMAND 0
+#define TRACE_SDCARD_NORMAL_COMMAND_ENABLED 0
+#define TRACE_SDCARD_NORMAL_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_normal_command(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t arg, const char *mode, const char *state) {
+ (void)proto;
+ (void)cmd_desc;
+ (void)cmd;
+ (void)arg;
+ (void)mode;
+ (void)state;
+}
+#define TRACE_SDCARD_POWERUP 0
+#define TRACE_SDCARD_POWERUP_ENABLED 0
+#define TRACE_SDCARD_POWERUP_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_powerup(void) {
+}
+#define TRACE_SDCARD_READ_BLOCK 0
+#define TRACE_SDCARD_READ_BLOCK_ENABLED 0
+#define TRACE_SDCARD_READ_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_read_block(uint64_t addr, uint32_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_SDCARD_READ_DATA 0
+#define TRACE_SDCARD_READ_DATA_ENABLED 0
+#define TRACE_SDCARD_READ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_read_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t offset, uint64_t size, uint32_t blklen) {
+ (void)proto;
+ (void)cmd_desc;
+ (void)cmd;
+ (void)offset;
+ (void)size;
+ (void)blklen;
+}
+#define TRACE_SDCARD_REQ_ADDR 0
+#define TRACE_SDCARD_REQ_ADDR_ENABLED 0
+#define TRACE_SDCARD_REQ_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_req_addr(uint32_t req_arg, uint64_t addr) {
+ (void)req_arg;
+ (void)addr;
+}
+#define TRACE_SDCARD_RESET 0
+#define TRACE_SDCARD_RESET_ENABLED 0
+#define TRACE_SDCARD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_reset(void) {
+}
+#define TRACE_SDCARD_RESPONSE 0
+#define TRACE_SDCARD_RESPONSE_ENABLED 0
+#define TRACE_SDCARD_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_response(const char *rspdesc, int rsplen) {
+ (void)rspdesc;
+ (void)rsplen;
+}
+#define TRACE_SDCARD_RPMB_READ_BLOCK 0
+#define TRACE_SDCARD_RPMB_READ_BLOCK_ENABLED 0
+#define TRACE_SDCARD_RPMB_READ_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_rpmb_read_block(uint16_t resp, uint16_t read_addr, uint16_t result) {
+ (void)resp;
+ (void)read_addr;
+ (void)result;
+}
+#define TRACE_SDCARD_RPMB_WRITE_BLOCK 0
+#define TRACE_SDCARD_RPMB_WRITE_BLOCK_ENABLED 0
+#define TRACE_SDCARD_RPMB_WRITE_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_rpmb_write_block(uint16_t req, uint16_t result) {
+ (void)req;
+ (void)result;
+}
+#define TRACE_SDCARD_SET_BLOCK_COUNT 0
+#define TRACE_SDCARD_SET_BLOCK_COUNT_ENABLED 0
+#define TRACE_SDCARD_SET_BLOCK_COUNT_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_set_block_count(uint32_t cnt) {
+ (void)cnt;
+}
+#define TRACE_SDCARD_SET_BLOCKLEN 0
+#define TRACE_SDCARD_SET_BLOCKLEN_ENABLED 0
+#define TRACE_SDCARD_SET_BLOCKLEN_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_set_blocklen(uint16_t length) {
+ (void)length;
+}
+#define TRACE_SDCARD_SET_RCA 0
+#define TRACE_SDCARD_SET_RCA_ENABLED 0
+#define TRACE_SDCARD_SET_RCA_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_set_rca(uint16_t value) {
+ (void)value;
+}
+#define TRACE_SDCARD_SET_VOLTAGE 0
+#define TRACE_SDCARD_SET_VOLTAGE_ENABLED 0
+#define TRACE_SDCARD_SET_VOLTAGE_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_set_voltage(uint16_t millivolts) {
+ (void)millivolts;
+}
+#define TRACE_SDCARD_SWITCH 0
+#define TRACE_SDCARD_SWITCH_ENABLED 0
+#define TRACE_SDCARD_SWITCH_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_switch(unsigned access, unsigned index, unsigned value, unsigned set) {
+ (void)access;
+ (void)index;
+ (void)value;
+ (void)set;
+}
+#define TRACE_SDCARD_UNLOCK 0
+#define TRACE_SDCARD_UNLOCK_ENABLED 0
+#define TRACE_SDCARD_UNLOCK_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_unlock(void) {
+}
+#define TRACE_SDCARD_WRITE_BLOCK 0
+#define TRACE_SDCARD_WRITE_BLOCK_ENABLED 0
+#define TRACE_SDCARD_WRITE_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_write_block(uint64_t addr, uint32_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_SDCARD_WRITE_DATA 0
+#define TRACE_SDCARD_WRITE_DATA_ENABLED 0
+#define TRACE_SDCARD_WRITE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_sdcard_write_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t offset, uint8_t value) {
+ (void)proto;
+ (void)cmd_desc;
+ (void)cmd;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_SDHCI_ACCESS 0
+#define TRACE_SDHCI_ACCESS_ENABLED 0
+#define TRACE_SDHCI_ACCESS_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_access(const char *access, unsigned int size, uint64_t offset, const char *dir, uint64_t val, uint64_t val2) {
+ (void)access;
+ (void)size;
+ (void)offset;
+ (void)dir;
+ (void)val;
+ (void)val2;
+}
+#define TRACE_SDHCI_ADMA 0
+#define TRACE_SDHCI_ADMA_ENABLED 0
+#define TRACE_SDHCI_ADMA_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_adma(const char *desc, uint32_t sysad) {
+ (void)desc;
+ (void)sysad;
+}
+#define TRACE_SDHCI_ADMA_LOOP 0
+#define TRACE_SDHCI_ADMA_LOOP_ENABLED 0
+#define TRACE_SDHCI_ADMA_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) {
+ (void)addr;
+ (void)length;
+ (void)attr;
+}
+#define TRACE_SDHCI_ADMA_TRANSFER_COMPLETED 0
+#define TRACE_SDHCI_ADMA_TRANSFER_COMPLETED_ENABLED 0
+#define TRACE_SDHCI_ADMA_TRANSFER_COMPLETED_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_adma_transfer_completed(void) {
+}
+#define TRACE_SDHCI_CAPAREG 0
+#define TRACE_SDHCI_CAPAREG_ENABLED 0
+#define TRACE_SDHCI_CAPAREG_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_capareg(const char *desc, uint16_t val) {
+ (void)desc;
+ (void)val;
+}
+#define TRACE_SDHCI_END_TRANSFER 0
+#define TRACE_SDHCI_END_TRANSFER_ENABLED 0
+#define TRACE_SDHCI_END_TRANSFER_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_end_transfer(uint8_t cmd, uint32_t arg) {
+ (void)cmd;
+ (void)arg;
+}
+#define TRACE_SDHCI_ERROR 0
+#define TRACE_SDHCI_ERROR_ENABLED 0
+#define TRACE_SDHCI_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_error(const char *msg) {
+ (void)msg;
+}
+#define TRACE_SDHCI_READ_DATAPORT 0
+#define TRACE_SDHCI_READ_DATAPORT_ENABLED 0
+#define TRACE_SDHCI_READ_DATAPORT_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_read_dataport(uint16_t data_count) {
+ (void)data_count;
+}
+#define TRACE_SDHCI_RESPONSE16 0
+#define TRACE_SDHCI_RESPONSE16_ENABLED 0
+#define TRACE_SDHCI_RESPONSE16_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_response16(uint32_t r3, uint32_t r2, uint32_t r1, uint32_t r0) {
+ (void)r3;
+ (void)r2;
+ (void)r1;
+ (void)r0;
+}
+#define TRACE_SDHCI_RESPONSE4 0
+#define TRACE_SDHCI_RESPONSE4_ENABLED 0
+#define TRACE_SDHCI_RESPONSE4_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_response4(uint32_t r0) {
+ (void)r0;
+}
+#define TRACE_SDHCI_SEND_COMMAND 0
+#define TRACE_SDHCI_SEND_COMMAND_ENABLED 0
+#define TRACE_SDHCI_SEND_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_send_command(uint8_t cmd, uint32_t arg) {
+ (void)cmd;
+ (void)arg;
+}
+#define TRACE_SDHCI_SET_INSERTED 0
+#define TRACE_SDHCI_SET_INSERTED_ENABLED 0
+#define TRACE_SDHCI_SET_INSERTED_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_set_inserted(const char *level) {
+ (void)level;
+}
+#define TRACE_SDHCI_WRITE_DATAPORT 0
+#define TRACE_SDHCI_WRITE_DATAPORT_ENABLED 0
+#define TRACE_SDHCI_WRITE_DATAPORT_BACKEND_DSTATE() (0)
+static inline void trace_sdhci_write_dataport(uint16_t data_count) {
+ (void)data_count;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_sensor.h b/trace/trace-hw_sensor.h
new file mode 100644
index 0000000000..02757b5ad5
--- /dev/null
+++ b/trace/trace-hw_sensor.h
@@ -0,0 +1,33 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_SENSOR_H
+#define TRACE_TRACE_HW_SENSOR_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_TMP105_READ 0
+#define TRACE_TMP105_READ_ENABLED 0
+#define TRACE_TMP105_READ_BACKEND_DSTATE() (0)
+static inline void trace_tmp105_read(uint8_t dev, uint8_t addr) {
+ (void)dev;
+ (void)addr;
+}
+#define TRACE_TMP105_WRITE 0
+#define TRACE_TMP105_WRITE_ENABLED 0
+#define TRACE_TMP105_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tmp105_write(uint8_t dev, uint8_t addr) {
+ (void)dev;
+ (void)addr;
+}
+#define TRACE_TMP105_WRITE_SHUTDOWN 0
+#define TRACE_TMP105_WRITE_SHUTDOWN_ENABLED 0
+#define TRACE_TMP105_WRITE_SHUTDOWN_BACKEND_DSTATE() (0)
+static inline void trace_tmp105_write_shutdown(uint8_t dev) {
+ (void)dev;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_sh4.h b/trace/trace-hw_sh4.h
new file mode 100644
index 0000000000..ec89f40103
--- /dev/null
+++ b/trace/trace-hw_sh4.h
@@ -0,0 +1,31 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_SH4_H
+#define TRACE_TRACE_HW_SH4_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_SH7750_PORTA 0
+#define TRACE_SH7750_PORTA_ENABLED 0
+#define TRACE_SH7750_PORTA_BACKEND_DSTATE() (0)
+static inline void trace_sh7750_porta(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) {
+ (void)prev;
+ (void)cur;
+ (void)pdtr;
+ (void)pctr;
+}
+#define TRACE_SH7750_PORTB 0
+#define TRACE_SH7750_PORTB_ENABLED 0
+#define TRACE_SH7750_PORTB_BACKEND_DSTATE() (0)
+static inline void trace_sh7750_portb(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) {
+ (void)prev;
+ (void)cur;
+ (void)pdtr;
+ (void)pctr;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_sparc.h b/trace/trace-hw_sparc.h
new file mode 100644
index 0000000000..0e7736f29f
--- /dev/null
+++ b/trace/trace-hw_sparc.h
@@ -0,0 +1,101 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_SPARC_H
+#define TRACE_TRACE_HW_SPARC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_INT_HELPER_DCACHE_FREEZE 0
+#define TRACE_INT_HELPER_DCACHE_FREEZE_ENABLED 0
+#define TRACE_INT_HELPER_DCACHE_FREEZE_BACKEND_DSTATE() (0)
+static inline void trace_int_helper_dcache_freeze(void) {
+}
+#define TRACE_INT_HELPER_ICACHE_FREEZE 0
+#define TRACE_INT_HELPER_ICACHE_FREEZE_ENABLED 0
+#define TRACE_INT_HELPER_ICACHE_FREEZE_BACKEND_DSTATE() (0)
+static inline void trace_int_helper_icache_freeze(void) {
+}
+#define TRACE_LEON3_RESET_IRQ 0
+#define TRACE_LEON3_RESET_IRQ_ENABLED 0
+#define TRACE_LEON3_RESET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_leon3_reset_irq(int intno) {
+ (void)intno;
+}
+#define TRACE_LEON3_SET_IRQ 0
+#define TRACE_LEON3_SET_IRQ_ENABLED 0
+#define TRACE_LEON3_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_leon3_set_irq(int intno) {
+ (void)intno;
+}
+#define TRACE_SUN4M_CPU_SET_IRQ_LOWER 0
+#define TRACE_SUN4M_CPU_SET_IRQ_LOWER_ENABLED 0
+#define TRACE_SUN4M_CPU_SET_IRQ_LOWER_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_cpu_set_irq_lower(int level) {
+ (void)level;
+}
+#define TRACE_SUN4M_CPU_SET_IRQ_RAISE 0
+#define TRACE_SUN4M_CPU_SET_IRQ_RAISE_ENABLED 0
+#define TRACE_SUN4M_CPU_SET_IRQ_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_cpu_set_irq_raise(int level) {
+ (void)level;
+}
+#define TRACE_SUN4M_IOMMU_BAD_ADDR 0
+#define TRACE_SUN4M_IOMMU_BAD_ADDR_ENABLED 0
+#define TRACE_SUN4M_IOMMU_BAD_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_bad_addr(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_SUN4M_IOMMU_MEM_READL 0
+#define TRACE_SUN4M_IOMMU_MEM_READL_ENABLED 0
+#define TRACE_SUN4M_IOMMU_MEM_READL_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_ENABLED 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_CTRL 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_CTRL_ENABLED 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_CTRL_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_mem_writel_ctrl(uint64_t iostart) {
+ (void)iostart;
+}
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_PGFLUSH 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_PGFLUSH_ENABLED 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_PGFLUSH_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_mem_writel_pgflush(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_TLBFLUSH 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_TLBFLUSH_ENABLED 0
+#define TRACE_SUN4M_IOMMU_MEM_WRITEL_TLBFLUSH_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_mem_writel_tlbflush(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SUN4M_IOMMU_PAGE_GET_FLAGS 0
+#define TRACE_SUN4M_IOMMU_PAGE_GET_FLAGS_ENABLED 0
+#define TRACE_SUN4M_IOMMU_PAGE_GET_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) {
+ (void)pa;
+ (void)iopte;
+ (void)ret;
+}
+#define TRACE_SUN4M_IOMMU_TRANSLATE_PA 0
+#define TRACE_SUN4M_IOMMU_TRANSLATE_PA_ENABLED 0
+#define TRACE_SUN4M_IOMMU_TRANSLATE_PA_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) {
+ (void)addr;
+ (void)pa;
+ (void)iopte;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_sparc64.h b/trace/trace-hw_sparc64.h
new file mode 100644
index 0000000000..000c9960da
--- /dev/null
+++ b/trace/trace-hw_sparc64.h
@@ -0,0 +1,122 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_SPARC64_H
+#define TRACE_TRACE_HW_SPARC64_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_EBUS_ISA_IRQ_HANDLER 0
+#define TRACE_EBUS_ISA_IRQ_HANDLER_ENABLED 0
+#define TRACE_EBUS_ISA_IRQ_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_ebus_isa_irq_handler(int n, int level) {
+ (void)n;
+ (void)level;
+}
+#define TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED 0
+#define TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED_ENABLED 0
+#define TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_hstick_irq_disabled(void) {
+}
+#define TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE 0
+#define TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE_ENABLED 0
+#define TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_hstick_irq_fire(void) {
+}
+#define TRACE_SPARC64_CPU_IVEC_LOWER_IRQ 0
+#define TRACE_SPARC64_CPU_IVEC_LOWER_IRQ_ENABLED 0
+#define TRACE_SPARC64_CPU_IVEC_LOWER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_ivec_lower_irq(int irq) {
+ (void)irq;
+}
+#define TRACE_SPARC64_CPU_IVEC_RAISE_IRQ 0
+#define TRACE_SPARC64_CPU_IVEC_RAISE_IRQ_ENABLED 0
+#define TRACE_SPARC64_CPU_IVEC_RAISE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_ivec_raise_irq(int irq) {
+ (void)irq;
+}
+#define TRACE_SPARC64_CPU_STICK_IRQ_DISABLED 0
+#define TRACE_SPARC64_CPU_STICK_IRQ_DISABLED_ENABLED 0
+#define TRACE_SPARC64_CPU_STICK_IRQ_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_stick_irq_disabled(void) {
+}
+#define TRACE_SPARC64_CPU_STICK_IRQ_FIRE 0
+#define TRACE_SPARC64_CPU_STICK_IRQ_FIRE_ENABLED 0
+#define TRACE_SPARC64_CPU_STICK_IRQ_FIRE_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_stick_irq_fire(void) {
+}
+#define TRACE_SPARC64_CPU_TICK_GET_COUNT 0
+#define TRACE_SPARC64_CPU_TICK_GET_COUNT_ENABLED 0
+#define TRACE_SPARC64_CPU_TICK_GET_COUNT_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_tick_get_count(const char *name, uint64_t real_count, const char *npt, void *p) {
+ (void)name;
+ (void)real_count;
+ (void)npt;
+ (void)p;
+}
+#define TRACE_SPARC64_CPU_TICK_IRQ_DISABLED 0
+#define TRACE_SPARC64_CPU_TICK_IRQ_DISABLED_ENABLED 0
+#define TRACE_SPARC64_CPU_TICK_IRQ_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_tick_irq_disabled(void) {
+}
+#define TRACE_SPARC64_CPU_TICK_IRQ_FIRE 0
+#define TRACE_SPARC64_CPU_TICK_IRQ_FIRE_ENABLED 0
+#define TRACE_SPARC64_CPU_TICK_IRQ_FIRE_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_tick_irq_fire(void) {
+}
+#define TRACE_SPARC64_CPU_TICK_SET_COUNT 0
+#define TRACE_SPARC64_CPU_TICK_SET_COUNT_ENABLED 0
+#define TRACE_SPARC64_CPU_TICK_SET_COUNT_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_tick_set_count(const char *name, uint64_t real_count, const char *npt, void *p) {
+ (void)name;
+ (void)real_count;
+ (void)npt;
+ (void)p;
+}
+#define TRACE_SPARC64_CPU_TICK_SET_LIMIT 0
+#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_ENABLED 0
+#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_tick_set_limit(const char *name, uint64_t real_limit, const char *dis, void *p, uint64_t limit, uint64_t t, uint64_t dt) {
+ (void)name;
+ (void)real_limit;
+ (void)dis;
+ (void)p;
+ (void)limit;
+ (void)t;
+ (void)dt;
+}
+#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO 0
+#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO_ENABLED 0
+#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_tick_set_limit_zero(const char *name) {
+ (void)name;
+}
+#define TRACE_SUN4U_IOMMU_MEM_READ 0
+#define TRACE_SUN4U_IOMMU_MEM_READ_ENABLED 0
+#define TRACE_SUN4U_IOMMU_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_SUN4U_IOMMU_MEM_WRITE 0
+#define TRACE_SUN4U_IOMMU_MEM_WRITE_ENABLED 0
+#define TRACE_SUN4U_IOMMU_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_SUN4U_IOMMU_TRANSLATE 0
+#define TRACE_SUN4U_IOMMU_TRANSLATE_ENABLED 0
+#define TRACE_SUN4U_IOMMU_TRANSLATE_BACKEND_DSTATE() (0)
+static inline void trace_sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) {
+ (void)addr;
+ (void)trans_addr;
+ (void)tte;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_ssi.h b/trace/trace-hw_ssi.h
new file mode 100644
index 0000000000..bc6925c10f
--- /dev/null
+++ b/trace/trace-hw_ssi.h
@@ -0,0 +1,378 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_SSI_H
+#define TRACE_TRACE_HW_SSI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALLWINNER_A10_SPI_BURST_LENGTH 0
+#define TRACE_ALLWINNER_A10_SPI_BURST_LENGTH_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_BURST_LENGTH_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_burst_length(uint32_t len) {
+ (void)len;
+}
+#define TRACE_ALLWINNER_A10_SPI_FLUSH_TXFIFO_BEGIN 0
+#define TRACE_ALLWINNER_A10_SPI_FLUSH_TXFIFO_BEGIN_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_FLUSH_TXFIFO_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_flush_txfifo_begin(uint32_t tx, uint32_t rx) {
+ (void)tx;
+ (void)rx;
+}
+#define TRACE_ALLWINNER_A10_SPI_FLUSH_TXFIFO_END 0
+#define TRACE_ALLWINNER_A10_SPI_FLUSH_TXFIFO_END_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_FLUSH_TXFIFO_END_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_flush_txfifo_end(uint32_t tx, uint32_t rx) {
+ (void)tx;
+ (void)rx;
+}
+#define TRACE_ALLWINNER_A10_SPI_READ 0
+#define TRACE_ALLWINNER_A10_SPI_READ_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_read(const char* regname, uint32_t value) {
+ (void)regname;
+ (void)value;
+}
+#define TRACE_ALLWINNER_A10_SPI_RX 0
+#define TRACE_ALLWINNER_A10_SPI_RX_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_RX_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_rx(uint8_t byte) {
+ (void)byte;
+}
+#define TRACE_ALLWINNER_A10_SPI_TX 0
+#define TRACE_ALLWINNER_A10_SPI_TX_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_TX_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_tx(uint8_t byte) {
+ (void)byte;
+}
+#define TRACE_ALLWINNER_A10_SPI_UPDATE_IRQ 0
+#define TRACE_ALLWINNER_A10_SPI_UPDATE_IRQ_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_update_irq(uint32_t level) {
+ (void)level;
+}
+#define TRACE_ALLWINNER_A10_SPI_WRITE 0
+#define TRACE_ALLWINNER_A10_SPI_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_A10_SPI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_a10_spi_write(const char* regname, uint32_t value) {
+ (void)regname;
+ (void)value;
+}
+#define TRACE_ASPEED_SMC_DMA_CHECKSUM 0
+#define TRACE_ASPEED_SMC_DMA_CHECKSUM_ENABLED 0
+#define TRACE_ASPEED_SMC_DMA_CHECKSUM_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_dma_checksum(uint32_t addr, uint32_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_ASPEED_SMC_DMA_RW 0
+#define TRACE_ASPEED_SMC_DMA_RW_ENABLED 0
+#define TRACE_ASPEED_SMC_DMA_RW_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_dma_rw(const char *dir, uint32_t flash_addr, uint64_t dram_addr, uint32_t size) {
+ (void)dir;
+ (void)flash_addr;
+ (void)dram_addr;
+ (void)size;
+}
+#define TRACE_ASPEED_SMC_DO_SNOOP 0
+#define TRACE_ASPEED_SMC_DO_SNOOP_ENABLED 0
+#define TRACE_ASPEED_SMC_DO_SNOOP_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_do_snoop(int cs, int index, int dummies, int data) {
+ (void)cs;
+ (void)index;
+ (void)dummies;
+ (void)data;
+}
+#define TRACE_ASPEED_SMC_FLASH_READ 0
+#define TRACE_ASPEED_SMC_FLASH_READ_ENABLED 0
+#define TRACE_ASPEED_SMC_FLASH_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_flash_read(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) {
+ (void)cs;
+ (void)addr;
+ (void)size;
+ (void)data;
+ (void)mode;
+}
+#define TRACE_ASPEED_SMC_FLASH_SELECT 0
+#define TRACE_ASPEED_SMC_FLASH_SELECT_ENABLED 0
+#define TRACE_ASPEED_SMC_FLASH_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_flash_select(int cs, const char *prefix) {
+ (void)cs;
+ (void)prefix;
+}
+#define TRACE_ASPEED_SMC_FLASH_SET_SEGMENT 0
+#define TRACE_ASPEED_SMC_FLASH_SET_SEGMENT_ENABLED 0
+#define TRACE_ASPEED_SMC_FLASH_SET_SEGMENT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_flash_set_segment(int cs, uint64_t reg, uint64_t start, uint64_t end) {
+ (void)cs;
+ (void)reg;
+ (void)start;
+ (void)end;
+}
+#define TRACE_ASPEED_SMC_FLASH_WRITE 0
+#define TRACE_ASPEED_SMC_FLASH_WRITE_ENABLED 0
+#define TRACE_ASPEED_SMC_FLASH_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_flash_write(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) {
+ (void)cs;
+ (void)addr;
+ (void)size;
+ (void)data;
+ (void)mode;
+}
+#define TRACE_ASPEED_SMC_READ 0
+#define TRACE_ASPEED_SMC_READ_ENABLED 0
+#define TRACE_ASPEED_SMC_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_read(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_ASPEED_SMC_WRITE 0
+#define TRACE_ASPEED_SMC_WRITE_ENABLED 0
+#define TRACE_ASPEED_SMC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_smc_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_IBEX_SPI_HOST_READ 0
+#define TRACE_IBEX_SPI_HOST_READ_ENABLED 0
+#define TRACE_IBEX_SPI_HOST_READ_BACKEND_DSTATE() (0)
+static inline void trace_ibex_spi_host_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_IBEX_SPI_HOST_RESET 0
+#define TRACE_IBEX_SPI_HOST_RESET_ENABLED 0
+#define TRACE_IBEX_SPI_HOST_RESET_BACKEND_DSTATE() (0)
+static inline void trace_ibex_spi_host_reset(const char *msg) {
+ (void)msg;
+}
+#define TRACE_IBEX_SPI_HOST_TRANSFER 0
+#define TRACE_IBEX_SPI_HOST_TRANSFER_ENABLED 0
+#define TRACE_IBEX_SPI_HOST_TRANSFER_BACKEND_DSTATE() (0)
+static inline void trace_ibex_spi_host_transfer(uint32_t tx_data, uint32_t rx_data) {
+ (void)tx_data;
+ (void)rx_data;
+}
+#define TRACE_IBEX_SPI_HOST_WRITE 0
+#define TRACE_IBEX_SPI_HOST_WRITE_ENABLED 0
+#define TRACE_IBEX_SPI_HOST_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ibex_spi_host_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_NPCM_PSPI_CTRL_READ 0
+#define TRACE_NPCM_PSPI_CTRL_READ_ENABLED 0
+#define TRACE_NPCM_PSPI_CTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm_pspi_ctrl_read(const char *id, uint64_t addr, uint16_t data) {
+ (void)id;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_NPCM_PSPI_CTRL_WRITE 0
+#define TRACE_NPCM_PSPI_CTRL_WRITE_ENABLED 0
+#define TRACE_NPCM_PSPI_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm_pspi_ctrl_write(const char *id, uint64_t addr, uint16_t data) {
+ (void)id;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_NPCM_PSPI_ENTER_RESET 0
+#define TRACE_NPCM_PSPI_ENTER_RESET_ENABLED 0
+#define TRACE_NPCM_PSPI_ENTER_RESET_BACKEND_DSTATE() (0)
+static inline void trace_npcm_pspi_enter_reset(const char *id, int reset_type) {
+ (void)id;
+ (void)reset_type;
+}
+#define TRACE_NPCM7XX_FIU_CTRL_READ 0
+#define TRACE_NPCM7XX_FIU_CTRL_READ_ENABLED 0
+#define TRACE_NPCM7XX_FIU_CTRL_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_ctrl_read(const char *id, uint64_t addr, uint32_t data) {
+ (void)id;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_NPCM7XX_FIU_CTRL_WRITE 0
+#define TRACE_NPCM7XX_FIU_CTRL_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_FIU_CTRL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, uint32_t data) {
+ (void)id;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_NPCM7XX_FIU_DESELECT 0
+#define TRACE_NPCM7XX_FIU_DESELECT_ENABLED 0
+#define TRACE_NPCM7XX_FIU_DESELECT_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_deselect(const char *id, int cs) {
+ (void)id;
+ (void)cs;
+}
+#define TRACE_NPCM7XX_FIU_ENTER_RESET 0
+#define TRACE_NPCM7XX_FIU_ENTER_RESET_ENABLED 0
+#define TRACE_NPCM7XX_FIU_ENTER_RESET_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_enter_reset(const char *id, int reset_type) {
+ (void)id;
+ (void)reset_type;
+}
+#define TRACE_NPCM7XX_FIU_FLASH_READ 0
+#define TRACE_NPCM7XX_FIU_FLASH_READ_ENABLED 0
+#define TRACE_NPCM7XX_FIU_FLASH_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) {
+ (void)id;
+ (void)cs;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_NPCM7XX_FIU_FLASH_WRITE 0
+#define TRACE_NPCM7XX_FIU_FLASH_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_FIU_FLASH_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_flash_write(const char *id, unsigned cs, uint64_t addr, unsigned int size, uint64_t value) {
+ (void)id;
+ (void)cs;
+ (void)addr;
+ (void)size;
+ (void)value;
+}
+#define TRACE_NPCM7XX_FIU_HOLD_RESET 0
+#define TRACE_NPCM7XX_FIU_HOLD_RESET_ENABLED 0
+#define TRACE_NPCM7XX_FIU_HOLD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_hold_reset(const char *id) {
+ (void)id;
+}
+#define TRACE_NPCM7XX_FIU_SELECT 0
+#define TRACE_NPCM7XX_FIU_SELECT_ENABLED 0
+#define TRACE_NPCM7XX_FIU_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_fiu_select(const char *id, int cs) {
+ (void)id;
+ (void)cs;
+}
+#define TRACE_PNV_SPI_LOG_NCOUNTS 0
+#define TRACE_PNV_SPI_LOG_NCOUNTS_ENABLED 0
+#define TRACE_PNV_SPI_LOG_NCOUNTS_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_log_Ncounts(uint8_t N1_bits, uint8_t N1_bytes, uint8_t N1_tx, uint8_t N1_rx, uint8_t N2_bits, uint8_t N2_bytes, uint8_t N2_tx, uint8_t N2_rx) {
+ (void)N1_bits;
+ (void)N1_bytes;
+ (void)N1_tx;
+ (void)N1_rx;
+ (void)N2_bits;
+ (void)N2_bytes;
+ (void)N2_tx;
+ (void)N2_rx;
+}
+#define TRACE_PNV_SPI_RDR_MATCH 0
+#define TRACE_PNV_SPI_RDR_MATCH_ENABLED 0
+#define TRACE_PNV_SPI_RDR_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_RDR_match(const char* result) {
+ (void)result;
+}
+#define TRACE_PNV_SPI_READ 0
+#define TRACE_PNV_SPI_READ_ENABLED 0
+#define TRACE_PNV_SPI_READ_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_read(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_SPI_READ_RDR 0
+#define TRACE_PNV_SPI_READ_RDR_ENABLED 0
+#define TRACE_PNV_SPI_READ_RDR_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_read_RDR(uint64_t val) {
+ (void)val;
+}
+#define TRACE_PNV_SPI_RESET 0
+#define TRACE_PNV_SPI_RESET_ENABLED 0
+#define TRACE_PNV_SPI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_reset(void) {
+}
+#define TRACE_PNV_SPI_RX_READ_N1FRAME 0
+#define TRACE_PNV_SPI_RX_READ_N1FRAME_ENABLED 0
+#define TRACE_PNV_SPI_RX_READ_N1FRAME_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_rx_read_N1frame(void) {
+}
+#define TRACE_PNV_SPI_RX_READ_N2FRAME 0
+#define TRACE_PNV_SPI_RX_READ_N2FRAME_ENABLED 0
+#define TRACE_PNV_SPI_RX_READ_N2FRAME_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_rx_read_N2frame(void) {
+}
+#define TRACE_PNV_SPI_RX_RECEIVED 0
+#define TRACE_PNV_SPI_RX_RECEIVED_ENABLED 0
+#define TRACE_PNV_SPI_RX_RECEIVED_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_rx_received(uint32_t payload_len) {
+ (void)payload_len;
+}
+#define TRACE_PNV_SPI_SEQUENCER_OP 0
+#define TRACE_PNV_SPI_SEQUENCER_OP_ENABLED 0
+#define TRACE_PNV_SPI_SEQUENCER_OP_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_sequencer_op(const char* op, uint8_t index) {
+ (void)op;
+ (void)index;
+}
+#define TRACE_PNV_SPI_SEQUENCER_STOP_REQUESTED 0
+#define TRACE_PNV_SPI_SEQUENCER_STOP_REQUESTED_ENABLED 0
+#define TRACE_PNV_SPI_SEQUENCER_STOP_REQUESTED_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_sequencer_stop_requested(const char* reason) {
+ (void)reason;
+}
+#define TRACE_PNV_SPI_SHIFT_RX 0
+#define TRACE_PNV_SPI_SHIFT_RX_ENABLED 0
+#define TRACE_PNV_SPI_SHIFT_RX_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_shift_rx(uint8_t byte, uint32_t index) {
+ (void)byte;
+ (void)index;
+}
+#define TRACE_PNV_SPI_SHIFTER_DONE 0
+#define TRACE_PNV_SPI_SHIFTER_DONE_ENABLED 0
+#define TRACE_PNV_SPI_SHIFTER_DONE_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_shifter_done(void) {
+}
+#define TRACE_PNV_SPI_SHIFTER_STATING 0
+#define TRACE_PNV_SPI_SHIFTER_STATING_ENABLED 0
+#define TRACE_PNV_SPI_SHIFTER_STATING_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_shifter_stating(void) {
+}
+#define TRACE_PNV_SPI_START_SEQUENCER 0
+#define TRACE_PNV_SPI_START_SEQUENCER_ENABLED 0
+#define TRACE_PNV_SPI_START_SEQUENCER_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_start_sequencer(void) {
+}
+#define TRACE_PNV_SPI_TX_APPEND 0
+#define TRACE_PNV_SPI_TX_APPEND_ENABLED 0
+#define TRACE_PNV_SPI_TX_APPEND_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_tx_append(const char* frame, uint8_t byte, uint8_t tdr_index) {
+ (void)frame;
+ (void)byte;
+ (void)tdr_index;
+}
+#define TRACE_PNV_SPI_TX_APPEND_FF 0
+#define TRACE_PNV_SPI_TX_APPEND_FF_ENABLED 0
+#define TRACE_PNV_SPI_TX_APPEND_FF_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_tx_append_FF(const char* frame) {
+ (void)frame;
+}
+#define TRACE_PNV_SPI_TX_REQUEST 0
+#define TRACE_PNV_SPI_TX_REQUEST_ENABLED 0
+#define TRACE_PNV_SPI_TX_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_tx_request(const char* frame, uint32_t payload_len) {
+ (void)frame;
+ (void)payload_len;
+}
+#define TRACE_PNV_SPI_WRITE 0
+#define TRACE_PNV_SPI_WRITE_ENABLED 0
+#define TRACE_PNV_SPI_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_write(uint64_t addr, uint64_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_PNV_SPI_WRITE_TDR 0
+#define TRACE_PNV_SPI_WRITE_TDR_ENABLED 0
+#define TRACE_PNV_SPI_WRITE_TDR_BACKEND_DSTATE() (0)
+static inline void trace_pnv_spi_write_TDR(uint64_t val) {
+ (void)val;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_timer.h b/trace/trace-hw_timer.h
new file mode 100644
index 0000000000..6bc99a61f5
--- /dev/null
+++ b/trace/trace-hw_timer.h
@@ -0,0 +1,625 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_TIMER_H
+#define TRACE_TRACE_HW_TIMER_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ASPEED_TIMER_CTRL_ENABLE 0
+#define TRACE_ASPEED_TIMER_CTRL_ENABLE_ENABLED 0
+#define TRACE_ASPEED_TIMER_CTRL_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_timer_ctrl_enable(uint8_t i, bool enable) {
+ (void)i;
+ (void)enable;
+}
+#define TRACE_ASPEED_TIMER_CTRL_EXTERNAL_CLOCK 0
+#define TRACE_ASPEED_TIMER_CTRL_EXTERNAL_CLOCK_ENABLED 0
+#define TRACE_ASPEED_TIMER_CTRL_EXTERNAL_CLOCK_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) {
+ (void)i;
+ (void)enable;
+}
+#define TRACE_ASPEED_TIMER_CTRL_OVERFLOW_INTERRUPT 0
+#define TRACE_ASPEED_TIMER_CTRL_OVERFLOW_INTERRUPT_ENABLED 0
+#define TRACE_ASPEED_TIMER_CTRL_OVERFLOW_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) {
+ (void)i;
+ (void)enable;
+}
+#define TRACE_ASPEED_TIMER_CTRL_PULSE_ENABLE 0
+#define TRACE_ASPEED_TIMER_CTRL_PULSE_ENABLE_ENABLED 0
+#define TRACE_ASPEED_TIMER_CTRL_PULSE_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) {
+ (void)i;
+ (void)enable;
+}
+#define TRACE_ASPEED_TIMER_READ 0
+#define TRACE_ASPEED_TIMER_READ_ENABLED 0
+#define TRACE_ASPEED_TIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_timer_read(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_ASPEED_TIMER_SET_CTRL2 0
+#define TRACE_ASPEED_TIMER_SET_CTRL2_ENABLED 0
+#define TRACE_ASPEED_TIMER_SET_CTRL2_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_timer_set_ctrl2(uint32_t value) {
+ (void)value;
+}
+#define TRACE_ASPEED_TIMER_SET_VALUE 0
+#define TRACE_ASPEED_TIMER_SET_VALUE_ENABLED 0
+#define TRACE_ASPEED_TIMER_SET_VALUE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_timer_set_value(int timer, int reg, uint32_t value) {
+ (void)timer;
+ (void)reg;
+ (void)value;
+}
+#define TRACE_AVR_TIMER16_CLKSRC_UPDATE 0
+#define TRACE_AVR_TIMER16_CLKSRC_UPDATE_ENABLED 0
+#define TRACE_AVR_TIMER16_CLKSRC_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_clksrc_update(uint64_t freq_hz, uint64_t period_ns, uint64_t delay_s) {
+ (void)freq_hz;
+ (void)period_ns;
+ (void)delay_s;
+}
+#define TRACE_AVR_TIMER16_INTERRUPT_COUNT 0
+#define TRACE_AVR_TIMER16_INTERRUPT_COUNT_ENABLED 0
+#define TRACE_AVR_TIMER16_INTERRUPT_COUNT_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_interrupt_count(uint8_t cnt) {
+ (void)cnt;
+}
+#define TRACE_AVR_TIMER16_INTERRUPT_OVERFLOW 0
+#define TRACE_AVR_TIMER16_INTERRUPT_OVERFLOW_ENABLED 0
+#define TRACE_AVR_TIMER16_INTERRUPT_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_interrupt_overflow(const char *reason) {
+ (void)reason;
+}
+#define TRACE_AVR_TIMER16_NEXT_ALARM 0
+#define TRACE_AVR_TIMER16_NEXT_ALARM_ENABLED 0
+#define TRACE_AVR_TIMER16_NEXT_ALARM_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_next_alarm(uint64_t delay_ns) {
+ (void)delay_ns;
+}
+#define TRACE_AVR_TIMER16_READ 0
+#define TRACE_AVR_TIMER16_READ_ENABLED 0
+#define TRACE_AVR_TIMER16_READ_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_read(uint8_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_AVR_TIMER16_READ_IFR 0
+#define TRACE_AVR_TIMER16_READ_IFR_ENABLED 0
+#define TRACE_AVR_TIMER16_READ_IFR_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_read_ifr(uint8_t value) {
+ (void)value;
+}
+#define TRACE_AVR_TIMER16_READ_IMSK 0
+#define TRACE_AVR_TIMER16_READ_IMSK_ENABLED 0
+#define TRACE_AVR_TIMER16_READ_IMSK_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_read_imsk(uint8_t value) {
+ (void)value;
+}
+#define TRACE_AVR_TIMER16_WRITE 0
+#define TRACE_AVR_TIMER16_WRITE_ENABLED 0
+#define TRACE_AVR_TIMER16_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_write(uint8_t addr, uint8_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_AVR_TIMER16_WRITE_IMSK 0
+#define TRACE_AVR_TIMER16_WRITE_IMSK_ENABLED 0
+#define TRACE_AVR_TIMER16_WRITE_IMSK_BACKEND_DSTATE() (0)
+static inline void trace_avr_timer16_write_imsk(uint8_t value) {
+ (void)value;
+}
+#define TRACE_BCM2835_SYSTMR_IRQ_ACK 0
+#define TRACE_BCM2835_SYSTMR_IRQ_ACK_ENABLED 0
+#define TRACE_BCM2835_SYSTMR_IRQ_ACK_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_systmr_irq_ack(unsigned id) {
+ (void)id;
+}
+#define TRACE_BCM2835_SYSTMR_READ 0
+#define TRACE_BCM2835_SYSTMR_READ_ENABLED 0
+#define TRACE_BCM2835_SYSTMR_READ_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_systmr_read(uint64_t offset, uint64_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_BCM2835_SYSTMR_RUN 0
+#define TRACE_BCM2835_SYSTMR_RUN_ENABLED 0
+#define TRACE_BCM2835_SYSTMR_RUN_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_systmr_run(unsigned id, uint64_t delay_us) {
+ (void)id;
+ (void)delay_us;
+}
+#define TRACE_BCM2835_SYSTMR_TIMER_EXPIRED 0
+#define TRACE_BCM2835_SYSTMR_TIMER_EXPIRED_ENABLED 0
+#define TRACE_BCM2835_SYSTMR_TIMER_EXPIRED_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_systmr_timer_expired(unsigned id) {
+ (void)id;
+}
+#define TRACE_BCM2835_SYSTMR_WRITE 0
+#define TRACE_BCM2835_SYSTMR_WRITE_ENABLED 0
+#define TRACE_BCM2835_SYSTMR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_bcm2835_systmr_write(uint64_t offset, uint32_t data) {
+ (void)offset;
+ (void)data;
+}
+#define TRACE_CMSDK_APB_DUALTIMER_READ 0
+#define TRACE_CMSDK_APB_DUALTIMER_READ_ENABLED 0
+#define TRACE_CMSDK_APB_DUALTIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_CMSDK_APB_DUALTIMER_RESET 0
+#define TRACE_CMSDK_APB_DUALTIMER_RESET_ENABLED 0
+#define TRACE_CMSDK_APB_DUALTIMER_RESET_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_dualtimer_reset(void) {
+}
+#define TRACE_CMSDK_APB_DUALTIMER_WRITE 0
+#define TRACE_CMSDK_APB_DUALTIMER_WRITE_ENABLED 0
+#define TRACE_CMSDK_APB_DUALTIMER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_CMSDK_APB_TIMER_READ 0
+#define TRACE_CMSDK_APB_TIMER_READ_ENABLED 0
+#define TRACE_CMSDK_APB_TIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_CMSDK_APB_TIMER_RESET 0
+#define TRACE_CMSDK_APB_TIMER_RESET_ENABLED 0
+#define TRACE_CMSDK_APB_TIMER_RESET_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_timer_reset(void) {
+}
+#define TRACE_CMSDK_APB_TIMER_WRITE 0
+#define TRACE_CMSDK_APB_TIMER_WRITE_ENABLED 0
+#define TRACE_CMSDK_APB_TIMER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_GRLIB_GPTIMER_DISABLED 0
+#define TRACE_GRLIB_GPTIMER_DISABLED_ENABLED 0
+#define TRACE_GRLIB_GPTIMER_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_grlib_gptimer_disabled(int id, uint32_t config) {
+ (void)id;
+ (void)config;
+}
+#define TRACE_GRLIB_GPTIMER_ENABLE 0
+#define TRACE_GRLIB_GPTIMER_ENABLE_ENABLED 0
+#define TRACE_GRLIB_GPTIMER_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_grlib_gptimer_enable(int id, uint32_t count) {
+ (void)id;
+ (void)count;
+}
+#define TRACE_GRLIB_GPTIMER_HIT 0
+#define TRACE_GRLIB_GPTIMER_HIT_ENABLED 0
+#define TRACE_GRLIB_GPTIMER_HIT_BACKEND_DSTATE() (0)
+static inline void trace_grlib_gptimer_hit(int id) {
+ (void)id;
+}
+#define TRACE_GRLIB_GPTIMER_READL 0
+#define TRACE_GRLIB_GPTIMER_READL_ENABLED 0
+#define TRACE_GRLIB_GPTIMER_READL_BACKEND_DSTATE() (0)
+static inline void trace_grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) {
+ (void)id;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_GRLIB_GPTIMER_RESTART 0
+#define TRACE_GRLIB_GPTIMER_RESTART_ENABLED 0
+#define TRACE_GRLIB_GPTIMER_RESTART_BACKEND_DSTATE() (0)
+static inline void trace_grlib_gptimer_restart(int id, uint32_t reload) {
+ (void)id;
+ (void)reload;
+}
+#define TRACE_GRLIB_GPTIMER_SET_SCALER 0
+#define TRACE_GRLIB_GPTIMER_SET_SCALER_ENABLED 0
+#define TRACE_GRLIB_GPTIMER_SET_SCALER_BACKEND_DSTATE() (0)
+static inline void trace_grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) {
+ (void)scaler;
+ (void)freq;
+}
+#define TRACE_GRLIB_GPTIMER_WRITEL 0
+#define TRACE_GRLIB_GPTIMER_WRITEL_ENABLED 0
+#define TRACE_GRLIB_GPTIMER_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) {
+ (void)id;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_HPET_INVALID_HPET_CFG 0
+#define TRACE_HPET_INVALID_HPET_CFG_ENABLED 0
+#define TRACE_HPET_INVALID_HPET_CFG_BACKEND_DSTATE() (0)
+static inline void trace_hpet_invalid_hpet_cfg(uint8_t reg_off) {
+ (void)reg_off;
+}
+#define TRACE_HPET_RAM_READ 0
+#define TRACE_HPET_RAM_READ_ENABLED 0
+#define TRACE_HPET_RAM_READ_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_read(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_HPET_RAM_READ_INVALID 0
+#define TRACE_HPET_RAM_READ_INVALID_ENABLED 0
+#define TRACE_HPET_RAM_READ_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_read_invalid(void) {
+}
+#define TRACE_HPET_RAM_READ_READING_COUNTER 0
+#define TRACE_HPET_RAM_READ_READING_COUNTER_ENABLED 0
+#define TRACE_HPET_RAM_READ_READING_COUNTER_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_read_reading_counter(uint8_t reg_off, uint64_t cur_tick) {
+ (void)reg_off;
+ (void)cur_tick;
+}
+#define TRACE_HPET_RAM_WRITE 0
+#define TRACE_HPET_RAM_WRITE_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write(uint64_t addr, uint64_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_HPET_RAM_WRITE_COUNTER_WRITE_WHILE_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_COUNTER_WRITE_WHILE_ENABLED_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_COUNTER_WRITE_WHILE_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write_counter_write_while_enabled(void) {
+}
+#define TRACE_HPET_RAM_WRITE_COUNTER_WRITTEN 0
+#define TRACE_HPET_RAM_WRITE_COUNTER_WRITTEN_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_COUNTER_WRITTEN_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write_counter_written(uint8_t reg_off, uint64_t value, uint64_t counter) {
+ (void)reg_off;
+ (void)value;
+ (void)counter;
+}
+#define TRACE_HPET_RAM_WRITE_INVALID 0
+#define TRACE_HPET_RAM_WRITE_INVALID_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write_invalid(void) {
+}
+#define TRACE_HPET_RAM_WRITE_INVALID_TN_CMP 0
+#define TRACE_HPET_RAM_WRITE_INVALID_TN_CMP_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_INVALID_TN_CMP_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write_invalid_tn_cmp(void) {
+}
+#define TRACE_HPET_RAM_WRITE_TIMER_ID 0
+#define TRACE_HPET_RAM_WRITE_TIMER_ID_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_TIMER_ID_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write_timer_id(uint64_t timer_id) {
+ (void)timer_id;
+}
+#define TRACE_HPET_RAM_WRITE_TN_CFG 0
+#define TRACE_HPET_RAM_WRITE_TN_CFG_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_TN_CFG_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write_tn_cfg(uint8_t reg_off) {
+ (void)reg_off;
+}
+#define TRACE_HPET_RAM_WRITE_TN_CMP 0
+#define TRACE_HPET_RAM_WRITE_TN_CMP_ENABLED 0
+#define TRACE_HPET_RAM_WRITE_TN_CMP_BACKEND_DSTATE() (0)
+static inline void trace_hpet_ram_write_tn_cmp(uint8_t reg_off) {
+ (void)reg_off;
+}
+#define TRACE_HPET_TIMER_ID_OUT_OF_RANGE 0
+#define TRACE_HPET_TIMER_ID_OUT_OF_RANGE_ENABLED 0
+#define TRACE_HPET_TIMER_ID_OUT_OF_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_hpet_timer_id_out_of_range(uint8_t timer_id) {
+ (void)timer_id;
+}
+#define TRACE_IMX_GPT_READ 0
+#define TRACE_IMX_GPT_READ_ENABLED 0
+#define TRACE_IMX_GPT_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx_gpt_read(const char *name, uint64_t value) {
+ (void)name;
+ (void)value;
+}
+#define TRACE_IMX_GPT_SET_FREQ 0
+#define TRACE_IMX_GPT_SET_FREQ_ENABLED 0
+#define TRACE_IMX_GPT_SET_FREQ_BACKEND_DSTATE() (0)
+static inline void trace_imx_gpt_set_freq(uint32_t clksrc, uint32_t freq) {
+ (void)clksrc;
+ (void)freq;
+}
+#define TRACE_IMX_GPT_TIMEOUT 0
+#define TRACE_IMX_GPT_TIMEOUT_ENABLED 0
+#define TRACE_IMX_GPT_TIMEOUT_BACKEND_DSTATE() (0)
+static inline void trace_imx_gpt_timeout(void) {
+}
+#define TRACE_IMX_GPT_WRITE 0
+#define TRACE_IMX_GPT_WRITE_ENABLED 0
+#define TRACE_IMX_GPT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx_gpt_write(const char *name, uint64_t value) {
+ (void)name;
+ (void)value;
+}
+#define TRACE_NPCM7XX_TIMER_IRQ 0
+#define TRACE_NPCM7XX_TIMER_IRQ_ENABLED 0
+#define TRACE_NPCM7XX_TIMER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_timer_irq(const char *id, int timer, int state) {
+ (void)id;
+ (void)timer;
+ (void)state;
+}
+#define TRACE_NPCM7XX_TIMER_READ 0
+#define TRACE_NPCM7XX_TIMER_READ_ENABLED 0
+#define TRACE_NPCM7XX_TIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_timer_read(const char *id, uint64_t offset, uint64_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NPCM7XX_TIMER_WRITE 0
+#define TRACE_NPCM7XX_TIMER_WRITE_ENABLED 0
+#define TRACE_NPCM7XX_TIMER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_npcm7xx_timer_write(const char *id, uint64_t offset, uint64_t value) {
+ (void)id;
+ (void)offset;
+ (void)value;
+}
+#define TRACE_NRF51_TIMER_READ 0
+#define TRACE_NRF51_TIMER_READ_ENABLED 0
+#define TRACE_NRF51_TIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_timer_read(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) {
+ (void)timer_id;
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_NRF51_TIMER_SET_COUNT 0
+#define TRACE_NRF51_TIMER_SET_COUNT_ENABLED 0
+#define TRACE_NRF51_TIMER_SET_COUNT_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_timer_set_count(uint8_t timer_id, uint8_t counter_id, uint32_t value) {
+ (void)timer_id;
+ (void)counter_id;
+ (void)value;
+}
+#define TRACE_NRF51_TIMER_WRITE 0
+#define TRACE_NRF51_TIMER_WRITE_ENABLED 0
+#define TRACE_NRF51_TIMER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nrf51_timer_write(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) {
+ (void)timer_id;
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_PIT_IOPORT_READ 0
+#define TRACE_PIT_IOPORT_READ_ENABLED 0
+#define TRACE_PIT_IOPORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_pit_ioport_read(uint8_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_PIT_IOPORT_WRITE 0
+#define TRACE_PIT_IOPORT_WRITE_ENABLED 0
+#define TRACE_PIT_IOPORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pit_ioport_write(uint8_t addr, uint32_t value) {
+ (void)addr;
+ (void)value;
+}
+#define TRACE_SH_TIMER_READ 0
+#define TRACE_SH_TIMER_READ_ENABLED 0
+#define TRACE_SH_TIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_sh_timer_read(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_SH_TIMER_START_STOP 0
+#define TRACE_SH_TIMER_START_STOP_ENABLED 0
+#define TRACE_SH_TIMER_START_STOP_BACKEND_DSTATE() (0)
+static inline void trace_sh_timer_start_stop(int enable, int current) {
+ (void)enable;
+ (void)current;
+}
+#define TRACE_SH_TIMER_WRITE 0
+#define TRACE_SH_TIMER_WRITE_ENABLED 0
+#define TRACE_SH_TIMER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sh_timer_write(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_SIFIVE_PWM_INTERRUPT 0
+#define TRACE_SIFIVE_PWM_INTERRUPT_ENABLED 0
+#define TRACE_SIFIVE_PWM_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_sifive_pwm_interrupt(int num) {
+ (void)num;
+}
+#define TRACE_SIFIVE_PWM_READ 0
+#define TRACE_SIFIVE_PWM_READ_ENABLED 0
+#define TRACE_SIFIVE_PWM_READ_BACKEND_DSTATE() (0)
+static inline void trace_sifive_pwm_read(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_SIFIVE_PWM_SET_ALARM 0
+#define TRACE_SIFIVE_PWM_SET_ALARM_ENABLED 0
+#define TRACE_SIFIVE_PWM_SET_ALARM_BACKEND_DSTATE() (0)
+static inline void trace_sifive_pwm_set_alarm(uint64_t alarm, uint64_t now) {
+ (void)alarm;
+ (void)now;
+}
+#define TRACE_SIFIVE_PWM_WRITE 0
+#define TRACE_SIFIVE_PWM_WRITE_ENABLED 0
+#define TRACE_SIFIVE_PWM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sifive_pwm_write(uint64_t data, uint64_t offset) {
+ (void)data;
+ (void)offset;
+}
+#define TRACE_SLAVIO_TIMER_GET_OUT 0
+#define TRACE_SLAVIO_TIMER_GET_OUT_ENABLED 0
+#define TRACE_SLAVIO_TIMER_GET_OUT_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) {
+ (void)limit;
+ (void)counthigh;
+ (void)count;
+}
+#define TRACE_SLAVIO_TIMER_IRQ 0
+#define TRACE_SLAVIO_TIMER_IRQ_ENABLED 0
+#define TRACE_SLAVIO_TIMER_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_irq(uint32_t counthigh, uint32_t count) {
+ (void)counthigh;
+ (void)count;
+}
+#define TRACE_SLAVIO_TIMER_MEM_READL 0
+#define TRACE_SLAVIO_TIMER_MEM_READL_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_READL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_readl(uint64_t addr, uint32_t ret) {
+ (void)addr;
+ (void)ret;
+}
+#define TRACE_SLAVIO_TIMER_MEM_READL_INVALID 0
+#define TRACE_SLAVIO_TIMER_MEM_READL_INVALID_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_READL_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_readl_invalid(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_COUNTER_INVALID 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_COUNTER_INVALID_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_COUNTER_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_counter_invalid(void) {
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_INVALID 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_INVALID_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_invalid(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_LIMIT 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_LIMIT_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_LIMIT_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) {
+ (void)timer_index;
+ (void)count;
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_COUNTER 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_COUNTER_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_COUNTER_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_mode_counter(unsigned int timer_index) {
+ (void)timer_index;
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_INVALID 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_INVALID_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_INVALID_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_mode_invalid(void) {
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_USER 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_USER_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_MODE_USER_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_mode_user(unsigned int timer_index) {
+ (void)timer_index;
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_STATUS_START 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_STATUS_START_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_STATUS_START_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_status_start(unsigned int timer_index) {
+ (void)timer_index;
+}
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_STATUS_STOP 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_STATUS_STOP_ENABLED 0
+#define TRACE_SLAVIO_TIMER_MEM_WRITEL_STATUS_STOP_BACKEND_DSTATE() (0)
+static inline void trace_slavio_timer_mem_writel_status_stop(unsigned int timer_index) {
+ (void)timer_index;
+}
+#define TRACE_SSE_COUNTER_CONTROL_READ 0
+#define TRACE_SSE_COUNTER_CONTROL_READ_ENABLED 0
+#define TRACE_SSE_COUNTER_CONTROL_READ_BACKEND_DSTATE() (0)
+static inline void trace_sse_counter_control_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_SSE_COUNTER_CONTROL_WRITE 0
+#define TRACE_SSE_COUNTER_CONTROL_WRITE_ENABLED 0
+#define TRACE_SSE_COUNTER_CONTROL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sse_counter_control_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_SSE_COUNTER_RESET 0
+#define TRACE_SSE_COUNTER_RESET_ENABLED 0
+#define TRACE_SSE_COUNTER_RESET_BACKEND_DSTATE() (0)
+static inline void trace_sse_counter_reset(void) {
+}
+#define TRACE_SSE_COUNTER_STATUS_READ 0
+#define TRACE_SSE_COUNTER_STATUS_READ_ENABLED 0
+#define TRACE_SSE_COUNTER_STATUS_READ_BACKEND_DSTATE() (0)
+static inline void trace_sse_counter_status_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_SSE_COUNTER_STATUS_WRITE 0
+#define TRACE_SSE_COUNTER_STATUS_WRITE_ENABLED 0
+#define TRACE_SSE_COUNTER_STATUS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sse_counter_status_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_SSE_TIMER_READ 0
+#define TRACE_SSE_TIMER_READ_ENABLED 0
+#define TRACE_SSE_TIMER_READ_BACKEND_DSTATE() (0)
+static inline void trace_sse_timer_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_SSE_TIMER_RESET 0
+#define TRACE_SSE_TIMER_RESET_ENABLED 0
+#define TRACE_SSE_TIMER_RESET_BACKEND_DSTATE() (0)
+static inline void trace_sse_timer_reset(void) {
+}
+#define TRACE_SSE_TIMER_WRITE 0
+#define TRACE_SSE_TIMER_WRITE_ENABLED 0
+#define TRACE_SSE_TIMER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_sse_timer_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_SYSTICK_READ 0
+#define TRACE_SYSTICK_READ_ENABLED 0
+#define TRACE_SYSTICK_READ_BACKEND_DSTATE() (0)
+static inline void trace_systick_read(uint64_t addr, uint32_t value, unsigned size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_SYSTICK_RELOAD 0
+#define TRACE_SYSTICK_RELOAD_ENABLED 0
+#define TRACE_SYSTICK_RELOAD_BACKEND_DSTATE() (0)
+static inline void trace_systick_reload(void) {
+}
+#define TRACE_SYSTICK_TIMER_TICK 0
+#define TRACE_SYSTICK_TIMER_TICK_ENABLED 0
+#define TRACE_SYSTICK_TIMER_TICK_BACKEND_DSTATE() (0)
+static inline void trace_systick_timer_tick(void) {
+}
+#define TRACE_SYSTICK_WRITE 0
+#define TRACE_SYSTICK_WRITE_ENABLED 0
+#define TRACE_SYSTICK_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_systick_write(uint64_t addr, uint32_t value, unsigned size) {
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_tpm.h b/trace/trace-hw_tpm.h
new file mode 100644
index 0000000000..6f776f338d
--- /dev/null
+++ b/trace/trace-hw_tpm.h
@@ -0,0 +1,219 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_TPM_H
+#define TRACE_TRACE_HW_TPM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_TPM_CRB_MMIO_READ 0
+#define TRACE_TPM_CRB_MMIO_READ_ENABLED 0
+#define TRACE_TPM_CRB_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_TPM_CRB_MMIO_WRITE 0
+#define TRACE_TPM_CRB_MMIO_WRITE_ENABLED 0
+#define TRACE_TPM_CRB_MMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_TPM_PPI_MEMSET 0
+#define TRACE_TPM_PPI_MEMSET_ENABLED 0
+#define TRACE_TPM_PPI_MEMSET_BACKEND_DSTATE() (0)
+static inline void trace_tpm_ppi_memset(uint8_t *ptr, size_t size) {
+ (void)ptr;
+ (void)size;
+}
+#define TRACE_TPM_SPAPR_CAUGHT_RESPONSE 0
+#define TRACE_TPM_SPAPR_CAUGHT_RESPONSE_ENABLED 0
+#define TRACE_TPM_SPAPR_CAUGHT_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_caught_response(uint32_t v) {
+ (void)v;
+}
+#define TRACE_TPM_SPAPR_DO_CRQ 0
+#define TRACE_TPM_SPAPR_DO_CRQ_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq(uint8_t raw1, uint8_t raw2) {
+ (void)raw1;
+ (void)raw2;
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_CRQ_COMPLETE_RESULT 0
+#define TRACE_TPM_SPAPR_DO_CRQ_CRQ_COMPLETE_RESULT_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_CRQ_COMPLETE_RESULT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_crq_complete_result(void) {
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_CRQ_RESULT 0
+#define TRACE_TPM_SPAPR_DO_CRQ_CRQ_RESULT_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_CRQ_RESULT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_crq_result(void) {
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_GET_VERSION 0
+#define TRACE_TPM_SPAPR_DO_CRQ_GET_VERSION_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_GET_VERSION_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_get_version(uint32_t version) {
+ (void)version;
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_PREPARE_TO_SUSPEND 0
+#define TRACE_TPM_SPAPR_DO_CRQ_PREPARE_TO_SUSPEND_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_PREPARE_TO_SUSPEND_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_prepare_to_suspend(void) {
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_TPM_COMMAND 0
+#define TRACE_TPM_SPAPR_DO_CRQ_TPM_COMMAND_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_TPM_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_tpm_command(void) {
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_TPM_GET_RTCE_BUFFER_SIZE 0
+#define TRACE_TPM_SPAPR_DO_CRQ_TPM_GET_RTCE_BUFFER_SIZE_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_TPM_GET_RTCE_BUFFER_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_tpm_get_rtce_buffer_size(size_t buffersize) {
+ (void)buffersize;
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_UNKNOWN_CRQ 0
+#define TRACE_TPM_SPAPR_DO_CRQ_UNKNOWN_CRQ_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_UNKNOWN_CRQ_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_unknown_crq(uint8_t raw1, uint8_t raw2) {
+ (void)raw1;
+ (void)raw2;
+}
+#define TRACE_TPM_SPAPR_DO_CRQ_UNKNOWN_MSG_TYPE 0
+#define TRACE_TPM_SPAPR_DO_CRQ_UNKNOWN_MSG_TYPE_ENABLED 0
+#define TRACE_TPM_SPAPR_DO_CRQ_UNKNOWN_MSG_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_do_crq_unknown_msg_type(uint8_t type) {
+ (void)type;
+}
+#define TRACE_TPM_SPAPR_POST_LOAD 0
+#define TRACE_TPM_SPAPR_POST_LOAD_ENABLED 0
+#define TRACE_TPM_SPAPR_POST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_tpm_spapr_post_load(void) {
+}
+#define TRACE_TPM_TIS_ABORT 0
+#define TRACE_TPM_TIS_ABORT_ENABLED 0
+#define TRACE_TPM_TIS_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_abort(uint8_t locty) {
+ (void)locty;
+}
+#define TRACE_TPM_TIS_DATA_READ 0
+#define TRACE_TPM_TIS_DATA_READ_ENABLED 0
+#define TRACE_TPM_TIS_DATA_READ_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_data_read(uint32_t value, uint32_t off) {
+ (void)value;
+ (void)off;
+}
+#define TRACE_TPM_TIS_I2C_EVENT 0
+#define TRACE_TPM_TIS_I2C_EVENT_ENABLED 0
+#define TRACE_TPM_TIS_I2C_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_i2c_event(const char *event) {
+ (void)event;
+}
+#define TRACE_TPM_TIS_I2C_RECV 0
+#define TRACE_TPM_TIS_I2C_RECV_ENABLED 0
+#define TRACE_TPM_TIS_I2C_RECV_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_i2c_recv(uint8_t data) {
+ (void)data;
+}
+#define TRACE_TPM_TIS_I2C_SEND 0
+#define TRACE_TPM_TIS_I2C_SEND_ENABLED 0
+#define TRACE_TPM_TIS_I2C_SEND_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_i2c_send(uint8_t data) {
+ (void)data;
+}
+#define TRACE_TPM_TIS_I2C_SEND_REG 0
+#define TRACE_TPM_TIS_I2C_SEND_REG_ENABLED 0
+#define TRACE_TPM_TIS_I2C_SEND_REG_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_i2c_send_reg(const char *name, int reg) {
+ (void)name;
+ (void)reg;
+}
+#define TRACE_TPM_TIS_MMIO_READ 0
+#define TRACE_TPM_TIS_MMIO_READ_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_read(unsigned size, uint32_t addr, uint32_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_TPM_TIS_MMIO_WRITE 0
+#define TRACE_TPM_TIS_MMIO_WRITE_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write(unsigned size, uint32_t addr, uint32_t val) {
+ (void)size;
+ (void)addr;
+ (void)val;
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_DATA2SEND 0
+#define TRACE_TPM_TIS_MMIO_WRITE_DATA2SEND_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_DATA2SEND_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_data2send(uint32_t value, unsigned size) {
+ (void)value;
+ (void)size;
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_INIT_ABORT 0
+#define TRACE_TPM_TIS_MMIO_WRITE_INIT_ABORT_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_INIT_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_init_abort(void) {
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY_REQ_USE 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY_REQ_USE_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY_REQ_USE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_locty_req_use(uint8_t locty) {
+ (void)locty;
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY_SEIZED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY_SEIZED_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY_SEIZED_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_locty_seized(uint8_t locty, uint8_t active) {
+ (void)locty;
+ (void)active;
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY4 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY4_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOCTY4_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_locty4(void) {
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_LOWERING_IRQ 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOWERING_IRQ_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_LOWERING_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_lowering_irq(void) {
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_NEXT_LOCTY 0
+#define TRACE_TPM_TIS_MMIO_WRITE_NEXT_LOCTY_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_NEXT_LOCTY_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_next_locty(uint8_t locty) {
+ (void)locty;
+}
+#define TRACE_TPM_TIS_MMIO_WRITE_RELEASE_LOCTY 0
+#define TRACE_TPM_TIS_MMIO_WRITE_RELEASE_LOCTY_ENABLED 0
+#define TRACE_TPM_TIS_MMIO_WRITE_RELEASE_LOCTY_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_mmio_write_release_locty(uint8_t locty) {
+ (void)locty;
+}
+#define TRACE_TPM_TIS_NEW_ACTIVE_LOCALITY 0
+#define TRACE_TPM_TIS_NEW_ACTIVE_LOCALITY_ENABLED 0
+#define TRACE_TPM_TIS_NEW_ACTIVE_LOCALITY_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_new_active_locality(uint8_t locty) {
+ (void)locty;
+}
+#define TRACE_TPM_TIS_PRE_SAVE 0
+#define TRACE_TPM_TIS_PRE_SAVE_ENABLED 0
+#define TRACE_TPM_TIS_PRE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_pre_save(uint8_t locty, uint32_t rw_offset) {
+ (void)locty;
+ (void)rw_offset;
+}
+#define TRACE_TPM_TIS_RAISE_IRQ 0
+#define TRACE_TPM_TIS_RAISE_IRQ_ENABLED 0
+#define TRACE_TPM_TIS_RAISE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_tpm_tis_raise_irq(uint32_t irqmask) {
+ (void)irqmask;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_uefi.h b/trace/trace-hw_uefi.h
new file mode 100644
index 0000000000..126de6c316
--- /dev/null
+++ b/trace/trace-hw_uefi.h
@@ -0,0 +1,79 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_UEFI_H
+#define TRACE_TRACE_HW_UEFI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_UEFI_EVENT 0
+#define TRACE_UEFI_EVENT_ENABLED 0
+#define TRACE_UEFI_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_uefi_event(const char *name) {
+ (void)name;
+}
+#define TRACE_UEFI_HARD_RESET 0
+#define TRACE_UEFI_HARD_RESET_ENABLED 0
+#define TRACE_UEFI_HARD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_uefi_hard_reset(void) {
+}
+#define TRACE_UEFI_REG_READ 0
+#define TRACE_UEFI_REG_READ_ENABLED 0
+#define TRACE_UEFI_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_uefi_reg_read(uint64_t addr, unsigned size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_UEFI_REG_WRITE 0
+#define TRACE_UEFI_REG_WRITE_ENABLED 0
+#define TRACE_UEFI_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_uefi_reg_write(uint64_t addr, uint64_t val, unsigned size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_UEFI_STATUS 0
+#define TRACE_UEFI_STATUS_ENABLED 0
+#define TRACE_UEFI_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_uefi_status(const char *context, const char *name) {
+ (void)context;
+ (void)name;
+}
+#define TRACE_UEFI_VARIABLE 0
+#define TRACE_UEFI_VARIABLE_ENABLED 0
+#define TRACE_UEFI_VARIABLE_BACKEND_DSTATE() (0)
+static inline void trace_uefi_variable(const char *context, const char *name, uint64_t size, const char *uuid) {
+ (void)context;
+ (void)name;
+ (void)size;
+ (void)uuid;
+}
+#define TRACE_UEFI_VARS_POLICY_CMD 0
+#define TRACE_UEFI_VARS_POLICY_CMD_ENABLED 0
+#define TRACE_UEFI_VARS_POLICY_CMD_BACKEND_DSTATE() (0)
+static inline void trace_uefi_vars_policy_cmd(const char *cmd) {
+ (void)cmd;
+}
+#define TRACE_UEFI_VARS_POLICY_DENY 0
+#define TRACE_UEFI_VARS_POLICY_DENY_ENABLED 0
+#define TRACE_UEFI_VARS_POLICY_DENY_BACKEND_DSTATE() (0)
+static inline void trace_uefi_vars_policy_deny(const char *reason) {
+ (void)reason;
+}
+#define TRACE_UEFI_VARS_PROTO_CMD 0
+#define TRACE_UEFI_VARS_PROTO_CMD_ENABLED 0
+#define TRACE_UEFI_VARS_PROTO_CMD_BACKEND_DSTATE() (0)
+static inline void trace_uefi_vars_proto_cmd(const char *cmd) {
+ (void)cmd;
+}
+#define TRACE_UEFI_VARS_SECURITY_VIOLATION 0
+#define TRACE_UEFI_VARS_SECURITY_VIOLATION_ENABLED 0
+#define TRACE_UEFI_VARS_SECURITY_VIOLATION_BACKEND_DSTATE() (0)
+static inline void trace_uefi_vars_security_violation(const char *reason) {
+ (void)reason;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_ufs.h b/trace/trace-hw_ufs.h
new file mode 100644
index 0000000000..2496a858a6
--- /dev/null
+++ b/trace/trace-hw_ufs.h
@@ -0,0 +1,320 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_UFS_H
+#define TRACE_TRACE_HW_UFS_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_UFS_COMPLETE_REQ 0
+#define TRACE_UFS_COMPLETE_REQ_ENABLED 0
+#define TRACE_UFS_COMPLETE_REQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_complete_req(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_UFS_ERR_DMA_READ_PRDT 0
+#define TRACE_UFS_ERR_DMA_READ_PRDT_ENABLED 0
+#define TRACE_UFS_ERR_DMA_READ_PRDT_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_dma_read_prdt(uint32_t slot, uint64_t addr) {
+ (void)slot;
+ (void)addr;
+}
+#define TRACE_UFS_ERR_DMA_READ_REQ_UPIU 0
+#define TRACE_UFS_ERR_DMA_READ_REQ_UPIU_ENABLED 0
+#define TRACE_UFS_ERR_DMA_READ_REQ_UPIU_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_dma_read_req_upiu(uint32_t slot, uint64_t addr) {
+ (void)slot;
+ (void)addr;
+}
+#define TRACE_UFS_ERR_DMA_READ_SQ 0
+#define TRACE_UFS_ERR_DMA_READ_SQ_ENABLED 0
+#define TRACE_UFS_ERR_DMA_READ_SQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_dma_read_sq(uint8_t sqid, uint64_t addr) {
+ (void)sqid;
+ (void)addr;
+}
+#define TRACE_UFS_ERR_DMA_READ_UTRD 0
+#define TRACE_UFS_ERR_DMA_READ_UTRD_ENABLED 0
+#define TRACE_UFS_ERR_DMA_READ_UTRD_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_dma_read_utrd(uint32_t slot, uint64_t addr) {
+ (void)slot;
+ (void)addr;
+}
+#define TRACE_UFS_ERR_DMA_WRITE_CQ 0
+#define TRACE_UFS_ERR_DMA_WRITE_CQ_ENABLED 0
+#define TRACE_UFS_ERR_DMA_WRITE_CQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_dma_write_cq(uint8_t cqid, uint64_t addr) {
+ (void)cqid;
+ (void)addr;
+}
+#define TRACE_UFS_ERR_DMA_WRITE_RSP_UPIU 0
+#define TRACE_UFS_ERR_DMA_WRITE_RSP_UPIU_ENABLED 0
+#define TRACE_UFS_ERR_DMA_WRITE_RSP_UPIU_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_dma_write_rsp_upiu(uint32_t slot, uint64_t addr) {
+ (void)slot;
+ (void)addr;
+}
+#define TRACE_UFS_ERR_DMA_WRITE_UTRD 0
+#define TRACE_UFS_ERR_DMA_WRITE_UTRD_ENABLED 0
+#define TRACE_UFS_ERR_DMA_WRITE_UTRD_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_dma_write_utrd(uint32_t slot, uint64_t addr) {
+ (void)slot;
+ (void)addr;
+}
+#define TRACE_UFS_ERR_INVALID_REGISTER_OFFSET 0
+#define TRACE_UFS_ERR_INVALID_REGISTER_OFFSET_ENABLED 0
+#define TRACE_UFS_ERR_INVALID_REGISTER_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_invalid_register_offset(uint32_t offset) {
+ (void)offset;
+}
+#define TRACE_UFS_ERR_INVALID_TRANS_CODE 0
+#define TRACE_UFS_ERR_INVALID_TRANS_CODE_ENABLED 0
+#define TRACE_UFS_ERR_INVALID_TRANS_CODE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_invalid_trans_code(uint32_t slot, uint8_t trans_code) {
+ (void)slot;
+ (void)trans_code;
+}
+#define TRACE_UFS_ERR_MCQ_CREATE_CQ_ALREADY_EXISTS 0
+#define TRACE_UFS_ERR_MCQ_CREATE_CQ_ALREADY_EXISTS_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_CREATE_CQ_ALREADY_EXISTS_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_create_cq_already_exists(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_CREATE_CQ_INVALID_CQID 0
+#define TRACE_UFS_ERR_MCQ_CREATE_CQ_INVALID_CQID_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_CREATE_CQ_INVALID_CQID_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_create_cq_invalid_cqid(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_ALREADY_EXISTS 0
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_ALREADY_EXISTS_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_ALREADY_EXISTS_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_create_sq_already_exists(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_INVALID_CQID 0
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_INVALID_CQID_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_INVALID_CQID_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_create_sq_invalid_cqid(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_INVALID_SQID 0
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_INVALID_SQID_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_CREATE_SQ_INVALID_SQID_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_create_sq_invalid_sqid(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_DB_WR_INVALID_DB 0
+#define TRACE_UFS_ERR_MCQ_DB_WR_INVALID_DB_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_DB_WR_INVALID_DB_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_db_wr_invalid_db(uint8_t qid, uint32_t db) {
+ (void)qid;
+ (void)db;
+}
+#define TRACE_UFS_ERR_MCQ_DB_WR_INVALID_SQID 0
+#define TRACE_UFS_ERR_MCQ_DB_WR_INVALID_SQID_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_DB_WR_INVALID_SQID_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_db_wr_invalid_sqid(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_INVALID_CQID 0
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_INVALID_CQID_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_INVALID_CQID_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_delete_cq_invalid_cqid(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_NOT_EXISTS 0
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_NOT_EXISTS_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_NOT_EXISTS_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_delete_cq_not_exists(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_SQ_NOT_DELETED 0
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_SQ_NOT_DELETED_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_DELETE_CQ_SQ_NOT_DELETED_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_delete_cq_sq_not_deleted(uint8_t sqid, uint8_t cqid) {
+ (void)sqid;
+ (void)cqid;
+}
+#define TRACE_UFS_ERR_MCQ_DELETE_SQ_INVALID_SQID 0
+#define TRACE_UFS_ERR_MCQ_DELETE_SQ_INVALID_SQID_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_DELETE_SQ_INVALID_SQID_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_delete_sq_invalid_sqid(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_MCQ_DELETE_SQ_NOT_EXISTS 0
+#define TRACE_UFS_ERR_MCQ_DELETE_SQ_NOT_EXISTS_ENABLED 0
+#define TRACE_UFS_ERR_MCQ_DELETE_SQ_NOT_EXISTS_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_mcq_delete_sq_not_exists(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_ERR_QUERY_ATTR_NOT_READABLE 0
+#define TRACE_UFS_ERR_QUERY_ATTR_NOT_READABLE_ENABLED 0
+#define TRACE_UFS_ERR_QUERY_ATTR_NOT_READABLE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_query_attr_not_readable(uint8_t idn) {
+ (void)idn;
+}
+#define TRACE_UFS_ERR_QUERY_ATTR_NOT_WRITABLE 0
+#define TRACE_UFS_ERR_QUERY_ATTR_NOT_WRITABLE_ENABLED 0
+#define TRACE_UFS_ERR_QUERY_ATTR_NOT_WRITABLE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_query_attr_not_writable(uint8_t idn) {
+ (void)idn;
+}
+#define TRACE_UFS_ERR_QUERY_FLAG_NOT_READABLE 0
+#define TRACE_UFS_ERR_QUERY_FLAG_NOT_READABLE_ENABLED 0
+#define TRACE_UFS_ERR_QUERY_FLAG_NOT_READABLE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_query_flag_not_readable(uint8_t idn) {
+ (void)idn;
+}
+#define TRACE_UFS_ERR_QUERY_FLAG_NOT_WRITABLE 0
+#define TRACE_UFS_ERR_QUERY_FLAG_NOT_WRITABLE_ENABLED 0
+#define TRACE_UFS_ERR_QUERY_FLAG_NOT_WRITABLE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_query_flag_not_writable(uint8_t idn) {
+ (void)idn;
+}
+#define TRACE_UFS_ERR_QUERY_INVALID_IDN 0
+#define TRACE_UFS_ERR_QUERY_INVALID_IDN_ENABLED 0
+#define TRACE_UFS_ERR_QUERY_INVALID_IDN_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_query_invalid_idn(uint8_t opcode, uint8_t idn) {
+ (void)opcode;
+ (void)idn;
+}
+#define TRACE_UFS_ERR_QUERY_INVALID_INDEX 0
+#define TRACE_UFS_ERR_QUERY_INVALID_INDEX_ENABLED 0
+#define TRACE_UFS_ERR_QUERY_INVALID_INDEX_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_query_invalid_index(uint8_t opcode, uint8_t index) {
+ (void)opcode;
+ (void)index;
+}
+#define TRACE_UFS_ERR_QUERY_INVALID_OPCODE 0
+#define TRACE_UFS_ERR_QUERY_INVALID_OPCODE_ENABLED 0
+#define TRACE_UFS_ERR_QUERY_INVALID_OPCODE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_query_invalid_opcode(uint8_t opcode) {
+ (void)opcode;
+}
+#define TRACE_UFS_ERR_SCSI_CMD_INVALID_LUN 0
+#define TRACE_UFS_ERR_SCSI_CMD_INVALID_LUN_ENABLED 0
+#define TRACE_UFS_ERR_SCSI_CMD_INVALID_LUN_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_scsi_cmd_invalid_lun(uint8_t lun) {
+ (void)lun;
+}
+#define TRACE_UFS_ERR_UNSUPPORT_REGISTER_OFFSET 0
+#define TRACE_UFS_ERR_UNSUPPORT_REGISTER_OFFSET_ENABLED 0
+#define TRACE_UFS_ERR_UNSUPPORT_REGISTER_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_unsupport_register_offset(uint32_t offset) {
+ (void)offset;
+}
+#define TRACE_UFS_ERR_UTRL_SLOT_BUSY 0
+#define TRACE_UFS_ERR_UTRL_SLOT_BUSY_ENABLED 0
+#define TRACE_UFS_ERR_UTRL_SLOT_BUSY_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_utrl_slot_busy(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_UFS_ERR_UTRL_SLOT_ERROR 0
+#define TRACE_UFS_ERR_UTRL_SLOT_ERROR_ENABLED 0
+#define TRACE_UFS_ERR_UTRL_SLOT_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_ufs_err_utrl_slot_error(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_UFS_EXEC_NOP_CMD 0
+#define TRACE_UFS_EXEC_NOP_CMD_ENABLED 0
+#define TRACE_UFS_EXEC_NOP_CMD_BACKEND_DSTATE() (0)
+static inline void trace_ufs_exec_nop_cmd(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_UFS_EXEC_QUERY_CMD 0
+#define TRACE_UFS_EXEC_QUERY_CMD_ENABLED 0
+#define TRACE_UFS_EXEC_QUERY_CMD_BACKEND_DSTATE() (0)
+static inline void trace_ufs_exec_query_cmd(uint32_t slot, uint8_t opcode) {
+ (void)slot;
+ (void)opcode;
+}
+#define TRACE_UFS_EXEC_SCSI_CMD 0
+#define TRACE_UFS_EXEC_SCSI_CMD_ENABLED 0
+#define TRACE_UFS_EXEC_SCSI_CMD_BACKEND_DSTATE() (0)
+static inline void trace_ufs_exec_scsi_cmd(uint32_t slot, uint8_t lun, uint8_t opcode) {
+ (void)slot;
+ (void)lun;
+ (void)opcode;
+}
+#define TRACE_UFS_IRQ_LOWER 0
+#define TRACE_UFS_IRQ_LOWER_ENABLED 0
+#define TRACE_UFS_IRQ_LOWER_BACKEND_DSTATE() (0)
+static inline void trace_ufs_irq_lower(void) {
+}
+#define TRACE_UFS_IRQ_RAISE 0
+#define TRACE_UFS_IRQ_RAISE_ENABLED 0
+#define TRACE_UFS_IRQ_RAISE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_irq_raise(void) {
+}
+#define TRACE_UFS_MCQ_COMPLETE_REQ 0
+#define TRACE_UFS_MCQ_COMPLETE_REQ_ENABLED 0
+#define TRACE_UFS_MCQ_COMPLETE_REQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_mcq_complete_req(uint8_t qid) {
+ (void)qid;
+}
+#define TRACE_UFS_MCQ_CREATE_CQ 0
+#define TRACE_UFS_MCQ_CREATE_CQ_ENABLED 0
+#define TRACE_UFS_MCQ_CREATE_CQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_mcq_create_cq(uint8_t cqid, uint64_t addr, uint16_t size) {
+ (void)cqid;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_UFS_MCQ_CREATE_SQ 0
+#define TRACE_UFS_MCQ_CREATE_SQ_ENABLED 0
+#define TRACE_UFS_MCQ_CREATE_SQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_mcq_create_sq(uint8_t sqid, uint8_t cqid, uint64_t addr, uint16_t size) {
+ (void)sqid;
+ (void)cqid;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_UFS_MMIO_READ 0
+#define TRACE_UFS_MMIO_READ_ENABLED 0
+#define TRACE_UFS_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_mmio_read(uint64_t addr, uint64_t data, unsigned size) {
+ (void)addr;
+ (void)data;
+ (void)size;
+}
+#define TRACE_UFS_MMIO_WRITE 0
+#define TRACE_UFS_MMIO_WRITE_ENABLED 0
+#define TRACE_UFS_MMIO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_ufs_mmio_write(uint64_t addr, uint64_t data, unsigned size) {
+ (void)addr;
+ (void)data;
+ (void)size;
+}
+#define TRACE_UFS_PROCESS_DB 0
+#define TRACE_UFS_PROCESS_DB_ENABLED 0
+#define TRACE_UFS_PROCESS_DB_BACKEND_DSTATE() (0)
+static inline void trace_ufs_process_db(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_UFS_PROCESS_REQ 0
+#define TRACE_UFS_PROCESS_REQ_ENABLED 0
+#define TRACE_UFS_PROCESS_REQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_process_req(uint32_t slot) {
+ (void)slot;
+}
+#define TRACE_UFS_PROCESS_UICCMD 0
+#define TRACE_UFS_PROCESS_UICCMD_ENABLED 0
+#define TRACE_UFS_PROCESS_UICCMD_BACKEND_DSTATE() (0)
+static inline void trace_ufs_process_uiccmd(uint32_t uiccmd, uint32_t ucmdarg1, uint32_t ucmdarg2, uint32_t ucmdarg3) {
+ (void)uiccmd;
+ (void)ucmdarg1;
+ (void)ucmdarg2;
+ (void)ucmdarg3;
+}
+#define TRACE_UFS_SENDBACK_REQ 0
+#define TRACE_UFS_SENDBACK_REQ_ENABLED 0
+#define TRACE_UFS_SENDBACK_REQ_BACKEND_DSTATE() (0)
+static inline void trace_ufs_sendback_req(uint32_t slot) {
+ (void)slot;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_usb.h b/trace/trace-hw_usb.h
new file mode 100644
index 0000000000..e59863e1f9
--- /dev/null
+++ b/trace/trace-hw_usb.h
@@ -0,0 +1,2485 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_USB_H
+#define TRACE_TRACE_HW_USB_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CANOKEY_EMU_PREPARE_RECEIVE 0
+#define TRACE_CANOKEY_EMU_PREPARE_RECEIVE_ENABLED 0
+#define TRACE_CANOKEY_EMU_PREPARE_RECEIVE_BACKEND_DSTATE() (0)
+static inline void trace_canokey_emu_prepare_receive(uint8_t ep, uint16_t size) {
+ (void)ep;
+ (void)size;
+}
+#define TRACE_CANOKEY_EMU_SET_ADDRESS 0
+#define TRACE_CANOKEY_EMU_SET_ADDRESS_ENABLED 0
+#define TRACE_CANOKEY_EMU_SET_ADDRESS_BACKEND_DSTATE() (0)
+static inline void trace_canokey_emu_set_address(uint8_t addr) {
+ (void)addr;
+}
+#define TRACE_CANOKEY_EMU_STALL_EP 0
+#define TRACE_CANOKEY_EMU_STALL_EP_ENABLED 0
+#define TRACE_CANOKEY_EMU_STALL_EP_BACKEND_DSTATE() (0)
+static inline void trace_canokey_emu_stall_ep(uint8_t ep) {
+ (void)ep;
+}
+#define TRACE_CANOKEY_EMU_TRANSMIT 0
+#define TRACE_CANOKEY_EMU_TRANSMIT_ENABLED 0
+#define TRACE_CANOKEY_EMU_TRANSMIT_BACKEND_DSTATE() (0)
+static inline void trace_canokey_emu_transmit(uint8_t ep, uint16_t size) {
+ (void)ep;
+ (void)size;
+}
+#define TRACE_CANOKEY_HANDLE_CONTROL_IN 0
+#define TRACE_CANOKEY_HANDLE_CONTROL_IN_ENABLED 0
+#define TRACE_CANOKEY_HANDLE_CONTROL_IN_BACKEND_DSTATE() (0)
+static inline void trace_canokey_handle_control_in(int actual_len) {
+ (void)actual_len;
+}
+#define TRACE_CANOKEY_HANDLE_CONTROL_OUT 0
+#define TRACE_CANOKEY_HANDLE_CONTROL_OUT_ENABLED 0
+#define TRACE_CANOKEY_HANDLE_CONTROL_OUT_BACKEND_DSTATE() (0)
+static inline void trace_canokey_handle_control_out(void) {
+}
+#define TRACE_CANOKEY_HANDLE_CONTROL_SETUP 0
+#define TRACE_CANOKEY_HANDLE_CONTROL_SETUP_ENABLED 0
+#define TRACE_CANOKEY_HANDLE_CONTROL_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_canokey_handle_control_setup(int request, int value, int index, int length) {
+ (void)request;
+ (void)value;
+ (void)index;
+ (void)length;
+}
+#define TRACE_CANOKEY_HANDLE_DATA_IN 0
+#define TRACE_CANOKEY_HANDLE_DATA_IN_ENABLED 0
+#define TRACE_CANOKEY_HANDLE_DATA_IN_BACKEND_DSTATE() (0)
+static inline void trace_canokey_handle_data_in(uint8_t ep_in, uint32_t in_len) {
+ (void)ep_in;
+ (void)in_len;
+}
+#define TRACE_CANOKEY_HANDLE_DATA_OUT 0
+#define TRACE_CANOKEY_HANDLE_DATA_OUT_ENABLED 0
+#define TRACE_CANOKEY_HANDLE_DATA_OUT_BACKEND_DSTATE() (0)
+static inline void trace_canokey_handle_data_out(uint8_t ep_out, uint32_t out_len) {
+ (void)ep_out;
+ (void)out_len;
+}
+#define TRACE_CANOKEY_HANDLE_RESET 0
+#define TRACE_CANOKEY_HANDLE_RESET_ENABLED 0
+#define TRACE_CANOKEY_HANDLE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_canokey_handle_reset(void) {
+}
+#define TRACE_CANOKEY_REALIZE 0
+#define TRACE_CANOKEY_REALIZE_ENABLED 0
+#define TRACE_CANOKEY_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_canokey_realize(void) {
+}
+#define TRACE_CANOKEY_THREAD_START 0
+#define TRACE_CANOKEY_THREAD_START_ENABLED 0
+#define TRACE_CANOKEY_THREAD_START_BACKEND_DSTATE() (0)
+static inline void trace_canokey_thread_start(void) {
+}
+#define TRACE_CANOKEY_THREAD_STOP 0
+#define TRACE_CANOKEY_THREAD_STOP_ENABLED 0
+#define TRACE_CANOKEY_THREAD_STOP_BACKEND_DSTATE() (0)
+static inline void trace_canokey_thread_stop(void) {
+}
+#define TRACE_CANOKEY_UNREALIZE 0
+#define TRACE_CANOKEY_UNREALIZE_ENABLED 0
+#define TRACE_CANOKEY_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_canokey_unrealize(void) {
+}
+#define TRACE_USB_CLEAR_DEVICE_FEATURE 0
+#define TRACE_USB_CLEAR_DEVICE_FEATURE_ENABLED 0
+#define TRACE_USB_CLEAR_DEVICE_FEATURE_BACKEND_DSTATE() (0)
+static inline void trace_usb_clear_device_feature(int addr, int feature, int ret) {
+ (void)addr;
+ (void)feature;
+ (void)ret;
+}
+#define TRACE_USB_DESC_BOS 0
+#define TRACE_USB_DESC_BOS_ENABLED 0
+#define TRACE_USB_DESC_BOS_BACKEND_DSTATE() (0)
+static inline void trace_usb_desc_bos(int addr, int len, int ret) {
+ (void)addr;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_DESC_CONFIG 0
+#define TRACE_USB_DESC_CONFIG_ENABLED 0
+#define TRACE_USB_DESC_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_usb_desc_config(int addr, int index, int len, int ret) {
+ (void)addr;
+ (void)index;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_DESC_DEVICE 0
+#define TRACE_USB_DESC_DEVICE_ENABLED 0
+#define TRACE_USB_DESC_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_usb_desc_device(int addr, int len, int ret) {
+ (void)addr;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_DESC_DEVICE_QUALIFIER 0
+#define TRACE_USB_DESC_DEVICE_QUALIFIER_ENABLED 0
+#define TRACE_USB_DESC_DEVICE_QUALIFIER_BACKEND_DSTATE() (0)
+static inline void trace_usb_desc_device_qualifier(int addr, int len, int ret) {
+ (void)addr;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_DESC_MSOS 0
+#define TRACE_USB_DESC_MSOS_ENABLED 0
+#define TRACE_USB_DESC_MSOS_BACKEND_DSTATE() (0)
+static inline void trace_usb_desc_msos(int addr, int index, int len, int ret) {
+ (void)addr;
+ (void)index;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_DESC_OTHER_SPEED_CONFIG 0
+#define TRACE_USB_DESC_OTHER_SPEED_CONFIG_ENABLED 0
+#define TRACE_USB_DESC_OTHER_SPEED_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_usb_desc_other_speed_config(int addr, int index, int len, int ret) {
+ (void)addr;
+ (void)index;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_DESC_STRING 0
+#define TRACE_USB_DESC_STRING_ENABLED 0
+#define TRACE_USB_DESC_STRING_BACKEND_DSTATE() (0)
+static inline void trace_usb_desc_string(int addr, int index, int len, int ret) {
+ (void)addr;
+ (void)index;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_DWC2_ASYNC_PACKET 0
+#define TRACE_USB_DWC2_ASYNC_PACKET_ENABLED 0
+#define TRACE_USB_DWC2_ASYNC_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_async_packet(void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) {
+ (void)pkt;
+ (void)chan;
+ (void)dev;
+ (void)ep;
+ (void)dir;
+ (void)len;
+}
+#define TRACE_USB_DWC2_ASYNC_PACKET_COMPLETE 0
+#define TRACE_USB_DWC2_ASYNC_PACKET_COMPLETE_ENABLED 0
+#define TRACE_USB_DWC2_ASYNC_PACKET_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_async_packet_complete(void *port, void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) {
+ (void)port;
+ (void)pkt;
+ (void)chan;
+ (void)dev;
+ (void)ep;
+ (void)dir;
+ (void)len;
+}
+#define TRACE_USB_DWC2_ATTACH 0
+#define TRACE_USB_DWC2_ATTACH_ENABLED 0
+#define TRACE_USB_DWC2_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_attach(void *port) {
+ (void)port;
+}
+#define TRACE_USB_DWC2_ATTACH_SPEED 0
+#define TRACE_USB_DWC2_ATTACH_SPEED_ENABLED 0
+#define TRACE_USB_DWC2_ATTACH_SPEED_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_attach_speed(const char *speed) {
+ (void)speed;
+}
+#define TRACE_USB_DWC2_BUS_START 0
+#define TRACE_USB_DWC2_BUS_START_ENABLED 0
+#define TRACE_USB_DWC2_BUS_START_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_bus_start(void) {
+}
+#define TRACE_USB_DWC2_BUS_STOP 0
+#define TRACE_USB_DWC2_BUS_STOP_ENABLED 0
+#define TRACE_USB_DWC2_BUS_STOP_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_bus_stop(void) {
+}
+#define TRACE_USB_DWC2_CHILD_DETACH 0
+#define TRACE_USB_DWC2_CHILD_DETACH_ENABLED 0
+#define TRACE_USB_DWC2_CHILD_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_child_detach(void *port, void *child) {
+ (void)port;
+ (void)child;
+}
+#define TRACE_USB_DWC2_DETACH 0
+#define TRACE_USB_DWC2_DETACH_ENABLED 0
+#define TRACE_USB_DWC2_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_detach(void *port) {
+ (void)port;
+}
+#define TRACE_USB_DWC2_DEVICE_FOUND 0
+#define TRACE_USB_DWC2_DEVICE_FOUND_ENABLED 0
+#define TRACE_USB_DWC2_DEVICE_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_device_found(uint32_t pnum) {
+ (void)pnum;
+}
+#define TRACE_USB_DWC2_DEVICE_NOT_FOUND 0
+#define TRACE_USB_DWC2_DEVICE_NOT_FOUND_ENABLED 0
+#define TRACE_USB_DWC2_DEVICE_NOT_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_device_not_found(void) {
+}
+#define TRACE_USB_DWC2_ENABLE_CHAN 0
+#define TRACE_USB_DWC2_ENABLE_CHAN_ENABLED 0
+#define TRACE_USB_DWC2_ENABLE_CHAN_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_enable_chan(uint32_t chan, void *dev, void *pkt, uint32_t ep) {
+ (void)chan;
+ (void)dev;
+ (void)pkt;
+ (void)ep;
+}
+#define TRACE_USB_DWC2_FIND_DEVICE 0
+#define TRACE_USB_DWC2_FIND_DEVICE_ENABLED 0
+#define TRACE_USB_DWC2_FIND_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_find_device(uint8_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_DWC2_FSZREG_READ 0
+#define TRACE_USB_DWC2_FSZREG_READ_ENABLED 0
+#define TRACE_USB_DWC2_FSZREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_fszreg_read(uint64_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_USB_DWC2_FSZREG_WRITE 0
+#define TRACE_USB_DWC2_FSZREG_WRITE_ENABLED 0
+#define TRACE_USB_DWC2_FSZREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_fszreg_write(uint64_t addr, uint64_t val, uint32_t old, uint64_t result) {
+ (void)addr;
+ (void)val;
+ (void)old;
+ (void)result;
+}
+#define TRACE_USB_DWC2_GLBREG_READ 0
+#define TRACE_USB_DWC2_GLBREG_READ_ENABLED 0
+#define TRACE_USB_DWC2_GLBREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_glbreg_read(uint64_t addr, const char *reg, uint32_t val) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+}
+#define TRACE_USB_DWC2_GLBREG_WRITE 0
+#define TRACE_USB_DWC2_GLBREG_WRITE_ENABLED 0
+#define TRACE_USB_DWC2_GLBREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_glbreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+ (void)old;
+ (void)result;
+}
+#define TRACE_USB_DWC2_HANDLE_PACKET 0
+#define TRACE_USB_DWC2_HANDLE_PACKET_ENABLED 0
+#define TRACE_USB_DWC2_HANDLE_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_handle_packet(uint32_t chan, void *dev, void *pkt, uint32_t ep, const char *type, const char *dir, uint32_t mps, uint32_t len, uint32_t pcnt) {
+ (void)chan;
+ (void)dev;
+ (void)pkt;
+ (void)ep;
+ (void)type;
+ (void)dir;
+ (void)mps;
+ (void)len;
+ (void)pcnt;
+}
+#define TRACE_USB_DWC2_HREG0_ACTION 0
+#define TRACE_USB_DWC2_HREG0_ACTION_ENABLED 0
+#define TRACE_USB_DWC2_HREG0_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_hreg0_action(const char *s) {
+ (void)s;
+}
+#define TRACE_USB_DWC2_HREG0_READ 0
+#define TRACE_USB_DWC2_HREG0_READ_ENABLED 0
+#define TRACE_USB_DWC2_HREG0_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_hreg0_read(uint64_t addr, const char *reg, uint32_t val) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+}
+#define TRACE_USB_DWC2_HREG0_WRITE 0
+#define TRACE_USB_DWC2_HREG0_WRITE_ENABLED 0
+#define TRACE_USB_DWC2_HREG0_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_hreg0_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+ (void)old;
+ (void)result;
+}
+#define TRACE_USB_DWC2_HREG1_READ 0
+#define TRACE_USB_DWC2_HREG1_READ_ENABLED 0
+#define TRACE_USB_DWC2_HREG1_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_hreg1_read(uint64_t addr, const char *reg, uint64_t chan, uint32_t val) {
+ (void)addr;
+ (void)reg;
+ (void)chan;
+ (void)val;
+}
+#define TRACE_USB_DWC2_HREG1_WRITE 0
+#define TRACE_USB_DWC2_HREG1_WRITE_ENABLED 0
+#define TRACE_USB_DWC2_HREG1_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_hreg1_write(uint64_t addr, const char *reg, uint64_t chan, uint64_t val, uint32_t old, uint64_t result) {
+ (void)addr;
+ (void)reg;
+ (void)chan;
+ (void)val;
+ (void)old;
+ (void)result;
+}
+#define TRACE_USB_DWC2_HREG2_READ 0
+#define TRACE_USB_DWC2_HREG2_READ_ENABLED 0
+#define TRACE_USB_DWC2_HREG2_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_hreg2_read(uint64_t addr, uint64_t fifo, uint32_t val) {
+ (void)addr;
+ (void)fifo;
+ (void)val;
+}
+#define TRACE_USB_DWC2_HREG2_WRITE 0
+#define TRACE_USB_DWC2_HREG2_WRITE_ENABLED 0
+#define TRACE_USB_DWC2_HREG2_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_hreg2_write(uint64_t addr, uint64_t fifo, uint64_t val, uint32_t old, uint64_t result) {
+ (void)addr;
+ (void)fifo;
+ (void)val;
+ (void)old;
+ (void)result;
+}
+#define TRACE_USB_DWC2_LOWER_GLOBAL_IRQ 0
+#define TRACE_USB_DWC2_LOWER_GLOBAL_IRQ_ENABLED 0
+#define TRACE_USB_DWC2_LOWER_GLOBAL_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_lower_global_irq(uint32_t intr) {
+ (void)intr;
+}
+#define TRACE_USB_DWC2_LOWER_HOST_IRQ 0
+#define TRACE_USB_DWC2_LOWER_HOST_IRQ_ENABLED 0
+#define TRACE_USB_DWC2_LOWER_HOST_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_lower_host_irq(uint32_t intr) {
+ (void)intr;
+}
+#define TRACE_USB_DWC2_MEMORY_READ 0
+#define TRACE_USB_DWC2_MEMORY_READ_ENABLED 0
+#define TRACE_USB_DWC2_MEMORY_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_memory_read(uint32_t addr, uint32_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_USB_DWC2_MEMORY_WRITE 0
+#define TRACE_USB_DWC2_MEMORY_WRITE_ENABLED 0
+#define TRACE_USB_DWC2_MEMORY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_memory_write(uint32_t addr, uint32_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_USB_DWC2_PACKET_DONE 0
+#define TRACE_USB_DWC2_PACKET_DONE_ENABLED 0
+#define TRACE_USB_DWC2_PACKET_DONE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_packet_done(const char *status, uint32_t actual, uint32_t len, uint32_t pcnt) {
+ (void)status;
+ (void)actual;
+ (void)len;
+ (void)pcnt;
+}
+#define TRACE_USB_DWC2_PACKET_ERROR 0
+#define TRACE_USB_DWC2_PACKET_ERROR_ENABLED 0
+#define TRACE_USB_DWC2_PACKET_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_packet_error(const char *status) {
+ (void)status;
+}
+#define TRACE_USB_DWC2_PACKET_NEXT 0
+#define TRACE_USB_DWC2_PACKET_NEXT_ENABLED 0
+#define TRACE_USB_DWC2_PACKET_NEXT_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_packet_next(const char *status, uint32_t len, uint32_t pcnt) {
+ (void)status;
+ (void)len;
+ (void)pcnt;
+}
+#define TRACE_USB_DWC2_PACKET_STATUS 0
+#define TRACE_USB_DWC2_PACKET_STATUS_ENABLED 0
+#define TRACE_USB_DWC2_PACKET_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_packet_status(const char *status, uint32_t len) {
+ (void)status;
+ (void)len;
+}
+#define TRACE_USB_DWC2_PCGREG_READ 0
+#define TRACE_USB_DWC2_PCGREG_READ_ENABLED 0
+#define TRACE_USB_DWC2_PCGREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_pcgreg_read(uint64_t addr, const char *reg, uint32_t val) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+}
+#define TRACE_USB_DWC2_PCGREG_WRITE 0
+#define TRACE_USB_DWC2_PCGREG_WRITE_ENABLED 0
+#define TRACE_USB_DWC2_PCGREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_pcgreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) {
+ (void)addr;
+ (void)reg;
+ (void)val;
+ (void)old;
+ (void)result;
+}
+#define TRACE_USB_DWC2_PORT_DISABLED 0
+#define TRACE_USB_DWC2_PORT_DISABLED_ENABLED 0
+#define TRACE_USB_DWC2_PORT_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_port_disabled(uint32_t pnum) {
+ (void)pnum;
+}
+#define TRACE_USB_DWC2_RAISE_GLOBAL_IRQ 0
+#define TRACE_USB_DWC2_RAISE_GLOBAL_IRQ_ENABLED 0
+#define TRACE_USB_DWC2_RAISE_GLOBAL_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_raise_global_irq(uint32_t intr) {
+ (void)intr;
+}
+#define TRACE_USB_DWC2_RAISE_HOST_IRQ 0
+#define TRACE_USB_DWC2_RAISE_HOST_IRQ_ENABLED 0
+#define TRACE_USB_DWC2_RAISE_HOST_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_raise_host_irq(uint32_t intr) {
+ (void)intr;
+}
+#define TRACE_USB_DWC2_RESET_ENTER 0
+#define TRACE_USB_DWC2_RESET_ENTER_ENABLED 0
+#define TRACE_USB_DWC2_RESET_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_reset_enter(void) {
+}
+#define TRACE_USB_DWC2_RESET_EXIT 0
+#define TRACE_USB_DWC2_RESET_EXIT_ENABLED 0
+#define TRACE_USB_DWC2_RESET_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_reset_exit(void) {
+}
+#define TRACE_USB_DWC2_RESET_HOLD 0
+#define TRACE_USB_DWC2_RESET_HOLD_ENABLED 0
+#define TRACE_USB_DWC2_RESET_HOLD_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_reset_hold(void) {
+}
+#define TRACE_USB_DWC2_SOF 0
+#define TRACE_USB_DWC2_SOF_ENABLED 0
+#define TRACE_USB_DWC2_SOF_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_sof(int64_t next) {
+ (void)next;
+}
+#define TRACE_USB_DWC2_UPDATE_IRQ 0
+#define TRACE_USB_DWC2_UPDATE_IRQ_ENABLED 0
+#define TRACE_USB_DWC2_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_update_irq(uint32_t level) {
+ (void)level;
+}
+#define TRACE_USB_DWC2_WAKEUP 0
+#define TRACE_USB_DWC2_WAKEUP_ENABLED 0
+#define TRACE_USB_DWC2_WAKEUP_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_wakeup(void *port) {
+ (void)port;
+}
+#define TRACE_USB_DWC2_WAKEUP_ENDPOINT 0
+#define TRACE_USB_DWC2_WAKEUP_ENDPOINT_ENABLED 0
+#define TRACE_USB_DWC2_WAKEUP_ENDPOINT_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_wakeup_endpoint(void *ep, uint32_t stream) {
+ (void)ep;
+ (void)stream;
+}
+#define TRACE_USB_DWC2_WORK_BH 0
+#define TRACE_USB_DWC2_WORK_BH_ENABLED 0
+#define TRACE_USB_DWC2_WORK_BH_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_work_bh(void) {
+}
+#define TRACE_USB_DWC2_WORK_BH_NEXT 0
+#define TRACE_USB_DWC2_WORK_BH_NEXT_ENABLED 0
+#define TRACE_USB_DWC2_WORK_BH_NEXT_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_work_bh_next(uint32_t chan) {
+ (void)chan;
+}
+#define TRACE_USB_DWC2_WORK_BH_SERVICE 0
+#define TRACE_USB_DWC2_WORK_BH_SERVICE_ENABLED 0
+#define TRACE_USB_DWC2_WORK_BH_SERVICE_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_work_bh_service(uint32_t first, uint32_t current, void *dev, uint32_t ep) {
+ (void)first;
+ (void)current;
+ (void)dev;
+ (void)ep;
+}
+#define TRACE_USB_DWC2_WORK_TIMER 0
+#define TRACE_USB_DWC2_WORK_TIMER_ENABLED 0
+#define TRACE_USB_DWC2_WORK_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_usb_dwc2_work_timer(void) {
+}
+#define TRACE_USB_EHCI_DMA_ERROR 0
+#define TRACE_USB_EHCI_DMA_ERROR_ENABLED 0
+#define TRACE_USB_EHCI_DMA_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_dma_error(void) {
+}
+#define TRACE_USB_EHCI_DOORBELL_ACK 0
+#define TRACE_USB_EHCI_DOORBELL_ACK_ENABLED 0
+#define TRACE_USB_EHCI_DOORBELL_ACK_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_doorbell_ack(void) {
+}
+#define TRACE_USB_EHCI_DOORBELL_RING 0
+#define TRACE_USB_EHCI_DOORBELL_RING_ENABLED 0
+#define TRACE_USB_EHCI_DOORBELL_RING_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_doorbell_ring(void) {
+}
+#define TRACE_USB_EHCI_GUEST_BUG 0
+#define TRACE_USB_EHCI_GUEST_BUG_ENABLED 0
+#define TRACE_USB_EHCI_GUEST_BUG_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_guest_bug(const char *reason) {
+ (void)reason;
+}
+#define TRACE_USB_EHCI_IRQ 0
+#define TRACE_USB_EHCI_IRQ_ENABLED 0
+#define TRACE_USB_EHCI_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) {
+ (void)level;
+ (void)frindex;
+ (void)sts;
+ (void)mask;
+}
+#define TRACE_USB_EHCI_ITD 0
+#define TRACE_USB_EHCI_ITD_ENABLED 0
+#define TRACE_USB_EHCI_ITD_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) {
+ (void)addr;
+ (void)nxt;
+ (void)mplen;
+ (void)mult;
+ (void)ep;
+ (void)devaddr;
+}
+#define TRACE_USB_EHCI_OPREG_CHANGE 0
+#define TRACE_USB_EHCI_OPREG_CHANGE_ENABLED 0
+#define TRACE_USB_EHCI_OPREG_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) {
+ (void)addr;
+ (void)str;
+ (void)new;
+ (void)old;
+}
+#define TRACE_USB_EHCI_OPREG_READ 0
+#define TRACE_USB_EHCI_OPREG_READ_ENABLED 0
+#define TRACE_USB_EHCI_OPREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) {
+ (void)addr;
+ (void)str;
+ (void)val;
+}
+#define TRACE_USB_EHCI_OPREG_WRITE 0
+#define TRACE_USB_EHCI_OPREG_WRITE_ENABLED 0
+#define TRACE_USB_EHCI_OPREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) {
+ (void)addr;
+ (void)str;
+ (void)val;
+}
+#define TRACE_USB_EHCI_PACKET_ACTION 0
+#define TRACE_USB_EHCI_PACKET_ACTION_ENABLED 0
+#define TRACE_USB_EHCI_PACKET_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_packet_action(void *q, void *p, const char *action) {
+ (void)q;
+ (void)p;
+ (void)action;
+}
+#define TRACE_USB_EHCI_PORT_ATTACH 0
+#define TRACE_USB_EHCI_PORT_ATTACH_ENABLED 0
+#define TRACE_USB_EHCI_PORT_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) {
+ (void)port;
+ (void)owner;
+ (void)device;
+}
+#define TRACE_USB_EHCI_PORT_DETACH 0
+#define TRACE_USB_EHCI_PORT_DETACH_ENABLED 0
+#define TRACE_USB_EHCI_PORT_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_port_detach(uint32_t port, const char *owner) {
+ (void)port;
+ (void)owner;
+}
+#define TRACE_USB_EHCI_PORT_RESET 0
+#define TRACE_USB_EHCI_PORT_RESET_ENABLED 0
+#define TRACE_USB_EHCI_PORT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_port_reset(uint32_t port, int enable) {
+ (void)port;
+ (void)enable;
+}
+#define TRACE_USB_EHCI_PORT_RESUME 0
+#define TRACE_USB_EHCI_PORT_RESUME_ENABLED 0
+#define TRACE_USB_EHCI_PORT_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_port_resume(uint32_t port) {
+ (void)port;
+}
+#define TRACE_USB_EHCI_PORT_SUSPEND 0
+#define TRACE_USB_EHCI_PORT_SUSPEND_ENABLED 0
+#define TRACE_USB_EHCI_PORT_SUSPEND_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_port_suspend(uint32_t port) {
+ (void)port;
+}
+#define TRACE_USB_EHCI_PORT_WAKEUP 0
+#define TRACE_USB_EHCI_PORT_WAKEUP_ENABLED 0
+#define TRACE_USB_EHCI_PORT_WAKEUP_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_port_wakeup(uint32_t port) {
+ (void)port;
+}
+#define TRACE_USB_EHCI_PORTSC_CHANGE 0
+#define TRACE_USB_EHCI_PORTSC_CHANGE_ENABLED 0
+#define TRACE_USB_EHCI_PORTSC_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) {
+ (void)addr;
+ (void)port;
+ (void)new;
+ (void)old;
+}
+#define TRACE_USB_EHCI_PORTSC_READ 0
+#define TRACE_USB_EHCI_PORTSC_READ_ENABLED 0
+#define TRACE_USB_EHCI_PORTSC_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) {
+ (void)addr;
+ (void)port;
+ (void)val;
+}
+#define TRACE_USB_EHCI_PORTSC_WRITE 0
+#define TRACE_USB_EHCI_PORTSC_WRITE_ENABLED 0
+#define TRACE_USB_EHCI_PORTSC_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) {
+ (void)addr;
+ (void)port;
+ (void)val;
+}
+#define TRACE_USB_EHCI_QH_BITS 0
+#define TRACE_USB_EHCI_QH_BITS_ENABLED 0
+#define TRACE_USB_EHCI_QH_BITS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) {
+ (void)addr;
+ (void)c;
+ (void)h;
+ (void)dtc;
+ (void)i;
+}
+#define TRACE_USB_EHCI_QH_FIELDS 0
+#define TRACE_USB_EHCI_QH_FIELDS_ENABLED 0
+#define TRACE_USB_EHCI_QH_FIELDS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) {
+ (void)addr;
+ (void)rl;
+ (void)mplen;
+ (void)eps;
+ (void)ep;
+ (void)devaddr;
+}
+#define TRACE_USB_EHCI_QH_PTRS 0
+#define TRACE_USB_EHCI_QH_PTRS_ENABLED 0
+#define TRACE_USB_EHCI_QH_PTRS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) {
+ (void)q;
+ (void)addr;
+ (void)nxt;
+ (void)c_qtd;
+ (void)n_qtd;
+ (void)a_qtd;
+}
+#define TRACE_USB_EHCI_QTD_BITS 0
+#define TRACE_USB_EHCI_QTD_BITS_ENABLED 0
+#define TRACE_USB_EHCI_QTD_BITS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) {
+ (void)addr;
+ (void)ioc;
+ (void)active;
+ (void)halt;
+ (void)babble;
+ (void)xacterr;
+}
+#define TRACE_USB_EHCI_QTD_FIELDS 0
+#define TRACE_USB_EHCI_QTD_FIELDS_ENABLED 0
+#define TRACE_USB_EHCI_QTD_FIELDS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) {
+ (void)addr;
+ (void)tbytes;
+ (void)cpage;
+ (void)cerr;
+ (void)pid;
+}
+#define TRACE_USB_EHCI_QTD_PTRS 0
+#define TRACE_USB_EHCI_QTD_PTRS_ENABLED 0
+#define TRACE_USB_EHCI_QTD_PTRS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) {
+ (void)q;
+ (void)addr;
+ (void)nxt;
+ (void)altnext;
+}
+#define TRACE_USB_EHCI_QUEUE_ACTION 0
+#define TRACE_USB_EHCI_QUEUE_ACTION_ENABLED 0
+#define TRACE_USB_EHCI_QUEUE_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_queue_action(void *q, const char *action) {
+ (void)q;
+ (void)action;
+}
+#define TRACE_USB_EHCI_RESET 0
+#define TRACE_USB_EHCI_RESET_ENABLED 0
+#define TRACE_USB_EHCI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_reset(void) {
+}
+#define TRACE_USB_EHCI_SITD 0
+#define TRACE_USB_EHCI_SITD_ENABLED 0
+#define TRACE_USB_EHCI_SITD_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) {
+ (void)addr;
+ (void)nxt;
+ (void)active;
+}
+#define TRACE_USB_EHCI_STATE 0
+#define TRACE_USB_EHCI_STATE_ENABLED 0
+#define TRACE_USB_EHCI_STATE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_state(const char *schedule, const char *state) {
+ (void)schedule;
+ (void)state;
+}
+#define TRACE_USB_EHCI_UNREALIZE 0
+#define TRACE_USB_EHCI_UNREALIZE_ENABLED 0
+#define TRACE_USB_EHCI_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_unrealize(void) {
+}
+#define TRACE_USB_EHCI_USBSTS 0
+#define TRACE_USB_EHCI_USBSTS_ENABLED 0
+#define TRACE_USB_EHCI_USBSTS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ehci_usbsts(const char *sts, int state) {
+ (void)sts;
+ (void)state;
+}
+#define TRACE_USB_HOST_ATTACH_KERNEL 0
+#define TRACE_USB_HOST_ATTACH_KERNEL_ENABLED 0
+#define TRACE_USB_HOST_ATTACH_KERNEL_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_attach_kernel(int bus, int addr, int interface) {
+ (void)bus;
+ (void)addr;
+ (void)interface;
+}
+#define TRACE_USB_HOST_AUTO_SCAN_DISABLED 0
+#define TRACE_USB_HOST_AUTO_SCAN_DISABLED_ENABLED 0
+#define TRACE_USB_HOST_AUTO_SCAN_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_auto_scan_disabled(void) {
+}
+#define TRACE_USB_HOST_AUTO_SCAN_ENABLED 0
+#define TRACE_USB_HOST_AUTO_SCAN_ENABLED_ENABLED 0
+#define TRACE_USB_HOST_AUTO_SCAN_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_auto_scan_enabled(void) {
+}
+#define TRACE_USB_HOST_CLAIM_INTERFACE 0
+#define TRACE_USB_HOST_CLAIM_INTERFACE_ENABLED 0
+#define TRACE_USB_HOST_CLAIM_INTERFACE_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_claim_interface(int bus, int addr, int config, int interface) {
+ (void)bus;
+ (void)addr;
+ (void)config;
+ (void)interface;
+}
+#define TRACE_USB_HOST_CLOSE 0
+#define TRACE_USB_HOST_CLOSE_ENABLED 0
+#define TRACE_USB_HOST_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_close(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_HOST_DETACH_KERNEL 0
+#define TRACE_USB_HOST_DETACH_KERNEL_ENABLED 0
+#define TRACE_USB_HOST_DETACH_KERNEL_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_detach_kernel(int bus, int addr, int interface) {
+ (void)bus;
+ (void)addr;
+ (void)interface;
+}
+#define TRACE_USB_HOST_ISO_OUT_OF_BUFS 0
+#define TRACE_USB_HOST_ISO_OUT_OF_BUFS_ENABLED 0
+#define TRACE_USB_HOST_ISO_OUT_OF_BUFS_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_iso_out_of_bufs(int bus, int addr, int ep) {
+ (void)bus;
+ (void)addr;
+ (void)ep;
+}
+#define TRACE_USB_HOST_ISO_START 0
+#define TRACE_USB_HOST_ISO_START_ENABLED 0
+#define TRACE_USB_HOST_ISO_START_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_iso_start(int bus, int addr, int ep) {
+ (void)bus;
+ (void)addr;
+ (void)ep;
+}
+#define TRACE_USB_HOST_ISO_STOP 0
+#define TRACE_USB_HOST_ISO_STOP_ENABLED 0
+#define TRACE_USB_HOST_ISO_STOP_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_iso_stop(int bus, int addr, int ep) {
+ (void)bus;
+ (void)addr;
+ (void)ep;
+}
+#define TRACE_USB_HOST_OPEN_FAILURE 0
+#define TRACE_USB_HOST_OPEN_FAILURE_ENABLED 0
+#define TRACE_USB_HOST_OPEN_FAILURE_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_open_failure(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_HOST_OPEN_HOSTFD 0
+#define TRACE_USB_HOST_OPEN_HOSTFD_ENABLED 0
+#define TRACE_USB_HOST_OPEN_HOSTFD_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_open_hostfd(int hostfd) {
+ (void)hostfd;
+}
+#define TRACE_USB_HOST_OPEN_STARTED 0
+#define TRACE_USB_HOST_OPEN_STARTED_ENABLED 0
+#define TRACE_USB_HOST_OPEN_STARTED_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_open_started(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_HOST_OPEN_SUCCESS 0
+#define TRACE_USB_HOST_OPEN_SUCCESS_ENABLED 0
+#define TRACE_USB_HOST_OPEN_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_open_success(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_HOST_PARSE_CONFIG 0
+#define TRACE_USB_HOST_PARSE_CONFIG_ENABLED 0
+#define TRACE_USB_HOST_PARSE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_parse_config(int bus, int addr, int value, int active) {
+ (void)bus;
+ (void)addr;
+ (void)value;
+ (void)active;
+}
+#define TRACE_USB_HOST_PARSE_ENDPOINT 0
+#define TRACE_USB_HOST_PARSE_ENDPOINT_ENABLED 0
+#define TRACE_USB_HOST_PARSE_ENDPOINT_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) {
+ (void)bus;
+ (void)addr;
+ (void)ep;
+ (void)dir;
+ (void)type;
+ (void)active;
+}
+#define TRACE_USB_HOST_PARSE_ERROR 0
+#define TRACE_USB_HOST_PARSE_ERROR_ENABLED 0
+#define TRACE_USB_HOST_PARSE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_parse_error(int bus, int addr, const char *errmsg) {
+ (void)bus;
+ (void)addr;
+ (void)errmsg;
+}
+#define TRACE_USB_HOST_PARSE_INTERFACE 0
+#define TRACE_USB_HOST_PARSE_INTERFACE_ENABLED 0
+#define TRACE_USB_HOST_PARSE_INTERFACE_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_parse_interface(int bus, int addr, int num, int alt, int active) {
+ (void)bus;
+ (void)addr;
+ (void)num;
+ (void)alt;
+ (void)active;
+}
+#define TRACE_USB_HOST_RELEASE_INTERFACE 0
+#define TRACE_USB_HOST_RELEASE_INTERFACE_ENABLED 0
+#define TRACE_USB_HOST_RELEASE_INTERFACE_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_release_interface(int bus, int addr, int interface) {
+ (void)bus;
+ (void)addr;
+ (void)interface;
+}
+#define TRACE_USB_HOST_REMOTE_WAKEUP_REMOVED 0
+#define TRACE_USB_HOST_REMOTE_WAKEUP_REMOVED_ENABLED 0
+#define TRACE_USB_HOST_REMOTE_WAKEUP_REMOVED_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_remote_wakeup_removed(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_HOST_REQ_CANCELED 0
+#define TRACE_USB_HOST_REQ_CANCELED_ENABLED 0
+#define TRACE_USB_HOST_REQ_CANCELED_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_req_canceled(int bus, int addr, void *p) {
+ (void)bus;
+ (void)addr;
+ (void)p;
+}
+#define TRACE_USB_HOST_REQ_COMPLETE 0
+#define TRACE_USB_HOST_REQ_COMPLETE_ENABLED 0
+#define TRACE_USB_HOST_REQ_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_req_complete(int bus, int addr, void *p, int status, int length) {
+ (void)bus;
+ (void)addr;
+ (void)p;
+ (void)status;
+ (void)length;
+}
+#define TRACE_USB_HOST_REQ_CONTROL 0
+#define TRACE_USB_HOST_REQ_CONTROL_ENABLED 0
+#define TRACE_USB_HOST_REQ_CONTROL_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) {
+ (void)bus;
+ (void)addr;
+ (void)p;
+ (void)req;
+ (void)value;
+ (void)index;
+}
+#define TRACE_USB_HOST_REQ_DATA 0
+#define TRACE_USB_HOST_REQ_DATA_ENABLED 0
+#define TRACE_USB_HOST_REQ_DATA_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) {
+ (void)bus;
+ (void)addr;
+ (void)p;
+ (void)in;
+ (void)ep;
+ (void)size;
+}
+#define TRACE_USB_HOST_REQ_EMULATED 0
+#define TRACE_USB_HOST_REQ_EMULATED_ENABLED 0
+#define TRACE_USB_HOST_REQ_EMULATED_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_req_emulated(int bus, int addr, void *p, int status) {
+ (void)bus;
+ (void)addr;
+ (void)p;
+ (void)status;
+}
+#define TRACE_USB_HOST_RESET 0
+#define TRACE_USB_HOST_RESET_ENABLED 0
+#define TRACE_USB_HOST_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_reset(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_HOST_SET_ADDRESS 0
+#define TRACE_USB_HOST_SET_ADDRESS_ENABLED 0
+#define TRACE_USB_HOST_SET_ADDRESS_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_set_address(int bus, int addr, int config) {
+ (void)bus;
+ (void)addr;
+ (void)config;
+}
+#define TRACE_USB_HOST_SET_CONFIG 0
+#define TRACE_USB_HOST_SET_CONFIG_ENABLED 0
+#define TRACE_USB_HOST_SET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_set_config(int bus, int addr, int config) {
+ (void)bus;
+ (void)addr;
+ (void)config;
+}
+#define TRACE_USB_HOST_SET_INTERFACE 0
+#define TRACE_USB_HOST_SET_INTERFACE_ENABLED 0
+#define TRACE_USB_HOST_SET_INTERFACE_BACKEND_DSTATE() (0)
+static inline void trace_usb_host_set_interface(int bus, int addr, int interface, int alt) {
+ (void)bus;
+ (void)addr;
+ (void)interface;
+ (void)alt;
+}
+#define TRACE_USB_HUB_ATTACH 0
+#define TRACE_USB_HUB_ATTACH_ENABLED 0
+#define TRACE_USB_HUB_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_attach(int addr, int nr) {
+ (void)addr;
+ (void)nr;
+}
+#define TRACE_USB_HUB_CLEAR_PORT_FEATURE 0
+#define TRACE_USB_HUB_CLEAR_PORT_FEATURE_ENABLED 0
+#define TRACE_USB_HUB_CLEAR_PORT_FEATURE_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_clear_port_feature(int addr, int nr, const char *f) {
+ (void)addr;
+ (void)nr;
+ (void)f;
+}
+#define TRACE_USB_HUB_CONTROL 0
+#define TRACE_USB_HUB_CONTROL_ENABLED 0
+#define TRACE_USB_HUB_CONTROL_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_control(int addr, int request, int value, int index, int length) {
+ (void)addr;
+ (void)request;
+ (void)value;
+ (void)index;
+ (void)length;
+}
+#define TRACE_USB_HUB_DETACH 0
+#define TRACE_USB_HUB_DETACH_ENABLED 0
+#define TRACE_USB_HUB_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_detach(int addr, int nr) {
+ (void)addr;
+ (void)nr;
+}
+#define TRACE_USB_HUB_GET_PORT_STATUS 0
+#define TRACE_USB_HUB_GET_PORT_STATUS_ENABLED 0
+#define TRACE_USB_HUB_GET_PORT_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_get_port_status(int addr, int nr, int status, int changed) {
+ (void)addr;
+ (void)nr;
+ (void)status;
+ (void)changed;
+}
+#define TRACE_USB_HUB_RESET 0
+#define TRACE_USB_HUB_RESET_ENABLED 0
+#define TRACE_USB_HUB_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_reset(int addr) {
+ (void)addr;
+}
+#define TRACE_USB_HUB_SET_PORT_FEATURE 0
+#define TRACE_USB_HUB_SET_PORT_FEATURE_ENABLED 0
+#define TRACE_USB_HUB_SET_PORT_FEATURE_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_set_port_feature(int addr, int nr, const char *f) {
+ (void)addr;
+ (void)nr;
+ (void)f;
+}
+#define TRACE_USB_HUB_STATUS_REPORT 0
+#define TRACE_USB_HUB_STATUS_REPORT_ENABLED 0
+#define TRACE_USB_HUB_STATUS_REPORT_BACKEND_DSTATE() (0)
+static inline void trace_usb_hub_status_report(int addr, int status) {
+ (void)addr;
+ (void)status;
+}
+#define TRACE_USB_MSD_CMD_CANCEL 0
+#define TRACE_USB_MSD_CMD_CANCEL_ENABLED 0
+#define TRACE_USB_MSD_CMD_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_cmd_cancel(unsigned tag) {
+ (void)tag;
+}
+#define TRACE_USB_MSD_CMD_COMPLETE 0
+#define TRACE_USB_MSD_CMD_COMPLETE_ENABLED 0
+#define TRACE_USB_MSD_CMD_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_cmd_complete(unsigned status, unsigned tag) {
+ (void)status;
+ (void)tag;
+}
+#define TRACE_USB_MSD_CMD_SUBMIT 0
+#define TRACE_USB_MSD_CMD_SUBMIT_ENABLED 0
+#define TRACE_USB_MSD_CMD_SUBMIT_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_cmd_submit(unsigned lun, unsigned tag, unsigned flags, unsigned len, unsigned data_len) {
+ (void)lun;
+ (void)tag;
+ (void)flags;
+ (void)len;
+ (void)data_len;
+}
+#define TRACE_USB_MSD_DATA_IN 0
+#define TRACE_USB_MSD_DATA_IN_ENABLED 0
+#define TRACE_USB_MSD_DATA_IN_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_data_in(unsigned packet, unsigned remaining, unsigned total) {
+ (void)packet;
+ (void)remaining;
+ (void)total;
+}
+#define TRACE_USB_MSD_DATA_OUT 0
+#define TRACE_USB_MSD_DATA_OUT_ENABLED 0
+#define TRACE_USB_MSD_DATA_OUT_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_data_out(unsigned packet, unsigned remaining) {
+ (void)packet;
+ (void)remaining;
+}
+#define TRACE_USB_MSD_FATAL_ERROR 0
+#define TRACE_USB_MSD_FATAL_ERROR_ENABLED 0
+#define TRACE_USB_MSD_FATAL_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_fatal_error(void) {
+}
+#define TRACE_USB_MSD_MAXLUN 0
+#define TRACE_USB_MSD_MAXLUN_ENABLED 0
+#define TRACE_USB_MSD_MAXLUN_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_maxlun(unsigned maxlun) {
+ (void)maxlun;
+}
+#define TRACE_USB_MSD_PACKET_ASYNC 0
+#define TRACE_USB_MSD_PACKET_ASYNC_ENABLED 0
+#define TRACE_USB_MSD_PACKET_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_packet_async(void) {
+}
+#define TRACE_USB_MSD_PACKET_COMPLETE 0
+#define TRACE_USB_MSD_PACKET_COMPLETE_ENABLED 0
+#define TRACE_USB_MSD_PACKET_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_packet_complete(void) {
+}
+#define TRACE_USB_MSD_RESET 0
+#define TRACE_USB_MSD_RESET_ENABLED 0
+#define TRACE_USB_MSD_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_reset(void) {
+}
+#define TRACE_USB_MSD_SEND_STATUS 0
+#define TRACE_USB_MSD_SEND_STATUS_ENABLED 0
+#define TRACE_USB_MSD_SEND_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_usb_msd_send_status(unsigned status, unsigned tag, size_t size) {
+ (void)status;
+ (void)tag;
+ (void)size;
+}
+#define TRACE_USB_MTP_ADD_CHILD 0
+#define TRACE_USB_MTP_ADD_CHILD_ENABLED 0
+#define TRACE_USB_MTP_ADD_CHILD_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_add_child(int dev, uint32_t handle, const char *path) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+}
+#define TRACE_USB_MTP_COMMAND 0
+#define TRACE_USB_MTP_COMMAND_ENABLED 0
+#define TRACE_USB_MTP_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) {
+ (void)dev;
+ (void)code;
+ (void)trans;
+ (void)arg0;
+ (void)arg1;
+ (void)arg2;
+ (void)arg3;
+ (void)arg4;
+}
+#define TRACE_USB_MTP_DATA_IN 0
+#define TRACE_USB_MTP_DATA_IN_ENABLED 0
+#define TRACE_USB_MTP_DATA_IN_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_data_in(int dev, uint32_t trans, uint32_t len) {
+ (void)dev;
+ (void)trans;
+ (void)len;
+}
+#define TRACE_USB_MTP_ERROR 0
+#define TRACE_USB_MTP_ERROR_ENABLED 0
+#define TRACE_USB_MTP_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_error(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1) {
+ (void)dev;
+ (void)code;
+ (void)trans;
+ (void)arg0;
+ (void)arg1;
+}
+#define TRACE_USB_MTP_FILE_MONITOR_EVENT 0
+#define TRACE_USB_MTP_FILE_MONITOR_EVENT_ENABLED 0
+#define TRACE_USB_MTP_FILE_MONITOR_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_file_monitor_event(int dev, const char *path, const char *s) {
+ (void)dev;
+ (void)path;
+ (void)s;
+}
+#define TRACE_USB_MTP_NAK 0
+#define TRACE_USB_MTP_NAK_ENABLED 0
+#define TRACE_USB_MTP_NAK_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_nak(int dev, uint32_t ep) {
+ (void)dev;
+ (void)ep;
+}
+#define TRACE_USB_MTP_OBJECT_ALLOC 0
+#define TRACE_USB_MTP_OBJECT_ALLOC_ENABLED 0
+#define TRACE_USB_MTP_OBJECT_ALLOC_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_object_alloc(int dev, uint32_t handle, const char *path) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+}
+#define TRACE_USB_MTP_OBJECT_FREE 0
+#define TRACE_USB_MTP_OBJECT_FREE_ENABLED 0
+#define TRACE_USB_MTP_OBJECT_FREE_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_object_free(int dev, uint32_t handle, const char *path) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+}
+#define TRACE_USB_MTP_OP_CLOSE_SESSION 0
+#define TRACE_USB_MTP_OP_CLOSE_SESSION_ENABLED 0
+#define TRACE_USB_MTP_OP_CLOSE_SESSION_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_close_session(int dev) {
+ (void)dev;
+}
+#define TRACE_USB_MTP_OP_GET_DEVICE_INFO 0
+#define TRACE_USB_MTP_OP_GET_DEVICE_INFO_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_DEVICE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_device_info(int dev) {
+ (void)dev;
+}
+#define TRACE_USB_MTP_OP_GET_NUM_OBJECTS 0
+#define TRACE_USB_MTP_OP_GET_NUM_OBJECTS_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_NUM_OBJECTS_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_num_objects(int dev, uint32_t handle, const char *path) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+}
+#define TRACE_USB_MTP_OP_GET_OBJECT 0
+#define TRACE_USB_MTP_OP_GET_OBJECT_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_OBJECT_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_object(int dev, uint32_t handle, const char *path) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+}
+#define TRACE_USB_MTP_OP_GET_OBJECT_HANDLES 0
+#define TRACE_USB_MTP_OP_GET_OBJECT_HANDLES_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_OBJECT_HANDLES_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_object_handles(int dev, uint32_t handle, const char *path) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+}
+#define TRACE_USB_MTP_OP_GET_OBJECT_INFO 0
+#define TRACE_USB_MTP_OP_GET_OBJECT_INFO_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_OBJECT_INFO_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_object_info(int dev, uint32_t handle, const char *path) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+}
+#define TRACE_USB_MTP_OP_GET_PARTIAL_OBJECT 0
+#define TRACE_USB_MTP_OP_GET_PARTIAL_OBJECT_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_PARTIAL_OBJECT_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_partial_object(int dev, uint32_t handle, const char *path, uint32_t offset, uint32_t length) {
+ (void)dev;
+ (void)handle;
+ (void)path;
+ (void)offset;
+ (void)length;
+}
+#define TRACE_USB_MTP_OP_GET_STORAGE_IDS 0
+#define TRACE_USB_MTP_OP_GET_STORAGE_IDS_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_STORAGE_IDS_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_storage_ids(int dev) {
+ (void)dev;
+}
+#define TRACE_USB_MTP_OP_GET_STORAGE_INFO 0
+#define TRACE_USB_MTP_OP_GET_STORAGE_INFO_ENABLED 0
+#define TRACE_USB_MTP_OP_GET_STORAGE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_get_storage_info(int dev) {
+ (void)dev;
+}
+#define TRACE_USB_MTP_OP_OPEN_SESSION 0
+#define TRACE_USB_MTP_OP_OPEN_SESSION_ENABLED 0
+#define TRACE_USB_MTP_OP_OPEN_SESSION_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_open_session(int dev) {
+ (void)dev;
+}
+#define TRACE_USB_MTP_OP_UNKNOWN 0
+#define TRACE_USB_MTP_OP_UNKNOWN_ENABLED 0
+#define TRACE_USB_MTP_OP_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_op_unknown(int dev, uint32_t code) {
+ (void)dev;
+ (void)code;
+}
+#define TRACE_USB_MTP_RESET 0
+#define TRACE_USB_MTP_RESET_ENABLED 0
+#define TRACE_USB_MTP_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_reset(int addr) {
+ (void)addr;
+}
+#define TRACE_USB_MTP_STALL 0
+#define TRACE_USB_MTP_STALL_ENABLED 0
+#define TRACE_USB_MTP_STALL_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_stall(int dev, const char *reason) {
+ (void)dev;
+ (void)reason;
+}
+#define TRACE_USB_MTP_SUCCESS 0
+#define TRACE_USB_MTP_SUCCESS_ENABLED 0
+#define TRACE_USB_MTP_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) {
+ (void)dev;
+ (void)trans;
+ (void)arg0;
+ (void)arg1;
+}
+#define TRACE_USB_MTP_XFER 0
+#define TRACE_USB_MTP_XFER_ENABLED 0
+#define TRACE_USB_MTP_XFER_BACKEND_DSTATE() (0)
+static inline void trace_usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) {
+ (void)dev;
+ (void)ep;
+ (void)dlen;
+ (void)plen;
+}
+#define TRACE_USB_OHCI_ASYNC_COMPLETE 0
+#define TRACE_USB_OHCI_ASYNC_COMPLETE_ENABLED 0
+#define TRACE_USB_OHCI_ASYNC_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_async_complete(void) {
+}
+#define TRACE_USB_OHCI_DIE 0
+#define TRACE_USB_OHCI_DIE_ENABLED 0
+#define TRACE_USB_OHCI_DIE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_die(void) {
+}
+#define TRACE_USB_OHCI_ED_PKT 0
+#define TRACE_USB_OHCI_ED_PKT_ENABLED 0
+#define TRACE_USB_OHCI_ED_PKT_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, uint32_t next) {
+ (void)cur;
+ (void)h;
+ (void)c;
+ (void)head;
+ (void)tail;
+ (void)next;
+}
+#define TRACE_USB_OHCI_ED_PKT_FLAGS 0
+#define TRACE_USB_OHCI_ED_PKT_FLAGS_ENABLED 0
+#define TRACE_USB_OHCI_ED_PKT_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, int f, uint32_t mps) {
+ (void)fa;
+ (void)en;
+ (void)d;
+ (void)s;
+ (void)k;
+ (void)f;
+ (void)mps;
+}
+#define TRACE_USB_OHCI_ED_READ_ERROR 0
+#define TRACE_USB_OHCI_ED_READ_ERROR_ENABLED 0
+#define TRACE_USB_OHCI_ED_READ_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_ed_read_error(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_EXIT 0
+#define TRACE_USB_OHCI_EXIT_ENABLED 0
+#define TRACE_USB_OHCI_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_exit(const char *s) {
+ (void)s;
+}
+#define TRACE_USB_OHCI_HCCA_READ_ERROR 0
+#define TRACE_USB_OHCI_HCCA_READ_ERROR_ENABLED 0
+#define TRACE_USB_OHCI_HCCA_READ_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_hcca_read_error(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_HUB_POWER_DOWN 0
+#define TRACE_USB_OHCI_HUB_POWER_DOWN_ENABLED 0
+#define TRACE_USB_OHCI_HUB_POWER_DOWN_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_hub_power_down(void) {
+}
+#define TRACE_USB_OHCI_HUB_POWER_UP 0
+#define TRACE_USB_OHCI_HUB_POWER_UP_ENABLED 0
+#define TRACE_USB_OHCI_HUB_POWER_UP_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_hub_power_up(void) {
+}
+#define TRACE_USB_OHCI_INIT_TIME 0
+#define TRACE_USB_OHCI_INIT_TIME_ENABLED 0
+#define TRACE_USB_OHCI_INIT_TIME_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_init_time(int64_t frametime, int64_t bittime) {
+ (void)frametime;
+ (void)bittime;
+}
+#define TRACE_USB_OHCI_ISO_TD_BAD_BP_BE 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_BP_BE_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_BP_BE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_bad_bp_be(uint32_t bp, uint32_t be) {
+ (void)bp;
+ (void)be;
+}
+#define TRACE_USB_OHCI_ISO_TD_BAD_CC_NOT_ACCESSED 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_CC_NOT_ACCESSED_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_CC_NOT_ACCESSED_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_bad_cc_not_accessed(uint32_t start, uint32_t next) {
+ (void)start;
+ (void)next;
+}
+#define TRACE_USB_OHCI_ISO_TD_BAD_CC_OVERRUN 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_CC_OVERRUN_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_CC_OVERRUN_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_bad_cc_overrun(uint32_t start, uint32_t next) {
+ (void)start;
+ (void)next;
+}
+#define TRACE_USB_OHCI_ISO_TD_BAD_DIRECTION 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_DIRECTION_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_DIRECTION_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_bad_direction(int dir) {
+ (void)dir;
+}
+#define TRACE_USB_OHCI_ISO_TD_BAD_RESPONSE 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_RESPONSE_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_BAD_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_bad_response(int ret) {
+ (void)ret;
+}
+#define TRACE_USB_OHCI_ISO_TD_DATA_OVERRUN 0
+#define TRACE_USB_OHCI_ISO_TD_DATA_OVERRUN_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_DATA_OVERRUN_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_data_overrun(int ret, ssize_t len) {
+ (void)ret;
+ (void)len;
+}
+#define TRACE_USB_OHCI_ISO_TD_DATA_UNDERRUN 0
+#define TRACE_USB_OHCI_ISO_TD_DATA_UNDERRUN_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_DATA_UNDERRUN_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_data_underrun(int ret) {
+ (void)ret;
+}
+#define TRACE_USB_OHCI_ISO_TD_HEAD 0
+#define TRACE_USB_OHCI_ISO_TD_HEAD_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_HEAD_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) {
+ (void)head;
+ (void)tail;
+ (void)flags;
+ (void)bp;
+ (void)next;
+ (void)be;
+ (void)framenum;
+ (void)startframe;
+ (void)framecount;
+ (void)rel_frame_num;
+}
+#define TRACE_USB_OHCI_ISO_TD_HEAD_OFFSET 0
+#define TRACE_USB_OHCI_ISO_TD_HEAD_OFFSET_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_HEAD_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) {
+ (void)o0;
+ (void)o1;
+ (void)o2;
+ (void)o3;
+ (void)o4;
+ (void)o5;
+ (void)o6;
+ (void)o7;
+}
+#define TRACE_USB_OHCI_ISO_TD_NAK 0
+#define TRACE_USB_OHCI_ISO_TD_NAK_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_NAK_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_nak(int ret) {
+ (void)ret;
+}
+#define TRACE_USB_OHCI_ISO_TD_READ_FAILED 0
+#define TRACE_USB_OHCI_ISO_TD_READ_FAILED_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_READ_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_read_failed(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_ISO_TD_RELATIVE_FRAME_NUMBER_BIG 0
+#define TRACE_USB_OHCI_ISO_TD_RELATIVE_FRAME_NUMBER_BIG_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_RELATIVE_FRAME_NUMBER_BIG_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_relative_frame_number_big(int rel, int count) {
+ (void)rel;
+ (void)count;
+}
+#define TRACE_USB_OHCI_ISO_TD_RELATIVE_FRAME_NUMBER_NEG 0
+#define TRACE_USB_OHCI_ISO_TD_RELATIVE_FRAME_NUMBER_NEG_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_RELATIVE_FRAME_NUMBER_NEG_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_relative_frame_number_neg(int rel) {
+ (void)rel;
+}
+#define TRACE_USB_OHCI_ISO_TD_SO 0
+#define TRACE_USB_OHCI_ISO_TD_SO_ENABLED 0
+#define TRACE_USB_OHCI_ISO_TD_SO_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_iso_td_so(uint32_t so, uint32_t eo, uint32_t s, uint32_t e, const char *str, ssize_t len, int ret) {
+ (void)so;
+ (void)eo;
+ (void)s;
+ (void)e;
+ (void)str;
+ (void)len;
+ (void)ret;
+}
+#define TRACE_USB_OHCI_MEM_PORT_READ 0
+#define TRACE_USB_OHCI_MEM_PORT_READ_ENABLED 0
+#define TRACE_USB_OHCI_MEM_PORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_port_read(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) {
+ (void)size;
+ (void)name;
+ (void)port;
+ (void)addr;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_USB_OHCI_MEM_PORT_WRITE 0
+#define TRACE_USB_OHCI_MEM_PORT_WRITE_ENABLED 0
+#define TRACE_USB_OHCI_MEM_PORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_port_write(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) {
+ (void)size;
+ (void)name;
+ (void)port;
+ (void)addr;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_USB_OHCI_MEM_READ 0
+#define TRACE_USB_OHCI_MEM_READ_ENABLED 0
+#define TRACE_USB_OHCI_MEM_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_read(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) {
+ (void)size;
+ (void)name;
+ (void)addr;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_USB_OHCI_MEM_READ_BAD_OFFSET 0
+#define TRACE_USB_OHCI_MEM_READ_BAD_OFFSET_ENABLED 0
+#define TRACE_USB_OHCI_MEM_READ_BAD_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_read_bad_offset(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_MEM_READ_UNALIGNED 0
+#define TRACE_USB_OHCI_MEM_READ_UNALIGNED_ENABLED 0
+#define TRACE_USB_OHCI_MEM_READ_UNALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_read_unaligned(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_MEM_WRITE 0
+#define TRACE_USB_OHCI_MEM_WRITE_ENABLED 0
+#define TRACE_USB_OHCI_MEM_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_write(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) {
+ (void)size;
+ (void)name;
+ (void)addr;
+ (void)offs;
+ (void)val;
+}
+#define TRACE_USB_OHCI_MEM_WRITE_BAD_OFFSET 0
+#define TRACE_USB_OHCI_MEM_WRITE_BAD_OFFSET_ENABLED 0
+#define TRACE_USB_OHCI_MEM_WRITE_BAD_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_write_bad_offset(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_MEM_WRITE_UNALIGNED 0
+#define TRACE_USB_OHCI_MEM_WRITE_UNALIGNED_ENABLED 0
+#define TRACE_USB_OHCI_MEM_WRITE_UNALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_mem_write_unaligned(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_PORT_ATTACH 0
+#define TRACE_USB_OHCI_PORT_ATTACH_ENABLED 0
+#define TRACE_USB_OHCI_PORT_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_port_attach(int index) {
+ (void)index;
+}
+#define TRACE_USB_OHCI_PORT_DETACH 0
+#define TRACE_USB_OHCI_PORT_DETACH_ENABLED 0
+#define TRACE_USB_OHCI_PORT_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_port_detach(int index) {
+ (void)index;
+}
+#define TRACE_USB_OHCI_PORT_RESET 0
+#define TRACE_USB_OHCI_PORT_RESET_ENABLED 0
+#define TRACE_USB_OHCI_PORT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_port_reset(int index) {
+ (void)index;
+}
+#define TRACE_USB_OHCI_PORT_SUSPEND 0
+#define TRACE_USB_OHCI_PORT_SUSPEND_ENABLED 0
+#define TRACE_USB_OHCI_PORT_SUSPEND_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_port_suspend(int index) {
+ (void)index;
+}
+#define TRACE_USB_OHCI_PORT_WAKEUP 0
+#define TRACE_USB_OHCI_PORT_WAKEUP_ENABLED 0
+#define TRACE_USB_OHCI_PORT_WAKEUP_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_port_wakeup(int index) {
+ (void)index;
+}
+#define TRACE_USB_OHCI_PROCESS_LISTS 0
+#define TRACE_USB_OHCI_PROCESS_LISTS_ENABLED 0
+#define TRACE_USB_OHCI_PROCESS_LISTS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_process_lists(uint32_t head, uint32_t cur) {
+ (void)head;
+ (void)cur;
+}
+#define TRACE_USB_OHCI_REMOTE_WAKEUP 0
+#define TRACE_USB_OHCI_REMOTE_WAKEUP_ENABLED 0
+#define TRACE_USB_OHCI_REMOTE_WAKEUP_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_remote_wakeup(const char *s) {
+ (void)s;
+}
+#define TRACE_USB_OHCI_RESET 0
+#define TRACE_USB_OHCI_RESET_ENABLED 0
+#define TRACE_USB_OHCI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_reset(const char *s) {
+ (void)s;
+}
+#define TRACE_USB_OHCI_RESUME 0
+#define TRACE_USB_OHCI_RESUME_ENABLED 0
+#define TRACE_USB_OHCI_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_resume(const char *s) {
+ (void)s;
+}
+#define TRACE_USB_OHCI_SET_CTL 0
+#define TRACE_USB_OHCI_SET_CTL_ENABLED 0
+#define TRACE_USB_OHCI_SET_CTL_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_set_ctl(const char *s, uint32_t new_state) {
+ (void)s;
+ (void)new_state;
+}
+#define TRACE_USB_OHCI_SET_FRAME_INTERVAL 0
+#define TRACE_USB_OHCI_SET_FRAME_INTERVAL_ENABLED 0
+#define TRACE_USB_OHCI_SET_FRAME_INTERVAL_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_set_frame_interval(const char *name, uint16_t fi_x, uint16_t fi_u) {
+ (void)name;
+ (void)fi_x;
+ (void)fi_u;
+}
+#define TRACE_USB_OHCI_START 0
+#define TRACE_USB_OHCI_START_ENABLED 0
+#define TRACE_USB_OHCI_START_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_start(const char *s) {
+ (void)s;
+}
+#define TRACE_USB_OHCI_STOP 0
+#define TRACE_USB_OHCI_STOP_ENABLED 0
+#define TRACE_USB_OHCI_STOP_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_stop(const char *s) {
+ (void)s;
+}
+#define TRACE_USB_OHCI_TD_BABBLE 0
+#define TRACE_USB_OHCI_TD_BABBLE_ENABLED 0
+#define TRACE_USB_OHCI_TD_BABBLE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_babble(void) {
+}
+#define TRACE_USB_OHCI_TD_BAD_BUF 0
+#define TRACE_USB_OHCI_TD_BAD_BUF_ENABLED 0
+#define TRACE_USB_OHCI_TD_BAD_BUF_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_bad_buf(uint32_t cbp, uint32_t be) {
+ (void)cbp;
+ (void)be;
+}
+#define TRACE_USB_OHCI_TD_BAD_DEVICE_RESPONSE 0
+#define TRACE_USB_OHCI_TD_BAD_DEVICE_RESPONSE_ENABLED 0
+#define TRACE_USB_OHCI_TD_BAD_DEVICE_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_bad_device_response(int rc) {
+ (void)rc;
+}
+#define TRACE_USB_OHCI_TD_BAD_DIRECTION 0
+#define TRACE_USB_OHCI_TD_BAD_DIRECTION_ENABLED 0
+#define TRACE_USB_OHCI_TD_BAD_DIRECTION_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_bad_direction(int dir) {
+ (void)dir;
+}
+#define TRACE_USB_OHCI_TD_BAD_PID 0
+#define TRACE_USB_OHCI_TD_BAD_PID_ENABLED 0
+#define TRACE_USB_OHCI_TD_BAD_PID_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_bad_pid(const char *s, uint32_t edf, uint32_t tdf) {
+ (void)s;
+ (void)edf;
+ (void)tdf;
+}
+#define TRACE_USB_OHCI_TD_DEV_ERROR 0
+#define TRACE_USB_OHCI_TD_DEV_ERROR_ENABLED 0
+#define TRACE_USB_OHCI_TD_DEV_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_dev_error(void) {
+}
+#define TRACE_USB_OHCI_TD_NAK 0
+#define TRACE_USB_OHCI_TD_NAK_ENABLED 0
+#define TRACE_USB_OHCI_TD_NAK_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_nak(void) {
+}
+#define TRACE_USB_OHCI_TD_PACKET_STATUS 0
+#define TRACE_USB_OHCI_TD_PACKET_STATUS_ENABLED 0
+#define TRACE_USB_OHCI_TD_PACKET_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_packet_status(int status) {
+ (void)status;
+}
+#define TRACE_USB_OHCI_TD_PKT_FULL 0
+#define TRACE_USB_OHCI_TD_PKT_FULL_ENABLED 0
+#define TRACE_USB_OHCI_TD_PKT_FULL_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_pkt_full(const char *dir, const char *buf) {
+ (void)dir;
+ (void)buf;
+}
+#define TRACE_USB_OHCI_TD_PKT_HDR 0
+#define TRACE_USB_OHCI_TD_PKT_HDR_ENABLED 0
+#define TRACE_USB_OHCI_TD_PKT_HDR_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_pkt_hdr(uint32_t addr, int64_t pktlen, int64_t len, const char *s, int flag_r, uint32_t cbp, uint32_t be) {
+ (void)addr;
+ (void)pktlen;
+ (void)len;
+ (void)s;
+ (void)flag_r;
+ (void)cbp;
+ (void)be;
+}
+#define TRACE_USB_OHCI_TD_PKT_SHORT 0
+#define TRACE_USB_OHCI_TD_PKT_SHORT_ENABLED 0
+#define TRACE_USB_OHCI_TD_PKT_SHORT_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_pkt_short(const char *dir, const char *buf) {
+ (void)dir;
+ (void)buf;
+}
+#define TRACE_USB_OHCI_TD_READ_ERROR 0
+#define TRACE_USB_OHCI_TD_READ_ERROR_ENABLED 0
+#define TRACE_USB_OHCI_TD_READ_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_read_error(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_USB_OHCI_TD_SKIP_ASYNC 0
+#define TRACE_USB_OHCI_TD_SKIP_ASYNC_ENABLED 0
+#define TRACE_USB_OHCI_TD_SKIP_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_skip_async(void) {
+}
+#define TRACE_USB_OHCI_TD_STALL 0
+#define TRACE_USB_OHCI_TD_STALL_ENABLED 0
+#define TRACE_USB_OHCI_TD_STALL_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_stall(void) {
+}
+#define TRACE_USB_OHCI_TD_TOO_MANY_PENDING 0
+#define TRACE_USB_OHCI_TD_TOO_MANY_PENDING_ENABLED 0
+#define TRACE_USB_OHCI_TD_TOO_MANY_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_too_many_pending(int ep) {
+ (void)ep;
+}
+#define TRACE_USB_OHCI_TD_UNDERRUN 0
+#define TRACE_USB_OHCI_TD_UNDERRUN_ENABLED 0
+#define TRACE_USB_OHCI_TD_UNDERRUN_BACKEND_DSTATE() (0)
+static inline void trace_usb_ohci_td_underrun(void) {
+}
+#define TRACE_USB_PACKET_STATE_CHANGE 0
+#define TRACE_USB_PACKET_STATE_CHANGE_ENABLED 0
+#define TRACE_USB_PACKET_STATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) {
+ (void)bus;
+ (void)port;
+ (void)ep;
+ (void)p;
+ (void)o;
+ (void)n;
+}
+#define TRACE_USB_PACKET_STATE_FAULT 0
+#define TRACE_USB_PACKET_STATE_FAULT_ENABLED 0
+#define TRACE_USB_PACKET_STATE_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) {
+ (void)bus;
+ (void)port;
+ (void)ep;
+ (void)p;
+ (void)o;
+ (void)n;
+}
+#define TRACE_USB_PORT_ATTACH 0
+#define TRACE_USB_PORT_ATTACH_ENABLED 0
+#define TRACE_USB_PORT_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) {
+ (void)bus;
+ (void)port;
+ (void)devspeed;
+ (void)portspeed;
+}
+#define TRACE_USB_PORT_CLAIM 0
+#define TRACE_USB_PORT_CLAIM_ENABLED 0
+#define TRACE_USB_PORT_CLAIM_BACKEND_DSTATE() (0)
+static inline void trace_usb_port_claim(int bus, const char *port) {
+ (void)bus;
+ (void)port;
+}
+#define TRACE_USB_PORT_DETACH 0
+#define TRACE_USB_PORT_DETACH_ENABLED 0
+#define TRACE_USB_PORT_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_usb_port_detach(int bus, const char *port) {
+ (void)bus;
+ (void)port;
+}
+#define TRACE_USB_PORT_RELEASE 0
+#define TRACE_USB_PORT_RELEASE_ENABLED 0
+#define TRACE_USB_PORT_RELEASE_BACKEND_DSTATE() (0)
+static inline void trace_usb_port_release(int bus, const char *port) {
+ (void)bus;
+ (void)port;
+}
+#define TRACE_USB_SERIAL_BAD_TOKEN 0
+#define TRACE_USB_SERIAL_BAD_TOKEN_ENABLED 0
+#define TRACE_USB_SERIAL_BAD_TOKEN_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_bad_token(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_SERIAL_HANDLE_CONTROL 0
+#define TRACE_USB_SERIAL_HANDLE_CONTROL_ENABLED 0
+#define TRACE_USB_SERIAL_HANDLE_CONTROL_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_handle_control(int bus, int addr, int request, int value) {
+ (void)bus;
+ (void)addr;
+ (void)request;
+ (void)value;
+}
+#define TRACE_USB_SERIAL_RESET 0
+#define TRACE_USB_SERIAL_RESET_ENABLED 0
+#define TRACE_USB_SERIAL_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_reset(int bus, int addr) {
+ (void)bus;
+ (void)addr;
+}
+#define TRACE_USB_SERIAL_SET_BAUD 0
+#define TRACE_USB_SERIAL_SET_BAUD_ENABLED 0
+#define TRACE_USB_SERIAL_SET_BAUD_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_set_baud(int bus, int addr, int baud) {
+ (void)bus;
+ (void)addr;
+ (void)baud;
+}
+#define TRACE_USB_SERIAL_SET_DATA 0
+#define TRACE_USB_SERIAL_SET_DATA_ENABLED 0
+#define TRACE_USB_SERIAL_SET_DATA_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_set_data(int bus, int addr, int parity, int data, int stop) {
+ (void)bus;
+ (void)addr;
+ (void)parity;
+ (void)data;
+ (void)stop;
+}
+#define TRACE_USB_SERIAL_SET_FLOW_CONTROL 0
+#define TRACE_USB_SERIAL_SET_FLOW_CONTROL_ENABLED 0
+#define TRACE_USB_SERIAL_SET_FLOW_CONTROL_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_set_flow_control(int bus, int addr, int index) {
+ (void)bus;
+ (void)addr;
+ (void)index;
+}
+#define TRACE_USB_SERIAL_SET_XONXOFF 0
+#define TRACE_USB_SERIAL_SET_XONXOFF_ENABLED 0
+#define TRACE_USB_SERIAL_SET_XONXOFF_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_set_xonxoff(int bus, int addr, uint8_t xon, uint8_t xoff) {
+ (void)bus;
+ (void)addr;
+ (void)xon;
+ (void)xoff;
+}
+#define TRACE_USB_SERIAL_UNSUPPORTED_CONTROL 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_CONTROL_ENABLED 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_CONTROL_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_unsupported_control(int bus, int addr, int request, int value) {
+ (void)bus;
+ (void)addr;
+ (void)request;
+ (void)value;
+}
+#define TRACE_USB_SERIAL_UNSUPPORTED_DATA_BITS 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_DATA_BITS_ENABLED 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_DATA_BITS_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_unsupported_data_bits(int bus, int addr, int value) {
+ (void)bus;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_USB_SERIAL_UNSUPPORTED_PARITY 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_PARITY_ENABLED 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_PARITY_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_unsupported_parity(int bus, int addr, int value) {
+ (void)bus;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_USB_SERIAL_UNSUPPORTED_STOPBITS 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_STOPBITS_ENABLED 0
+#define TRACE_USB_SERIAL_UNSUPPORTED_STOPBITS_BACKEND_DSTATE() (0)
+static inline void trace_usb_serial_unsupported_stopbits(int bus, int addr, int value) {
+ (void)bus;
+ (void)addr;
+ (void)value;
+}
+#define TRACE_USB_SET_ADDR 0
+#define TRACE_USB_SET_ADDR_ENABLED 0
+#define TRACE_USB_SET_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_usb_set_addr(int addr) {
+ (void)addr;
+}
+#define TRACE_USB_SET_CONFIG 0
+#define TRACE_USB_SET_CONFIG_ENABLED 0
+#define TRACE_USB_SET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_usb_set_config(int addr, int config, int ret) {
+ (void)addr;
+ (void)config;
+ (void)ret;
+}
+#define TRACE_USB_SET_DEVICE_FEATURE 0
+#define TRACE_USB_SET_DEVICE_FEATURE_ENABLED 0
+#define TRACE_USB_SET_DEVICE_FEATURE_BACKEND_DSTATE() (0)
+static inline void trace_usb_set_device_feature(int addr, int feature, int ret) {
+ (void)addr;
+ (void)feature;
+ (void)ret;
+}
+#define TRACE_USB_SET_INTERFACE 0
+#define TRACE_USB_SET_INTERFACE_ENABLED 0
+#define TRACE_USB_SET_INTERFACE_BACKEND_DSTATE() (0)
+static inline void trace_usb_set_interface(int addr, int iface, int alt, int ret) {
+ (void)addr;
+ (void)iface;
+ (void)alt;
+ (void)ret;
+}
+#define TRACE_USB_UAS_COMMAND 0
+#define TRACE_USB_UAS_COMMAND_ENABLED 0
+#define TRACE_USB_UAS_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) {
+ (void)addr;
+ (void)tag;
+ (void)lun;
+ (void)lun64_1;
+ (void)lun64_2;
+}
+#define TRACE_USB_UAS_READ_READY 0
+#define TRACE_USB_UAS_READ_READY_ENABLED 0
+#define TRACE_USB_UAS_READ_READY_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_read_ready(int addr, uint16_t tag) {
+ (void)addr;
+ (void)tag;
+}
+#define TRACE_USB_UAS_RESET 0
+#define TRACE_USB_UAS_RESET_ENABLED 0
+#define TRACE_USB_UAS_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_reset(int addr) {
+ (void)addr;
+}
+#define TRACE_USB_UAS_RESPONSE 0
+#define TRACE_USB_UAS_RESPONSE_ENABLED 0
+#define TRACE_USB_UAS_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_response(int addr, uint16_t tag, uint8_t code) {
+ (void)addr;
+ (void)tag;
+ (void)code;
+}
+#define TRACE_USB_UAS_SCSI_COMPLETE 0
+#define TRACE_USB_UAS_SCSI_COMPLETE_ENABLED 0
+#define TRACE_USB_UAS_SCSI_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) {
+ (void)addr;
+ (void)tag;
+ (void)status;
+ (void)resid;
+}
+#define TRACE_USB_UAS_SCSI_DATA 0
+#define TRACE_USB_UAS_SCSI_DATA_ENABLED 0
+#define TRACE_USB_UAS_SCSI_DATA_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) {
+ (void)addr;
+ (void)tag;
+ (void)bytes;
+}
+#define TRACE_USB_UAS_SENSE 0
+#define TRACE_USB_UAS_SENSE_ENABLED 0
+#define TRACE_USB_UAS_SENSE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_sense(int addr, uint16_t tag, uint8_t status) {
+ (void)addr;
+ (void)tag;
+ (void)status;
+}
+#define TRACE_USB_UAS_TMF_ABORT_TASK 0
+#define TRACE_USB_UAS_TMF_ABORT_TASK_ENABLED 0
+#define TRACE_USB_UAS_TMF_ABORT_TASK_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) {
+ (void)addr;
+ (void)tag;
+ (void)task_tag;
+}
+#define TRACE_USB_UAS_TMF_LOGICAL_UNIT_RESET 0
+#define TRACE_USB_UAS_TMF_LOGICAL_UNIT_RESET_ENABLED 0
+#define TRACE_USB_UAS_TMF_LOGICAL_UNIT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) {
+ (void)addr;
+ (void)tag;
+ (void)lun;
+}
+#define TRACE_USB_UAS_TMF_UNSUPPORTED 0
+#define TRACE_USB_UAS_TMF_UNSUPPORTED_ENABLED 0
+#define TRACE_USB_UAS_TMF_UNSUPPORTED_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) {
+ (void)addr;
+ (void)tag;
+ (void)function;
+}
+#define TRACE_USB_UAS_WRITE_READY 0
+#define TRACE_USB_UAS_WRITE_READY_ENABLED 0
+#define TRACE_USB_UAS_WRITE_READY_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_write_ready(int addr, uint16_t tag) {
+ (void)addr;
+ (void)tag;
+}
+#define TRACE_USB_UAS_XFER_DATA 0
+#define TRACE_USB_UAS_XFER_DATA_ENABLED 0
+#define TRACE_USB_UAS_XFER_DATA_BACKEND_DSTATE() (0)
+static inline void trace_usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) {
+ (void)addr;
+ (void)tag;
+ (void)copy;
+ (void)uoff;
+ (void)usize;
+ (void)soff;
+ (void)ssize;
+}
+#define TRACE_USB_UHCI_EXIT 0
+#define TRACE_USB_UHCI_EXIT_ENABLED 0
+#define TRACE_USB_UHCI_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_exit(void) {
+}
+#define TRACE_USB_UHCI_FRAME_LOOP_CONTINUE 0
+#define TRACE_USB_UHCI_FRAME_LOOP_CONTINUE_ENABLED 0
+#define TRACE_USB_UHCI_FRAME_LOOP_CONTINUE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_frame_loop_continue(void) {
+}
+#define TRACE_USB_UHCI_FRAME_LOOP_STOP_IDLE 0
+#define TRACE_USB_UHCI_FRAME_LOOP_STOP_IDLE_ENABLED 0
+#define TRACE_USB_UHCI_FRAME_LOOP_STOP_IDLE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_frame_loop_stop_idle(void) {
+}
+#define TRACE_USB_UHCI_FRAME_START 0
+#define TRACE_USB_UHCI_FRAME_START_ENABLED 0
+#define TRACE_USB_UHCI_FRAME_START_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_frame_start(uint32_t num) {
+ (void)num;
+}
+#define TRACE_USB_UHCI_FRAME_STOP_BANDWIDTH 0
+#define TRACE_USB_UHCI_FRAME_STOP_BANDWIDTH_ENABLED 0
+#define TRACE_USB_UHCI_FRAME_STOP_BANDWIDTH_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_frame_stop_bandwidth(void) {
+}
+#define TRACE_USB_UHCI_MMIO_READW 0
+#define TRACE_USB_UHCI_MMIO_READW_ENABLED 0
+#define TRACE_USB_UHCI_MMIO_READW_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_mmio_readw(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_USB_UHCI_MMIO_WRITEW 0
+#define TRACE_USB_UHCI_MMIO_WRITEW_ENABLED 0
+#define TRACE_USB_UHCI_MMIO_WRITEW_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_mmio_writew(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_USB_UHCI_PACKET_ADD 0
+#define TRACE_USB_UHCI_PACKET_ADD_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_ADD_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_add(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_CANCEL 0
+#define TRACE_USB_UHCI_PACKET_CANCEL_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) {
+ (void)token;
+ (void)addr;
+ (void)done;
+}
+#define TRACE_USB_UHCI_PACKET_COMPLETE_BABBLE 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_BABBLE_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_BABBLE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_COMPLETE_ERROR 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_ERROR_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_COMPLETE_SHORTXFER 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_SHORTXFER_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_SHORTXFER_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_COMPLETE_STALL 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_STALL_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_STALL_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_COMPLETE_SUCCESS 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_SUCCESS_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_COMPLETE_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_DEL 0
+#define TRACE_USB_UHCI_PACKET_DEL_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_DEL_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_del(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_LINK_ASYNC 0
+#define TRACE_USB_UHCI_PACKET_LINK_ASYNC_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_LINK_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_link_async(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_PACKET_UNLINK_ASYNC 0
+#define TRACE_USB_UHCI_PACKET_UNLINK_ASYNC_ENABLED 0
+#define TRACE_USB_UHCI_PACKET_UNLINK_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) {
+ (void)token;
+ (void)addr;
+}
+#define TRACE_USB_UHCI_QH_LOAD 0
+#define TRACE_USB_UHCI_QH_LOAD_ENABLED 0
+#define TRACE_USB_UHCI_QH_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_qh_load(uint32_t qh) {
+ (void)qh;
+}
+#define TRACE_USB_UHCI_QUEUE_ADD 0
+#define TRACE_USB_UHCI_QUEUE_ADD_ENABLED 0
+#define TRACE_USB_UHCI_QUEUE_ADD_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_queue_add(uint32_t token) {
+ (void)token;
+}
+#define TRACE_USB_UHCI_QUEUE_DEL 0
+#define TRACE_USB_UHCI_QUEUE_DEL_ENABLED 0
+#define TRACE_USB_UHCI_QUEUE_DEL_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_queue_del(uint32_t token, const char *reason) {
+ (void)token;
+ (void)reason;
+}
+#define TRACE_USB_UHCI_RESET 0
+#define TRACE_USB_UHCI_RESET_ENABLED 0
+#define TRACE_USB_UHCI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_reset(void) {
+}
+#define TRACE_USB_UHCI_SCHEDULE_START 0
+#define TRACE_USB_UHCI_SCHEDULE_START_ENABLED 0
+#define TRACE_USB_UHCI_SCHEDULE_START_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_schedule_start(void) {
+}
+#define TRACE_USB_UHCI_SCHEDULE_STOP 0
+#define TRACE_USB_UHCI_SCHEDULE_STOP_ENABLED 0
+#define TRACE_USB_UHCI_SCHEDULE_STOP_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_schedule_stop(void) {
+}
+#define TRACE_USB_UHCI_TD_ASYNC 0
+#define TRACE_USB_UHCI_TD_ASYNC_ENABLED 0
+#define TRACE_USB_UHCI_TD_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_td_async(uint32_t qh, uint32_t td) {
+ (void)qh;
+ (void)td;
+}
+#define TRACE_USB_UHCI_TD_COMPLETE 0
+#define TRACE_USB_UHCI_TD_COMPLETE_ENABLED 0
+#define TRACE_USB_UHCI_TD_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_td_complete(uint32_t qh, uint32_t td) {
+ (void)qh;
+ (void)td;
+}
+#define TRACE_USB_UHCI_TD_LOAD 0
+#define TRACE_USB_UHCI_TD_LOAD_ENABLED 0
+#define TRACE_USB_UHCI_TD_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) {
+ (void)qh;
+ (void)td;
+ (void)ctrl;
+ (void)token;
+}
+#define TRACE_USB_UHCI_TD_NEXTQH 0
+#define TRACE_USB_UHCI_TD_NEXTQH_ENABLED 0
+#define TRACE_USB_UHCI_TD_NEXTQH_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_td_nextqh(uint32_t qh, uint32_t td) {
+ (void)qh;
+ (void)td;
+}
+#define TRACE_USB_UHCI_TD_QUEUE 0
+#define TRACE_USB_UHCI_TD_QUEUE_ENABLED 0
+#define TRACE_USB_UHCI_TD_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) {
+ (void)td;
+ (void)ctrl;
+ (void)token;
+}
+#define TRACE_USB_XHCI_CAP_READ 0
+#define TRACE_USB_XHCI_CAP_READ_ENABLED 0
+#define TRACE_USB_XHCI_CAP_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_cap_read(uint32_t off, uint32_t val) {
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_DOORBELL_READ 0
+#define TRACE_USB_XHCI_DOORBELL_READ_ENABLED 0
+#define TRACE_USB_XHCI_DOORBELL_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_doorbell_read(uint32_t off, uint32_t val) {
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_DOORBELL_WRITE 0
+#define TRACE_USB_XHCI_DOORBELL_WRITE_ENABLED 0
+#define TRACE_USB_XHCI_DOORBELL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_doorbell_write(uint32_t off, uint32_t val) {
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_ENFORCED_LIMIT 0
+#define TRACE_USB_XHCI_ENFORCED_LIMIT_ENABLED 0
+#define TRACE_USB_XHCI_ENFORCED_LIMIT_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_enforced_limit(const char *item) {
+ (void)item;
+}
+#define TRACE_USB_XHCI_EP_DISABLE 0
+#define TRACE_USB_XHCI_EP_DISABLE_ENABLED 0
+#define TRACE_USB_XHCI_EP_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) {
+ (void)slotid;
+ (void)epid;
+}
+#define TRACE_USB_XHCI_EP_ENABLE 0
+#define TRACE_USB_XHCI_EP_ENABLE_ENABLED 0
+#define TRACE_USB_XHCI_EP_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) {
+ (void)slotid;
+ (void)epid;
+}
+#define TRACE_USB_XHCI_EP_KICK 0
+#define TRACE_USB_XHCI_EP_KICK_ENABLED 0
+#define TRACE_USB_XHCI_EP_KICK_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) {
+ (void)slotid;
+ (void)epid;
+ (void)streamid;
+}
+#define TRACE_USB_XHCI_EP_RESET 0
+#define TRACE_USB_XHCI_EP_RESET_ENABLED 0
+#define TRACE_USB_XHCI_EP_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) {
+ (void)slotid;
+ (void)epid;
+}
+#define TRACE_USB_XHCI_EP_SET_DEQUEUE 0
+#define TRACE_USB_XHCI_EP_SET_DEQUEUE_ENABLED 0
+#define TRACE_USB_XHCI_EP_SET_DEQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) {
+ (void)slotid;
+ (void)epid;
+ (void)streamid;
+ (void)param;
+}
+#define TRACE_USB_XHCI_EP_STATE 0
+#define TRACE_USB_XHCI_EP_STATE_ENABLED 0
+#define TRACE_USB_XHCI_EP_STATE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_ep_state(uint32_t slotid, uint32_t epid, const char *os, const char *ns) {
+ (void)slotid;
+ (void)epid;
+ (void)os;
+ (void)ns;
+}
+#define TRACE_USB_XHCI_EP_STOP 0
+#define TRACE_USB_XHCI_EP_STOP_ENABLED 0
+#define TRACE_USB_XHCI_EP_STOP_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) {
+ (void)slotid;
+ (void)epid;
+}
+#define TRACE_USB_XHCI_EXIT 0
+#define TRACE_USB_XHCI_EXIT_ENABLED 0
+#define TRACE_USB_XHCI_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_exit(void) {
+}
+#define TRACE_USB_XHCI_FETCH_TRB 0
+#define TRACE_USB_XHCI_FETCH_TRB_ENABLED 0
+#define TRACE_USB_XHCI_FETCH_TRB_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) {
+ (void)addr;
+ (void)name;
+ (void)param;
+ (void)status;
+ (void)control;
+}
+#define TRACE_USB_XHCI_IRQ_INTX 0
+#define TRACE_USB_XHCI_IRQ_INTX_ENABLED 0
+#define TRACE_USB_XHCI_IRQ_INTX_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_irq_intx(uint32_t level) {
+ (void)level;
+}
+#define TRACE_USB_XHCI_IRQ_MSI 0
+#define TRACE_USB_XHCI_IRQ_MSI_ENABLED 0
+#define TRACE_USB_XHCI_IRQ_MSI_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_irq_msi(uint32_t nr) {
+ (void)nr;
+}
+#define TRACE_USB_XHCI_IRQ_MSIX 0
+#define TRACE_USB_XHCI_IRQ_MSIX_ENABLED 0
+#define TRACE_USB_XHCI_IRQ_MSIX_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_irq_msix(uint32_t nr) {
+ (void)nr;
+}
+#define TRACE_USB_XHCI_IRQ_MSIX_UNUSE 0
+#define TRACE_USB_XHCI_IRQ_MSIX_UNUSE_ENABLED 0
+#define TRACE_USB_XHCI_IRQ_MSIX_UNUSE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_irq_msix_unuse(uint32_t nr) {
+ (void)nr;
+}
+#define TRACE_USB_XHCI_IRQ_MSIX_USE 0
+#define TRACE_USB_XHCI_IRQ_MSIX_USE_ENABLED 0
+#define TRACE_USB_XHCI_IRQ_MSIX_USE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_irq_msix_use(uint32_t nr) {
+ (void)nr;
+}
+#define TRACE_USB_XHCI_OPER_READ 0
+#define TRACE_USB_XHCI_OPER_READ_ENABLED 0
+#define TRACE_USB_XHCI_OPER_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_oper_read(uint32_t off, uint32_t val) {
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_OPER_WRITE 0
+#define TRACE_USB_XHCI_OPER_WRITE_ENABLED 0
+#define TRACE_USB_XHCI_OPER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_oper_write(uint32_t off, uint32_t val) {
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_PORT_LINK 0
+#define TRACE_USB_XHCI_PORT_LINK_ENABLED 0
+#define TRACE_USB_XHCI_PORT_LINK_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_port_link(uint32_t port, uint32_t pls) {
+ (void)port;
+ (void)pls;
+}
+#define TRACE_USB_XHCI_PORT_NOTIFY 0
+#define TRACE_USB_XHCI_PORT_NOTIFY_ENABLED 0
+#define TRACE_USB_XHCI_PORT_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_port_notify(uint32_t port, uint32_t pls) {
+ (void)port;
+ (void)pls;
+}
+#define TRACE_USB_XHCI_PORT_READ 0
+#define TRACE_USB_XHCI_PORT_READ_ENABLED 0
+#define TRACE_USB_XHCI_PORT_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) {
+ (void)port;
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_PORT_RESET 0
+#define TRACE_USB_XHCI_PORT_RESET_ENABLED 0
+#define TRACE_USB_XHCI_PORT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_port_reset(uint32_t port, bool warm) {
+ (void)port;
+ (void)warm;
+}
+#define TRACE_USB_XHCI_PORT_WRITE 0
+#define TRACE_USB_XHCI_PORT_WRITE_ENABLED 0
+#define TRACE_USB_XHCI_PORT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) {
+ (void)port;
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_QUEUE_EVENT 0
+#define TRACE_USB_XHCI_QUEUE_EVENT_ENABLED 0
+#define TRACE_USB_XHCI_QUEUE_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) {
+ (void)vector;
+ (void)idx;
+ (void)trb;
+ (void)evt;
+ (void)param;
+ (void)status;
+ (void)control;
+}
+#define TRACE_USB_XHCI_RESET 0
+#define TRACE_USB_XHCI_RESET_ENABLED 0
+#define TRACE_USB_XHCI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_reset(void) {
+}
+#define TRACE_USB_XHCI_RUN 0
+#define TRACE_USB_XHCI_RUN_ENABLED 0
+#define TRACE_USB_XHCI_RUN_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_run(void) {
+}
+#define TRACE_USB_XHCI_RUNTIME_READ 0
+#define TRACE_USB_XHCI_RUNTIME_READ_ENABLED 0
+#define TRACE_USB_XHCI_RUNTIME_READ_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_runtime_read(uint32_t off, uint32_t val) {
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_RUNTIME_WRITE 0
+#define TRACE_USB_XHCI_RUNTIME_WRITE_ENABLED 0
+#define TRACE_USB_XHCI_RUNTIME_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_runtime_write(uint32_t off, uint32_t val) {
+ (void)off;
+ (void)val;
+}
+#define TRACE_USB_XHCI_SLOT_ADDRESS 0
+#define TRACE_USB_XHCI_SLOT_ADDRESS_ENABLED 0
+#define TRACE_USB_XHCI_SLOT_ADDRESS_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_slot_address(uint32_t slotid, const char *port) {
+ (void)slotid;
+ (void)port;
+}
+#define TRACE_USB_XHCI_SLOT_CONFIGURE 0
+#define TRACE_USB_XHCI_SLOT_CONFIGURE_ENABLED 0
+#define TRACE_USB_XHCI_SLOT_CONFIGURE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_slot_configure(uint32_t slotid) {
+ (void)slotid;
+}
+#define TRACE_USB_XHCI_SLOT_DISABLE 0
+#define TRACE_USB_XHCI_SLOT_DISABLE_ENABLED 0
+#define TRACE_USB_XHCI_SLOT_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_slot_disable(uint32_t slotid) {
+ (void)slotid;
+}
+#define TRACE_USB_XHCI_SLOT_ENABLE 0
+#define TRACE_USB_XHCI_SLOT_ENABLE_ENABLED 0
+#define TRACE_USB_XHCI_SLOT_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_slot_enable(uint32_t slotid) {
+ (void)slotid;
+}
+#define TRACE_USB_XHCI_SLOT_EVALUATE 0
+#define TRACE_USB_XHCI_SLOT_EVALUATE_ENABLED 0
+#define TRACE_USB_XHCI_SLOT_EVALUATE_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_slot_evaluate(uint32_t slotid) {
+ (void)slotid;
+}
+#define TRACE_USB_XHCI_SLOT_RESET 0
+#define TRACE_USB_XHCI_SLOT_RESET_ENABLED 0
+#define TRACE_USB_XHCI_SLOT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_slot_reset(uint32_t slotid) {
+ (void)slotid;
+}
+#define TRACE_USB_XHCI_STOP 0
+#define TRACE_USB_XHCI_STOP_ENABLED 0
+#define TRACE_USB_XHCI_STOP_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_stop(void) {
+}
+#define TRACE_USB_XHCI_UNIMPLEMENTED 0
+#define TRACE_USB_XHCI_UNIMPLEMENTED_ENABLED 0
+#define TRACE_USB_XHCI_UNIMPLEMENTED_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_unimplemented(const char *item, int nr) {
+ (void)item;
+ (void)nr;
+}
+#define TRACE_USB_XHCI_XFER_ASYNC 0
+#define TRACE_USB_XHCI_XFER_ASYNC_ENABLED 0
+#define TRACE_USB_XHCI_XFER_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_xfer_async(void *xfer) {
+ (void)xfer;
+}
+#define TRACE_USB_XHCI_XFER_ERROR 0
+#define TRACE_USB_XHCI_XFER_ERROR_ENABLED 0
+#define TRACE_USB_XHCI_XFER_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_xfer_error(void *xfer, uint32_t ret) {
+ (void)xfer;
+ (void)ret;
+}
+#define TRACE_USB_XHCI_XFER_NAK 0
+#define TRACE_USB_XHCI_XFER_NAK_ENABLED 0
+#define TRACE_USB_XHCI_XFER_NAK_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_xfer_nak(void *xfer) {
+ (void)xfer;
+}
+#define TRACE_USB_XHCI_XFER_RETRY 0
+#define TRACE_USB_XHCI_XFER_RETRY_ENABLED 0
+#define TRACE_USB_XHCI_XFER_RETRY_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_xfer_retry(void *xfer) {
+ (void)xfer;
+}
+#define TRACE_USB_XHCI_XFER_START 0
+#define TRACE_USB_XHCI_XFER_START_ENABLED 0
+#define TRACE_USB_XHCI_XFER_START_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) {
+ (void)xfer;
+ (void)slotid;
+ (void)epid;
+ (void)streamid;
+}
+#define TRACE_USB_XHCI_XFER_SUCCESS 0
+#define TRACE_USB_XHCI_XFER_SUCCESS_ENABLED 0
+#define TRACE_USB_XHCI_XFER_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_usb_xhci_xfer_success(void *xfer, uint32_t bytes) {
+ (void)xfer;
+ (void)bytes;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_vfio.h b/trace/trace-hw_vfio.h
new file mode 100644
index 0000000000..c4357c21c5
--- /dev/null
+++ b/trace/trace-hw_vfio.h
@@ -0,0 +1,1223 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_VFIO_H
+#define TRACE_TRACE_HW_VFIO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_IOMMUFD_CDEV_ALLOC_IOAS 0
+#define TRACE_IOMMUFD_CDEV_ALLOC_IOAS_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_ALLOC_IOAS_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_alloc_ioas(int iommufd, int ioas_id) {
+ (void)iommufd;
+ (void)ioas_id;
+}
+#define TRACE_IOMMUFD_CDEV_ATTACH_IOAS_HWPT 0
+#define TRACE_IOMMUFD_CDEV_ATTACH_IOAS_HWPT_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_ATTACH_IOAS_HWPT_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_attach_ioas_hwpt(int iommufd, const char *name, int devfd, int id) {
+ (void)iommufd;
+ (void)name;
+ (void)devfd;
+ (void)id;
+}
+#define TRACE_IOMMUFD_CDEV_CONNECT_AND_BIND 0
+#define TRACE_IOMMUFD_CDEV_CONNECT_AND_BIND_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_CONNECT_AND_BIND_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_connect_and_bind(int iommufd, const char *name, int devfd, int devid) {
+ (void)iommufd;
+ (void)name;
+ (void)devfd;
+ (void)devid;
+}
+#define TRACE_IOMMUFD_CDEV_DETACH_IOAS_HWPT 0
+#define TRACE_IOMMUFD_CDEV_DETACH_IOAS_HWPT_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_DETACH_IOAS_HWPT_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_detach_ioas_hwpt(int iommufd, const char *name) {
+ (void)iommufd;
+ (void)name;
+}
+#define TRACE_IOMMUFD_CDEV_DEVICE_INFO 0
+#define TRACE_IOMMUFD_CDEV_DEVICE_INFO_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_DEVICE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_device_info(char *name, int devfd, int num_irqs, int num_regions, int flags) {
+ (void)name;
+ (void)devfd;
+ (void)num_irqs;
+ (void)num_regions;
+ (void)flags;
+}
+#define TRACE_IOMMUFD_CDEV_FAIL_ATTACH_EXISTING_CONTAINER 0
+#define TRACE_IOMMUFD_CDEV_FAIL_ATTACH_EXISTING_CONTAINER_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_FAIL_ATTACH_EXISTING_CONTAINER_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_fail_attach_existing_container(const char *msg) {
+ (void)msg;
+}
+#define TRACE_IOMMUFD_CDEV_GETFD 0
+#define TRACE_IOMMUFD_CDEV_GETFD_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_GETFD_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_getfd(const char *dev, int devfd) {
+ (void)dev;
+ (void)devfd;
+}
+#define TRACE_IOMMUFD_CDEV_PCI_HOT_RESET_DEP_DEVICES 0
+#define TRACE_IOMMUFD_CDEV_PCI_HOT_RESET_DEP_DEVICES_ENABLED 0
+#define TRACE_IOMMUFD_CDEV_PCI_HOT_RESET_DEP_DEVICES_BACKEND_DSTATE() (0)
+static inline void trace_iommufd_cdev_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int dev_id) {
+ (void)domain;
+ (void)bus;
+ (void)slot;
+ (void)function;
+ (void)dev_id;
+}
+#define TRACE_VFIO_ADD_EXT_CAP_DROPPED 0
+#define TRACE_VFIO_ADD_EXT_CAP_DROPPED_ENABLED 0
+#define TRACE_VFIO_ADD_EXT_CAP_DROPPED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_add_ext_cap_dropped(const char *name, uint16_t cap, uint16_t offset) {
+ (void)name;
+ (void)cap;
+ (void)offset;
+}
+#define TRACE_VFIO_CHECK_AF_FLR 0
+#define TRACE_VFIO_CHECK_AF_FLR_ENABLED 0
+#define TRACE_VFIO_CHECK_AF_FLR_BACKEND_DSTATE() (0)
+static inline void trace_vfio_check_af_flr(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_CHECK_PCIE_FLR 0
+#define TRACE_VFIO_CHECK_PCIE_FLR_ENABLED 0
+#define TRACE_VFIO_CHECK_PCIE_FLR_BACKEND_DSTATE() (0)
+static inline void trace_vfio_check_pcie_flr(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_CHECK_PM_RESET 0
+#define TRACE_VFIO_CHECK_PM_RESET_ENABLED 0
+#define TRACE_VFIO_CHECK_PM_RESET_BACKEND_DSTATE() (0)
+static inline void trace_vfio_check_pm_reset(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_CONTAINER_DISCONNECT 0
+#define TRACE_VFIO_CONTAINER_DISCONNECT_ENABLED 0
+#define TRACE_VFIO_CONTAINER_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_container_disconnect(int fd) {
+ (void)fd;
+}
+#define TRACE_VFIO_CONTAINER_QUERY_DIRTY_BITMAP 0
+#define TRACE_VFIO_CONTAINER_QUERY_DIRTY_BITMAP_ENABLED 0
+#define TRACE_VFIO_CONTAINER_QUERY_DIRTY_BITMAP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_container_query_dirty_bitmap(uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t translated_addr, uint64_t dirty_pages) {
+ (void)iova;
+ (void)size;
+ (void)bitmap_size;
+ (void)translated_addr;
+ (void)dirty_pages;
+}
+#define TRACE_VFIO_CPR_FIND_DEVICE 0
+#define TRACE_VFIO_CPR_FIND_DEVICE_ENABLED 0
+#define TRACE_VFIO_CPR_FIND_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_cpr_find_device(uint32_t ioas_id, int devid, uint32_t hwpt_id) {
+ (void)ioas_id;
+ (void)devid;
+ (void)hwpt_id;
+}
+#define TRACE_VFIO_DEVICE_ATTACH 0
+#define TRACE_VFIO_DEVICE_ATTACH_ENABLED 0
+#define TRACE_VFIO_DEVICE_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_attach(const char *name, int group_id) {
+ (void)name;
+ (void)group_id;
+}
+#define TRACE_VFIO_DEVICE_DETACH 0
+#define TRACE_VFIO_DEVICE_DETACH_ENABLED 0
+#define TRACE_VFIO_DEVICE_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_detach(const char *name, int group_id) {
+ (void)name;
+ (void)group_id;
+}
+#define TRACE_VFIO_DEVICE_DIRTY_TRACKING_START 0
+#define TRACE_VFIO_DEVICE_DIRTY_TRACKING_START_ENABLED 0
+#define TRACE_VFIO_DEVICE_DIRTY_TRACKING_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_dirty_tracking_start(int nr_ranges, uint64_t min32, uint64_t max32, uint64_t min64, uint64_t max64, uint64_t minpci, uint64_t maxpci) {
+ (void)nr_ranges;
+ (void)min32;
+ (void)max32;
+ (void)min64;
+ (void)max64;
+ (void)minpci;
+ (void)maxpci;
+}
+#define TRACE_VFIO_DEVICE_DIRTY_TRACKING_UPDATE 0
+#define TRACE_VFIO_DEVICE_DIRTY_TRACKING_UPDATE_ENABLED 0
+#define TRACE_VFIO_DEVICE_DIRTY_TRACKING_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_dirty_tracking_update(uint64_t start, uint64_t end, uint64_t min, uint64_t max) {
+ (void)start;
+ (void)end;
+ (void)min;
+ (void)max;
+}
+#define TRACE_VFIO_DEVICE_GET 0
+#define TRACE_VFIO_DEVICE_GET_ENABLED 0
+#define TRACE_VFIO_DEVICE_GET_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_get(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) {
+ (void)name;
+ (void)flags;
+ (void)num_regions;
+ (void)num_irqs;
+}
+#define TRACE_VFIO_DEVICE_GET_REGION_INFO_TYPE 0
+#define TRACE_VFIO_DEVICE_GET_REGION_INFO_TYPE_ENABLED 0
+#define TRACE_VFIO_DEVICE_GET_REGION_INFO_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_get_region_info_type(const char *name, int index, uint32_t type, uint32_t subtype) {
+ (void)name;
+ (void)index;
+ (void)type;
+ (void)subtype;
+}
+#define TRACE_VFIO_DEVICE_PUT 0
+#define TRACE_VFIO_DEVICE_PUT_ENABLED 0
+#define TRACE_VFIO_DEVICE_PUT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_put(int fd) {
+ (void)fd;
+}
+#define TRACE_VFIO_DEVICE_RESET_HANDLER 0
+#define TRACE_VFIO_DEVICE_RESET_HANDLER_ENABLED 0
+#define TRACE_VFIO_DEVICE_RESET_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_vfio_device_reset_handler(void) {
+}
+#define TRACE_VFIO_DISPLAY_EDID_AVAILABLE 0
+#define TRACE_VFIO_DISPLAY_EDID_AVAILABLE_ENABLED 0
+#define TRACE_VFIO_DISPLAY_EDID_AVAILABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_display_edid_available(void) {
+}
+#define TRACE_VFIO_DISPLAY_EDID_LINK_DOWN 0
+#define TRACE_VFIO_DISPLAY_EDID_LINK_DOWN_ENABLED 0
+#define TRACE_VFIO_DISPLAY_EDID_LINK_DOWN_BACKEND_DSTATE() (0)
+static inline void trace_vfio_display_edid_link_down(void) {
+}
+#define TRACE_VFIO_DISPLAY_EDID_LINK_UP 0
+#define TRACE_VFIO_DISPLAY_EDID_LINK_UP_ENABLED 0
+#define TRACE_VFIO_DISPLAY_EDID_LINK_UP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_display_edid_link_up(void) {
+}
+#define TRACE_VFIO_DISPLAY_EDID_UPDATE 0
+#define TRACE_VFIO_DISPLAY_EDID_UPDATE_ENABLED 0
+#define TRACE_VFIO_DISPLAY_EDID_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_display_edid_update(uint32_t prefx, uint32_t prefy) {
+ (void)prefx;
+ (void)prefy;
+}
+#define TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR 0
+#define TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR_ENABLED 0
+#define TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_vfio_display_edid_write_error(void) {
+}
+#define TRACE_VFIO_GROUP_PUT 0
+#define TRACE_VFIO_GROUP_PUT_ENABLED 0
+#define TRACE_VFIO_GROUP_PUT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_group_put(int fd) {
+ (void)fd;
+}
+#define TRACE_VFIO_INTX_DISABLE 0
+#define TRACE_VFIO_INTX_DISABLE_ENABLED 0
+#define TRACE_VFIO_INTX_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_intx_disable(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_INTX_DISABLE_KVM 0
+#define TRACE_VFIO_INTX_DISABLE_KVM_ENABLED 0
+#define TRACE_VFIO_INTX_DISABLE_KVM_BACKEND_DSTATE() (0)
+static inline void trace_vfio_intx_disable_kvm(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_INTX_ENABLE 0
+#define TRACE_VFIO_INTX_ENABLE_ENABLED 0
+#define TRACE_VFIO_INTX_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_intx_enable(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_INTX_ENABLE_KVM 0
+#define TRACE_VFIO_INTX_ENABLE_KVM_ENABLED 0
+#define TRACE_VFIO_INTX_ENABLE_KVM_BACKEND_DSTATE() (0)
+static inline void trace_vfio_intx_enable_kvm(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_INTX_INTERRUPT 0
+#define TRACE_VFIO_INTX_INTERRUPT_ENABLED 0
+#define TRACE_VFIO_INTX_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_intx_interrupt(const char *name, char line) {
+ (void)name;
+ (void)line;
+}
+#define TRACE_VFIO_INTX_UPDATE 0
+#define TRACE_VFIO_INTX_UPDATE_ENABLED 0
+#define TRACE_VFIO_INTX_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_intx_update(const char *name, int new_irq, int target_irq) {
+ (void)name;
+ (void)new_irq;
+ (void)target_irq;
+}
+#define TRACE_VFIO_IOEVENTFD_EXIT 0
+#define TRACE_VFIO_IOEVENTFD_EXIT_ENABLED 0
+#define TRACE_VFIO_IOEVENTFD_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_ioeventfd_exit(const char *name, uint64_t addr, unsigned size, uint64_t data) {
+ (void)name;
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_VFIO_IOEVENTFD_HANDLER 0
+#define TRACE_VFIO_IOEVENTFD_HANDLER_ENABLED 0
+#define TRACE_VFIO_IOEVENTFD_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_vfio_ioeventfd_handler(const char *name, uint64_t addr, unsigned size, uint64_t data) {
+ (void)name;
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_VFIO_IOEVENTFD_INIT 0
+#define TRACE_VFIO_IOEVENTFD_INIT_ENABLED 0
+#define TRACE_VFIO_IOEVENTFD_INIT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_ioeventfd_init(const char *name, uint64_t addr, unsigned size, uint64_t data, bool vfio) {
+ (void)name;
+ (void)addr;
+ (void)size;
+ (void)data;
+ (void)vfio;
+}
+#define TRACE_VFIO_IOMMU_MAP_DIRTY_NOTIFY 0
+#define TRACE_VFIO_IOMMU_MAP_DIRTY_NOTIFY_ENABLED 0
+#define TRACE_VFIO_IOMMU_MAP_DIRTY_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_vfio_iommu_map_dirty_notify(uint64_t iova_start, uint64_t iova_end) {
+ (void)iova_start;
+ (void)iova_end;
+}
+#define TRACE_VFIO_IOMMU_MAP_NOTIFY 0
+#define TRACE_VFIO_IOMMU_MAP_NOTIFY_ENABLED 0
+#define TRACE_VFIO_IOMMU_MAP_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_vfio_iommu_map_notify(const char *op, uint64_t iova_start, uint64_t iova_end) {
+ (void)op;
+ (void)iova_start;
+ (void)iova_end;
+}
+#define TRACE_VFIO_KNOWN_SAFE_MISALIGNMENT 0
+#define TRACE_VFIO_KNOWN_SAFE_MISALIGNMENT_ENABLED 0
+#define TRACE_VFIO_KNOWN_SAFE_MISALIGNMENT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_known_safe_misalignment(const char *name, uint64_t iova, uint64_t offset_within_region, uintptr_t page_size) {
+ (void)name;
+ (void)iova;
+ (void)offset_within_region;
+ (void)page_size;
+}
+#define TRACE_VFIO_LISTENER_REGION_ADD_IOMMU 0
+#define TRACE_VFIO_LISTENER_REGION_ADD_IOMMU_ENABLED 0
+#define TRACE_VFIO_LISTENER_REGION_ADD_IOMMU_BACKEND_DSTATE() (0)
+static inline void trace_vfio_listener_region_add_iommu(const char* name, uint64_t start, uint64_t end) {
+ (void)name;
+ (void)start;
+ (void)end;
+}
+#define TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP 0
+#define TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP_ENABLED 0
+#define TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_listener_region_add_no_dma_map(const char *name, uint64_t iova, uint64_t size, uint64_t page_size) {
+ (void)name;
+ (void)iova;
+ (void)size;
+ (void)page_size;
+}
+#define TRACE_VFIO_LISTENER_REGION_ADD_RAM 0
+#define TRACE_VFIO_LISTENER_REGION_ADD_RAM_ENABLED 0
+#define TRACE_VFIO_LISTENER_REGION_ADD_RAM_BACKEND_DSTATE() (0)
+static inline void trace_vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) {
+ (void)iova_start;
+ (void)iova_end;
+ (void)vaddr;
+}
+#define TRACE_VFIO_LISTENER_REGION_DEL 0
+#define TRACE_VFIO_LISTENER_REGION_DEL_ENABLED 0
+#define TRACE_VFIO_LISTENER_REGION_DEL_BACKEND_DSTATE() (0)
+static inline void trace_vfio_listener_region_del(uint64_t start, uint64_t end) {
+ (void)start;
+ (void)end;
+}
+#define TRACE_VFIO_LISTENER_REGION_DEL_IOMMU 0
+#define TRACE_VFIO_LISTENER_REGION_DEL_IOMMU_ENABLED 0
+#define TRACE_VFIO_LISTENER_REGION_DEL_IOMMU_BACKEND_DSTATE() (0)
+static inline void trace_vfio_listener_region_del_iommu(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LISTENER_REGION_SKIP 0
+#define TRACE_VFIO_LISTENER_REGION_SKIP_ENABLED 0
+#define TRACE_VFIO_LISTENER_REGION_SKIP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_listener_region_skip(const char *name, uint64_t start, uint64_t end) {
+ (void)name;
+ (void)start;
+ (void)end;
+}
+#define TRACE_VFIO_LOAD_BUFS_THREAD_END 0
+#define TRACE_VFIO_LOAD_BUFS_THREAD_END_ENABLED 0
+#define TRACE_VFIO_LOAD_BUFS_THREAD_END_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_bufs_thread_end(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LOAD_BUFS_THREAD_START 0
+#define TRACE_VFIO_LOAD_BUFS_THREAD_START_ENABLED 0
+#define TRACE_VFIO_LOAD_BUFS_THREAD_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_bufs_thread_start(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LOAD_CLEANUP 0
+#define TRACE_VFIO_LOAD_CLEANUP_ENABLED 0
+#define TRACE_VFIO_LOAD_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_cleanup(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LOAD_DEVICE_CONFIG_STATE_END 0
+#define TRACE_VFIO_LOAD_DEVICE_CONFIG_STATE_END_ENABLED 0
+#define TRACE_VFIO_LOAD_DEVICE_CONFIG_STATE_END_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_device_config_state_end(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LOAD_DEVICE_CONFIG_STATE_START 0
+#define TRACE_VFIO_LOAD_DEVICE_CONFIG_STATE_START_ENABLED 0
+#define TRACE_VFIO_LOAD_DEVICE_CONFIG_STATE_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_device_config_state_start(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LOAD_STATE 0
+#define TRACE_VFIO_LOAD_STATE_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state(const char *name, uint64_t data) {
+ (void)name;
+ (void)data;
+}
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_END 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_END_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_END_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state_device_buffer_end(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_INCOMING 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_INCOMING_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_INCOMING_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state_device_buffer_incoming(const char *name, uint32_t idx) {
+ (void)name;
+ (void)idx;
+}
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_LOAD_END 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_LOAD_END_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_LOAD_END_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state_device_buffer_load_end(const char *name, uint32_t idx) {
+ (void)name;
+ (void)idx;
+}
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_LOAD_START 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_LOAD_START_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_LOAD_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state_device_buffer_load_start(const char *name, uint32_t idx) {
+ (void)name;
+ (void)idx;
+}
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_START 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_START_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state_device_buffer_start(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_STARVED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_STARVED_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_BUFFER_STARVED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state_device_buffer_starved(const char *name, uint32_t idx) {
+ (void)name;
+ (void)idx;
+}
+#define TRACE_VFIO_LOAD_STATE_DEVICE_DATA 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_DATA_ENABLED 0
+#define TRACE_VFIO_LOAD_STATE_DEVICE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_vfio_load_state_device_data(const char *name, uint64_t data_size, int ret) {
+ (void)name;
+ (void)data_size;
+ (void)ret;
+}
+#define TRACE_VFIO_MDEV 0
+#define TRACE_VFIO_MDEV_ENABLED 0
+#define TRACE_VFIO_MDEV_BACKEND_DSTATE() (0)
+static inline void trace_vfio_mdev(const char *name, bool is_mdev) {
+ (void)name;
+ (void)is_mdev;
+}
+#define TRACE_VFIO_MIGRATION_REALIZE 0
+#define TRACE_VFIO_MIGRATION_REALIZE_ENABLED 0
+#define TRACE_VFIO_MIGRATION_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_migration_realize(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_MIGRATION_SET_DEVICE_STATE 0
+#define TRACE_VFIO_MIGRATION_SET_DEVICE_STATE_ENABLED 0
+#define TRACE_VFIO_MIGRATION_SET_DEVICE_STATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_migration_set_device_state(const char *name, const char *state) {
+ (void)name;
+ (void)state;
+}
+#define TRACE_VFIO_MIGRATION_SET_STATE 0
+#define TRACE_VFIO_MIGRATION_SET_STATE_ENABLED 0
+#define TRACE_VFIO_MIGRATION_SET_STATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_migration_set_state(const char *name, const char *new_state, const char *recover_state) {
+ (void)name;
+ (void)new_state;
+ (void)recover_state;
+}
+#define TRACE_VFIO_MIGRATION_STATE_NOTIFIER 0
+#define TRACE_VFIO_MIGRATION_STATE_NOTIFIER_ENABLED 0
+#define TRACE_VFIO_MIGRATION_STATE_NOTIFIER_BACKEND_DSTATE() (0)
+static inline void trace_vfio_migration_state_notifier(const char *name, int state) {
+ (void)name;
+ (void)state;
+}
+#define TRACE_VFIO_MSI_DISABLE 0
+#define TRACE_VFIO_MSI_DISABLE_ENABLED 0
+#define TRACE_VFIO_MSI_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msi_disable(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_MSI_ENABLE 0
+#define TRACE_VFIO_MSI_ENABLE_ENABLED 0
+#define TRACE_VFIO_MSI_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msi_enable(const char *name, int nr_vectors) {
+ (void)name;
+ (void)nr_vectors;
+}
+#define TRACE_VFIO_MSI_INTERRUPT 0
+#define TRACE_VFIO_MSI_INTERRUPT_ENABLED 0
+#define TRACE_VFIO_MSI_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) {
+ (void)name;
+ (void)index;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_VFIO_MSI_SETUP 0
+#define TRACE_VFIO_MSI_SETUP_ENABLED 0
+#define TRACE_VFIO_MSI_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msi_setup(const char *name, int pos) {
+ (void)name;
+ (void)pos;
+}
+#define TRACE_VFIO_MSIX_DISABLE 0
+#define TRACE_VFIO_MSIX_DISABLE_ENABLED 0
+#define TRACE_VFIO_MSIX_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_disable(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_MSIX_EARLY_SETUP 0
+#define TRACE_VFIO_MSIX_EARLY_SETUP_ENABLED 0
+#define TRACE_VFIO_MSIX_EARLY_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_early_setup(const char *name, int pos, int table_bar, uint64_t offset, int entries, bool noresize) {
+ (void)name;
+ (void)pos;
+ (void)table_bar;
+ (void)offset;
+ (void)entries;
+ (void)noresize;
+}
+#define TRACE_VFIO_MSIX_ENABLE 0
+#define TRACE_VFIO_MSIX_ENABLE_ENABLED 0
+#define TRACE_VFIO_MSIX_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_enable(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_MSIX_FIXUP 0
+#define TRACE_VFIO_MSIX_FIXUP_ENABLED 0
+#define TRACE_VFIO_MSIX_FIXUP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) {
+ (void)name;
+ (void)bar;
+ (void)start;
+ (void)end;
+}
+#define TRACE_VFIO_MSIX_PBA_DISABLE 0
+#define TRACE_VFIO_MSIX_PBA_DISABLE_ENABLED 0
+#define TRACE_VFIO_MSIX_PBA_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_pba_disable(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_MSIX_PBA_ENABLE 0
+#define TRACE_VFIO_MSIX_PBA_ENABLE_ENABLED 0
+#define TRACE_VFIO_MSIX_PBA_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_pba_enable(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_MSIX_RELO 0
+#define TRACE_VFIO_MSIX_RELO_ENABLED 0
+#define TRACE_VFIO_MSIX_RELO_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_relo(const char *name, int bar, uint64_t offset) {
+ (void)name;
+ (void)bar;
+ (void)offset;
+}
+#define TRACE_VFIO_MSIX_VECTOR_DO_USE 0
+#define TRACE_VFIO_MSIX_VECTOR_DO_USE_ENABLED 0
+#define TRACE_VFIO_MSIX_VECTOR_DO_USE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_vector_do_use(const char *name, int index) {
+ (void)name;
+ (void)index;
+}
+#define TRACE_VFIO_MSIX_VECTOR_RELEASE 0
+#define TRACE_VFIO_MSIX_VECTOR_RELEASE_ENABLED 0
+#define TRACE_VFIO_MSIX_VECTOR_RELEASE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_msix_vector_release(const char *name, int index) {
+ (void)name;
+ (void)index;
+}
+#define TRACE_VFIO_PCI_EMULATED_CLASS_CODE 0
+#define TRACE_VFIO_PCI_EMULATED_CLASS_CODE_ENABLED 0
+#define TRACE_VFIO_PCI_EMULATED_CLASS_CODE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_emulated_class_code(const char *name, uint32_t val) {
+ (void)name;
+ (void)val;
+}
+#define TRACE_VFIO_PCI_EMULATED_DEVICE_ID 0
+#define TRACE_VFIO_PCI_EMULATED_DEVICE_ID_ENABLED 0
+#define TRACE_VFIO_PCI_EMULATED_DEVICE_ID_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_emulated_device_id(const char *name, uint16_t val) {
+ (void)name;
+ (void)val;
+}
+#define TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID 0
+#define TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID_ENABLED 0
+#define TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) {
+ (void)name;
+ (void)val;
+}
+#define TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID 0
+#define TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID_ENABLED 0
+#define TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) {
+ (void)name;
+ (void)val;
+}
+#define TRACE_VFIO_PCI_EMULATED_VENDOR_ID 0
+#define TRACE_VFIO_PCI_EMULATED_VENDOR_ID_ENABLED 0
+#define TRACE_VFIO_PCI_EMULATED_VENDOR_ID_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_emulated_vendor_id(const char *name, uint16_t val) {
+ (void)name;
+ (void)val;
+}
+#define TRACE_VFIO_PCI_HOT_RESET 0
+#define TRACE_VFIO_PCI_HOT_RESET_ENABLED 0
+#define TRACE_VFIO_PCI_HOT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_hot_reset(const char *name, const char *type) {
+ (void)name;
+ (void)type;
+}
+#define TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES 0
+#define TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES_ENABLED 0
+#define TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) {
+ (void)domain;
+ (void)bus;
+ (void)slot;
+ (void)function;
+ (void)group_id;
+}
+#define TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES 0
+#define TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES_ENABLED 0
+#define TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_hot_reset_has_dep_devices(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_HOT_RESET_RESULT 0
+#define TRACE_VFIO_PCI_HOT_RESET_RESULT_ENABLED 0
+#define TRACE_VFIO_PCI_HOT_RESET_RESULT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_hot_reset_result(const char *name, const char *result) {
+ (void)name;
+ (void)result;
+}
+#define TRACE_VFIO_PCI_IGD_BAR4_WRITE 0
+#define TRACE_VFIO_PCI_IGD_BAR4_WRITE_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_BAR4_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) {
+ (void)name;
+ (void)index;
+ (void)data;
+ (void)base;
+}
+#define TRACE_VFIO_PCI_IGD_BDSM_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_BDSM_ENABLED_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_BDSM_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_igd_bdsm_enabled(const char *name, int size) {
+ (void)name;
+ (void)size;
+}
+#define TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_igd_host_bridge_enabled(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_igd_lpc_bridge_enabled(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_IGD_OPREGION_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_OPREGION_ENABLED_ENABLED 0
+#define TRACE_VFIO_PCI_IGD_OPREGION_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_igd_opregion_enabled(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_INTX_EOI 0
+#define TRACE_VFIO_PCI_INTX_EOI_ENABLED 0
+#define TRACE_VFIO_PCI_INTX_EOI_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_intx_eoi(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_LOAD_ROM 0
+#define TRACE_VFIO_PCI_LOAD_ROM_ENABLED 0
+#define TRACE_VFIO_PCI_LOAD_ROM_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) {
+ (void)name;
+ (void)size;
+ (void)offset;
+ (void)flags;
+}
+#define TRACE_VFIO_PCI_POPULATE_DEVICE_CONFIG 0
+#define TRACE_VFIO_PCI_POPULATE_DEVICE_CONFIG_ENABLED 0
+#define TRACE_VFIO_PCI_POPULATE_DEVICE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) {
+ (void)name;
+ (void)size;
+ (void)offset;
+ (void)flags;
+}
+#define TRACE_VFIO_PCI_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE 0
+#define TRACE_VFIO_PCI_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE_ENABLED 0
+#define TRACE_VFIO_PCI_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_populate_device_get_irq_info_failure(const char *errstr) {
+ (void)errstr;
+}
+#define TRACE_VFIO_PCI_READ_CONFIG 0
+#define TRACE_VFIO_PCI_READ_CONFIG_ENABLED 0
+#define TRACE_VFIO_PCI_READ_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_read_config(const char *name, int addr, int len, int val) {
+ (void)name;
+ (void)addr;
+ (void)len;
+ (void)val;
+}
+#define TRACE_VFIO_PCI_RESET 0
+#define TRACE_VFIO_PCI_RESET_ENABLED 0
+#define TRACE_VFIO_PCI_RESET_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_reset(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_RESET_FLR 0
+#define TRACE_VFIO_PCI_RESET_FLR_ENABLED 0
+#define TRACE_VFIO_PCI_RESET_FLR_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_reset_flr(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_RESET_PM 0
+#define TRACE_VFIO_PCI_RESET_PM_ENABLED 0
+#define TRACE_VFIO_PCI_RESET_PM_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_reset_pm(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_PCI_SIZE_ROM 0
+#define TRACE_VFIO_PCI_SIZE_ROM_ENABLED 0
+#define TRACE_VFIO_PCI_SIZE_ROM_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_size_rom(const char *name, int size) {
+ (void)name;
+ (void)size;
+}
+#define TRACE_VFIO_PCI_WRITE_CONFIG 0
+#define TRACE_VFIO_PCI_WRITE_CONFIG_ENABLED 0
+#define TRACE_VFIO_PCI_WRITE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_vfio_pci_write_config(const char *name, int addr, int val, int len) {
+ (void)name;
+ (void)addr;
+ (void)val;
+ (void)len;
+}
+#define TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP 0
+#define TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP_ENABLED 0
+#define TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) {
+ (void)start;
+ (void)end;
+}
+#define TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP 0
+#define TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP_ENABLED 0
+#define TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) {
+ (void)start;
+ (void)end;
+}
+#define TRACE_VFIO_PREREG_REGISTER 0
+#define TRACE_VFIO_PREREG_REGISTER_ENABLED 0
+#define TRACE_VFIO_PREREG_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_vfio_prereg_register(uint64_t va, uint64_t size, int ret) {
+ (void)va;
+ (void)size;
+ (void)ret;
+}
+#define TRACE_VFIO_PREREG_UNREGISTER 0
+#define TRACE_VFIO_PREREG_UNREGISTER_ENABLED 0
+#define TRACE_VFIO_PREREG_UNREGISTER_BACKEND_DSTATE() (0)
+static inline void trace_vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) {
+ (void)va;
+ (void)size;
+ (void)ret;
+}
+#define TRACE_VFIO_QUIRK_ATI_3C3_PROBE 0
+#define TRACE_VFIO_QUIRK_ATI_3C3_PROBE_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_3C3_PROBE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_3c3_probe(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_ATI_3C3_READ 0
+#define TRACE_VFIO_QUIRK_ATI_3C3_READ_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_3C3_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_3c3_read(const char *name, uint64_t data) {
+ (void)name;
+ (void)data;
+}
+#define TRACE_VFIO_QUIRK_ATI_BAR2_PROBE 0
+#define TRACE_VFIO_QUIRK_ATI_BAR2_PROBE_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_BAR2_PROBE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_bar2_probe(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_ATI_BAR4_PROBE 0
+#define TRACE_VFIO_QUIRK_ATI_BAR4_PROBE_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_BAR4_PROBE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_bar4_probe(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_bonaire_reset(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_bonaire_reset_done(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_bonaire_reset_no_smc(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_bonaire_reset_skipped(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT_ENABLED 0
+#define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_ati_bonaire_reset_timeout(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ 0
+#define TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ_ENABLED 0
+#define TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) {
+ (void)name;
+ (void)region_name;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE 0
+#define TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE_ENABLED 0
+#define TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) {
+ (void)name;
+ (void)region_name;
+ (void)addr;
+ (void)data;
+}
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE 0
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE_ENABLED 0
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) {
+ (void)name;
+ (void)region_name;
+ (void)data;
+}
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ 0
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ_ENABLED 0
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) {
+ (void)name;
+ (void)region_name;
+ (void)data;
+}
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE 0
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE_ENABLED 0
+#define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) {
+ (void)name;
+ (void)region_name;
+ (void)data;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_3d0_probe(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_READ 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_READ_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) {
+ (void)name;
+ (void)offset;
+ (void)size;
+ (void)val;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_3d0_state(const char *name, const char *state) {
+ (void)name;
+ (void)state;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) {
+ (void)name;
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_bar0_msi_ack(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_bar0_probe(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_bar5_probe(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE_ENABLED 0
+#define TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_nvidia_bar5_state(const char *name, const char *state) {
+ (void)name;
+ (void)state;
+}
+#define TRACE_VFIO_QUIRK_ROM_IN_DENYLIST 0
+#define TRACE_VFIO_QUIRK_ROM_IN_DENYLIST_ENABLED 0
+#define TRACE_VFIO_QUIRK_ROM_IN_DENYLIST_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_rom_in_denylist(const char *name, uint16_t vid, uint16_t did) {
+ (void)name;
+ (void)vid;
+ (void)did;
+}
+#define TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH 0
+#define TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH_ENABLED 0
+#define TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) {
+ (void)name;
+ (void)val;
+}
+#define TRACE_VFIO_QUIRK_RTL8168_MSIX_READ 0
+#define TRACE_VFIO_QUIRK_RTL8168_MSIX_READ_ENABLED 0
+#define TRACE_VFIO_QUIRK_RTL8168_MSIX_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) {
+ (void)name;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE 0
+#define TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE_ENABLED 0
+#define TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) {
+ (void)name;
+ (void)offset;
+ (void)val;
+}
+#define TRACE_VFIO_QUIRK_RTL8168_PROBE 0
+#define TRACE_VFIO_QUIRK_RTL8168_PROBE_ENABLED 0
+#define TRACE_VFIO_QUIRK_RTL8168_PROBE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_quirk_rtl8168_probe(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_REGION_EXIT 0
+#define TRACE_VFIO_REGION_EXIT_ENABLED 0
+#define TRACE_VFIO_REGION_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_exit(const char *name, int index) {
+ (void)name;
+ (void)index;
+}
+#define TRACE_VFIO_REGION_FINALIZE 0
+#define TRACE_VFIO_REGION_FINALIZE_ENABLED 0
+#define TRACE_VFIO_REGION_FINALIZE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_finalize(const char *name, int index) {
+ (void)name;
+ (void)index;
+}
+#define TRACE_VFIO_REGION_MMAP 0
+#define TRACE_VFIO_REGION_MMAP_ENABLED 0
+#define TRACE_VFIO_REGION_MMAP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) {
+ (void)name;
+ (void)offset;
+ (void)end;
+}
+#define TRACE_VFIO_REGION_MMAP_FAULT 0
+#define TRACE_VFIO_REGION_MMAP_FAULT_ENABLED 0
+#define TRACE_VFIO_REGION_MMAP_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) {
+ (void)name;
+ (void)index;
+ (void)offset;
+ (void)size;
+ (void)fault;
+}
+#define TRACE_VFIO_REGION_MMAPS_SET_ENABLED 0
+#define TRACE_VFIO_REGION_MMAPS_SET_ENABLED_ENABLED 0
+#define TRACE_VFIO_REGION_MMAPS_SET_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_mmaps_set_enabled(const char *name, bool enabled) {
+ (void)name;
+ (void)enabled;
+}
+#define TRACE_VFIO_REGION_READ 0
+#define TRACE_VFIO_REGION_READ_ENABLED 0
+#define TRACE_VFIO_REGION_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) {
+ (void)name;
+ (void)index;
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_VFIO_REGION_SETUP 0
+#define TRACE_VFIO_REGION_SETUP_ENABLED 0
+#define TRACE_VFIO_REGION_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) {
+ (void)dev;
+ (void)index;
+ (void)name;
+ (void)flags;
+ (void)offset;
+ (void)size;
+}
+#define TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY 0
+#define TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY_ENABLED 0
+#define TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) {
+ (void)i;
+ (void)start;
+ (void)end;
+}
+#define TRACE_VFIO_REGION_SPARSE_MMAP_HEADER 0
+#define TRACE_VFIO_REGION_SPARSE_MMAP_HEADER_ENABLED 0
+#define TRACE_VFIO_REGION_SPARSE_MMAP_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) {
+ (void)name;
+ (void)index;
+ (void)nr_areas;
+}
+#define TRACE_VFIO_REGION_UNMAP 0
+#define TRACE_VFIO_REGION_UNMAP_ENABLED 0
+#define TRACE_VFIO_REGION_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_unmap(const char *name, unsigned long offset, unsigned long end) {
+ (void)name;
+ (void)offset;
+ (void)end;
+}
+#define TRACE_VFIO_REGION_WRITE 0
+#define TRACE_VFIO_REGION_WRITE_ENABLED 0
+#define TRACE_VFIO_REGION_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) {
+ (void)name;
+ (void)index;
+ (void)addr;
+ (void)data;
+ (void)size;
+}
+#define TRACE_VFIO_ROM_READ 0
+#define TRACE_VFIO_ROM_READ_ENABLED 0
+#define TRACE_VFIO_ROM_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) {
+ (void)name;
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_VFIO_SAVE_BLOCK 0
+#define TRACE_VFIO_SAVE_BLOCK_ENABLED 0
+#define TRACE_VFIO_SAVE_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_block(const char *name, int data_size) {
+ (void)name;
+ (void)data_size;
+}
+#define TRACE_VFIO_SAVE_BLOCK_PRECOPY_EMPTY_HIT 0
+#define TRACE_VFIO_SAVE_BLOCK_PRECOPY_EMPTY_HIT_ENABLED 0
+#define TRACE_VFIO_SAVE_BLOCK_PRECOPY_EMPTY_HIT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_block_precopy_empty_hit(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_SAVE_CLEANUP 0
+#define TRACE_VFIO_SAVE_CLEANUP_ENABLED 0
+#define TRACE_VFIO_SAVE_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_cleanup(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_ENABLED 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_complete_precopy(const char *name, int ret) {
+ (void)name;
+ (void)ret;
+}
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_START 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_START_ENABLED 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_complete_precopy_start(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_THREAD_END 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_THREAD_END_ENABLED 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_THREAD_END_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_complete_precopy_thread_end(const char *name, int ret) {
+ (void)name;
+ (void)ret;
+}
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_THREAD_START 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_THREAD_START_ENABLED 0
+#define TRACE_VFIO_SAVE_COMPLETE_PRECOPY_THREAD_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_complete_precopy_thread_start(const char *name, const char *idstr, uint32_t instance_id) {
+ (void)name;
+ (void)idstr;
+ (void)instance_id;
+}
+#define TRACE_VFIO_SAVE_DEVICE_CONFIG_STATE 0
+#define TRACE_VFIO_SAVE_DEVICE_CONFIG_STATE_ENABLED 0
+#define TRACE_VFIO_SAVE_DEVICE_CONFIG_STATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_device_config_state(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_SAVE_ITERATE 0
+#define TRACE_VFIO_SAVE_ITERATE_ENABLED 0
+#define TRACE_VFIO_SAVE_ITERATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_iterate(const char *name, uint64_t precopy_init_size, uint64_t precopy_dirty_size) {
+ (void)name;
+ (void)precopy_init_size;
+ (void)precopy_dirty_size;
+}
+#define TRACE_VFIO_SAVE_ITERATE_START 0
+#define TRACE_VFIO_SAVE_ITERATE_START_ENABLED 0
+#define TRACE_VFIO_SAVE_ITERATE_START_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_iterate_start(const char *name) {
+ (void)name;
+}
+#define TRACE_VFIO_SAVE_SETUP 0
+#define TRACE_VFIO_SAVE_SETUP_ENABLED 0
+#define TRACE_VFIO_SAVE_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_save_setup(const char *name, uint64_t data_buffer_size) {
+ (void)name;
+ (void)data_buffer_size;
+}
+#define TRACE_VFIO_SPAPR_CREATE_WINDOW 0
+#define TRACE_VFIO_SPAPR_CREATE_WINDOW_ENABLED 0
+#define TRACE_VFIO_SPAPR_CREATE_WINDOW_BACKEND_DSTATE() (0)
+static inline void trace_vfio_spapr_create_window(int ps, unsigned int levels, uint64_t ws, uint64_t off) {
+ (void)ps;
+ (void)levels;
+ (void)ws;
+ (void)off;
+}
+#define TRACE_VFIO_SPAPR_GROUP_ATTACH 0
+#define TRACE_VFIO_SPAPR_GROUP_ATTACH_ENABLED 0
+#define TRACE_VFIO_SPAPR_GROUP_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_vfio_spapr_group_attach(int groupfd, int tablefd) {
+ (void)groupfd;
+ (void)tablefd;
+}
+#define TRACE_VFIO_SPAPR_REMOVE_WINDOW 0
+#define TRACE_VFIO_SPAPR_REMOVE_WINDOW_ENABLED 0
+#define TRACE_VFIO_SPAPR_REMOVE_WINDOW_BACKEND_DSTATE() (0)
+static inline void trace_vfio_spapr_remove_window(uint64_t off) {
+ (void)off;
+}
+#define TRACE_VFIO_STATE_PENDING_ESTIMATE 0
+#define TRACE_VFIO_STATE_PENDING_ESTIMATE_ENABLED 0
+#define TRACE_VFIO_STATE_PENDING_ESTIMATE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_state_pending_estimate(const char *name, uint64_t precopy, uint64_t postcopy, uint64_t precopy_init_size, uint64_t precopy_dirty_size) {
+ (void)name;
+ (void)precopy;
+ (void)postcopy;
+ (void)precopy_init_size;
+ (void)precopy_dirty_size;
+}
+#define TRACE_VFIO_STATE_PENDING_EXACT 0
+#define TRACE_VFIO_STATE_PENDING_EXACT_ENABLED 0
+#define TRACE_VFIO_STATE_PENDING_EXACT_BACKEND_DSTATE() (0)
+static inline void trace_vfio_state_pending_exact(const char *name, uint64_t precopy, uint64_t postcopy, uint64_t stopcopy_size, uint64_t precopy_init_size, uint64_t precopy_dirty_size) {
+ (void)name;
+ (void)precopy;
+ (void)postcopy;
+ (void)stopcopy_size;
+ (void)precopy_init_size;
+ (void)precopy_dirty_size;
+}
+#define TRACE_VFIO_VGA_READ 0
+#define TRACE_VFIO_VGA_READ_ENABLED 0
+#define TRACE_VFIO_VGA_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_vga_read(uint64_t addr, int size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_VFIO_VGA_WRITE 0
+#define TRACE_VFIO_VGA_WRITE_ENABLED 0
+#define TRACE_VFIO_VGA_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_vga_write(uint64_t addr, uint64_t data, int size) {
+ (void)addr;
+ (void)data;
+ (void)size;
+}
+#define TRACE_VFIO_VMSTATE_CHANGE 0
+#define TRACE_VFIO_VMSTATE_CHANGE_ENABLED 0
+#define TRACE_VFIO_VMSTATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_vmstate_change(const char *name, int running, const char *reason, const char *dev_state) {
+ (void)name;
+ (void)running;
+ (void)reason;
+ (void)dev_state;
+}
+#define TRACE_VFIO_VMSTATE_CHANGE_PREPARE 0
+#define TRACE_VFIO_VMSTATE_CHANGE_PREPARE_ENABLED 0
+#define TRACE_VFIO_VMSTATE_CHANGE_PREPARE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_vmstate_change_prepare(const char *name, int running, const char *reason, const char *dev_state) {
+ (void)name;
+ (void)running;
+ (void)reason;
+ (void)dev_state;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_vfio_user.h b/trace/trace-hw_vfio_user.h
new file mode 100644
index 0000000000..887ba5c7df
--- /dev/null
+++ b/trace/trace-hw_vfio_user.h
@@ -0,0 +1,117 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_VFIO_USER_H
+#define TRACE_TRACE_HW_VFIO_USER_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_VFIO_USER_DMA_MAP 0
+#define TRACE_VFIO_USER_DMA_MAP_ENABLED 0
+#define TRACE_VFIO_USER_DMA_MAP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_dma_map(uint64_t iova, uint64_t size, uint64_t off, uint32_t flags, bool async_ops) {
+ (void)iova;
+ (void)size;
+ (void)off;
+ (void)flags;
+ (void)async_ops;
+}
+#define TRACE_VFIO_USER_DMA_UNMAP 0
+#define TRACE_VFIO_USER_DMA_UNMAP_ENABLED 0
+#define TRACE_VFIO_USER_DMA_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_dma_unmap(uint64_t iova, uint64_t size, uint32_t flags, bool async_ops) {
+ (void)iova;
+ (void)size;
+ (void)flags;
+ (void)async_ops;
+}
+#define TRACE_VFIO_USER_GET_INFO 0
+#define TRACE_VFIO_USER_GET_INFO_ENABLED 0
+#define TRACE_VFIO_USER_GET_INFO_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_get_info(uint32_t nregions, uint32_t nirqs) {
+ (void)nregions;
+ (void)nirqs;
+}
+#define TRACE_VFIO_USER_GET_IRQ_INFO 0
+#define TRACE_VFIO_USER_GET_IRQ_INFO_ENABLED 0
+#define TRACE_VFIO_USER_GET_IRQ_INFO_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_get_irq_info(uint32_t index, uint32_t flags, uint32_t count) {
+ (void)index;
+ (void)flags;
+ (void)count;
+}
+#define TRACE_VFIO_USER_GET_REGION_INFO 0
+#define TRACE_VFIO_USER_GET_REGION_INFO_ENABLED 0
+#define TRACE_VFIO_USER_GET_REGION_INFO_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_get_region_info(uint32_t index, uint32_t flags, uint64_t size) {
+ (void)index;
+ (void)flags;
+ (void)size;
+}
+#define TRACE_VFIO_USER_RECV_HDR 0
+#define TRACE_VFIO_USER_RECV_HDR_ENABLED 0
+#define TRACE_VFIO_USER_RECV_HDR_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_recv_hdr(const char *name, uint16_t id, uint16_t cmd, uint32_t size, uint32_t flags) {
+ (void)name;
+ (void)id;
+ (void)cmd;
+ (void)size;
+ (void)flags;
+}
+#define TRACE_VFIO_USER_RECV_READ 0
+#define TRACE_VFIO_USER_RECV_READ_ENABLED 0
+#define TRACE_VFIO_USER_RECV_READ_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_recv_read(uint16_t id, int read) {
+ (void)id;
+ (void)read;
+}
+#define TRACE_VFIO_USER_RECV_REQUEST 0
+#define TRACE_VFIO_USER_RECV_REQUEST_ENABLED 0
+#define TRACE_VFIO_USER_RECV_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_recv_request(uint16_t cmd) {
+ (void)cmd;
+}
+#define TRACE_VFIO_USER_REGION_RW 0
+#define TRACE_VFIO_USER_REGION_RW_ENABLED 0
+#define TRACE_VFIO_USER_REGION_RW_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_region_rw(uint32_t region, uint64_t off, uint32_t count) {
+ (void)region;
+ (void)off;
+ (void)count;
+}
+#define TRACE_VFIO_USER_SEND_WRITE 0
+#define TRACE_VFIO_USER_SEND_WRITE_ENABLED 0
+#define TRACE_VFIO_USER_SEND_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_send_write(uint16_t id, int wrote) {
+ (void)id;
+ (void)wrote;
+}
+#define TRACE_VFIO_USER_SET_IRQS 0
+#define TRACE_VFIO_USER_SET_IRQS_ENABLED 0
+#define TRACE_VFIO_USER_SET_IRQS_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_set_irqs(uint32_t index, uint32_t start, uint32_t count, uint32_t flags) {
+ (void)index;
+ (void)start;
+ (void)count;
+ (void)flags;
+}
+#define TRACE_VFIO_USER_VERSION 0
+#define TRACE_VFIO_USER_VERSION_ENABLED 0
+#define TRACE_VFIO_USER_VERSION_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_version(uint16_t major, uint16_t minor, const char *caps) {
+ (void)major;
+ (void)minor;
+ (void)caps;
+}
+#define TRACE_VFIO_USER_WRMULTI 0
+#define TRACE_VFIO_USER_WRMULTI_ENABLED 0
+#define TRACE_VFIO_USER_WRMULTI_BACKEND_DSTATE() (0)
+static inline void trace_vfio_user_wrmulti(const char *s, uint64_t wr_cnt) {
+ (void)s;
+ (void)wr_cnt;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_virtio.h b/trace/trace-hw_virtio.h
new file mode 100644
index 0000000000..3bec60b634
--- /dev/null
+++ b/trace/trace-hw_virtio.h
@@ -0,0 +1,1006 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_VIRTIO_H
+#define TRACE_TRACE_HW_VIRTIO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_VHOST_COMMIT 0
+#define TRACE_VHOST_COMMIT_ENABLED 0
+#define TRACE_VHOST_COMMIT_BACKEND_DSTATE() (0)
+static inline void trace_vhost_commit(bool started, bool changed) {
+ (void)started;
+ (void)changed;
+}
+#define TRACE_VHOST_DEV_CLEANUP 0
+#define TRACE_VHOST_DEV_CLEANUP_ENABLED 0
+#define TRACE_VHOST_DEV_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_vhost_dev_cleanup(void *dev) {
+ (void)dev;
+}
+#define TRACE_VHOST_DEV_START 0
+#define TRACE_VHOST_DEV_START_ENABLED 0
+#define TRACE_VHOST_DEV_START_BACKEND_DSTATE() (0)
+static inline void trace_vhost_dev_start(void *dev, const char *name, bool vrings) {
+ (void)dev;
+ (void)name;
+ (void)vrings;
+}
+#define TRACE_VHOST_DEV_STOP 0
+#define TRACE_VHOST_DEV_STOP_ENABLED 0
+#define TRACE_VHOST_DEV_STOP_BACKEND_DSTATE() (0)
+static inline void trace_vhost_dev_stop(void *dev, const char *name, bool vrings) {
+ (void)dev;
+ (void)name;
+ (void)vrings;
+}
+#define TRACE_VHOST_IOTLB_MISS 0
+#define TRACE_VHOST_IOTLB_MISS_ENABLED 0
+#define TRACE_VHOST_IOTLB_MISS_BACKEND_DSTATE() (0)
+static inline void trace_vhost_iotlb_miss(void *dev, int step) {
+ (void)dev;
+ (void)step;
+}
+#define TRACE_VHOST_REGION_ADD_SECTION 0
+#define TRACE_VHOST_REGION_ADD_SECTION_ENABLED 0
+#define TRACE_VHOST_REGION_ADD_SECTION_BACKEND_DSTATE() (0)
+static inline void trace_vhost_region_add_section(const char *name, uint64_t gpa, uint64_t size, uint64_t host) {
+ (void)name;
+ (void)gpa;
+ (void)size;
+ (void)host;
+}
+#define TRACE_VHOST_REGION_ADD_SECTION_ALIGNED 0
+#define TRACE_VHOST_REGION_ADD_SECTION_ALIGNED_ENABLED 0
+#define TRACE_VHOST_REGION_ADD_SECTION_ALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_vhost_region_add_section_aligned(const char *name, uint64_t gpa, uint64_t size, uint64_t host) {
+ (void)name;
+ (void)gpa;
+ (void)size;
+ (void)host;
+}
+#define TRACE_VHOST_REGION_ADD_SECTION_MERGE 0
+#define TRACE_VHOST_REGION_ADD_SECTION_MERGE_ENABLED 0
+#define TRACE_VHOST_REGION_ADD_SECTION_MERGE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_region_add_section_merge(const char *name, uint64_t new_size, uint64_t gpa, uint64_t owr) {
+ (void)name;
+ (void)new_size;
+ (void)gpa;
+ (void)owr;
+}
+#define TRACE_VHOST_REJECT_SECTION 0
+#define TRACE_VHOST_REJECT_SECTION_ENABLED 0
+#define TRACE_VHOST_REJECT_SECTION_BACKEND_DSTATE() (0)
+static inline void trace_vhost_reject_section(const char *name, int d) {
+ (void)name;
+ (void)d;
+}
+#define TRACE_VHOST_SECTION 0
+#define TRACE_VHOST_SECTION_ENABLED 0
+#define TRACE_VHOST_SECTION_BACKEND_DSTATE() (0)
+static inline void trace_vhost_section(const char *name) {
+ (void)name;
+}
+#define TRACE_VHOST_USER_CREATE_NOTIFIER 0
+#define TRACE_VHOST_USER_CREATE_NOTIFIER_ENABLED 0
+#define TRACE_VHOST_USER_CREATE_NOTIFIER_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_create_notifier(int idx, void *n) {
+ (void)idx;
+ (void)n;
+}
+#define TRACE_VHOST_USER_POSTCOPY_END_ENTRY 0
+#define TRACE_VHOST_USER_POSTCOPY_END_ENTRY_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_END_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_end_entry(void) {
+}
+#define TRACE_VHOST_USER_POSTCOPY_END_EXIT 0
+#define TRACE_VHOST_USER_POSTCOPY_END_EXIT_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_END_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_end_exit(void) {
+}
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER 0
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_fault_handler(const char *name, uint64_t fault_address, int nregions) {
+ (void)name;
+ (void)fault_address;
+ (void)nregions;
+}
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_FOUND 0
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_FOUND_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_fault_handler_found(int i, uint64_t region_offset, uint64_t rb_offset) {
+ (void)i;
+ (void)region_offset;
+ (void)rb_offset;
+}
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_LOOP 0
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_LOOP_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_FAULT_HANDLER_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_fault_handler_loop(int i, uint64_t client_base, uint64_t size) {
+ (void)i;
+ (void)client_base;
+ (void)size;
+}
+#define TRACE_VHOST_USER_POSTCOPY_LISTEN 0
+#define TRACE_VHOST_USER_POSTCOPY_LISTEN_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_LISTEN_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_listen(void) {
+}
+#define TRACE_VHOST_USER_POSTCOPY_WAKER 0
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_waker(const char *rb, uint64_t rb_offset) {
+ (void)rb;
+ (void)rb_offset;
+}
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_FOUND 0
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_FOUND_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_waker_found(uint64_t client_addr) {
+ (void)client_addr;
+}
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_NOMATCH 0
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_NOMATCH_ENABLED 0
+#define TRACE_VHOST_USER_POSTCOPY_WAKER_NOMATCH_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_postcopy_waker_nomatch(const char *rb, uint64_t rb_offset) {
+ (void)rb;
+ (void)rb_offset;
+}
+#define TRACE_VHOST_USER_READ 0
+#define TRACE_VHOST_USER_READ_ENABLED 0
+#define TRACE_VHOST_USER_READ_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_read(uint32_t req, uint32_t flags) {
+ (void)req;
+ (void)flags;
+}
+#define TRACE_VHOST_USER_SET_MEM_TABLE_POSTCOPY 0
+#define TRACE_VHOST_USER_SET_MEM_TABLE_POSTCOPY_ENABLED 0
+#define TRACE_VHOST_USER_SET_MEM_TABLE_POSTCOPY_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_set_mem_table_postcopy(uint64_t client_addr, uint64_t qhva, int reply_i, int region_i) {
+ (void)client_addr;
+ (void)qhva;
+ (void)reply_i;
+ (void)region_i;
+}
+#define TRACE_VHOST_USER_SET_MEM_TABLE_WITHFD 0
+#define TRACE_VHOST_USER_SET_MEM_TABLE_WITHFD_ENABLED 0
+#define TRACE_VHOST_USER_SET_MEM_TABLE_WITHFD_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_set_mem_table_withfd(int index, const char *name, uint64_t memory_size, uint64_t guest_phys_addr, uint64_t userspace_addr, uint64_t offset) {
+ (void)index;
+ (void)name;
+ (void)memory_size;
+ (void)guest_phys_addr;
+ (void)userspace_addr;
+ (void)offset;
+}
+#define TRACE_VHOST_USER_WRITE 0
+#define TRACE_VHOST_USER_WRITE_ENABLED 0
+#define TRACE_VHOST_USER_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_write(uint32_t req, uint32_t flags) {
+ (void)req;
+ (void)flags;
+}
+#define TRACE_VHOST_VDPA_ADD_STATUS 0
+#define TRACE_VHOST_VDPA_ADD_STATUS_ENABLED 0
+#define TRACE_VHOST_VDPA_ADD_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_add_status(void *dev, uint8_t status) {
+ (void)dev;
+ (void)status;
+}
+#define TRACE_VHOST_VDPA_CLEANUP 0
+#define TRACE_VHOST_VDPA_CLEANUP_ENABLED 0
+#define TRACE_VHOST_VDPA_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_cleanup(void *dev, void *vdpa) {
+ (void)dev;
+ (void)vdpa;
+}
+#define TRACE_VHOST_VDPA_DEV_START 0
+#define TRACE_VHOST_VDPA_DEV_START_ENABLED 0
+#define TRACE_VHOST_VDPA_DEV_START_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_dev_start(void *dev, bool started) {
+ (void)dev;
+ (void)started;
+}
+#define TRACE_VHOST_VDPA_DMA_MAP 0
+#define TRACE_VHOST_VDPA_DMA_MAP_ENABLED 0
+#define TRACE_VHOST_VDPA_DMA_MAP_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_dma_map(void *vdpa, int fd, uint32_t msg_type, uint32_t asid, uint64_t iova, uint64_t size, uint64_t uaddr, uint8_t perm, uint8_t type) {
+ (void)vdpa;
+ (void)fd;
+ (void)msg_type;
+ (void)asid;
+ (void)iova;
+ (void)size;
+ (void)uaddr;
+ (void)perm;
+ (void)type;
+}
+#define TRACE_VHOST_VDPA_DMA_UNMAP 0
+#define TRACE_VHOST_VDPA_DMA_UNMAP_ENABLED 0
+#define TRACE_VHOST_VDPA_DMA_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_dma_unmap(void *vdpa, int fd, uint32_t msg_type, uint32_t asid, uint64_t iova, uint64_t size, uint8_t type) {
+ (void)vdpa;
+ (void)fd;
+ (void)msg_type;
+ (void)asid;
+ (void)iova;
+ (void)size;
+ (void)type;
+}
+#define TRACE_VHOST_VDPA_DUMP_CONFIG 0
+#define TRACE_VHOST_VDPA_DUMP_CONFIG_ENABLED 0
+#define TRACE_VHOST_VDPA_DUMP_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_dump_config(void *dev, unsigned ofs, const char *line) {
+ (void)dev;
+ (void)ofs;
+ (void)line;
+}
+#define TRACE_VHOST_VDPA_DUMP_REGIONS 0
+#define TRACE_VHOST_VDPA_DUMP_REGIONS_ENABLED 0
+#define TRACE_VHOST_VDPA_DUMP_REGIONS_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_dump_regions(void *dev, int i, uint64_t guest_phys_addr, uint64_t memory_size, uint64_t userspace_addr, uint64_t flags_padding) {
+ (void)dev;
+ (void)i;
+ (void)guest_phys_addr;
+ (void)memory_size;
+ (void)userspace_addr;
+ (void)flags_padding;
+}
+#define TRACE_VHOST_VDPA_GET_CONFIG 0
+#define TRACE_VHOST_VDPA_GET_CONFIG_ENABLED 0
+#define TRACE_VHOST_VDPA_GET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_get_config(void *dev, void *config, uint32_t config_len) {
+ (void)dev;
+ (void)config;
+ (void)config_len;
+}
+#define TRACE_VHOST_VDPA_GET_DEVICE_ID 0
+#define TRACE_VHOST_VDPA_GET_DEVICE_ID_ENABLED 0
+#define TRACE_VHOST_VDPA_GET_DEVICE_ID_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_get_device_id(void *dev, uint32_t device_id) {
+ (void)dev;
+ (void)device_id;
+}
+#define TRACE_VHOST_VDPA_GET_FEATURES 0
+#define TRACE_VHOST_VDPA_GET_FEATURES_ENABLED 0
+#define TRACE_VHOST_VDPA_GET_FEATURES_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_get_features(void *dev, uint64_t features) {
+ (void)dev;
+ (void)features;
+}
+#define TRACE_VHOST_VDPA_GET_IOVA_RANGE 0
+#define TRACE_VHOST_VDPA_GET_IOVA_RANGE_ENABLED 0
+#define TRACE_VHOST_VDPA_GET_IOVA_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_get_iova_range(void *dev, uint64_t first, uint64_t last) {
+ (void)dev;
+ (void)first;
+ (void)last;
+}
+#define TRACE_VHOST_VDPA_GET_VQ_INDEX 0
+#define TRACE_VHOST_VDPA_GET_VQ_INDEX_ENABLED 0
+#define TRACE_VHOST_VDPA_GET_VQ_INDEX_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_get_vq_index(void *dev, int idx, int vq_idx) {
+ (void)dev;
+ (void)idx;
+ (void)vq_idx;
+}
+#define TRACE_VHOST_VDPA_GET_VRING_BASE 0
+#define TRACE_VHOST_VDPA_GET_VRING_BASE_ENABLED 0
+#define TRACE_VHOST_VDPA_GET_VRING_BASE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_get_vring_base(void *dev, unsigned int index, unsigned int num, bool svq) {
+ (void)dev;
+ (void)index;
+ (void)num;
+ (void)svq;
+}
+#define TRACE_VHOST_VDPA_INIT 0
+#define TRACE_VHOST_VDPA_INIT_ENABLED 0
+#define TRACE_VHOST_VDPA_INIT_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_init(void *dev, void *s, void *vdpa) {
+ (void)dev;
+ (void)s;
+ (void)vdpa;
+}
+#define TRACE_VHOST_VDPA_LISTENER_BEGIN_BATCH 0
+#define TRACE_VHOST_VDPA_LISTENER_BEGIN_BATCH_ENABLED 0
+#define TRACE_VHOST_VDPA_LISTENER_BEGIN_BATCH_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_listener_begin_batch(void *v, int fd, uint32_t msg_type, uint8_t type) {
+ (void)v;
+ (void)fd;
+ (void)msg_type;
+ (void)type;
+}
+#define TRACE_VHOST_VDPA_LISTENER_COMMIT 0
+#define TRACE_VHOST_VDPA_LISTENER_COMMIT_ENABLED 0
+#define TRACE_VHOST_VDPA_LISTENER_COMMIT_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_listener_commit(void *v, int fd, uint32_t msg_type, uint8_t type) {
+ (void)v;
+ (void)fd;
+ (void)msg_type;
+ (void)type;
+}
+#define TRACE_VHOST_VDPA_LISTENER_REGION_ADD 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_ADD_ENABLED 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_ADD_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_listener_region_add(void *vdpa, uint64_t iova, uint64_t llend, void *vaddr, bool readonly) {
+ (void)vdpa;
+ (void)iova;
+ (void)llend;
+ (void)vaddr;
+ (void)readonly;
+}
+#define TRACE_VHOST_VDPA_LISTENER_REGION_ADD_UNALIGNED 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_ADD_UNALIGNED_ENABLED 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_ADD_UNALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_listener_region_add_unaligned(void *v, const char *name, uint64_t offset_as, uint64_t offset_page) {
+ (void)v;
+ (void)name;
+ (void)offset_as;
+ (void)offset_page;
+}
+#define TRACE_VHOST_VDPA_LISTENER_REGION_DEL 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_DEL_ENABLED 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_DEL_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_listener_region_del(void *vdpa, uint64_t iova, uint64_t llend) {
+ (void)vdpa;
+ (void)iova;
+ (void)llend;
+}
+#define TRACE_VHOST_VDPA_LISTENER_REGION_DEL_UNALIGNED 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_DEL_UNALIGNED_ENABLED 0
+#define TRACE_VHOST_VDPA_LISTENER_REGION_DEL_UNALIGNED_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_listener_region_del_unaligned(void *v, const char *name, uint64_t offset_as, uint64_t offset_page) {
+ (void)v;
+ (void)name;
+ (void)offset_as;
+ (void)offset_page;
+}
+#define TRACE_VHOST_VDPA_MEMSLOTS_LIMIT 0
+#define TRACE_VHOST_VDPA_MEMSLOTS_LIMIT_ENABLED 0
+#define TRACE_VHOST_VDPA_MEMSLOTS_LIMIT_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_memslots_limit(void *dev, int ret) {
+ (void)dev;
+ (void)ret;
+}
+#define TRACE_VHOST_VDPA_RESET_DEVICE 0
+#define TRACE_VHOST_VDPA_RESET_DEVICE_ENABLED 0
+#define TRACE_VHOST_VDPA_RESET_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_reset_device(void *dev) {
+ (void)dev;
+}
+#define TRACE_VHOST_VDPA_SET_CONFIG 0
+#define TRACE_VHOST_VDPA_SET_CONFIG_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, uint32_t flags) {
+ (void)dev;
+ (void)offset;
+ (void)size;
+ (void)flags;
+}
+#define TRACE_VHOST_VDPA_SET_CONFIG_CALL 0
+#define TRACE_VHOST_VDPA_SET_CONFIG_CALL_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_CONFIG_CALL_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_config_call(void *dev, int fd) {
+ (void)dev;
+ (void)fd;
+}
+#define TRACE_VHOST_VDPA_SET_DEV_VRING_BASE 0
+#define TRACE_VHOST_VDPA_SET_DEV_VRING_BASE_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_DEV_VRING_BASE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_dev_vring_base(void *dev, unsigned int index, unsigned int num, bool svq) {
+ (void)dev;
+ (void)index;
+ (void)num;
+ (void)svq;
+}
+#define TRACE_VHOST_VDPA_SET_FEATURES 0
+#define TRACE_VHOST_VDPA_SET_FEATURES_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_FEATURES_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_features(void *dev, uint64_t features) {
+ (void)dev;
+ (void)features;
+}
+#define TRACE_VHOST_VDPA_SET_LOG_BASE 0
+#define TRACE_VHOST_VDPA_SET_LOG_BASE_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_LOG_BASE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_log_base(void *dev, uint64_t base, unsigned long long size, int refcnt, int fd, void *log) {
+ (void)dev;
+ (void)base;
+ (void)size;
+ (void)refcnt;
+ (void)fd;
+ (void)log;
+}
+#define TRACE_VHOST_VDPA_SET_MEM_TABLE 0
+#define TRACE_VHOST_VDPA_SET_MEM_TABLE_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_MEM_TABLE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_mem_table(void *dev, uint32_t nregions, uint32_t padding) {
+ (void)dev;
+ (void)nregions;
+ (void)padding;
+}
+#define TRACE_VHOST_VDPA_SET_OWNER 0
+#define TRACE_VHOST_VDPA_SET_OWNER_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_OWNER_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_owner(void *dev) {
+ (void)dev;
+}
+#define TRACE_VHOST_VDPA_SET_VRING_ADDR 0
+#define TRACE_VHOST_VDPA_SET_VRING_ADDR_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_VRING_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_vring_addr(void *dev, unsigned int index, unsigned int flags, uint64_t desc_user_addr, uint64_t used_user_addr, uint64_t avail_user_addr, uint64_t log_guest_addr) {
+ (void)dev;
+ (void)index;
+ (void)flags;
+ (void)desc_user_addr;
+ (void)used_user_addr;
+ (void)avail_user_addr;
+ (void)log_guest_addr;
+}
+#define TRACE_VHOST_VDPA_SET_VRING_CALL 0
+#define TRACE_VHOST_VDPA_SET_VRING_CALL_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_VRING_CALL_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_vring_call(void *dev, unsigned int index, int fd) {
+ (void)dev;
+ (void)index;
+ (void)fd;
+}
+#define TRACE_VHOST_VDPA_SET_VRING_ENABLE_ONE 0
+#define TRACE_VHOST_VDPA_SET_VRING_ENABLE_ONE_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_VRING_ENABLE_ONE_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_vring_enable_one(void *dev, unsigned i, int enable, int r) {
+ (void)dev;
+ (void)i;
+ (void)enable;
+ (void)r;
+}
+#define TRACE_VHOST_VDPA_SET_VRING_KICK 0
+#define TRACE_VHOST_VDPA_SET_VRING_KICK_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_VRING_KICK_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_vring_kick(void *dev, unsigned int index, int fd) {
+ (void)dev;
+ (void)index;
+ (void)fd;
+}
+#define TRACE_VHOST_VDPA_SET_VRING_NUM 0
+#define TRACE_VHOST_VDPA_SET_VRING_NUM_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_VRING_NUM_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_vring_num(void *dev, unsigned int index, unsigned int num) {
+ (void)dev;
+ (void)index;
+ (void)num;
+}
+#define TRACE_VHOST_VDPA_SKIPPED_MEMORY_SECTION 0
+#define TRACE_VHOST_VDPA_SKIPPED_MEMORY_SECTION_ENABLED 0
+#define TRACE_VHOST_VDPA_SKIPPED_MEMORY_SECTION_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_skipped_memory_section(int is_ram, int is_iommu, int is_protected, int is_ram_device, uint64_t first, uint64_t last, int page_mask) {
+ (void)is_ram;
+ (void)is_iommu;
+ (void)is_protected;
+ (void)is_ram_device;
+ (void)first;
+ (void)last;
+ (void)page_mask;
+}
+#define TRACE_VHOST_VDPA_SUSPEND 0
+#define TRACE_VHOST_VDPA_SUSPEND_ENABLED 0
+#define TRACE_VHOST_VDPA_SUSPEND_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_suspend(void *dev) {
+ (void)dev;
+}
+#define TRACE_VHOST_VDPA_VQ_GET_ADDR 0
+#define TRACE_VHOST_VDPA_VQ_GET_ADDR_ENABLED 0
+#define TRACE_VHOST_VDPA_VQ_GET_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_vq_get_addr(void *dev, void *vq, uint64_t desc_user_addr, uint64_t avail_user_addr, uint64_t used_user_addr) {
+ (void)dev;
+ (void)vq;
+ (void)desc_user_addr;
+ (void)avail_user_addr;
+ (void)used_user_addr;
+}
+#define TRACE_VIRTIO_BALLOON_BAD_ADDR 0
+#define TRACE_VIRTIO_BALLOON_BAD_ADDR_ENABLED 0
+#define TRACE_VIRTIO_BALLOON_BAD_ADDR_BACKEND_DSTATE() (0)
+static inline void trace_virtio_balloon_bad_addr(uint64_t gpa) {
+ (void)gpa;
+}
+#define TRACE_VIRTIO_BALLOON_GET_CONFIG 0
+#define TRACE_VIRTIO_BALLOON_GET_CONFIG_ENABLED 0
+#define TRACE_VIRTIO_BALLOON_GET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) {
+ (void)num_pages;
+ (void)actual;
+}
+#define TRACE_VIRTIO_BALLOON_HANDLE_OUTPUT 0
+#define TRACE_VIRTIO_BALLOON_HANDLE_OUTPUT_ENABLED 0
+#define TRACE_VIRTIO_BALLOON_HANDLE_OUTPUT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_balloon_handle_output(const char *name, uint64_t gpa) {
+ (void)name;
+ (void)gpa;
+}
+#define TRACE_VIRTIO_BALLOON_SET_CONFIG 0
+#define TRACE_VIRTIO_BALLOON_SET_CONFIG_ENABLED 0
+#define TRACE_VIRTIO_BALLOON_SET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) {
+ (void)actual;
+ (void)oldactual;
+}
+#define TRACE_VIRTIO_BALLOON_TO_TARGET 0
+#define TRACE_VIRTIO_BALLOON_TO_TARGET_ENABLED 0
+#define TRACE_VIRTIO_BALLOON_TO_TARGET_BACKEND_DSTATE() (0)
+static inline void trace_virtio_balloon_to_target(uint64_t target, uint32_t num_pages) {
+ (void)target;
+ (void)num_pages;
+}
+#define TRACE_VIRTIO_GPIO_SET_STATUS 0
+#define TRACE_VIRTIO_GPIO_SET_STATUS_ENABLED 0
+#define TRACE_VIRTIO_GPIO_SET_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpio_set_status(uint8_t status) {
+ (void)status;
+}
+#define TRACE_VIRTIO_GPIO_START 0
+#define TRACE_VIRTIO_GPIO_START_ENABLED 0
+#define TRACE_VIRTIO_GPIO_START_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpio_start(void) {
+}
+#define TRACE_VIRTIO_GPIO_STOP 0
+#define TRACE_VIRTIO_GPIO_STOP_ENABLED 0
+#define TRACE_VIRTIO_GPIO_STOP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_gpio_stop(void) {
+}
+#define TRACE_VIRTIO_IOMMU_ATTACH 0
+#define TRACE_VIRTIO_IOMMU_ATTACH_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_attach(uint32_t domain_id, uint32_t ep_id) {
+ (void)domain_id;
+ (void)ep_id;
+}
+#define TRACE_VIRTIO_IOMMU_DETACH 0
+#define TRACE_VIRTIO_IOMMU_DETACH_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_detach(uint32_t domain_id, uint32_t ep_id) {
+ (void)domain_id;
+ (void)ep_id;
+}
+#define TRACE_VIRTIO_IOMMU_DETACH_ENDPOINT_FROM_DOMAIN 0
+#define TRACE_VIRTIO_IOMMU_DETACH_ENDPOINT_FROM_DOMAIN_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_DETACH_ENDPOINT_FROM_DOMAIN_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_detach_endpoint_from_domain(uint32_t domain_id, uint32_t ep_id) {
+ (void)domain_id;
+ (void)ep_id;
+}
+#define TRACE_VIRTIO_IOMMU_DEVICE_RESET_EXIT 0
+#define TRACE_VIRTIO_IOMMU_DEVICE_RESET_EXIT_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_DEVICE_RESET_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_device_reset_exit(void) {
+}
+#define TRACE_VIRTIO_IOMMU_DEVICE_STATUS 0
+#define TRACE_VIRTIO_IOMMU_DEVICE_STATUS_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_DEVICE_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_device_status(uint8_t status) {
+ (void)status;
+}
+#define TRACE_VIRTIO_IOMMU_FILL_RESV_PROPERTY 0
+#define TRACE_VIRTIO_IOMMU_FILL_RESV_PROPERTY_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_FILL_RESV_PROPERTY_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_fill_resv_property(uint32_t devid, uint8_t subtype, uint64_t start, uint64_t end) {
+ (void)devid;
+ (void)subtype;
+ (void)start;
+ (void)end;
+}
+#define TRACE_VIRTIO_IOMMU_FREEZE_GRANULE 0
+#define TRACE_VIRTIO_IOMMU_FREEZE_GRANULE_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_FREEZE_GRANULE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_freeze_granule(uint64_t page_size_mask) {
+ (void)page_size_mask;
+}
+#define TRACE_VIRTIO_IOMMU_GET_CONFIG 0
+#define TRACE_VIRTIO_IOMMU_GET_CONFIG_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_GET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_get_config(uint64_t page_size_mask, uint64_t start, uint64_t end, uint32_t domain_start, uint32_t domain_end, uint32_t probe_size, uint8_t bypass) {
+ (void)page_size_mask;
+ (void)start;
+ (void)end;
+ (void)domain_start;
+ (void)domain_end;
+ (void)probe_size;
+ (void)bypass;
+}
+#define TRACE_VIRTIO_IOMMU_GET_DOMAIN 0
+#define TRACE_VIRTIO_IOMMU_GET_DOMAIN_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_GET_DOMAIN_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_get_domain(uint32_t domain_id) {
+ (void)domain_id;
+}
+#define TRACE_VIRTIO_IOMMU_GET_ENDPOINT 0
+#define TRACE_VIRTIO_IOMMU_GET_ENDPOINT_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_GET_ENDPOINT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_get_endpoint(uint32_t ep_id) {
+ (void)ep_id;
+}
+#define TRACE_VIRTIO_IOMMU_GET_FEATURES 0
+#define TRACE_VIRTIO_IOMMU_GET_FEATURES_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_GET_FEATURES_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_get_features(uint64_t features) {
+ (void)features;
+}
+#define TRACE_VIRTIO_IOMMU_HOST_RESV_REGIONS 0
+#define TRACE_VIRTIO_IOMMU_HOST_RESV_REGIONS_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_HOST_RESV_REGIONS_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_host_resv_regions(const char *name, uint32_t index, uint64_t lob, uint64_t upb) {
+ (void)name;
+ (void)index;
+ (void)lob;
+ (void)upb;
+}
+#define TRACE_VIRTIO_IOMMU_INIT_IOMMU_MR 0
+#define TRACE_VIRTIO_IOMMU_INIT_IOMMU_MR_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_INIT_IOMMU_MR_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_init_iommu_mr(char *iommu_mr) {
+ (void)iommu_mr;
+}
+#define TRACE_VIRTIO_IOMMU_MAP 0
+#define TRACE_VIRTIO_IOMMU_MAP_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_MAP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_map(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start, uint32_t flags) {
+ (void)domain_id;
+ (void)virt_start;
+ (void)virt_end;
+ (void)phys_start;
+ (void)flags;
+}
+#define TRACE_VIRTIO_IOMMU_NOTIFY_FLAG_ADD 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_FLAG_ADD_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_FLAG_ADD_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_notify_flag_add(const char *name) {
+ (void)name;
+}
+#define TRACE_VIRTIO_IOMMU_NOTIFY_FLAG_DEL 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_FLAG_DEL_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_FLAG_DEL_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_notify_flag_del(const char *name) {
+ (void)name;
+}
+#define TRACE_VIRTIO_IOMMU_NOTIFY_MAP 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_MAP_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_MAP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_notify_map(const char *name, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start, uint32_t flags) {
+ (void)name;
+ (void)virt_start;
+ (void)virt_end;
+ (void)phys_start;
+ (void)flags;
+}
+#define TRACE_VIRTIO_IOMMU_NOTIFY_UNMAP 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_UNMAP_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_NOTIFY_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_notify_unmap(const char *name, uint64_t virt_start, uint64_t virt_end) {
+ (void)name;
+ (void)virt_start;
+ (void)virt_end;
+}
+#define TRACE_VIRTIO_IOMMU_PUT_DOMAIN 0
+#define TRACE_VIRTIO_IOMMU_PUT_DOMAIN_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_PUT_DOMAIN_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_put_domain(uint32_t domain_id) {
+ (void)domain_id;
+}
+#define TRACE_VIRTIO_IOMMU_PUT_ENDPOINT 0
+#define TRACE_VIRTIO_IOMMU_PUT_ENDPOINT_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_PUT_ENDPOINT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_put_endpoint(uint32_t ep_id) {
+ (void)ep_id;
+}
+#define TRACE_VIRTIO_IOMMU_REMAP 0
+#define TRACE_VIRTIO_IOMMU_REMAP_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_REMAP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_remap(const char *name, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start) {
+ (void)name;
+ (void)virt_start;
+ (void)virt_end;
+ (void)phys_start;
+}
+#define TRACE_VIRTIO_IOMMU_REPORT_FAULT 0
+#define TRACE_VIRTIO_IOMMU_REPORT_FAULT_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_REPORT_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_report_fault(uint8_t reason, uint32_t flags, uint32_t endpoint, uint64_t addr) {
+ (void)reason;
+ (void)flags;
+ (void)endpoint;
+ (void)addr;
+}
+#define TRACE_VIRTIO_IOMMU_SET_CONFIG 0
+#define TRACE_VIRTIO_IOMMU_SET_CONFIG_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_SET_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_set_config(uint8_t bypass) {
+ (void)bypass;
+}
+#define TRACE_VIRTIO_IOMMU_SWITCH_ADDRESS_SPACE 0
+#define TRACE_VIRTIO_IOMMU_SWITCH_ADDRESS_SPACE_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_SWITCH_ADDRESS_SPACE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) {
+ (void)bus;
+ (void)slot;
+ (void)fn;
+ (void)on;
+}
+#define TRACE_VIRTIO_IOMMU_SYSTEM_RESET 0
+#define TRACE_VIRTIO_IOMMU_SYSTEM_RESET_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_SYSTEM_RESET_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_system_reset(void) {
+}
+#define TRACE_VIRTIO_IOMMU_TRANSLATE 0
+#define TRACE_VIRTIO_IOMMU_TRANSLATE_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_TRANSLATE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_translate(const char *name, uint32_t rid, uint64_t iova, int flag) {
+ (void)name;
+ (void)rid;
+ (void)iova;
+ (void)flag;
+}
+#define TRACE_VIRTIO_IOMMU_TRANSLATE_OUT 0
+#define TRACE_VIRTIO_IOMMU_TRANSLATE_OUT_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_TRANSLATE_OUT_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_translate_out(uint64_t virt_addr, uint64_t phys_addr, uint32_t sid) {
+ (void)virt_addr;
+ (void)phys_addr;
+ (void)sid;
+}
+#define TRACE_VIRTIO_IOMMU_UNMAP 0
+#define TRACE_VIRTIO_IOMMU_UNMAP_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_unmap(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end) {
+ (void)domain_id;
+ (void)virt_start;
+ (void)virt_end;
+}
+#define TRACE_VIRTIO_IOMMU_UNMAP_DONE 0
+#define TRACE_VIRTIO_IOMMU_UNMAP_DONE_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_UNMAP_DONE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_unmap_done(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end) {
+ (void)domain_id;
+ (void)virt_start;
+ (void)virt_end;
+}
+#define TRACE_VIRTIO_IOMMU_UPDATE_PAGE_SIZE_MASK 0
+#define TRACE_VIRTIO_IOMMU_UPDATE_PAGE_SIZE_MASK_ENABLED 0
+#define TRACE_VIRTIO_IOMMU_UPDATE_PAGE_SIZE_MASK_BACKEND_DSTATE() (0)
+static inline void trace_virtio_iommu_update_page_size_mask(const char *name, uint64_t old, uint64_t new) {
+ (void)name;
+ (void)old;
+ (void)new;
+}
+#define TRACE_VIRTIO_MEM_PLUG_REQUEST 0
+#define TRACE_VIRTIO_MEM_PLUG_REQUEST_ENABLED 0
+#define TRACE_VIRTIO_MEM_PLUG_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_plug_request(uint64_t addr, uint16_t nb_blocks) {
+ (void)addr;
+ (void)nb_blocks;
+}
+#define TRACE_VIRTIO_MEM_RESIZED_USABLE_REGION 0
+#define TRACE_VIRTIO_MEM_RESIZED_USABLE_REGION_ENABLED 0
+#define TRACE_VIRTIO_MEM_RESIZED_USABLE_REGION_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_resized_usable_region(uint64_t old_size, uint64_t new_size) {
+ (void)old_size;
+ (void)new_size;
+}
+#define TRACE_VIRTIO_MEM_SEND_RESPONSE 0
+#define TRACE_VIRTIO_MEM_SEND_RESPONSE_ENABLED 0
+#define TRACE_VIRTIO_MEM_SEND_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_send_response(uint16_t type) {
+ (void)type;
+}
+#define TRACE_VIRTIO_MEM_STATE_REQUEST 0
+#define TRACE_VIRTIO_MEM_STATE_REQUEST_ENABLED 0
+#define TRACE_VIRTIO_MEM_STATE_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_state_request(uint64_t addr, uint16_t nb_blocks) {
+ (void)addr;
+ (void)nb_blocks;
+}
+#define TRACE_VIRTIO_MEM_STATE_RESPONSE 0
+#define TRACE_VIRTIO_MEM_STATE_RESPONSE_ENABLED 0
+#define TRACE_VIRTIO_MEM_STATE_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_state_response(uint16_t state) {
+ (void)state;
+}
+#define TRACE_VIRTIO_MEM_UNPLUG_ALL_REQUEST 0
+#define TRACE_VIRTIO_MEM_UNPLUG_ALL_REQUEST_ENABLED 0
+#define TRACE_VIRTIO_MEM_UNPLUG_ALL_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_unplug_all_request(void) {
+}
+#define TRACE_VIRTIO_MEM_UNPLUG_REQUEST 0
+#define TRACE_VIRTIO_MEM_UNPLUG_REQUEST_ENABLED 0
+#define TRACE_VIRTIO_MEM_UNPLUG_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_unplug_request(uint64_t addr, uint16_t nb_blocks) {
+ (void)addr;
+ (void)nb_blocks;
+}
+#define TRACE_VIRTIO_MEM_UNPLUGGED_ALL 0
+#define TRACE_VIRTIO_MEM_UNPLUGGED_ALL_ENABLED 0
+#define TRACE_VIRTIO_MEM_UNPLUGGED_ALL_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mem_unplugged_all(void) {
+}
+#define TRACE_VIRTIO_MMIO_GUEST_PAGE 0
+#define TRACE_VIRTIO_MMIO_GUEST_PAGE_ENABLED 0
+#define TRACE_VIRTIO_MMIO_GUEST_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mmio_guest_page(uint64_t size, int shift) {
+ (void)size;
+ (void)shift;
+}
+#define TRACE_VIRTIO_MMIO_QUEUE_WRITE 0
+#define TRACE_VIRTIO_MMIO_QUEUE_WRITE_ENABLED 0
+#define TRACE_VIRTIO_MMIO_QUEUE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mmio_queue_write(uint64_t value, int max_size) {
+ (void)value;
+ (void)max_size;
+}
+#define TRACE_VIRTIO_MMIO_READ 0
+#define TRACE_VIRTIO_MMIO_READ_ENABLED 0
+#define TRACE_VIRTIO_MMIO_READ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mmio_read(uint64_t offset) {
+ (void)offset;
+}
+#define TRACE_VIRTIO_MMIO_SETTING_IRQ 0
+#define TRACE_VIRTIO_MMIO_SETTING_IRQ_ENABLED 0
+#define TRACE_VIRTIO_MMIO_SETTING_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mmio_setting_irq(int level) {
+ (void)level;
+}
+#define TRACE_VIRTIO_MMIO_WRITE_OFFSET 0
+#define TRACE_VIRTIO_MMIO_WRITE_OFFSET_ENABLED 0
+#define TRACE_VIRTIO_MMIO_WRITE_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_virtio_mmio_write_offset(uint64_t offset, uint64_t value) {
+ (void)offset;
+ (void)value;
+}
+#define TRACE_VIRTIO_NOTIFY 0
+#define TRACE_VIRTIO_NOTIFY_ENABLED 0
+#define TRACE_VIRTIO_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_virtio_notify(void *vdev, void *vq) {
+ (void)vdev;
+ (void)vq;
+}
+#define TRACE_VIRTIO_NOTIFY_IRQFD_DEFERRED_FN 0
+#define TRACE_VIRTIO_NOTIFY_IRQFD_DEFERRED_FN_ENABLED 0
+#define TRACE_VIRTIO_NOTIFY_IRQFD_DEFERRED_FN_BACKEND_DSTATE() (0)
+static inline void trace_virtio_notify_irqfd_deferred_fn(void *vdev, void *vq) {
+ (void)vdev;
+ (void)vq;
+}
+#define TRACE_VIRTIO_PCI_NOTIFY 0
+#define TRACE_VIRTIO_PCI_NOTIFY_ENABLED 0
+#define TRACE_VIRTIO_PCI_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_virtio_pci_notify(uint16_t vector) {
+ (void)vector;
+}
+#define TRACE_VIRTIO_PCI_NOTIFY_WRITE 0
+#define TRACE_VIRTIO_PCI_NOTIFY_WRITE_ENABLED 0
+#define TRACE_VIRTIO_PCI_NOTIFY_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_pci_notify_write(uint64_t addr, uint64_t val, unsigned int size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_VIRTIO_PCI_NOTIFY_WRITE_PIO 0
+#define TRACE_VIRTIO_PCI_NOTIFY_WRITE_PIO_ENABLED 0
+#define TRACE_VIRTIO_PCI_NOTIFY_WRITE_PIO_BACKEND_DSTATE() (0)
+static inline void trace_virtio_pci_notify_write_pio(uint64_t addr, uint64_t val, unsigned int size) {
+ (void)addr;
+ (void)val;
+ (void)size;
+}
+#define TRACE_VIRTIO_PMEM_FLUSH_DONE 0
+#define TRACE_VIRTIO_PMEM_FLUSH_DONE_ENABLED 0
+#define TRACE_VIRTIO_PMEM_FLUSH_DONE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_pmem_flush_done(int type) {
+ (void)type;
+}
+#define TRACE_VIRTIO_PMEM_FLUSH_REQUEST 0
+#define TRACE_VIRTIO_PMEM_FLUSH_REQUEST_ENABLED 0
+#define TRACE_VIRTIO_PMEM_FLUSH_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_virtio_pmem_flush_request(void) {
+}
+#define TRACE_VIRTIO_PMEM_RESPONSE 0
+#define TRACE_VIRTIO_PMEM_RESPONSE_ENABLED 0
+#define TRACE_VIRTIO_PMEM_RESPONSE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_pmem_response(void) {
+}
+#define TRACE_VIRTIO_QUEUE_NOTIFY 0
+#define TRACE_VIRTIO_QUEUE_NOTIFY_ENABLED 0
+#define TRACE_VIRTIO_QUEUE_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_virtio_queue_notify(void *vdev, int n, void *vq) {
+ (void)vdev;
+ (void)n;
+ (void)vq;
+}
+#define TRACE_VIRTIO_RNG_CPU_IS_STOPPED 0
+#define TRACE_VIRTIO_RNG_CPU_IS_STOPPED_ENABLED 0
+#define TRACE_VIRTIO_RNG_CPU_IS_STOPPED_BACKEND_DSTATE() (0)
+static inline void trace_virtio_rng_cpu_is_stopped(void *rng, int size) {
+ (void)rng;
+ (void)size;
+}
+#define TRACE_VIRTIO_RNG_GUEST_NOT_READY 0
+#define TRACE_VIRTIO_RNG_GUEST_NOT_READY_ENABLED 0
+#define TRACE_VIRTIO_RNG_GUEST_NOT_READY_BACKEND_DSTATE() (0)
+static inline void trace_virtio_rng_guest_not_ready(void *rng) {
+ (void)rng;
+}
+#define TRACE_VIRTIO_RNG_POPPED 0
+#define TRACE_VIRTIO_RNG_POPPED_ENABLED 0
+#define TRACE_VIRTIO_RNG_POPPED_BACKEND_DSTATE() (0)
+static inline void trace_virtio_rng_popped(void *rng) {
+ (void)rng;
+}
+#define TRACE_VIRTIO_RNG_PUSHED 0
+#define TRACE_VIRTIO_RNG_PUSHED_ENABLED 0
+#define TRACE_VIRTIO_RNG_PUSHED_BACKEND_DSTATE() (0)
+static inline void trace_virtio_rng_pushed(void *rng, size_t len) {
+ (void)rng;
+ (void)len;
+}
+#define TRACE_VIRTIO_RNG_REQUEST 0
+#define TRACE_VIRTIO_RNG_REQUEST_ENABLED 0
+#define TRACE_VIRTIO_RNG_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_virtio_rng_request(void *rng, size_t size, unsigned quota) {
+ (void)rng;
+ (void)size;
+ (void)quota;
+}
+#define TRACE_VIRTIO_RNG_VM_STATE_CHANGE 0
+#define TRACE_VIRTIO_RNG_VM_STATE_CHANGE_ENABLED 0
+#define TRACE_VIRTIO_RNG_VM_STATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_virtio_rng_vm_state_change(void *rng, int running, int state) {
+ (void)rng;
+ (void)running;
+ (void)state;
+}
+#define TRACE_VIRTIO_SET_STATUS 0
+#define TRACE_VIRTIO_SET_STATUS_ENABLED 0
+#define TRACE_VIRTIO_SET_STATUS_BACKEND_DSTATE() (0)
+static inline void trace_virtio_set_status(void *vdev, uint8_t val) {
+ (void)vdev;
+ (void)val;
+}
+#define TRACE_VIRTQUEUE_ALLOC_ELEMENT 0
+#define TRACE_VIRTQUEUE_ALLOC_ELEMENT_ENABLED 0
+#define TRACE_VIRTQUEUE_ALLOC_ELEMENT_BACKEND_DSTATE() (0)
+static inline void trace_virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned out_num) {
+ (void)elem;
+ (void)sz;
+ (void)in_num;
+ (void)out_num;
+}
+#define TRACE_VIRTQUEUE_FILL 0
+#define TRACE_VIRTQUEUE_FILL_ENABLED 0
+#define TRACE_VIRTQUEUE_FILL_BACKEND_DSTATE() (0)
+static inline void trace_virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) {
+ (void)vq;
+ (void)elem;
+ (void)len;
+ (void)idx;
+}
+#define TRACE_VIRTQUEUE_FLUSH 0
+#define TRACE_VIRTQUEUE_FLUSH_ENABLED 0
+#define TRACE_VIRTQUEUE_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_virtqueue_flush(void *vq, unsigned int count) {
+ (void)vq;
+ (void)count;
+}
+#define TRACE_VIRTQUEUE_POP 0
+#define TRACE_VIRTQUEUE_POP_ENABLED 0
+#define TRACE_VIRTQUEUE_POP_BACKEND_DSTATE() (0)
+static inline void trace_virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) {
+ (void)vq;
+ (void)elem;
+ (void)in_num;
+ (void)out_num;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_vmapple.h b/trace/trace-hw_vmapple.h
new file mode 100644
index 0000000000..78c7ff1b86
--- /dev/null
+++ b/trace/trace-hw_vmapple.h
@@ -0,0 +1,137 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_VMAPPLE_H
+#define TRACE_TRACE_HW_VMAPPLE_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_AES_2_READ 0
+#define TRACE_AES_2_READ_ENABLED 0
+#define TRACE_AES_2_READ_BACKEND_DSTATE() (0)
+static inline void trace_aes_2_read(uint64_t offset, uint64_t res) {
+ (void)offset;
+ (void)res;
+}
+#define TRACE_AES_2_WRITE 0
+#define TRACE_AES_2_WRITE_ENABLED 0
+#define TRACE_AES_2_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aes_2_write(uint64_t offset, uint64_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_AES_CMD_DATA 0
+#define TRACE_AES_CMD_DATA_ENABLED 0
+#define TRACE_AES_CMD_DATA_BACKEND_DSTATE() (0)
+static inline void trace_aes_cmd_data(uint32_t key, uint32_t iv, uint64_t src, uint64_t dst, uint32_t len) {
+ (void)key;
+ (void)iv;
+ (void)src;
+ (void)dst;
+ (void)len;
+}
+#define TRACE_AES_CMD_FLAG 0
+#define TRACE_AES_CMD_FLAG_ENABLED 0
+#define TRACE_AES_CMD_FLAG_BACKEND_DSTATE() (0)
+static inline void trace_aes_cmd_flag(uint32_t raise, uint32_t flag_info) {
+ (void)raise;
+ (void)flag_info;
+}
+#define TRACE_AES_CMD_IV 0
+#define TRACE_AES_CMD_IV_ENABLED 0
+#define TRACE_AES_CMD_IV_BACKEND_DSTATE() (0)
+static inline void trace_aes_cmd_iv(uint32_t ctx, uint32_t iv0, uint32_t iv1, uint32_t iv2, uint32_t iv3) {
+ (void)ctx;
+ (void)iv0;
+ (void)iv1;
+ (void)iv2;
+ (void)iv3;
+}
+#define TRACE_AES_CMD_KEY_SELECT_BUILTIN 0
+#define TRACE_AES_CMD_KEY_SELECT_BUILTIN_ENABLED 0
+#define TRACE_AES_CMD_KEY_SELECT_BUILTIN_BACKEND_DSTATE() (0)
+static inline void trace_aes_cmd_key_select_builtin(uint32_t ctx, uint32_t key_id, const char *direction, const char *cipher) {
+ (void)ctx;
+ (void)key_id;
+ (void)direction;
+ (void)cipher;
+}
+#define TRACE_AES_CMD_KEY_SELECT_NEW 0
+#define TRACE_AES_CMD_KEY_SELECT_NEW_ENABLED 0
+#define TRACE_AES_CMD_KEY_SELECT_NEW_BACKEND_DSTATE() (0)
+static inline void trace_aes_cmd_key_select_new(uint32_t ctx, uint32_t key_len, const char *direction, const char *cipher) {
+ (void)ctx;
+ (void)key_len;
+ (void)direction;
+ (void)cipher;
+}
+#define TRACE_AES_CMD_STORE_IV 0
+#define TRACE_AES_CMD_STORE_IV_ENABLED 0
+#define TRACE_AES_CMD_STORE_IV_BACKEND_DSTATE() (0)
+static inline void trace_aes_cmd_store_iv(uint32_t ctx, uint64_t addr, uint32_t iv0, uint32_t iv1, uint32_t iv2, uint32_t iv3) {
+ (void)ctx;
+ (void)addr;
+ (void)iv0;
+ (void)iv1;
+ (void)iv2;
+ (void)iv3;
+}
+#define TRACE_AES_DUMP_DATA 0
+#define TRACE_AES_DUMP_DATA_ENABLED 0
+#define TRACE_AES_DUMP_DATA_BACKEND_DSTATE() (0)
+static inline void trace_aes_dump_data(const char *desc, const char *hex) {
+ (void)desc;
+ (void)hex;
+}
+#define TRACE_AES_FIFO_PROCESS 0
+#define TRACE_AES_FIFO_PROCESS_ENABLED 0
+#define TRACE_AES_FIFO_PROCESS_BACKEND_DSTATE() (0)
+static inline void trace_aes_fifo_process(uint32_t cmd, bool success) {
+ (void)cmd;
+ (void)success;
+}
+#define TRACE_AES_READ 0
+#define TRACE_AES_READ_ENABLED 0
+#define TRACE_AES_READ_BACKEND_DSTATE() (0)
+static inline void trace_aes_read(uint64_t offset, uint64_t res) {
+ (void)offset;
+ (void)res;
+}
+#define TRACE_AES_WRITE 0
+#define TRACE_AES_WRITE_ENABLED 0
+#define TRACE_AES_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aes_write(uint64_t offset, uint64_t val) {
+ (void)offset;
+ (void)val;
+}
+#define TRACE_BDIF_READ 0
+#define TRACE_BDIF_READ_ENABLED 0
+#define TRACE_BDIF_READ_BACKEND_DSTATE() (0)
+static inline void trace_bdif_read(uint64_t offset, uint32_t size, uint64_t value) {
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+#define TRACE_BDIF_VBLK_READ 0
+#define TRACE_BDIF_VBLK_READ_ENABLED 0
+#define TRACE_BDIF_VBLK_READ_BACKEND_DSTATE() (0)
+static inline void trace_bdif_vblk_read(const char *dev, uint64_t addr, uint64_t offset, uint32_t len, int r) {
+ (void)dev;
+ (void)addr;
+ (void)offset;
+ (void)len;
+ (void)r;
+}
+#define TRACE_BDIF_WRITE 0
+#define TRACE_BDIF_WRITE_ENABLED 0
+#define TRACE_BDIF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_bdif_write(uint64_t offset, uint32_t size, uint64_t value) {
+ (void)offset;
+ (void)size;
+ (void)value;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_watchdog.h b/trace/trace-hw_watchdog.h
new file mode 100644
index 0000000000..8ae360ee75
--- /dev/null
+++ b/trace/trace-hw_watchdog.h
@@ -0,0 +1,159 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_WATCHDOG_H
+#define TRACE_TRACE_HW_WATCHDOG_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ALLWINNER_WDT_EXPIRED 0
+#define TRACE_ALLWINNER_WDT_EXPIRED_ENABLED 0
+#define TRACE_ALLWINNER_WDT_EXPIRED_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_wdt_expired(bool enabled, bool reset_enabled) {
+ (void)enabled;
+ (void)reset_enabled;
+}
+#define TRACE_ALLWINNER_WDT_READ 0
+#define TRACE_ALLWINNER_WDT_READ_ENABLED 0
+#define TRACE_ALLWINNER_WDT_READ_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_wdt_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ALLWINNER_WDT_RESET_ENTER 0
+#define TRACE_ALLWINNER_WDT_RESET_ENTER_ENABLED 0
+#define TRACE_ALLWINNER_WDT_RESET_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_wdt_reset_enter(void) {
+}
+#define TRACE_ALLWINNER_WDT_UPDATE_TIMER 0
+#define TRACE_ALLWINNER_WDT_UPDATE_TIMER_ENABLED 0
+#define TRACE_ALLWINNER_WDT_UPDATE_TIMER_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_wdt_update_timer(uint8_t count) {
+ (void)count;
+}
+#define TRACE_ALLWINNER_WDT_WRITE 0
+#define TRACE_ALLWINNER_WDT_WRITE_ENABLED 0
+#define TRACE_ALLWINNER_WDT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_allwinner_wdt_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_ASPEED_WDT_READ 0
+#define TRACE_ASPEED_WDT_READ_ENABLED 0
+#define TRACE_ASPEED_WDT_READ_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_wdt_read(uint64_t addr, uint32_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_ASPEED_WDT_WRITE 0
+#define TRACE_ASPEED_WDT_WRITE_ENABLED 0
+#define TRACE_ASPEED_WDT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_aspeed_wdt_write(uint64_t addr, uint32_t size, uint64_t data) {
+ (void)addr;
+ (void)size;
+ (void)data;
+}
+#define TRACE_CMSDK_APB_WATCHDOG_LOCK 0
+#define TRACE_CMSDK_APB_WATCHDOG_LOCK_ENABLED 0
+#define TRACE_CMSDK_APB_WATCHDOG_LOCK_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_watchdog_lock(uint32_t lock) {
+ (void)lock;
+}
+#define TRACE_CMSDK_APB_WATCHDOG_READ 0
+#define TRACE_CMSDK_APB_WATCHDOG_READ_ENABLED 0
+#define TRACE_CMSDK_APB_WATCHDOG_READ_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_watchdog_read(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_CMSDK_APB_WATCHDOG_RESET 0
+#define TRACE_CMSDK_APB_WATCHDOG_RESET_ENABLED 0
+#define TRACE_CMSDK_APB_WATCHDOG_RESET_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_watchdog_reset(void) {
+}
+#define TRACE_CMSDK_APB_WATCHDOG_WRITE 0
+#define TRACE_CMSDK_APB_WATCHDOG_WRITE_ENABLED 0
+#define TRACE_CMSDK_APB_WATCHDOG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_cmsdk_apb_watchdog_write(uint64_t offset, uint64_t data, unsigned size) {
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_IMX2_WDT_EXPIRED 0
+#define TRACE_IMX2_WDT_EXPIRED_ENABLED 0
+#define TRACE_IMX2_WDT_EXPIRED_BACKEND_DSTATE() (0)
+static inline void trace_imx2_wdt_expired(void) {
+}
+#define TRACE_IMX2_WDT_INTERRUPT 0
+#define TRACE_IMX2_WDT_INTERRUPT_ENABLED 0
+#define TRACE_IMX2_WDT_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_imx2_wdt_interrupt(void) {
+}
+#define TRACE_IMX2_WDT_READ 0
+#define TRACE_IMX2_WDT_READ_ENABLED 0
+#define TRACE_IMX2_WDT_READ_BACKEND_DSTATE() (0)
+static inline void trace_imx2_wdt_read(uint32_t addr, uint16_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_IMX2_WDT_WRITE 0
+#define TRACE_IMX2_WDT_WRITE_ENABLED 0
+#define TRACE_IMX2_WDT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_imx2_wdt_write(uint32_t addr, uint16_t data) {
+ (void)addr;
+ (void)data;
+}
+#define TRACE_SPAPR_WATCHDOG_EXPIRED 0
+#define TRACE_SPAPR_WATCHDOG_EXPIRED_ENABLED 0
+#define TRACE_SPAPR_WATCHDOG_EXPIRED_BACKEND_DSTATE() (0)
+static inline void trace_spapr_watchdog_expired(uint64_t num, unsigned action) {
+ (void)num;
+ (void)action;
+}
+#define TRACE_SPAPR_WATCHDOG_QUERY 0
+#define TRACE_SPAPR_WATCHDOG_QUERY_ENABLED 0
+#define TRACE_SPAPR_WATCHDOG_QUERY_BACKEND_DSTATE() (0)
+static inline void trace_spapr_watchdog_query(uint64_t caps) {
+ (void)caps;
+}
+#define TRACE_SPAPR_WATCHDOG_QUERY_LPM 0
+#define TRACE_SPAPR_WATCHDOG_QUERY_LPM_ENABLED 0
+#define TRACE_SPAPR_WATCHDOG_QUERY_LPM_BACKEND_DSTATE() (0)
+static inline void trace_spapr_watchdog_query_lpm(uint64_t caps) {
+ (void)caps;
+}
+#define TRACE_SPAPR_WATCHDOG_START 0
+#define TRACE_SPAPR_WATCHDOG_START_ENABLED 0
+#define TRACE_SPAPR_WATCHDOG_START_BACKEND_DSTATE() (0)
+static inline void trace_spapr_watchdog_start(uint64_t flags, uint64_t num, uint64_t timeout) {
+ (void)flags;
+ (void)num;
+ (void)timeout;
+}
+#define TRACE_SPAPR_WATCHDOG_STOP 0
+#define TRACE_SPAPR_WATCHDOG_STOP_ENABLED 0
+#define TRACE_SPAPR_WATCHDOG_STOP_BACKEND_DSTATE() (0)
+static inline void trace_spapr_watchdog_stop(uint64_t num, uint64_t ret) {
+ (void)num;
+ (void)ret;
+}
+#define TRACE_WATCHDOG_PERFORM_ACTION 0
+#define TRACE_WATCHDOG_PERFORM_ACTION_ENABLED 0
+#define TRACE_WATCHDOG_PERFORM_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_watchdog_perform_action(unsigned int action) {
+ (void)action;
+}
+#define TRACE_WATCHDOG_SET_ACTION 0
+#define TRACE_WATCHDOG_SET_ACTION_ENABLED 0
+#define TRACE_WATCHDOG_SET_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_watchdog_set_action(unsigned int action) {
+ (void)action;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_xbox_mcpx_apu.h b/trace/trace-hw_xbox_mcpx_apu.h
new file mode 100644
index 0000000000..385eaa019d
--- /dev/null
+++ b/trace/trace-hw_xbox_mcpx_apu.h
@@ -0,0 +1,36 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_XBOX_MCPX_APU_H
+#define TRACE_TRACE_HW_XBOX_MCPX_APU_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MCPX_APU_METHOD 0
+#define TRACE_MCPX_APU_METHOD_ENABLED 0
+#define TRACE_MCPX_APU_METHOD_BACKEND_DSTATE() (0)
+static inline void trace_mcpx_apu_method(uint32_t addr, uint32_t parameter) {
+ (void)addr;
+ (void)parameter;
+}
+#define TRACE_MCPX_APU_REG_READ 0
+#define TRACE_MCPX_APU_REG_READ_ENABLED 0
+#define TRACE_MCPX_APU_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_mcpx_apu_reg_read(uint32_t addr, unsigned int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_MCPX_APU_REG_WRITE 0
+#define TRACE_MCPX_APU_REG_WRITE_ENABLED 0
+#define TRACE_MCPX_APU_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mcpx_apu_reg_write(uint32_t addr, unsigned int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_xbox_mcpx_apu_dsp.h b/trace/trace-hw_xbox_mcpx_apu_dsp.h
new file mode 100644
index 0000000000..c20952561c
--- /dev/null
+++ b/trace/trace-hw_xbox_mcpx_apu_dsp.h
@@ -0,0 +1,40 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_XBOX_MCPX_APU_DSP_H
+#define TRACE_TRACE_HW_XBOX_MCPX_APU_DSP_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_DSP_READ_PERIPHERAL 0
+#define TRACE_DSP_READ_PERIPHERAL_ENABLED 0
+#define TRACE_DSP_READ_PERIPHERAL_BACKEND_DSTATE() (0)
+static inline void trace_dsp_read_peripheral(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_DSP_WRITE_PERIPHERAL 0
+#define TRACE_DSP_WRITE_PERIPHERAL_ENABLED 0
+#define TRACE_DSP_WRITE_PERIPHERAL_BACKEND_DSTATE() (0)
+static inline void trace_dsp_write_peripheral(uint32_t addr, uint32_t val) {
+ (void)addr;
+ (void)val;
+}
+#define TRACE_DSP56K_EXECUTE_INSTRUCTION 0
+#define TRACE_DSP56K_EXECUTE_INSTRUCTION_ENABLED 0
+#define TRACE_DSP56K_EXECUTE_INSTRUCTION_BACKEND_DSTATE() (0)
+static inline void trace_dsp56k_execute_instruction(uint32_t id, uint32_t pc) {
+ (void)id;
+ (void)pc;
+}
+#define TRACE_DSP56K_EXECUTE_INSTRUCTION_DISASM 0
+#define TRACE_DSP56K_EXECUTE_INSTRUCTION_DISASM_ENABLED 0
+#define TRACE_DSP56K_EXECUTE_INSTRUCTION_DISASM_BACKEND_DSTATE() (0)
+static inline void trace_dsp56k_execute_instruction_disasm(const char *disasm) {
+ (void)disasm;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_xbox_mcpx_nvnet.h b/trace/trace-hw_xbox_mcpx_nvnet.h
new file mode 100644
index 0000000000..af71120160
--- /dev/null
+++ b/trace/trace-hw_xbox_mcpx_nvnet.h
@@ -0,0 +1,194 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_XBOX_MCPX_NVNET_H
+#define TRACE_TRACE_HW_XBOX_MCPX_NVNET_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_NVNET_CANT_RX 0
+#define TRACE_NVNET_CANT_RX_ENABLED 0
+#define TRACE_NVNET_CANT_RX_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_cant_rx(bool rx_en, bool dma_en, bool link_up, bool buf_avail) {
+ (void)rx_en;
+ (void)dma_en;
+ (void)link_up;
+ (void)buf_avail;
+}
+#define TRACE_NVNET_CANT_TX 0
+#define TRACE_NVNET_CANT_TX_ENABLED 0
+#define TRACE_NVNET_CANT_TX_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_cant_tx(bool tx_en, bool dma_en, bool link_up) {
+ (void)tx_en;
+ (void)dma_en;
+ (void)link_up;
+}
+#define TRACE_NVNET_DESC_STORE 0
+#define TRACE_NVNET_DESC_STORE_ENABLED 0
+#define TRACE_NVNET_DESC_STORE_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_desc_store(uint32_t desc_addr, uint32_t buf_addr, uint16_t length, uint16_t flags) {
+ (void)desc_addr;
+ (void)buf_addr;
+ (void)length;
+ (void)flags;
+}
+#define TRACE_NVNET_IO_READ 0
+#define TRACE_NVNET_IO_READ_ENABLED 0
+#define TRACE_NVNET_IO_READ_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_io_read(uint32_t addr, unsigned int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_NVNET_IO_WRITE 0
+#define TRACE_NVNET_IO_WRITE_ENABLED 0
+#define TRACE_NVNET_IO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_io_write(uint32_t addr, unsigned int size, uint64_t val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_NVNET_LINK_NEGOTIATION_DONE 0
+#define TRACE_NVNET_LINK_NEGOTIATION_DONE_ENABLED 0
+#define TRACE_NVNET_LINK_NEGOTIATION_DONE_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_link_negotiation_done(void) {
+}
+#define TRACE_NVNET_LINK_NEGOTIATION_START 0
+#define TRACE_NVNET_LINK_NEGOTIATION_START_ENABLED 0
+#define TRACE_NVNET_LINK_NEGOTIATION_START_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_link_negotiation_start(void) {
+}
+#define TRACE_NVNET_LINK_STATUS_CHANGED 0
+#define TRACE_NVNET_LINK_STATUS_CHANGED_ENABLED 0
+#define TRACE_NVNET_LINK_STATUS_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_link_status_changed(bool status) {
+ (void)status;
+}
+#define TRACE_NVNET_PACKET_TX 0
+#define TRACE_NVNET_PACKET_TX_ENABLED 0
+#define TRACE_NVNET_PACKET_TX_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_packet_tx(size_t size) {
+ (void)size;
+}
+#define TRACE_NVNET_PHY_REG_READ 0
+#define TRACE_NVNET_PHY_REG_READ_ENABLED 0
+#define TRACE_NVNET_PHY_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_phy_reg_read(unsigned int phy_addr, uint8_t addr, const char *name, uint16_t val) {
+ (void)phy_addr;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_NVNET_PHY_REG_WRITE 0
+#define TRACE_NVNET_PHY_REG_WRITE_ENABLED 0
+#define TRACE_NVNET_PHY_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_phy_reg_write(unsigned int phy_addr, uint8_t addr, const char *name, uint16_t val) {
+ (void)phy_addr;
+ (void)addr;
+ (void)name;
+ (void)val;
+}
+#define TRACE_NVNET_REG_READ 0
+#define TRACE_NVNET_REG_READ_ENABLED 0
+#define TRACE_NVNET_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_reg_read(uint32_t addr, const char *name, unsigned int size, uint64_t val) {
+ (void)addr;
+ (void)name;
+ (void)size;
+ (void)val;
+}
+#define TRACE_NVNET_REG_WRITE 0
+#define TRACE_NVNET_REG_WRITE_ENABLED 0
+#define TRACE_NVNET_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_reg_write(uint32_t addr, const char *name, unsigned int size, uint64_t val) {
+ (void)addr;
+ (void)name;
+ (void)size;
+ (void)val;
+}
+#define TRACE_NVNET_RX_DMA 0
+#define TRACE_NVNET_RX_DMA_ENABLED 0
+#define TRACE_NVNET_RX_DMA_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_dma(uint32_t addr, size_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_NVNET_RX_FILTER_BCAST_MATCH 0
+#define TRACE_NVNET_RX_FILTER_BCAST_MATCH_ENABLED 0
+#define TRACE_NVNET_RX_FILTER_BCAST_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_filter_bcast_match(void) {
+}
+#define TRACE_NVNET_RX_FILTER_DROPPED 0
+#define TRACE_NVNET_RX_FILTER_DROPPED_ENABLED 0
+#define TRACE_NVNET_RX_FILTER_DROPPED_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_filter_dropped(void) {
+}
+#define TRACE_NVNET_RX_FILTER_MCAST_MATCH 0
+#define TRACE_NVNET_RX_FILTER_MCAST_MATCH_ENABLED 0
+#define TRACE_NVNET_RX_FILTER_MCAST_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_filter_mcast_match(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_NVNET_RX_FILTER_MCAST_MISMATCH 0
+#define TRACE_NVNET_RX_FILTER_MCAST_MISMATCH_ENABLED 0
+#define TRACE_NVNET_RX_FILTER_MCAST_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_filter_mcast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_NVNET_RX_FILTER_UCAST_MATCH 0
+#define TRACE_NVNET_RX_FILTER_UCAST_MATCH_ENABLED 0
+#define TRACE_NVNET_RX_FILTER_UCAST_MATCH_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_filter_ucast_match(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_NVNET_RX_FILTER_UCAST_MISMATCH 0
+#define TRACE_NVNET_RX_FILTER_UCAST_MISMATCH_ENABLED 0
+#define TRACE_NVNET_RX_FILTER_UCAST_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_filter_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) {
+ (void)b0;
+ (void)b1;
+ (void)b2;
+ (void)b3;
+ (void)b4;
+ (void)b5;
+}
+#define TRACE_NVNET_RX_OVERSIZED 0
+#define TRACE_NVNET_RX_OVERSIZED_ENABLED 0
+#define TRACE_NVNET_RX_OVERSIZED_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_rx_oversized(size_t size) {
+ (void)size;
+}
+#define TRACE_NVNET_TX_DMA 0
+#define TRACE_NVNET_TX_DMA_ENABLED 0
+#define TRACE_NVNET_TX_DMA_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_tx_dma(uint32_t addr, size_t size) {
+ (void)addr;
+ (void)size;
+}
+#define TRACE_NVNET_UPDATE_IRQ 0
+#define TRACE_NVNET_UPDATE_IRQ_ENABLED 0
+#define TRACE_NVNET_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_nvnet_update_irq(uint32_t status, uint32_t mask) {
+ (void)status;
+ (void)mask;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_xbox_nv2a.h b/trace/trace-hw_xbox_nv2a.h
new file mode 100644
index 0000000000..bf10d95dd9
--- /dev/null
+++ b/trace/trace-hw_xbox_nv2a.h
@@ -0,0 +1,281 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_XBOX_NV2A_H
+#define TRACE_TRACE_HW_XBOX_NV2A_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_NV2A_DMA_MAP 0
+#define TRACE_NV2A_DMA_MAP_ENABLED 0
+#define TRACE_NV2A_DMA_MAP_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_dma_map(uint32_t obj_address, uint32_t dma_class, uint32_t dma_target, uint32_t dma_addr, uint32_t dma_limit) {
+ (void)obj_address;
+ (void)dma_class;
+ (void)dma_target;
+ (void)dma_addr;
+ (void)dma_limit;
+}
+#define TRACE_NV2A_IRQ 0
+#define TRACE_NV2A_IRQ_ENABLED 0
+#define TRACE_NV2A_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_irq(uint32_t pending) {
+ (void)pending;
+}
+#define TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE 0
+#define TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE_ENABLED 0
+#define TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_flip_increment_write(uint32_t write3d_old, uint32_t write3d_new) {
+ (void)write3d_old;
+ (void)write3d_new;
+}
+#define TRACE_NV2A_PGRAPH_FLIP_STALL 0
+#define TRACE_NV2A_PGRAPH_FLIP_STALL_ENABLED 0
+#define TRACE_NV2A_PGRAPH_FLIP_STALL_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_flip_stall(void) {
+}
+#define TRACE_NV2A_PGRAPH_METHOD 0
+#define TRACE_NV2A_PGRAPH_METHOD_ENABLED 0
+#define TRACE_NV2A_PGRAPH_METHOD_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_method(uint32_t subchannel, uint32_t graphics_class, uint32_t method, const char *name, uint32_t offset, uint32_t parameter) {
+ (void)subchannel;
+ (void)graphics_class;
+ (void)method;
+ (void)name;
+ (void)offset;
+ (void)parameter;
+}
+#define TRACE_NV2A_PGRAPH_METHOD_ABBREV 0
+#define TRACE_NV2A_PGRAPH_METHOD_ABBREV_ENABLED 0
+#define TRACE_NV2A_PGRAPH_METHOD_ABBREV_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_method_abbrev(uint32_t subchannel, uint32_t graphics_class, uint32_t method, const char *name, unsigned int count) {
+ (void)subchannel;
+ (void)graphics_class;
+ (void)method;
+ (void)name;
+ (void)count;
+}
+#define TRACE_NV2A_PGRAPH_METHOD_UNHANDLED 0
+#define TRACE_NV2A_PGRAPH_METHOD_UNHANDLED_ENABLED 0
+#define TRACE_NV2A_PGRAPH_METHOD_UNHANDLED_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_method_unhandled(uint32_t subchannel, uint32_t graphics_class, uint32_t method, uint32_t parameter) {
+ (void)subchannel;
+ (void)graphics_class;
+ (void)method;
+ (void)parameter;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH 0
+#define TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_compare_mismatch(const char *field, long int a, long int b) {
+ (void)field;
+ (void)a;
+ (void)b;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_CPU_READ 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CPU_READ_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CPU_READ_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_cpu_read(uint32_t addr, uint32_t offset) {
+ (void)addr;
+ (void)offset;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_cpu_write(uint32_t addr, uint32_t offset) {
+ (void)addr;
+ (void)offset;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_create_color(uint32_t addr, uint32_t width, uint32_t height, const char *layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch) {
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)layout;
+ (void)anti_aliasing;
+ (void)clip_x;
+ (void)clip_width;
+ (void)clip_y;
+ (void)clip_height;
+ (void)pitch;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_create_zeta(uint32_t addr, uint32_t width, uint32_t height, const char *layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch) {
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)layout;
+ (void)anti_aliasing;
+ (void)clip_x;
+ (void)clip_width;
+ (void)clip_y;
+ (void)clip_height;
+ (void)pitch;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD 0
+#define TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_download(const char *binding, const char *layout, uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bytes_per_pixel) {
+ (void)binding;
+ (void)layout;
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)pitch;
+ (void)bytes_per_pixel;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING 0
+#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_evict_overlapping(uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch) {
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)pitch;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON 0
+#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_evict_reason(const char *reason, uint32_t addr) {
+ (void)reason;
+ (void)addr;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR 0
+#define TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_hit_color(uint32_t addr, uint32_t width, uint32_t height, const char *layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch) {
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)layout;
+ (void)anti_aliasing;
+ (void)clip_x;
+ (void)clip_width;
+ (void)clip_y;
+ (void)clip_height;
+ (void)pitch;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA 0
+#define TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_hit_zeta(uint32_t addr, uint32_t width, uint32_t height, const char *layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch) {
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)layout;
+ (void)anti_aliasing;
+ (void)clip_x;
+ (void)clip_width;
+ (void)clip_y;
+ (void)clip_height;
+ (void)pitch;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_invalidated(uint32_t addr) {
+ (void)addr;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR 0
+#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_match_color(uint32_t addr, uint32_t width, uint32_t height, const char *layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch) {
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)layout;
+ (void)anti_aliasing;
+ (void)clip_x;
+ (void)clip_width;
+ (void)clip_y;
+ (void)clip_height;
+ (void)pitch;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA 0
+#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_match_zeta(uint32_t addr, uint32_t width, uint32_t height, const char *layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch) {
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)layout;
+ (void)anti_aliasing;
+ (void)clip_x;
+ (void)clip_width;
+ (void)clip_y;
+ (void)clip_height;
+ (void)pitch;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE 0
+#define TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_migrate_type(const char *new_type) {
+ (void)new_type;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE 0
+#define TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_render_to_texture(uint32_t addr, uint32_t width, uint32_t height) {
+ (void)addr;
+ (void)width;
+ (void)height;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_TARGET 0
+#define TRACE_NV2A_PGRAPH_SURFACE_TARGET_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_TARGET_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_target(const char *binding, uint32_t addr, const char *layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height) {
+ (void)binding;
+ (void)addr;
+ (void)layout;
+ (void)anti_aliasing;
+ (void)clip_x;
+ (void)clip_width;
+ (void)clip_y;
+ (void)clip_height;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_texture_compat_failed(int32_t surface_fmt, int32_t texture_fmt) {
+ (void)surface_fmt;
+ (void)texture_fmt;
+}
+#define TRACE_NV2A_PGRAPH_SURFACE_UPLOAD 0
+#define TRACE_NV2A_PGRAPH_SURFACE_UPLOAD_ENABLED 0
+#define TRACE_NV2A_PGRAPH_SURFACE_UPLOAD_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_pgraph_surface_upload(const char *binding, const char *layout, uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bytes_per_pixel) {
+ (void)binding;
+ (void)layout;
+ (void)addr;
+ (void)width;
+ (void)height;
+ (void)pitch;
+ (void)bytes_per_pixel;
+}
+#define TRACE_NV2A_REG_READ 0
+#define TRACE_NV2A_REG_READ_ENABLED 0
+#define TRACE_NV2A_REG_READ_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_reg_read(const char *block, uint32_t addr, unsigned int size, uint64_t val) {
+ (void)block;
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_NV2A_REG_WRITE 0
+#define TRACE_NV2A_REG_WRITE_ENABLED 0
+#define TRACE_NV2A_REG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_nv2a_reg_write(const char *block, uint32_t addr, unsigned int size, uint64_t val) {
+ (void)block;
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-hw_xen.h b/trace/trace-hw_xen.h
new file mode 100644
index 0000000000..a20b42488b
--- /dev/null
+++ b/trace/trace-hw_xen.h
@@ -0,0 +1,547 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_HW_XEN_H
+#define TRACE_TRACE_HW_XEN_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CPU_GET_IOREQ_FROM_SHARED_MEMORY_REQ_NOT_READY 0
+#define TRACE_CPU_GET_IOREQ_FROM_SHARED_MEMORY_REQ_NOT_READY_ENABLED 0
+#define TRACE_CPU_GET_IOREQ_FROM_SHARED_MEMORY_REQ_NOT_READY_BACKEND_DSTATE() (0)
+static inline void trace_cpu_get_ioreq_from_shared_memory_req_not_ready(int state, int data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) {
+ (void)state;
+ (void)data_is_ptr;
+ (void)addr;
+ (void)data;
+ (void)count;
+ (void)size;
+}
+#define TRACE_CPU_IOREQ_CONFIG_READ 0
+#define TRACE_CPU_IOREQ_CONFIG_READ_ENABLED 0
+#define TRACE_CPU_IOREQ_CONFIG_READ_BACKEND_DSTATE() (0)
+static inline void trace_cpu_ioreq_config_read(void *req, uint32_t sbdf, uint32_t reg, uint32_t size, uint32_t data) {
+ (void)req;
+ (void)sbdf;
+ (void)reg;
+ (void)size;
+ (void)data;
+}
+#define TRACE_CPU_IOREQ_CONFIG_WRITE 0
+#define TRACE_CPU_IOREQ_CONFIG_WRITE_ENABLED 0
+#define TRACE_CPU_IOREQ_CONFIG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_cpu_ioreq_config_write(void *req, uint32_t sbdf, uint32_t reg, uint32_t size, uint32_t data) {
+ (void)req;
+ (void)sbdf;
+ (void)reg;
+ (void)size;
+ (void)data;
+}
+#define TRACE_CPU_IOREQ_MOVE 0
+#define TRACE_CPU_IOREQ_MOVE_ENABLED 0
+#define TRACE_CPU_IOREQ_MOVE_BACKEND_DSTATE() (0)
+static inline void trace_cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) {
+ (void)req;
+ (void)dir;
+ (void)df;
+ (void)data_is_ptr;
+ (void)addr;
+ (void)data;
+ (void)count;
+ (void)size;
+}
+#define TRACE_CPU_IOREQ_PIO 0
+#define TRACE_CPU_IOREQ_PIO_ENABLED 0
+#define TRACE_CPU_IOREQ_PIO_BACKEND_DSTATE() (0)
+static inline void trace_cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) {
+ (void)req;
+ (void)dir;
+ (void)df;
+ (void)data_is_ptr;
+ (void)addr;
+ (void)data;
+ (void)count;
+ (void)size;
+}
+#define TRACE_CPU_IOREQ_PIO_READ_REG 0
+#define TRACE_CPU_IOREQ_PIO_READ_REG_ENABLED 0
+#define TRACE_CPU_IOREQ_PIO_READ_REG_BACKEND_DSTATE() (0)
+static inline void trace_cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) {
+ (void)req;
+ (void)data;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_CPU_IOREQ_PIO_WRITE_REG 0
+#define TRACE_CPU_IOREQ_PIO_WRITE_REG_ENABLED 0
+#define TRACE_CPU_IOREQ_PIO_WRITE_REG_BACKEND_DSTATE() (0)
+static inline void trace_cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) {
+ (void)req;
+ (void)data;
+ (void)addr;
+ (void)size;
+}
+#define TRACE_DESTROY_HVM_DOMAIN_ACTION 0
+#define TRACE_DESTROY_HVM_DOMAIN_ACTION_ENABLED 0
+#define TRACE_DESTROY_HVM_DOMAIN_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_destroy_hvm_domain_action(int xen_domid, const char *action) {
+ (void)xen_domid;
+ (void)action;
+}
+#define TRACE_DESTROY_HVM_DOMAIN_CANNOT_ACQUIRE_HANDLE 0
+#define TRACE_DESTROY_HVM_DOMAIN_CANNOT_ACQUIRE_HANDLE_ENABLED 0
+#define TRACE_DESTROY_HVM_DOMAIN_CANNOT_ACQUIRE_HANDLE_BACKEND_DSTATE() (0)
+static inline void trace_destroy_hvm_domain_cannot_acquire_handle(void) {
+}
+#define TRACE_DESTROY_HVM_DOMAIN_FAILED_ACTION 0
+#define TRACE_DESTROY_HVM_DOMAIN_FAILED_ACTION_ENABLED 0
+#define TRACE_DESTROY_HVM_DOMAIN_FAILED_ACTION_BACKEND_DSTATE() (0)
+static inline void trace_destroy_hvm_domain_failed_action(const char *action, int sts, char *errno_s) {
+ (void)action;
+ (void)sts;
+ (void)errno_s;
+}
+#define TRACE_HANDLE_IOREQ 0
+#define TRACE_HANDLE_IOREQ_ENABLED 0
+#define TRACE_HANDLE_IOREQ_BACKEND_DSTATE() (0)
+static inline void trace_handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) {
+ (void)req;
+ (void)type;
+ (void)dir;
+ (void)df;
+ (void)data_is_ptr;
+ (void)addr;
+ (void)data;
+ (void)count;
+ (void)size;
+}
+#define TRACE_HANDLE_IOREQ_READ 0
+#define TRACE_HANDLE_IOREQ_READ_ENABLED 0
+#define TRACE_HANDLE_IOREQ_READ_BACKEND_DSTATE() (0)
+static inline void trace_handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) {
+ (void)req;
+ (void)type;
+ (void)df;
+ (void)data_is_ptr;
+ (void)addr;
+ (void)data;
+ (void)count;
+ (void)size;
+}
+#define TRACE_HANDLE_IOREQ_WRITE 0
+#define TRACE_HANDLE_IOREQ_WRITE_ENABLED 0
+#define TRACE_HANDLE_IOREQ_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) {
+ (void)req;
+ (void)type;
+ (void)df;
+ (void)data_is_ptr;
+ (void)addr;
+ (void)data;
+ (void)count;
+ (void)size;
+}
+#define TRACE_XEN_BUS_ADD_WATCH 0
+#define TRACE_XEN_BUS_ADD_WATCH_ENABLED 0
+#define TRACE_XEN_BUS_ADD_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_add_watch(const char *node, const char *key) {
+ (void)node;
+ (void)key;
+}
+#define TRACE_XEN_BUS_BACKEND_CREATE 0
+#define TRACE_XEN_BUS_BACKEND_CREATE_ENABLED 0
+#define TRACE_XEN_BUS_BACKEND_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_backend_create(const char *type, const char *path) {
+ (void)type;
+ (void)path;
+}
+#define TRACE_XEN_BUS_CLEANUP 0
+#define TRACE_XEN_BUS_CLEANUP_ENABLED 0
+#define TRACE_XEN_BUS_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_cleanup(void) {
+}
+#define TRACE_XEN_BUS_DEVICE_CLEANUP 0
+#define TRACE_XEN_BUS_DEVICE_CLEANUP_ENABLED 0
+#define TRACE_XEN_BUS_DEVICE_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_device_cleanup(const char *type, char *name) {
+ (void)type;
+ (void)name;
+}
+#define TRACE_XEN_BUS_ENUMERATE 0
+#define TRACE_XEN_BUS_ENUMERATE_ENABLED 0
+#define TRACE_XEN_BUS_ENUMERATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_enumerate(void) {
+}
+#define TRACE_XEN_BUS_REALIZE 0
+#define TRACE_XEN_BUS_REALIZE_ENABLED 0
+#define TRACE_XEN_BUS_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_realize(void) {
+}
+#define TRACE_XEN_BUS_REMOVE_WATCH 0
+#define TRACE_XEN_BUS_REMOVE_WATCH_ENABLED 0
+#define TRACE_XEN_BUS_REMOVE_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_remove_watch(const char *node, const char *key) {
+ (void)node;
+ (void)key;
+}
+#define TRACE_XEN_BUS_TYPE_ENUMERATE 0
+#define TRACE_XEN_BUS_TYPE_ENUMERATE_ENABLED 0
+#define TRACE_XEN_BUS_TYPE_ENUMERATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_type_enumerate(const char *type) {
+ (void)type;
+}
+#define TRACE_XEN_BUS_UNREALIZE 0
+#define TRACE_XEN_BUS_UNREALIZE_ENABLED 0
+#define TRACE_XEN_BUS_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_bus_unrealize(void) {
+}
+#define TRACE_XEN_CLIENT_SET_MEMORY 0
+#define TRACE_XEN_CLIENT_SET_MEMORY_ENABLED 0
+#define TRACE_XEN_CLIENT_SET_MEMORY_BACKEND_DSTATE() (0)
+static inline void trace_xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) {
+ (void)start_addr;
+ (void)size;
+ (void)log_dirty;
+}
+#define TRACE_XEN_CREATE_VIRTIO_MMIO_DEVICES 0
+#define TRACE_XEN_CREATE_VIRTIO_MMIO_DEVICES_ENABLED 0
+#define TRACE_XEN_CREATE_VIRTIO_MMIO_DEVICES_BACKEND_DSTATE() (0)
+static inline void trace_xen_create_virtio_mmio_devices(int i, int irq, uint64_t base) {
+ (void)i;
+ (void)irq;
+ (void)base;
+}
+#define TRACE_XEN_DEFAULT_IOREQ_SERVER 0
+#define TRACE_XEN_DEFAULT_IOREQ_SERVER_ENABLED 0
+#define TRACE_XEN_DEFAULT_IOREQ_SERVER_BACKEND_DSTATE() (0)
+static inline void trace_xen_default_ioreq_server(void) {
+}
+#define TRACE_XEN_DEVICE_ADD_WATCH 0
+#define TRACE_XEN_DEVICE_ADD_WATCH_ENABLED 0
+#define TRACE_XEN_DEVICE_ADD_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_add_watch(const char *type, char *name, const char *node, const char *key) {
+ (void)type;
+ (void)name;
+ (void)node;
+ (void)key;
+}
+#define TRACE_XEN_DEVICE_BACKEND_CHANGED 0
+#define TRACE_XEN_DEVICE_BACKEND_CHANGED_ENABLED 0
+#define TRACE_XEN_DEVICE_BACKEND_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_backend_changed(const char *type, char *name) {
+ (void)type;
+ (void)name;
+}
+#define TRACE_XEN_DEVICE_BACKEND_ONLINE 0
+#define TRACE_XEN_DEVICE_BACKEND_ONLINE_ENABLED 0
+#define TRACE_XEN_DEVICE_BACKEND_ONLINE_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_backend_online(const char *type, char *name, bool online) {
+ (void)type;
+ (void)name;
+ (void)online;
+}
+#define TRACE_XEN_DEVICE_BACKEND_STATE 0
+#define TRACE_XEN_DEVICE_BACKEND_STATE_ENABLED 0
+#define TRACE_XEN_DEVICE_BACKEND_STATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_backend_state(const char *type, char *name, const char *state) {
+ (void)type;
+ (void)name;
+ (void)state;
+}
+#define TRACE_XEN_DEVICE_FRONTEND_CHANGED 0
+#define TRACE_XEN_DEVICE_FRONTEND_CHANGED_ENABLED 0
+#define TRACE_XEN_DEVICE_FRONTEND_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_frontend_changed(const char *type, char *name) {
+ (void)type;
+ (void)name;
+}
+#define TRACE_XEN_DEVICE_FRONTEND_STATE 0
+#define TRACE_XEN_DEVICE_FRONTEND_STATE_ENABLED 0
+#define TRACE_XEN_DEVICE_FRONTEND_STATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_frontend_state(const char *type, char *name, const char *state) {
+ (void)type;
+ (void)name;
+ (void)state;
+}
+#define TRACE_XEN_DEVICE_REALIZE 0
+#define TRACE_XEN_DEVICE_REALIZE_ENABLED 0
+#define TRACE_XEN_DEVICE_REALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_realize(const char *type, char *name) {
+ (void)type;
+ (void)name;
+}
+#define TRACE_XEN_DEVICE_REMOVE_WATCH 0
+#define TRACE_XEN_DEVICE_REMOVE_WATCH_ENABLED 0
+#define TRACE_XEN_DEVICE_REMOVE_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_remove_watch(const char *type, char *name, const char *node, const char *key) {
+ (void)type;
+ (void)name;
+ (void)node;
+ (void)key;
+}
+#define TRACE_XEN_DEVICE_UNPLUG 0
+#define TRACE_XEN_DEVICE_UNPLUG_ENABLED 0
+#define TRACE_XEN_DEVICE_UNPLUG_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_unplug(const char *type, char *name) {
+ (void)type;
+ (void)name;
+}
+#define TRACE_XEN_DEVICE_UNREALIZE 0
+#define TRACE_XEN_DEVICE_UNREALIZE_ENABLED 0
+#define TRACE_XEN_DEVICE_UNREALIZE_BACKEND_DSTATE() (0)
+static inline void trace_xen_device_unrealize(const char *type, char *name) {
+ (void)type;
+ (void)name;
+}
+#define TRACE_XEN_DOMID_RESTRICT 0
+#define TRACE_XEN_DOMID_RESTRICT_ENABLED 0
+#define TRACE_XEN_DOMID_RESTRICT_BACKEND_DSTATE() (0)
+static inline void trace_xen_domid_restrict(int err) {
+ (void)err;
+}
+#define TRACE_XEN_ENABLE_TPM 0
+#define TRACE_XEN_ENABLE_TPM_ENABLED 0
+#define TRACE_XEN_ENABLE_TPM_BACKEND_DSTATE() (0)
+static inline void trace_xen_enable_tpm(uint64_t addr) {
+ (void)addr;
+}
+#define TRACE_XEN_INVALIDATE_MAP_CACHE 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENABLED 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_BACKEND_DSTATE() (0)
+static inline void trace_xen_invalidate_map_cache(uint64_t paddr_index, void *vaddr_req) {
+ (void)paddr_index;
+ (void)vaddr_req;
+}
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_FOUND 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_FOUND_ENABLED 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_xen_invalidate_map_cache_entry_unlocked_found(uint64_t addr, void *p) {
+ (void)addr;
+ (void)p;
+}
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_MISS 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_MISS_ENABLED 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_MISS_BACKEND_DSTATE() (0)
+static inline void trace_xen_invalidate_map_cache_entry_unlocked_miss(void *buffer) {
+ (void)buffer;
+}
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_NOT_FOUND 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_NOT_FOUND_ENABLED 0
+#define TRACE_XEN_INVALIDATE_MAP_CACHE_ENTRY_UNLOCKED_NOT_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_xen_invalidate_map_cache_entry_unlocked_not_found(void *p) {
+ (void)p;
+}
+#define TRACE_XEN_IOREQ_SERVER_CREATE 0
+#define TRACE_XEN_IOREQ_SERVER_CREATE_ENABLED 0
+#define TRACE_XEN_IOREQ_SERVER_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_ioreq_server_create(uint32_t id) {
+ (void)id;
+}
+#define TRACE_XEN_IOREQ_SERVER_DESTROY 0
+#define TRACE_XEN_IOREQ_SERVER_DESTROY_ENABLED 0
+#define TRACE_XEN_IOREQ_SERVER_DESTROY_BACKEND_DSTATE() (0)
+static inline void trace_xen_ioreq_server_destroy(uint32_t id) {
+ (void)id;
+}
+#define TRACE_XEN_IOREQ_SERVER_STATE 0
+#define TRACE_XEN_IOREQ_SERVER_STATE_ENABLED 0
+#define TRACE_XEN_IOREQ_SERVER_STATE_BACKEND_DSTATE() (0)
+static inline void trace_xen_ioreq_server_state(uint32_t id, bool enable) {
+ (void)id;
+ (void)enable;
+}
+#define TRACE_XEN_MAIN_LOOP_PREPARE_INIT_CPU 0
+#define TRACE_XEN_MAIN_LOOP_PREPARE_INIT_CPU_ENABLED 0
+#define TRACE_XEN_MAIN_LOOP_PREPARE_INIT_CPU_BACKEND_DSTATE() (0)
+static inline void trace_xen_main_loop_prepare_init_cpu(int id, void *cpu) {
+ (void)id;
+ (void)cpu;
+}
+#define TRACE_XEN_MAP_CACHE 0
+#define TRACE_XEN_MAP_CACHE_ENABLED 0
+#define TRACE_XEN_MAP_CACHE_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_cache(uint64_t phys_addr) {
+ (void)phys_addr;
+}
+#define TRACE_XEN_MAP_CACHE_INIT 0
+#define TRACE_XEN_MAP_CACHE_INIT_ENABLED 0
+#define TRACE_XEN_MAP_CACHE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_cache_init(uint64_t nr_buckets, uint64_t size) {
+ (void)nr_buckets;
+ (void)size;
+}
+#define TRACE_XEN_MAP_CACHE_RETURN 0
+#define TRACE_XEN_MAP_CACHE_RETURN_ENABLED 0
+#define TRACE_XEN_MAP_CACHE_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_cache_return(void* ptr) {
+ (void)ptr;
+}
+#define TRACE_XEN_MAP_IOREQ_SERVER_BUFFERED_IO_EVTCHN 0
+#define TRACE_XEN_MAP_IOREQ_SERVER_BUFFERED_IO_EVTCHN_ENABLED 0
+#define TRACE_XEN_MAP_IOREQ_SERVER_BUFFERED_IO_EVTCHN_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_ioreq_server_buffered_io_evtchn(int bufioreq_evtchn) {
+ (void)bufioreq_evtchn;
+}
+#define TRACE_XEN_MAP_IOREQ_SERVER_BUFFERED_IO_PAGE 0
+#define TRACE_XEN_MAP_IOREQ_SERVER_BUFFERED_IO_PAGE_ENABLED 0
+#define TRACE_XEN_MAP_IOREQ_SERVER_BUFFERED_IO_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_ioreq_server_buffered_io_page(long unsigned int ioreq_pfn) {
+ (void)ioreq_pfn;
+}
+#define TRACE_XEN_MAP_IOREQ_SERVER_SHARED_PAGE 0
+#define TRACE_XEN_MAP_IOREQ_SERVER_SHARED_PAGE_ENABLED 0
+#define TRACE_XEN_MAP_IOREQ_SERVER_SHARED_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_ioreq_server_shared_page(long unsigned int ioreq_pfn) {
+ (void)ioreq_pfn;
+}
+#define TRACE_XEN_MAP_MMIO_RANGE 0
+#define TRACE_XEN_MAP_MMIO_RANGE_ENABLED 0
+#define TRACE_XEN_MAP_MMIO_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) {
+ (void)id;
+ (void)start_addr;
+ (void)end_addr;
+}
+#define TRACE_XEN_MAP_PCIDEV 0
+#define TRACE_XEN_MAP_PCIDEV_ENABLED 0
+#define TRACE_XEN_MAP_PCIDEV_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) {
+ (void)id;
+ (void)bus;
+ (void)dev;
+ (void)func;
+}
+#define TRACE_XEN_MAP_PORTIO_RANGE 0
+#define TRACE_XEN_MAP_PORTIO_RANGE_ENABLED 0
+#define TRACE_XEN_MAP_PORTIO_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) {
+ (void)id;
+ (void)start_addr;
+ (void)end_addr;
+}
+#define TRACE_XEN_MAP_RESOURCE_IOREQ 0
+#define TRACE_XEN_MAP_RESOURCE_IOREQ_ENABLED 0
+#define TRACE_XEN_MAP_RESOURCE_IOREQ_BACKEND_DSTATE() (0)
+static inline void trace_xen_map_resource_ioreq(uint32_t id, void *addr) {
+ (void)id;
+ (void)addr;
+}
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_FOUND 0
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_FOUND_ENABLED 0
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_xen_ram_addr_from_mapcache_found(uint64_t addr, void *p) {
+ (void)addr;
+ (void)p;
+}
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_NOT_FOUND 0
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_NOT_FOUND_ENABLED 0
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_NOT_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_xen_ram_addr_from_mapcache_not_found(void *p) {
+ (void)p;
+}
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_NOT_IN_CACHE 0
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_NOT_IN_CACHE_ENABLED 0
+#define TRACE_XEN_RAM_ADDR_FROM_MAPCACHE_NOT_IN_CACHE_BACKEND_DSTATE() (0)
+static inline void trace_xen_ram_addr_from_mapcache_not_in_cache(void *p) {
+ (void)p;
+}
+#define TRACE_XEN_RAM_ALLOC 0
+#define TRACE_XEN_RAM_ALLOC_ENABLED 0
+#define TRACE_XEN_RAM_ALLOC_BACKEND_DSTATE() (0)
+static inline void trace_xen_ram_alloc(unsigned long ram_addr, unsigned long size) {
+ (void)ram_addr;
+ (void)size;
+}
+#define TRACE_XEN_REMAP_BUCKET 0
+#define TRACE_XEN_REMAP_BUCKET_ENABLED 0
+#define TRACE_XEN_REMAP_BUCKET_BACKEND_DSTATE() (0)
+static inline void trace_xen_remap_bucket(uint64_t index) {
+ (void)index;
+}
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_DUMMY 0
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_DUMMY_ENABLED 0
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_DUMMY_BACKEND_DSTATE() (0)
+static inline void trace_xen_replace_cache_entry_dummy(uint64_t old_phys_addr, uint64_t new_phys_addr) {
+ (void)old_phys_addr;
+ (void)new_phys_addr;
+}
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_UNLOCKED 0
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_UNLOCKED_ENABLED 0
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_UNLOCKED_BACKEND_DSTATE() (0)
+static inline void trace_xen_replace_cache_entry_unlocked(uint64_t old_phys_addr) {
+ (void)old_phys_addr;
+}
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_UNLOCKED_COULD_NOT_UPDATE_ENTRY 0
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_UNLOCKED_COULD_NOT_UPDATE_ENTRY_ENABLED 0
+#define TRACE_XEN_REPLACE_CACHE_ENTRY_UNLOCKED_COULD_NOT_UPDATE_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_xen_replace_cache_entry_unlocked_could_not_update_entry(uint64_t old_phys_addr) {
+ (void)old_phys_addr;
+}
+#define TRACE_XEN_UNMAP_MMIO_RANGE 0
+#define TRACE_XEN_UNMAP_MMIO_RANGE_ENABLED 0
+#define TRACE_XEN_UNMAP_MMIO_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) {
+ (void)id;
+ (void)start_addr;
+ (void)end_addr;
+}
+#define TRACE_XEN_UNMAP_PCIDEV 0
+#define TRACE_XEN_UNMAP_PCIDEV_ENABLED 0
+#define TRACE_XEN_UNMAP_PCIDEV_BACKEND_DSTATE() (0)
+static inline void trace_xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) {
+ (void)id;
+ (void)bus;
+ (void)dev;
+ (void)func;
+}
+#define TRACE_XEN_UNMAP_PORTIO_RANGE 0
+#define TRACE_XEN_UNMAP_PORTIO_RANGE_ENABLED 0
+#define TRACE_XEN_UNMAP_PORTIO_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) {
+ (void)id;
+ (void)start_addr;
+ (void)end_addr;
+}
+#define TRACE_XS_NODE_CREATE 0
+#define TRACE_XS_NODE_CREATE_ENABLED 0
+#define TRACE_XS_NODE_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_xs_node_create(const char *node) {
+ (void)node;
+}
+#define TRACE_XS_NODE_DESTROY 0
+#define TRACE_XS_NODE_DESTROY_ENABLED 0
+#define TRACE_XS_NODE_DESTROY_BACKEND_DSTATE() (0)
+static inline void trace_xs_node_destroy(const char *node) {
+ (void)node;
+}
+#define TRACE_XS_NODE_READ 0
+#define TRACE_XS_NODE_READ_ENABLED 0
+#define TRACE_XS_NODE_READ_BACKEND_DSTATE() (0)
+static inline void trace_xs_node_read(const char *path, const char *value) {
+ (void)path;
+ (void)value;
+}
+#define TRACE_XS_NODE_UNWATCH 0
+#define TRACE_XS_NODE_UNWATCH_ENABLED 0
+#define TRACE_XS_NODE_UNWATCH_BACKEND_DSTATE() (0)
+static inline void trace_xs_node_unwatch(char *path) {
+ (void)path;
+}
+#define TRACE_XS_NODE_VPRINTF 0
+#define TRACE_XS_NODE_VPRINTF_ENABLED 0
+#define TRACE_XS_NODE_VPRINTF_BACKEND_DSTATE() (0)
+static inline void trace_xs_node_vprintf(char *path, char *value) {
+ (void)path;
+ (void)value;
+}
+#define TRACE_XS_NODE_WATCH 0
+#define TRACE_XS_NODE_WATCH_ENABLED 0
+#define TRACE_XS_NODE_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_xs_node_watch(char *path) {
+ (void)path;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-io.h b/trace/trace-io.h
new file mode 100644
index 0000000000..410cdd872a
--- /dev/null
+++ b/trace/trace-io.h
@@ -0,0 +1,463 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_IO_H
+#define TRACE_TRACE_IO_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_QIO_CHANNEL_COMMAND_ABORT 0
+#define TRACE_QIO_CHANNEL_COMMAND_ABORT_ENABLED 0
+#define TRACE_QIO_CHANNEL_COMMAND_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_command_abort(void *ioc, int pid) {
+ (void)ioc;
+ (void)pid;
+}
+#define TRACE_QIO_CHANNEL_COMMAND_NEW_PID 0
+#define TRACE_QIO_CHANNEL_COMMAND_NEW_PID_ENABLED 0
+#define TRACE_QIO_CHANNEL_COMMAND_NEW_PID_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_command_new_pid(void *ioc, int writefd, int readfd, int pid) {
+ (void)ioc;
+ (void)writefd;
+ (void)readfd;
+ (void)pid;
+}
+#define TRACE_QIO_CHANNEL_COMMAND_NEW_SPAWN 0
+#define TRACE_QIO_CHANNEL_COMMAND_NEW_SPAWN_ENABLED 0
+#define TRACE_QIO_CHANNEL_COMMAND_NEW_SPAWN_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_command_new_spawn(void *ioc, const char *binary, int flags) {
+ (void)ioc;
+ (void)binary;
+ (void)flags;
+}
+#define TRACE_QIO_CHANNEL_COMMAND_WAIT 0
+#define TRACE_QIO_CHANNEL_COMMAND_WAIT_ENABLED 0
+#define TRACE_QIO_CHANNEL_COMMAND_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_command_wait(void *ioc, int pid, int ret, int status) {
+ (void)ioc;
+ (void)pid;
+ (void)ret;
+ (void)status;
+}
+#define TRACE_QIO_CHANNEL_FILE_NEW_FD 0
+#define TRACE_QIO_CHANNEL_FILE_NEW_FD_ENABLED 0
+#define TRACE_QIO_CHANNEL_FILE_NEW_FD_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_file_new_fd(void *ioc, int fd) {
+ (void)ioc;
+ (void)fd;
+}
+#define TRACE_QIO_CHANNEL_FILE_NEW_PATH 0
+#define TRACE_QIO_CHANNEL_FILE_NEW_PATH_ENABLED 0
+#define TRACE_QIO_CHANNEL_FILE_NEW_PATH_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_file_new_path(void *ioc, const char *path, int flags, int mode, int fd) {
+ (void)ioc;
+ (void)path;
+ (void)flags;
+ (void)mode;
+ (void)fd;
+}
+#define TRACE_QIO_CHANNEL_NULL_NEW 0
+#define TRACE_QIO_CHANNEL_NULL_NEW_ENABLED 0
+#define TRACE_QIO_CHANNEL_NULL_NEW_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_null_new(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT 0
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_accept(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_COMPLETE 0
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_COMPLETE_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_accept_complete(void *ioc, void *cioc, int fd) {
+ (void)ioc;
+ (void)cioc;
+ (void)fd;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_FAIL 0
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_FAIL_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_ACCEPT_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_accept_fail(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_ASYNC 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_ASYNC_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_connect_async(void *ioc, void *addr) {
+ (void)ioc;
+ (void)addr;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_COMPLETE 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_COMPLETE_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_connect_complete(void *ioc, int fd) {
+ (void)ioc;
+ (void)fd;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_FAIL 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_FAIL_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_connect_fail(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_SYNC 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_SYNC_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_CONNECT_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_connect_sync(void *ioc, void *addr) {
+ (void)ioc;
+ (void)addr;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_ASYNC 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_ASYNC_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_dgram_async(void *ioc, void *localAddr, void *remoteAddr) {
+ (void)ioc;
+ (void)localAddr;
+ (void)remoteAddr;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_COMPLETE 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_COMPLETE_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_dgram_complete(void *ioc, int fd) {
+ (void)ioc;
+ (void)fd;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_FAIL 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_FAIL_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_dgram_fail(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_SYNC 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_SYNC_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_DGRAM_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_dgram_sync(void *ioc, void *localAddr, void *remoteAddr) {
+ (void)ioc;
+ (void)localAddr;
+ (void)remoteAddr;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_ASYNC 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_ASYNC_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_listen_async(void *ioc, void *addr, int num) {
+ (void)ioc;
+ (void)addr;
+ (void)num;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_COMPLETE 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_COMPLETE_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_listen_complete(void *ioc, int fd) {
+ (void)ioc;
+ (void)fd;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_FAIL 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_FAIL_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_listen_fail(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_SYNC 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_SYNC_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_LISTEN_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_listen_sync(void *ioc, void *addr, int num) {
+ (void)ioc;
+ (void)addr;
+ (void)num;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_NEW 0
+#define TRACE_QIO_CHANNEL_SOCKET_NEW_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_NEW_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_new(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_SOCKET_NEW_FD 0
+#define TRACE_QIO_CHANNEL_SOCKET_NEW_FD_ENABLED 0
+#define TRACE_QIO_CHANNEL_SOCKET_NEW_FD_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_socket_new_fd(void *ioc, int fd) {
+ (void)ioc;
+ (void)fd;
+}
+#define TRACE_QIO_CHANNEL_TLS_BYE_CANCEL 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_CANCEL_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_bye_cancel(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_BYE_COMPLETE 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_COMPLETE_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_bye_complete(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_BYE_FAIL 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_FAIL_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_bye_fail(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_BYE_PENDING 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_PENDING_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_bye_pending(void *ioc, int status) {
+ (void)ioc;
+ (void)status;
+}
+#define TRACE_QIO_CHANNEL_TLS_BYE_START 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_START_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_BYE_START_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_bye_start(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_CREDENTIALS_ALLOW 0
+#define TRACE_QIO_CHANNEL_TLS_CREDENTIALS_ALLOW_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_CREDENTIALS_ALLOW_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_credentials_allow(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_CREDENTIALS_DENY 0
+#define TRACE_QIO_CHANNEL_TLS_CREDENTIALS_DENY_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_CREDENTIALS_DENY_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_credentials_deny(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_CANCEL 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_CANCEL_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_handshake_cancel(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_COMPLETE 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_COMPLETE_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_handshake_complete(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_FAIL 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_FAIL_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_handshake_fail(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_PENDING 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_PENDING_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_handshake_pending(void *ioc, int status) {
+ (void)ioc;
+ (void)status;
+}
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_START 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_START_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_HANDSHAKE_START_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_handshake_start(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_TLS_NEW_CLIENT 0
+#define TRACE_QIO_CHANNEL_TLS_NEW_CLIENT_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_NEW_CLIENT_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_new_client(void *ioc, void *master, void *creds, const char *hostname) {
+ (void)ioc;
+ (void)master;
+ (void)creds;
+ (void)hostname;
+}
+#define TRACE_QIO_CHANNEL_TLS_NEW_SERVER 0
+#define TRACE_QIO_CHANNEL_TLS_NEW_SERVER_ENABLED 0
+#define TRACE_QIO_CHANNEL_TLS_NEW_SERVER_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_tls_new_server(void *ioc, void *master, void *creds, const char *aclname) {
+ (void)ioc;
+ (void)master;
+ (void)creds;
+ (void)aclname;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_CLOSE 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_CLOSE_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_close(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_ENCODE 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_ENCODE_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_ENCODE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_encode(void *ioc, uint8_t opcode, size_t payloadlen, size_t headerlen) {
+ (void)ioc;
+ (void)opcode;
+ (void)payloadlen;
+ (void)headerlen;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_COMPLETE 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_COMPLETE_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_handshake_complete(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_FAIL 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_FAIL_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_handshake_fail(void *ioc, const char *msg) {
+ (void)ioc;
+ (void)msg;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_PENDING 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_PENDING_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_handshake_pending(void *ioc, int status) {
+ (void)ioc;
+ (void)status;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_REPLY 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_REPLY_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_handshake_reply(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_START 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_START_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HANDSHAKE_START_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_handshake_start(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HEADER_FULL_DECODE 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HEADER_FULL_DECODE_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HEADER_FULL_DECODE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_header_full_decode(void *ioc, size_t headerlen, size_t payloadlen, uint32_t mask) {
+ (void)ioc;
+ (void)headerlen;
+ (void)payloadlen;
+ (void)mask;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HEADER_PARTIAL_DECODE 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HEADER_PARTIAL_DECODE_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HEADER_PARTIAL_DECODE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_header_partial_decode(void *ioc, size_t payloadlen, unsigned char fin, unsigned char opcode, unsigned char has_mask) {
+ (void)ioc;
+ (void)payloadlen;
+ (void)fin;
+ (void)opcode;
+ (void)has_mask;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HTTP_GREETING 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HTTP_GREETING_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HTTP_GREETING_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_http_greeting(void *ioc, const char *greeting) {
+ (void)ioc;
+ (void)greeting;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_HTTP_REQUEST 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HTTP_REQUEST_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_HTTP_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_http_request(void *ioc, const char *protocols, const char *version, const char *host, const char *connection, const char *upgrade, const char *key) {
+ (void)ioc;
+ (void)protocols;
+ (void)version;
+ (void)host;
+ (void)connection;
+ (void)upgrade;
+ (void)key;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_NEW_SERVER 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_NEW_SERVER_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_NEW_SERVER_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_new_server(void *ioc, void *master) {
+ (void)ioc;
+ (void)master;
+}
+#define TRACE_QIO_CHANNEL_WEBSOCK_PAYLOAD_DECODE 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_PAYLOAD_DECODE_ENABLED 0
+#define TRACE_QIO_CHANNEL_WEBSOCK_PAYLOAD_DECODE_BACKEND_DSTATE() (0)
+static inline void trace_qio_channel_websock_payload_decode(void *ioc, uint8_t opcode, size_t payload_remain) {
+ (void)ioc;
+ (void)opcode;
+ (void)payload_remain;
+}
+#define TRACE_QIO_NET_LISTENER_CALLBACK 0
+#define TRACE_QIO_NET_LISTENER_CALLBACK_ENABLED 0
+#define TRACE_QIO_NET_LISTENER_CALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_qio_net_listener_callback(void *listener, void *func, void *gctx, void *actx) {
+ (void)listener;
+ (void)func;
+ (void)gctx;
+ (void)actx;
+}
+#define TRACE_QIO_NET_LISTENER_UNWATCH 0
+#define TRACE_QIO_NET_LISTENER_UNWATCH_ENABLED 0
+#define TRACE_QIO_NET_LISTENER_UNWATCH_BACKEND_DSTATE() (0)
+static inline void trace_qio_net_listener_unwatch(void *listener, void *func, void *gctx, void *actx, const char *extra) {
+ (void)listener;
+ (void)func;
+ (void)gctx;
+ (void)actx;
+ (void)extra;
+}
+#define TRACE_QIO_NET_LISTENER_WATCH 0
+#define TRACE_QIO_NET_LISTENER_WATCH_ENABLED 0
+#define TRACE_QIO_NET_LISTENER_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_qio_net_listener_watch(void *listener, void *func, void *gctx, void *actx, const char *extra) {
+ (void)listener;
+ (void)func;
+ (void)gctx;
+ (void)actx;
+ (void)extra;
+}
+#define TRACE_QIO_TASK_COMPLETE 0
+#define TRACE_QIO_TASK_COMPLETE_ENABLED 0
+#define TRACE_QIO_TASK_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_complete(void *task) {
+ (void)task;
+}
+#define TRACE_QIO_TASK_NEW 0
+#define TRACE_QIO_TASK_NEW_ENABLED 0
+#define TRACE_QIO_TASK_NEW_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_new(void *task, void *source, void *func, void *opaque) {
+ (void)task;
+ (void)source;
+ (void)func;
+ (void)opaque;
+}
+#define TRACE_QIO_TASK_THREAD_EXIT 0
+#define TRACE_QIO_TASK_THREAD_EXIT_ENABLED 0
+#define TRACE_QIO_TASK_THREAD_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_thread_exit(void *task) {
+ (void)task;
+}
+#define TRACE_QIO_TASK_THREAD_RESULT 0
+#define TRACE_QIO_TASK_THREAD_RESULT_ENABLED 0
+#define TRACE_QIO_TASK_THREAD_RESULT_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_thread_result(void *task) {
+ (void)task;
+}
+#define TRACE_QIO_TASK_THREAD_RUN 0
+#define TRACE_QIO_TASK_THREAD_RUN_ENABLED 0
+#define TRACE_QIO_TASK_THREAD_RUN_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_thread_run(void *task) {
+ (void)task;
+}
+#define TRACE_QIO_TASK_THREAD_SOURCE_ATTACH 0
+#define TRACE_QIO_TASK_THREAD_SOURCE_ATTACH_ENABLED 0
+#define TRACE_QIO_TASK_THREAD_SOURCE_ATTACH_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_thread_source_attach(void *task, void *source) {
+ (void)task;
+ (void)source;
+}
+#define TRACE_QIO_TASK_THREAD_SOURCE_CANCEL 0
+#define TRACE_QIO_TASK_THREAD_SOURCE_CANCEL_ENABLED 0
+#define TRACE_QIO_TASK_THREAD_SOURCE_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_thread_source_cancel(void *task, void *source) {
+ (void)task;
+ (void)source;
+}
+#define TRACE_QIO_TASK_THREAD_START 0
+#define TRACE_QIO_TASK_THREAD_START_ENABLED 0
+#define TRACE_QIO_TASK_THREAD_START_BACKEND_DSTATE() (0)
+static inline void trace_qio_task_thread_start(void *task, void *worker, void *opaque) {
+ (void)task;
+ (void)worker;
+ (void)opaque;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-linux_user.h b/trace/trace-linux_user.h
new file mode 100644
index 0000000000..368fdb3ade
--- /dev/null
+++ b/trace/trace-linux_user.h
@@ -0,0 +1,131 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_LINUX_USER_H
+#define TRACE_TRACE_LINUX_USER_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_SIGNAL_DO_SIGACTION_GUEST 0
+#define TRACE_SIGNAL_DO_SIGACTION_GUEST_ENABLED 0
+#define TRACE_SIGNAL_DO_SIGACTION_GUEST_BACKEND_DSTATE() (0)
+static inline void trace_signal_do_sigaction_guest(int sig, int max) {
+ (void)sig;
+ (void)max;
+}
+#define TRACE_SIGNAL_DO_SIGACTION_HOST 0
+#define TRACE_SIGNAL_DO_SIGACTION_HOST_ENABLED 0
+#define TRACE_SIGNAL_DO_SIGACTION_HOST_BACKEND_DSTATE() (0)
+static inline void trace_signal_do_sigaction_host(int sig, int max) {
+ (void)sig;
+ (void)max;
+}
+#define TRACE_SIGNAL_TABLE_INIT 0
+#define TRACE_SIGNAL_TABLE_INIT_ENABLED 0
+#define TRACE_SIGNAL_TABLE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_signal_table_init(int i) {
+ (void)i;
+}
+#define TRACE_TARGET_MMAP 0
+#define TRACE_TARGET_MMAP_ENABLED 0
+#define TRACE_TARGET_MMAP_BACKEND_DSTATE() (0)
+static inline void trace_target_mmap(uint64_t start, uint64_t len, int pflags, int mflags, int fd, uint64_t offset) {
+ (void)start;
+ (void)len;
+ (void)pflags;
+ (void)mflags;
+ (void)fd;
+ (void)offset;
+}
+#define TRACE_TARGET_MMAP_COMPLETE 0
+#define TRACE_TARGET_MMAP_COMPLETE_ENABLED 0
+#define TRACE_TARGET_MMAP_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_target_mmap_complete(uint64_t retaddr) {
+ (void)retaddr;
+}
+#define TRACE_TARGET_MPROTECT 0
+#define TRACE_TARGET_MPROTECT_ENABLED 0
+#define TRACE_TARGET_MPROTECT_BACKEND_DSTATE() (0)
+static inline void trace_target_mprotect(uint64_t start, uint64_t len, int flags) {
+ (void)start;
+ (void)len;
+ (void)flags;
+}
+#define TRACE_TARGET_MUNMAP 0
+#define TRACE_TARGET_MUNMAP_ENABLED 0
+#define TRACE_TARGET_MUNMAP_BACKEND_DSTATE() (0)
+static inline void trace_target_munmap(uint64_t start, uint64_t len) {
+ (void)start;
+ (void)len;
+}
+#define TRACE_USER_DO_RT_SIGRETURN 0
+#define TRACE_USER_DO_RT_SIGRETURN_ENABLED 0
+#define TRACE_USER_DO_RT_SIGRETURN_BACKEND_DSTATE() (0)
+static inline void trace_user_do_rt_sigreturn(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+#define TRACE_USER_DO_SIGRETURN 0
+#define TRACE_USER_DO_SIGRETURN_ENABLED 0
+#define TRACE_USER_DO_SIGRETURN_BACKEND_DSTATE() (0)
+static inline void trace_user_do_sigreturn(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+#define TRACE_USER_DUMP_CORE_AND_ABORT 0
+#define TRACE_USER_DUMP_CORE_AND_ABORT_ENABLED 0
+#define TRACE_USER_DUMP_CORE_AND_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_user_dump_core_and_abort(void *env, int target_sig, int host_sig) {
+ (void)env;
+ (void)target_sig;
+ (void)host_sig;
+}
+#define TRACE_USER_HANDLE_SIGNAL 0
+#define TRACE_USER_HANDLE_SIGNAL_ENABLED 0
+#define TRACE_USER_HANDLE_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_user_handle_signal(void *env, int target_sig) {
+ (void)env;
+ (void)target_sig;
+}
+#define TRACE_USER_HOST_SIGNAL 0
+#define TRACE_USER_HOST_SIGNAL_ENABLED 0
+#define TRACE_USER_HOST_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_user_host_signal(void *env, int host_sig, int target_sig) {
+ (void)env;
+ (void)host_sig;
+ (void)target_sig;
+}
+#define TRACE_USER_QUEUE_SIGNAL 0
+#define TRACE_USER_QUEUE_SIGNAL_ENABLED 0
+#define TRACE_USER_QUEUE_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_user_queue_signal(void *env, int target_sig) {
+ (void)env;
+ (void)target_sig;
+}
+#define TRACE_USER_S390X_RESTORE_SIGREGS 0
+#define TRACE_USER_S390X_RESTORE_SIGREGS_ENABLED 0
+#define TRACE_USER_S390X_RESTORE_SIGREGS_BACKEND_DSTATE() (0)
+static inline void trace_user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) {
+ (void)env;
+ (void)sc_psw_addr;
+ (void)env_psw_addr;
+}
+#define TRACE_USER_SETUP_FRAME 0
+#define TRACE_USER_SETUP_FRAME_ENABLED 0
+#define TRACE_USER_SETUP_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_user_setup_frame(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+#define TRACE_USER_SETUP_RT_FRAME 0
+#define TRACE_USER_SETUP_RT_FRAME_ENABLED 0
+#define TRACE_USER_SETUP_RT_FRAME_BACKEND_DSTATE() (0)
+static inline void trace_user_setup_rt_frame(void *env, uint64_t frame_addr) {
+ (void)env;
+ (void)frame_addr;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-migration.h b/trace/trace-migration.h
new file mode 100644
index 0000000000..6230a9c9a9
--- /dev/null
+++ b/trace/trace-migration.h
@@ -0,0 +1,2243 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_MIGRATION_H
+#define TRACE_TRACE_MIGRATION_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CALC_PAGE_DIRTY_RATE 0
+#define TRACE_CALC_PAGE_DIRTY_RATE_ENABLED 0
+#define TRACE_CALC_PAGE_DIRTY_RATE_BACKEND_DSTATE() (0)
+static inline void trace_calc_page_dirty_rate(const char *idstr, uint32_t new_hash, uint32_t old_hash) {
+ (void)idstr;
+ (void)new_hash;
+ (void)old_hash;
+}
+#define TRACE_COLO_FAILOVER_SET_STATE 0
+#define TRACE_COLO_FAILOVER_SET_STATE_ENABLED 0
+#define TRACE_COLO_FAILOVER_SET_STATE_BACKEND_DSTATE() (0)
+static inline void trace_colo_failover_set_state(const char *new_state) {
+ (void)new_state;
+}
+#define TRACE_COLO_FLUSH_RAM_CACHE_BEGIN 0
+#define TRACE_COLO_FLUSH_RAM_CACHE_BEGIN_ENABLED 0
+#define TRACE_COLO_FLUSH_RAM_CACHE_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_colo_flush_ram_cache_begin(uint64_t dirty_pages) {
+ (void)dirty_pages;
+}
+#define TRACE_COLO_FLUSH_RAM_CACHE_END 0
+#define TRACE_COLO_FLUSH_RAM_CACHE_END_ENABLED 0
+#define TRACE_COLO_FLUSH_RAM_CACHE_END_BACKEND_DSTATE() (0)
+static inline void trace_colo_flush_ram_cache_end(void) {
+}
+#define TRACE_COLO_RECEIVE_MESSAGE 0
+#define TRACE_COLO_RECEIVE_MESSAGE_ENABLED 0
+#define TRACE_COLO_RECEIVE_MESSAGE_BACKEND_DSTATE() (0)
+static inline void trace_colo_receive_message(const char *msg) {
+ (void)msg;
+}
+#define TRACE_COLO_SEND_MESSAGE 0
+#define TRACE_COLO_SEND_MESSAGE_ENABLED 0
+#define TRACE_COLO_SEND_MESSAGE_BACKEND_DSTATE() (0)
+static inline void trace_colo_send_message(const char *msg) {
+ (void)msg;
+}
+#define TRACE_COLO_VM_STATE_CHANGE 0
+#define TRACE_COLO_VM_STATE_CHANGE_ENABLED 0
+#define TRACE_COLO_VM_STATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_colo_vm_state_change(const char *old, const char *new) {
+ (void)old;
+ (void)new;
+}
+#define TRACE_CPR_DELETE_FD 0
+#define TRACE_CPR_DELETE_FD_ENABLED 0
+#define TRACE_CPR_DELETE_FD_BACKEND_DSTATE() (0)
+static inline void trace_cpr_delete_fd(const char *name, int id) {
+ (void)name;
+ (void)id;
+}
+#define TRACE_CPR_EXEC 0
+#define TRACE_CPR_EXEC_ENABLED 0
+#define TRACE_CPR_EXEC_BACKEND_DSTATE() (0)
+static inline void trace_cpr_exec(void) {
+}
+#define TRACE_CPR_FIND_FD 0
+#define TRACE_CPR_FIND_FD_ENABLED 0
+#define TRACE_CPR_FIND_FD_BACKEND_DSTATE() (0)
+static inline void trace_cpr_find_fd(const char *name, int id, int fd) {
+ (void)name;
+ (void)id;
+ (void)fd;
+}
+#define TRACE_CPR_SAVE_FD 0
+#define TRACE_CPR_SAVE_FD_ENABLED 0
+#define TRACE_CPR_SAVE_FD_BACKEND_DSTATE() (0)
+static inline void trace_cpr_save_fd(const char *name, int id, int fd) {
+ (void)name;
+ (void)id;
+ (void)fd;
+}
+#define TRACE_CPR_STATE_LOAD 0
+#define TRACE_CPR_STATE_LOAD_ENABLED 0
+#define TRACE_CPR_STATE_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_cpr_state_load(const char *mode) {
+ (void)mode;
+}
+#define TRACE_CPR_STATE_SAVE 0
+#define TRACE_CPR_STATE_SAVE_ENABLED 0
+#define TRACE_CPR_STATE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_cpr_state_save(const char *mode) {
+ (void)mode;
+}
+#define TRACE_CPR_TRANSFER_INPUT 0
+#define TRACE_CPR_TRANSFER_INPUT_ENABLED 0
+#define TRACE_CPR_TRANSFER_INPUT_BACKEND_DSTATE() (0)
+static inline void trace_cpr_transfer_input(const char *path) {
+ (void)path;
+}
+#define TRACE_CPR_TRANSFER_OUTPUT 0
+#define TRACE_CPR_TRANSFER_OUTPUT_ENABLED 0
+#define TRACE_CPR_TRANSFER_OUTPUT_BACKEND_DSTATE() (0)
+static inline void trace_cpr_transfer_output(const char *path) {
+ (void)path;
+}
+#define TRACE_CPU_THROTTLE_DIRTY_SYNC 0
+#define TRACE_CPU_THROTTLE_DIRTY_SYNC_ENABLED 0
+#define TRACE_CPU_THROTTLE_DIRTY_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_cpu_throttle_dirty_sync(void) {
+}
+#define TRACE_CPU_THROTTLE_SET 0
+#define TRACE_CPU_THROTTLE_SET_ENABLED 0
+#define TRACE_CPU_THROTTLE_SET_BACKEND_DSTATE() (0)
+static inline void trace_cpu_throttle_set(int new_throttle_pct) {
+ (void)new_throttle_pct;
+}
+#define TRACE_DIRTY_BITMAP_LOAD_BITS_ENTER 0
+#define TRACE_DIRTY_BITMAP_LOAD_BITS_ENTER_ENABLED 0
+#define TRACE_DIRTY_BITMAP_LOAD_BITS_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_load_bits_enter(uint64_t first_sector, uint32_t nr_sectors) {
+ (void)first_sector;
+ (void)nr_sectors;
+}
+#define TRACE_DIRTY_BITMAP_LOAD_BITS_ZEROES 0
+#define TRACE_DIRTY_BITMAP_LOAD_BITS_ZEROES_ENABLED 0
+#define TRACE_DIRTY_BITMAP_LOAD_BITS_ZEROES_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_load_bits_zeroes(void) {
+}
+#define TRACE_DIRTY_BITMAP_LOAD_COMPLETE 0
+#define TRACE_DIRTY_BITMAP_LOAD_COMPLETE_ENABLED 0
+#define TRACE_DIRTY_BITMAP_LOAD_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_load_complete(void) {
+}
+#define TRACE_DIRTY_BITMAP_LOAD_ENTER 0
+#define TRACE_DIRTY_BITMAP_LOAD_ENTER_ENABLED 0
+#define TRACE_DIRTY_BITMAP_LOAD_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_load_enter(void) {
+}
+#define TRACE_DIRTY_BITMAP_LOAD_HEADER 0
+#define TRACE_DIRTY_BITMAP_LOAD_HEADER_ENABLED 0
+#define TRACE_DIRTY_BITMAP_LOAD_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_load_header(uint32_t flags) {
+ (void)flags;
+}
+#define TRACE_DIRTY_BITMAP_LOAD_SUCCESS 0
+#define TRACE_DIRTY_BITMAP_LOAD_SUCCESS_ENABLED 0
+#define TRACE_DIRTY_BITMAP_LOAD_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_load_success(void) {
+}
+#define TRACE_DIRTY_BITMAP_SAVE_COMPLETE_ENTER 0
+#define TRACE_DIRTY_BITMAP_SAVE_COMPLETE_ENTER_ENABLED 0
+#define TRACE_DIRTY_BITMAP_SAVE_COMPLETE_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_save_complete_enter(void) {
+}
+#define TRACE_DIRTY_BITMAP_SAVE_COMPLETE_FINISH 0
+#define TRACE_DIRTY_BITMAP_SAVE_COMPLETE_FINISH_ENABLED 0
+#define TRACE_DIRTY_BITMAP_SAVE_COMPLETE_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_save_complete_finish(void) {
+}
+#define TRACE_DIRTY_BITMAP_SAVE_ITERATE 0
+#define TRACE_DIRTY_BITMAP_SAVE_ITERATE_ENABLED 0
+#define TRACE_DIRTY_BITMAP_SAVE_ITERATE_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_save_iterate(int in_postcopy) {
+ (void)in_postcopy;
+}
+#define TRACE_DIRTY_BITMAP_STATE_PENDING 0
+#define TRACE_DIRTY_BITMAP_STATE_PENDING_ENABLED 0
+#define TRACE_DIRTY_BITMAP_STATE_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_dirty_bitmap_state_pending(uint64_t pending) {
+ (void)pending;
+}
+#define TRACE_DIRTYRATE_CALCULATE 0
+#define TRACE_DIRTYRATE_CALCULATE_ENABLED 0
+#define TRACE_DIRTYRATE_CALCULATE_BACKEND_DSTATE() (0)
+static inline void trace_dirtyrate_calculate(int64_t dirtyrate) {
+ (void)dirtyrate;
+}
+#define TRACE_DIRTYRATE_DO_CALCULATE_VCPU 0
+#define TRACE_DIRTYRATE_DO_CALCULATE_VCPU_ENABLED 0
+#define TRACE_DIRTYRATE_DO_CALCULATE_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_dirtyrate_do_calculate_vcpu(int idx, uint64_t rate) {
+ (void)idx;
+ (void)rate;
+}
+#define TRACE_DIRTYRATE_SET_STATE 0
+#define TRACE_DIRTYRATE_SET_STATE_ENABLED 0
+#define TRACE_DIRTYRATE_SET_STATE_BACKEND_DSTATE() (0)
+static inline void trace_dirtyrate_set_state(const char *new_state) {
+ (void)new_state;
+}
+#define TRACE_FIND_PAGE_MATCHED 0
+#define TRACE_FIND_PAGE_MATCHED_ENABLED 0
+#define TRACE_FIND_PAGE_MATCHED_BACKEND_DSTATE() (0)
+static inline void trace_find_page_matched(const char *idstr) {
+ (void)idstr;
+}
+#define TRACE_GET_GTREE 0
+#define TRACE_GET_GTREE_ENABLED 0
+#define TRACE_GET_GTREE_BACKEND_DSTATE() (0)
+static inline void trace_get_gtree(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, uint32_t nnodes) {
+ (void)field_name;
+ (void)key_vmsd_name;
+ (void)val_vmsd_name;
+ (void)nnodes;
+}
+#define TRACE_GET_GTREE_END 0
+#define TRACE_GET_GTREE_END_ENABLED 0
+#define TRACE_GET_GTREE_END_BACKEND_DSTATE() (0)
+static inline void trace_get_gtree_end(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, int ret) {
+ (void)field_name;
+ (void)key_vmsd_name;
+ (void)val_vmsd_name;
+ (void)ret;
+}
+#define TRACE_GET_QLIST 0
+#define TRACE_GET_QLIST_ENABLED 0
+#define TRACE_GET_QLIST_BACKEND_DSTATE() (0)
+static inline void trace_get_qlist(const char *field_name, const char *vmsd_name, int version_id) {
+ (void)field_name;
+ (void)vmsd_name;
+ (void)version_id;
+}
+#define TRACE_GET_QLIST_END 0
+#define TRACE_GET_QLIST_END_ENABLED 0
+#define TRACE_GET_QLIST_END_BACKEND_DSTATE() (0)
+static inline void trace_get_qlist_end(const char *field_name, const char *vmsd_name) {
+ (void)field_name;
+ (void)vmsd_name;
+}
+#define TRACE_GET_QTAILQ 0
+#define TRACE_GET_QTAILQ_ENABLED 0
+#define TRACE_GET_QTAILQ_BACKEND_DSTATE() (0)
+static inline void trace_get_qtailq(const char *name, int version_id) {
+ (void)name;
+ (void)version_id;
+}
+#define TRACE_GET_QTAILQ_END 0
+#define TRACE_GET_QTAILQ_END_ENABLED 0
+#define TRACE_GET_QTAILQ_END_BACKEND_DSTATE() (0)
+static inline void trace_get_qtailq_end(const char *name, const char *reason, int val) {
+ (void)name;
+ (void)reason;
+ (void)val;
+}
+#define TRACE_GET_QUEUED_PAGE 0
+#define TRACE_GET_QUEUED_PAGE_ENABLED 0
+#define TRACE_GET_QUEUED_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_get_queued_page(const char *block_name, uint64_t tmp_offset, unsigned long page_abs) {
+ (void)block_name;
+ (void)tmp_offset;
+ (void)page_abs;
+}
+#define TRACE_GET_QUEUED_PAGE_NOT_DIRTY 0
+#define TRACE_GET_QUEUED_PAGE_NOT_DIRTY_ENABLED 0
+#define TRACE_GET_QUEUED_PAGE_NOT_DIRTY_BACKEND_DSTATE() (0)
+static inline void trace_get_queued_page_not_dirty(const char *block_name, uint64_t tmp_offset, unsigned long page_abs) {
+ (void)block_name;
+ (void)tmp_offset;
+ (void)page_abs;
+}
+#define TRACE_GET_RAMBLOCK_VFN_HASH 0
+#define TRACE_GET_RAMBLOCK_VFN_HASH_ENABLED 0
+#define TRACE_GET_RAMBLOCK_VFN_HASH_BACKEND_DSTATE() (0)
+static inline void trace_get_ramblock_vfn_hash(const char *idstr, uint64_t vfn, uint32_t hash) {
+ (void)idstr;
+ (void)vfn;
+ (void)hash;
+}
+#define TRACE_LOADVM_APPROVE_SWITCHOVER 0
+#define TRACE_LOADVM_APPROVE_SWITCHOVER_ENABLED 0
+#define TRACE_LOADVM_APPROVE_SWITCHOVER_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_approve_switchover(unsigned int switchover_ack_pending_num) {
+ (void)switchover_ack_pending_num;
+}
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED 0
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_ENABLED 0
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_handle_cmd_packaged(unsigned int length) {
+ (void)length;
+}
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_MAIN 0
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_MAIN_ENABLED 0
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_handle_cmd_packaged_main(int ret) {
+ (void)ret;
+}
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_RECEIVED 0
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_RECEIVED_ENABLED 0
+#define TRACE_LOADVM_HANDLE_CMD_PACKAGED_RECEIVED_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_handle_cmd_packaged_received(int ret) {
+ (void)ret;
+}
+#define TRACE_LOADVM_HANDLE_RECV_BITMAP 0
+#define TRACE_LOADVM_HANDLE_RECV_BITMAP_ENABLED 0
+#define TRACE_LOADVM_HANDLE_RECV_BITMAP_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_handle_recv_bitmap(char *s) {
+ (void)s;
+}
+#define TRACE_LOADVM_POSTCOPY_HANDLE_ADVISE 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_ADVISE_ENABLED 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_ADVISE_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_postcopy_handle_advise(void) {
+}
+#define TRACE_LOADVM_POSTCOPY_HANDLE_LISTEN 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_LISTEN_ENABLED 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_LISTEN_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_postcopy_handle_listen(const char *str) {
+ (void)str;
+}
+#define TRACE_LOADVM_POSTCOPY_HANDLE_RESUME 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_RESUME_ENABLED 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_postcopy_handle_resume(void) {
+}
+#define TRACE_LOADVM_POSTCOPY_HANDLE_RUN 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_RUN_ENABLED 0
+#define TRACE_LOADVM_POSTCOPY_HANDLE_RUN_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_postcopy_handle_run(void) {
+}
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD 0
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_ENABLED 0
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_postcopy_ram_handle_discard(void) {
+}
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_END 0
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_END_ENABLED 0
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_END_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_postcopy_ram_handle_discard_end(void) {
+}
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_HEADER 0
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_HEADER_ENABLED 0
+#define TRACE_LOADVM_POSTCOPY_RAM_HANDLE_DISCARD_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_postcopy_ram_handle_discard_header(const char *ramid, uint16_t len) {
+ (void)ramid;
+ (void)len;
+}
+#define TRACE_LOADVM_PROCESS_COMMAND 0
+#define TRACE_LOADVM_PROCESS_COMMAND_ENABLED 0
+#define TRACE_LOADVM_PROCESS_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_process_command(const char *s, uint16_t len) {
+ (void)s;
+ (void)len;
+}
+#define TRACE_LOADVM_PROCESS_COMMAND_PING 0
+#define TRACE_LOADVM_PROCESS_COMMAND_PING_ENABLED 0
+#define TRACE_LOADVM_PROCESS_COMMAND_PING_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_process_command_ping(uint32_t val) {
+ (void)val;
+}
+#define TRACE_LOADVM_STATE_CLEANUP 0
+#define TRACE_LOADVM_STATE_CLEANUP_ENABLED 0
+#define TRACE_LOADVM_STATE_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_state_cleanup(void) {
+}
+#define TRACE_LOADVM_STATE_SETUP 0
+#define TRACE_LOADVM_STATE_SETUP_ENABLED 0
+#define TRACE_LOADVM_STATE_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_state_setup(void) {
+}
+#define TRACE_LOADVM_STATE_SWITCHOVER_ACK_NEEDED 0
+#define TRACE_LOADVM_STATE_SWITCHOVER_ACK_NEEDED_ENABLED 0
+#define TRACE_LOADVM_STATE_SWITCHOVER_ACK_NEEDED_BACKEND_DSTATE() (0)
+static inline void trace_loadvm_state_switchover_ack_needed(unsigned int switchover_ack_pending_num) {
+ (void)switchover_ack_pending_num;
+}
+#define TRACE_MIGRATE_ERROR 0
+#define TRACE_MIGRATE_ERROR_ENABLED 0
+#define TRACE_MIGRATE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_migrate_error(const char *error_desc) {
+ (void)error_desc;
+}
+#define TRACE_MIGRATE_GLOBAL_STATE_POST_LOAD 0
+#define TRACE_MIGRATE_GLOBAL_STATE_POST_LOAD_ENABLED 0
+#define TRACE_MIGRATE_GLOBAL_STATE_POST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_migrate_global_state_post_load(const char *state) {
+ (void)state;
+}
+#define TRACE_MIGRATE_GLOBAL_STATE_PRE_SAVE 0
+#define TRACE_MIGRATE_GLOBAL_STATE_PRE_SAVE_ENABLED 0
+#define TRACE_MIGRATE_GLOBAL_STATE_PRE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_migrate_global_state_pre_save(const char *state) {
+ (void)state;
+}
+#define TRACE_MIGRATE_HANDLE_RP_REQ_PAGES 0
+#define TRACE_MIGRATE_HANDLE_RP_REQ_PAGES_ENABLED 0
+#define TRACE_MIGRATE_HANDLE_RP_REQ_PAGES_BACKEND_DSTATE() (0)
+static inline void trace_migrate_handle_rp_req_pages(const char *rbname, size_t start, size_t len) {
+ (void)rbname;
+ (void)start;
+ (void)len;
+}
+#define TRACE_MIGRATE_PENDING_ESTIMATE 0
+#define TRACE_MIGRATE_PENDING_ESTIMATE_ENABLED 0
+#define TRACE_MIGRATE_PENDING_ESTIMATE_BACKEND_DSTATE() (0)
+static inline void trace_migrate_pending_estimate(uint64_t size, uint64_t pre, uint64_t post) {
+ (void)size;
+ (void)pre;
+ (void)post;
+}
+#define TRACE_MIGRATE_PENDING_EXACT 0
+#define TRACE_MIGRATE_PENDING_EXACT_ENABLED 0
+#define TRACE_MIGRATE_PENDING_EXACT_BACKEND_DSTATE() (0)
+static inline void trace_migrate_pending_exact(uint64_t size, uint64_t pre, uint64_t post) {
+ (void)size;
+ (void)pre;
+ (void)post;
+}
+#define TRACE_MIGRATE_SEND_RP_MESSAGE 0
+#define TRACE_MIGRATE_SEND_RP_MESSAGE_ENABLED 0
+#define TRACE_MIGRATE_SEND_RP_MESSAGE_BACKEND_DSTATE() (0)
+static inline void trace_migrate_send_rp_message(int msg_type, uint16_t len) {
+ (void)msg_type;
+ (void)len;
+}
+#define TRACE_MIGRATE_SEND_RP_RECV_BITMAP 0
+#define TRACE_MIGRATE_SEND_RP_RECV_BITMAP_ENABLED 0
+#define TRACE_MIGRATE_SEND_RP_RECV_BITMAP_BACKEND_DSTATE() (0)
+static inline void trace_migrate_send_rp_recv_bitmap(char *name, int64_t size) {
+ (void)name;
+ (void)size;
+}
+#define TRACE_MIGRATE_SET_STATE 0
+#define TRACE_MIGRATE_SET_STATE_ENABLED 0
+#define TRACE_MIGRATE_SET_STATE_BACKEND_DSTATE() (0)
+static inline void trace_migrate_set_state(const char *new_state) {
+ (void)new_state;
+}
+#define TRACE_MIGRATE_STATE_TOO_BIG 0
+#define TRACE_MIGRATE_STATE_TOO_BIG_ENABLED 0
+#define TRACE_MIGRATE_STATE_TOO_BIG_BACKEND_DSTATE() (0)
+static inline void trace_migrate_state_too_big(void) {
+}
+#define TRACE_MIGRATE_TRANSFERRED 0
+#define TRACE_MIGRATE_TRANSFERRED_ENABLED 0
+#define TRACE_MIGRATE_TRANSFERRED_BACKEND_DSTATE() (0)
+static inline void trace_migrate_transferred(uint64_t transferred, uint64_t time_spent, uint64_t bandwidth, uint64_t avail_bw, uint64_t size) {
+ (void)transferred;
+ (void)time_spent;
+ (void)bandwidth;
+ (void)avail_bw;
+ (void)size;
+}
+#define TRACE_MIGRATION_BITMAP_CLEAR_DIRTY 0
+#define TRACE_MIGRATION_BITMAP_CLEAR_DIRTY_ENABLED 0
+#define TRACE_MIGRATION_BITMAP_CLEAR_DIRTY_BACKEND_DSTATE() (0)
+static inline void trace_migration_bitmap_clear_dirty(char *str, uint64_t start, uint64_t size, unsigned long page) {
+ (void)str;
+ (void)start;
+ (void)size;
+ (void)page;
+}
+#define TRACE_MIGRATION_BITMAP_SYNC_END 0
+#define TRACE_MIGRATION_BITMAP_SYNC_END_ENABLED 0
+#define TRACE_MIGRATION_BITMAP_SYNC_END_BACKEND_DSTATE() (0)
+static inline void trace_migration_bitmap_sync_end(uint64_t dirty_pages) {
+ (void)dirty_pages;
+}
+#define TRACE_MIGRATION_BITMAP_SYNC_START 0
+#define TRACE_MIGRATION_BITMAP_SYNC_START_ENABLED 0
+#define TRACE_MIGRATION_BITMAP_SYNC_START_BACKEND_DSTATE() (0)
+static inline void trace_migration_bitmap_sync_start(void) {
+}
+#define TRACE_MIGRATION_BLOCK_ACTIVATION 0
+#define TRACE_MIGRATION_BLOCK_ACTIVATION_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_ACTIVATION_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_activation(const char *name) {
+ (void)name;
+}
+#define TRACE_MIGRATION_BLOCK_FLUSH_BLKS 0
+#define TRACE_MIGRATION_BLOCK_FLUSH_BLKS_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_FLUSH_BLKS_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_flush_blks(const char *action, int submitted, int read_done, int transferred) {
+ (void)action;
+ (void)submitted;
+ (void)read_done;
+ (void)transferred;
+}
+#define TRACE_MIGRATION_BLOCK_INIT_FULL 0
+#define TRACE_MIGRATION_BLOCK_INIT_FULL_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_INIT_FULL_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_init_full(const char *blk_device_name) {
+ (void)blk_device_name;
+}
+#define TRACE_MIGRATION_BLOCK_INIT_SHARED 0
+#define TRACE_MIGRATION_BLOCK_INIT_SHARED_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_INIT_SHARED_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_init_shared(const char *blk_device_name) {
+ (void)blk_device_name;
+}
+#define TRACE_MIGRATION_BLOCK_PROGRESSION 0
+#define TRACE_MIGRATION_BLOCK_PROGRESSION_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_PROGRESSION_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_progression(unsigned percent) {
+ (void)percent;
+}
+#define TRACE_MIGRATION_BLOCK_SAVE 0
+#define TRACE_MIGRATION_BLOCK_SAVE_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_save(const char *mig_stage, int submitted, int transferred) {
+ (void)mig_stage;
+ (void)submitted;
+ (void)transferred;
+}
+#define TRACE_MIGRATION_BLOCK_SAVE_COMPLETE 0
+#define TRACE_MIGRATION_BLOCK_SAVE_COMPLETE_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_SAVE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_save_complete(void) {
+}
+#define TRACE_MIGRATION_BLOCK_SAVE_DEVICE_DIRTY 0
+#define TRACE_MIGRATION_BLOCK_SAVE_DEVICE_DIRTY_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_SAVE_DEVICE_DIRTY_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_save_device_dirty(int64_t sector) {
+ (void)sector;
+}
+#define TRACE_MIGRATION_BLOCK_STATE_PENDING 0
+#define TRACE_MIGRATION_BLOCK_STATE_PENDING_ENABLED 0
+#define TRACE_MIGRATION_BLOCK_STATE_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_migration_block_state_pending(uint64_t pending) {
+ (void)pending;
+}
+#define TRACE_MIGRATION_CANCEL 0
+#define TRACE_MIGRATION_CANCEL_ENABLED 0
+#define TRACE_MIGRATION_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_migration_cancel(void) {
+}
+#define TRACE_MIGRATION_CLEANUP 0
+#define TRACE_MIGRATION_CLEANUP_ENABLED 0
+#define TRACE_MIGRATION_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_migration_cleanup(void) {
+}
+#define TRACE_MIGRATION_COMPLETION_FILE_ERR 0
+#define TRACE_MIGRATION_COMPLETION_FILE_ERR_ENABLED 0
+#define TRACE_MIGRATION_COMPLETION_FILE_ERR_BACKEND_DSTATE() (0)
+static inline void trace_migration_completion_file_err(void) {
+}
+#define TRACE_MIGRATION_COMPLETION_POSTCOPY_END 0
+#define TRACE_MIGRATION_COMPLETION_POSTCOPY_END_ENABLED 0
+#define TRACE_MIGRATION_COMPLETION_POSTCOPY_END_BACKEND_DSTATE() (0)
+static inline void trace_migration_completion_postcopy_end(void) {
+}
+#define TRACE_MIGRATION_COMPLETION_POSTCOPY_END_AFTER_COMPLETE 0
+#define TRACE_MIGRATION_COMPLETION_POSTCOPY_END_AFTER_COMPLETE_ENABLED 0
+#define TRACE_MIGRATION_COMPLETION_POSTCOPY_END_AFTER_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_migration_completion_postcopy_end_after_complete(void) {
+}
+#define TRACE_MIGRATION_COMPLETION_VM_STOP 0
+#define TRACE_MIGRATION_COMPLETION_VM_STOP_ENABLED 0
+#define TRACE_MIGRATION_COMPLETION_VM_STOP_BACKEND_DSTATE() (0)
+static inline void trace_migration_completion_vm_stop(int ret) {
+ (void)ret;
+}
+#define TRACE_MIGRATION_DIRTY_LIMIT_GUEST 0
+#define TRACE_MIGRATION_DIRTY_LIMIT_GUEST_ENABLED 0
+#define TRACE_MIGRATION_DIRTY_LIMIT_GUEST_BACKEND_DSTATE() (0)
+static inline void trace_migration_dirty_limit_guest(int64_t dirtyrate) {
+ (void)dirtyrate;
+}
+#define TRACE_MIGRATION_EXEC_INCOMING 0
+#define TRACE_MIGRATION_EXEC_INCOMING_ENABLED 0
+#define TRACE_MIGRATION_EXEC_INCOMING_BACKEND_DSTATE() (0)
+static inline void trace_migration_exec_incoming(const char *cmd) {
+ (void)cmd;
+}
+#define TRACE_MIGRATION_EXEC_OUTGOING 0
+#define TRACE_MIGRATION_EXEC_OUTGOING_ENABLED 0
+#define TRACE_MIGRATION_EXEC_OUTGOING_BACKEND_DSTATE() (0)
+static inline void trace_migration_exec_outgoing(const char *cmd) {
+ (void)cmd;
+}
+#define TRACE_MIGRATION_FD_INCOMING 0
+#define TRACE_MIGRATION_FD_INCOMING_ENABLED 0
+#define TRACE_MIGRATION_FD_INCOMING_BACKEND_DSTATE() (0)
+static inline void trace_migration_fd_incoming(int fd) {
+ (void)fd;
+}
+#define TRACE_MIGRATION_FD_OUTGOING 0
+#define TRACE_MIGRATION_FD_OUTGOING_ENABLED 0
+#define TRACE_MIGRATION_FD_OUTGOING_BACKEND_DSTATE() (0)
+static inline void trace_migration_fd_outgoing(int fd) {
+ (void)fd;
+}
+#define TRACE_MIGRATION_FILE_INCOMING 0
+#define TRACE_MIGRATION_FILE_INCOMING_ENABLED 0
+#define TRACE_MIGRATION_FILE_INCOMING_BACKEND_DSTATE() (0)
+static inline void trace_migration_file_incoming(const char *filename) {
+ (void)filename;
+}
+#define TRACE_MIGRATION_FILE_OUTGOING 0
+#define TRACE_MIGRATION_FILE_OUTGOING_ENABLED 0
+#define TRACE_MIGRATION_FILE_OUTGOING_BACKEND_DSTATE() (0)
+static inline void trace_migration_file_outgoing(const char *filename) {
+ (void)filename;
+}
+#define TRACE_MIGRATION_PAGECACHE_INIT 0
+#define TRACE_MIGRATION_PAGECACHE_INIT_ENABLED 0
+#define TRACE_MIGRATION_PAGECACHE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_migration_pagecache_init(int64_t max_num_items) {
+ (void)max_num_items;
+}
+#define TRACE_MIGRATION_PAGECACHE_INSERT 0
+#define TRACE_MIGRATION_PAGECACHE_INSERT_ENABLED 0
+#define TRACE_MIGRATION_PAGECACHE_INSERT_BACKEND_DSTATE() (0)
+static inline void trace_migration_pagecache_insert(void) {
+}
+#define TRACE_MIGRATION_PRECOPY_COMPLETE 0
+#define TRACE_MIGRATION_PRECOPY_COMPLETE_ENABLED 0
+#define TRACE_MIGRATION_PRECOPY_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_migration_precopy_complete(void) {
+}
+#define TRACE_MIGRATION_RATE_LIMIT_POST 0
+#define TRACE_MIGRATION_RATE_LIMIT_POST_ENABLED 0
+#define TRACE_MIGRATION_RATE_LIMIT_POST_BACKEND_DSTATE() (0)
+static inline void trace_migration_rate_limit_post(int urgent) {
+ (void)urgent;
+}
+#define TRACE_MIGRATION_RATE_LIMIT_PRE 0
+#define TRACE_MIGRATION_RATE_LIMIT_PRE_ENABLED 0
+#define TRACE_MIGRATION_RATE_LIMIT_PRE_BACKEND_DSTATE() (0)
+static inline void trace_migration_rate_limit_pre(int ms) {
+ (void)ms;
+}
+#define TRACE_MIGRATION_RETURN_PATH_END_AFTER 0
+#define TRACE_MIGRATION_RETURN_PATH_END_AFTER_ENABLED 0
+#define TRACE_MIGRATION_RETURN_PATH_END_AFTER_BACKEND_DSTATE() (0)
+static inline void trace_migration_return_path_end_after(void) {
+}
+#define TRACE_MIGRATION_RETURN_PATH_END_BEFORE 0
+#define TRACE_MIGRATION_RETURN_PATH_END_BEFORE_ENABLED 0
+#define TRACE_MIGRATION_RETURN_PATH_END_BEFORE_BACKEND_DSTATE() (0)
+static inline void trace_migration_return_path_end_before(void) {
+}
+#define TRACE_MIGRATION_SET_INCOMING_CHANNEL 0
+#define TRACE_MIGRATION_SET_INCOMING_CHANNEL_ENABLED 0
+#define TRACE_MIGRATION_SET_INCOMING_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_migration_set_incoming_channel(void *ioc, const char *ioctype) {
+ (void)ioc;
+ (void)ioctype;
+}
+#define TRACE_MIGRATION_SET_OUTGOING_CHANNEL 0
+#define TRACE_MIGRATION_SET_OUTGOING_CHANNEL_ENABLED 0
+#define TRACE_MIGRATION_SET_OUTGOING_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_migration_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname, void *err) {
+ (void)ioc;
+ (void)ioctype;
+ (void)hostname;
+ (void)err;
+}
+#define TRACE_MIGRATION_SOCKET_INCOMING_ACCEPTED 0
+#define TRACE_MIGRATION_SOCKET_INCOMING_ACCEPTED_ENABLED 0
+#define TRACE_MIGRATION_SOCKET_INCOMING_ACCEPTED_BACKEND_DSTATE() (0)
+static inline void trace_migration_socket_incoming_accepted(void) {
+}
+#define TRACE_MIGRATION_SOCKET_OUTGOING_CONNECTED 0
+#define TRACE_MIGRATION_SOCKET_OUTGOING_CONNECTED_ENABLED 0
+#define TRACE_MIGRATION_SOCKET_OUTGOING_CONNECTED_BACKEND_DSTATE() (0)
+static inline void trace_migration_socket_outgoing_connected(const char *hostname) {
+ (void)hostname;
+}
+#define TRACE_MIGRATION_SOCKET_OUTGOING_ERROR 0
+#define TRACE_MIGRATION_SOCKET_OUTGOING_ERROR_ENABLED 0
+#define TRACE_MIGRATION_SOCKET_OUTGOING_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_migration_socket_outgoing_error(const char *err) {
+ (void)err;
+}
+#define TRACE_MIGRATION_THREAD_AFTER_LOOP 0
+#define TRACE_MIGRATION_THREAD_AFTER_LOOP_ENABLED 0
+#define TRACE_MIGRATION_THREAD_AFTER_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_migration_thread_after_loop(void) {
+}
+#define TRACE_MIGRATION_THREAD_FILE_ERR 0
+#define TRACE_MIGRATION_THREAD_FILE_ERR_ENABLED 0
+#define TRACE_MIGRATION_THREAD_FILE_ERR_BACKEND_DSTATE() (0)
+static inline void trace_migration_thread_file_err(void) {
+}
+#define TRACE_MIGRATION_THREAD_LOW_PENDING 0
+#define TRACE_MIGRATION_THREAD_LOW_PENDING_ENABLED 0
+#define TRACE_MIGRATION_THREAD_LOW_PENDING_BACKEND_DSTATE() (0)
+static inline void trace_migration_thread_low_pending(uint64_t pending) {
+ (void)pending;
+}
+#define TRACE_MIGRATION_THREAD_SETUP_COMPLETE 0
+#define TRACE_MIGRATION_THREAD_SETUP_COMPLETE_ENABLED 0
+#define TRACE_MIGRATION_THREAD_SETUP_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_migration_thread_setup_complete(void) {
+}
+#define TRACE_MIGRATION_THROTTLE 0
+#define TRACE_MIGRATION_THROTTLE_ENABLED 0
+#define TRACE_MIGRATION_THROTTLE_BACKEND_DSTATE() (0)
+static inline void trace_migration_throttle(void) {
+}
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_COMPLETE 0
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_COMPLETE_ENABLED 0
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_migration_tls_incoming_handshake_complete(void) {
+}
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_ERROR 0
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_ERROR_ENABLED 0
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_migration_tls_incoming_handshake_error(const char *err) {
+ (void)err;
+}
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_START 0
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_START_ENABLED 0
+#define TRACE_MIGRATION_TLS_INCOMING_HANDSHAKE_START_BACKEND_DSTATE() (0)
+static inline void trace_migration_tls_incoming_handshake_start(void) {
+}
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_COMPLETE 0
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_COMPLETE_ENABLED 0
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_migration_tls_outgoing_handshake_complete(void) {
+}
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_ERROR 0
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_ERROR_ENABLED 0
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_migration_tls_outgoing_handshake_error(const char *err) {
+ (void)err;
+}
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_START 0
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_START_ENABLED 0
+#define TRACE_MIGRATION_TLS_OUTGOING_HANDSHAKE_START_BACKEND_DSTATE() (0)
+static inline void trace_migration_tls_outgoing_handshake_start(const char *hostname) {
+ (void)hostname;
+}
+#define TRACE_MIGRATION_TRANSFERRED_BYTES 0
+#define TRACE_MIGRATION_TRANSFERRED_BYTES_ENABLED 0
+#define TRACE_MIGRATION_TRANSFERRED_BYTES_BACKEND_DSTATE() (0)
+static inline void trace_migration_transferred_bytes(uint64_t qemu_file, uint64_t multifd, uint64_t rdma) {
+ (void)qemu_file;
+ (void)multifd;
+ (void)rdma;
+}
+#define TRACE_MULTIFD_NEW_SEND_CHANNEL_ASYNC 0
+#define TRACE_MULTIFD_NEW_SEND_CHANNEL_ASYNC_ENABLED 0
+#define TRACE_MULTIFD_NEW_SEND_CHANNEL_ASYNC_BACKEND_DSTATE() (0)
+static inline void trace_multifd_new_send_channel_async(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_NEW_SEND_CHANNEL_ASYNC_ERROR 0
+#define TRACE_MULTIFD_NEW_SEND_CHANNEL_ASYNC_ERROR_ENABLED 0
+#define TRACE_MULTIFD_NEW_SEND_CHANNEL_ASYNC_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_multifd_new_send_channel_async_error(uint8_t id, void *err) {
+ (void)id;
+ (void)err;
+}
+#define TRACE_MULTIFD_RECV_NEW_CHANNEL 0
+#define TRACE_MULTIFD_RECV_NEW_CHANNEL_ENABLED 0
+#define TRACE_MULTIFD_RECV_NEW_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_new_channel(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_RECV_SYNC_MAIN 0
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_ENABLED 0
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_sync_main(long packet_num) {
+ (void)packet_num;
+}
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_SIGNAL 0
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_SIGNAL_ENABLED 0
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_sync_main_signal(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_WAIT 0
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_WAIT_ENABLED 0
+#define TRACE_MULTIFD_RECV_SYNC_MAIN_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_sync_main_wait(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_RECV_TERMINATE_THREADS 0
+#define TRACE_MULTIFD_RECV_TERMINATE_THREADS_ENABLED 0
+#define TRACE_MULTIFD_RECV_TERMINATE_THREADS_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_terminate_threads(bool error) {
+ (void)error;
+}
+#define TRACE_MULTIFD_RECV_THREAD_END 0
+#define TRACE_MULTIFD_RECV_THREAD_END_ENABLED 0
+#define TRACE_MULTIFD_RECV_THREAD_END_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_thread_end(uint8_t id, uint64_t packets) {
+ (void)id;
+ (void)packets;
+}
+#define TRACE_MULTIFD_RECV_THREAD_START 0
+#define TRACE_MULTIFD_RECV_THREAD_START_ENABLED 0
+#define TRACE_MULTIFD_RECV_THREAD_START_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_thread_start(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_RECV_UNFILL 0
+#define TRACE_MULTIFD_RECV_UNFILL_ENABLED 0
+#define TRACE_MULTIFD_RECV_UNFILL_BACKEND_DSTATE() (0)
+static inline void trace_multifd_recv_unfill(uint8_t id, uint64_t packet_num, uint32_t flags, uint32_t next_packet_size) {
+ (void)id;
+ (void)packet_num;
+ (void)flags;
+ (void)next_packet_size;
+}
+#define TRACE_MULTIFD_SEND_ERROR 0
+#define TRACE_MULTIFD_SEND_ERROR_ENABLED 0
+#define TRACE_MULTIFD_SEND_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_error(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_SEND_FILL 0
+#define TRACE_MULTIFD_SEND_FILL_ENABLED 0
+#define TRACE_MULTIFD_SEND_FILL_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_fill(uint8_t id, uint64_t packet_num, uint32_t flags, uint32_t next_packet_size) {
+ (void)id;
+ (void)packet_num;
+ (void)flags;
+ (void)next_packet_size;
+}
+#define TRACE_MULTIFD_SEND_RAM_FILL 0
+#define TRACE_MULTIFD_SEND_RAM_FILL_ENABLED 0
+#define TRACE_MULTIFD_SEND_RAM_FILL_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_ram_fill(uint8_t id, uint32_t normal, uint32_t zero) {
+ (void)id;
+ (void)normal;
+ (void)zero;
+}
+#define TRACE_MULTIFD_SEND_SYNC_MAIN 0
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_ENABLED 0
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_sync_main(long packet_num) {
+ (void)packet_num;
+}
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_SIGNAL 0
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_SIGNAL_ENABLED 0
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_SIGNAL_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_sync_main_signal(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_WAIT 0
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_WAIT_ENABLED 0
+#define TRACE_MULTIFD_SEND_SYNC_MAIN_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_sync_main_wait(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_SEND_TERMINATE_THREADS 0
+#define TRACE_MULTIFD_SEND_TERMINATE_THREADS_ENABLED 0
+#define TRACE_MULTIFD_SEND_TERMINATE_THREADS_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_terminate_threads(void) {
+}
+#define TRACE_MULTIFD_SEND_THREAD_END 0
+#define TRACE_MULTIFD_SEND_THREAD_END_ENABLED 0
+#define TRACE_MULTIFD_SEND_THREAD_END_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_thread_end(uint8_t id, uint64_t packets) {
+ (void)id;
+ (void)packets;
+}
+#define TRACE_MULTIFD_SEND_THREAD_START 0
+#define TRACE_MULTIFD_SEND_THREAD_START_ENABLED 0
+#define TRACE_MULTIFD_SEND_THREAD_START_BACKEND_DSTATE() (0)
+static inline void trace_multifd_send_thread_start(uint8_t id) {
+ (void)id;
+}
+#define TRACE_MULTIFD_SET_OUTGOING_CHANNEL 0
+#define TRACE_MULTIFD_SET_OUTGOING_CHANNEL_ENABLED 0
+#define TRACE_MULTIFD_SET_OUTGOING_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_multifd_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname) {
+ (void)ioc;
+ (void)ioctype;
+ (void)hostname;
+}
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_COMPLETE 0
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_COMPLETE_ENABLED 0
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_multifd_tls_outgoing_handshake_complete(void *ioc) {
+ (void)ioc;
+}
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_ERROR 0
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_ERROR_ENABLED 0
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_multifd_tls_outgoing_handshake_error(void *ioc, const char *err) {
+ (void)ioc;
+ (void)err;
+}
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_START 0
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_START_ENABLED 0
+#define TRACE_MULTIFD_TLS_OUTGOING_HANDSHAKE_START_BACKEND_DSTATE() (0)
+static inline void trace_multifd_tls_outgoing_handshake_start(void *ioc, void *tioc, const char *hostname) {
+ (void)ioc;
+ (void)tioc;
+ (void)hostname;
+}
+#define TRACE_OPEN_RETURN_PATH_ON_SOURCE 0
+#define TRACE_OPEN_RETURN_PATH_ON_SOURCE_ENABLED 0
+#define TRACE_OPEN_RETURN_PATH_ON_SOURCE_BACKEND_DSTATE() (0)
+static inline void trace_open_return_path_on_source(void) {
+}
+#define TRACE_OPEN_RETURN_PATH_ON_SOURCE_CONTINUE 0
+#define TRACE_OPEN_RETURN_PATH_ON_SOURCE_CONTINUE_ENABLED 0
+#define TRACE_OPEN_RETURN_PATH_ON_SOURCE_CONTINUE_BACKEND_DSTATE() (0)
+static inline void trace_open_return_path_on_source_continue(void) {
+}
+#define TRACE_POSTCOPY_BLOCKTIME_BEGIN 0
+#define TRACE_POSTCOPY_BLOCKTIME_BEGIN_ENABLED 0
+#define TRACE_POSTCOPY_BLOCKTIME_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_blocktime_begin(uint64_t addr, uint64_t time, int cpu, bool exists) {
+ (void)addr;
+ (void)time;
+ (void)cpu;
+ (void)exists;
+}
+#define TRACE_POSTCOPY_BLOCKTIME_END 0
+#define TRACE_POSTCOPY_BLOCKTIME_END_ENABLED 0
+#define TRACE_POSTCOPY_BLOCKTIME_END_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_blocktime_end(uint64_t addr, uint64_t time, int affected_cpu, int affected_non_cpus) {
+ (void)addr;
+ (void)time;
+ (void)affected_cpu;
+ (void)affected_non_cpus;
+}
+#define TRACE_POSTCOPY_BLOCKTIME_END_ONE 0
+#define TRACE_POSTCOPY_BLOCKTIME_END_ONE_ENABLED 0
+#define TRACE_POSTCOPY_BLOCKTIME_END_ONE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_blocktime_end_one(int cpu, uint8_t left_faults) {
+ (void)cpu;
+ (void)left_faults;
+}
+#define TRACE_POSTCOPY_BLOCKTIME_TID_CPU_MAP 0
+#define TRACE_POSTCOPY_BLOCKTIME_TID_CPU_MAP_ENABLED 0
+#define TRACE_POSTCOPY_BLOCKTIME_TID_CPU_MAP_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_blocktime_tid_cpu_map(int cpu, uint32_t tid) {
+ (void)cpu;
+ (void)tid;
+}
+#define TRACE_POSTCOPY_CLEANUP_RANGE 0
+#define TRACE_POSTCOPY_CLEANUP_RANGE_ENABLED 0
+#define TRACE_POSTCOPY_CLEANUP_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_cleanup_range(const char *ramblock, void *host_addr, size_t offset, size_t length) {
+ (void)ramblock;
+ (void)host_addr;
+ (void)offset;
+ (void)length;
+}
+#define TRACE_POSTCOPY_DISCARD_SEND_FINISH 0
+#define TRACE_POSTCOPY_DISCARD_SEND_FINISH_ENABLED 0
+#define TRACE_POSTCOPY_DISCARD_SEND_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_discard_send_finish(const char *ramblock, int nwords, int ncmds) {
+ (void)ramblock;
+ (void)nwords;
+ (void)ncmds;
+}
+#define TRACE_POSTCOPY_DISCARD_SEND_RANGE 0
+#define TRACE_POSTCOPY_DISCARD_SEND_RANGE_ENABLED 0
+#define TRACE_POSTCOPY_DISCARD_SEND_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_discard_send_range(const char *ramblock, unsigned long start, unsigned long length) {
+ (void)ramblock;
+ (void)start;
+ (void)length;
+}
+#define TRACE_POSTCOPY_INIT_RANGE 0
+#define TRACE_POSTCOPY_INIT_RANGE_ENABLED 0
+#define TRACE_POSTCOPY_INIT_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_init_range(const char *ramblock, void *host_addr, size_t offset, size_t length) {
+ (void)ramblock;
+ (void)host_addr;
+ (void)offset;
+ (void)length;
+}
+#define TRACE_POSTCOPY_NHP_RANGE 0
+#define TRACE_POSTCOPY_NHP_RANGE_ENABLED 0
+#define TRACE_POSTCOPY_NHP_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_nhp_range(const char *ramblock, void *host_addr, size_t offset, size_t length) {
+ (void)ramblock;
+ (void)host_addr;
+ (void)offset;
+ (void)length;
+}
+#define TRACE_POSTCOPY_PAGE_REQ_ADD 0
+#define TRACE_POSTCOPY_PAGE_REQ_ADD_ENABLED 0
+#define TRACE_POSTCOPY_PAGE_REQ_ADD_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_page_req_add(void *addr, int count) {
+ (void)addr;
+ (void)count;
+}
+#define TRACE_POSTCOPY_PAGE_REQ_DEL 0
+#define TRACE_POSTCOPY_PAGE_REQ_DEL_ENABLED 0
+#define TRACE_POSTCOPY_PAGE_REQ_DEL_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_page_req_del(void *addr, int count) {
+ (void)addr;
+ (void)count;
+}
+#define TRACE_POSTCOPY_PAGE_REQ_SYNC 0
+#define TRACE_POSTCOPY_PAGE_REQ_SYNC_ENABLED 0
+#define TRACE_POSTCOPY_PAGE_REQ_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_page_req_sync(void *host_addr) {
+ (void)host_addr;
+}
+#define TRACE_POSTCOPY_PAUSE_CONTINUED 0
+#define TRACE_POSTCOPY_PAUSE_CONTINUED_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_CONTINUED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_continued(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_FAST_LOAD 0
+#define TRACE_POSTCOPY_PAUSE_FAST_LOAD_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_FAST_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_fast_load(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_FAST_LOAD_CONTINUED 0
+#define TRACE_POSTCOPY_PAUSE_FAST_LOAD_CONTINUED_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_FAST_LOAD_CONTINUED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_fast_load_continued(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_FAULT_THREAD 0
+#define TRACE_POSTCOPY_PAUSE_FAULT_THREAD_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_FAULT_THREAD_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_fault_thread(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_FAULT_THREAD_CONTINUED 0
+#define TRACE_POSTCOPY_PAUSE_FAULT_THREAD_CONTINUED_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_FAULT_THREAD_CONTINUED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_fault_thread_continued(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_INCOMING 0
+#define TRACE_POSTCOPY_PAUSE_INCOMING_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_INCOMING_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_incoming(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_INCOMING_CONTINUED 0
+#define TRACE_POSTCOPY_PAUSE_INCOMING_CONTINUED_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_INCOMING_CONTINUED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_incoming_continued(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_RETURN_PATH 0
+#define TRACE_POSTCOPY_PAUSE_RETURN_PATH_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_RETURN_PATH_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_return_path(void) {
+}
+#define TRACE_POSTCOPY_PAUSE_RETURN_PATH_CONTINUED 0
+#define TRACE_POSTCOPY_PAUSE_RETURN_PATH_CONTINUED_ENABLED 0
+#define TRACE_POSTCOPY_PAUSE_RETURN_PATH_CONTINUED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_pause_return_path_continued(void) {
+}
+#define TRACE_POSTCOPY_PLACE_PAGE 0
+#define TRACE_POSTCOPY_PLACE_PAGE_ENABLED 0
+#define TRACE_POSTCOPY_PLACE_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_place_page(void *host_addr) {
+ (void)host_addr;
+}
+#define TRACE_POSTCOPY_PLACE_PAGE_ZERO 0
+#define TRACE_POSTCOPY_PLACE_PAGE_ZERO_ENABLED 0
+#define TRACE_POSTCOPY_PLACE_PAGE_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_place_page_zero(void *host_addr) {
+ (void)host_addr;
+}
+#define TRACE_POSTCOPY_PREEMPT_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_ENABLED_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_ENABLED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_enabled(bool value) {
+ (void)value;
+}
+#define TRACE_POSTCOPY_PREEMPT_HIT 0
+#define TRACE_POSTCOPY_PREEMPT_HIT_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_HIT_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_hit(char *str, uint64_t offset) {
+ (void)str;
+ (void)offset;
+}
+#define TRACE_POSTCOPY_PREEMPT_NEW_CHANNEL 0
+#define TRACE_POSTCOPY_PREEMPT_NEW_CHANNEL_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_NEW_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_new_channel(void) {
+}
+#define TRACE_POSTCOPY_PREEMPT_RESET_CHANNEL 0
+#define TRACE_POSTCOPY_PREEMPT_RESET_CHANNEL_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_RESET_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_reset_channel(void) {
+}
+#define TRACE_POSTCOPY_PREEMPT_RESTORED 0
+#define TRACE_POSTCOPY_PREEMPT_RESTORED_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_RESTORED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_restored(char *str, unsigned long page) {
+ (void)str;
+ (void)page;
+}
+#define TRACE_POSTCOPY_PREEMPT_SEND_HOST_PAGE 0
+#define TRACE_POSTCOPY_PREEMPT_SEND_HOST_PAGE_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_SEND_HOST_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_send_host_page(char *str, uint64_t offset) {
+ (void)str;
+ (void)offset;
+}
+#define TRACE_POSTCOPY_PREEMPT_SWITCH_CHANNEL 0
+#define TRACE_POSTCOPY_PREEMPT_SWITCH_CHANNEL_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_SWITCH_CHANNEL_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_switch_channel(int channel) {
+ (void)channel;
+}
+#define TRACE_POSTCOPY_PREEMPT_THREAD_ENTRY 0
+#define TRACE_POSTCOPY_PREEMPT_THREAD_ENTRY_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_THREAD_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_thread_entry(void) {
+}
+#define TRACE_POSTCOPY_PREEMPT_THREAD_EXIT 0
+#define TRACE_POSTCOPY_PREEMPT_THREAD_EXIT_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_THREAD_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_thread_exit(void) {
+}
+#define TRACE_POSTCOPY_PREEMPT_TLS_HANDSHAKE 0
+#define TRACE_POSTCOPY_PREEMPT_TLS_HANDSHAKE_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_TLS_HANDSHAKE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_tls_handshake(void) {
+}
+#define TRACE_POSTCOPY_PREEMPT_TRIGGERED 0
+#define TRACE_POSTCOPY_PREEMPT_TRIGGERED_ENABLED 0
+#define TRACE_POSTCOPY_PREEMPT_TRIGGERED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_preempt_triggered(char *str, unsigned long page) {
+ (void)str;
+ (void)page;
+}
+#define TRACE_POSTCOPY_RAM_ENABLE_NOTIFY 0
+#define TRACE_POSTCOPY_RAM_ENABLE_NOTIFY_ENABLED 0
+#define TRACE_POSTCOPY_RAM_ENABLE_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_enable_notify(void) {
+}
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_ENTRY 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_ENTRY_ENABLED 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_fault_thread_entry(void) {
+}
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_EXIT 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_EXIT_ENABLED 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_fault_thread_exit(void) {
+}
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_FDS_CORE 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_FDS_CORE_ENABLED 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_FDS_CORE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_fault_thread_fds_core(int baseufd, int quitfd) {
+ (void)baseufd;
+ (void)quitfd;
+}
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_FDS_EXTRA 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_FDS_EXTRA_ENABLED 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_FDS_EXTRA_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_fault_thread_fds_extra(size_t index, const char *name, int fd) {
+ (void)index;
+ (void)name;
+ (void)fd;
+}
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_QUIT 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_QUIT_ENABLED 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_QUIT_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_fault_thread_quit(void) {
+}
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_REQUEST 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_REQUEST_ENABLED 0
+#define TRACE_POSTCOPY_RAM_FAULT_THREAD_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_fault_thread_request(uint64_t hostaddr, const char *ramblock, size_t offset, uint32_t pid) {
+ (void)hostaddr;
+ (void)ramblock;
+ (void)offset;
+ (void)pid;
+}
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_BLOCKTIME 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_BLOCKTIME_ENABLED 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_BLOCKTIME_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_incoming_cleanup_blocktime(uint64_t total) {
+ (void)total;
+}
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_CLOSEUF 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_CLOSEUF_ENABLED 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_CLOSEUF_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_incoming_cleanup_closeuf(void) {
+}
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_ENTRY 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_ENTRY_ENABLED 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_incoming_cleanup_entry(void) {
+}
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_EXIT 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_EXIT_ENABLED 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_incoming_cleanup_exit(void) {
+}
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_JOIN 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_JOIN_ENABLED 0
+#define TRACE_POSTCOPY_RAM_INCOMING_CLEANUP_JOIN_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_incoming_cleanup_join(void) {
+}
+#define TRACE_POSTCOPY_RAM_LISTEN_THREAD_EXIT 0
+#define TRACE_POSTCOPY_RAM_LISTEN_THREAD_EXIT_ENABLED 0
+#define TRACE_POSTCOPY_RAM_LISTEN_THREAD_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_listen_thread_exit(void) {
+}
+#define TRACE_POSTCOPY_RAM_LISTEN_THREAD_START 0
+#define TRACE_POSTCOPY_RAM_LISTEN_THREAD_START_ENABLED 0
+#define TRACE_POSTCOPY_RAM_LISTEN_THREAD_START_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_ram_listen_thread_start(void) {
+}
+#define TRACE_POSTCOPY_REQUEST_SHARED_PAGE 0
+#define TRACE_POSTCOPY_REQUEST_SHARED_PAGE_ENABLED 0
+#define TRACE_POSTCOPY_REQUEST_SHARED_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_request_shared_page(const char *sharer, const char *rb, uint64_t rb_offset) {
+ (void)sharer;
+ (void)rb;
+ (void)rb_offset;
+}
+#define TRACE_POSTCOPY_REQUEST_SHARED_PAGE_PRESENT 0
+#define TRACE_POSTCOPY_REQUEST_SHARED_PAGE_PRESENT_ENABLED 0
+#define TRACE_POSTCOPY_REQUEST_SHARED_PAGE_PRESENT_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_request_shared_page_present(const char *sharer, const char *rb, uint64_t rb_offset) {
+ (void)sharer;
+ (void)rb;
+ (void)rb_offset;
+}
+#define TRACE_POSTCOPY_START 0
+#define TRACE_POSTCOPY_START_ENABLED 0
+#define TRACE_POSTCOPY_START_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_start(void) {
+}
+#define TRACE_POSTCOPY_START_SET_RUN 0
+#define TRACE_POSTCOPY_START_SET_RUN_ENABLED 0
+#define TRACE_POSTCOPY_START_SET_RUN_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_start_set_run(void) {
+}
+#define TRACE_POSTCOPY_WAKE_SHARED 0
+#define TRACE_POSTCOPY_WAKE_SHARED_ENABLED 0
+#define TRACE_POSTCOPY_WAKE_SHARED_BACKEND_DSTATE() (0)
+static inline void trace_postcopy_wake_shared(uint64_t client_addr, const char *rb) {
+ (void)client_addr;
+ (void)rb;
+}
+#define TRACE_PROCESS_INCOMING_MIGRATION_CO_END 0
+#define TRACE_PROCESS_INCOMING_MIGRATION_CO_END_ENABLED 0
+#define TRACE_PROCESS_INCOMING_MIGRATION_CO_END_BACKEND_DSTATE() (0)
+static inline void trace_process_incoming_migration_co_end(int ret) {
+ (void)ret;
+}
+#define TRACE_PROCESS_INCOMING_MIGRATION_CO_POSTCOPY_END_MAIN 0
+#define TRACE_PROCESS_INCOMING_MIGRATION_CO_POSTCOPY_END_MAIN_ENABLED 0
+#define TRACE_PROCESS_INCOMING_MIGRATION_CO_POSTCOPY_END_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_process_incoming_migration_co_postcopy_end_main(void) {
+}
+#define TRACE_PUT_GTREE 0
+#define TRACE_PUT_GTREE_ENABLED 0
+#define TRACE_PUT_GTREE_BACKEND_DSTATE() (0)
+static inline void trace_put_gtree(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, uint32_t nnodes) {
+ (void)field_name;
+ (void)key_vmsd_name;
+ (void)val_vmsd_name;
+ (void)nnodes;
+}
+#define TRACE_PUT_GTREE_END 0
+#define TRACE_PUT_GTREE_END_ENABLED 0
+#define TRACE_PUT_GTREE_END_BACKEND_DSTATE() (0)
+static inline void trace_put_gtree_end(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, int ret) {
+ (void)field_name;
+ (void)key_vmsd_name;
+ (void)val_vmsd_name;
+ (void)ret;
+}
+#define TRACE_PUT_QLIST 0
+#define TRACE_PUT_QLIST_ENABLED 0
+#define TRACE_PUT_QLIST_BACKEND_DSTATE() (0)
+static inline void trace_put_qlist(const char *field_name, const char *vmsd_name, int version_id) {
+ (void)field_name;
+ (void)vmsd_name;
+ (void)version_id;
+}
+#define TRACE_PUT_QLIST_END 0
+#define TRACE_PUT_QLIST_END_ENABLED 0
+#define TRACE_PUT_QLIST_END_BACKEND_DSTATE() (0)
+static inline void trace_put_qlist_end(const char *field_name, const char *vmsd_name) {
+ (void)field_name;
+ (void)vmsd_name;
+}
+#define TRACE_PUT_QTAILQ 0
+#define TRACE_PUT_QTAILQ_ENABLED 0
+#define TRACE_PUT_QTAILQ_BACKEND_DSTATE() (0)
+static inline void trace_put_qtailq(const char *name, int version_id) {
+ (void)name;
+ (void)version_id;
+}
+#define TRACE_PUT_QTAILQ_END 0
+#define TRACE_PUT_QTAILQ_END_ENABLED 0
+#define TRACE_PUT_QTAILQ_END_BACKEND_DSTATE() (0)
+static inline void trace_put_qtailq_end(const char *name, const char *reason) {
+ (void)name;
+ (void)reason;
+}
+#define TRACE_QEMU_FILE_FCLOSE 0
+#define TRACE_QEMU_FILE_FCLOSE_ENABLED 0
+#define TRACE_QEMU_FILE_FCLOSE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_fclose(void) {
+}
+#define TRACE_QEMU_FILE_GET_FD 0
+#define TRACE_QEMU_FILE_GET_FD_ENABLED 0
+#define TRACE_QEMU_FILE_GET_FD_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_get_fd(const char *name, int fd) {
+ (void)name;
+ (void)fd;
+}
+#define TRACE_QEMU_FILE_PUT_FD 0
+#define TRACE_QEMU_FILE_PUT_FD_ENABLED 0
+#define TRACE_QEMU_FILE_PUT_FD_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_put_fd(const char *name, int fd, int ret) {
+ (void)name;
+ (void)fd;
+ (void)ret;
+}
+#define TRACE_QEMU_LOADVM_STATE_POST_MAIN 0
+#define TRACE_QEMU_LOADVM_STATE_POST_MAIN_ENABLED 0
+#define TRACE_QEMU_LOADVM_STATE_POST_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_qemu_loadvm_state_post_main(int ret) {
+ (void)ret;
+}
+#define TRACE_QEMU_LOADVM_STATE_SECTION 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_ENABLED 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_BACKEND_DSTATE() (0)
+static inline void trace_qemu_loadvm_state_section(unsigned int section_type) {
+ (void)section_type;
+}
+#define TRACE_QEMU_LOADVM_STATE_SECTION_COMMAND 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_COMMAND_ENABLED 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_qemu_loadvm_state_section_command(int ret) {
+ (void)ret;
+}
+#define TRACE_QEMU_LOADVM_STATE_SECTION_PARTEND 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_PARTEND_ENABLED 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_PARTEND_BACKEND_DSTATE() (0)
+static inline void trace_qemu_loadvm_state_section_partend(uint32_t section_id) {
+ (void)section_id;
+}
+#define TRACE_QEMU_LOADVM_STATE_SECTION_STARTFULL 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_STARTFULL_ENABLED 0
+#define TRACE_QEMU_LOADVM_STATE_SECTION_STARTFULL_BACKEND_DSTATE() (0)
+static inline void trace_qemu_loadvm_state_section_startfull(uint32_t section_id, const char *idstr, uint32_t instance_id, uint32_t version_id) {
+ (void)section_id;
+ (void)idstr;
+ (void)instance_id;
+ (void)version_id;
+}
+#define TRACE_QEMU_RDMA_ACCEPT_INCOMING_MIGRATION 0
+#define TRACE_QEMU_RDMA_ACCEPT_INCOMING_MIGRATION_ENABLED 0
+#define TRACE_QEMU_RDMA_ACCEPT_INCOMING_MIGRATION_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_accept_incoming_migration(void) {
+}
+#define TRACE_QEMU_RDMA_ACCEPT_INCOMING_MIGRATION_ACCEPTED 0
+#define TRACE_QEMU_RDMA_ACCEPT_INCOMING_MIGRATION_ACCEPTED_ENABLED 0
+#define TRACE_QEMU_RDMA_ACCEPT_INCOMING_MIGRATION_ACCEPTED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_accept_incoming_migration_accepted(void) {
+}
+#define TRACE_QEMU_RDMA_ACCEPT_PIN_STATE 0
+#define TRACE_QEMU_RDMA_ACCEPT_PIN_STATE_ENABLED 0
+#define TRACE_QEMU_RDMA_ACCEPT_PIN_STATE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_accept_pin_state(bool pin) {
+ (void)pin;
+}
+#define TRACE_QEMU_RDMA_ACCEPT_PIN_VERBSC 0
+#define TRACE_QEMU_RDMA_ACCEPT_PIN_VERBSC_ENABLED 0
+#define TRACE_QEMU_RDMA_ACCEPT_PIN_VERBSC_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_accept_pin_verbsc(void *verbs) {
+ (void)verbs;
+}
+#define TRACE_QEMU_RDMA_ADVISE_MR 0
+#define TRACE_QEMU_RDMA_ADVISE_MR_ENABLED 0
+#define TRACE_QEMU_RDMA_ADVISE_MR_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_advise_mr(const char *name, uint32_t len, uint64_t addr, const char *res) {
+ (void)name;
+ (void)len;
+ (void)addr;
+ (void)res;
+}
+#define TRACE_QEMU_RDMA_BLOCK_FOR_WRID_MISS 0
+#define TRACE_QEMU_RDMA_BLOCK_FOR_WRID_MISS_ENABLED 0
+#define TRACE_QEMU_RDMA_BLOCK_FOR_WRID_MISS_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_block_for_wrid_miss(uint64_t wcomp, uint64_t req) {
+ (void)wcomp;
+ (void)req;
+}
+#define TRACE_QEMU_RDMA_CLEANUP_DISCONNECT 0
+#define TRACE_QEMU_RDMA_CLEANUP_DISCONNECT_ENABLED 0
+#define TRACE_QEMU_RDMA_CLEANUP_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_cleanup_disconnect(void) {
+}
+#define TRACE_QEMU_RDMA_CLOSE 0
+#define TRACE_QEMU_RDMA_CLOSE_ENABLED 0
+#define TRACE_QEMU_RDMA_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_close(void) {
+}
+#define TRACE_QEMU_RDMA_CONNECT_PIN_ALL_OUTCOME 0
+#define TRACE_QEMU_RDMA_CONNECT_PIN_ALL_OUTCOME_ENABLED 0
+#define TRACE_QEMU_RDMA_CONNECT_PIN_ALL_OUTCOME_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_connect_pin_all_outcome(bool pin) {
+ (void)pin;
+}
+#define TRACE_QEMU_RDMA_CONNECT_PIN_ALL_REQUESTED 0
+#define TRACE_QEMU_RDMA_CONNECT_PIN_ALL_REQUESTED_ENABLED 0
+#define TRACE_QEMU_RDMA_CONNECT_PIN_ALL_REQUESTED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_connect_pin_all_requested(void) {
+}
+#define TRACE_QEMU_RDMA_DEST_INIT_TRYING 0
+#define TRACE_QEMU_RDMA_DEST_INIT_TRYING_ENABLED 0
+#define TRACE_QEMU_RDMA_DEST_INIT_TRYING_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_dest_init_trying(const char *host, const char *ip) {
+ (void)host;
+ (void)ip;
+}
+#define TRACE_QEMU_RDMA_DUMP_GID 0
+#define TRACE_QEMU_RDMA_DUMP_GID_ENABLED 0
+#define TRACE_QEMU_RDMA_DUMP_GID_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_dump_gid(const char *who, const char *src, const char *dst) {
+ (void)who;
+ (void)src;
+ (void)dst;
+}
+#define TRACE_QEMU_RDMA_DUMP_ID 0
+#define TRACE_QEMU_RDMA_DUMP_ID_ENABLED 0
+#define TRACE_QEMU_RDMA_DUMP_ID_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_dump_id(const char *who, const char *name, const char *dev_name, const char *dev_path, const char *ibdev_path, int transport, const char *transport_name) {
+ (void)who;
+ (void)name;
+ (void)dev_name;
+ (void)dev_path;
+ (void)ibdev_path;
+ (void)transport;
+ (void)transport_name;
+}
+#define TRACE_QEMU_RDMA_DUMP_ID_FAILED 0
+#define TRACE_QEMU_RDMA_DUMP_ID_FAILED_ENABLED 0
+#define TRACE_QEMU_RDMA_DUMP_ID_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_dump_id_failed(const char *who) {
+ (void)who;
+}
+#define TRACE_QEMU_RDMA_EXCHANGE_GET_RESPONSE_NONE 0
+#define TRACE_QEMU_RDMA_EXCHANGE_GET_RESPONSE_NONE_ENABLED 0
+#define TRACE_QEMU_RDMA_EXCHANGE_GET_RESPONSE_NONE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_exchange_get_response_none(const char *desc, int type) {
+ (void)desc;
+ (void)type;
+}
+#define TRACE_QEMU_RDMA_EXCHANGE_GET_RESPONSE_START 0
+#define TRACE_QEMU_RDMA_EXCHANGE_GET_RESPONSE_START_ENABLED 0
+#define TRACE_QEMU_RDMA_EXCHANGE_GET_RESPONSE_START_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_exchange_get_response_start(const char *desc) {
+ (void)desc;
+}
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_ISSUE_CALLBACK 0
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_ISSUE_CALLBACK_ENABLED 0
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_ISSUE_CALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_exchange_send_issue_callback(void) {
+}
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_RECEIVED 0
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_RECEIVED_ENABLED 0
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_RECEIVED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_exchange_send_received(const char *desc) {
+ (void)desc;
+}
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_WAITING 0
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_WAITING_ENABLED 0
+#define TRACE_QEMU_RDMA_EXCHANGE_SEND_WAITING_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_exchange_send_waiting(const char *desc) {
+ (void)desc;
+}
+#define TRACE_QEMU_RDMA_FILL 0
+#define TRACE_QEMU_RDMA_FILL_ENABLED 0
+#define TRACE_QEMU_RDMA_FILL_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_fill(size_t control_len, size_t size) {
+ (void)control_len;
+ (void)size;
+}
+#define TRACE_QEMU_RDMA_INIT_RAM_BLOCKS 0
+#define TRACE_QEMU_RDMA_INIT_RAM_BLOCKS_ENABLED 0
+#define TRACE_QEMU_RDMA_INIT_RAM_BLOCKS_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_init_ram_blocks(int blocks) {
+ (void)blocks;
+}
+#define TRACE_QEMU_RDMA_POLL_OTHER 0
+#define TRACE_QEMU_RDMA_POLL_OTHER_ENABLED 0
+#define TRACE_QEMU_RDMA_POLL_OTHER_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_poll_other(uint64_t comp, int left) {
+ (void)comp;
+ (void)left;
+}
+#define TRACE_QEMU_RDMA_POLL_RECV 0
+#define TRACE_QEMU_RDMA_POLL_RECV_ENABLED 0
+#define TRACE_QEMU_RDMA_POLL_RECV_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_poll_recv(uint64_t comp, int64_t id, int sent) {
+ (void)comp;
+ (void)id;
+ (void)sent;
+}
+#define TRACE_QEMU_RDMA_POLL_WRITE 0
+#define TRACE_QEMU_RDMA_POLL_WRITE_ENABLED 0
+#define TRACE_QEMU_RDMA_POLL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_poll_write(uint64_t comp, int left, uint64_t block, uint64_t chunk, void *local, void *remote) {
+ (void)comp;
+ (void)left;
+ (void)block;
+ (void)chunk;
+ (void)local;
+ (void)remote;
+}
+#define TRACE_QEMU_RDMA_POST_SEND_CONTROL 0
+#define TRACE_QEMU_RDMA_POST_SEND_CONTROL_ENABLED 0
+#define TRACE_QEMU_RDMA_POST_SEND_CONTROL_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_post_send_control(const char *desc) {
+ (void)desc;
+}
+#define TRACE_QEMU_RDMA_REGISTER_AND_GET_KEYS 0
+#define TRACE_QEMU_RDMA_REGISTER_AND_GET_KEYS_ENABLED 0
+#define TRACE_QEMU_RDMA_REGISTER_AND_GET_KEYS_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_register_and_get_keys(uint64_t len, void *start) {
+ (void)len;
+ (void)start;
+}
+#define TRACE_QEMU_RDMA_REGISTER_ODP_MR 0
+#define TRACE_QEMU_RDMA_REGISTER_ODP_MR_ENABLED 0
+#define TRACE_QEMU_RDMA_REGISTER_ODP_MR_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_register_odp_mr(const char *name) {
+ (void)name;
+}
+#define TRACE_QEMU_RDMA_RESOLVE_HOST_TRYING 0
+#define TRACE_QEMU_RDMA_RESOLVE_HOST_TRYING_ENABLED 0
+#define TRACE_QEMU_RDMA_RESOLVE_HOST_TRYING_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_resolve_host_trying(const char *host, const char *ip) {
+ (void)host;
+ (void)ip;
+}
+#define TRACE_QEMU_RDMA_SIGNAL_UNREGISTER_ALREADY 0
+#define TRACE_QEMU_RDMA_SIGNAL_UNREGISTER_ALREADY_ENABLED 0
+#define TRACE_QEMU_RDMA_SIGNAL_UNREGISTER_ALREADY_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_signal_unregister_already(uint64_t chunk) {
+ (void)chunk;
+}
+#define TRACE_QEMU_RDMA_SIGNAL_UNREGISTER_APPEND 0
+#define TRACE_QEMU_RDMA_SIGNAL_UNREGISTER_APPEND_ENABLED 0
+#define TRACE_QEMU_RDMA_SIGNAL_UNREGISTER_APPEND_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_signal_unregister_append(uint64_t chunk, int pos) {
+ (void)chunk;
+ (void)pos;
+}
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_COMPLETE 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_COMPLETE_ENABLED 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_unregister_waiting_complete(uint64_t chunk) {
+ (void)chunk;
+}
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_INFLIGHT 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_INFLIGHT_ENABLED 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_INFLIGHT_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_unregister_waiting_inflight(uint64_t chunk) {
+ (void)chunk;
+}
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_PROC 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_PROC_ENABLED 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_PROC_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_unregister_waiting_proc(uint64_t chunk, int pos) {
+ (void)chunk;
+ (void)pos;
+}
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_SEND 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_SEND_ENABLED 0
+#define TRACE_QEMU_RDMA_UNREGISTER_WAITING_SEND_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_unregister_waiting_send(uint64_t chunk) {
+ (void)chunk;
+}
+#define TRACE_QEMU_RDMA_WRITE_FLUSH 0
+#define TRACE_QEMU_RDMA_WRITE_FLUSH_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_FLUSH_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_flush(int sent) {
+ (void)sent;
+}
+#define TRACE_QEMU_RDMA_WRITE_ONE_BLOCK 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_BLOCK_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_one_block(int count, int block, uint64_t chunk, uint64_t current, uint64_t len, int nb_sent, int nb_chunks) {
+ (void)count;
+ (void)block;
+ (void)chunk;
+ (void)current;
+ (void)len;
+ (void)nb_sent;
+ (void)nb_chunks;
+}
+#define TRACE_QEMU_RDMA_WRITE_ONE_POST 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_POST_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_POST_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_one_post(uint64_t chunk, long addr, long remote, uint32_t len) {
+ (void)chunk;
+ (void)addr;
+ (void)remote;
+ (void)len;
+}
+#define TRACE_QEMU_RDMA_WRITE_ONE_QUEUE_FULL 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_QUEUE_FULL_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_QUEUE_FULL_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_one_queue_full(void) {
+}
+#define TRACE_QEMU_RDMA_WRITE_ONE_RECVREGRES 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_RECVREGRES_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_RECVREGRES_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_one_recvregres(int mykey, int theirkey, uint64_t chunk) {
+ (void)mykey;
+ (void)theirkey;
+ (void)chunk;
+}
+#define TRACE_QEMU_RDMA_WRITE_ONE_SENDREG 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_SENDREG_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_SENDREG_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_one_sendreg(uint64_t chunk, int len, int index, int64_t offset) {
+ (void)chunk;
+ (void)len;
+ (void)index;
+ (void)offset;
+}
+#define TRACE_QEMU_RDMA_WRITE_ONE_TOP 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_TOP_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_TOP_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_one_top(uint64_t chunks, uint64_t size) {
+ (void)chunks;
+ (void)size;
+}
+#define TRACE_QEMU_RDMA_WRITE_ONE_ZERO 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_ZERO_ENABLED 0
+#define TRACE_QEMU_RDMA_WRITE_ONE_ZERO_BACKEND_DSTATE() (0)
+static inline void trace_qemu_rdma_write_one_zero(uint64_t chunk, int len, int index, int64_t offset) {
+ (void)chunk;
+ (void)len;
+ (void)index;
+ (void)offset;
+}
+#define TRACE_QEMU_SAVEVM_SEND_PACKAGED 0
+#define TRACE_QEMU_SAVEVM_SEND_PACKAGED_ENABLED 0
+#define TRACE_QEMU_SAVEVM_SEND_PACKAGED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_savevm_send_packaged(void) {
+}
+#define TRACE_QEMU_SAVEVM_SEND_POSTCOPY_ADVISE 0
+#define TRACE_QEMU_SAVEVM_SEND_POSTCOPY_ADVISE_ENABLED 0
+#define TRACE_QEMU_SAVEVM_SEND_POSTCOPY_ADVISE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_savevm_send_postcopy_advise(void) {
+}
+#define TRACE_QEMU_SAVEVM_SEND_POSTCOPY_RAM_DISCARD 0
+#define TRACE_QEMU_SAVEVM_SEND_POSTCOPY_RAM_DISCARD_ENABLED 0
+#define TRACE_QEMU_SAVEVM_SEND_POSTCOPY_RAM_DISCARD_BACKEND_DSTATE() (0)
+static inline void trace_qemu_savevm_send_postcopy_ram_discard(const char *id, uint16_t len) {
+ (void)id;
+ (void)len;
+}
+#define TRACE_QUERY_DIRTY_RATE_INFO 0
+#define TRACE_QUERY_DIRTY_RATE_INFO_ENABLED 0
+#define TRACE_QUERY_DIRTY_RATE_INFO_BACKEND_DSTATE() (0)
+static inline void trace_query_dirty_rate_info(const char *new_state) {
+ (void)new_state;
+}
+#define TRACE_RAM_DIRTY_BITMAP_RELOAD_BEGIN 0
+#define TRACE_RAM_DIRTY_BITMAP_RELOAD_BEGIN_ENABLED 0
+#define TRACE_RAM_DIRTY_BITMAP_RELOAD_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_ram_dirty_bitmap_reload_begin(char *str) {
+ (void)str;
+}
+#define TRACE_RAM_DIRTY_BITMAP_RELOAD_COMPLETE 0
+#define TRACE_RAM_DIRTY_BITMAP_RELOAD_COMPLETE_ENABLED 0
+#define TRACE_RAM_DIRTY_BITMAP_RELOAD_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_ram_dirty_bitmap_reload_complete(char *str) {
+ (void)str;
+}
+#define TRACE_RAM_DIRTY_BITMAP_REQUEST 0
+#define TRACE_RAM_DIRTY_BITMAP_REQUEST_ENABLED 0
+#define TRACE_RAM_DIRTY_BITMAP_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_ram_dirty_bitmap_request(char *str) {
+ (void)str;
+}
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_COMPLETE 0
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_COMPLETE_ENABLED 0
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_ram_dirty_bitmap_sync_complete(void) {
+}
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_START 0
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_START_ENABLED 0
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_START_BACKEND_DSTATE() (0)
+static inline void trace_ram_dirty_bitmap_sync_start(void) {
+}
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_WAIT 0
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_WAIT_ENABLED 0
+#define TRACE_RAM_DIRTY_BITMAP_SYNC_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_ram_dirty_bitmap_sync_wait(void) {
+}
+#define TRACE_RAM_DISCARD_RANGE 0
+#define TRACE_RAM_DISCARD_RANGE_ENABLED 0
+#define TRACE_RAM_DISCARD_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_ram_discard_range(const char *rbname, uint64_t start, size_t len) {
+ (void)rbname;
+ (void)start;
+ (void)len;
+}
+#define TRACE_RAM_LOAD_COMPLETE 0
+#define TRACE_RAM_LOAD_COMPLETE_ENABLED 0
+#define TRACE_RAM_LOAD_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_ram_load_complete(int ret, uint64_t seq_iter) {
+ (void)ret;
+ (void)seq_iter;
+}
+#define TRACE_RAM_LOAD_LOOP 0
+#define TRACE_RAM_LOAD_LOOP_ENABLED 0
+#define TRACE_RAM_LOAD_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_ram_load_loop(const char *rbname, uint64_t addr, int flags, void *host) {
+ (void)rbname;
+ (void)addr;
+ (void)flags;
+ (void)host;
+}
+#define TRACE_RAM_LOAD_POSTCOPY_LOOP 0
+#define TRACE_RAM_LOAD_POSTCOPY_LOOP_ENABLED 0
+#define TRACE_RAM_LOAD_POSTCOPY_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_ram_load_postcopy_loop(int channel, uint64_t addr, int flags) {
+ (void)channel;
+ (void)addr;
+ (void)flags;
+}
+#define TRACE_RAM_LOAD_START 0
+#define TRACE_RAM_LOAD_START_ENABLED 0
+#define TRACE_RAM_LOAD_START_BACKEND_DSTATE() (0)
+static inline void trace_ram_load_start(void) {
+}
+#define TRACE_RAM_POSTCOPY_SEND_DISCARD_BITMAP 0
+#define TRACE_RAM_POSTCOPY_SEND_DISCARD_BITMAP_ENABLED 0
+#define TRACE_RAM_POSTCOPY_SEND_DISCARD_BITMAP_BACKEND_DSTATE() (0)
+static inline void trace_ram_postcopy_send_discard_bitmap(void) {
+}
+#define TRACE_RAM_SAVE_COMPLETE 0
+#define TRACE_RAM_SAVE_COMPLETE_ENABLED 0
+#define TRACE_RAM_SAVE_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_ram_save_complete(uint64_t dirty_pages, int done) {
+ (void)dirty_pages;
+ (void)done;
+}
+#define TRACE_RAM_SAVE_ITERATE_BIG_WAIT 0
+#define TRACE_RAM_SAVE_ITERATE_BIG_WAIT_ENABLED 0
+#define TRACE_RAM_SAVE_ITERATE_BIG_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_ram_save_iterate_big_wait(uint64_t milliconds, int iterations) {
+ (void)milliconds;
+ (void)iterations;
+}
+#define TRACE_RAM_SAVE_PAGE 0
+#define TRACE_RAM_SAVE_PAGE_ENABLED 0
+#define TRACE_RAM_SAVE_PAGE_BACKEND_DSTATE() (0)
+static inline void trace_ram_save_page(const char *rbname, uint64_t offset, void *host) {
+ (void)rbname;
+ (void)offset;
+ (void)host;
+}
+#define TRACE_RAM_SAVE_QUEUE_PAGES 0
+#define TRACE_RAM_SAVE_QUEUE_PAGES_ENABLED 0
+#define TRACE_RAM_SAVE_QUEUE_PAGES_BACKEND_DSTATE() (0)
+static inline void trace_ram_save_queue_pages(const char *rbname, size_t start, size_t len) {
+ (void)rbname;
+ (void)start;
+ (void)len;
+}
+#define TRACE_RAM_STATE_RESUME_PREPARE 0
+#define TRACE_RAM_STATE_RESUME_PREPARE_ENABLED 0
+#define TRACE_RAM_STATE_RESUME_PREPARE_BACKEND_DSTATE() (0)
+static inline void trace_ram_state_resume_prepare(uint64_t v) {
+ (void)v;
+}
+#define TRACE_RAM_WRITE_TRACKING_RAMBLOCK_START 0
+#define TRACE_RAM_WRITE_TRACKING_RAMBLOCK_START_ENABLED 0
+#define TRACE_RAM_WRITE_TRACKING_RAMBLOCK_START_BACKEND_DSTATE() (0)
+static inline void trace_ram_write_tracking_ramblock_start(const char *block_id, size_t page_size, void *addr, size_t length) {
+ (void)block_id;
+ (void)page_size;
+ (void)addr;
+ (void)length;
+}
+#define TRACE_RAM_WRITE_TRACKING_RAMBLOCK_STOP 0
+#define TRACE_RAM_WRITE_TRACKING_RAMBLOCK_STOP_ENABLED 0
+#define TRACE_RAM_WRITE_TRACKING_RAMBLOCK_STOP_BACKEND_DSTATE() (0)
+static inline void trace_ram_write_tracking_ramblock_stop(const char *block_id, size_t page_size, void *addr, size_t length) {
+ (void)block_id;
+ (void)page_size;
+ (void)addr;
+ (void)length;
+}
+#define TRACE_RDMA_ADD_BLOCK 0
+#define TRACE_RDMA_ADD_BLOCK_ENABLED 0
+#define TRACE_RDMA_ADD_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_rdma_add_block(const char *block_name, int block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) {
+ (void)block_name;
+ (void)block;
+ (void)addr;
+ (void)offset;
+ (void)len;
+ (void)end;
+ (void)bits;
+ (void)chunks;
+}
+#define TRACE_RDMA_BLOCK_NOTIFICATION_HANDLE 0
+#define TRACE_RDMA_BLOCK_NOTIFICATION_HANDLE_ENABLED 0
+#define TRACE_RDMA_BLOCK_NOTIFICATION_HANDLE_BACKEND_DSTATE() (0)
+static inline void trace_rdma_block_notification_handle(const char *name, int index) {
+ (void)name;
+ (void)index;
+}
+#define TRACE_RDMA_DELETE_BLOCK 0
+#define TRACE_RDMA_DELETE_BLOCK_ENABLED 0
+#define TRACE_RDMA_DELETE_BLOCK_BACKEND_DSTATE() (0)
+static inline void trace_rdma_delete_block(void *block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) {
+ (void)block;
+ (void)addr;
+ (void)offset;
+ (void)len;
+ (void)end;
+ (void)bits;
+ (void)chunks;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_COMPRESS 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_COMPRESS_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_COMPRESS_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_compress(int64_t length, int index, int64_t offset) {
+ (void)length;
+ (void)index;
+ (void)offset;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_FINISHED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_FINISHED_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_FINISHED_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_finished(void) {
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_RAM_BLOCKS 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_RAM_BLOCKS_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_RAM_BLOCKS_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_ram_blocks(void) {
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_RAM_BLOCKS_LOOP 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_RAM_BLOCKS_LOOP_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_RAM_BLOCKS_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_ram_blocks_loop(const char *name, uint64_t offset, uint64_t length, void *local_host_addr, unsigned int src_index) {
+ (void)name;
+ (void)offset;
+ (void)length;
+ (void)local_host_addr;
+ (void)src_index;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_register(int requests) {
+ (void)requests;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_LOOP 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_LOOP_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_register_loop(int req, int index, uint64_t addr, uint64_t chunks) {
+ (void)req;
+ (void)index;
+ (void)addr;
+ (void)chunks;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_RKEY 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_RKEY_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_REGISTER_RKEY_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_register_rkey(int rkey) {
+ (void)rkey;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_unregister(int requests) {
+ (void)requests;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_LOOP 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_LOOP_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_unregister_loop(int count, int index, uint64_t chunk) {
+ (void)count;
+ (void)index;
+ (void)chunk;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_SUCCESS 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_SUCCESS_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_UNREGISTER_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_unregister_success(uint64_t chunk) {
+ (void)chunk;
+}
+#define TRACE_RDMA_REGISTRATION_HANDLE_WAIT 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_WAIT_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_HANDLE_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_handle_wait(void) {
+}
+#define TRACE_RDMA_REGISTRATION_START 0
+#define TRACE_RDMA_REGISTRATION_START_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_START_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_start(uint64_t flags) {
+ (void)flags;
+}
+#define TRACE_RDMA_REGISTRATION_STOP 0
+#define TRACE_RDMA_REGISTRATION_STOP_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_STOP_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_stop(uint64_t flags) {
+ (void)flags;
+}
+#define TRACE_RDMA_REGISTRATION_STOP_RAM 0
+#define TRACE_RDMA_REGISTRATION_STOP_RAM_ENABLED 0
+#define TRACE_RDMA_REGISTRATION_STOP_RAM_BACKEND_DSTATE() (0)
+static inline void trace_rdma_registration_stop_ram(void) {
+}
+#define TRACE_RDMA_START_INCOMING_MIGRATION 0
+#define TRACE_RDMA_START_INCOMING_MIGRATION_ENABLED 0
+#define TRACE_RDMA_START_INCOMING_MIGRATION_BACKEND_DSTATE() (0)
+static inline void trace_rdma_start_incoming_migration(void) {
+}
+#define TRACE_RDMA_START_INCOMING_MIGRATION_AFTER_DEST_INIT 0
+#define TRACE_RDMA_START_INCOMING_MIGRATION_AFTER_DEST_INIT_ENABLED 0
+#define TRACE_RDMA_START_INCOMING_MIGRATION_AFTER_DEST_INIT_BACKEND_DSTATE() (0)
+static inline void trace_rdma_start_incoming_migration_after_dest_init(void) {
+}
+#define TRACE_RDMA_START_INCOMING_MIGRATION_AFTER_RDMA_LISTEN 0
+#define TRACE_RDMA_START_INCOMING_MIGRATION_AFTER_RDMA_LISTEN_ENABLED 0
+#define TRACE_RDMA_START_INCOMING_MIGRATION_AFTER_RDMA_LISTEN_BACKEND_DSTATE() (0)
+static inline void trace_rdma_start_incoming_migration_after_rdma_listen(void) {
+}
+#define TRACE_RDMA_START_OUTGOING_MIGRATION_AFTER_RDMA_CONNECT 0
+#define TRACE_RDMA_START_OUTGOING_MIGRATION_AFTER_RDMA_CONNECT_ENABLED 0
+#define TRACE_RDMA_START_OUTGOING_MIGRATION_AFTER_RDMA_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_rdma_start_outgoing_migration_after_rdma_connect(void) {
+}
+#define TRACE_RDMA_START_OUTGOING_MIGRATION_AFTER_RDMA_SOURCE_INIT 0
+#define TRACE_RDMA_START_OUTGOING_MIGRATION_AFTER_RDMA_SOURCE_INIT_ENABLED 0
+#define TRACE_RDMA_START_OUTGOING_MIGRATION_AFTER_RDMA_SOURCE_INIT_BACKEND_DSTATE() (0)
+static inline void trace_rdma_start_outgoing_migration_after_rdma_source_init(void) {
+}
+#define TRACE_SAVE_XBZRLE_PAGE_OVERFLOW 0
+#define TRACE_SAVE_XBZRLE_PAGE_OVERFLOW_ENABLED 0
+#define TRACE_SAVE_XBZRLE_PAGE_OVERFLOW_BACKEND_DSTATE() (0)
+static inline void trace_save_xbzrle_page_overflow(void) {
+}
+#define TRACE_SAVE_XBZRLE_PAGE_SKIPPING 0
+#define TRACE_SAVE_XBZRLE_PAGE_SKIPPING_ENABLED 0
+#define TRACE_SAVE_XBZRLE_PAGE_SKIPPING_BACKEND_DSTATE() (0)
+static inline void trace_save_xbzrle_page_skipping(void) {
+}
+#define TRACE_SAVEVM_COMMAND_SEND 0
+#define TRACE_SAVEVM_COMMAND_SEND_ENABLED 0
+#define TRACE_SAVEVM_COMMAND_SEND_BACKEND_DSTATE() (0)
+static inline void trace_savevm_command_send(uint16_t command, uint16_t len) {
+ (void)command;
+ (void)len;
+}
+#define TRACE_SAVEVM_SECTION_END 0
+#define TRACE_SAVEVM_SECTION_END_ENABLED 0
+#define TRACE_SAVEVM_SECTION_END_BACKEND_DSTATE() (0)
+static inline void trace_savevm_section_end(const char *id, unsigned int section_id, int ret) {
+ (void)id;
+ (void)section_id;
+ (void)ret;
+}
+#define TRACE_SAVEVM_SECTION_SKIP 0
+#define TRACE_SAVEVM_SECTION_SKIP_ENABLED 0
+#define TRACE_SAVEVM_SECTION_SKIP_BACKEND_DSTATE() (0)
+static inline void trace_savevm_section_skip(const char *id, unsigned int section_id) {
+ (void)id;
+ (void)section_id;
+}
+#define TRACE_SAVEVM_SECTION_START 0
+#define TRACE_SAVEVM_SECTION_START_ENABLED 0
+#define TRACE_SAVEVM_SECTION_START_BACKEND_DSTATE() (0)
+static inline void trace_savevm_section_start(const char *id, unsigned int section_id) {
+ (void)id;
+ (void)section_id;
+}
+#define TRACE_SAVEVM_SEND_COLO_ENABLE 0
+#define TRACE_SAVEVM_SEND_COLO_ENABLE_ENABLED 0
+#define TRACE_SAVEVM_SEND_COLO_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_colo_enable(void) {
+}
+#define TRACE_SAVEVM_SEND_OPEN_RETURN_PATH 0
+#define TRACE_SAVEVM_SEND_OPEN_RETURN_PATH_ENABLED 0
+#define TRACE_SAVEVM_SEND_OPEN_RETURN_PATH_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_open_return_path(void) {
+}
+#define TRACE_SAVEVM_SEND_PING 0
+#define TRACE_SAVEVM_SEND_PING_ENABLED 0
+#define TRACE_SAVEVM_SEND_PING_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_ping(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SAVEVM_SEND_POSTCOPY_LISTEN 0
+#define TRACE_SAVEVM_SEND_POSTCOPY_LISTEN_ENABLED 0
+#define TRACE_SAVEVM_SEND_POSTCOPY_LISTEN_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_postcopy_listen(void) {
+}
+#define TRACE_SAVEVM_SEND_POSTCOPY_RESUME 0
+#define TRACE_SAVEVM_SEND_POSTCOPY_RESUME_ENABLED 0
+#define TRACE_SAVEVM_SEND_POSTCOPY_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_postcopy_resume(void) {
+}
+#define TRACE_SAVEVM_SEND_POSTCOPY_RUN 0
+#define TRACE_SAVEVM_SEND_POSTCOPY_RUN_ENABLED 0
+#define TRACE_SAVEVM_SEND_POSTCOPY_RUN_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_postcopy_run(void) {
+}
+#define TRACE_SAVEVM_SEND_RECV_BITMAP 0
+#define TRACE_SAVEVM_SEND_RECV_BITMAP_ENABLED 0
+#define TRACE_SAVEVM_SEND_RECV_BITMAP_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_recv_bitmap(char *name) {
+ (void)name;
+}
+#define TRACE_SAVEVM_SEND_SWITCHOVER_START 0
+#define TRACE_SAVEVM_SEND_SWITCHOVER_START_ENABLED 0
+#define TRACE_SAVEVM_SEND_SWITCHOVER_START_BACKEND_DSTATE() (0)
+static inline void trace_savevm_send_switchover_start(void) {
+}
+#define TRACE_SAVEVM_STATE_CLEANUP 0
+#define TRACE_SAVEVM_STATE_CLEANUP_ENABLED 0
+#define TRACE_SAVEVM_STATE_CLEANUP_BACKEND_DSTATE() (0)
+static inline void trace_savevm_state_cleanup(void) {
+}
+#define TRACE_SAVEVM_STATE_HEADER 0
+#define TRACE_SAVEVM_STATE_HEADER_ENABLED 0
+#define TRACE_SAVEVM_STATE_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_savevm_state_header(void) {
+}
+#define TRACE_SAVEVM_STATE_ITERATE 0
+#define TRACE_SAVEVM_STATE_ITERATE_ENABLED 0
+#define TRACE_SAVEVM_STATE_ITERATE_BACKEND_DSTATE() (0)
+static inline void trace_savevm_state_iterate(void) {
+}
+#define TRACE_SAVEVM_STATE_RESUME_PREPARE 0
+#define TRACE_SAVEVM_STATE_RESUME_PREPARE_ENABLED 0
+#define TRACE_SAVEVM_STATE_RESUME_PREPARE_BACKEND_DSTATE() (0)
+static inline void trace_savevm_state_resume_prepare(void) {
+}
+#define TRACE_SAVEVM_STATE_SETUP 0
+#define TRACE_SAVEVM_STATE_SETUP_ENABLED 0
+#define TRACE_SAVEVM_STATE_SETUP_BACKEND_DSTATE() (0)
+static inline void trace_savevm_state_setup(void) {
+}
+#define TRACE_SEND_BITMAP_BITS 0
+#define TRACE_SEND_BITMAP_BITS_ENABLED 0
+#define TRACE_SEND_BITMAP_BITS_BACKEND_DSTATE() (0)
+static inline void trace_send_bitmap_bits(uint32_t flags, uint64_t start_sector, uint32_t nr_sectors, uint64_t data_size) {
+ (void)flags;
+ (void)start_sector;
+ (void)nr_sectors;
+ (void)data_size;
+}
+#define TRACE_SEND_BITMAP_HEADER_ENTER 0
+#define TRACE_SEND_BITMAP_HEADER_ENTER_ENABLED 0
+#define TRACE_SEND_BITMAP_HEADER_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_send_bitmap_header_enter(void) {
+}
+#define TRACE_SKIP_SAMPLE_RAMBLOCK 0
+#define TRACE_SKIP_SAMPLE_RAMBLOCK_ENABLED 0
+#define TRACE_SKIP_SAMPLE_RAMBLOCK_BACKEND_DSTATE() (0)
+static inline void trace_skip_sample_ramblock(const char *idstr, uint64_t ramblock_size) {
+ (void)idstr;
+ (void)ramblock_size;
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_BAD_END 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_BAD_END_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_BAD_END_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_bad_end(void) {
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_END 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_END_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_END_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_end(void) {
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_ENTRY 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_ENTRY_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_entry(void) {
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_LOOP_TOP 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_LOOP_TOP_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_LOOP_TOP_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_loop_top(void) {
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_PONG 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_PONG_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_PONG_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_pong(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_POSTCOPY_PACKAGE_LOADED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_POSTCOPY_PACKAGE_LOADED_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_POSTCOPY_PACKAGE_LOADED_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_postcopy_package_loaded(void) {
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_RESUME_ACK 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_RESUME_ACK_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_RESUME_ACK_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_resume_ack(uint32_t v) {
+ (void)v;
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_SHUT 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_SHUT_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_SHUT_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_shut(uint32_t val) {
+ (void)val;
+}
+#define TRACE_SOURCE_RETURN_PATH_THREAD_SWITCHOVER_ACKED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_SWITCHOVER_ACKED_ENABLED 0
+#define TRACE_SOURCE_RETURN_PATH_THREAD_SWITCHOVER_ACKED_BACKEND_DSTATE() (0)
+static inline void trace_source_return_path_thread_switchover_acked(void) {
+}
+#define TRACE_VMSTATE_DOWNTIME_CHECKPOINT 0
+#define TRACE_VMSTATE_DOWNTIME_CHECKPOINT_ENABLED 0
+#define TRACE_VMSTATE_DOWNTIME_CHECKPOINT_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_downtime_checkpoint(const char *checkpoint) {
+ (void)checkpoint;
+}
+#define TRACE_VMSTATE_DOWNTIME_LOAD 0
+#define TRACE_VMSTATE_DOWNTIME_LOAD_ENABLED 0
+#define TRACE_VMSTATE_DOWNTIME_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_downtime_load(const char *type, const char *idstr, uint32_t instance_id, int64_t downtime) {
+ (void)type;
+ (void)idstr;
+ (void)instance_id;
+ (void)downtime;
+}
+#define TRACE_VMSTATE_DOWNTIME_SAVE 0
+#define TRACE_VMSTATE_DOWNTIME_SAVE_ENABLED 0
+#define TRACE_VMSTATE_DOWNTIME_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_downtime_save(const char *type, const char *idstr, uint32_t instance_id, int64_t downtime) {
+ (void)type;
+ (void)idstr;
+ (void)instance_id;
+ (void)downtime;
+}
+#define TRACE_VMSTATE_FIELD_EXISTS 0
+#define TRACE_VMSTATE_FIELD_EXISTS_ENABLED 0
+#define TRACE_VMSTATE_FIELD_EXISTS_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_field_exists(const char *vmsd, const char *name, int field_version, int version, int result) {
+ (void)vmsd;
+ (void)name;
+ (void)field_version;
+ (void)version;
+ (void)result;
+}
+#define TRACE_VMSTATE_LOAD 0
+#define TRACE_VMSTATE_LOAD_ENABLED 0
+#define TRACE_VMSTATE_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_load(const char *idstr, const char *vmsd_name) {
+ (void)idstr;
+ (void)vmsd_name;
+}
+#define TRACE_VMSTATE_LOAD_FIELD_ERROR 0
+#define TRACE_VMSTATE_LOAD_FIELD_ERROR_ENABLED 0
+#define TRACE_VMSTATE_LOAD_FIELD_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_load_field_error(const char *field, int ret) {
+ (void)field;
+ (void)ret;
+}
+#define TRACE_VMSTATE_LOAD_STATE 0
+#define TRACE_VMSTATE_LOAD_STATE_ENABLED 0
+#define TRACE_VMSTATE_LOAD_STATE_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_load_state(const char *name, int version_id) {
+ (void)name;
+ (void)version_id;
+}
+#define TRACE_VMSTATE_LOAD_STATE_END 0
+#define TRACE_VMSTATE_LOAD_STATE_END_ENABLED 0
+#define TRACE_VMSTATE_LOAD_STATE_END_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_load_state_end(const char *name, const char *reason, int val) {
+ (void)name;
+ (void)reason;
+ (void)val;
+}
+#define TRACE_VMSTATE_LOAD_STATE_FIELD 0
+#define TRACE_VMSTATE_LOAD_STATE_FIELD_ENABLED 0
+#define TRACE_VMSTATE_LOAD_STATE_FIELD_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_load_state_field(const char *name, const char *field, bool exists) {
+ (void)name;
+ (void)field;
+ (void)exists;
+}
+#define TRACE_VMSTATE_N_ELEMS 0
+#define TRACE_VMSTATE_N_ELEMS_ENABLED 0
+#define TRACE_VMSTATE_N_ELEMS_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_n_elems(const char *name, int n_elems) {
+ (void)name;
+ (void)n_elems;
+}
+#define TRACE_VMSTATE_SAVE 0
+#define TRACE_VMSTATE_SAVE_ENABLED 0
+#define TRACE_VMSTATE_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_save(const char *idstr, const char *vmsd_name) {
+ (void)idstr;
+ (void)vmsd_name;
+}
+#define TRACE_VMSTATE_SAVE_STATE_LOOP 0
+#define TRACE_VMSTATE_SAVE_STATE_LOOP_ENABLED 0
+#define TRACE_VMSTATE_SAVE_STATE_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_save_state_loop(const char *name, const char *field, int n_elems) {
+ (void)name;
+ (void)field;
+ (void)n_elems;
+}
+#define TRACE_VMSTATE_SAVE_STATE_PRE_SAVE_RES 0
+#define TRACE_VMSTATE_SAVE_STATE_PRE_SAVE_RES_ENABLED 0
+#define TRACE_VMSTATE_SAVE_STATE_PRE_SAVE_RES_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_save_state_pre_save_res(const char *name, int res) {
+ (void)name;
+ (void)res;
+}
+#define TRACE_VMSTATE_SAVE_STATE_TOP 0
+#define TRACE_VMSTATE_SAVE_STATE_TOP_ENABLED 0
+#define TRACE_VMSTATE_SAVE_STATE_TOP_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_save_state_top(const char *idstr) {
+ (void)idstr;
+}
+#define TRACE_VMSTATE_SUBSECTION_LOAD 0
+#define TRACE_VMSTATE_SUBSECTION_LOAD_ENABLED 0
+#define TRACE_VMSTATE_SUBSECTION_LOAD_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_subsection_load(const char *parent) {
+ (void)parent;
+}
+#define TRACE_VMSTATE_SUBSECTION_LOAD_BAD 0
+#define TRACE_VMSTATE_SUBSECTION_LOAD_BAD_ENABLED 0
+#define TRACE_VMSTATE_SUBSECTION_LOAD_BAD_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_subsection_load_bad(const char *parent, const char *sub, const char *sub2) {
+ (void)parent;
+ (void)sub;
+ (void)sub2;
+}
+#define TRACE_VMSTATE_SUBSECTION_LOAD_GOOD 0
+#define TRACE_VMSTATE_SUBSECTION_LOAD_GOOD_ENABLED 0
+#define TRACE_VMSTATE_SUBSECTION_LOAD_GOOD_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_subsection_load_good(const char *parent) {
+ (void)parent;
+}
+#define TRACE_VMSTATE_SUBSECTION_SAVE_LOOP 0
+#define TRACE_VMSTATE_SUBSECTION_SAVE_LOOP_ENABLED 0
+#define TRACE_VMSTATE_SUBSECTION_SAVE_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_subsection_save_loop(const char *name, const char *sub) {
+ (void)name;
+ (void)sub;
+}
+#define TRACE_VMSTATE_SUBSECTION_SAVE_TOP 0
+#define TRACE_VMSTATE_SUBSECTION_SAVE_TOP_ENABLED 0
+#define TRACE_VMSTATE_SUBSECTION_SAVE_TOP_BACKEND_DSTATE() (0)
+static inline void trace_vmstate_subsection_save_top(const char *idstr) {
+ (void)idstr;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-monitor.h b/trace/trace-monitor.h
new file mode 100644
index 0000000000..1aa40a409d
--- /dev/null
+++ b/trace/trace-monitor.h
@@ -0,0 +1,96 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_MONITOR_H
+#define TRACE_TRACE_MONITOR_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_HANDLE_HMP_COMMAND 0
+#define TRACE_HANDLE_HMP_COMMAND_ENABLED 0
+#define TRACE_HANDLE_HMP_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_handle_hmp_command(void *mon, const char *cmdline) {
+ (void)mon;
+ (void)cmdline;
+}
+#define TRACE_HANDLE_QMP_COMMAND 0
+#define TRACE_HANDLE_QMP_COMMAND_ENABLED 0
+#define TRACE_HANDLE_QMP_COMMAND_BACKEND_DSTATE() (0)
+static inline void trace_handle_qmp_command(void *mon, const char *req) {
+ (void)mon;
+ (void)req;
+}
+#define TRACE_MONITOR_PROTOCOL_EVENT_EMIT 0
+#define TRACE_MONITOR_PROTOCOL_EVENT_EMIT_ENABLED 0
+#define TRACE_MONITOR_PROTOCOL_EVENT_EMIT_BACKEND_DSTATE() (0)
+static inline void trace_monitor_protocol_event_emit(uint32_t event, void *data) {
+ (void)event;
+ (void)data;
+}
+#define TRACE_MONITOR_PROTOCOL_EVENT_HANDLER 0
+#define TRACE_MONITOR_PROTOCOL_EVENT_HANDLER_ENABLED 0
+#define TRACE_MONITOR_PROTOCOL_EVENT_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_monitor_protocol_event_handler(uint32_t event, void *qdict) {
+ (void)event;
+ (void)qdict;
+}
+#define TRACE_MONITOR_PROTOCOL_EVENT_QUEUE 0
+#define TRACE_MONITOR_PROTOCOL_EVENT_QUEUE_ENABLED 0
+#define TRACE_MONITOR_PROTOCOL_EVENT_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) {
+ (void)event;
+ (void)qdict;
+ (void)rate;
+}
+#define TRACE_MONITOR_QMP_CMD_IN_BAND 0
+#define TRACE_MONITOR_QMP_CMD_IN_BAND_ENABLED 0
+#define TRACE_MONITOR_QMP_CMD_IN_BAND_BACKEND_DSTATE() (0)
+static inline void trace_monitor_qmp_cmd_in_band(const char *id) {
+ (void)id;
+}
+#define TRACE_MONITOR_QMP_CMD_OUT_OF_BAND 0
+#define TRACE_MONITOR_QMP_CMD_OUT_OF_BAND_ENABLED 0
+#define TRACE_MONITOR_QMP_CMD_OUT_OF_BAND_BACKEND_DSTATE() (0)
+static inline void trace_monitor_qmp_cmd_out_of_band(const char *id) {
+ (void)id;
+}
+#define TRACE_MONITOR_QMP_ERR_IN_BAND 0
+#define TRACE_MONITOR_QMP_ERR_IN_BAND_ENABLED 0
+#define TRACE_MONITOR_QMP_ERR_IN_BAND_BACKEND_DSTATE() (0)
+static inline void trace_monitor_qmp_err_in_band(const char *desc) {
+ (void)desc;
+}
+#define TRACE_MONITOR_QMP_IN_BAND_DEQUEUE 0
+#define TRACE_MONITOR_QMP_IN_BAND_DEQUEUE_ENABLED 0
+#define TRACE_MONITOR_QMP_IN_BAND_DEQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_monitor_qmp_in_band_dequeue(void *req, unsigned len) {
+ (void)req;
+ (void)len;
+}
+#define TRACE_MONITOR_QMP_IN_BAND_ENQUEUE 0
+#define TRACE_MONITOR_QMP_IN_BAND_ENQUEUE_ENABLED 0
+#define TRACE_MONITOR_QMP_IN_BAND_ENQUEUE_BACKEND_DSTATE() (0)
+static inline void trace_monitor_qmp_in_band_enqueue(void *req, void *mon, unsigned len) {
+ (void)req;
+ (void)mon;
+ (void)len;
+}
+#define TRACE_MONITOR_QMP_RESPOND 0
+#define TRACE_MONITOR_QMP_RESPOND_ENABLED 0
+#define TRACE_MONITOR_QMP_RESPOND_BACKEND_DSTATE() (0)
+static inline void trace_monitor_qmp_respond(void *mon, const char *json) {
+ (void)mon;
+ (void)json;
+}
+#define TRACE_MONITOR_SUSPEND 0
+#define TRACE_MONITOR_SUSPEND_ENABLED 0
+#define TRACE_MONITOR_SUSPEND_BACKEND_DSTATE() (0)
+static inline void trace_monitor_suspend(void *ptr, int cnt) {
+ (void)ptr;
+ (void)cnt;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-nbd.h b/trace/trace-nbd.h
new file mode 100644
index 0000000000..bfd8e398db
--- /dev/null
+++ b/trace/trace-nbd.h
@@ -0,0 +1,515 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_NBD_H
+#define TRACE_TRACE_NBD_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_NBD_BLK_AIO_ATTACHED 0
+#define TRACE_NBD_BLK_AIO_ATTACHED_ENABLED 0
+#define TRACE_NBD_BLK_AIO_ATTACHED_BACKEND_DSTATE() (0)
+static inline void trace_nbd_blk_aio_attached(const char *name, void *ctx) {
+ (void)name;
+ (void)ctx;
+}
+#define TRACE_NBD_BLK_AIO_DETACH 0
+#define TRACE_NBD_BLK_AIO_DETACH_ENABLED 0
+#define TRACE_NBD_BLK_AIO_DETACH_BACKEND_DSTATE() (0)
+static inline void trace_nbd_blk_aio_detach(const char *name, void *ctx) {
+ (void)name;
+ (void)ctx;
+}
+#define TRACE_NBD_CLIENT_CLEAR_QUEUE 0
+#define TRACE_NBD_CLIENT_CLEAR_QUEUE_ENABLED 0
+#define TRACE_NBD_CLIENT_CLEAR_QUEUE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_client_clear_queue(void) {
+}
+#define TRACE_NBD_CLIENT_CLEAR_SOCKET 0
+#define TRACE_NBD_CLIENT_CLEAR_SOCKET_ENABLED 0
+#define TRACE_NBD_CLIENT_CLEAR_SOCKET_BACKEND_DSTATE() (0)
+static inline void trace_nbd_client_clear_socket(void) {
+}
+#define TRACE_NBD_CLIENT_LOOP 0
+#define TRACE_NBD_CLIENT_LOOP_ENABLED 0
+#define TRACE_NBD_CLIENT_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_nbd_client_loop(void) {
+}
+#define TRACE_NBD_CLIENT_LOOP_RET 0
+#define TRACE_NBD_CLIENT_LOOP_RET_ENABLED 0
+#define TRACE_NBD_CLIENT_LOOP_RET_BACKEND_DSTATE() (0)
+static inline void trace_nbd_client_loop_ret(int ret, const char *error) {
+ (void)ret;
+ (void)error;
+}
+#define TRACE_NBD_CO_RECEIVE_ALIGN_COMPLIANCE 0
+#define TRACE_NBD_CO_RECEIVE_ALIGN_COMPLIANCE_ENABLED 0
+#define TRACE_NBD_CO_RECEIVE_ALIGN_COMPLIANCE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_receive_align_compliance(const char *op, uint64_t from, uint64_t len, uint32_t align) {
+ (void)op;
+ (void)from;
+ (void)len;
+ (void)align;
+}
+#define TRACE_NBD_CO_RECEIVE_BLOCK_STATUS_PAYLOAD_COMPLIANCE 0
+#define TRACE_NBD_CO_RECEIVE_BLOCK_STATUS_PAYLOAD_COMPLIANCE_ENABLED 0
+#define TRACE_NBD_CO_RECEIVE_BLOCK_STATUS_PAYLOAD_COMPLIANCE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_receive_block_status_payload_compliance(uint64_t from, uint64_t len) {
+ (void)from;
+ (void)len;
+}
+#define TRACE_NBD_CO_RECEIVE_EXT_PAYLOAD_COMPLIANCE 0
+#define TRACE_NBD_CO_RECEIVE_EXT_PAYLOAD_COMPLIANCE_ENABLED 0
+#define TRACE_NBD_CO_RECEIVE_EXT_PAYLOAD_COMPLIANCE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_receive_ext_payload_compliance(uint64_t from, uint64_t len) {
+ (void)from;
+ (void)len;
+}
+#define TRACE_NBD_CO_RECEIVE_REQUEST_DECODE_TYPE 0
+#define TRACE_NBD_CO_RECEIVE_REQUEST_DECODE_TYPE_ENABLED 0
+#define TRACE_NBD_CO_RECEIVE_REQUEST_DECODE_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_receive_request_decode_type(uint64_t cookie, uint16_t type, const char *name) {
+ (void)cookie;
+ (void)type;
+ (void)name;
+}
+#define TRACE_NBD_CO_RECEIVE_REQUEST_PAYLOAD_RECEIVED 0
+#define TRACE_NBD_CO_RECEIVE_REQUEST_PAYLOAD_RECEIVED_ENABLED 0
+#define TRACE_NBD_CO_RECEIVE_REQUEST_PAYLOAD_RECEIVED_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_receive_request_payload_received(uint64_t cookie, uint64_t len) {
+ (void)cookie;
+ (void)len;
+}
+#define TRACE_NBD_CO_SEND_CHUNK_DONE 0
+#define TRACE_NBD_CO_SEND_CHUNK_DONE_ENABLED 0
+#define TRACE_NBD_CO_SEND_CHUNK_DONE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_send_chunk_done(uint64_t cookie) {
+ (void)cookie;
+}
+#define TRACE_NBD_CO_SEND_CHUNK_ERROR 0
+#define TRACE_NBD_CO_SEND_CHUNK_ERROR_ENABLED 0
+#define TRACE_NBD_CO_SEND_CHUNK_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_send_chunk_error(uint64_t cookie, int err, const char *errname, const char *msg) {
+ (void)cookie;
+ (void)err;
+ (void)errname;
+ (void)msg;
+}
+#define TRACE_NBD_CO_SEND_CHUNK_READ 0
+#define TRACE_NBD_CO_SEND_CHUNK_READ_ENABLED 0
+#define TRACE_NBD_CO_SEND_CHUNK_READ_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_send_chunk_read(uint64_t cookie, uint64_t offset, void *data, uint64_t size) {
+ (void)cookie;
+ (void)offset;
+ (void)data;
+ (void)size;
+}
+#define TRACE_NBD_CO_SEND_CHUNK_READ_HOLE 0
+#define TRACE_NBD_CO_SEND_CHUNK_READ_HOLE_ENABLED 0
+#define TRACE_NBD_CO_SEND_CHUNK_READ_HOLE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_send_chunk_read_hole(uint64_t cookie, uint64_t offset, uint64_t size) {
+ (void)cookie;
+ (void)offset;
+ (void)size;
+}
+#define TRACE_NBD_CO_SEND_EXTENTS 0
+#define TRACE_NBD_CO_SEND_EXTENTS_ENABLED 0
+#define TRACE_NBD_CO_SEND_EXTENTS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_send_extents(uint64_t cookie, unsigned int extents, uint32_t id, uint64_t length, int last) {
+ (void)cookie;
+ (void)extents;
+ (void)id;
+ (void)length;
+ (void)last;
+}
+#define TRACE_NBD_CO_SEND_SIMPLE_REPLY 0
+#define TRACE_NBD_CO_SEND_SIMPLE_REPLY_ENABLED 0
+#define TRACE_NBD_CO_SEND_SIMPLE_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_nbd_co_send_simple_reply(uint64_t cookie, uint32_t error, const char *errname, uint64_t len) {
+ (void)cookie;
+ (void)error;
+ (void)errname;
+ (void)len;
+}
+#define TRACE_NBD_CONNECT_THREAD_SLEEP 0
+#define TRACE_NBD_CONNECT_THREAD_SLEEP_ENABLED 0
+#define TRACE_NBD_CONNECT_THREAD_SLEEP_BACKEND_DSTATE() (0)
+static inline void trace_nbd_connect_thread_sleep(uint64_t timeout) {
+ (void)timeout;
+}
+#define TRACE_NBD_HANDSHAKE_TIMER_CB 0
+#define TRACE_NBD_HANDSHAKE_TIMER_CB_ENABLED 0
+#define TRACE_NBD_HANDSHAKE_TIMER_CB_BACKEND_DSTATE() (0)
+static inline void trace_nbd_handshake_timer_cb(void) {
+}
+#define TRACE_NBD_INIT_FINISH 0
+#define TRACE_NBD_INIT_FINISH_ENABLED 0
+#define TRACE_NBD_INIT_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_nbd_init_finish(void) {
+}
+#define TRACE_NBD_INIT_SET_BLOCK_SIZE 0
+#define TRACE_NBD_INIT_SET_BLOCK_SIZE_ENABLED 0
+#define TRACE_NBD_INIT_SET_BLOCK_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_init_set_block_size(unsigned long block_size) {
+ (void)block_size;
+}
+#define TRACE_NBD_INIT_SET_READONLY 0
+#define TRACE_NBD_INIT_SET_READONLY_ENABLED 0
+#define TRACE_NBD_INIT_SET_READONLY_BACKEND_DSTATE() (0)
+static inline void trace_nbd_init_set_readonly(void) {
+}
+#define TRACE_NBD_INIT_SET_SIZE 0
+#define TRACE_NBD_INIT_SET_SIZE_ENABLED 0
+#define TRACE_NBD_INIT_SET_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_init_set_size(unsigned long sectors) {
+ (void)sectors;
+}
+#define TRACE_NBD_INIT_SET_SOCKET 0
+#define TRACE_NBD_INIT_SET_SOCKET_ENABLED 0
+#define TRACE_NBD_INIT_SET_SOCKET_BACKEND_DSTATE() (0)
+static inline void trace_nbd_init_set_socket(void) {
+}
+#define TRACE_NBD_INIT_TRAILING_BYTES 0
+#define TRACE_NBD_INIT_TRAILING_BYTES_ENABLED 0
+#define TRACE_NBD_INIT_TRAILING_BYTES_BACKEND_DSTATE() (0)
+static inline void trace_nbd_init_trailing_bytes(int ignored_bytes) {
+ (void)ignored_bytes;
+}
+#define TRACE_NBD_NEGOTIATE_BEGIN 0
+#define TRACE_NBD_NEGOTIATE_BEGIN_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_begin(void) {
+}
+#define TRACE_NBD_NEGOTIATE_HANDLE_EXPORT_NAME 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_EXPORT_NAME_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_EXPORT_NAME_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_handle_export_name(void) {
+}
+#define TRACE_NBD_NEGOTIATE_HANDLE_EXPORT_NAME_REQUEST 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_EXPORT_NAME_REQUEST_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_EXPORT_NAME_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_handle_export_name_request(const char *name) {
+ (void)name;
+}
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_BLOCK_SIZE 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_BLOCK_SIZE_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_BLOCK_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_handle_info_block_size(uint32_t minimum, uint32_t preferred, uint32_t maximum) {
+ (void)minimum;
+ (void)preferred;
+ (void)maximum;
+}
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_REQUEST 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_REQUEST_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_handle_info_request(int request, const char *name) {
+ (void)request;
+ (void)name;
+}
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_REQUESTS 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_REQUESTS_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_INFO_REQUESTS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_handle_info_requests(int requests) {
+ (void)requests;
+}
+#define TRACE_NBD_NEGOTIATE_HANDLE_STARTTLS 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_STARTTLS_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_STARTTLS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_handle_starttls(void) {
+}
+#define TRACE_NBD_NEGOTIATE_HANDLE_STARTTLS_HANDSHAKE 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_STARTTLS_HANDSHAKE_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_HANDLE_STARTTLS_HANDSHAKE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_handle_starttls_handshake(void) {
+}
+#define TRACE_NBD_NEGOTIATE_META_CONTEXT 0
+#define TRACE_NBD_NEGOTIATE_META_CONTEXT_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_META_CONTEXT_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_meta_context(const char *optname, const char *export, uint32_t queries) {
+ (void)optname;
+ (void)export;
+ (void)queries;
+}
+#define TRACE_NBD_NEGOTIATE_META_QUERY_PARSE 0
+#define TRACE_NBD_NEGOTIATE_META_QUERY_PARSE_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_META_QUERY_PARSE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_meta_query_parse(const char *query) {
+ (void)query;
+}
+#define TRACE_NBD_NEGOTIATE_META_QUERY_REPLY 0
+#define TRACE_NBD_NEGOTIATE_META_QUERY_REPLY_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_META_QUERY_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_meta_query_reply(const char *context, uint32_t id) {
+ (void)context;
+ (void)id;
+}
+#define TRACE_NBD_NEGOTIATE_META_QUERY_SKIP 0
+#define TRACE_NBD_NEGOTIATE_META_QUERY_SKIP_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_META_QUERY_SKIP_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_meta_query_skip(const char *reason) {
+ (void)reason;
+}
+#define TRACE_NBD_NEGOTIATE_NEW_STYLE_SIZE_FLAGS 0
+#define TRACE_NBD_NEGOTIATE_NEW_STYLE_SIZE_FLAGS_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_NEW_STYLE_SIZE_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_new_style_size_flags(uint64_t size, unsigned flags) {
+ (void)size;
+ (void)flags;
+}
+#define TRACE_NBD_NEGOTIATE_OPTIONS_CHECK_MAGIC 0
+#define TRACE_NBD_NEGOTIATE_OPTIONS_CHECK_MAGIC_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_OPTIONS_CHECK_MAGIC_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_options_check_magic(uint64_t magic) {
+ (void)magic;
+}
+#define TRACE_NBD_NEGOTIATE_OPTIONS_CHECK_OPTION 0
+#define TRACE_NBD_NEGOTIATE_OPTIONS_CHECK_OPTION_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_OPTIONS_CHECK_OPTION_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_options_check_option(uint32_t option, const char *name) {
+ (void)option;
+ (void)name;
+}
+#define TRACE_NBD_NEGOTIATE_OPTIONS_FLAGS 0
+#define TRACE_NBD_NEGOTIATE_OPTIONS_FLAGS_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_OPTIONS_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_options_flags(uint32_t flags) {
+ (void)flags;
+}
+#define TRACE_NBD_NEGOTIATE_SEND_INFO 0
+#define TRACE_NBD_NEGOTIATE_SEND_INFO_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_SEND_INFO_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_send_info(int info, const char *name, uint32_t length) {
+ (void)info;
+ (void)name;
+ (void)length;
+}
+#define TRACE_NBD_NEGOTIATE_SEND_REP_ERR 0
+#define TRACE_NBD_NEGOTIATE_SEND_REP_ERR_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_SEND_REP_ERR_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_send_rep_err(const char *msg) {
+ (void)msg;
+}
+#define TRACE_NBD_NEGOTIATE_SEND_REP_LEN 0
+#define TRACE_NBD_NEGOTIATE_SEND_REP_LEN_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_SEND_REP_LEN_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_send_rep_len(uint32_t opt, const char *optname, uint32_t type, const char *typename, uint32_t len) {
+ (void)opt;
+ (void)optname;
+ (void)type;
+ (void)typename;
+ (void)len;
+}
+#define TRACE_NBD_NEGOTIATE_SEND_REP_LIST 0
+#define TRACE_NBD_NEGOTIATE_SEND_REP_LIST_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_SEND_REP_LIST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_send_rep_list(const char *name, const char *desc) {
+ (void)name;
+ (void)desc;
+}
+#define TRACE_NBD_NEGOTIATE_SUCCESS 0
+#define TRACE_NBD_NEGOTIATE_SUCCESS_ENABLED 0
+#define TRACE_NBD_NEGOTIATE_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_negotiate_success(void) {
+}
+#define TRACE_NBD_OPT_INFO_BLOCK_SIZE 0
+#define TRACE_NBD_OPT_INFO_BLOCK_SIZE_ENABLED 0
+#define TRACE_NBD_OPT_INFO_BLOCK_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_opt_info_block_size(uint32_t minimum, uint32_t preferred, uint32_t maximum) {
+ (void)minimum;
+ (void)preferred;
+ (void)maximum;
+}
+#define TRACE_NBD_OPT_INFO_GO_START 0
+#define TRACE_NBD_OPT_INFO_GO_START_ENABLED 0
+#define TRACE_NBD_OPT_INFO_GO_START_BACKEND_DSTATE() (0)
+static inline void trace_nbd_opt_info_go_start(const char *opt, const char *name) {
+ (void)opt;
+ (void)name;
+}
+#define TRACE_NBD_OPT_INFO_GO_SUCCESS 0
+#define TRACE_NBD_OPT_INFO_GO_SUCCESS_ENABLED 0
+#define TRACE_NBD_OPT_INFO_GO_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_opt_info_go_success(const char *opt) {
+ (void)opt;
+}
+#define TRACE_NBD_OPT_INFO_UNKNOWN 0
+#define TRACE_NBD_OPT_INFO_UNKNOWN_ENABLED 0
+#define TRACE_NBD_OPT_INFO_UNKNOWN_BACKEND_DSTATE() (0)
+static inline void trace_nbd_opt_info_unknown(int info, const char *name) {
+ (void)info;
+ (void)name;
+}
+#define TRACE_NBD_OPT_META_REPLY 0
+#define TRACE_NBD_OPT_META_REPLY_ENABLED 0
+#define TRACE_NBD_OPT_META_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_nbd_opt_meta_reply(const char *optname, const char *context, uint32_t id) {
+ (void)optname;
+ (void)context;
+ (void)id;
+}
+#define TRACE_NBD_OPT_META_REQUEST 0
+#define TRACE_NBD_OPT_META_REQUEST_ENABLED 0
+#define TRACE_NBD_OPT_META_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_opt_meta_request(const char *optname, const char *context, const char *export) {
+ (void)optname;
+ (void)context;
+ (void)export;
+}
+#define TRACE_NBD_RECEIVE_LIST 0
+#define TRACE_NBD_RECEIVE_LIST_ENABLED 0
+#define TRACE_NBD_RECEIVE_LIST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_list(const char *name, const char *desc) {
+ (void)name;
+ (void)desc;
+}
+#define TRACE_NBD_RECEIVE_NEGOTIATE_MAGIC 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_MAGIC_ENABLED 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_MAGIC_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_negotiate_magic(uint64_t magic) {
+ (void)magic;
+}
+#define TRACE_NBD_RECEIVE_NEGOTIATE_NAME 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_NAME_ENABLED 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_NAME_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_negotiate_name(const char *name) {
+ (void)name;
+}
+#define TRACE_NBD_RECEIVE_NEGOTIATE_SERVER_FLAGS 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_SERVER_FLAGS_ENABLED 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_SERVER_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_negotiate_server_flags(uint32_t globalflags) {
+ (void)globalflags;
+}
+#define TRACE_NBD_RECEIVE_NEGOTIATE_SIZE_FLAGS 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_SIZE_FLAGS_ENABLED 0
+#define TRACE_NBD_RECEIVE_NEGOTIATE_SIZE_FLAGS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_negotiate_size_flags(uint64_t size, uint16_t flags) {
+ (void)size;
+ (void)flags;
+}
+#define TRACE_NBD_RECEIVE_OPTION_REPLY 0
+#define TRACE_NBD_RECEIVE_OPTION_REPLY_ENABLED 0
+#define TRACE_NBD_RECEIVE_OPTION_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_option_reply(uint32_t option, const char *optname, uint32_t type, const char *typename, uint32_t length) {
+ (void)option;
+ (void)optname;
+ (void)type;
+ (void)typename;
+ (void)length;
+}
+#define TRACE_NBD_RECEIVE_QUERY_EXPORTS_START 0
+#define TRACE_NBD_RECEIVE_QUERY_EXPORTS_START_ENABLED 0
+#define TRACE_NBD_RECEIVE_QUERY_EXPORTS_START_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_query_exports_start(const char *wantname) {
+ (void)wantname;
+}
+#define TRACE_NBD_RECEIVE_QUERY_EXPORTS_SUCCESS 0
+#define TRACE_NBD_RECEIVE_QUERY_EXPORTS_SUCCESS_ENABLED 0
+#define TRACE_NBD_RECEIVE_QUERY_EXPORTS_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_query_exports_success(const char *wantname) {
+ (void)wantname;
+}
+#define TRACE_NBD_RECEIVE_REPLY_CHUNK_HEADER 0
+#define TRACE_NBD_RECEIVE_REPLY_CHUNK_HEADER_ENABLED 0
+#define TRACE_NBD_RECEIVE_REPLY_CHUNK_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_reply_chunk_header(uint16_t flags, uint16_t type, const char *name, uint64_t cookie, uint32_t length) {
+ (void)flags;
+ (void)type;
+ (void)name;
+ (void)cookie;
+ (void)length;
+}
+#define TRACE_NBD_RECEIVE_REQUEST 0
+#define TRACE_NBD_RECEIVE_REQUEST_ENABLED 0
+#define TRACE_NBD_RECEIVE_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_request(uint32_t magic, uint16_t flags, uint16_t type, uint64_t from, uint64_t len) {
+ (void)magic;
+ (void)flags;
+ (void)type;
+ (void)from;
+ (void)len;
+}
+#define TRACE_NBD_RECEIVE_SIMPLE_REPLY 0
+#define TRACE_NBD_RECEIVE_SIMPLE_REPLY_ENABLED 0
+#define TRACE_NBD_RECEIVE_SIMPLE_REPLY_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_simple_reply(int32_t error, const char *errname, uint64_t cookie) {
+ (void)error;
+ (void)errname;
+ (void)cookie;
+}
+#define TRACE_NBD_RECEIVE_STARTTLS_NEW_CLIENT 0
+#define TRACE_NBD_RECEIVE_STARTTLS_NEW_CLIENT_ENABLED 0
+#define TRACE_NBD_RECEIVE_STARTTLS_NEW_CLIENT_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_starttls_new_client(void) {
+}
+#define TRACE_NBD_RECEIVE_STARTTLS_TLS_HANDSHAKE 0
+#define TRACE_NBD_RECEIVE_STARTTLS_TLS_HANDSHAKE_ENABLED 0
+#define TRACE_NBD_RECEIVE_STARTTLS_TLS_HANDSHAKE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_starttls_tls_handshake(void) {
+}
+#define TRACE_NBD_RECEIVE_WRONG_HEADER 0
+#define TRACE_NBD_RECEIVE_WRONG_HEADER_ENABLED 0
+#define TRACE_NBD_RECEIVE_WRONG_HEADER_BACKEND_DSTATE() (0)
+static inline void trace_nbd_receive_wrong_header(uint32_t magic, const char *mode) {
+ (void)magic;
+ (void)mode;
+}
+#define TRACE_NBD_REPLY_ERR_IGNORED 0
+#define TRACE_NBD_REPLY_ERR_IGNORED_ENABLED 0
+#define TRACE_NBD_REPLY_ERR_IGNORED_BACKEND_DSTATE() (0)
+static inline void trace_nbd_reply_err_ignored(uint32_t option, const char *name, uint32_t reply, const char *reply_name) {
+ (void)option;
+ (void)name;
+ (void)reply;
+ (void)reply_name;
+}
+#define TRACE_NBD_SEND_OPTION_REQUEST 0
+#define TRACE_NBD_SEND_OPTION_REQUEST_ENABLED 0
+#define TRACE_NBD_SEND_OPTION_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_send_option_request(uint32_t opt, const char *name, uint32_t len) {
+ (void)opt;
+ (void)name;
+ (void)len;
+}
+#define TRACE_NBD_SEND_REQUEST 0
+#define TRACE_NBD_SEND_REQUEST_ENABLED 0
+#define TRACE_NBD_SEND_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_nbd_send_request(uint64_t from, uint64_t len, uint64_t cookie, uint16_t flags, uint16_t type, const char *name) {
+ (void)from;
+ (void)len;
+ (void)cookie;
+ (void)flags;
+ (void)type;
+ (void)name;
+}
+#define TRACE_NBD_SERVER_ERROR_MSG 0
+#define TRACE_NBD_SERVER_ERROR_MSG_ENABLED 0
+#define TRACE_NBD_SERVER_ERROR_MSG_BACKEND_DSTATE() (0)
+static inline void trace_nbd_server_error_msg(uint32_t err, const char *type, const char *msg) {
+ (void)err;
+ (void)type;
+ (void)msg;
+}
+#define TRACE_NBD_START_NEGOTIATE 0
+#define TRACE_NBD_START_NEGOTIATE_ENABLED 0
+#define TRACE_NBD_START_NEGOTIATE_BACKEND_DSTATE() (0)
+static inline void trace_nbd_start_negotiate(void *tlscreds, const char *hostname) {
+ (void)tlscreds;
+ (void)hostname;
+}
+#define TRACE_NBD_TRIP 0
+#define TRACE_NBD_TRIP_ENABLED 0
+#define TRACE_NBD_TRIP_BACKEND_DSTATE() (0)
+static inline void trace_nbd_trip(void) {
+}
+#define TRACE_NBD_UNKNOWN_ERROR 0
+#define TRACE_NBD_UNKNOWN_ERROR_ENABLED 0
+#define TRACE_NBD_UNKNOWN_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_nbd_unknown_error(int err) {
+ (void)err;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-net.h b/trace/trace-net.h
new file mode 100644
index 0000000000..4fa6efe59a
--- /dev/null
+++ b/trace/trace-net.h
@@ -0,0 +1,158 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_NET_H
+#define TRACE_TRACE_NET_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_COLO_COMPARE_DROP_PACKET 0
+#define TRACE_COLO_COMPARE_DROP_PACKET_ENABLED 0
+#define TRACE_COLO_COMPARE_DROP_PACKET_BACKEND_DSTATE() (0)
+static inline void trace_colo_compare_drop_packet(const char *queue, const char *chr) {
+ (void)queue;
+ (void)chr;
+}
+#define TRACE_COLO_COMPARE_ICMP_MISCOMPARE 0
+#define TRACE_COLO_COMPARE_ICMP_MISCOMPARE_ENABLED 0
+#define TRACE_COLO_COMPARE_ICMP_MISCOMPARE_BACKEND_DSTATE() (0)
+static inline void trace_colo_compare_icmp_miscompare(const char *sta, int size) {
+ (void)sta;
+ (void)size;
+}
+#define TRACE_COLO_COMPARE_IP_INFO 0
+#define TRACE_COLO_COMPARE_IP_INFO_ENABLED 0
+#define TRACE_COLO_COMPARE_IP_INFO_BACKEND_DSTATE() (0)
+static inline void trace_colo_compare_ip_info(int psize, const char *sta, const char *stb, int ssize, const char *stc, const char *std) {
+ (void)psize;
+ (void)sta;
+ (void)stb;
+ (void)ssize;
+ (void)stc;
+ (void)std;
+}
+#define TRACE_COLO_COMPARE_MAIN 0
+#define TRACE_COLO_COMPARE_MAIN_ENABLED 0
+#define TRACE_COLO_COMPARE_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_colo_compare_main(const char *chr) {
+ (void)chr;
+}
+#define TRACE_COLO_COMPARE_TCP_INFO 0
+#define TRACE_COLO_COMPARE_TCP_INFO_ENABLED 0
+#define TRACE_COLO_COMPARE_TCP_INFO_BACKEND_DSTATE() (0)
+static inline void trace_colo_compare_tcp_info(const char *pkt, uint32_t seq, uint32_t ack, int hdlen, int pdlen, int offset, int flags) {
+ (void)pkt;
+ (void)seq;
+ (void)ack;
+ (void)hdlen;
+ (void)pdlen;
+ (void)offset;
+ (void)flags;
+}
+#define TRACE_COLO_COMPARE_UDP_MISCOMPARE 0
+#define TRACE_COLO_COMPARE_UDP_MISCOMPARE_ENABLED 0
+#define TRACE_COLO_COMPARE_UDP_MISCOMPARE_BACKEND_DSTATE() (0)
+static inline void trace_colo_compare_udp_miscompare(const char *sta, int size) {
+ (void)sta;
+ (void)size;
+}
+#define TRACE_COLO_FILTER_REWRITER_CONN_OFFSET 0
+#define TRACE_COLO_FILTER_REWRITER_CONN_OFFSET_ENABLED 0
+#define TRACE_COLO_FILTER_REWRITER_CONN_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_colo_filter_rewriter_conn_offset(uint32_t offset) {
+ (void)offset;
+}
+#define TRACE_COLO_FILTER_REWRITER_PKT_INFO 0
+#define TRACE_COLO_FILTER_REWRITER_PKT_INFO_ENABLED 0
+#define TRACE_COLO_FILTER_REWRITER_PKT_INFO_BACKEND_DSTATE() (0)
+static inline void trace_colo_filter_rewriter_pkt_info(const char *func, const char *src, const char *dst, uint32_t seq, uint32_t ack, uint32_t flag) {
+ (void)func;
+ (void)src;
+ (void)dst;
+ (void)seq;
+ (void)ack;
+ (void)flag;
+}
+#define TRACE_COLO_OLD_PACKET_CHECK_FOUND 0
+#define TRACE_COLO_OLD_PACKET_CHECK_FOUND_ENABLED 0
+#define TRACE_COLO_OLD_PACKET_CHECK_FOUND_BACKEND_DSTATE() (0)
+static inline void trace_colo_old_packet_check_found(int64_t old_time) {
+ (void)old_time;
+}
+#define TRACE_COLO_PROXY_MAIN 0
+#define TRACE_COLO_PROXY_MAIN_ENABLED 0
+#define TRACE_COLO_PROXY_MAIN_BACKEND_DSTATE() (0)
+static inline void trace_colo_proxy_main(const char *chr) {
+ (void)chr;
+}
+#define TRACE_COLO_PROXY_MAIN_VNET_INFO 0
+#define TRACE_COLO_PROXY_MAIN_VNET_INFO_ENABLED 0
+#define TRACE_COLO_PROXY_MAIN_VNET_INFO_BACKEND_DSTATE() (0)
+static inline void trace_colo_proxy_main_vnet_info(const char *sta, uint32_t vnet_hdr, int size) {
+ (void)sta;
+ (void)vnet_hdr;
+ (void)size;
+}
+#define TRACE_QEMU_ANNOUNCE_SELF_ITER 0
+#define TRACE_QEMU_ANNOUNCE_SELF_ITER_ENABLED 0
+#define TRACE_QEMU_ANNOUNCE_SELF_ITER_BACKEND_DSTATE() (0)
+static inline void trace_qemu_announce_self_iter(const char *id, const char *name, const char *mac, int skip) {
+ (void)id;
+ (void)name;
+ (void)mac;
+ (void)skip;
+}
+#define TRACE_QEMU_ANNOUNCE_TIMER_DEL 0
+#define TRACE_QEMU_ANNOUNCE_TIMER_DEL_ENABLED 0
+#define TRACE_QEMU_ANNOUNCE_TIMER_DEL_BACKEND_DSTATE() (0)
+static inline void trace_qemu_announce_timer_del(bool free_named, bool free_timer, char *id) {
+ (void)free_named;
+ (void)free_timer;
+ (void)id;
+}
+#define TRACE_VHOST_USER_EVENT 0
+#define TRACE_VHOST_USER_EVENT_ENABLED 0
+#define TRACE_VHOST_USER_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_vhost_user_event(const char *chr, int event) {
+ (void)chr;
+ (void)event;
+}
+#define TRACE_VHOST_VDPA_NET_LOAD_CMD 0
+#define TRACE_VHOST_VDPA_NET_LOAD_CMD_ENABLED 0
+#define TRACE_VHOST_VDPA_NET_LOAD_CMD_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_net_load_cmd(void *s, uint8_t class, uint8_t cmd, int data_num, int data_size) {
+ (void)s;
+ (void)class;
+ (void)cmd;
+ (void)data_num;
+ (void)data_size;
+}
+#define TRACE_VHOST_VDPA_NET_LOAD_CMD_RETVAL 0
+#define TRACE_VHOST_VDPA_NET_LOAD_CMD_RETVAL_ENABLED 0
+#define TRACE_VHOST_VDPA_NET_LOAD_CMD_RETVAL_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_net_load_cmd_retval(void *s, uint8_t class, uint8_t cmd, int r) {
+ (void)s;
+ (void)class;
+ (void)cmd;
+ (void)r;
+}
+#define TRACE_VHOST_VDPA_NET_LOAD_MQ 0
+#define TRACE_VHOST_VDPA_NET_LOAD_MQ_ENABLED 0
+#define TRACE_VHOST_VDPA_NET_LOAD_MQ_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_net_load_mq(void *s, int ncurqps) {
+ (void)s;
+ (void)ncurqps;
+}
+#define TRACE_VHOST_VDPA_SET_ADDRESS_SPACE_ID 0
+#define TRACE_VHOST_VDPA_SET_ADDRESS_SPACE_ID_ENABLED 0
+#define TRACE_VHOST_VDPA_SET_ADDRESS_SPACE_ID_BACKEND_DSTATE() (0)
+static inline void trace_vhost_vdpa_set_address_space_id(void *v, unsigned vq_group, unsigned asid_num) {
+ (void)v;
+ (void)vq_group;
+ (void)asid_num;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-qapi.h b/trace/trace-qapi.h
new file mode 100644
index 0000000000..fb241ac8e3
--- /dev/null
+++ b/trace/trace-qapi.h
@@ -0,0 +1,244 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_QAPI_H
+#define TRACE_TRACE_QAPI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_VISIT_CHECK_LIST 0
+#define TRACE_VISIT_CHECK_LIST_ENABLED 0
+#define TRACE_VISIT_CHECK_LIST_BACKEND_DSTATE() (0)
+static inline void trace_visit_check_list(void *v) {
+ (void)v;
+}
+#define TRACE_VISIT_CHECK_STRUCT 0
+#define TRACE_VISIT_CHECK_STRUCT_ENABLED 0
+#define TRACE_VISIT_CHECK_STRUCT_BACKEND_DSTATE() (0)
+static inline void trace_visit_check_struct(void *v) {
+ (void)v;
+}
+#define TRACE_VISIT_COMPLETE 0
+#define TRACE_VISIT_COMPLETE_ENABLED 0
+#define TRACE_VISIT_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_visit_complete(void *v, void *opaque) {
+ (void)v;
+ (void)opaque;
+}
+#define TRACE_VISIT_END_ALTERNATE 0
+#define TRACE_VISIT_END_ALTERNATE_ENABLED 0
+#define TRACE_VISIT_END_ALTERNATE_BACKEND_DSTATE() (0)
+static inline void trace_visit_end_alternate(void *v, void *obj) {
+ (void)v;
+ (void)obj;
+}
+#define TRACE_VISIT_END_LIST 0
+#define TRACE_VISIT_END_LIST_ENABLED 0
+#define TRACE_VISIT_END_LIST_BACKEND_DSTATE() (0)
+static inline void trace_visit_end_list(void *v, void *obj) {
+ (void)v;
+ (void)obj;
+}
+#define TRACE_VISIT_END_STRUCT 0
+#define TRACE_VISIT_END_STRUCT_ENABLED 0
+#define TRACE_VISIT_END_STRUCT_BACKEND_DSTATE() (0)
+static inline void trace_visit_end_struct(void *v, void *obj) {
+ (void)v;
+ (void)obj;
+}
+#define TRACE_VISIT_FREE 0
+#define TRACE_VISIT_FREE_ENABLED 0
+#define TRACE_VISIT_FREE_BACKEND_DSTATE() (0)
+static inline void trace_visit_free(void *v) {
+ (void)v;
+}
+#define TRACE_VISIT_NEXT_LIST 0
+#define TRACE_VISIT_NEXT_LIST_ENABLED 0
+#define TRACE_VISIT_NEXT_LIST_BACKEND_DSTATE() (0)
+static inline void trace_visit_next_list(void *v, void *tail, size_t size) {
+ (void)v;
+ (void)tail;
+ (void)size;
+}
+#define TRACE_VISIT_OPTIONAL 0
+#define TRACE_VISIT_OPTIONAL_ENABLED 0
+#define TRACE_VISIT_OPTIONAL_BACKEND_DSTATE() (0)
+static inline void trace_visit_optional(void *v, const char *name, bool *present) {
+ (void)v;
+ (void)name;
+ (void)present;
+}
+#define TRACE_VISIT_POLICY_REJECT 0
+#define TRACE_VISIT_POLICY_REJECT_ENABLED 0
+#define TRACE_VISIT_POLICY_REJECT_BACKEND_DSTATE() (0)
+static inline void trace_visit_policy_reject(void *v, const char *name) {
+ (void)v;
+ (void)name;
+}
+#define TRACE_VISIT_POLICY_SKIP 0
+#define TRACE_VISIT_POLICY_SKIP_ENABLED 0
+#define TRACE_VISIT_POLICY_SKIP_BACKEND_DSTATE() (0)
+static inline void trace_visit_policy_skip(void *v, const char *name) {
+ (void)v;
+ (void)name;
+}
+#define TRACE_VISIT_START_ALTERNATE 0
+#define TRACE_VISIT_START_ALTERNATE_ENABLED 0
+#define TRACE_VISIT_START_ALTERNATE_BACKEND_DSTATE() (0)
+static inline void trace_visit_start_alternate(void *v, const char *name, void *obj, size_t size) {
+ (void)v;
+ (void)name;
+ (void)obj;
+ (void)size;
+}
+#define TRACE_VISIT_START_LIST 0
+#define TRACE_VISIT_START_LIST_ENABLED 0
+#define TRACE_VISIT_START_LIST_BACKEND_DSTATE() (0)
+static inline void trace_visit_start_list(void *v, const char *name, void *obj, size_t size) {
+ (void)v;
+ (void)name;
+ (void)obj;
+ (void)size;
+}
+#define TRACE_VISIT_START_STRUCT 0
+#define TRACE_VISIT_START_STRUCT_ENABLED 0
+#define TRACE_VISIT_START_STRUCT_BACKEND_DSTATE() (0)
+static inline void trace_visit_start_struct(void *v, const char *name, void *obj, size_t size) {
+ (void)v;
+ (void)name;
+ (void)obj;
+ (void)size;
+}
+#define TRACE_VISIT_TYPE_ANY 0
+#define TRACE_VISIT_TYPE_ANY_ENABLED 0
+#define TRACE_VISIT_TYPE_ANY_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_any(void *v, const char *name, void *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_BOOL 0
+#define TRACE_VISIT_TYPE_BOOL_ENABLED 0
+#define TRACE_VISIT_TYPE_BOOL_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_bool(void *v, const char *name, bool *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_ENUM 0
+#define TRACE_VISIT_TYPE_ENUM_ENABLED 0
+#define TRACE_VISIT_TYPE_ENUM_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_enum(void *v, const char *name, int *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_INT 0
+#define TRACE_VISIT_TYPE_INT_ENABLED 0
+#define TRACE_VISIT_TYPE_INT_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_int(void *v, const char *name, int64_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_INT16 0
+#define TRACE_VISIT_TYPE_INT16_ENABLED 0
+#define TRACE_VISIT_TYPE_INT16_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_int16(void *v, const char *name, int16_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_INT32 0
+#define TRACE_VISIT_TYPE_INT32_ENABLED 0
+#define TRACE_VISIT_TYPE_INT32_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_int32(void *v, const char *name, int32_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_INT64 0
+#define TRACE_VISIT_TYPE_INT64_ENABLED 0
+#define TRACE_VISIT_TYPE_INT64_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_int64(void *v, const char *name, int64_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_INT8 0
+#define TRACE_VISIT_TYPE_INT8_ENABLED 0
+#define TRACE_VISIT_TYPE_INT8_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_int8(void *v, const char *name, int8_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_NULL 0
+#define TRACE_VISIT_TYPE_NULL_ENABLED 0
+#define TRACE_VISIT_TYPE_NULL_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_null(void *v, const char *name, void *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_NUMBER 0
+#define TRACE_VISIT_TYPE_NUMBER_ENABLED 0
+#define TRACE_VISIT_TYPE_NUMBER_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_number(void *v, const char *name, void *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_SIZE 0
+#define TRACE_VISIT_TYPE_SIZE_ENABLED 0
+#define TRACE_VISIT_TYPE_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_size(void *v, const char *name, uint64_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_STR 0
+#define TRACE_VISIT_TYPE_STR_ENABLED 0
+#define TRACE_VISIT_TYPE_STR_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_str(void *v, const char *name, char **obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_UINT16 0
+#define TRACE_VISIT_TYPE_UINT16_ENABLED 0
+#define TRACE_VISIT_TYPE_UINT16_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_uint16(void *v, const char *name, uint16_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_UINT32 0
+#define TRACE_VISIT_TYPE_UINT32_ENABLED 0
+#define TRACE_VISIT_TYPE_UINT32_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_uint32(void *v, const char *name, uint32_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_UINT64 0
+#define TRACE_VISIT_TYPE_UINT64_ENABLED 0
+#define TRACE_VISIT_TYPE_UINT64_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_uint64(void *v, const char *name, uint64_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+#define TRACE_VISIT_TYPE_UINT8 0
+#define TRACE_VISIT_TYPE_UINT8_ENABLED 0
+#define TRACE_VISIT_TYPE_UINT8_BACKEND_DSTATE() (0)
+static inline void trace_visit_type_uint8(void *v, const char *name, uint8_t *obj) {
+ (void)v;
+ (void)name;
+ (void)obj;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-qom.h b/trace/trace-qom.h
new file mode 100644
index 0000000000..c8ac9ce571
--- /dev/null
+++ b/trace/trace-qom.h
@@ -0,0 +1,33 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_QOM_H
+#define TRACE_TRACE_QOM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_OBJECT_CLASS_DYNAMIC_CAST_ASSERT 0
+#define TRACE_OBJECT_CLASS_DYNAMIC_CAST_ASSERT_ENABLED 0
+#define TRACE_OBJECT_CLASS_DYNAMIC_CAST_ASSERT_BACKEND_DSTATE() (0)
+static inline void trace_object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) {
+ (void)type;
+ (void)target;
+ (void)file;
+ (void)line;
+ (void)func;
+}
+#define TRACE_OBJECT_DYNAMIC_CAST_ASSERT 0
+#define TRACE_OBJECT_DYNAMIC_CAST_ASSERT_ENABLED 0
+#define TRACE_OBJECT_DYNAMIC_CAST_ASSERT_BACKEND_DSTATE() (0)
+static inline void trace_object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) {
+ (void)type;
+ (void)target;
+ (void)file;
+ (void)line;
+ (void)func;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-replay.h b/trace/trace-replay.h
new file mode 100644
index 0000000000..4b2cabc546
--- /dev/null
+++ b/trace/trace-replay.h
@@ -0,0 +1,86 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_REPLAY_H
+#define TRACE_TRACE_REPLAY_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_REPLAY_ADVANCE_CURRENT_ICOUNT 0
+#define TRACE_REPLAY_ADVANCE_CURRENT_ICOUNT_ENABLED 0
+#define TRACE_REPLAY_ADVANCE_CURRENT_ICOUNT_BACKEND_DSTATE() (0)
+static inline void trace_replay_advance_current_icount(uint64_t current_icount, int diff) {
+ (void)current_icount;
+ (void)diff;
+}
+#define TRACE_REPLAY_FETCH_DATA_KIND 0
+#define TRACE_REPLAY_FETCH_DATA_KIND_ENABLED 0
+#define TRACE_REPLAY_FETCH_DATA_KIND_BACKEND_DSTATE() (0)
+static inline void trace_replay_fetch_data_kind(void) {
+}
+#define TRACE_REPLAY_GET_BYTE 0
+#define TRACE_REPLAY_GET_BYTE_ENABLED 0
+#define TRACE_REPLAY_GET_BYTE_BACKEND_DSTATE() (0)
+static inline void trace_replay_get_byte(uint8_t byte) {
+ (void)byte;
+}
+#define TRACE_REPLAY_GET_DWORD 0
+#define TRACE_REPLAY_GET_DWORD_ENABLED 0
+#define TRACE_REPLAY_GET_DWORD_BACKEND_DSTATE() (0)
+static inline void trace_replay_get_dword(uint32_t dword) {
+ (void)dword;
+}
+#define TRACE_REPLAY_GET_EVENT 0
+#define TRACE_REPLAY_GET_EVENT_ENABLED 0
+#define TRACE_REPLAY_GET_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_replay_get_event(uint32_t current, uint8_t data) {
+ (void)current;
+ (void)data;
+}
+#define TRACE_REPLAY_GET_QWORD 0
+#define TRACE_REPLAY_GET_QWORD_ENABLED 0
+#define TRACE_REPLAY_GET_QWORD_BACKEND_DSTATE() (0)
+static inline void trace_replay_get_qword(uint64_t qword) {
+ (void)qword;
+}
+#define TRACE_REPLAY_GET_WORD 0
+#define TRACE_REPLAY_GET_WORD_ENABLED 0
+#define TRACE_REPLAY_GET_WORD_BACKEND_DSTATE() (0)
+static inline void trace_replay_get_word(uint16_t word) {
+ (void)word;
+}
+#define TRACE_REPLAY_PUT_BYTE 0
+#define TRACE_REPLAY_PUT_BYTE_ENABLED 0
+#define TRACE_REPLAY_PUT_BYTE_BACKEND_DSTATE() (0)
+static inline void trace_replay_put_byte(uint8_t event) {
+ (void)event;
+}
+#define TRACE_REPLAY_PUT_DWORD 0
+#define TRACE_REPLAY_PUT_DWORD_ENABLED 0
+#define TRACE_REPLAY_PUT_DWORD_BACKEND_DSTATE() (0)
+static inline void trace_replay_put_dword(uint32_t event) {
+ (void)event;
+}
+#define TRACE_REPLAY_PUT_EVENT 0
+#define TRACE_REPLAY_PUT_EVENT_ENABLED 0
+#define TRACE_REPLAY_PUT_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_replay_put_event(uint8_t event) {
+ (void)event;
+}
+#define TRACE_REPLAY_PUT_QWORD 0
+#define TRACE_REPLAY_PUT_QWORD_ENABLED 0
+#define TRACE_REPLAY_PUT_QWORD_BACKEND_DSTATE() (0)
+static inline void trace_replay_put_qword(uint64_t event) {
+ (void)event;
+}
+#define TRACE_REPLAY_PUT_WORD 0
+#define TRACE_REPLAY_PUT_WORD_ENABLED 0
+#define TRACE_REPLAY_PUT_WORD_BACKEND_DSTATE() (0)
+static inline void trace_replay_put_word(uint16_t event) {
+ (void)event;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-root.h b/trace/trace-root.h
new file mode 100644
index 0000000000..4b68c6bcd6
--- /dev/null
+++ b/trace/trace-root.h
@@ -0,0 +1,110 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_ROOT_H
+#define TRACE_TRACE_ROOT_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_BREAKPOINT_INSERT 0
+#define TRACE_BREAKPOINT_INSERT_ENABLED 0
+#define TRACE_BREAKPOINT_INSERT_BACKEND_DSTATE() (0)
+static inline void trace_breakpoint_insert(int cpu_index, uint64_t pc, int flags) {
+ (void)cpu_index;
+ (void)pc;
+ (void)flags;
+}
+#define TRACE_BREAKPOINT_REMOVE 0
+#define TRACE_BREAKPOINT_REMOVE_ENABLED 0
+#define TRACE_BREAKPOINT_REMOVE_BACKEND_DSTATE() (0)
+static inline void trace_breakpoint_remove(int cpu_index, uint64_t pc, int flags) {
+ (void)cpu_index;
+ (void)pc;
+ (void)flags;
+}
+#define TRACE_BREAKPOINT_SINGLESTEP 0
+#define TRACE_BREAKPOINT_SINGLESTEP_ENABLED 0
+#define TRACE_BREAKPOINT_SINGLESTEP_BACKEND_DSTATE() (0)
+static inline void trace_breakpoint_singlestep(int cpu_index, int enabled) {
+ (void)cpu_index;
+ (void)enabled;
+}
+#define TRACE_CPU_EXEC_END 0
+#define TRACE_CPU_EXEC_END_ENABLED 0
+#define TRACE_CPU_EXEC_END_BACKEND_DSTATE() (0)
+static inline void trace_cpu_exec_end(int cpu_index) {
+ (void)cpu_index;
+}
+#define TRACE_CPU_EXEC_START 0
+#define TRACE_CPU_EXEC_START_ENABLED 0
+#define TRACE_CPU_EXEC_START_BACKEND_DSTATE() (0)
+static inline void trace_cpu_exec_start(int cpu_index) {
+ (void)cpu_index;
+}
+#define TRACE_JOB_APPLY_VERB 0
+#define TRACE_JOB_APPLY_VERB_ENABLED 0
+#define TRACE_JOB_APPLY_VERB_BACKEND_DSTATE() (0)
+static inline void trace_job_apply_verb(void *job, const char *state, const char *verb, const char *legal) {
+ (void)job;
+ (void)state;
+ (void)verb;
+ (void)legal;
+}
+#define TRACE_JOB_COMPLETED 0
+#define TRACE_JOB_COMPLETED_ENABLED 0
+#define TRACE_JOB_COMPLETED_BACKEND_DSTATE() (0)
+static inline void trace_job_completed(void *job, int ret) {
+ (void)job;
+ (void)ret;
+}
+#define TRACE_JOB_STATE_TRANSITION 0
+#define TRACE_JOB_STATE_TRANSITION_ENABLED 0
+#define TRACE_JOB_STATE_TRANSITION_BACKEND_DSTATE() (0)
+static inline void trace_job_state_transition(void *job, int ret, const char *legal, const char *s0, const char *s1) {
+ (void)job;
+ (void)ret;
+ (void)legal;
+ (void)s0;
+ (void)s1;
+}
+#define TRACE_QMP_JOB_CANCEL 0
+#define TRACE_QMP_JOB_CANCEL_ENABLED 0
+#define TRACE_QMP_JOB_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_qmp_job_cancel(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_JOB_COMPLETE 0
+#define TRACE_QMP_JOB_COMPLETE_ENABLED 0
+#define TRACE_QMP_JOB_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_qmp_job_complete(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_JOB_DISMISS 0
+#define TRACE_QMP_JOB_DISMISS_ENABLED 0
+#define TRACE_QMP_JOB_DISMISS_BACKEND_DSTATE() (0)
+static inline void trace_qmp_job_dismiss(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_JOB_FINALIZE 0
+#define TRACE_QMP_JOB_FINALIZE_ENABLED 0
+#define TRACE_QMP_JOB_FINALIZE_BACKEND_DSTATE() (0)
+static inline void trace_qmp_job_finalize(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_JOB_PAUSE 0
+#define TRACE_QMP_JOB_PAUSE_ENABLED 0
+#define TRACE_QMP_JOB_PAUSE_BACKEND_DSTATE() (0)
+static inline void trace_qmp_job_pause(void *job) {
+ (void)job;
+}
+#define TRACE_QMP_JOB_RESUME 0
+#define TRACE_QMP_JOB_RESUME_ENABLED 0
+#define TRACE_QMP_JOB_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_qmp_job_resume(void *job) {
+ (void)job;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-scsi.h b/trace/trace-scsi.h
new file mode 100644
index 0000000000..d16ae8480b
--- /dev/null
+++ b/trace/trace-scsi.h
@@ -0,0 +1,29 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_SCSI_H
+#define TRACE_TRACE_SCSI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_PR_MANAGER_EXECUTE 0
+#define TRACE_PR_MANAGER_EXECUTE_ENABLED 0
+#define TRACE_PR_MANAGER_EXECUTE_BACKEND_DSTATE() (0)
+static inline void trace_pr_manager_execute(int fd, int cmd, int sa) {
+ (void)fd;
+ (void)cmd;
+ (void)sa;
+}
+#define TRACE_PR_MANAGER_RUN 0
+#define TRACE_PR_MANAGER_RUN_ENABLED 0
+#define TRACE_PR_MANAGER_RUN_BACKEND_DSTATE() (0)
+static inline void trace_pr_manager_run(int fd, int cmd, int sa) {
+ (void)fd;
+ (void)cmd;
+ (void)sa;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-system.h b/trace/trace-system.h
new file mode 100644
index 0000000000..d96adc6c85
--- /dev/null
+++ b/trace/trace-system.h
@@ -0,0 +1,306 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_SYSTEM_H
+#define TRACE_TRACE_SYSTEM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ADDRESS_SPACE_MAP 0
+#define TRACE_ADDRESS_SPACE_MAP_ENABLED 0
+#define TRACE_ADDRESS_SPACE_MAP_BACKEND_DSTATE() (0)
+static inline void trace_address_space_map(void *as, uint64_t addr, uint64_t len, bool is_write, uint32_t attrs) {
+ (void)as;
+ (void)addr;
+ (void)len;
+ (void)is_write;
+ (void)attrs;
+}
+#define TRACE_BALLOON_EVENT 0
+#define TRACE_BALLOON_EVENT_ENABLED 0
+#define TRACE_BALLOON_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_balloon_event(void *opaque, unsigned long addr) {
+ (void)opaque;
+ (void)addr;
+}
+#define TRACE_CPU_IN 0
+#define TRACE_CPU_IN_ENABLED 0
+#define TRACE_CPU_IN_BACKEND_DSTATE() (0)
+static inline void trace_cpu_in(unsigned int addr, char size, unsigned int val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_CPU_OUT 0
+#define TRACE_CPU_OUT_ENABLED 0
+#define TRACE_CPU_OUT_BACKEND_DSTATE() (0)
+static inline void trace_cpu_out(unsigned int addr, char size, unsigned int val) {
+ (void)addr;
+ (void)size;
+ (void)val;
+}
+#define TRACE_DIRTYLIMIT_SET_VCPU 0
+#define TRACE_DIRTYLIMIT_SET_VCPU_ENABLED 0
+#define TRACE_DIRTYLIMIT_SET_VCPU_BACKEND_DSTATE() (0)
+static inline void trace_dirtylimit_set_vcpu(int cpu_index, uint64_t quota) {
+ (void)cpu_index;
+ (void)quota;
+}
+#define TRACE_DIRTYLIMIT_STATE_FINALIZE 0
+#define TRACE_DIRTYLIMIT_STATE_FINALIZE_ENABLED 0
+#define TRACE_DIRTYLIMIT_STATE_FINALIZE_BACKEND_DSTATE() (0)
+static inline void trace_dirtylimit_state_finalize(void) {
+}
+#define TRACE_DIRTYLIMIT_STATE_INITIALIZE 0
+#define TRACE_DIRTYLIMIT_STATE_INITIALIZE_ENABLED 0
+#define TRACE_DIRTYLIMIT_STATE_INITIALIZE_BACKEND_DSTATE() (0)
+static inline void trace_dirtylimit_state_initialize(int max_cpus) {
+ (void)max_cpus;
+}
+#define TRACE_DIRTYLIMIT_THROTTLE_PCT 0
+#define TRACE_DIRTYLIMIT_THROTTLE_PCT_ENABLED 0
+#define TRACE_DIRTYLIMIT_THROTTLE_PCT_BACKEND_DSTATE() (0)
+static inline void trace_dirtylimit_throttle_pct(int cpu_index, uint64_t pct, int64_t time_us) {
+ (void)cpu_index;
+ (void)pct;
+ (void)time_us;
+}
+#define TRACE_DIRTYLIMIT_VCPU_EXECUTE 0
+#define TRACE_DIRTYLIMIT_VCPU_EXECUTE_ENABLED 0
+#define TRACE_DIRTYLIMIT_VCPU_EXECUTE_BACKEND_DSTATE() (0)
+static inline void trace_dirtylimit_vcpu_execute(int cpu_index, int64_t sleep_time_us) {
+ (void)cpu_index;
+ (void)sleep_time_us;
+}
+#define TRACE_DMA_AIO_CANCEL 0
+#define TRACE_DMA_AIO_CANCEL_ENABLED 0
+#define TRACE_DMA_AIO_CANCEL_BACKEND_DSTATE() (0)
+static inline void trace_dma_aio_cancel(void *dbs) {
+ (void)dbs;
+}
+#define TRACE_DMA_BLK_CB 0
+#define TRACE_DMA_BLK_CB_ENABLED 0
+#define TRACE_DMA_BLK_CB_BACKEND_DSTATE() (0)
+static inline void trace_dma_blk_cb(void *dbs, int ret) {
+ (void)dbs;
+ (void)ret;
+}
+#define TRACE_DMA_BLK_IO 0
+#define TRACE_DMA_BLK_IO_ENABLED 0
+#define TRACE_DMA_BLK_IO_BACKEND_DSTATE() (0)
+static inline void trace_dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) {
+ (void)dbs;
+ (void)bs;
+ (void)offset;
+ (void)to_dev;
+}
+#define TRACE_DMA_COMPLETE 0
+#define TRACE_DMA_COMPLETE_ENABLED 0
+#define TRACE_DMA_COMPLETE_BACKEND_DSTATE() (0)
+static inline void trace_dma_complete(void *dbs, int ret, void *cb) {
+ (void)dbs;
+ (void)ret;
+ (void)cb;
+}
+#define TRACE_DMA_MAP_WAIT 0
+#define TRACE_DMA_MAP_WAIT_ENABLED 0
+#define TRACE_DMA_MAP_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_dma_map_wait(void *dbs) {
+ (void)dbs;
+}
+#define TRACE_FIND_RAM_OFFSET 0
+#define TRACE_FIND_RAM_OFFSET_ENABLED 0
+#define TRACE_FIND_RAM_OFFSET_BACKEND_DSTATE() (0)
+static inline void trace_find_ram_offset(uint64_t size, uint64_t offset) {
+ (void)size;
+ (void)offset;
+}
+#define TRACE_FIND_RAM_OFFSET_LOOP 0
+#define TRACE_FIND_RAM_OFFSET_LOOP_ENABLED 0
+#define TRACE_FIND_RAM_OFFSET_LOOP_BACKEND_DSTATE() (0)
+static inline void trace_find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_t next, uint64_t mingap) {
+ (void)size;
+ (void)candidate;
+ (void)offset;
+ (void)next;
+ (void)mingap;
+}
+#define TRACE_FLATVIEW_DESTROY 0
+#define TRACE_FLATVIEW_DESTROY_ENABLED 0
+#define TRACE_FLATVIEW_DESTROY_BACKEND_DSTATE() (0)
+static inline void trace_flatview_destroy(void *view, void *root) {
+ (void)view;
+ (void)root;
+}
+#define TRACE_FLATVIEW_DESTROY_RCU 0
+#define TRACE_FLATVIEW_DESTROY_RCU_ENABLED 0
+#define TRACE_FLATVIEW_DESTROY_RCU_BACKEND_DSTATE() (0)
+static inline void trace_flatview_destroy_rcu(void *view, void *root) {
+ (void)view;
+ (void)root;
+}
+#define TRACE_FLATVIEW_NEW 0
+#define TRACE_FLATVIEW_NEW_ENABLED 0
+#define TRACE_FLATVIEW_NEW_BACKEND_DSTATE() (0)
+static inline void trace_flatview_new(void *view, void *root) {
+ (void)view;
+ (void)root;
+}
+#define TRACE_GLOBAL_DIRTY_CHANGED 0
+#define TRACE_GLOBAL_DIRTY_CHANGED_ENABLED 0
+#define TRACE_GLOBAL_DIRTY_CHANGED_BACKEND_DSTATE() (0)
+static inline void trace_global_dirty_changed(unsigned int bitmask) {
+ (void)bitmask;
+}
+#define TRACE_LOAD_FILE 0
+#define TRACE_LOAD_FILE_ENABLED 0
+#define TRACE_LOAD_FILE_BACKEND_DSTATE() (0)
+static inline void trace_load_file(const char *name, const char *path) {
+ (void)name;
+ (void)path;
+}
+#define TRACE_MEMORY_REGION_OPS_READ 0
+#define TRACE_MEMORY_REGION_OPS_READ_ENABLED 0
+#define TRACE_MEMORY_REGION_OPS_READ_BACKEND_DSTATE() (0)
+static inline void trace_memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) {
+ (void)cpu_index;
+ (void)mr;
+ (void)addr;
+ (void)value;
+ (void)size;
+ (void)name;
+}
+#define TRACE_MEMORY_REGION_OPS_WRITE 0
+#define TRACE_MEMORY_REGION_OPS_WRITE_ENABLED 0
+#define TRACE_MEMORY_REGION_OPS_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) {
+ (void)cpu_index;
+ (void)mr;
+ (void)addr;
+ (void)value;
+ (void)size;
+ (void)name;
+}
+#define TRACE_MEMORY_REGION_RAM_DEVICE_READ 0
+#define TRACE_MEMORY_REGION_RAM_DEVICE_READ_ENABLED 0
+#define TRACE_MEMORY_REGION_RAM_DEVICE_READ_BACKEND_DSTATE() (0)
+static inline void trace_memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) {
+ (void)cpu_index;
+ (void)mr;
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_MEMORY_REGION_RAM_DEVICE_WRITE 0
+#define TRACE_MEMORY_REGION_RAM_DEVICE_WRITE_ENABLED 0
+#define TRACE_MEMORY_REGION_RAM_DEVICE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_memory_region_ram_device_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) {
+ (void)cpu_index;
+ (void)mr;
+ (void)addr;
+ (void)value;
+ (void)size;
+}
+#define TRACE_MEMORY_REGION_SUBPAGE_READ 0
+#define TRACE_MEMORY_REGION_SUBPAGE_READ_ENABLED 0
+#define TRACE_MEMORY_REGION_SUBPAGE_READ_BACKEND_DSTATE() (0)
+static inline void trace_memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) {
+ (void)cpu_index;
+ (void)mr;
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_MEMORY_REGION_SUBPAGE_WRITE 0
+#define TRACE_MEMORY_REGION_SUBPAGE_WRITE_ENABLED 0
+#define TRACE_MEMORY_REGION_SUBPAGE_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) {
+ (void)cpu_index;
+ (void)mr;
+ (void)offset;
+ (void)value;
+ (void)size;
+}
+#define TRACE_MEMORY_REGION_SYNC_DIRTY 0
+#define TRACE_MEMORY_REGION_SYNC_DIRTY_ENABLED 0
+#define TRACE_MEMORY_REGION_SYNC_DIRTY_BACKEND_DSTATE() (0)
+static inline void trace_memory_region_sync_dirty(const char *mr, const char *listener, int global) {
+ (void)mr;
+ (void)listener;
+ (void)global;
+}
+#define TRACE_QEMU_RAM_ALLOC_SHARED 0
+#define TRACE_QEMU_RAM_ALLOC_SHARED_ENABLED 0
+#define TRACE_QEMU_RAM_ALLOC_SHARED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_ram_alloc_shared(const char *name, size_t size, size_t max_size, int fd, void *host) {
+ (void)name;
+ (void)size;
+ (void)max_size;
+ (void)fd;
+ (void)host;
+}
+#define TRACE_QEMU_SYSTEM_POWERDOWN_REQUEST 0
+#define TRACE_QEMU_SYSTEM_POWERDOWN_REQUEST_ENABLED 0
+#define TRACE_QEMU_SYSTEM_POWERDOWN_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_qemu_system_powerdown_request(void) {
+}
+#define TRACE_QEMU_SYSTEM_SHUTDOWN_REQUEST 0
+#define TRACE_QEMU_SYSTEM_SHUTDOWN_REQUEST_ENABLED 0
+#define TRACE_QEMU_SYSTEM_SHUTDOWN_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_qemu_system_shutdown_request(int reason) {
+ (void)reason;
+}
+#define TRACE_RAM_BLOCK_ATTRIBUTES_STATE_CHANGE 0
+#define TRACE_RAM_BLOCK_ATTRIBUTES_STATE_CHANGE_ENABLED 0
+#define TRACE_RAM_BLOCK_ATTRIBUTES_STATE_CHANGE_BACKEND_DSTATE() (0)
+static inline void trace_ram_block_attributes_state_change(uint64_t offset, uint64_t size, const char *from, const char *to) {
+ (void)offset;
+ (void)size;
+ (void)from;
+ (void)to;
+}
+#define TRACE_RAM_BLOCK_DISCARD_RANGE 0
+#define TRACE_RAM_BLOCK_DISCARD_RANGE_ENABLED 0
+#define TRACE_RAM_BLOCK_DISCARD_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) {
+ (void)rbname;
+ (void)hva;
+ (void)length;
+ (void)need_madvise;
+ (void)need_fallocate;
+ (void)ret;
+}
+#define TRACE_RUNSTATE_SET 0
+#define TRACE_RUNSTATE_SET_ENABLED 0
+#define TRACE_RUNSTATE_SET_BACKEND_DSTATE() (0)
+static inline void trace_runstate_set(int current_state, const char *current_state_str, int new_state, const char *new_state_str) {
+ (void)current_state;
+ (void)current_state_str;
+ (void)new_state;
+ (void)new_state_str;
+}
+#define TRACE_SYSTEM_WAKEUP_REQUEST 0
+#define TRACE_SYSTEM_WAKEUP_REQUEST_ENABLED 0
+#define TRACE_SYSTEM_WAKEUP_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_system_wakeup_request(int reason) {
+ (void)reason;
+}
+#define TRACE_VM_STATE_NOTIFY 0
+#define TRACE_VM_STATE_NOTIFY_ENABLED 0
+#define TRACE_VM_STATE_NOTIFY_BACKEND_DSTATE() (0)
+static inline void trace_vm_state_notify(int running, int reason, const char *reason_str) {
+ (void)running;
+ (void)reason;
+ (void)reason_str;
+}
+#define TRACE_VM_STOP_FLUSH_ALL 0
+#define TRACE_VM_STOP_FLUSH_ALL_ENABLED 0
+#define TRACE_VM_STOP_FLUSH_ALL_BACKEND_DSTATE() (0)
+static inline void trace_vm_stop_flush_all(int ret) {
+ (void)ret;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_arm.h b/trace/trace-target_arm.h
new file mode 100644
index 0000000000..d24260a02b
--- /dev/null
+++ b/trace/trace-target_arm.h
@@ -0,0 +1,130 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_ARM_H
+#define TRACE_TRACE_TARGET_ARM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_ARM_CPU_RESET 0
+#define TRACE_ARM_CPU_RESET_ENABLED 0
+#define TRACE_ARM_CPU_RESET_BACKEND_DSTATE() (0)
+static inline void trace_arm_cpu_reset(uint64_t mp_aff) {
+ (void)mp_aff;
+}
+#define TRACE_ARM_EMULATE_FIRMWARE_RESET 0
+#define TRACE_ARM_EMULATE_FIRMWARE_RESET_ENABLED 0
+#define TRACE_ARM_EMULATE_FIRMWARE_RESET_BACKEND_DSTATE() (0)
+static inline void trace_arm_emulate_firmware_reset(uint64_t mp_aff, unsigned target_el) {
+ (void)mp_aff;
+ (void)target_el;
+}
+#define TRACE_ARM_GT_CNTPOFF_WRITE 0
+#define TRACE_ARM_GT_CNTPOFF_WRITE_ENABLED 0
+#define TRACE_ARM_GT_CNTPOFF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_cntpoff_write(uint64_t value) {
+ (void)value;
+}
+#define TRACE_ARM_GT_CNTVOFF_WRITE 0
+#define TRACE_ARM_GT_CNTVOFF_WRITE_ENABLED 0
+#define TRACE_ARM_GT_CNTVOFF_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_cntvoff_write(uint64_t value) {
+ (void)value;
+}
+#define TRACE_ARM_GT_CTL_WRITE 0
+#define TRACE_ARM_GT_CTL_WRITE_ENABLED 0
+#define TRACE_ARM_GT_CTL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_ctl_write(int timer, uint64_t value) {
+ (void)timer;
+ (void)value;
+}
+#define TRACE_ARM_GT_CVAL_WRITE 0
+#define TRACE_ARM_GT_CVAL_WRITE_ENABLED 0
+#define TRACE_ARM_GT_CVAL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_cval_write(int timer, uint64_t value) {
+ (void)timer;
+ (void)value;
+}
+#define TRACE_ARM_GT_IMASK_TOGGLE 0
+#define TRACE_ARM_GT_IMASK_TOGGLE_ENABLED 0
+#define TRACE_ARM_GT_IMASK_TOGGLE_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_imask_toggle(int timer) {
+ (void)timer;
+}
+#define TRACE_ARM_GT_RECALC 0
+#define TRACE_ARM_GT_RECALC_ENABLED 0
+#define TRACE_ARM_GT_RECALC_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_recalc(int timer, uint64_t nexttick) {
+ (void)timer;
+ (void)nexttick;
+}
+#define TRACE_ARM_GT_RECALC_DISABLED 0
+#define TRACE_ARM_GT_RECALC_DISABLED_ENABLED 0
+#define TRACE_ARM_GT_RECALC_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_recalc_disabled(int timer) {
+ (void)timer;
+}
+#define TRACE_ARM_GT_TVAL_WRITE 0
+#define TRACE_ARM_GT_TVAL_WRITE_ENABLED 0
+#define TRACE_ARM_GT_TVAL_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_tval_write(int timer, uint64_t value) {
+ (void)timer;
+ (void)value;
+}
+#define TRACE_ARM_GT_UPDATE_IRQ 0
+#define TRACE_ARM_GT_UPDATE_IRQ_ENABLED 0
+#define TRACE_ARM_GT_UPDATE_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_arm_gt_update_irq(int timer, int irqstate) {
+ (void)timer;
+ (void)irqstate;
+}
+#define TRACE_ARM_POWERCTL_RESET_CPU 0
+#define TRACE_ARM_POWERCTL_RESET_CPU_ENABLED 0
+#define TRACE_ARM_POWERCTL_RESET_CPU_BACKEND_DSTATE() (0)
+static inline void trace_arm_powerctl_reset_cpu(uint64_t mp_aff) {
+ (void)mp_aff;
+}
+#define TRACE_ARM_POWERCTL_SET_CPU_OFF 0
+#define TRACE_ARM_POWERCTL_SET_CPU_OFF_ENABLED 0
+#define TRACE_ARM_POWERCTL_SET_CPU_OFF_BACKEND_DSTATE() (0)
+static inline void trace_arm_powerctl_set_cpu_off(uint64_t mp_aff) {
+ (void)mp_aff;
+}
+#define TRACE_ARM_POWERCTL_SET_CPU_ON 0
+#define TRACE_ARM_POWERCTL_SET_CPU_ON_ENABLED 0
+#define TRACE_ARM_POWERCTL_SET_CPU_ON_BACKEND_DSTATE() (0)
+static inline void trace_arm_powerctl_set_cpu_on(uint64_t mp_aff, unsigned target_el, const char *mode, uint64_t entry, uint64_t context_id) {
+ (void)mp_aff;
+ (void)target_el;
+ (void)mode;
+ (void)entry;
+ (void)context_id;
+}
+#define TRACE_ARM_POWERCTL_SET_CPU_ON_AND_RESET 0
+#define TRACE_ARM_POWERCTL_SET_CPU_ON_AND_RESET_ENABLED 0
+#define TRACE_ARM_POWERCTL_SET_CPU_ON_AND_RESET_BACKEND_DSTATE() (0)
+static inline void trace_arm_powerctl_set_cpu_on_and_reset(uint64_t mp_aff) {
+ (void)mp_aff;
+}
+#define TRACE_ARM_PSCI_CALL 0
+#define TRACE_ARM_PSCI_CALL_ENABLED 0
+#define TRACE_ARM_PSCI_CALL_BACKEND_DSTATE() (0)
+static inline void trace_arm_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) {
+ (void)x0;
+ (void)x1;
+ (void)x2;
+ (void)x3;
+ (void)cpuid;
+}
+#define TRACE_KVM_ARM_FIXUP_MSI_ROUTE 0
+#define TRACE_KVM_ARM_FIXUP_MSI_ROUTE_ENABLED 0
+#define TRACE_KVM_ARM_FIXUP_MSI_ROUTE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) {
+ (void)iova;
+ (void)gpa;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_arm_hvf.h b/trace/trace-target_arm_hvf.h
new file mode 100644
index 0000000000..485a4ae9bd
--- /dev/null
+++ b/trace/trace-target_arm_hvf.h
@@ -0,0 +1,153 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_ARM_HVF_H
+#define TRACE_TRACE_TARGET_ARM_HVF_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_HVF_DATA_ABORT 0
+#define TRACE_HVF_DATA_ABORT_ENABLED 0
+#define TRACE_HVF_DATA_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_hvf_data_abort(uint64_t va, uint64_t pa, bool isv, bool iswrite, bool s1ptw, uint32_t len, uint32_t srt) {
+ (void)va;
+ (void)pa;
+ (void)isv;
+ (void)iswrite;
+ (void)s1ptw;
+ (void)len;
+ (void)srt;
+}
+#define TRACE_HVF_EMU_REGINFO_READ 0
+#define TRACE_HVF_EMU_REGINFO_READ_ENABLED 0
+#define TRACE_HVF_EMU_REGINFO_READ_BACKEND_DSTATE() (0)
+static inline void trace_hvf_emu_reginfo_read(const char *cpname, const char *regname, uint64_t val) {
+ (void)cpname;
+ (void)regname;
+ (void)val;
+}
+#define TRACE_HVF_EMU_REGINFO_WRITE 0
+#define TRACE_HVF_EMU_REGINFO_WRITE_ENABLED 0
+#define TRACE_HVF_EMU_REGINFO_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_hvf_emu_reginfo_write(const char *cpname, const char *regname, uint64_t val) {
+ (void)cpname;
+ (void)regname;
+ (void)val;
+}
+#define TRACE_HVF_EXIT 0
+#define TRACE_HVF_EXIT_ENABLED 0
+#define TRACE_HVF_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_hvf_exit(uint64_t syndrome, uint32_t ec, uint64_t pc) {
+ (void)syndrome;
+ (void)ec;
+ (void)pc;
+}
+#define TRACE_HVF_ILLEGAL_GUEST_STATE 0
+#define TRACE_HVF_ILLEGAL_GUEST_STATE_ENABLED 0
+#define TRACE_HVF_ILLEGAL_GUEST_STATE_BACKEND_DSTATE() (0)
+static inline void trace_hvf_illegal_guest_state(void) {
+}
+#define TRACE_HVF_INJECT_FIQ 0
+#define TRACE_HVF_INJECT_FIQ_ENABLED 0
+#define TRACE_HVF_INJECT_FIQ_BACKEND_DSTATE() (0)
+static inline void trace_hvf_inject_fiq(void) {
+}
+#define TRACE_HVF_INJECT_IRQ 0
+#define TRACE_HVF_INJECT_IRQ_ENABLED 0
+#define TRACE_HVF_INJECT_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_hvf_inject_irq(void) {
+}
+#define TRACE_HVF_INSN_ABORT 0
+#define TRACE_HVF_INSN_ABORT_ENABLED 0
+#define TRACE_HVF_INSN_ABORT_BACKEND_DSTATE() (0)
+static inline void trace_hvf_insn_abort(uint64_t pc, uint32_t set, bool fnv, bool ea, bool s1ptw, uint32_t ifsc) {
+ (void)pc;
+ (void)set;
+ (void)fnv;
+ (void)ea;
+ (void)s1ptw;
+ (void)ifsc;
+}
+#define TRACE_HVF_KICK_VCPU_THREAD 0
+#define TRACE_HVF_KICK_VCPU_THREAD_ENABLED 0
+#define TRACE_HVF_KICK_VCPU_THREAD_BACKEND_DSTATE() (0)
+static inline void trace_hvf_kick_vcpu_thread(unsigned cpuidx, bool stop) {
+ (void)cpuidx;
+ (void)stop;
+}
+#define TRACE_HVF_PSCI_CALL 0
+#define TRACE_HVF_PSCI_CALL_ENABLED 0
+#define TRACE_HVF_PSCI_CALL_BACKEND_DSTATE() (0)
+static inline void trace_hvf_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) {
+ (void)x0;
+ (void)x1;
+ (void)x2;
+ (void)x3;
+ (void)cpuid;
+}
+#define TRACE_HVF_SYSREG_READ 0
+#define TRACE_HVF_SYSREG_READ_ENABLED 0
+#define TRACE_HVF_SYSREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_hvf_sysreg_read(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) {
+ (void)reg;
+ (void)op0;
+ (void)op1;
+ (void)crn;
+ (void)crm;
+ (void)op2;
+ (void)val;
+}
+#define TRACE_HVF_SYSREG_WRITE 0
+#define TRACE_HVF_SYSREG_WRITE_ENABLED 0
+#define TRACE_HVF_SYSREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_hvf_sysreg_write(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) {
+ (void)reg;
+ (void)op0;
+ (void)op1;
+ (void)crn;
+ (void)crm;
+ (void)op2;
+ (void)val;
+}
+#define TRACE_HVF_UNHANDLED_SYSREG_READ 0
+#define TRACE_HVF_UNHANDLED_SYSREG_READ_ENABLED 0
+#define TRACE_HVF_UNHANDLED_SYSREG_READ_BACKEND_DSTATE() (0)
+static inline void trace_hvf_unhandled_sysreg_read(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) {
+ (void)pc;
+ (void)reg;
+ (void)op0;
+ (void)op1;
+ (void)crn;
+ (void)crm;
+ (void)op2;
+}
+#define TRACE_HVF_UNHANDLED_SYSREG_WRITE 0
+#define TRACE_HVF_UNHANDLED_SYSREG_WRITE_ENABLED 0
+#define TRACE_HVF_UNHANDLED_SYSREG_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_hvf_unhandled_sysreg_write(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) {
+ (void)pc;
+ (void)reg;
+ (void)op0;
+ (void)op1;
+ (void)crn;
+ (void)crm;
+ (void)op2;
+}
+#define TRACE_HVF_UNKNOWN_HVC 0
+#define TRACE_HVF_UNKNOWN_HVC_ENABLED 0
+#define TRACE_HVF_UNKNOWN_HVC_BACKEND_DSTATE() (0)
+static inline void trace_hvf_unknown_hvc(uint64_t pc, uint64_t x0) {
+ (void)pc;
+ (void)x0;
+}
+#define TRACE_HVF_UNKNOWN_SMC 0
+#define TRACE_HVF_UNKNOWN_SMC_ENABLED 0
+#define TRACE_HVF_UNKNOWN_SMC_BACKEND_DSTATE() (0)
+static inline void trace_hvf_unknown_smc(uint64_t x0) {
+ (void)x0;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_hppa.h b/trace/trace-target_hppa.h
new file mode 100644
index 0000000000..35323b1ae8
--- /dev/null
+++ b/trace/trace-target_hppa.h
@@ -0,0 +1,13 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_HPPA_H
+#define TRACE_TRACE_TARGET_HPPA_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_i386.h b/trace/trace-target_i386.h
new file mode 100644
index 0000000000..fe7121b17a
--- /dev/null
+++ b/trace/trace-target_i386.h
@@ -0,0 +1,105 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_I386_H
+#define TRACE_TRACE_TARGET_I386_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_KVM_MEMCRYPT_REGISTER_REGION 0
+#define TRACE_KVM_MEMCRYPT_REGISTER_REGION_ENABLED 0
+#define TRACE_KVM_MEMCRYPT_REGISTER_REGION_BACKEND_DSTATE() (0)
+static inline void trace_kvm_memcrypt_register_region(void *addr, size_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_KVM_MEMCRYPT_UNREGISTER_REGION 0
+#define TRACE_KVM_MEMCRYPT_UNREGISTER_REGION_ENABLED 0
+#define TRACE_KVM_MEMCRYPT_UNREGISTER_REGION_BACKEND_DSTATE() (0)
+static inline void trace_kvm_memcrypt_unregister_region(void *addr, size_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_KVM_SEV_ATTESTATION_REPORT 0
+#define TRACE_KVM_SEV_ATTESTATION_REPORT_ENABLED 0
+#define TRACE_KVM_SEV_ATTESTATION_REPORT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_attestation_report(const char *mnonce, const char *data) {
+ (void)mnonce;
+ (void)data;
+}
+#define TRACE_KVM_SEV_CHANGE_STATE 0
+#define TRACE_KVM_SEV_CHANGE_STATE_ENABLED 0
+#define TRACE_KVM_SEV_CHANGE_STATE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_change_state(const char *old, const char *new) {
+ (void)old;
+ (void)new;
+}
+#define TRACE_KVM_SEV_INIT 0
+#define TRACE_KVM_SEV_INIT_ENABLED 0
+#define TRACE_KVM_SEV_INIT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_init(void) {
+}
+#define TRACE_KVM_SEV_LAUNCH_FINISH 0
+#define TRACE_KVM_SEV_LAUNCH_FINISH_ENABLED 0
+#define TRACE_KVM_SEV_LAUNCH_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_launch_finish(void) {
+}
+#define TRACE_KVM_SEV_LAUNCH_MEASUREMENT 0
+#define TRACE_KVM_SEV_LAUNCH_MEASUREMENT_ENABLED 0
+#define TRACE_KVM_SEV_LAUNCH_MEASUREMENT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_launch_measurement(const char *value) {
+ (void)value;
+}
+#define TRACE_KVM_SEV_LAUNCH_SECRET 0
+#define TRACE_KVM_SEV_LAUNCH_SECRET_ENABLED 0
+#define TRACE_KVM_SEV_LAUNCH_SECRET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_launch_secret(uint64_t hpa, uint64_t hva, uint64_t secret, int len) {
+ (void)hpa;
+ (void)hva;
+ (void)secret;
+ (void)len;
+}
+#define TRACE_KVM_SEV_LAUNCH_START 0
+#define TRACE_KVM_SEV_LAUNCH_START_ENABLED 0
+#define TRACE_KVM_SEV_LAUNCH_START_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_launch_start(int policy, void *session, void *pdh) {
+ (void)policy;
+ (void)session;
+ (void)pdh;
+}
+#define TRACE_KVM_SEV_LAUNCH_UPDATE_DATA 0
+#define TRACE_KVM_SEV_LAUNCH_UPDATE_DATA_ENABLED 0
+#define TRACE_KVM_SEV_LAUNCH_UPDATE_DATA_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_launch_update_data(void *addr, size_t len) {
+ (void)addr;
+ (void)len;
+}
+#define TRACE_KVM_SEV_SNP_LAUNCH_FINISH 0
+#define TRACE_KVM_SEV_SNP_LAUNCH_FINISH_ENABLED 0
+#define TRACE_KVM_SEV_SNP_LAUNCH_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_snp_launch_finish(char *id_block, char *id_auth, char *host_data) {
+ (void)id_block;
+ (void)id_auth;
+ (void)host_data;
+}
+#define TRACE_KVM_SEV_SNP_LAUNCH_START 0
+#define TRACE_KVM_SEV_SNP_LAUNCH_START_ENABLED 0
+#define TRACE_KVM_SEV_SNP_LAUNCH_START_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_snp_launch_start(uint64_t policy, char *gosvw) {
+ (void)policy;
+ (void)gosvw;
+}
+#define TRACE_KVM_SEV_SNP_LAUNCH_UPDATE 0
+#define TRACE_KVM_SEV_SNP_LAUNCH_UPDATE_ENABLED 0
+#define TRACE_KVM_SEV_SNP_LAUNCH_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sev_snp_launch_update(uint64_t src, uint64_t gpa, uint64_t len, const char *type) {
+ (void)src;
+ (void)gpa;
+ (void)len;
+ (void)type;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_i386_kvm.h b/trace/trace-target_i386_kvm.h
new file mode 100644
index 0000000000..7729362c9d
--- /dev/null
+++ b/trace/trace-target_i386_kvm.h
@@ -0,0 +1,84 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_I386_KVM_H
+#define TRACE_TRACE_TARGET_I386_KVM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_KVM_HC_MAP_GPA_RANGE 0
+#define TRACE_KVM_HC_MAP_GPA_RANGE_ENABLED 0
+#define TRACE_KVM_HC_MAP_GPA_RANGE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_hc_map_gpa_range(uint64_t gpa, uint64_t size, uint64_t attributes, uint64_t flags) {
+ (void)gpa;
+ (void)size;
+ (void)attributes;
+ (void)flags;
+}
+#define TRACE_KVM_X86_ADD_MSI_ROUTE 0
+#define TRACE_KVM_X86_ADD_MSI_ROUTE_ENABLED 0
+#define TRACE_KVM_X86_ADD_MSI_ROUTE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_x86_add_msi_route(int virq) {
+ (void)virq;
+}
+#define TRACE_KVM_X86_FIXUP_MSI_ERROR 0
+#define TRACE_KVM_X86_FIXUP_MSI_ERROR_ENABLED 0
+#define TRACE_KVM_X86_FIXUP_MSI_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_kvm_x86_fixup_msi_error(uint32_t gsi) {
+ (void)gsi;
+}
+#define TRACE_KVM_X86_REMOVE_MSI_ROUTE 0
+#define TRACE_KVM_X86_REMOVE_MSI_ROUTE_ENABLED 0
+#define TRACE_KVM_X86_REMOVE_MSI_ROUTE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_x86_remove_msi_route(int virq) {
+ (void)virq;
+}
+#define TRACE_KVM_X86_UPDATE_MSI_ROUTES 0
+#define TRACE_KVM_X86_UPDATE_MSI_ROUTES_ENABLED 0
+#define TRACE_KVM_X86_UPDATE_MSI_ROUTES_BACKEND_DSTATE() (0)
+static inline void trace_kvm_x86_update_msi_routes(int num) {
+ (void)num;
+}
+#define TRACE_KVM_XEN_HYPERCALL 0
+#define TRACE_KVM_XEN_HYPERCALL_ENABLED 0
+#define TRACE_KVM_XEN_HYPERCALL_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_hypercall(int cpu, uint8_t cpl, uint64_t input, uint64_t a0, uint64_t a1, uint64_t a2, uint64_t ret) {
+ (void)cpu;
+ (void)cpl;
+ (void)input;
+ (void)a0;
+ (void)a1;
+ (void)a2;
+ (void)ret;
+}
+#define TRACE_KVM_XEN_SET_SHARED_INFO 0
+#define TRACE_KVM_XEN_SET_SHARED_INFO_ENABLED 0
+#define TRACE_KVM_XEN_SET_SHARED_INFO_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_set_shared_info(uint64_t gfn) {
+ (void)gfn;
+}
+#define TRACE_KVM_XEN_SET_VCPU_ATTR 0
+#define TRACE_KVM_XEN_SET_VCPU_ATTR_ENABLED 0
+#define TRACE_KVM_XEN_SET_VCPU_ATTR_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_set_vcpu_attr(int cpu, int type, uint64_t gpa) {
+ (void)cpu;
+ (void)type;
+ (void)gpa;
+}
+#define TRACE_KVM_XEN_SET_VCPU_CALLBACK 0
+#define TRACE_KVM_XEN_SET_VCPU_CALLBACK_ENABLED 0
+#define TRACE_KVM_XEN_SET_VCPU_CALLBACK_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_set_vcpu_callback(int cpu, int vector) {
+ (void)cpu;
+ (void)vector;
+}
+#define TRACE_KVM_XEN_SOFT_RESET 0
+#define TRACE_KVM_XEN_SOFT_RESET_ENABLED 0
+#define TRACE_KVM_XEN_SOFT_RESET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_xen_soft_reset(void) {
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_loongarch.h b/trace/trace-target_loongarch.h
new file mode 100644
index 0000000000..e47efde1e6
--- /dev/null
+++ b/trace/trace-target_loongarch.h
@@ -0,0 +1,86 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_LOONGARCH_H
+#define TRACE_TRACE_TARGET_LOONGARCH_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_KVM_ARCH_HANDLE_EXIT 0
+#define TRACE_KVM_ARCH_HANDLE_EXIT_ENABLED 0
+#define TRACE_KVM_ARCH_HANDLE_EXIT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_arch_handle_exit(int num) {
+ (void)num;
+}
+#define TRACE_KVM_FAILED_GET_COUNTER 0
+#define TRACE_KVM_FAILED_GET_COUNTER_ENABLED 0
+#define TRACE_KVM_FAILED_GET_COUNTER_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_get_counter(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_GET_CPUCFG 0
+#define TRACE_KVM_FAILED_GET_CPUCFG_ENABLED 0
+#define TRACE_KVM_FAILED_GET_CPUCFG_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_get_cpucfg(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_GET_FPU 0
+#define TRACE_KVM_FAILED_GET_FPU_ENABLED 0
+#define TRACE_KVM_FAILED_GET_FPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_get_fpu(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_GET_MPSTATE 0
+#define TRACE_KVM_FAILED_GET_MPSTATE_ENABLED 0
+#define TRACE_KVM_FAILED_GET_MPSTATE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_get_mpstate(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_GET_REGS_CORE 0
+#define TRACE_KVM_FAILED_GET_REGS_CORE_ENABLED 0
+#define TRACE_KVM_FAILED_GET_REGS_CORE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_get_regs_core(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_PUT_COUNTER 0
+#define TRACE_KVM_FAILED_PUT_COUNTER_ENABLED 0
+#define TRACE_KVM_FAILED_PUT_COUNTER_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_put_counter(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_PUT_CPUCFG 0
+#define TRACE_KVM_FAILED_PUT_CPUCFG_ENABLED 0
+#define TRACE_KVM_FAILED_PUT_CPUCFG_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_put_cpucfg(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_PUT_FPU 0
+#define TRACE_KVM_FAILED_PUT_FPU_ENABLED 0
+#define TRACE_KVM_FAILED_PUT_FPU_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_put_fpu(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_PUT_MPSTATE 0
+#define TRACE_KVM_FAILED_PUT_MPSTATE_ENABLED 0
+#define TRACE_KVM_FAILED_PUT_MPSTATE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_put_mpstate(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_PUT_REGS_CORE 0
+#define TRACE_KVM_FAILED_PUT_REGS_CORE_ENABLED 0
+#define TRACE_KVM_FAILED_PUT_REGS_CORE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_put_regs_core(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_SET_INTR 0
+#define TRACE_KVM_SET_INTR_ENABLED 0
+#define TRACE_KVM_SET_INTR_BACKEND_DSTATE() (0)
+static inline void trace_kvm_set_intr(int irq, int level) {
+ (void)irq;
+ (void)level;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_mips_tcg.h b/trace/trace-target_mips_tcg.h
new file mode 100644
index 0000000000..f0704a4180
--- /dev/null
+++ b/trace/trace-target_mips_tcg.h
@@ -0,0 +1,32 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_MIPS_TCG_H
+#define TRACE_TRACE_TARGET_MIPS_TCG_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MIPS_TRANSLATE_C0 0
+#define TRACE_MIPS_TRANSLATE_C0_ENABLED 0
+#define TRACE_MIPS_TRANSLATE_C0_BACKEND_DSTATE() (0)
+static inline void trace_mips_translate_c0(const char *instr, const char *rn, int reg, int sel) {
+ (void)instr;
+ (void)rn;
+ (void)reg;
+ (void)sel;
+}
+#define TRACE_MIPS_TRANSLATE_TR 0
+#define TRACE_MIPS_TRANSLATE_TR_ENABLED 0
+#define TRACE_MIPS_TRANSLATE_TR_BACKEND_DSTATE() (0)
+static inline void trace_mips_translate_tr(const char *instr, int rt, int u, int sel, int h) {
+ (void)instr;
+ (void)rt;
+ (void)u;
+ (void)sel;
+ (void)h;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_ppc.h b/trace/trace-target_ppc.h
new file mode 100644
index 0000000000..5c97cb6ac4
--- /dev/null
+++ b/trace/trace-target_ppc.h
@@ -0,0 +1,212 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_PPC_H
+#define TRACE_TRACE_TARGET_PPC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_KVM_FAILED_DTL_GET 0
+#define TRACE_KVM_FAILED_DTL_GET_ENABLED 0
+#define TRACE_KVM_FAILED_DTL_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_dtl_get(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_DTL_SET 0
+#define TRACE_KVM_FAILED_DTL_SET_ENABLED 0
+#define TRACE_KVM_FAILED_DTL_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_dtl_set(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_FP_GET 0
+#define TRACE_KVM_FAILED_FP_GET_ENABLED 0
+#define TRACE_KVM_FAILED_FP_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_fp_get(const char *fpname, int fpnum, const char *msg) {
+ (void)fpname;
+ (void)fpnum;
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_FP_SET 0
+#define TRACE_KVM_FAILED_FP_SET_ENABLED 0
+#define TRACE_KVM_FAILED_FP_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_fp_set(const char *fpname, int fpnum, const char *msg) {
+ (void)fpname;
+ (void)fpnum;
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_FPSCR_GET 0
+#define TRACE_KVM_FAILED_FPSCR_GET_ENABLED 0
+#define TRACE_KVM_FAILED_FPSCR_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_fpscr_get(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_FPSCR_SET 0
+#define TRACE_KVM_FAILED_FPSCR_SET_ENABLED 0
+#define TRACE_KVM_FAILED_FPSCR_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_fpscr_set(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_GET_VPA 0
+#define TRACE_KVM_FAILED_GET_VPA_ENABLED 0
+#define TRACE_KVM_FAILED_GET_VPA_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_get_vpa(void) {
+}
+#define TRACE_KVM_FAILED_NULL_VPA_ADDR_SET 0
+#define TRACE_KVM_FAILED_NULL_VPA_ADDR_SET_ENABLED 0
+#define TRACE_KVM_FAILED_NULL_VPA_ADDR_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_null_vpa_addr_set(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_PUT_VPA 0
+#define TRACE_KVM_FAILED_PUT_VPA_ENABLED 0
+#define TRACE_KVM_FAILED_PUT_VPA_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_put_vpa(void) {
+}
+#define TRACE_KVM_FAILED_SLB_GET 0
+#define TRACE_KVM_FAILED_SLB_GET_ENABLED 0
+#define TRACE_KVM_FAILED_SLB_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_slb_get(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_SLB_SET 0
+#define TRACE_KVM_FAILED_SLB_SET_ENABLED 0
+#define TRACE_KVM_FAILED_SLB_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_slb_set(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_SPR_GET 0
+#define TRACE_KVM_FAILED_SPR_GET_ENABLED 0
+#define TRACE_KVM_FAILED_SPR_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_spr_get(int spr, const char *msg) {
+ (void)spr;
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_SPR_SET 0
+#define TRACE_KVM_FAILED_SPR_SET_ENABLED 0
+#define TRACE_KVM_FAILED_SPR_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_spr_set(int spr, const char *msg) {
+ (void)spr;
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_VPA_ADDR_GET 0
+#define TRACE_KVM_FAILED_VPA_ADDR_GET_ENABLED 0
+#define TRACE_KVM_FAILED_VPA_ADDR_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_vpa_addr_get(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_VPA_ADDR_SET 0
+#define TRACE_KVM_FAILED_VPA_ADDR_SET_ENABLED 0
+#define TRACE_KVM_FAILED_VPA_ADDR_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_vpa_addr_set(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_VR_GET 0
+#define TRACE_KVM_FAILED_VR_GET_ENABLED 0
+#define TRACE_KVM_FAILED_VR_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_vr_get(int vr, const char *msg) {
+ (void)vr;
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_VR_SET 0
+#define TRACE_KVM_FAILED_VR_SET_ENABLED 0
+#define TRACE_KVM_FAILED_VR_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_vr_set(int vr, const char *msg) {
+ (void)vr;
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_VSCR_GET 0
+#define TRACE_KVM_FAILED_VSCR_GET_ENABLED 0
+#define TRACE_KVM_FAILED_VSCR_GET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_vscr_get(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_FAILED_VSCR_SET 0
+#define TRACE_KVM_FAILED_VSCR_SET_ENABLED 0
+#define TRACE_KVM_FAILED_VSCR_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_vscr_set(const char *msg) {
+ (void)msg;
+}
+#define TRACE_KVM_HANDLE_DCR_READ 0
+#define TRACE_KVM_HANDLE_DCR_READ_ENABLED 0
+#define TRACE_KVM_HANDLE_DCR_READ_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_dcr_read(void) {
+}
+#define TRACE_KVM_HANDLE_DCR_WRITE 0
+#define TRACE_KVM_HANDLE_DCR_WRITE_ENABLED 0
+#define TRACE_KVM_HANDLE_DCR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_dcr_write(void) {
+}
+#define TRACE_KVM_HANDLE_DEBUG_EXCEPTION 0
+#define TRACE_KVM_HANDLE_DEBUG_EXCEPTION_ENABLED 0
+#define TRACE_KVM_HANDLE_DEBUG_EXCEPTION_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_debug_exception(void) {
+}
+#define TRACE_KVM_HANDLE_EPR 0
+#define TRACE_KVM_HANDLE_EPR_ENABLED 0
+#define TRACE_KVM_HANDLE_EPR_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_epr(void) {
+}
+#define TRACE_KVM_HANDLE_HALT 0
+#define TRACE_KVM_HANDLE_HALT_ENABLED 0
+#define TRACE_KVM_HANDLE_HALT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_halt(void) {
+}
+#define TRACE_KVM_HANDLE_NMI_EXCEPTION 0
+#define TRACE_KVM_HANDLE_NMI_EXCEPTION_ENABLED 0
+#define TRACE_KVM_HANDLE_NMI_EXCEPTION_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_nmi_exception(void) {
+}
+#define TRACE_KVM_HANDLE_PAPR_HCALL 0
+#define TRACE_KVM_HANDLE_PAPR_HCALL_ENABLED 0
+#define TRACE_KVM_HANDLE_PAPR_HCALL_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_papr_hcall(uint64_t hcall) {
+ (void)hcall;
+}
+#define TRACE_KVM_HANDLE_WATCHDOG_EXPIRY 0
+#define TRACE_KVM_HANDLE_WATCHDOG_EXPIRY_ENABLED 0
+#define TRACE_KVM_HANDLE_WATCHDOG_EXPIRY_BACKEND_DSTATE() (0)
+static inline void trace_kvm_handle_watchdog_expiry(void) {
+}
+#define TRACE_PPC_EXCP_DSI 0
+#define TRACE_PPC_EXCP_DSI_ENABLED 0
+#define TRACE_PPC_EXCP_DSI_BACKEND_DSTATE() (0)
+static inline void trace_ppc_excp_dsi(uint64_t dsisr, uint64_t dar) {
+ (void)dsisr;
+ (void)dar;
+}
+#define TRACE_PPC_EXCP_FP_IGNORE 0
+#define TRACE_PPC_EXCP_FP_IGNORE_ENABLED 0
+#define TRACE_PPC_EXCP_FP_IGNORE_BACKEND_DSTATE() (0)
+static inline void trace_ppc_excp_fp_ignore(void) {
+}
+#define TRACE_PPC_EXCP_INVAL 0
+#define TRACE_PPC_EXCP_INVAL_ENABLED 0
+#define TRACE_PPC_EXCP_INVAL_BACKEND_DSTATE() (0)
+static inline void trace_ppc_excp_inval(uint64_t nip) {
+ (void)nip;
+}
+#define TRACE_PPC_EXCP_ISI 0
+#define TRACE_PPC_EXCP_ISI_ENABLED 0
+#define TRACE_PPC_EXCP_ISI_BACKEND_DSTATE() (0)
+static inline void trace_ppc_excp_isi(uint64_t msr, uint64_t nip) {
+ (void)msr;
+ (void)nip;
+}
+#define TRACE_PPC_EXCP_PRINT 0
+#define TRACE_PPC_EXCP_PRINT_ENABLED 0
+#define TRACE_PPC_EXCP_PRINT_BACKEND_DSTATE() (0)
+static inline void trace_ppc_excp_print(const char *excp) {
+ (void)excp;
+}
+#define TRACE_PPC_EXCP_RFI 0
+#define TRACE_PPC_EXCP_RFI_ENABLED 0
+#define TRACE_PPC_EXCP_RFI_BACKEND_DSTATE() (0)
+static inline void trace_ppc_excp_rfi(uint64_t nip, uint64_t msr) {
+ (void)nip;
+ (void)msr;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_riscv.h b/trace/trace-target_riscv.h
new file mode 100644
index 0000000000..23f8e3df29
--- /dev/null
+++ b/trace/trace-target_riscv.h
@@ -0,0 +1,78 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_RISCV_H
+#define TRACE_TRACE_TARGET_RISCV_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_MSECCFG_CSR_READ 0
+#define TRACE_MSECCFG_CSR_READ_ENABLED 0
+#define TRACE_MSECCFG_CSR_READ_BACKEND_DSTATE() (0)
+static inline void trace_mseccfg_csr_read(uint64_t mhartid, uint64_t val) {
+ (void)mhartid;
+ (void)val;
+}
+#define TRACE_MSECCFG_CSR_WRITE 0
+#define TRACE_MSECCFG_CSR_WRITE_ENABLED 0
+#define TRACE_MSECCFG_CSR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_mseccfg_csr_write(uint64_t mhartid, uint64_t val) {
+ (void)mhartid;
+ (void)val;
+}
+#define TRACE_PMPADDR_CSR_READ 0
+#define TRACE_PMPADDR_CSR_READ_ENABLED 0
+#define TRACE_PMPADDR_CSR_READ_BACKEND_DSTATE() (0)
+static inline void trace_pmpaddr_csr_read(uint64_t mhartid, uint32_t addr_index, uint64_t val) {
+ (void)mhartid;
+ (void)addr_index;
+ (void)val;
+}
+#define TRACE_PMPADDR_CSR_WRITE 0
+#define TRACE_PMPADDR_CSR_WRITE_ENABLED 0
+#define TRACE_PMPADDR_CSR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pmpaddr_csr_write(uint64_t mhartid, uint32_t addr_index, uint64_t val) {
+ (void)mhartid;
+ (void)addr_index;
+ (void)val;
+}
+#define TRACE_PMPCFG_CSR_READ 0
+#define TRACE_PMPCFG_CSR_READ_ENABLED 0
+#define TRACE_PMPCFG_CSR_READ_BACKEND_DSTATE() (0)
+static inline void trace_pmpcfg_csr_read(uint64_t mhartid, uint32_t reg_index, uint64_t val) {
+ (void)mhartid;
+ (void)reg_index;
+ (void)val;
+}
+#define TRACE_PMPCFG_CSR_WRITE 0
+#define TRACE_PMPCFG_CSR_WRITE_ENABLED 0
+#define TRACE_PMPCFG_CSR_WRITE_BACKEND_DSTATE() (0)
+static inline void trace_pmpcfg_csr_write(uint64_t mhartid, uint32_t reg_index, uint64_t val) {
+ (void)mhartid;
+ (void)reg_index;
+ (void)val;
+}
+#define TRACE_RISCV_EXCEPTION 0
+#define TRACE_RISCV_EXCEPTION_ENABLED 0
+#define TRACE_RISCV_EXCEPTION_BACKEND_DSTATE() (0)
+static inline void trace_riscv_exception(uint32_t exception, const char *desc, uint64_t epc) {
+ (void)exception;
+ (void)desc;
+ (void)epc;
+}
+#define TRACE_RISCV_TRAP 0
+#define TRACE_RISCV_TRAP_ENABLED 0
+#define TRACE_RISCV_TRAP_BACKEND_DSTATE() (0)
+static inline void trace_riscv_trap(uint64_t hartid, bool async, uint64_t cause, uint64_t epc, uint64_t tval, const char *desc) {
+ (void)hartid;
+ (void)async;
+ (void)cause;
+ (void)epc;
+ (void)tval;
+ (void)desc;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_s390x.h b/trace/trace-target_s390x.h
new file mode 100644
index 0000000000..941a055073
--- /dev/null
+++ b/trace/trace-target_s390x.h
@@ -0,0 +1,71 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_S390X_H
+#define TRACE_TRACE_TARGET_S390X_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CPU_HALT 0
+#define TRACE_CPU_HALT_ENABLED 0
+#define TRACE_CPU_HALT_BACKEND_DSTATE() (0)
+static inline void trace_cpu_halt(int cpu_index) {
+ (void)cpu_index;
+}
+#define TRACE_CPU_SET_STATE 0
+#define TRACE_CPU_SET_STATE_ENABLED 0
+#define TRACE_CPU_SET_STATE_BACKEND_DSTATE() (0)
+static inline void trace_cpu_set_state(int cpu_index, uint8_t state) {
+ (void)cpu_index;
+ (void)state;
+}
+#define TRACE_CPU_UNHALT 0
+#define TRACE_CPU_UNHALT_ENABLED 0
+#define TRACE_CPU_UNHALT_BACKEND_DSTATE() (0)
+static inline void trace_cpu_unhalt(int cpu_index) {
+ (void)cpu_index;
+}
+#define TRACE_IOINST 0
+#define TRACE_IOINST_ENABLED 0
+#define TRACE_IOINST_BACKEND_DSTATE() (0)
+static inline void trace_ioinst(const char *insn) {
+ (void)insn;
+}
+#define TRACE_IOINST_CHP_ID 0
+#define TRACE_IOINST_CHP_ID_ENABLED 0
+#define TRACE_IOINST_CHP_ID_BACKEND_DSTATE() (0)
+static inline void trace_ioinst_chp_id(const char *insn, int cssid, int chpid) {
+ (void)insn;
+ (void)cssid;
+ (void)chpid;
+}
+#define TRACE_IOINST_CHSC_CMD 0
+#define TRACE_IOINST_CHSC_CMD_ENABLED 0
+#define TRACE_IOINST_CHSC_CMD_BACKEND_DSTATE() (0)
+static inline void trace_ioinst_chsc_cmd(uint16_t cmd, uint16_t len) {
+ (void)cmd;
+ (void)len;
+}
+#define TRACE_IOINST_SCH_ID 0
+#define TRACE_IOINST_SCH_ID_ENABLED 0
+#define TRACE_IOINST_SCH_ID_BACKEND_DSTATE() (0)
+static inline void trace_ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) {
+ (void)insn;
+ (void)cssid;
+ (void)ssid;
+ (void)schid;
+}
+#define TRACE_SIGP_FINISHED 0
+#define TRACE_SIGP_FINISHED_ENABLED 0
+#define TRACE_SIGP_FINISHED_BACKEND_DSTATE() (0)
+static inline void trace_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) {
+ (void)order;
+ (void)cpu_index;
+ (void)dst_index;
+ (void)cc;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_s390x_kvm.h b/trace/trace-target_s390x_kvm.h
new file mode 100644
index 0000000000..caca0a418d
--- /dev/null
+++ b/trace/trace-target_s390x_kvm.h
@@ -0,0 +1,80 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_S390X_KVM_H
+#define TRACE_TRACE_TARGET_S390X_KVM_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_KVM_ASSIGN_SUBCH_IOEVENTFD 0
+#define TRACE_KVM_ASSIGN_SUBCH_IOEVENTFD_ENABLED 0
+#define TRACE_KVM_ASSIGN_SUBCH_IOEVENTFD_BACKEND_DSTATE() (0)
+static inline void trace_kvm_assign_subch_ioeventfd(int fd, uint32_t addr, bool assign, int datamatch) {
+ (void)fd;
+ (void)addr;
+ (void)assign;
+ (void)datamatch;
+}
+#define TRACE_KVM_CLEAR_CMMA 0
+#define TRACE_KVM_CLEAR_CMMA_ENABLED 0
+#define TRACE_KVM_CLEAR_CMMA_BACKEND_DSTATE() (0)
+static inline void trace_kvm_clear_cmma(int rc) {
+ (void)rc;
+}
+#define TRACE_KVM_ENABLE_CMMA 0
+#define TRACE_KVM_ENABLE_CMMA_ENABLED 0
+#define TRACE_KVM_ENABLE_CMMA_BACKEND_DSTATE() (0)
+static inline void trace_kvm_enable_cmma(int rc) {
+ (void)rc;
+}
+#define TRACE_KVM_FAILED_CPU_STATE_SET 0
+#define TRACE_KVM_FAILED_CPU_STATE_SET_ENABLED 0
+#define TRACE_KVM_FAILED_CPU_STATE_SET_BACKEND_DSTATE() (0)
+static inline void trace_kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) {
+ (void)cpu_index;
+ (void)state;
+ (void)msg;
+}
+#define TRACE_KVM_INSN 0
+#define TRACE_KVM_INSN_ENABLED 0
+#define TRACE_KVM_INSN_BACKEND_DSTATE() (0)
+static inline void trace_kvm_insn(uint32_t ipa, uint32_t ipb) {
+ (void)ipa;
+ (void)ipb;
+}
+#define TRACE_KVM_INSN_DIAG 0
+#define TRACE_KVM_INSN_DIAG_ENABLED 0
+#define TRACE_KVM_INSN_DIAG_BACKEND_DSTATE() (0)
+static inline void trace_kvm_insn_diag(uint32_t x) {
+ (void)x;
+}
+#define TRACE_KVM_INSN_UNHANDLED_PRIV 0
+#define TRACE_KVM_INSN_UNHANDLED_PRIV_ENABLED 0
+#define TRACE_KVM_INSN_UNHANDLED_PRIV_BACKEND_DSTATE() (0)
+static inline void trace_kvm_insn_unhandled_priv(uint32_t x) {
+ (void)x;
+}
+#define TRACE_KVM_INTERCEPT 0
+#define TRACE_KVM_INTERCEPT_ENABLED 0
+#define TRACE_KVM_INTERCEPT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_intercept(uint32_t icpt_code, uint64_t psw_addr) {
+ (void)icpt_code;
+ (void)psw_addr;
+}
+#define TRACE_KVM_MSI_ROUTE_FIXUP 0
+#define TRACE_KVM_MSI_ROUTE_FIXUP_ENABLED 0
+#define TRACE_KVM_MSI_ROUTE_FIXUP_BACKEND_DSTATE() (0)
+static inline void trace_kvm_msi_route_fixup(const char* msg) {
+ (void)msg;
+}
+#define TRACE_KVM_SW_BREAKPOINT 0
+#define TRACE_KVM_SW_BREAKPOINT_ENABLED 0
+#define TRACE_KVM_SW_BREAKPOINT_BACKEND_DSTATE() (0)
+static inline void trace_kvm_sw_breakpoint(uint32_t n) {
+ (void)n;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-target_sparc.h b/trace/trace-target_sparc.h
new file mode 100644
index 0000000000..4bb5faa97b
--- /dev/null
+++ b/trace/trace-target_sparc.h
@@ -0,0 +1,182 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_TARGET_SPARC_H
+#define TRACE_TRACE_TARGET_SPARC_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_INT_HELPER_CLEAR_SOFTINT 0
+#define TRACE_INT_HELPER_CLEAR_SOFTINT_ENABLED 0
+#define TRACE_INT_HELPER_CLEAR_SOFTINT_BACKEND_DSTATE() (0)
+static inline void trace_int_helper_clear_softint(uint32_t softint) {
+ (void)softint;
+}
+#define TRACE_INT_HELPER_SET_SOFTINT 0
+#define TRACE_INT_HELPER_SET_SOFTINT_ENABLED 0
+#define TRACE_INT_HELPER_SET_SOFTINT_BACKEND_DSTATE() (0)
+static inline void trace_int_helper_set_softint(uint32_t softint) {
+ (void)softint;
+}
+#define TRACE_INT_HELPER_WRITE_SOFTINT 0
+#define TRACE_INT_HELPER_WRITE_SOFTINT_ENABLED 0
+#define TRACE_INT_HELPER_WRITE_SOFTINT_BACKEND_DSTATE() (0)
+static inline void trace_int_helper_write_softint(uint32_t softint) {
+ (void)softint;
+}
+#define TRACE_MMU_HELPER_DFAULT 0
+#define TRACE_MMU_HELPER_DFAULT_ENABLED 0
+#define TRACE_MMU_HELPER_DFAULT_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) {
+ (void)address;
+ (void)context;
+ (void)mmu_idx;
+ (void)tl;
+}
+#define TRACE_MMU_HELPER_DMISS 0
+#define TRACE_MMU_HELPER_DMISS_ENABLED 0
+#define TRACE_MMU_HELPER_DMISS_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_dmiss(uint64_t address, uint64_t context) {
+ (void)address;
+ (void)context;
+}
+#define TRACE_MMU_HELPER_DPROT 0
+#define TRACE_MMU_HELPER_DPROT_ENABLED 0
+#define TRACE_MMU_HELPER_DPROT_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) {
+ (void)address;
+ (void)context;
+ (void)mmu_idx;
+ (void)tl;
+}
+#define TRACE_MMU_HELPER_GET_PHYS_ADDR_CODE 0
+#define TRACE_MMU_HELPER_GET_PHYS_ADDR_CODE_ENABLED 0
+#define TRACE_MMU_HELPER_GET_PHYS_ADDR_CODE_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) {
+ (void)tl;
+ (void)mmu_idx;
+ (void)prim_context;
+ (void)sec_context;
+ (void)address;
+}
+#define TRACE_MMU_HELPER_GET_PHYS_ADDR_DATA 0
+#define TRACE_MMU_HELPER_GET_PHYS_ADDR_DATA_ENABLED 0
+#define TRACE_MMU_HELPER_GET_PHYS_ADDR_DATA_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) {
+ (void)tl;
+ (void)mmu_idx;
+ (void)prim_context;
+ (void)sec_context;
+ (void)address;
+}
+#define TRACE_MMU_HELPER_MMU_FAULT 0
+#define TRACE_MMU_HELPER_MMU_FAULT_ENABLED 0
+#define TRACE_MMU_HELPER_MMU_FAULT_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) {
+ (void)address;
+ (void)paddr;
+ (void)mmu_idx;
+ (void)tl;
+ (void)prim_context;
+ (void)sec_context;
+}
+#define TRACE_MMU_HELPER_TFAULT 0
+#define TRACE_MMU_HELPER_TFAULT_ENABLED 0
+#define TRACE_MMU_HELPER_TFAULT_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_tfault(uint64_t address, uint64_t context) {
+ (void)address;
+ (void)context;
+}
+#define TRACE_MMU_HELPER_TMISS 0
+#define TRACE_MMU_HELPER_TMISS_ENABLED 0
+#define TRACE_MMU_HELPER_TMISS_BACKEND_DSTATE() (0)
+static inline void trace_mmu_helper_tmiss(uint64_t address, uint64_t context) {
+ (void)address;
+ (void)context;
+}
+#define TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED_ENABLED 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_check_irqs_disabled(uint32_t pil, uint32_t pil_in, uint32_t softint, int intno) {
+ (void)pil;
+ (void)pil_in;
+ (void)softint;
+ (void)intno;
+}
+#define TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ_ENABLED 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) {
+ (void)tl;
+ (void)tt;
+ (void)intno;
+}
+#define TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ_ENABLED 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_check_irqs_reset_irq(int intno) {
+ (void)intno;
+}
+#define TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ_ENABLED 0
+#define TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ_BACKEND_DSTATE() (0)
+static inline void trace_sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new) {
+ (void)i;
+ (void)old;
+ (void)new;
+}
+#define TRACE_SUN4M_CPU_INTERRUPT 0
+#define TRACE_SUN4M_CPU_INTERRUPT_ENABLED 0
+#define TRACE_SUN4M_CPU_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_cpu_interrupt(unsigned int level) {
+ (void)level;
+}
+#define TRACE_SUN4M_CPU_RESET_INTERRUPT 0
+#define TRACE_SUN4M_CPU_RESET_INTERRUPT_ENABLED 0
+#define TRACE_SUN4M_CPU_RESET_INTERRUPT_BACKEND_DSTATE() (0)
+static inline void trace_sun4m_cpu_reset_interrupt(unsigned int level) {
+ (void)level;
+}
+#define TRACE_WIN_HELPER_DONE 0
+#define TRACE_WIN_HELPER_DONE_ENABLED 0
+#define TRACE_WIN_HELPER_DONE_BACKEND_DSTATE() (0)
+static inline void trace_win_helper_done(uint32_t tl) {
+ (void)tl;
+}
+#define TRACE_WIN_HELPER_GREGSET_ERROR 0
+#define TRACE_WIN_HELPER_GREGSET_ERROR_ENABLED 0
+#define TRACE_WIN_HELPER_GREGSET_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_win_helper_gregset_error(uint32_t pstate) {
+ (void)pstate;
+}
+#define TRACE_WIN_HELPER_NO_SWITCH_PSTATE 0
+#define TRACE_WIN_HELPER_NO_SWITCH_PSTATE_ENABLED 0
+#define TRACE_WIN_HELPER_NO_SWITCH_PSTATE_BACKEND_DSTATE() (0)
+static inline void trace_win_helper_no_switch_pstate(uint32_t new_pstate_regs) {
+ (void)new_pstate_regs;
+}
+#define TRACE_WIN_HELPER_RETRY 0
+#define TRACE_WIN_HELPER_RETRY_ENABLED 0
+#define TRACE_WIN_HELPER_RETRY_BACKEND_DSTATE() (0)
+static inline void trace_win_helper_retry(uint32_t tl) {
+ (void)tl;
+}
+#define TRACE_WIN_HELPER_SWITCH_PSTATE 0
+#define TRACE_WIN_HELPER_SWITCH_PSTATE_ENABLED 0
+#define TRACE_WIN_HELPER_SWITCH_PSTATE_BACKEND_DSTATE() (0)
+static inline void trace_win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) {
+ (void)pstate_regs;
+ (void)new_pstate_regs;
+}
+#define TRACE_WIN_HELPER_WRPIL 0
+#define TRACE_WIN_HELPER_WRPIL_ENABLED 0
+#define TRACE_WIN_HELPER_WRPIL_BACKEND_DSTATE() (0)
+static inline void trace_win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) {
+ (void)psrpil;
+ (void)new_pil;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-ui.h b/trace/trace-ui.h
new file mode 100644
index 0000000000..0958e97102
--- /dev/null
+++ b/trace/trace-ui.h
@@ -0,0 +1,1215 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_UI_H
+#define TRACE_TRACE_UI_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_CLIPBOARD_CHECK_SERIAL 0
+#define TRACE_CLIPBOARD_CHECK_SERIAL_ENABLED 0
+#define TRACE_CLIPBOARD_CHECK_SERIAL_BACKEND_DSTATE() (0)
+static inline void trace_clipboard_check_serial(int cur, int recv, bool ok) {
+ (void)cur;
+ (void)recv;
+ (void)ok;
+}
+#define TRACE_CLIPBOARD_RESET_SERIAL 0
+#define TRACE_CLIPBOARD_RESET_SERIAL_ENABLED 0
+#define TRACE_CLIPBOARD_RESET_SERIAL_BACKEND_DSTATE() (0)
+static inline void trace_clipboard_reset_serial(void) {
+}
+#define TRACE_CONSOLE_GFX_CLOSE 0
+#define TRACE_CONSOLE_GFX_CLOSE_ENABLED 0
+#define TRACE_CONSOLE_GFX_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_console_gfx_close(int index) {
+ (void)index;
+}
+#define TRACE_CONSOLE_GFX_NEW 0
+#define TRACE_CONSOLE_GFX_NEW_ENABLED 0
+#define TRACE_CONSOLE_GFX_NEW_BACKEND_DSTATE() (0)
+static inline void trace_console_gfx_new(void) {
+}
+#define TRACE_CONSOLE_GFX_REUSE 0
+#define TRACE_CONSOLE_GFX_REUSE_ENABLED 0
+#define TRACE_CONSOLE_GFX_REUSE_BACKEND_DSTATE() (0)
+static inline void trace_console_gfx_reuse(int index) {
+ (void)index;
+}
+#define TRACE_CONSOLE_PUTCHAR_CSI 0
+#define TRACE_CONSOLE_PUTCHAR_CSI_ENABLED 0
+#define TRACE_CONSOLE_PUTCHAR_CSI_BACKEND_DSTATE() (0)
+static inline void trace_console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) {
+ (void)esc_param0;
+ (void)esc_param1;
+ (void)ch;
+ (void)nb_esc_params;
+}
+#define TRACE_CONSOLE_PUTCHAR_UNHANDLED 0
+#define TRACE_CONSOLE_PUTCHAR_UNHANDLED_ENABLED 0
+#define TRACE_CONSOLE_PUTCHAR_UNHANDLED_BACKEND_DSTATE() (0)
+static inline void trace_console_putchar_unhandled(int ch) {
+ (void)ch;
+}
+#define TRACE_CONSOLE_REFRESH 0
+#define TRACE_CONSOLE_REFRESH_ENABLED 0
+#define TRACE_CONSOLE_REFRESH_BACKEND_DSTATE() (0)
+static inline void trace_console_refresh(int interval) {
+ (void)interval;
+}
+#define TRACE_CONSOLE_SELECT 0
+#define TRACE_CONSOLE_SELECT_ENABLED 0
+#define TRACE_CONSOLE_SELECT_BACKEND_DSTATE() (0)
+static inline void trace_console_select(int nr) {
+ (void)nr;
+}
+#define TRACE_CONSOLE_TXT_NEW 0
+#define TRACE_CONSOLE_TXT_NEW_ENABLED 0
+#define TRACE_CONSOLE_TXT_NEW_BACKEND_DSTATE() (0)
+static inline void trace_console_txt_new(int w, int h) {
+ (void)w;
+ (void)h;
+}
+#define TRACE_DBUS_CAN_SHARE_MAP 0
+#define TRACE_DBUS_CAN_SHARE_MAP_ENABLED 0
+#define TRACE_DBUS_CAN_SHARE_MAP_BACKEND_DSTATE() (0)
+static inline void trace_dbus_can_share_map(bool share) {
+ (void)share;
+}
+#define TRACE_DBUS_CLIPBOARD_GRAB 0
+#define TRACE_DBUS_CLIPBOARD_GRAB_ENABLED 0
+#define TRACE_DBUS_CLIPBOARD_GRAB_BACKEND_DSTATE() (0)
+static inline void trace_dbus_clipboard_grab(int selection, unsigned int serial) {
+ (void)selection;
+ (void)serial;
+}
+#define TRACE_DBUS_CLIPBOARD_GRAB_FAILED 0
+#define TRACE_DBUS_CLIPBOARD_GRAB_FAILED_ENABLED 0
+#define TRACE_DBUS_CLIPBOARD_GRAB_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_dbus_clipboard_grab_failed(void) {
+}
+#define TRACE_DBUS_CLIPBOARD_QEMU_REQUEST 0
+#define TRACE_DBUS_CLIPBOARD_QEMU_REQUEST_ENABLED 0
+#define TRACE_DBUS_CLIPBOARD_QEMU_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_dbus_clipboard_qemu_request(int type) {
+ (void)type;
+}
+#define TRACE_DBUS_CLIPBOARD_REGISTER 0
+#define TRACE_DBUS_CLIPBOARD_REGISTER_ENABLED 0
+#define TRACE_DBUS_CLIPBOARD_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_dbus_clipboard_register(const char *bus_name) {
+ (void)bus_name;
+}
+#define TRACE_DBUS_CLIPBOARD_UNREGISTER 0
+#define TRACE_DBUS_CLIPBOARD_UNREGISTER_ENABLED 0
+#define TRACE_DBUS_CLIPBOARD_UNREGISTER_BACKEND_DSTATE() (0)
+static inline void trace_dbus_clipboard_unregister(const char *bus_name) {
+ (void)bus_name;
+}
+#define TRACE_DBUS_FILTER 0
+#define TRACE_DBUS_FILTER_ENABLED 0
+#define TRACE_DBUS_FILTER_BACKEND_DSTATE() (0)
+static inline void trace_dbus_filter(unsigned int serial, unsigned int filter) {
+ (void)serial;
+ (void)filter;
+}
+#define TRACE_DBUS_GL_GFX_SWITCH 0
+#define TRACE_DBUS_GL_GFX_SWITCH_ENABLED 0
+#define TRACE_DBUS_GL_GFX_SWITCH_BACKEND_DSTATE() (0)
+static inline void trace_dbus_gl_gfx_switch(void *p) {
+ (void)p;
+}
+#define TRACE_DBUS_KBD_PRESS 0
+#define TRACE_DBUS_KBD_PRESS_ENABLED 0
+#define TRACE_DBUS_KBD_PRESS_BACKEND_DSTATE() (0)
+static inline void trace_dbus_kbd_press(unsigned int keycode) {
+ (void)keycode;
+}
+#define TRACE_DBUS_KBD_RELEASE 0
+#define TRACE_DBUS_KBD_RELEASE_ENABLED 0
+#define TRACE_DBUS_KBD_RELEASE_BACKEND_DSTATE() (0)
+static inline void trace_dbus_kbd_release(unsigned int keycode) {
+ (void)keycode;
+}
+#define TRACE_DBUS_LISTENER_VANISHED 0
+#define TRACE_DBUS_LISTENER_VANISHED_ENABLED 0
+#define TRACE_DBUS_LISTENER_VANISHED_BACKEND_DSTATE() (0)
+static inline void trace_dbus_listener_vanished(const char *bus_name) {
+ (void)bus_name;
+}
+#define TRACE_DBUS_MOUSE_PRESS 0
+#define TRACE_DBUS_MOUSE_PRESS_ENABLED 0
+#define TRACE_DBUS_MOUSE_PRESS_BACKEND_DSTATE() (0)
+static inline void trace_dbus_mouse_press(unsigned int button) {
+ (void)button;
+}
+#define TRACE_DBUS_MOUSE_REL_MOTION 0
+#define TRACE_DBUS_MOUSE_REL_MOTION_ENABLED 0
+#define TRACE_DBUS_MOUSE_REL_MOTION_BACKEND_DSTATE() (0)
+static inline void trace_dbus_mouse_rel_motion(int dx, int dy) {
+ (void)dx;
+ (void)dy;
+}
+#define TRACE_DBUS_MOUSE_RELEASE 0
+#define TRACE_DBUS_MOUSE_RELEASE_ENABLED 0
+#define TRACE_DBUS_MOUSE_RELEASE_BACKEND_DSTATE() (0)
+static inline void trace_dbus_mouse_release(unsigned int button) {
+ (void)button;
+}
+#define TRACE_DBUS_MOUSE_SET_POS 0
+#define TRACE_DBUS_MOUSE_SET_POS_ENABLED 0
+#define TRACE_DBUS_MOUSE_SET_POS_BACKEND_DSTATE() (0)
+static inline void trace_dbus_mouse_set_pos(unsigned int x, unsigned int y) {
+ (void)x;
+ (void)y;
+}
+#define TRACE_DBUS_REGISTERED_LISTENER 0
+#define TRACE_DBUS_REGISTERED_LISTENER_ENABLED 0
+#define TRACE_DBUS_REGISTERED_LISTENER_BACKEND_DSTATE() (0)
+static inline void trace_dbus_registered_listener(const char *bus_name) {
+ (void)bus_name;
+}
+#define TRACE_DBUS_SCANOUT_TEXTURE 0
+#define TRACE_DBUS_SCANOUT_TEXTURE_ENABLED 0
+#define TRACE_DBUS_SCANOUT_TEXTURE_BACKEND_DSTATE() (0)
+static inline void trace_dbus_scanout_texture(uint32_t tex_id, bool backing_y_0_top, uint32_t backing_width, uint32_t backing_height, uint32_t x, uint32_t y, uint32_t w, uint32_t h) {
+ (void)tex_id;
+ (void)backing_y_0_top;
+ (void)backing_width;
+ (void)backing_height;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_DBUS_TOUCH_SEND_EVENT 0
+#define TRACE_DBUS_TOUCH_SEND_EVENT_ENABLED 0
+#define TRACE_DBUS_TOUCH_SEND_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_dbus_touch_send_event(unsigned int kind, uint32_t num_slot, uint32_t x, uint32_t y) {
+ (void)kind;
+ (void)num_slot;
+ (void)x;
+ (void)y;
+}
+#define TRACE_DBUS_UPDATE 0
+#define TRACE_DBUS_UPDATE_ENABLED 0
+#define TRACE_DBUS_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_dbus_update(int x, int y, int w, int h) {
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_DBUS_UPDATE_GL 0
+#define TRACE_DBUS_UPDATE_GL_ENABLED 0
+#define TRACE_DBUS_UPDATE_GL_BACKEND_DSTATE() (0)
+static inline void trace_dbus_update_gl(int x, int y, int w, int h) {
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_DISPLAYCHANGELISTENER_REGISTER 0
+#define TRACE_DISPLAYCHANGELISTENER_REGISTER_ENABLED 0
+#define TRACE_DISPLAYCHANGELISTENER_REGISTER_BACKEND_DSTATE() (0)
+static inline void trace_displaychangelistener_register(void *dcl, const char *name) {
+ (void)dcl;
+ (void)name;
+}
+#define TRACE_DISPLAYCHANGELISTENER_UNREGISTER 0
+#define TRACE_DISPLAYCHANGELISTENER_UNREGISTER_ENABLED 0
+#define TRACE_DISPLAYCHANGELISTENER_UNREGISTER_BACKEND_DSTATE() (0)
+static inline void trace_displaychangelistener_unregister(void *dcl, const char *name) {
+ (void)dcl;
+ (void)name;
+}
+#define TRACE_DISPLAYSURFACE_CREATE 0
+#define TRACE_DISPLAYSURFACE_CREATE_ENABLED 0
+#define TRACE_DISPLAYSURFACE_CREATE_BACKEND_DSTATE() (0)
+static inline void trace_displaysurface_create(int w, int h) {
+ (void)w;
+ (void)h;
+}
+#define TRACE_DISPLAYSURFACE_CREATE_FROM 0
+#define TRACE_DISPLAYSURFACE_CREATE_FROM_ENABLED 0
+#define TRACE_DISPLAYSURFACE_CREATE_FROM_BACKEND_DSTATE() (0)
+static inline void trace_displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) {
+ (void)display_surface;
+ (void)w;
+ (void)h;
+ (void)format;
+}
+#define TRACE_DISPLAYSURFACE_CREATE_PIXMAN 0
+#define TRACE_DISPLAYSURFACE_CREATE_PIXMAN_ENABLED 0
+#define TRACE_DISPLAYSURFACE_CREATE_PIXMAN_BACKEND_DSTATE() (0)
+static inline void trace_displaysurface_create_pixman(void *display_surface) {
+ (void)display_surface;
+}
+#define TRACE_DISPLAYSURFACE_FREE 0
+#define TRACE_DISPLAYSURFACE_FREE_ENABLED 0
+#define TRACE_DISPLAYSURFACE_FREE_BACKEND_DSTATE() (0)
+static inline void trace_displaysurface_free(void *display_surface) {
+ (void)display_surface;
+}
+#define TRACE_EGL_INIT_D3D11_DEVICE 0
+#define TRACE_EGL_INIT_D3D11_DEVICE_ENABLED 0
+#define TRACE_EGL_INIT_D3D11_DEVICE_BACKEND_DSTATE() (0)
+static inline void trace_egl_init_d3d11_device(void *p) {
+ (void)p;
+}
+#define TRACE_GD_GL_AREA_CREATE_CONTEXT 0
+#define TRACE_GD_GL_AREA_CREATE_CONTEXT_ENABLED 0
+#define TRACE_GD_GL_AREA_CREATE_CONTEXT_BACKEND_DSTATE() (0)
+static inline void trace_gd_gl_area_create_context(void *ctx, int major, int minor) {
+ (void)ctx;
+ (void)major;
+ (void)minor;
+}
+#define TRACE_GD_GL_AREA_DESTROY_CONTEXT 0
+#define TRACE_GD_GL_AREA_DESTROY_CONTEXT_ENABLED 0
+#define TRACE_GD_GL_AREA_DESTROY_CONTEXT_BACKEND_DSTATE() (0)
+static inline void trace_gd_gl_area_destroy_context(void *ctx, void *current_ctx) {
+ (void)ctx;
+ (void)current_ctx;
+}
+#define TRACE_GD_GRAB 0
+#define TRACE_GD_GRAB_ENABLED 0
+#define TRACE_GD_GRAB_BACKEND_DSTATE() (0)
+static inline void trace_gd_grab(const char *tab, const char *device, const char *reason) {
+ (void)tab;
+ (void)device;
+ (void)reason;
+}
+#define TRACE_GD_KEY_EVENT 0
+#define TRACE_GD_KEY_EVENT_ENABLED 0
+#define TRACE_GD_KEY_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_gd_key_event(const char *tab, int gdk_keycode, int qkeycode, const char *action) {
+ (void)tab;
+ (void)gdk_keycode;
+ (void)qkeycode;
+ (void)action;
+}
+#define TRACE_GD_KEYMAP_WINDOWING 0
+#define TRACE_GD_KEYMAP_WINDOWING_ENABLED 0
+#define TRACE_GD_KEYMAP_WINDOWING_BACKEND_DSTATE() (0)
+static inline void trace_gd_keymap_windowing(const char *name) {
+ (void)name;
+}
+#define TRACE_GD_MOTION_EVENT 0
+#define TRACE_GD_MOTION_EVENT_ENABLED 0
+#define TRACE_GD_MOTION_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_gd_motion_event(int ww, int wh, int ws, int x, int y) {
+ (void)ww;
+ (void)wh;
+ (void)ws;
+ (void)x;
+ (void)y;
+}
+#define TRACE_GD_SWITCH 0
+#define TRACE_GD_SWITCH_ENABLED 0
+#define TRACE_GD_SWITCH_BACKEND_DSTATE() (0)
+static inline void trace_gd_switch(const char *tab, int width, int height) {
+ (void)tab;
+ (void)width;
+ (void)height;
+}
+#define TRACE_GD_UNGRAB 0
+#define TRACE_GD_UNGRAB_ENABLED 0
+#define TRACE_GD_UNGRAB_BACKEND_DSTATE() (0)
+static inline void trace_gd_ungrab(const char *tab, const char *device) {
+ (void)tab;
+ (void)device;
+}
+#define TRACE_GD_UPDATE 0
+#define TRACE_GD_UPDATE_ENABLED 0
+#define TRACE_GD_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_gd_update(const char *tab, int x, int y, int w, int h) {
+ (void)tab;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_INPUT_EVENT_ABS 0
+#define TRACE_INPUT_EVENT_ABS_ENABLED 0
+#define TRACE_INPUT_EVENT_ABS_BACKEND_DSTATE() (0)
+static inline void trace_input_event_abs(int conidx, const char *axis, int value) {
+ (void)conidx;
+ (void)axis;
+ (void)value;
+}
+#define TRACE_INPUT_EVENT_BTN 0
+#define TRACE_INPUT_EVENT_BTN_ENABLED 0
+#define TRACE_INPUT_EVENT_BTN_BACKEND_DSTATE() (0)
+static inline void trace_input_event_btn(int conidx, const char *btn, bool down) {
+ (void)conidx;
+ (void)btn;
+ (void)down;
+}
+#define TRACE_INPUT_EVENT_KEY_NUMBER 0
+#define TRACE_INPUT_EVENT_KEY_NUMBER_ENABLED 0
+#define TRACE_INPUT_EVENT_KEY_NUMBER_BACKEND_DSTATE() (0)
+static inline void trace_input_event_key_number(int conidx, int number, const char *qcode, bool down) {
+ (void)conidx;
+ (void)number;
+ (void)qcode;
+ (void)down;
+}
+#define TRACE_INPUT_EVENT_KEY_QCODE 0
+#define TRACE_INPUT_EVENT_KEY_QCODE_ENABLED 0
+#define TRACE_INPUT_EVENT_KEY_QCODE_BACKEND_DSTATE() (0)
+static inline void trace_input_event_key_qcode(int conidx, const char *qcode, bool down) {
+ (void)conidx;
+ (void)qcode;
+ (void)down;
+}
+#define TRACE_INPUT_EVENT_MTT 0
+#define TRACE_INPUT_EVENT_MTT_ENABLED 0
+#define TRACE_INPUT_EVENT_MTT_BACKEND_DSTATE() (0)
+static inline void trace_input_event_mtt(int conidx, const char *axis, int value) {
+ (void)conidx;
+ (void)axis;
+ (void)value;
+}
+#define TRACE_INPUT_EVENT_REL 0
+#define TRACE_INPUT_EVENT_REL_ENABLED 0
+#define TRACE_INPUT_EVENT_REL_BACKEND_DSTATE() (0)
+static inline void trace_input_event_rel(int conidx, const char *axis, int value) {
+ (void)conidx;
+ (void)axis;
+ (void)value;
+}
+#define TRACE_INPUT_EVENT_SYNC 0
+#define TRACE_INPUT_EVENT_SYNC_ENABLED 0
+#define TRACE_INPUT_EVENT_SYNC_BACKEND_DSTATE() (0)
+static inline void trace_input_event_sync(void) {
+}
+#define TRACE_KEYMAP_ADD 0
+#define TRACE_KEYMAP_ADD_ENABLED 0
+#define TRACE_KEYMAP_ADD_BACKEND_DSTATE() (0)
+static inline void trace_keymap_add(int sym, int code, const char *line) {
+ (void)sym;
+ (void)code;
+ (void)line;
+}
+#define TRACE_KEYMAP_PARSE 0
+#define TRACE_KEYMAP_PARSE_ENABLED 0
+#define TRACE_KEYMAP_PARSE_BACKEND_DSTATE() (0)
+static inline void trace_keymap_parse(const char *file) {
+ (void)file;
+}
+#define TRACE_KEYMAP_UNMAPPED 0
+#define TRACE_KEYMAP_UNMAPPED_ENABLED 0
+#define TRACE_KEYMAP_UNMAPPED_BACKEND_DSTATE() (0)
+static inline void trace_keymap_unmapped(int sym) {
+ (void)sym;
+}
+#define TRACE_PPM_SAVE 0
+#define TRACE_PPM_SAVE_ENABLED 0
+#define TRACE_PPM_SAVE_BACKEND_DSTATE() (0)
+static inline void trace_ppm_save(int fd, void *image) {
+ (void)fd;
+ (void)image;
+}
+#define TRACE_QEMU_SPICE_ADD_MEMSLOT 0
+#define TRACE_QEMU_SPICE_ADD_MEMSLOT_ENABLED 0
+#define TRACE_QEMU_SPICE_ADD_MEMSLOT_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) {
+ (void)qid;
+ (void)slot_id;
+ (void)virt_start;
+ (void)virt_end;
+ (void)async;
+}
+#define TRACE_QEMU_SPICE_CREATE_PRIMARY_SURFACE 0
+#define TRACE_QEMU_SPICE_CREATE_PRIMARY_SURFACE_ENABLED 0
+#define TRACE_QEMU_SPICE_CREATE_PRIMARY_SURFACE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) {
+ (void)qid;
+ (void)sid;
+ (void)surface;
+ (void)async;
+}
+#define TRACE_QEMU_SPICE_CREATE_UPDATE 0
+#define TRACE_QEMU_SPICE_CREATE_UPDATE_ENABLED 0
+#define TRACE_QEMU_SPICE_CREATE_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) {
+ (void)left;
+ (void)right;
+ (void)top;
+ (void)bottom;
+}
+#define TRACE_QEMU_SPICE_DEL_MEMSLOT 0
+#define TRACE_QEMU_SPICE_DEL_MEMSLOT_ENABLED 0
+#define TRACE_QEMU_SPICE_DEL_MEMSLOT_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) {
+ (void)qid;
+ (void)gid;
+ (void)slot_id;
+}
+#define TRACE_QEMU_SPICE_DESTROY_PRIMARY_SURFACE 0
+#define TRACE_QEMU_SPICE_DESTROY_PRIMARY_SURFACE_ENABLED 0
+#define TRACE_QEMU_SPICE_DESTROY_PRIMARY_SURFACE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) {
+ (void)qid;
+ (void)sid;
+ (void)async;
+}
+#define TRACE_QEMU_SPICE_DISPLAY_REFRESH 0
+#define TRACE_QEMU_SPICE_DISPLAY_REFRESH_ENABLED 0
+#define TRACE_QEMU_SPICE_DISPLAY_REFRESH_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_display_refresh(int qid, int notify) {
+ (void)qid;
+ (void)notify;
+}
+#define TRACE_QEMU_SPICE_DISPLAY_SURFACE 0
+#define TRACE_QEMU_SPICE_DISPLAY_SURFACE_ENABLED 0
+#define TRACE_QEMU_SPICE_DISPLAY_SURFACE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_display_surface(int qid, uint32_t w, uint32_t h, int fast) {
+ (void)qid;
+ (void)w;
+ (void)h;
+ (void)fast;
+}
+#define TRACE_QEMU_SPICE_DISPLAY_UPDATE 0
+#define TRACE_QEMU_SPICE_DISPLAY_UPDATE_ENABLED 0
+#define TRACE_QEMU_SPICE_DISPLAY_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_display_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) {
+ (void)qid;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_QEMU_SPICE_GL_CURSOR 0
+#define TRACE_QEMU_SPICE_GL_CURSOR_ENABLED 0
+#define TRACE_QEMU_SPICE_GL_CURSOR_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_gl_cursor(int qid, bool enabled, bool hotspot) {
+ (void)qid;
+ (void)enabled;
+ (void)hotspot;
+}
+#define TRACE_QEMU_SPICE_GL_FORWARD_DMABUF 0
+#define TRACE_QEMU_SPICE_GL_FORWARD_DMABUF_ENABLED 0
+#define TRACE_QEMU_SPICE_GL_FORWARD_DMABUF_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_gl_forward_dmabuf(int qid, uint32_t width, uint32_t height) {
+ (void)qid;
+ (void)width;
+ (void)height;
+}
+#define TRACE_QEMU_SPICE_GL_RENDER_DMABUF 0
+#define TRACE_QEMU_SPICE_GL_RENDER_DMABUF_ENABLED 0
+#define TRACE_QEMU_SPICE_GL_RENDER_DMABUF_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_gl_render_dmabuf(int qid, uint32_t width, uint32_t height) {
+ (void)qid;
+ (void)width;
+ (void)height;
+}
+#define TRACE_QEMU_SPICE_GL_SCANOUT_DISABLE 0
+#define TRACE_QEMU_SPICE_GL_SCANOUT_DISABLE_ENABLED 0
+#define TRACE_QEMU_SPICE_GL_SCANOUT_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_gl_scanout_disable(int qid) {
+ (void)qid;
+}
+#define TRACE_QEMU_SPICE_GL_SCANOUT_TEXTURE 0
+#define TRACE_QEMU_SPICE_GL_SCANOUT_TEXTURE_ENABLED 0
+#define TRACE_QEMU_SPICE_GL_SCANOUT_TEXTURE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_gl_scanout_texture(int qid, uint32_t w, uint32_t h, uint32_t fourcc) {
+ (void)qid;
+ (void)w;
+ (void)h;
+ (void)fourcc;
+}
+#define TRACE_QEMU_SPICE_GL_SURFACE 0
+#define TRACE_QEMU_SPICE_GL_SURFACE_ENABLED 0
+#define TRACE_QEMU_SPICE_GL_SURFACE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_gl_surface(int qid, uint32_t w, uint32_t h, uint32_t fourcc) {
+ (void)qid;
+ (void)w;
+ (void)h;
+ (void)fourcc;
+}
+#define TRACE_QEMU_SPICE_GL_UPDATE 0
+#define TRACE_QEMU_SPICE_GL_UPDATE_ENABLED 0
+#define TRACE_QEMU_SPICE_GL_UPDATE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_gl_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) {
+ (void)qid;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_QEMU_SPICE_UI_INFO 0
+#define TRACE_QEMU_SPICE_UI_INFO_ENABLED 0
+#define TRACE_QEMU_SPICE_UI_INFO_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_ui_info(int qid, uint32_t width, uint32_t height) {
+ (void)qid;
+ (void)width;
+ (void)height;
+}
+#define TRACE_QEMU_SPICE_WAKEUP 0
+#define TRACE_QEMU_SPICE_WAKEUP_ENABLED 0
+#define TRACE_QEMU_SPICE_WAKEUP_BACKEND_DSTATE() (0)
+static inline void trace_qemu_spice_wakeup(uint32_t qid) {
+ (void)qid;
+}
+#define TRACE_SDL2_PROCESS_KEY 0
+#define TRACE_SDL2_PROCESS_KEY_ENABLED 0
+#define TRACE_SDL2_PROCESS_KEY_BACKEND_DSTATE() (0)
+static inline void trace_sdl2_process_key(int sdl_scancode, int qcode, const char *action) {
+ (void)sdl_scancode;
+ (void)qcode;
+ (void)action;
+}
+#define TRACE_VDAGENT_CB_GRAB_DISCARD 0
+#define TRACE_VDAGENT_CB_GRAB_DISCARD_ENABLED 0
+#define TRACE_VDAGENT_CB_GRAB_DISCARD_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_cb_grab_discard(const char *name, int cur, int recv) {
+ (void)name;
+ (void)cur;
+ (void)recv;
+}
+#define TRACE_VDAGENT_CB_GRAB_SELECTION 0
+#define TRACE_VDAGENT_CB_GRAB_SELECTION_ENABLED 0
+#define TRACE_VDAGENT_CB_GRAB_SELECTION_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_cb_grab_selection(const char *name) {
+ (void)name;
+}
+#define TRACE_VDAGENT_CB_GRAB_TYPE 0
+#define TRACE_VDAGENT_CB_GRAB_TYPE_ENABLED 0
+#define TRACE_VDAGENT_CB_GRAB_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_cb_grab_type(const char *name) {
+ (void)name;
+}
+#define TRACE_VDAGENT_CB_SERIAL_DISCARD 0
+#define TRACE_VDAGENT_CB_SERIAL_DISCARD_ENABLED 0
+#define TRACE_VDAGENT_CB_SERIAL_DISCARD_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_cb_serial_discard(uint32_t current, uint32_t received) {
+ (void)current;
+ (void)received;
+}
+#define TRACE_VDAGENT_CLOSE 0
+#define TRACE_VDAGENT_CLOSE_ENABLED 0
+#define TRACE_VDAGENT_CLOSE_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_close(void) {
+}
+#define TRACE_VDAGENT_DISCONNECT 0
+#define TRACE_VDAGENT_DISCONNECT_ENABLED 0
+#define TRACE_VDAGENT_DISCONNECT_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_disconnect(void) {
+}
+#define TRACE_VDAGENT_FE_OPEN 0
+#define TRACE_VDAGENT_FE_OPEN_ENABLED 0
+#define TRACE_VDAGENT_FE_OPEN_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_fe_open(bool fe_open) {
+ (void)fe_open;
+}
+#define TRACE_VDAGENT_PEER_CAP 0
+#define TRACE_VDAGENT_PEER_CAP_ENABLED 0
+#define TRACE_VDAGENT_PEER_CAP_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_peer_cap(const char *name) {
+ (void)name;
+}
+#define TRACE_VDAGENT_RECV_CHUNK 0
+#define TRACE_VDAGENT_RECV_CHUNK_ENABLED 0
+#define TRACE_VDAGENT_RECV_CHUNK_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_recv_chunk(uint32_t size) {
+ (void)size;
+}
+#define TRACE_VDAGENT_RECV_MSG 0
+#define TRACE_VDAGENT_RECV_MSG_ENABLED 0
+#define TRACE_VDAGENT_RECV_MSG_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_recv_msg(const char *name, uint32_t size) {
+ (void)name;
+ (void)size;
+}
+#define TRACE_VDAGENT_SEND 0
+#define TRACE_VDAGENT_SEND_ENABLED 0
+#define TRACE_VDAGENT_SEND_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_send(const char *name) {
+ (void)name;
+}
+#define TRACE_VDAGENT_SEND_EMPTY_CLIPBOARD 0
+#define TRACE_VDAGENT_SEND_EMPTY_CLIPBOARD_ENABLED 0
+#define TRACE_VDAGENT_SEND_EMPTY_CLIPBOARD_BACKEND_DSTATE() (0)
+static inline void trace_vdagent_send_empty_clipboard(void) {
+}
+#define TRACE_VNC_AUTH_FAIL 0
+#define TRACE_VNC_AUTH_FAIL_ENABLED 0
+#define TRACE_VNC_AUTH_FAIL_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_fail(void *state, int method, const char *message, const char *reason) {
+ (void)state;
+ (void)method;
+ (void)message;
+ (void)reason;
+}
+#define TRACE_VNC_AUTH_INIT 0
+#define TRACE_VNC_AUTH_INIT_ENABLED 0
+#define TRACE_VNC_AUTH_INIT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_init(void *display, int websock, int auth, int subauth) {
+ (void)display;
+ (void)websock;
+ (void)auth;
+ (void)subauth;
+}
+#define TRACE_VNC_AUTH_PASS 0
+#define TRACE_VNC_AUTH_PASS_ENABLED 0
+#define TRACE_VNC_AUTH_PASS_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_pass(void *state, int method) {
+ (void)state;
+ (void)method;
+}
+#define TRACE_VNC_AUTH_REJECT 0
+#define TRACE_VNC_AUTH_REJECT_ENABLED 0
+#define TRACE_VNC_AUTH_REJECT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_reject(void *state, int expect, int got) {
+ (void)state;
+ (void)expect;
+ (void)got;
+}
+#define TRACE_VNC_AUTH_SASL_ACL 0
+#define TRACE_VNC_AUTH_SASL_ACL_ENABLED 0
+#define TRACE_VNC_AUTH_SASL_ACL_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_sasl_acl(void *state, int allow) {
+ (void)state;
+ (void)allow;
+}
+#define TRACE_VNC_AUTH_SASL_MECH_CHOOSE 0
+#define TRACE_VNC_AUTH_SASL_MECH_CHOOSE_ENABLED 0
+#define TRACE_VNC_AUTH_SASL_MECH_CHOOSE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_sasl_mech_choose(void *state, const char *mech) {
+ (void)state;
+ (void)mech;
+}
+#define TRACE_VNC_AUTH_SASL_MECH_LIST 0
+#define TRACE_VNC_AUTH_SASL_MECH_LIST_ENABLED 0
+#define TRACE_VNC_AUTH_SASL_MECH_LIST_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_sasl_mech_list(void *state, const char *mechs) {
+ (void)state;
+ (void)mechs;
+}
+#define TRACE_VNC_AUTH_SASL_SSF 0
+#define TRACE_VNC_AUTH_SASL_SSF_ENABLED 0
+#define TRACE_VNC_AUTH_SASL_SSF_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_sasl_ssf(void *state, int ssf) {
+ (void)state;
+ (void)ssf;
+}
+#define TRACE_VNC_AUTH_SASL_START 0
+#define TRACE_VNC_AUTH_SASL_START_ENABLED 0
+#define TRACE_VNC_AUTH_SASL_START_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_sasl_start(void *state, const void *clientdata, size_t clientlen, const void *serverdata, size_t severlen, int ret) {
+ (void)state;
+ (void)clientdata;
+ (void)clientlen;
+ (void)serverdata;
+ (void)severlen;
+ (void)ret;
+}
+#define TRACE_VNC_AUTH_SASL_STEP 0
+#define TRACE_VNC_AUTH_SASL_STEP_ENABLED 0
+#define TRACE_VNC_AUTH_SASL_STEP_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_sasl_step(void *state, const void *clientdata, size_t clientlen, const void *serverdata, size_t severlen, int ret) {
+ (void)state;
+ (void)clientdata;
+ (void)clientlen;
+ (void)serverdata;
+ (void)severlen;
+ (void)ret;
+}
+#define TRACE_VNC_AUTH_SASL_USERNAME 0
+#define TRACE_VNC_AUTH_SASL_USERNAME_ENABLED 0
+#define TRACE_VNC_AUTH_SASL_USERNAME_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_sasl_username(void *state, const char *name) {
+ (void)state;
+ (void)name;
+}
+#define TRACE_VNC_AUTH_START 0
+#define TRACE_VNC_AUTH_START_ENABLED 0
+#define TRACE_VNC_AUTH_START_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_start(void *state, int method) {
+ (void)state;
+ (void)method;
+}
+#define TRACE_VNC_AUTH_VENCRYPT_SUBAUTH 0
+#define TRACE_VNC_AUTH_VENCRYPT_SUBAUTH_ENABLED 0
+#define TRACE_VNC_AUTH_VENCRYPT_SUBAUTH_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_vencrypt_subauth(void *state, int auth) {
+ (void)state;
+ (void)auth;
+}
+#define TRACE_VNC_AUTH_VENCRYPT_VERSION 0
+#define TRACE_VNC_AUTH_VENCRYPT_VERSION_ENABLED 0
+#define TRACE_VNC_AUTH_VENCRYPT_VERSION_BACKEND_DSTATE() (0)
+static inline void trace_vnc_auth_vencrypt_version(void *state, int major, int minor) {
+ (void)state;
+ (void)major;
+ (void)minor;
+}
+#define TRACE_VNC_CLIENT_CONNECT 0
+#define TRACE_VNC_CLIENT_CONNECT_ENABLED 0
+#define TRACE_VNC_CLIENT_CONNECT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_connect(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_CLIENT_DISCONNECT_FINISH 0
+#define TRACE_VNC_CLIENT_DISCONNECT_FINISH_ENABLED 0
+#define TRACE_VNC_CLIENT_DISCONNECT_FINISH_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_disconnect_finish(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_CLIENT_DISCONNECT_START 0
+#define TRACE_VNC_CLIENT_DISCONNECT_START_ENABLED 0
+#define TRACE_VNC_CLIENT_DISCONNECT_START_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_disconnect_start(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_CLIENT_EOF 0
+#define TRACE_VNC_CLIENT_EOF_ENABLED 0
+#define TRACE_VNC_CLIENT_EOF_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_eof(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_CLIENT_IO_ERROR 0
+#define TRACE_VNC_CLIENT_IO_ERROR_ENABLED 0
+#define TRACE_VNC_CLIENT_IO_ERROR_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_io_error(void *state, void *ioc, const char *msg) {
+ (void)state;
+ (void)ioc;
+ (void)msg;
+}
+#define TRACE_VNC_CLIENT_IO_WRAP 0
+#define TRACE_VNC_CLIENT_IO_WRAP_ENABLED 0
+#define TRACE_VNC_CLIENT_IO_WRAP_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_io_wrap(void *state, void *ioc, const char *type) {
+ (void)state;
+ (void)ioc;
+ (void)type;
+}
+#define TRACE_VNC_CLIENT_OUTPUT_LIMIT 0
+#define TRACE_VNC_CLIENT_OUTPUT_LIMIT_ENABLED 0
+#define TRACE_VNC_CLIENT_OUTPUT_LIMIT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_output_limit(void *state, void *ioc, size_t offset, size_t threshold) {
+ (void)state;
+ (void)ioc;
+ (void)offset;
+ (void)threshold;
+}
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_ENABLED 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_pixel_format(void *state, void *ioc, int bpp, int depth, int endian) {
+ (void)state;
+ (void)ioc;
+ (void)bpp;
+ (void)depth;
+ (void)endian;
+}
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_BLUE 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_BLUE_ENABLED 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_BLUE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_pixel_format_blue(void *state, void *ioc, int max, int bits, int shift, int mask) {
+ (void)state;
+ (void)ioc;
+ (void)max;
+ (void)bits;
+ (void)shift;
+ (void)mask;
+}
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_GREEN 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_GREEN_ENABLED 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_GREEN_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_pixel_format_green(void *state, void *ioc, int max, int bits, int shift, int mask) {
+ (void)state;
+ (void)ioc;
+ (void)max;
+ (void)bits;
+ (void)shift;
+ (void)mask;
+}
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_RED 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_RED_ENABLED 0
+#define TRACE_VNC_CLIENT_PIXEL_FORMAT_RED_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_pixel_format_red(void *state, void *ioc, int max, int bits, int shift, int mask) {
+ (void)state;
+ (void)ioc;
+ (void)max;
+ (void)bits;
+ (void)shift;
+ (void)mask;
+}
+#define TRACE_VNC_CLIENT_THROTTLE_AUDIO 0
+#define TRACE_VNC_CLIENT_THROTTLE_AUDIO_ENABLED 0
+#define TRACE_VNC_CLIENT_THROTTLE_AUDIO_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_throttle_audio(void *state, void *ioc, size_t offset) {
+ (void)state;
+ (void)ioc;
+ (void)offset;
+}
+#define TRACE_VNC_CLIENT_THROTTLE_FORCED 0
+#define TRACE_VNC_CLIENT_THROTTLE_FORCED_ENABLED 0
+#define TRACE_VNC_CLIENT_THROTTLE_FORCED_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_throttle_forced(void *state, void *ioc, int job_update, size_t offset) {
+ (void)state;
+ (void)ioc;
+ (void)job_update;
+ (void)offset;
+}
+#define TRACE_VNC_CLIENT_THROTTLE_INCREMENTAL 0
+#define TRACE_VNC_CLIENT_THROTTLE_INCREMENTAL_ENABLED 0
+#define TRACE_VNC_CLIENT_THROTTLE_INCREMENTAL_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_throttle_incremental(void *state, void *ioc, int job_update, size_t offset) {
+ (void)state;
+ (void)ioc;
+ (void)job_update;
+ (void)offset;
+}
+#define TRACE_VNC_CLIENT_THROTTLE_THRESHOLD 0
+#define TRACE_VNC_CLIENT_THROTTLE_THRESHOLD_ENABLED 0
+#define TRACE_VNC_CLIENT_THROTTLE_THRESHOLD_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_throttle_threshold(void *state, void *ioc, size_t oldoffset, size_t offset, int client_width, int client_height, int bytes_per_pixel, void *audio_cap) {
+ (void)state;
+ (void)ioc;
+ (void)oldoffset;
+ (void)offset;
+ (void)client_width;
+ (void)client_height;
+ (void)bytes_per_pixel;
+ (void)audio_cap;
+}
+#define TRACE_VNC_CLIENT_UNTHROTTLE_FORCED 0
+#define TRACE_VNC_CLIENT_UNTHROTTLE_FORCED_ENABLED 0
+#define TRACE_VNC_CLIENT_UNTHROTTLE_FORCED_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_unthrottle_forced(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_CLIENT_UNTHROTTLE_INCREMENTAL 0
+#define TRACE_VNC_CLIENT_UNTHROTTLE_INCREMENTAL_ENABLED 0
+#define TRACE_VNC_CLIENT_UNTHROTTLE_INCREMENTAL_BACKEND_DSTATE() (0)
+static inline void trace_vnc_client_unthrottle_incremental(void *state, void *ioc, size_t offset) {
+ (void)state;
+ (void)ioc;
+ (void)offset;
+}
+#define TRACE_VNC_JOB_ADD_RECT 0
+#define TRACE_VNC_JOB_ADD_RECT_ENABLED 0
+#define TRACE_VNC_JOB_ADD_RECT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_job_add_rect(void *state, void *job, int x, int y, int w, int h) {
+ (void)state;
+ (void)job;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_VNC_JOB_CLAMP_RECT 0
+#define TRACE_VNC_JOB_CLAMP_RECT_ENABLED 0
+#define TRACE_VNC_JOB_CLAMP_RECT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_job_clamp_rect(void *state, void *job, int x, int y, int w, int h) {
+ (void)state;
+ (void)job;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_VNC_JOB_CLAMPED_RECT 0
+#define TRACE_VNC_JOB_CLAMPED_RECT_ENABLED 0
+#define TRACE_VNC_JOB_CLAMPED_RECT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_job_clamped_rect(void *state, void *job, int x, int y, int w, int h) {
+ (void)state;
+ (void)job;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_VNC_JOB_DISCARD_RECT 0
+#define TRACE_VNC_JOB_DISCARD_RECT_ENABLED 0
+#define TRACE_VNC_JOB_DISCARD_RECT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_job_discard_rect(void *state, void *job, int x, int y, int w, int h) {
+ (void)state;
+ (void)job;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_VNC_JOB_NRECTS 0
+#define TRACE_VNC_JOB_NRECTS_ENABLED 0
+#define TRACE_VNC_JOB_NRECTS_BACKEND_DSTATE() (0)
+static inline void trace_vnc_job_nrects(void *state, void *job, int nrects) {
+ (void)state;
+ (void)job;
+ (void)nrects;
+}
+#define TRACE_VNC_KEY_EVENT_EXT 0
+#define TRACE_VNC_KEY_EVENT_EXT_ENABLED 0
+#define TRACE_VNC_KEY_EVENT_EXT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_key_event_ext(bool down, int sym, int keycode, const char *name) {
+ (void)down;
+ (void)sym;
+ (void)keycode;
+ (void)name;
+}
+#define TRACE_VNC_KEY_EVENT_MAP 0
+#define TRACE_VNC_KEY_EVENT_MAP_ENABLED 0
+#define TRACE_VNC_KEY_EVENT_MAP_BACKEND_DSTATE() (0)
+static inline void trace_vnc_key_event_map(bool down, int sym, int keycode, const char *name) {
+ (void)down;
+ (void)sym;
+ (void)keycode;
+ (void)name;
+}
+#define TRACE_VNC_KEY_GUEST_LEDS 0
+#define TRACE_VNC_KEY_GUEST_LEDS_ENABLED 0
+#define TRACE_VNC_KEY_GUEST_LEDS_BACKEND_DSTATE() (0)
+static inline void trace_vnc_key_guest_leds(bool caps, bool num, bool scroll) {
+ (void)caps;
+ (void)num;
+ (void)scroll;
+}
+#define TRACE_VNC_KEY_MAP_INIT 0
+#define TRACE_VNC_KEY_MAP_INIT_ENABLED 0
+#define TRACE_VNC_KEY_MAP_INIT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_key_map_init(const char *layout) {
+ (void)layout;
+}
+#define TRACE_VNC_KEY_SYNC_CAPSLOCK 0
+#define TRACE_VNC_KEY_SYNC_CAPSLOCK_ENABLED 0
+#define TRACE_VNC_KEY_SYNC_CAPSLOCK_BACKEND_DSTATE() (0)
+static inline void trace_vnc_key_sync_capslock(bool on) {
+ (void)on;
+}
+#define TRACE_VNC_KEY_SYNC_NUMLOCK 0
+#define TRACE_VNC_KEY_SYNC_NUMLOCK_ENABLED 0
+#define TRACE_VNC_KEY_SYNC_NUMLOCK_BACKEND_DSTATE() (0)
+static inline void trace_vnc_key_sync_numlock(bool on) {
+ (void)on;
+}
+#define TRACE_VNC_MSG_CLIENT_AUDIO_DISABLE 0
+#define TRACE_VNC_MSG_CLIENT_AUDIO_DISABLE_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_AUDIO_DISABLE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_audio_disable(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_MSG_CLIENT_AUDIO_ENABLE 0
+#define TRACE_VNC_MSG_CLIENT_AUDIO_ENABLE_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_AUDIO_ENABLE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_audio_enable(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_MSG_CLIENT_AUDIO_FORMAT 0
+#define TRACE_VNC_MSG_CLIENT_AUDIO_FORMAT_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_AUDIO_FORMAT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_audio_format(void *state, void *ioc, int fmt, int channels, int freq) {
+ (void)state;
+ (void)ioc;
+ (void)fmt;
+ (void)channels;
+ (void)freq;
+}
+#define TRACE_VNC_MSG_CLIENT_CUT_TEXT 0
+#define TRACE_VNC_MSG_CLIENT_CUT_TEXT_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_CUT_TEXT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_cut_text(void *state, void *ioc, int len) {
+ (void)state;
+ (void)ioc;
+ (void)len;
+}
+#define TRACE_VNC_MSG_CLIENT_CUT_TEXT_EXT 0
+#define TRACE_VNC_MSG_CLIENT_CUT_TEXT_EXT_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_CUT_TEXT_EXT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_cut_text_ext(void *state, void *ioc, int len, int flags) {
+ (void)state;
+ (void)ioc;
+ (void)len;
+ (void)flags;
+}
+#define TRACE_VNC_MSG_CLIENT_EXT_KEY_EVENT 0
+#define TRACE_VNC_MSG_CLIENT_EXT_KEY_EVENT_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_EXT_KEY_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_ext_key_event(void *state, void *ioc, int down, int sym, int keycode) {
+ (void)state;
+ (void)ioc;
+ (void)down;
+ (void)sym;
+ (void)keycode;
+}
+#define TRACE_VNC_MSG_CLIENT_FRAMEBUFFER_UPDATE_REQUEST 0
+#define TRACE_VNC_MSG_CLIENT_FRAMEBUFFER_UPDATE_REQUEST_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_FRAMEBUFFER_UPDATE_REQUEST_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_framebuffer_update_request(void *state, void *ioc, int incremental, int x, int y, int w, int h) {
+ (void)state;
+ (void)ioc;
+ (void)incremental;
+ (void)x;
+ (void)y;
+ (void)w;
+ (void)h;
+}
+#define TRACE_VNC_MSG_CLIENT_KEY_EVENT 0
+#define TRACE_VNC_MSG_CLIENT_KEY_EVENT_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_KEY_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_key_event(void *state, void *ioc, int down, int sym) {
+ (void)state;
+ (void)ioc;
+ (void)down;
+ (void)sym;
+}
+#define TRACE_VNC_MSG_CLIENT_POINTER_EVENT 0
+#define TRACE_VNC_MSG_CLIENT_POINTER_EVENT_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_POINTER_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_pointer_event(void *state, void *ioc, int button_mask, int x, int y) {
+ (void)state;
+ (void)ioc;
+ (void)button_mask;
+ (void)x;
+ (void)y;
+}
+#define TRACE_VNC_MSG_CLIENT_SET_DESKTOP_SIZE 0
+#define TRACE_VNC_MSG_CLIENT_SET_DESKTOP_SIZE_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_SET_DESKTOP_SIZE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_set_desktop_size(void *state, void *ioc, int width, int height, int screens) {
+ (void)state;
+ (void)ioc;
+ (void)width;
+ (void)height;
+ (void)screens;
+}
+#define TRACE_VNC_MSG_CLIENT_SET_ENCODINGS 0
+#define TRACE_VNC_MSG_CLIENT_SET_ENCODINGS_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_SET_ENCODINGS_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_set_encodings(void *state, void *ioc, int limit) {
+ (void)state;
+ (void)ioc;
+ (void)limit;
+}
+#define TRACE_VNC_MSG_CLIENT_SET_PIXEL_FORMAT 0
+#define TRACE_VNC_MSG_CLIENT_SET_PIXEL_FORMAT_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_SET_PIXEL_FORMAT_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_set_pixel_format(void *state, void *ioc, int bpp, int big_endian, int true_color) {
+ (void)state;
+ (void)ioc;
+ (void)bpp;
+ (void)big_endian;
+ (void)true_color;
+}
+#define TRACE_VNC_MSG_CLIENT_SET_PIXEL_FORMAT_RGB 0
+#define TRACE_VNC_MSG_CLIENT_SET_PIXEL_FORMAT_RGB_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_SET_PIXEL_FORMAT_RGB_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_set_pixel_format_rgb(void *state, void *ioc, int red_max, int green_max, int blue_max, int red_shift, int green_shift, int blue_shift) {
+ (void)state;
+ (void)ioc;
+ (void)red_max;
+ (void)green_max;
+ (void)blue_max;
+ (void)red_shift;
+ (void)green_shift;
+ (void)blue_shift;
+}
+#define TRACE_VNC_MSG_CLIENT_XVP 0
+#define TRACE_VNC_MSG_CLIENT_XVP_ENABLED 0
+#define TRACE_VNC_MSG_CLIENT_XVP_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_client_xvp(void *state, void *ioc, int version, int action) {
+ (void)state;
+ (void)ioc;
+ (void)version;
+ (void)action;
+}
+#define TRACE_VNC_MSG_SERVER_AUDIO_BEGIN 0
+#define TRACE_VNC_MSG_SERVER_AUDIO_BEGIN_ENABLED 0
+#define TRACE_VNC_MSG_SERVER_AUDIO_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_server_audio_begin(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_MSG_SERVER_AUDIO_DATA 0
+#define TRACE_VNC_MSG_SERVER_AUDIO_DATA_ENABLED 0
+#define TRACE_VNC_MSG_SERVER_AUDIO_DATA_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_server_audio_data(void *state, void *ioc, const void *buf, size_t len) {
+ (void)state;
+ (void)ioc;
+ (void)buf;
+ (void)len;
+}
+#define TRACE_VNC_MSG_SERVER_AUDIO_END 0
+#define TRACE_VNC_MSG_SERVER_AUDIO_END_ENABLED 0
+#define TRACE_VNC_MSG_SERVER_AUDIO_END_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_server_audio_end(void *state, void *ioc) {
+ (void)state;
+ (void)ioc;
+}
+#define TRACE_VNC_MSG_SERVER_DESKTOP_RESIZE 0
+#define TRACE_VNC_MSG_SERVER_DESKTOP_RESIZE_ENABLED 0
+#define TRACE_VNC_MSG_SERVER_DESKTOP_RESIZE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_server_desktop_resize(void *state, void *ioc, int width, int height) {
+ (void)state;
+ (void)ioc;
+ (void)width;
+ (void)height;
+}
+#define TRACE_VNC_MSG_SERVER_EXT_DESKTOP_RESIZE 0
+#define TRACE_VNC_MSG_SERVER_EXT_DESKTOP_RESIZE_ENABLED 0
+#define TRACE_VNC_MSG_SERVER_EXT_DESKTOP_RESIZE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_msg_server_ext_desktop_resize(void *state, void *ioc, int width, int height, int reason) {
+ (void)state;
+ (void)ioc;
+ (void)width;
+ (void)height;
+ (void)reason;
+}
+#define TRACE_VNC_SERVER_DPY_PAGEFLIP 0
+#define TRACE_VNC_SERVER_DPY_PAGEFLIP_ENABLED 0
+#define TRACE_VNC_SERVER_DPY_PAGEFLIP_BACKEND_DSTATE() (0)
+static inline void trace_vnc_server_dpy_pageflip(void *dpy, int w, int h, int fmt) {
+ (void)dpy;
+ (void)w;
+ (void)h;
+ (void)fmt;
+}
+#define TRACE_VNC_SERVER_DPY_RECREATE 0
+#define TRACE_VNC_SERVER_DPY_RECREATE_ENABLED 0
+#define TRACE_VNC_SERVER_DPY_RECREATE_BACKEND_DSTATE() (0)
+static inline void trace_vnc_server_dpy_recreate(void *dpy, int w, int h, int fmt) {
+ (void)dpy;
+ (void)w;
+ (void)h;
+ (void)fmt;
+}
+#define TRACE_XKEYMAP_EXTENSION 0
+#define TRACE_XKEYMAP_EXTENSION_ENABLED 0
+#define TRACE_XKEYMAP_EXTENSION_BACKEND_DSTATE() (0)
+static inline void trace_xkeymap_extension(const char *name) {
+ (void)name;
+}
+#define TRACE_XKEYMAP_KEYCODES 0
+#define TRACE_XKEYMAP_KEYCODES_ENABLED 0
+#define TRACE_XKEYMAP_KEYCODES_BACKEND_DSTATE() (0)
+static inline void trace_xkeymap_keycodes(const char *name) {
+ (void)name;
+}
+#define TRACE_XKEYMAP_KEYMAP 0
+#define TRACE_XKEYMAP_KEYMAP_ENABLED 0
+#define TRACE_XKEYMAP_KEYMAP_BACKEND_DSTATE() (0)
+static inline void trace_xkeymap_keymap(const char *name) {
+ (void)name;
+}
+#define TRACE_XKEYMAP_VENDOR 0
+#define TRACE_XKEYMAP_VENDOR_ENABLED 0
+#define TRACE_XKEYMAP_VENDOR_BACKEND_DSTATE() (0)
+static inline void trace_xkeymap_vendor(const char *name) {
+ (void)name;
+}
+
+#endif
\ No newline at end of file
diff --git a/trace/trace-util.h b/trace/trace-util.h
new file mode 100644
index 0000000000..7d5a413f88
--- /dev/null
+++ b/trace/trace-util.h
@@ -0,0 +1,625 @@
+/* AUTOGENERATED STUB FOR ANDROID BUILD */
+#ifndef TRACE_TRACE_UTIL_H
+#define TRACE_TRACE_UTIL_H
+
+/* No-op trace events */
+#ifndef trace_event_get_state_backends
+#define trace_event_get_state_backends(id) (0)
+#endif
+#ifndef trace_event_get_state
+#define trace_event_get_state(id) (0)
+#endif
+#define TRACE_AIO_CO_SCHEDULE 0
+#define TRACE_AIO_CO_SCHEDULE_ENABLED 0
+#define TRACE_AIO_CO_SCHEDULE_BACKEND_DSTATE() (0)
+static inline void trace_aio_co_schedule(void *ctx, void *co) {
+ (void)ctx;
+ (void)co;
+}
+#define TRACE_AIO_CO_SCHEDULE_BH_CB 0
+#define TRACE_AIO_CO_SCHEDULE_BH_CB_ENABLED 0
+#define TRACE_AIO_CO_SCHEDULE_BH_CB_BACKEND_DSTATE() (0)
+static inline void trace_aio_co_schedule_bh_cb(void *ctx, void *co) {
+ (void)ctx;
+ (void)co;
+}
+#define TRACE_BUFFER_FREE 0
+#define TRACE_BUFFER_FREE_ENABLED 0
+#define TRACE_BUFFER_FREE_BACKEND_DSTATE() (0)
+static inline void trace_buffer_free(const char *buf, size_t len) {
+ (void)buf;
+ (void)len;
+}
+#define TRACE_BUFFER_MOVE 0
+#define TRACE_BUFFER_MOVE_ENABLED 0
+#define TRACE_BUFFER_MOVE_BACKEND_DSTATE() (0)
+static inline void trace_buffer_move(const char *buf, size_t len, const char *from) {
+ (void)buf;
+ (void)len;
+ (void)from;
+}
+#define TRACE_BUFFER_MOVE_EMPTY 0
+#define TRACE_BUFFER_MOVE_EMPTY_ENABLED 0
+#define TRACE_BUFFER_MOVE_EMPTY_BACKEND_DSTATE() (0)
+static inline void trace_buffer_move_empty(const char *buf, size_t len, const char *from) {
+ (void)buf;
+ (void)len;
+ (void)from;
+}
+#define TRACE_BUFFER_RESIZE 0
+#define TRACE_BUFFER_RESIZE_ENABLED 0
+#define TRACE_BUFFER_RESIZE_BACKEND_DSTATE() (0)
+static inline void trace_buffer_resize(const char *buf, size_t olen, size_t len) {
+ (void)buf;
+ (void)olen;
+ (void)len;
+}
+#define TRACE_FDMON_IO_URING_ADD_SQE 0
+#define TRACE_FDMON_IO_URING_ADD_SQE_ENABLED 0
+#define TRACE_FDMON_IO_URING_ADD_SQE_BACKEND_DSTATE() (0)
+static inline void trace_fdmon_io_uring_add_sqe(void *ctx, void *opaque, int opcode, int fd, uint64_t off, void *cqe_handler) {
+ (void)ctx;
+ (void)opaque;
+ (void)opcode;
+ (void)fd;
+ (void)off;
+ (void)cqe_handler;
+}
+#define TRACE_FDMON_IO_URING_CQE_HANDLER 0
+#define TRACE_FDMON_IO_URING_CQE_HANDLER_ENABLED 0
+#define TRACE_FDMON_IO_URING_CQE_HANDLER_BACKEND_DSTATE() (0)
+static inline void trace_fdmon_io_uring_cqe_handler(void *ctx, void *cqe_handler, int cqe_res) {
+ (void)ctx;
+ (void)cqe_handler;
+ (void)cqe_res;
+}
+#define TRACE_HBITMAP_ITER_SKIP_WORDS 0
+#define TRACE_HBITMAP_ITER_SKIP_WORDS_ENABLED 0
+#define TRACE_HBITMAP_ITER_SKIP_WORDS_BACKEND_DSTATE() (0)
+static inline void trace_hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) {
+ (void)hb;
+ (void)hbi;
+ (void)pos;
+ (void)cur;
+}
+#define TRACE_HBITMAP_RESET 0
+#define TRACE_HBITMAP_RESET_ENABLED 0
+#define TRACE_HBITMAP_RESET_BACKEND_DSTATE() (0)
+static inline void trace_hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) {
+ (void)hb;
+ (void)start;
+ (void)count;
+ (void)sbit;
+ (void)ebit;
+}
+#define TRACE_HBITMAP_SET 0
+#define TRACE_HBITMAP_SET_ENABLED 0
+#define TRACE_HBITMAP_SET_BACKEND_DSTATE() (0)
+static inline void trace_hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) {
+ (void)hb;
+ (void)start;
+ (void)count;
+ (void)sbit;
+ (void)ebit;
+}
+#define TRACE_LOCKCNT_FAST_PATH_ATTEMPT 0
+#define TRACE_LOCKCNT_FAST_PATH_ATTEMPT_ENABLED 0
+#define TRACE_LOCKCNT_FAST_PATH_ATTEMPT_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_fast_path_attempt(const void *lockcnt, int expected, int new) {
+ (void)lockcnt;
+ (void)expected;
+ (void)new;
+}
+#define TRACE_LOCKCNT_FAST_PATH_SUCCESS 0
+#define TRACE_LOCKCNT_FAST_PATH_SUCCESS_ENABLED 0
+#define TRACE_LOCKCNT_FAST_PATH_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_fast_path_success(const void *lockcnt, int expected, int new) {
+ (void)lockcnt;
+ (void)expected;
+ (void)new;
+}
+#define TRACE_LOCKCNT_FUTEX_WAIT 0
+#define TRACE_LOCKCNT_FUTEX_WAIT_ENABLED 0
+#define TRACE_LOCKCNT_FUTEX_WAIT_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_futex_wait(const void *lockcnt, int val) {
+ (void)lockcnt;
+ (void)val;
+}
+#define TRACE_LOCKCNT_FUTEX_WAIT_PREPARE 0
+#define TRACE_LOCKCNT_FUTEX_WAIT_PREPARE_ENABLED 0
+#define TRACE_LOCKCNT_FUTEX_WAIT_PREPARE_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_futex_wait_prepare(const void *lockcnt, int expected, int new) {
+ (void)lockcnt;
+ (void)expected;
+ (void)new;
+}
+#define TRACE_LOCKCNT_FUTEX_WAIT_RESUME 0
+#define TRACE_LOCKCNT_FUTEX_WAIT_RESUME_ENABLED 0
+#define TRACE_LOCKCNT_FUTEX_WAIT_RESUME_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_futex_wait_resume(const void *lockcnt, int new) {
+ (void)lockcnt;
+ (void)new;
+}
+#define TRACE_LOCKCNT_FUTEX_WAKE 0
+#define TRACE_LOCKCNT_FUTEX_WAKE_ENABLED 0
+#define TRACE_LOCKCNT_FUTEX_WAKE_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_futex_wake(const void *lockcnt) {
+ (void)lockcnt;
+}
+#define TRACE_LOCKCNT_UNLOCK_ATTEMPT 0
+#define TRACE_LOCKCNT_UNLOCK_ATTEMPT_ENABLED 0
+#define TRACE_LOCKCNT_UNLOCK_ATTEMPT_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_unlock_attempt(const void *lockcnt, int expected, int new) {
+ (void)lockcnt;
+ (void)expected;
+ (void)new;
+}
+#define TRACE_LOCKCNT_UNLOCK_SUCCESS 0
+#define TRACE_LOCKCNT_UNLOCK_SUCCESS_ENABLED 0
+#define TRACE_LOCKCNT_UNLOCK_SUCCESS_BACKEND_DSTATE() (0)
+static inline void trace_lockcnt_unlock_success(const void *lockcnt, int expected, int new) {
+ (void)lockcnt;
+ (void)expected;
+ (void)new;
+}
+#define TRACE_MODULE_LOAD_MODULE 0
+#define TRACE_MODULE_LOAD_MODULE_ENABLED 0
+#define TRACE_MODULE_LOAD_MODULE_BACKEND_DSTATE() (0)
+static inline void trace_module_load_module(const char *name) {
+ (void)name;
+}
+#define TRACE_MODULE_LOOKUP_OBJECT_TYPE 0
+#define TRACE_MODULE_LOOKUP_OBJECT_TYPE_ENABLED 0
+#define TRACE_MODULE_LOOKUP_OBJECT_TYPE_BACKEND_DSTATE() (0)
+static inline void trace_module_lookup_object_type(const char *name) {
+ (void)name;
+}
+#define TRACE_POLL_ADD 0
+#define TRACE_POLL_ADD_ENABLED 0
+#define TRACE_POLL_ADD_BACKEND_DSTATE() (0)
+static inline void trace_poll_add(void *ctx, void *node, int fd, unsigned revents) {
+ (void)ctx;
+ (void)node;
+ (void)fd;
+ (void)revents;
+}
+#define TRACE_POLL_GROW 0
+#define TRACE_POLL_GROW_ENABLED 0
+#define TRACE_POLL_GROW_BACKEND_DSTATE() (0)
+static inline void trace_poll_grow(void *ctx, int64_t old, int64_t new) {
+ (void)ctx;
+ (void)old;
+ (void)new;
+}
+#define TRACE_POLL_REMOVE 0
+#define TRACE_POLL_REMOVE_ENABLED 0
+#define TRACE_POLL_REMOVE_BACKEND_DSTATE() (0)
+static inline void trace_poll_remove(void *ctx, void *node, int fd) {
+ (void)ctx;
+ (void)node;
+ (void)fd;
+}
+#define TRACE_POLL_SHRINK 0
+#define TRACE_POLL_SHRINK_ENABLED 0
+#define TRACE_POLL_SHRINK_BACKEND_DSTATE() (0)
+static inline void trace_poll_shrink(void *ctx, int64_t old, int64_t new) {
+ (void)ctx;
+ (void)old;
+ (void)new;
+}
+#define TRACE_QEMU_AIO_COROUTINE_ENTER 0
+#define TRACE_QEMU_AIO_COROUTINE_ENTER_ENABLED 0
+#define TRACE_QEMU_AIO_COROUTINE_ENTER_BACKEND_DSTATE() (0)
+static inline void trace_qemu_aio_coroutine_enter(void *ctx, void *from, void *to, void *opaque) {
+ (void)ctx;
+ (void)from;
+ (void)to;
+ (void)opaque;
+}
+#define TRACE_QEMU_ANON_RAM_ALLOC 0
+#define TRACE_QEMU_ANON_RAM_ALLOC_ENABLED 0
+#define TRACE_QEMU_ANON_RAM_ALLOC_BACKEND_DSTATE() (0)
+static inline void trace_qemu_anon_ram_alloc(size_t size, void *ptr) {
+ (void)size;
+ (void)ptr;
+}
+#define TRACE_QEMU_ANON_RAM_FREE 0
+#define TRACE_QEMU_ANON_RAM_FREE_ENABLED 0
+#define TRACE_QEMU_ANON_RAM_FREE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_anon_ram_free(void *ptr, size_t size) {
+ (void)ptr;
+ (void)size;
+}
+#define TRACE_QEMU_CO_MUTEX_LOCK_ENTRY 0
+#define TRACE_QEMU_CO_MUTEX_LOCK_ENTRY_ENABLED 0
+#define TRACE_QEMU_CO_MUTEX_LOCK_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_qemu_co_mutex_lock_entry(void *mutex, void *self) {
+ (void)mutex;
+ (void)self;
+}
+#define TRACE_QEMU_CO_MUTEX_LOCK_RETURN 0
+#define TRACE_QEMU_CO_MUTEX_LOCK_RETURN_ENABLED 0
+#define TRACE_QEMU_CO_MUTEX_LOCK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_qemu_co_mutex_lock_return(void *mutex, void *self) {
+ (void)mutex;
+ (void)self;
+}
+#define TRACE_QEMU_CO_MUTEX_LOCK_UNCONTENDED 0
+#define TRACE_QEMU_CO_MUTEX_LOCK_UNCONTENDED_ENABLED 0
+#define TRACE_QEMU_CO_MUTEX_LOCK_UNCONTENDED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_co_mutex_lock_uncontended(void *mutex, void *self) {
+ (void)mutex;
+ (void)self;
+}
+#define TRACE_QEMU_CO_MUTEX_UNLOCK_ENTRY 0
+#define TRACE_QEMU_CO_MUTEX_UNLOCK_ENTRY_ENABLED 0
+#define TRACE_QEMU_CO_MUTEX_UNLOCK_ENTRY_BACKEND_DSTATE() (0)
+static inline void trace_qemu_co_mutex_unlock_entry(void *mutex, void *self) {
+ (void)mutex;
+ (void)self;
+}
+#define TRACE_QEMU_CO_MUTEX_UNLOCK_RETURN 0
+#define TRACE_QEMU_CO_MUTEX_UNLOCK_RETURN_ENABLED 0
+#define TRACE_QEMU_CO_MUTEX_UNLOCK_RETURN_BACKEND_DSTATE() (0)
+static inline void trace_qemu_co_mutex_unlock_return(void *mutex, void *self) {
+ (void)mutex;
+ (void)self;
+}
+#define TRACE_QEMU_COROUTINE_TERMINATE 0
+#define TRACE_QEMU_COROUTINE_TERMINATE_ENABLED 0
+#define TRACE_QEMU_COROUTINE_TERMINATE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_coroutine_terminate(void *co) {
+ (void)co;
+}
+#define TRACE_QEMU_COROUTINE_YIELD 0
+#define TRACE_QEMU_COROUTINE_YIELD_ENABLED 0
+#define TRACE_QEMU_COROUTINE_YIELD_BACKEND_DSTATE() (0)
+static inline void trace_qemu_coroutine_yield(void *from, void *to) {
+ (void)from;
+ (void)to;
+}
+#define TRACE_QEMU_FILE_MONITOR_ADD_WATCH 0
+#define TRACE_QEMU_FILE_MONITOR_ADD_WATCH_ENABLED 0
+#define TRACE_QEMU_FILE_MONITOR_ADD_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_monitor_add_watch(void *mon, const char *dirpath, const char *filename, void *cb, void *opaque, int64_t id) {
+ (void)mon;
+ (void)dirpath;
+ (void)filename;
+ (void)cb;
+ (void)opaque;
+ (void)id;
+}
+#define TRACE_QEMU_FILE_MONITOR_DISABLE_WATCH 0
+#define TRACE_QEMU_FILE_MONITOR_DISABLE_WATCH_ENABLED 0
+#define TRACE_QEMU_FILE_MONITOR_DISABLE_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_monitor_disable_watch(void *mon, const char *dirpath, int id) {
+ (void)mon;
+ (void)dirpath;
+ (void)id;
+}
+#define TRACE_QEMU_FILE_MONITOR_DISPATCH 0
+#define TRACE_QEMU_FILE_MONITOR_DISPATCH_ENABLED 0
+#define TRACE_QEMU_FILE_MONITOR_DISPATCH_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_monitor_dispatch(void *mon, const char *dirpath, const char *filename, int ev, void *cb, void *opaque, int64_t id) {
+ (void)mon;
+ (void)dirpath;
+ (void)filename;
+ (void)ev;
+ (void)cb;
+ (void)opaque;
+ (void)id;
+}
+#define TRACE_QEMU_FILE_MONITOR_ENABLE_WATCH 0
+#define TRACE_QEMU_FILE_MONITOR_ENABLE_WATCH_ENABLED 0
+#define TRACE_QEMU_FILE_MONITOR_ENABLE_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_monitor_enable_watch(void *mon, const char *dirpath, int id) {
+ (void)mon;
+ (void)dirpath;
+ (void)id;
+}
+#define TRACE_QEMU_FILE_MONITOR_EVENT 0
+#define TRACE_QEMU_FILE_MONITOR_EVENT_ENABLED 0
+#define TRACE_QEMU_FILE_MONITOR_EVENT_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_monitor_event(void *mon, const char *dirpath, const char *filename, int mask, unsigned int id) {
+ (void)mon;
+ (void)dirpath;
+ (void)filename;
+ (void)mask;
+ (void)id;
+}
+#define TRACE_QEMU_FILE_MONITOR_NEW 0
+#define TRACE_QEMU_FILE_MONITOR_NEW_ENABLED 0
+#define TRACE_QEMU_FILE_MONITOR_NEW_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_monitor_new(void *mon, int fd) {
+ (void)mon;
+ (void)fd;
+}
+#define TRACE_QEMU_FILE_MONITOR_REMOVE_WATCH 0
+#define TRACE_QEMU_FILE_MONITOR_REMOVE_WATCH_ENABLED 0
+#define TRACE_QEMU_FILE_MONITOR_REMOVE_WATCH_BACKEND_DSTATE() (0)
+static inline void trace_qemu_file_monitor_remove_watch(void *mon, const char *dirpath, int64_t id) {
+ (void)mon;
+ (void)dirpath;
+ (void)id;
+}
+#define TRACE_QEMU_MEMALIGN 0
+#define TRACE_QEMU_MEMALIGN_ENABLED 0
+#define TRACE_QEMU_MEMALIGN_BACKEND_DSTATE() (0)
+static inline void trace_qemu_memalign(size_t alignment, size_t size, void *ptr) {
+ (void)alignment;
+ (void)size;
+ (void)ptr;
+}
+#define TRACE_QEMU_MUTEX_LOCK 0
+#define TRACE_QEMU_MUTEX_LOCK_ENABLED 0
+#define TRACE_QEMU_MUTEX_LOCK_BACKEND_DSTATE() (0)
+static inline void trace_qemu_mutex_lock(void *mutex, const char *file, const int line) {
+ (void)mutex;
+ (void)file;
+ (void)line;
+}
+#define TRACE_QEMU_MUTEX_LOCKED 0
+#define TRACE_QEMU_MUTEX_LOCKED_ENABLED 0
+#define TRACE_QEMU_MUTEX_LOCKED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_mutex_locked(void *mutex, const char *file, const int line) {
+ (void)mutex;
+ (void)file;
+ (void)line;
+}
+#define TRACE_QEMU_MUTEX_UNLOCK 0
+#define TRACE_QEMU_MUTEX_UNLOCK_ENABLED 0
+#define TRACE_QEMU_MUTEX_UNLOCK_BACKEND_DSTATE() (0)
+static inline void trace_qemu_mutex_unlock(void *mutex, const char *file, const int line) {
+ (void)mutex;
+ (void)file;
+ (void)line;
+}
+#define TRACE_QEMU_VFIO_DMA_MAP 0
+#define TRACE_QEMU_VFIO_DMA_MAP_ENABLED 0
+#define TRACE_QEMU_VFIO_DMA_MAP_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64_t *iova) {
+ (void)s;
+ (void)host;
+ (void)size;
+ (void)temporary;
+ (void)iova;
+}
+#define TRACE_QEMU_VFIO_DMA_MAPPED 0
+#define TRACE_QEMU_VFIO_DMA_MAPPED_ENABLED 0
+#define TRACE_QEMU_VFIO_DMA_MAPPED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_dma_mapped(void *s, void *host, uint64_t iova, size_t size) {
+ (void)s;
+ (void)host;
+ (void)iova;
+ (void)size;
+}
+#define TRACE_QEMU_VFIO_DMA_RESET_TEMPORARY 0
+#define TRACE_QEMU_VFIO_DMA_RESET_TEMPORARY_ENABLED 0
+#define TRACE_QEMU_VFIO_DMA_RESET_TEMPORARY_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_dma_reset_temporary(void *s) {
+ (void)s;
+}
+#define TRACE_QEMU_VFIO_DMA_UNMAP 0
+#define TRACE_QEMU_VFIO_DMA_UNMAP_ENABLED 0
+#define TRACE_QEMU_VFIO_DMA_UNMAP_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_dma_unmap(void *s, void *host) {
+ (void)s;
+ (void)host;
+}
+#define TRACE_QEMU_VFIO_DO_MAPPING 0
+#define TRACE_QEMU_VFIO_DO_MAPPING_ENABLED 0
+#define TRACE_QEMU_VFIO_DO_MAPPING_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_do_mapping(void *s, void *host, uint64_t iova, size_t size) {
+ (void)s;
+ (void)host;
+ (void)iova;
+ (void)size;
+}
+#define TRACE_QEMU_VFIO_DUMP_MAPPING 0
+#define TRACE_QEMU_VFIO_DUMP_MAPPING_ENABLED 0
+#define TRACE_QEMU_VFIO_DUMP_MAPPING_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_dump_mapping(void *host, uint64_t iova, size_t size) {
+ (void)host;
+ (void)iova;
+ (void)size;
+}
+#define TRACE_QEMU_VFIO_FIND_MAPPING 0
+#define TRACE_QEMU_VFIO_FIND_MAPPING_ENABLED 0
+#define TRACE_QEMU_VFIO_FIND_MAPPING_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_find_mapping(void *s, void *p) {
+ (void)s;
+ (void)p;
+}
+#define TRACE_QEMU_VFIO_NEW_MAPPING 0
+#define TRACE_QEMU_VFIO_NEW_MAPPING_ENABLED 0
+#define TRACE_QEMU_VFIO_NEW_MAPPING_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_new_mapping(void *s, void *host, size_t size, int index, uint64_t iova) {
+ (void)s;
+ (void)host;
+ (void)size;
+ (void)index;
+ (void)iova;
+}
+#define TRACE_QEMU_VFIO_PCI_MAP_BAR 0
+#define TRACE_QEMU_VFIO_PCI_MAP_BAR_ENABLED 0
+#define TRACE_QEMU_VFIO_PCI_MAP_BAR_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_pci_map_bar(int index, uint64_t region_ofs, uint64_t region_size, int ofs, void *host) {
+ (void)index;
+ (void)region_ofs;
+ (void)region_size;
+ (void)ofs;
+ (void)host;
+}
+#define TRACE_QEMU_VFIO_PCI_READ_CONFIG 0
+#define TRACE_QEMU_VFIO_PCI_READ_CONFIG_ENABLED 0
+#define TRACE_QEMU_VFIO_PCI_READ_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) {
+ (void)buf;
+ (void)ofs;
+ (void)size;
+ (void)region_ofs;
+ (void)region_size;
+}
+#define TRACE_QEMU_VFIO_PCI_WRITE_CONFIG 0
+#define TRACE_QEMU_VFIO_PCI_WRITE_CONFIG_ENABLED 0
+#define TRACE_QEMU_VFIO_PCI_WRITE_CONFIG_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) {
+ (void)buf;
+ (void)ofs;
+ (void)size;
+ (void)region_ofs;
+ (void)region_size;
+}
+#define TRACE_QEMU_VFIO_RAM_BLOCK_ADDED 0
+#define TRACE_QEMU_VFIO_RAM_BLOCK_ADDED_ENABLED 0
+#define TRACE_QEMU_VFIO_RAM_BLOCK_ADDED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_ram_block_added(void *s, void *p, size_t size) {
+ (void)s;
+ (void)p;
+ (void)size;
+}
+#define TRACE_QEMU_VFIO_RAM_BLOCK_REMOVED 0
+#define TRACE_QEMU_VFIO_RAM_BLOCK_REMOVED_ENABLED 0
+#define TRACE_QEMU_VFIO_RAM_BLOCK_REMOVED_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_ram_block_removed(void *s, void *p, size_t size) {
+ (void)s;
+ (void)p;
+ (void)size;
+}
+#define TRACE_QEMU_VFIO_REGION_INFO 0
+#define TRACE_QEMU_VFIO_REGION_INFO_ENABLED 0
+#define TRACE_QEMU_VFIO_REGION_INFO_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfio_region_info(const char *desc, uint64_t region_ofs, uint64_t region_size, uint32_t cap_offset) {
+ (void)desc;
+ (void)region_ofs;
+ (void)region_size;
+ (void)cap_offset;
+}
+#define TRACE_QEMU_VFREE 0
+#define TRACE_QEMU_VFREE_ENABLED 0
+#define TRACE_QEMU_VFREE_BACKEND_DSTATE() (0)
+static inline void trace_qemu_vfree(void *ptr) {
+ (void)ptr;
+}
+#define TRACE_REENTRANT_AIO 0
+#define TRACE_REENTRANT_AIO_ENABLED 0
+#define TRACE_REENTRANT_AIO_BACKEND_DSTATE() (0)
+static inline void trace_reentrant_aio(void *ctx, const char *name) {
+ (void)ctx;
+ (void)name;
+}
+#define TRACE_RUN_POLL_HANDLERS_BEGIN 0
+#define TRACE_RUN_POLL_HANDLERS_BEGIN_ENABLED 0
+#define TRACE_RUN_POLL_HANDLERS_BEGIN_BACKEND_DSTATE() (0)
+static inline void trace_run_poll_handlers_begin(void *ctx, int64_t max_ns, int64_t timeout) {
+ (void)ctx;
+ (void)max_ns;
+ (void)timeout;
+}
+#define TRACE_RUN_POLL_HANDLERS_END 0
+#define TRACE_RUN_POLL_HANDLERS_END_ENABLED 0
+#define TRACE_RUN_POLL_HANDLERS_END_BACKEND_DSTATE() (0)
+static inline void trace_run_poll_handlers_end(void *ctx, bool progress, int64_t timeout) {
+ (void)ctx;
+ (void)progress;
+ (void)timeout;
+}
+#define TRACE_SOCKET_LISTEN 0
+#define TRACE_SOCKET_LISTEN_ENABLED 0
+#define TRACE_SOCKET_LISTEN_BACKEND_DSTATE() (0)
+static inline void trace_socket_listen(int num) {
+ (void)num;
+}
+#define TRACE_THREAD_POOL_CANCEL_AIO 0
+#define TRACE_THREAD_POOL_CANCEL_AIO_ENABLED 0
+#define TRACE_THREAD_POOL_CANCEL_AIO_BACKEND_DSTATE() (0)
+static inline void trace_thread_pool_cancel_aio(void *req, void *opaque) {
+ (void)req;
+ (void)opaque;
+}
+#define TRACE_THREAD_POOL_COMPLETE_AIO 0
+#define TRACE_THREAD_POOL_COMPLETE_AIO_ENABLED 0
+#define TRACE_THREAD_POOL_COMPLETE_AIO_BACKEND_DSTATE() (0)
+static inline void trace_thread_pool_complete_aio(void *pool, void *req, void *opaque, int ret) {
+ (void)pool;
+ (void)req;
+ (void)opaque;
+ (void)ret;
+}
+#define TRACE_THREAD_POOL_SUBMIT_AIO 0
+#define TRACE_THREAD_POOL_SUBMIT_AIO_ENABLED 0
+#define TRACE_THREAD_POOL_SUBMIT_AIO_BACKEND_DSTATE() (0)
+static inline void trace_thread_pool_submit_aio(void *pool, void *req, void *opaque) {
+ (void)pool;
+ (void)req;
+ (void)opaque;
+}
+#define TRACE_UFFD_CREATE_FD_API_FAILED 0
+#define TRACE_UFFD_CREATE_FD_API_FAILED_ENABLED 0
+#define TRACE_UFFD_CREATE_FD_API_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_uffd_create_fd_api_failed(int err) {
+ (void)err;
+}
+#define TRACE_UFFD_CREATE_FD_API_NOIOCTL 0
+#define TRACE_UFFD_CREATE_FD_API_NOIOCTL_ENABLED 0
+#define TRACE_UFFD_CREATE_FD_API_NOIOCTL_BACKEND_DSTATE() (0)
+static inline void trace_uffd_create_fd_api_noioctl(uint64_t ioctl_req, uint64_t ioctl_supp) {
+ (void)ioctl_req;
+ (void)ioctl_supp;
+}
+#define TRACE_UFFD_CREATE_FD_NOSYS 0
+#define TRACE_UFFD_CREATE_FD_NOSYS_ENABLED 0
+#define TRACE_UFFD_CREATE_FD_NOSYS_BACKEND_DSTATE() (0)
+static inline void trace_uffd_create_fd_nosys(int err) {
+ (void)err;
+}
+#define TRACE_UFFD_DETECT_OPEN_MODE 0
+#define TRACE_UFFD_DETECT_OPEN_MODE_ENABLED 0
+#define TRACE_UFFD_DETECT_OPEN_MODE_BACKEND_DSTATE() (0)
+static inline void trace_uffd_detect_open_mode(int mode) {
+ (void)mode;
+}
+#define TRACE_UFFD_QUERY_FEATURES_API_FAILED 0
+#define TRACE_UFFD_QUERY_FEATURES_API_FAILED_ENABLED 0
+#define TRACE_UFFD_QUERY_FEATURES_API_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_uffd_query_features_api_failed(int err) {
+ (void)err;
+}
+#define TRACE_UFFD_QUERY_FEATURES_NOSYS 0
+#define TRACE_UFFD_QUERY_FEATURES_NOSYS_ENABLED 0
+#define TRACE_UFFD_QUERY_FEATURES_NOSYS_BACKEND_DSTATE() (0)
+static inline void trace_uffd_query_features_nosys(int err) {
+ (void)err;
+}
+#define TRACE_UFFD_REGISTER_MEMORY_FAILED 0
+#define TRACE_UFFD_REGISTER_MEMORY_FAILED_ENABLED 0
+#define TRACE_UFFD_REGISTER_MEMORY_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_uffd_register_memory_failed(void *addr, uint64_t length, uint64_t mode, int err) {
+ (void)addr;
+ (void)length;
+ (void)mode;
+ (void)err;
+}
+#define TRACE_UFFD_UNREGISTER_MEMORY_FAILED 0
+#define TRACE_UFFD_UNREGISTER_MEMORY_FAILED_ENABLED 0
+#define TRACE_UFFD_UNREGISTER_MEMORY_FAILED_BACKEND_DSTATE() (0)
+static inline void trace_uffd_unregister_memory_failed(void *addr, uint64_t length, int err) {
+ (void)addr;
+ (void)length;
+ (void)err;
+}
+#define TRACE_WIN32_MAP_ALLOC 0
+#define TRACE_WIN32_MAP_ALLOC_ENABLED 0
+#define TRACE_WIN32_MAP_ALLOC_BACKEND_DSTATE() (0)
+static inline void trace_win32_map_alloc(size_t size) {
+ (void)size;
+}
+#define TRACE_WIN32_MAP_FREE 0
+#define TRACE_WIN32_MAP_FREE_ENABLED 0
+#define TRACE_WIN32_MAP_FREE_BACKEND_DSTATE() (0)
+static inline void trace_win32_map_free(void *ptr, void *h) {
+ (void)ptr;
+ (void)h;
+}
+
+#endif
\ No newline at end of file
diff --git a/ui/shader/xemu-logo.frag b/ui/shader/xemu-logo.frag
index 2654aac13a..70750cdcdc 100644
--- a/ui/shader/xemu-logo.frag
+++ b/ui/shader/xemu-logo.frag
@@ -158,7 +158,7 @@ float getParticles(vec2 uv)
void main()
{
- vec2 uv = gl_FragCoord.xy/vec2(512);
+ vec2 uv = gl_FragCoord.xy*vec2(512.0);
float scale = 1.4;
uv -= 0.5 * (1.-1./scale);
uv *= scale;
diff --git a/ui/xemu-input.c b/ui/xemu-input.c
index 8d8388916e..fde1ecb5da 100644
--- a/ui/xemu-input.c
+++ b/ui/xemu-input.c
@@ -320,7 +320,11 @@ int xemu_input_get_controller_default_bind_port(ControllerState *state, int star
}
for (int i = start; i < 4; i++) {
- if (strcmp(guid, *port_index_to_settings_key_map[i]) == 0) {
+ const char *binding = *port_index_to_settings_key_map[i];
+ if (binding == NULL || binding[0] == '\0') {
+ continue;
+ }
+ if (strcmp(guid, binding) == 0) {
return i;
}
}
diff --git a/ui/xemu-settings.cc b/ui/xemu-settings.cc
index 70113c7bc1..908033f2fd 100644
--- a/ui/xemu-settings.cc
+++ b/ui/xemu-settings.cc
@@ -34,6 +34,10 @@
#include "xemu-controllers.h"
#include "xemu-settings.h"
+#ifdef __ANDROID__
+#include
+#endif
+
#define DEFINE_CONFIG_TREE
#include "xemu-config.h"
@@ -173,7 +177,30 @@ bool xemu_settings_load(void)
setlocale(LC_NUMERIC, "C");
try {
- config_tree.update_from_table(toml::parse(buf));
+ toml::table tbl = toml::parse(buf);
+ config_tree.update_from_table(tbl);
+#ifdef __ANDROID__
+ if (auto android_tbl = tbl["android"].as_table()) {
+ if (auto v = android_tbl->get("force_cpu_blit"); v && v->is_boolean()) {
+ if (v->value().value_or(false)) {
+ setenv("XEMU_ANDROID_FORCE_CPU_BLIT", "1", 1);
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "Config android.force_cpu_blit=1");
+ } else {
+ setenv("XEMU_ANDROID_FORCE_CPU_BLIT", "0", 1);
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "Config android.force_cpu_blit=0");
+ }
+ }
+ if (auto v = android_tbl->get("egl_offscreen"); v && v->is_boolean()) {
+ if (!v->value().value_or(true)) {
+ setenv("XEMU_ANDROID_EGL_OFFSCREEN", "0", 1);
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "Config android.egl_offscreen=0");
+ }
+ }
+ }
+#endif
success = true;
} catch (const toml::parse_error& err) {
std::ostringstream oss;
diff --git a/ui/xemu-snapshots.h b/ui/xemu-snapshots.h
index a9809117a2..354322ee56 100644
--- a/ui/xemu-snapshots.h
+++ b/ui/xemu-snapshots.h
@@ -26,7 +26,11 @@ extern "C" {
#include "qemu/osdep.h"
#include "block/snapshot.h"
+#if defined(ANDROID) || defined(__ANDROID__)
+typedef unsigned int GLuint;
+#else
#include
+#endif
#define XEMU_SNAPSHOT_DATA_MAGIC 0x78656d75 // 'xemu'
#define XEMU_SNAPSHOT_DATA_VERSION 1
diff --git a/ui/xemu.c b/ui/xemu.c
index d998438e5e..d717931fc0 100644
--- a/ui/xemu.c
+++ b/ui/xemu.c
@@ -60,6 +60,9 @@
#include
#include
+#ifdef __ANDROID__
+#include
+#endif
#ifdef _WIN32
#include "nvapi.h"
// Provide hint to prefer high-performance graphics for hybrid systems
@@ -116,12 +119,191 @@ static SDL_Cursor *guest_sprite;
static Notifier mouse_mode_notifier;
static SDL_Window *m_window;
static SDL_GLContext m_context;
+static SDL_threadID sdl_render_thread_id;
// struct decal_shader *blit;
static QemuSemaphore display_init_sem;
static void toggle_full_screen(struct sdl2_console *scon);
+#ifdef __ANDROID__
+static bool g_android_gl_bgra_supported = true;
+static bool g_android_use_hud = false;
+static bool g_android_paused = false;
+static bool g_android_should_quit = false;
+static uint64_t g_android_frame_counter = 0;
+static GLuint g_android_blit_prog;
+static GLuint g_android_blit_vao;
+static GLuint g_android_blit_vbo;
+static GLint g_android_blit_tex_loc = -1;
+static GLint g_android_blit_flip_loc = -1;
+static GLuint g_android_cpu_tex = 0;
+static int g_android_cpu_tex_w = 0;
+static int g_android_cpu_tex_h = 0;
+static uint8_t *g_android_cpu_buf = NULL;
+static size_t g_android_cpu_buf_size = 0;
+
+static bool sdl2_is_render_thread(void)
+{
+ return sdl_render_thread_id != 0 && SDL_ThreadID() == sdl_render_thread_id;
+}
+
+static bool sdl2_gl_has_extension(const char *ext_list, const char *ext)
+{
+ if (!ext_list || !ext || !ext[0]) {
+ return false;
+ }
+ const size_t len = strlen(ext);
+ const char *pos = ext_list;
+ while ((pos = strstr(pos, ext)) != NULL) {
+ const char *end = pos + len;
+ if ((pos == ext_list || pos[-1] == ' ') &&
+ (*end == '\0' || *end == ' ')) {
+ return true;
+ }
+ pos = end;
+ }
+ return false;
+}
+
+static void android_log_gl_error(const char *stage)
+{
+ GLenum err;
+ bool logged = false;
+ while ((err = glGetError()) != GL_NO_ERROR) {
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "GL error at %s: 0x%x", stage, err);
+ logged = true;
+ }
+ (void)logged;
+}
+
+static GLuint android_gl_compile_shader(GLenum type, const char *src)
+{
+ GLuint shader = glCreateShader(type);
+ if (!shader) {
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "android_gl_compile_shader: glCreateShader failed");
+ return 0;
+ }
+ glShaderSource(shader, 1, &src, NULL);
+ glCompileShader(shader);
+ GLint status = 0;
+ glGetShaderiv(shader, GL_COMPILE_STATUS, &status);
+ if (status != GL_TRUE) {
+ char log[1024] = {0};
+ GLsizei len = 0;
+ glGetShaderInfoLog(shader, (GLsizei)sizeof(log) - 1, &len, log);
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "shader compile failed: %s", log);
+ glDeleteShader(shader);
+ return 0;
+ }
+ return shader;
+}
+
+static bool android_blit_init(void)
+{
+ if (g_android_blit_prog) {
+ return true;
+ }
+ const char *vs = "#version 300 es\n"
+ "precision highp float;\n"
+ "layout(location=0) in vec2 a_pos;\n"
+ "layout(location=1) in vec2 a_uv;\n"
+ "uniform bool u_flip;\n"
+ "out vec2 v_uv;\n"
+ "void main() {\n"
+ " v_uv = a_uv;\n"
+ " if (u_flip) { v_uv.y = 1.0 - v_uv.y; }\n"
+ " gl_Position = vec4(a_pos, 0.0, 1.0);\n"
+ "}\n";
+ const char *fs = "#version 300 es\n"
+ "precision highp float;\n"
+ "in vec2 v_uv;\n"
+ "uniform sampler2D u_tex;\n"
+ "out vec4 out_Color;\n"
+ "void main() {\n"
+ " out_Color = texture(u_tex, v_uv);\n"
+ "}\n";
+
+ GLuint vshader = android_gl_compile_shader(GL_VERTEX_SHADER, vs);
+ GLuint fshader = android_gl_compile_shader(GL_FRAGMENT_SHADER, fs);
+ if (!vshader || !fshader) {
+ return false;
+ }
+
+ GLuint prog = glCreateProgram();
+ glAttachShader(prog, vshader);
+ glAttachShader(prog, fshader);
+ glLinkProgram(prog);
+ glDeleteShader(vshader);
+ glDeleteShader(fshader);
+
+ GLint linked = 0;
+ glGetProgramiv(prog, GL_LINK_STATUS, &linked);
+ if (!linked) {
+ char log[1024] = {0};
+ GLsizei len = 0;
+ glGetProgramInfoLog(prog, (GLsizei)sizeof(log) - 1, &len, log);
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "shader link failed: %s", log);
+ glDeleteProgram(prog);
+ return false;
+ }
+
+ g_android_blit_prog = prog;
+ g_android_blit_tex_loc = glGetUniformLocation(prog, "u_tex");
+ g_android_blit_flip_loc = glGetUniformLocation(prog, "u_flip");
+
+ const float verts[] = {
+ -1.0f, -1.0f, 0.0f, 0.0f,
+ 1.0f, -1.0f, 1.0f, 0.0f,
+ -1.0f, 1.0f, 0.0f, 1.0f,
+ 1.0f, 1.0f, 1.0f, 1.0f,
+ };
+ glGenVertexArrays(1, &g_android_blit_vao);
+ glBindVertexArray(g_android_blit_vao);
+ glGenBuffers(1, &g_android_blit_vbo);
+ glBindBuffer(GL_ARRAY_BUFFER, g_android_blit_vbo);
+ glBufferData(GL_ARRAY_BUFFER, sizeof(verts), verts, GL_STATIC_DRAW);
+ glEnableVertexAttribArray(0);
+ glVertexAttribPointer(0, 2, GL_FLOAT, GL_FALSE, 4 * sizeof(float), (void *)0);
+ glEnableVertexAttribArray(1);
+ glVertexAttribPointer(1, 2, GL_FLOAT, GL_FALSE, 4 * sizeof(float),
+ (void *)(2 * sizeof(float)));
+ glBindBuffer(GL_ARRAY_BUFFER, 0);
+ glBindVertexArray(0);
+
+ return true;
+}
+
+static void android_blit_frame(GLuint tex, bool flip)
+{
+ if (!android_blit_init()) {
+ return;
+ }
+ android_log_gl_error("blit-start");
+ int w = 0;
+ int h = 0;
+ SDL_GL_GetDrawableSize(m_window, &w, &h);
+ if (w <= 0) w = 1;
+ if (h <= 0) h = 1;
+
+ glBindFramebuffer(GL_FRAMEBUFFER, 0);
+ glViewport(0, 0, w, h);
+ glUseProgram(g_android_blit_prog);
+ glUniform1i(g_android_blit_tex_loc, 0);
+ glUniform1i(g_android_blit_flip_loc, flip ? 1 : 0);
+ glActiveTexture(GL_TEXTURE0);
+ glBindTexture(GL_TEXTURE_2D, tex);
+ glBindVertexArray(g_android_blit_vao);
+ glDrawArrays(GL_TRIANGLE_STRIP, 0, 4);
+ glBindVertexArray(0);
+ android_log_gl_error("blit-draw");
+}
+#endif
+
int xemu_is_fullscreen(void)
{
return gui_fullscreen;
@@ -518,8 +700,18 @@ static void handle_windowevent(SDL_Event *ev)
}
break;
case SDL_WINDOWEVENT_RESTORED:
+#ifdef __ANDROID__
+ g_android_paused = false;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: window restored");
+#endif
break;
case SDL_WINDOWEVENT_MINIMIZED:
+#ifdef __ANDROID__
+ g_android_paused = true;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: window minimized");
+#endif
break;
case SDL_WINDOWEVENT_CLOSE:
if (qemu_console_is_graphic(scon->dcl.con)) {
@@ -529,6 +721,11 @@ static void handle_windowevent(SDL_Event *ev)
if (allow_close) {
shutdown_action = SHUTDOWN_ACTION_POWEROFF;
qemu_system_shutdown_request(SHUTDOWN_CAUSE_HOST_UI);
+#ifdef __ANDROID__
+ g_android_should_quit = true;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: window close requested");
+#endif
}
} else {
SDL_HideWindow(scon->real_window);
@@ -537,9 +734,19 @@ static void handle_windowevent(SDL_Event *ev)
break;
case SDL_WINDOWEVENT_SHOWN:
scon->hidden = false;
+#ifdef __ANDROID__
+ g_android_paused = false;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: window shown");
+#endif
break;
case SDL_WINDOWEVENT_HIDDEN:
scon->hidden = true;
+#ifdef __ANDROID__
+ g_android_paused = true;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: window hidden");
+#endif
break;
}
}
@@ -555,12 +762,24 @@ void sdl2_poll_events(struct sdl2_console *scon)
}
int kbd = 0, mouse = 0;
+#ifdef __ANDROID__
+ if (g_android_use_hud) {
+ xemu_hud_should_capture_kbd_mouse(&kbd, &mouse);
+ }
+#else
xemu_hud_should_capture_kbd_mouse(&kbd, &mouse);
+#endif
while (SDL_PollEvent(ev)) {
// HUD must process events first so that if a controller is detached,
// a latent rebind request can cancel before the state is freed
+#ifdef __ANDROID__
+ if (g_android_use_hud) {
+ xemu_hud_process_sdl_events(ev);
+ }
+#else
xemu_hud_process_sdl_events(ev);
+#endif
xemu_input_process_sdl_events(ev);
switch (ev->type) {
@@ -583,8 +802,32 @@ void sdl2_poll_events(struct sdl2_console *scon)
if (allow_close) {
shutdown_action = SHUTDOWN_ACTION_POWEROFF;
qemu_system_shutdown_request(SHUTDOWN_CAUSE_HOST_UI);
+#ifdef __ANDROID__
+ g_android_should_quit = true;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: SDL_QUIT");
+#endif
}
break;
+#ifdef __ANDROID__
+ case SDL_APP_TERMINATING:
+ g_android_should_quit = true;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: app terminating");
+ break;
+ case SDL_APP_WILLENTERBACKGROUND:
+ case SDL_APP_DIDENTERBACKGROUND:
+ g_android_paused = true;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: app background");
+ break;
+ case SDL_APP_WILLENTERFOREGROUND:
+ case SDL_APP_DIDENTERFOREGROUND:
+ g_android_paused = false;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "android: app foreground");
+ break;
+#endif
case SDL_MOUSEMOTION:
if (mouse) break;
handle_mousemotion(ev);
@@ -682,7 +925,11 @@ static const DisplayChangeListenerOps dcl_gl_ops = {
static void sdl2_display_very_early_init(DisplayOptions *o)
{
-#ifdef __linux__
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "sdl2_display_very_early_init: start");
+#endif
+#if defined(__linux__) && !defined(__ANDROID__)
/* on Linux, SDL may use fbcon|directfb|svgalib when run without
* accessible $DISPLAY to open X11 window. This is often the case
* when qemu is run using sudo. But in this case, and when actually
@@ -695,6 +942,12 @@ static void sdl2_display_very_early_init(DisplayOptions *o)
setenv("SDL_VIDEODRIVER", "x11", 0);
#endif
+#ifdef __ANDROID__
+ SDL_setenv("SDL_AUDIODRIVER", "aaudio", 0);
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "SDL_AUDIODRIVER=%s", SDL_getenv("SDL_AUDIODRIVER"));
+#endif
+
if (SDL_Init(SDL_INIT_VIDEO)) {
fprintf(stderr, "Failed to initialize SDL video subsystem: %s\n",
SDL_GetError());
@@ -708,17 +961,26 @@ static void sdl2_display_very_early_init(DisplayOptions *o)
SDL_SetHint(SDL_HINT_VIDEO_MINIMIZE_ON_FOCUS_LOSS, "0");
// Initialize rendering context
+ // Note: On Android, we always need GL context even for Vulkan because
+ // Vulkan uses GL external memory for display presentation
SDL_GL_SetAttribute(SDL_GL_RED_SIZE, 8);
SDL_GL_SetAttribute(SDL_GL_GREEN_SIZE, 8);
SDL_GL_SetAttribute(SDL_GL_BLUE_SIZE, 8);
SDL_GL_SetAttribute(SDL_GL_ALPHA_SIZE, 8);
SDL_GL_SetAttribute(SDL_GL_DEPTH_SIZE, 24);
SDL_GL_SetAttribute(SDL_GL_STENCIL_SIZE, 8);
+#ifdef __ANDROID__
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_PROFILE_MASK,
+ SDL_GL_CONTEXT_PROFILE_ES);
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 3);
+ SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 2);
+#else
SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 4);
SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 0);
SDL_GL_SetAttribute(
SDL_GL_CONTEXT_PROFILE_MASK,
SDL_GL_CONTEXT_PROFILE_CORE);
+#endif
SDL_GL_SetAttribute(SDL_GL_DOUBLEBUFFER, 1);
char *title = g_strdup_printf("xemu | v%s"
@@ -761,7 +1023,16 @@ static void sdl2_display_very_early_init(DisplayOptions *o)
window_height = min_window_height;
}
+ // On Android, always use OpenGL window even for Vulkan because Vulkan
+ // needs GL context for external memory display presentation
+#ifdef __ANDROID__
SDL_WindowFlags window_flags = (SDL_WindowFlags)(SDL_WINDOW_OPENGL | SDL_WINDOW_RESIZABLE | SDL_WINDOW_ALLOW_HIGHDPI);
+#else
+ bool use_vulkan = (g_config.display.renderer == CONFIG_DISPLAY_RENDERER_VULKAN);
+ SDL_WindowFlags window_flags = (SDL_WindowFlags)(
+ (use_vulkan ? SDL_WINDOW_VULKAN : SDL_WINDOW_OPENGL) |
+ SDL_WINDOW_RESIZABLE | SDL_WINDOW_ALLOW_HIGHDPI);
+#endif
// Create main window
m_window = SDL_CreateWindow(
@@ -784,25 +1055,48 @@ static void sdl2_display_very_early_init(DisplayOptions *o)
m_context = SDL_GL_CreateContext(m_window);
+#ifndef __ANDROID__
if (m_context != NULL && epoxy_gl_version() < 40) {
SDL_GL_MakeCurrent(NULL, NULL);
SDL_GL_DeleteContext(m_context);
m_context = NULL;
}
+#endif
if (m_context == NULL) {
- SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_ERROR,
- "Unable to create OpenGL context",
+#ifdef __ANDROID__
+ const char *msg =
+ "Unable to create OpenGL ES context. This usually means the\r\n"
+ "graphics device on this system does not support OpenGL ES 3.0.\r\n"
+ "\r\n"
+ "xemu cannot continue and will now exit.";
+#else
+ const char *msg =
"Unable to create OpenGL context. This usually means the\r\n"
"graphics device on this system does not support OpenGL 4.0.\r\n"
"\r\n"
- "xemu cannot continue and will now exit.",
+ "xemu cannot continue and will now exit.";
+#endif
+ SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_ERROR,
+ "Unable to create OpenGL context",
+ msg,
m_window);
SDL_DestroyWindow(m_window);
SDL_Quit();
exit(1);
}
+ if (SDL_GL_MakeCurrent(m_window, m_context) != 0) {
+ fprintf(stderr, "Failed to make GL context current: %s\n", SDL_GetError());
+ SDL_DestroyWindow(m_window);
+ SDL_Quit();
+ exit(1);
+ }
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "sdl2_display_very_early_init: GL context current");
+#endif
+
int width, height, channels = 0;
stbi_set_flip_vertically_on_load(0);
unsigned char *icon_data = stbi_load_from_memory(xemu_64x64_data, xemu_64x64_size, &width, &height, &channels, 4);
@@ -822,11 +1116,43 @@ static void sdl2_display_very_early_init(DisplayOptions *o)
fprintf(stderr, "GL_RENDERER: %s\n", glGetString(GL_RENDERER));
fprintf(stderr, "GL_VERSION: %s\n", glGetString(GL_VERSION));
fprintf(stderr, "GL_SHADING_LANGUAGE_VERSION: %s\n", glGetString(GL_SHADING_LANGUAGE_VERSION));
+#ifdef __ANDROID__
+ {
+ const char *vendor = (const char *)glGetString(GL_VENDOR);
+ const char *renderer = (const char *)glGetString(GL_RENDERER);
+ const char *version = (const char *)glGetString(GL_VERSION);
+ const char *sl = (const char *)glGetString(GL_SHADING_LANGUAGE_VERSION);
+ const char *exts = (const char *)glGetString(GL_EXTENSIONS);
+ g_android_gl_bgra_supported = sdl2_gl_has_extension(exts, "GL_EXT_texture_format_BGRA8888") ||
+ sdl2_gl_has_extension(exts, "GL_EXT_texture_format_BGRA8888_OES");
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "GL_VENDOR=%s", vendor ? vendor : "(null)");
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "GL_RENDERER=%s", renderer ? renderer : "(null)");
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "GL_VERSION=%s", version ? version : "(null)");
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "GLSL_VERSION=%s", sl ? sl : "(null)");
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "GL_EXT_texture_format_BGRA8888=%s",
+ g_android_gl_bgra_supported ? "yes" : "no");
+ }
+#endif
// Initialize offscreen rendering context now
+#ifdef __ANDROID__
+ // Android uses a separate preinit path on the SDL thread.
+#else
nv2a_context_init();
+#endif
+#ifndef __ANDROID__
SDL_GL_MakeCurrent(NULL, NULL);
+#endif
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "sdl2_display_very_early_init: done");
+#endif
// FIXME: atexit(sdl_cleanup);
}
@@ -835,9 +1161,18 @@ static void sdl2_display_early_init(DisplayOptions *o)
assert(o->type == DISPLAY_TYPE_XEMU);
display_opengl = 1;
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "sdl2_display_early_init");
+#endif
+#ifdef __ANDROID__
+ // Avoid binding the display context on the QEMU thread.
+ return;
+#else
SDL_GL_MakeCurrent(m_window, m_context);
SDL_GL_SetSwapInterval(g_config.display.window.vsync ? 1 : 0);
xemu_hud_init(m_window, m_context);
+#endif
// blit = create_decal_shader(SHADER_TYPE_BLIT_GAMMA);
}
@@ -848,7 +1183,12 @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
SDL_SysWMinfo info;
assert(o->type == DISPLAY_TYPE_XEMU);
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "sdl2_display_init: begin");
+#else
SDL_GL_MakeCurrent(m_window, m_context);
+#endif
memset(&info, 0, sizeof(info));
SDL_VERSION(&info.version);
@@ -912,8 +1252,15 @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
sdl_cursor_normal = SDL_GetCursor();
/* Tell main thread to go ahead and create the app and enter the run loop */
+#ifndef __ANDROID__
SDL_GL_MakeCurrent(NULL, NULL);
+#endif
qemu_sem_post(&display_init_sem);
+
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "sdl2_display_init: posted display_init_sem");
+#endif
}
static QemuDisplay qemu_display_sdl2 = {
@@ -929,24 +1276,132 @@ static void register_sdl1(void)
type_init(register_sdl1);
+#ifdef __ANDROID__
+void xemu_android_force_xemu_display_link(void)
+{
+}
+
+void xemu_android_display_preinit(void)
+{
+ static bool initialized = false;
+ if (initialized) {
+ return;
+ }
+ initialized = true;
+ sdl_render_thread_id = SDL_ThreadID();
+ sdl2_display_very_early_init(NULL);
+ if (SDL_GL_MakeCurrent(m_window, m_context) != 0) {
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "xemu_android_display_preinit: make current failed: %s",
+ SDL_GetError());
+#endif
+ }
+#ifdef __ANDROID__
+ // Cache EGL state now while GL context is current on this thread
+ extern void glo_android_cache_current_egl_state(void);
+ glo_android_cache_current_egl_state();
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "xemu_android_display_preinit: cached EGL state");
+#endif
+ nv2a_android_early_context_init();
+ qemu_sem_init(&display_init_sem, 0);
+}
+
+void xemu_android_display_wait_ready(void)
+{
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "xemu_android_display_wait_ready: waiting");
+#endif
+ qemu_sem_wait(&display_init_sem);
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "xemu_android_display_wait_ready: ready");
+#endif
+}
+
+void xemu_android_display_loop(void)
+{
+ // Mirror the desktop main-loop rendering path.
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "xemu_android_display_loop: start");
+#endif
+ if (sdl_render_thread_id == 0) {
+ sdl_render_thread_id = SDL_ThreadID();
+ }
+ if (SDL_GL_GetCurrentContext() != m_context) {
+ if (SDL_GL_MakeCurrent(m_window, m_context) != 0) {
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "xemu_android_display_loop: make current failed: %s",
+ SDL_GetError());
+#endif
+ return;
+ }
+ }
+#ifdef __ANDROID__
+ SDL_GL_SetSwapInterval(g_config.display.window.vsync ? 1 : 0);
+ if (g_android_use_hud) {
+ xemu_hud_init(m_window, m_context);
+ }
+#endif
+ tcg_register_init_ctx();
+ qemu_set_current_aio_context(qemu_get_aio_context());
+ qemu_mutex_lock_main_loop();
+ bql_lock();
+ xemu_input_init();
+ bql_unlock();
+ qemu_mutex_unlock_main_loop();
+
+ while (1) {
+ if (g_android_should_quit || qemu_shutdown_requested_get() != SHUTDOWN_CAUSE_NONE) {
+ break;
+ }
+ if (g_android_paused || sdl2_console[0].hidden) {
+ qemu_mutex_lock_main_loop();
+ bql_lock();
+ sdl2_poll_events(&sdl2_console[0]);
+ bql_unlock();
+ qemu_mutex_unlock_main_loop();
+ SDL_Delay(16);
+ continue;
+ }
+ sdl2_gl_refresh(&sdl2_console[0].dcl);
+#ifdef __ANDROID__
+ if (!g_android_paused && SDL_GL_GetCurrentContext() != NULL) {
+ android_log_gl_error("loop-end");
+ }
+#else
+ assert(glGetError() == GL_NO_ERROR);
+#endif
+ }
+}
+#endif
+
void xb_surface_gl_create_texture(DisplaySurface *surface)
{
assert(QEMU_IS_ALIGNED(surface_stride(surface), surface_bytes_per_pixel(surface)));
+ GLenum internal_format = GL_RGBA;
switch (surface_format(surface)) {
case PIXMAN_BE_b8g8r8x8:
case PIXMAN_BE_b8g8r8a8:
surface->glformat = GL_BGRA_EXT;
surface->gltype = GL_UNSIGNED_BYTE;
+ internal_format = GL_RGBA;
break;
case PIXMAN_BE_x8r8g8b8:
case PIXMAN_BE_a8r8g8b8:
surface->glformat = GL_RGBA;
surface->gltype = GL_UNSIGNED_BYTE;
+ internal_format = GL_RGBA;
break;
case PIXMAN_r5g6b5:
surface->glformat = GL_RGB;
surface->gltype = GL_UNSIGNED_SHORT_5_6_5;
+ internal_format = GL_RGB;
break;
default:
g_assert_not_reached();
@@ -956,14 +1411,56 @@ void xb_surface_gl_create_texture(DisplaySurface *surface)
glGenTextures(1, &surface->texture);
}
glBindTexture(GL_TEXTURE_2D, surface->texture);
- glPixelStorei(GL_UNPACK_ROW_LENGTH_EXT,
- surface_stride(surface) / surface_bytes_per_pixel(surface));
- glTexImage2D(GL_TEXTURE_2D, 0, GL_RGB,
+ const void *pixels = surface_data(surface);
+#ifdef __ANDROID__
+ uint8_t *converted = NULL;
+ bool use_row_length = true;
+ if (surface->glformat == GL_BGRA_EXT) {
+ const int width = surface_width(surface);
+ const int height = surface_height(surface);
+ const int stride = surface_stride(surface);
+ const uint8_t *src = (const uint8_t *)surface_data(surface);
+ converted = g_malloc((size_t)width * height * 4);
+ for (int y = 0; y < height; ++y) {
+ const uint8_t *row = src + (size_t)y * stride;
+ uint8_t *dst = converted + (size_t)y * width * 4;
+ for (int x = 0; x < width; ++x) {
+ const uint8_t b = row[x * 4 + 0];
+ const uint8_t g = row[x * 4 + 1];
+ const uint8_t r = row[x * 4 + 2];
+ const uint8_t a = row[x * 4 + 3];
+ dst[x * 4 + 0] = r;
+ dst[x * 4 + 1] = g;
+ dst[x * 4 + 2] = b;
+ dst[x * 4 + 3] = a;
+ }
+ }
+ surface->glformat = GL_RGBA;
+ pixels = converted;
+ use_row_length = false;
+ }
+ if (use_row_length) {
+#endif
+ glPixelStorei(GL_UNPACK_ROW_LENGTH_EXT,
+ surface_stride(surface) / surface_bytes_per_pixel(surface));
+#ifdef __ANDROID__
+ }
+#endif
+ glTexImage2D(GL_TEXTURE_2D, 0, internal_format,
surface_width(surface),
surface_height(surface),
0, surface->glformat, surface->gltype,
- surface_data(surface));
- glPixelStorei(GL_UNPACK_ROW_LENGTH_EXT, 0);
+ pixels);
+#ifdef __ANDROID__
+ if (use_row_length) {
+#endif
+ glPixelStorei(GL_UNPACK_ROW_LENGTH_EXT, 0);
+#ifdef __ANDROID__
+ }
+ if (converted) {
+ g_free(converted);
+ }
+#endif
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR);
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
@@ -984,6 +1481,11 @@ void sdl2_gl_update(DisplayChangeListener *dcl,
struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl);
assert(scon->opengl);
+#ifdef __ANDROID__
+ if (!sdl2_is_render_thread()) {
+ return;
+ }
+#endif
SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
}
@@ -992,9 +1494,15 @@ void sdl2_gl_switch(DisplayChangeListener *dcl,
{
struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl);
assert(scon->opengl);
- SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
- xb_surface_gl_destroy_texture(scon->surface);
+ DisplaySurface *old_surface = scon->surface;
scon->surface = new_surface;
+#ifdef __ANDROID__
+ if (!sdl2_is_render_thread()) {
+ return;
+ }
+#endif
+ SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
+ xb_surface_gl_destroy_texture(old_surface);
if (!new_surface) {
return;
}
@@ -1027,8 +1535,76 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl)
assert(scon->opengl);
bool flip_required = false;
- SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
+#ifdef __ANDROID__
+ if (!sdl2_is_render_thread()) {
+ return;
+ }
+ if (g_android_paused || scon->hidden) {
+ if ((g_android_frame_counter++ % 120) == 0) {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh paused: hidden=%d paused=%d runstate=%d",
+ scon->hidden ? 1 : 0,
+ g_android_paused ? 1 : 0,
+ (int)runstate_get());
+ }
+ qemu_mutex_lock_main_loop();
+ bql_lock();
+ sdl2_poll_events(scon);
+ bql_unlock();
+ qemu_mutex_unlock_main_loop();
+ SDL_Delay(16);
+ return;
+ }
+#endif
+ if (SDL_GL_MakeCurrent(scon->real_window, scon->winctx) != 0 ||
+ SDL_GL_GetCurrentContext() == NULL) {
+#ifdef __ANDROID__
+ __android_log_print(ANDROID_LOG_ERROR, "xemu-android",
+ "sdl2_gl_refresh: make current failed: %s",
+ SDL_GetError());
+ g_android_paused = true;
+#endif
+ qemu_mutex_lock_main_loop();
+ bql_lock();
+ sdl2_poll_events(scon);
+ bql_unlock();
+ qemu_mutex_unlock_main_loop();
+ SDL_Delay(16);
+ return;
+ }
+#ifdef __ANDROID__
+ android_log_gl_error("refresh-makecurrent");
+#endif
update_fps();
+ g_android_frame_counter++;
+
+#ifdef __ANDROID__
+ static int force_cpu_blit_mode = -2; /* -2=uninit, -1=auto, 0=off, 1=on */
+ if (force_cpu_blit_mode == -2) {
+ const char *env = SDL_getenv("XEMU_ANDROID_FORCE_CPU_BLIT");
+ if (!env) {
+ force_cpu_blit_mode = -1;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh: CPU blit mode auto");
+ } else if (strcmp(env, "1") == 0 || strcmp(env, "true") == 0 ||
+ strcmp(env, "TRUE") == 0) {
+ force_cpu_blit_mode = 1;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh: forcing CPU blit path");
+ } else {
+ force_cpu_blit_mode = 0;
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh: CPU blit disabled via env");
+ }
+ }
+ bool force_cpu_blit = false;
+ if (force_cpu_blit_mode == -1) {
+ /* Vulkan path should prefer direct texture presentation on Android. */
+ force_cpu_blit = (g_config.display.renderer != CONFIG_DISPLAY_RENDERER_VULKAN);
+ } else {
+ force_cpu_blit = (force_cpu_blit_mode == 1);
+ }
+#endif
/* XXX: Note that this bypasses the usual VGA path in order to quickly
* get the surface. This is simple and fast, at the cost of accuracy.
@@ -1040,14 +1616,120 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl)
* the guest code isn't using HW accelerated rendering, but just blitting
* to the framebuffer, fall back to the VGA path.
*/
- GLuint tex = nv2a_get_framebuffer_surface();
+ GLuint tex = 0;
+#ifdef __ANDROID__
+ if (force_cpu_blit) {
+ /* Trigger a render/sync so the readback buffer gets updated. */
+ (void)nv2a_get_framebuffer_surface();
+ nv2a_release_framebuffer_surface();
+
+ int rb_w = 0;
+ int rb_h = 0;
+ if (nv2a_android_copy_readback(&g_android_cpu_buf,
+ &g_android_cpu_buf_size,
+ &rb_w, &rb_h)) {
+ if ((g_android_frame_counter % 120) == 0) {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh: using readback %dx%d", rb_w, rb_h);
+ if (g_android_cpu_buf && rb_w > 0 && rb_h > 0) {
+ uint32_t tl = 0, mid = 0, br = 0;
+ size_t tl_off = 0;
+ size_t mid_off = ((size_t)(rb_h / 2) * (size_t)rb_w +
+ (size_t)(rb_w / 2)) * 4;
+ size_t br_off = ((size_t)(rb_h - 1) * (size_t)rb_w +
+ (size_t)(rb_w - 1)) * 4;
+ if (mid_off + 4 <= g_android_cpu_buf_size) {
+ memcpy(&mid, g_android_cpu_buf + mid_off, sizeof(mid));
+ }
+ if (br_off + 4 <= g_android_cpu_buf_size) {
+ memcpy(&br, g_android_cpu_buf + br_off, sizeof(br));
+ }
+ if (tl_off + 4 <= g_android_cpu_buf_size) {
+ memcpy(&tl, g_android_cpu_buf + tl_off, sizeof(tl));
+ }
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "readback sample tl=%08x mid=%08x br=%08x",
+ tl, mid, br);
+ }
+ }
+ if (!g_android_cpu_tex) {
+ glGenTextures(1, &g_android_cpu_tex);
+ }
+ glBindTexture(GL_TEXTURE_2D, g_android_cpu_tex);
+ glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR);
+ glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
+ if (rb_w != g_android_cpu_tex_w || rb_h != g_android_cpu_tex_h) {
+ g_android_cpu_tex_w = rb_w;
+ g_android_cpu_tex_h = rb_h;
+ glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, rb_w, rb_h, 0,
+ GL_RGBA, GL_UNSIGNED_BYTE, g_android_cpu_buf);
+ } else {
+ glTexSubImage2D(GL_TEXTURE_2D, 0, 0, 0, rb_w, rb_h,
+ GL_RGBA, GL_UNSIGNED_BYTE, g_android_cpu_buf);
+ }
+ tex = g_android_cpu_tex;
+ flip_required = true;
+ } else if ((g_android_frame_counter % 120) == 0) {
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "refresh: no readback available yet");
+ }
+ if ((g_android_frame_counter % 120) == 0) {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh: force CPU blit path");
+ }
+ } else {
+ tex = nv2a_get_framebuffer_surface();
+ if (tex != 0 && glIsTexture(tex) == GL_FALSE) {
+ if ((g_android_frame_counter % 120) == 0) {
+ __android_log_print(ANDROID_LOG_WARN, "xemu-android",
+ "refresh: nv2a tex %u not valid in display context",
+ (unsigned)tex);
+ }
+ tex = 0;
+ }
+ }
+#else
+ tex = nv2a_get_framebuffer_surface();
+#endif
+#ifdef __ANDROID__
+ android_log_gl_error("refresh-get-fb");
+ if ((g_android_frame_counter % 120) == 0) {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh frame=%llu tex=%u flip=%d surface=%p size=%dx%d runstate=%d",
+ (unsigned long long)g_android_frame_counter,
+ (unsigned)tex,
+ flip_required ? 1 : 0,
+ (void *)scon->surface,
+ scon->surface ? surface_width(scon->surface) : 0,
+ scon->surface ? surface_height(scon->surface) : 0,
+ (int)runstate_get());
+ }
+#endif
if (tex == 0) {
+#ifdef __ANDROID__
+ // Ensure the software VGA path updates the surface before uploading.
+ qemu_mutex_lock_main_loop();
+ bql_lock();
+ graphic_hw_update(scon->dcl.con);
+ bql_unlock();
+ qemu_mutex_unlock_main_loop();
+#endif
// FIXME: Don't upload if notdirty
xb_surface_gl_create_texture(scon->surface);
scon->updates++;
tex = scon->surface->texture;
flip_required = true;
+#ifdef __ANDROID__
+ if ((g_android_frame_counter % 120) == 0) {
+ __android_log_print(ANDROID_LOG_INFO, "xemu-android",
+ "refresh no nv2a fb, using surface texture=%u",
+ (unsigned)tex);
+ }
+#endif
}
+#ifdef __ANDROID__
+ android_log_gl_error("refresh-create-texture");
+#endif
/* FIXME: Finer locking. Event handlers in segments of the code expect
* to be running on the main thread with the BQL. For now, acquire the
@@ -1060,9 +1742,17 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl)
glClearColor(0, 0, 0, 0);
glClear(GL_COLOR_BUFFER_BIT);
+#ifdef __ANDROID__
+ android_blit_frame(tex, flip_required);
+#else
+#endif
+#ifdef __ANDROID__
+ android_log_gl_error("refresh-blit");
+#else
xemu_snapshots_set_framebuffer_texture(tex, flip_required);
xemu_hud_set_framebuffer_texture(tex, flip_required);
xemu_hud_render();
+#endif
// Release BQL before swapping (which may sleep if swap interval is not immediate)
bql_unlock();
@@ -1070,7 +1760,13 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl)
glFinish();
nv2a_release_framebuffer_surface();
+#ifdef __ANDROID__
+ android_log_gl_error("refresh-finish");
+#endif
SDL_GL_SwapWindow(scon->real_window);
+#ifdef __ANDROID__
+ android_log_gl_error("refresh-swap");
+#endif
/* VGA update (see note above) + vblank */
qemu_mutex_lock_main_loop();
@@ -1193,6 +1889,11 @@ int sdl2_gl_make_context_current(DisplayChangeListener *dcl,
assert(scon->opengl);
+#ifdef __ANDROID__
+ if (!sdl2_is_render_thread()) {
+ return 0;
+ }
+#endif
return SDL_GL_MakeCurrent(scon->real_window, sdlctx);
}
@@ -1313,6 +2014,7 @@ static void setup_nvidia_profile(void)
}
#endif
+#ifndef __ANDROID__
int main(int argc, char **argv)
{
QemuThread thread;
@@ -1417,6 +2119,7 @@ int main(int argc, char **argv)
// rcu_unregister_thread();
}
+#endif
void xemu_eject_disc(Error **errp)
{
diff --git a/util/chardev_open.c b/util/chardev_open.c
index f776429788..a45d76b549 100644
--- a/util/chardev_open.c
+++ b/util/chardev_open.c
@@ -39,6 +39,9 @@
#include "qemu/osdep.h"
#include "qemu/chardev_open.h"
+#ifdef __ANDROID__
+#include
+#endif
static int open_cdev_internal(const char *path, dev_t cdev)
{
diff --git a/util/event.c b/util/event.c
index 5a8141cd0e..ab4b1fc2ee 100644
--- a/util/event.c
+++ b/util/event.c
@@ -42,6 +42,12 @@ void qemu_event_init(QemuEvent *ev, bool init)
void qemu_event_destroy(QemuEvent *ev)
{
+#ifdef __ANDROID__
+ /* Avoid destroying pthread primitives on Android; some threads may still
+ * use the event during teardown, which triggers bionic FORTIFY aborts. */
+ (void)ev;
+ return;
+#endif
assert(ev->initialized);
ev->initialized = false;
#ifndef HAVE_FUTEX
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
index 3c14b72665..4143170933 100644
--- a/util/oslib-posix.c
+++ b/util/oslib-posix.c
@@ -59,6 +59,7 @@
#endif
#include "qemu/memalign.h"
+#include "qemu/memfd.h"
#include "qemu/mmap-alloc.h"
#define MAX_MEM_PREALLOC_THREAD_COUNT 16
@@ -984,6 +985,9 @@ void qemu_close_all_open_fd(const int *skip, unsigned int nskip)
int qemu_shm_alloc(size_t size, Error **errp)
{
+#ifdef __ANDROID__
+ return qemu_memfd_create("qemu-shm", size, false, 0, 0, errp);
+#else
g_autoptr(GString) shm_name = g_string_new(NULL);
int fd, oflag, cur_sequence;
static int sequence;
@@ -1032,4 +1036,5 @@ int qemu_shm_alloc(size_t size, Error **errp)
}
return fd;
+#endif
}
diff --git a/util/qemu-thread-posix.c b/util/qemu-thread-posix.c
index ba725444ba..4837de6090 100644
--- a/util/qemu-thread-posix.c
+++ b/util/qemu-thread-posix.c
@@ -76,6 +76,12 @@ void qemu_mutex_init(QemuMutex *mutex)
void qemu_mutex_destroy(QemuMutex *mutex)
{
+#ifdef __ANDROID__
+ /* Avoid destroying mutexes on Android; some callers may still lock them
+ * during early shutdown, which triggers bionic FORTIFY aborts. */
+ (void)mutex;
+ return;
+#else
int err;
assert(mutex->initialized);
@@ -83,6 +89,7 @@ void qemu_mutex_destroy(QemuMutex *mutex)
err = pthread_mutex_destroy(&mutex->lock);
if (err)
error_exit(err, __func__);
+#endif
}
void qemu_mutex_lock_impl(QemuMutex *mutex, const char *file, const int line)
diff --git a/util/selfmap.c b/util/selfmap.c
index 483cb617e2..e8044b3023 100644
--- a/util/selfmap.c
+++ b/util/selfmap.c
@@ -7,6 +7,9 @@
*/
#include "qemu/osdep.h"
+#ifdef __ANDROID__
+#include
+#endif
#include "qemu/cutils.h"
#include "qemu/selfmap.h"