diff --git a/include/qemu/bitmap.h b/include/qemu/bitmap.h
index 48401fc9cd..0044333cb5 100644
--- a/include/qemu/bitmap.h
+++ b/include/qemu/bitmap.h
@@ -78,7 +78,7 @@
         uint32_t name[BITS_TO_U32S(bits)]
 
 #define small_nbits(nbits)                      \
-        ((unsigned long)(nbits) <= BITS_PER_LONG)
+        ((nbits) <= BITS_PER_LONG)
 
 int slow_bitmap_empty(const unsigned long *bitmap, long bits);
 int slow_bitmap_full(const unsigned long *bitmap, long bits);
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index 0938439ba0..2e6b49bf13 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -17,43 +17,6 @@
 #define KVM_ARM_VGIC_V3   (1 << 1)
 
 /**
-<<<<<<< HEAD
- * kvm_arm_init_debug() - initialize guest debug capabilities
- * @s: KVMState
- *
- * Should be called only once before using guest debug capabilities.
- */
-void kvm_arm_init_debug(KVMState *s);
-
-/**
- * kvm_arm_vcpu_init:
- * @cs: CPUState
- *
- * Initialize (or reinitialize) the VCPU by invoking the
- * KVM_ARM_VCPU_INIT ioctl with the CPU type and feature
- * bitmask specified in the CPUState.
- *
- * Returns: 0 if success else < 0 error code
- */
-int kvm_arm_vcpu_init(CPUState *cs);
-
-/**
- * kvm_arm_vcpu_finalize:
- * @cs: CPUState
- * @feature: feature to finalize
- *
- * Finalizes the configuration of the specified VCPU feature by
- * invoking the KVM_ARM_VCPU_FINALIZE ioctl. Features requiring
- * this are documented in the "KVM_ARM_VCPU_FINALIZE" section of
- * KVM's API documentation.
- *
- * Returns: 0 if success else < 0 error code
- */
-int kvm_arm_vcpu_finalize(CPUState *cs, int feature);
-
-/**
-=======
->>>>>>> v9.2.0
  * kvm_arm_register_device:
  * @mr: memory region for this device
  * @devid: the KVM device ID
diff --git a/target/arm/tcg/translate-a32.h b/target/arm/tcg/translate-a32.h
index 7db1cb8428..0b1fa57965 100644
--- a/target/arm/tcg/translate-a32.h
+++ b/target/arm/tcg/translate-a32.h
@@ -73,13 +73,6 @@ static inline TCGv_i32 load_cpu_offset(int offset)
         load_cpu_offset(offsetoflow32(CPUARMState, name));              \
     })
 
-/* Load from the low half of a 64-bit field to a TCGv_i32 */
-#define load_cpu_field_low32(name)                                      \
-    ({                                                                  \
-        QEMU_BUILD_BUG_ON(sizeof_field(CPUARMState, name) != 8);        \
-        load_cpu_offset(offsetoflow32(CPUARMState, name));              \
-    })
-
 void store_cpu_offset(TCGv_i32 var, int offset, int size);
 
 #define store_cpu_field(val, name)                                      \
diff --git a/target/i386/hvf/x86_decode.c b/target/i386/hvf/x86_decode.c
index 392381928d..a4a28f113f 100644
--- a/target/i386/hvf/x86_decode.c
+++ b/target/i386/hvf/x86_decode.c
@@ -1684,10 +1684,10 @@ calc_addr:
     }
 }
 
-uintptr_t get_reg_ref(CPUX86State *env, int reg, int rex_present,
+target_ulong get_reg_ref(CPUX86State *env, int reg, int rex_present,
                          int is_extended, int size)
 {
-    uintptr_t ptr = 0;
+    target_ulong ptr = 0;
 
     if (is_extended) {
         reg |= R_R8;
@@ -1696,13 +1696,13 @@ uintptr_t get_reg_ref(CPUX86State *env, int reg, int rex_present,
     switch (size) {
     case 1:
         if (is_extended || reg < 4 || rex_present) {
-            ptr = (uintptr_t)&RL(env, reg);
+            ptr = (target_ulong)&RL(env, reg);
         } else {
-            ptr = (uintptr_t)&RH(env, reg - 4);
+            ptr = (target_ulong)&RH(env, reg - 4);
         }
         break;
     default:
-        ptr = (uintptr_t)&RRX(env, reg);
+        ptr = (target_ulong)&RRX(env, reg);
         break;
     }
     return ptr;
diff --git a/target/i386/hvf/x86_decode.h b/target/i386/hvf/x86_decode.h
index bddcf92fd5..a2d7a2a27b 100644
--- a/target/i386/hvf/x86_decode.h
+++ b/target/i386/hvf/x86_decode.h
@@ -266,7 +266,7 @@ typedef struct x86_decode_op {
     int reg;
     target_ulong val;
 
-    uintptr_t ptr;
+    target_ulong ptr;
 } x86_decode_op;
 
 typedef struct x86_decode {
@@ -303,7 +303,7 @@ uint64_t sign(uint64_t val, int size);
 
 uint32_t decode_instruction(CPUX86State *env, struct x86_decode *decode);
 
-uintptr_t get_reg_ref(CPUX86State *env, int reg, int rex_present,
+target_ulong get_reg_ref(CPUX86State *env, int reg, int rex_present,
                          int is_extended, int size);
 target_ulong get_reg_val(CPUX86State *env, int reg, int rex_present,
                          int is_extended, int size);
diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c
index 52b1c919c5..579d0c3a4c 100644
--- a/target/i386/hvf/x86_mmu.c
+++ b/target/i386/hvf/x86_mmu.c
@@ -244,7 +244,7 @@ void vmx_write_mem(CPUState *cpu, target_ulong gva, void *data, int bytes)
         int copy = MIN(bytes, 0x1000 - (gva & 0xfff));
 
         if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
-            VM_PANIC_EX("%s: mmu_gva_to_gpa 0x" TARGET_FMT_lx " failed\n", __func__, gva);
+            VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
         } else {
             address_space_write(&address_space_memory, gpa,
                                 MEMTXATTRS_UNSPECIFIED, data, copy);
@@ -265,7 +265,7 @@ void vmx_read_mem(CPUState *cpu, void *data, target_ulong gva, int bytes)
         int copy = MIN(bytes, 0x1000 - (gva & 0xfff));
 
         if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
-            VM_PANIC_EX("%s: mmu_gva_to_gpa 0x" TARGET_FMT_lx " failed\n", __func__, gva);
+            VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
         }
         address_space_read(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
                            data, copy);
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 56998d528e..4a7e705367 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -3305,7 +3305,6 @@ void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx)
      * This requires coordination with targets that do not use
      * the translator_loop.
      */
-
     uintptr_t val = (uintptr_t)tcg_splitwx_to_rx((void *)tb) + idx;
 
     if (tb == NULL) {