hw/arm/xlnx-versal: crl: refactor creation

Refactor the CRL device creation using the VersalMap structure. The
connections to the RPU CPUs are temporarily removed and will be
reintroduced with next refactoring commits.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-19-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel
2025-10-07 10:35:36 +01:00
committed by Peter Maydell
parent b913b3cb26
commit aaf889ebdc
2 changed files with 19 additions and 20 deletions
-3
View File
@@ -17,7 +17,6 @@
#include "hw/cpu/cluster.h"
#include "hw/intc/arm_gicv3.h"
#include "qom/object.h"
#include "hw/misc/xlnx-versal-crl.h"
#include "net/can_emu.h"
#include "target/arm/cpu.h"
#include "hw/arm/xlnx-versal-version.h"
@@ -71,8 +70,6 @@ struct Versal {
CPUClusterState cluster;
ARMCPU cpu[XLNX_VERSAL_NR_RCPUS];
} rpu;
XlnxVersalCRL crl;
} lpd;
struct {