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accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull
This structure will shortly contain more than just data for accessing MMIO. Rename the 'addr' member to 'xlat_section' to more clearly indicate its purpose. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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+11
-11
@@ -108,6 +108,7 @@ typedef uint64_t target_ulong;
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# endif
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# endif
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/* Minimalized TLB entry for use by TCG fast path. */
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typedef struct CPUTLBEntry {
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/* bit TARGET_LONG_BITS to TARGET_PAGE_BITS : virtual address
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bit TARGET_PAGE_BITS-1..4 : Nonzero for accesses that should not
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@@ -131,14 +132,14 @@ typedef struct CPUTLBEntry {
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QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS));
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/* The IOTLB is not accessed directly inline by generated TCG code,
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* so the CPUIOTLBEntry layout is not as critical as that of the
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* CPUTLBEntry. (This is also why we don't want to combine the two
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* structs into one.)
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/*
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* The full TLB entry, which is not accessed by generated TCG code,
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* so the layout is not as critical as that of CPUTLBEntry. This is
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* also why we don't want to combine the two structs.
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*/
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typedef struct CPUIOTLBEntry {
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typedef struct CPUTLBEntryFull {
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/*
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* @addr contains:
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* @xlat_section contains:
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* - in the lower TARGET_PAGE_BITS, a physical section number
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* - with the lower TARGET_PAGE_BITS masked off, an offset which
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* must be added to the virtual address to obtain:
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@@ -146,9 +147,9 @@ typedef struct CPUIOTLBEntry {
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* number is PHYS_SECTION_NOTDIRTY or PHYS_SECTION_ROM)
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* + the offset within the target MemoryRegion (otherwise)
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*/
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hwaddr addr;
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hwaddr xlat_section;
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MemTxAttrs attrs;
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} CPUIOTLBEntry;
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} CPUTLBEntryFull;
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/*
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* Data elements that are per MMU mode, minus the bits accessed by
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@@ -172,9 +173,8 @@ typedef struct CPUTLBDesc {
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size_t vindex;
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/* The tlb victim table, in two parts. */
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CPUTLBEntry vtable[CPU_VTLB_SIZE];
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CPUIOTLBEntry viotlb[CPU_VTLB_SIZE];
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/* The iotlb. */
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CPUIOTLBEntry *iotlb;
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CPUTLBEntryFull vfulltlb[CPU_VTLB_SIZE];
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CPUTLBEntryFull *fulltlb;
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} CPUTLBDesc;
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/*
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