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hw/arm/aspeed: Remove AspeedSoCState dependency from aspeed_soc_uart_realize() API

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Refactor aspeed_soc_uart_realize() to take MemoryRegion *, SerialMM *,
and MMIO base addr instead of AspeedSoCState *, decoupling the helper
from SoC state and making it reusable per-UART.

The helper now realizes a single UART instance and maps its MMIO.
IRQ wiring and iteration over all UARTs are moved to callers.

Update call sites in AST1030, AST2400, AST2600, AST27x0 SSP/TSP, and
AST2700 to loop over UARTs, call the new helper, and connect IRQ via
aspeed_soc_get_irq().

This simplifies the UART realize path and reduces cross-module coupling.

No functional change.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251013054334.955331-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin
2025-10-13 14:37:55 +02:00
committed by Cédric Le Goater
parent 68f915b91c
commit 15f26071bf
8 changed files with 60 additions and 31 deletions
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include/hw/arm/aspeed_soc.h
+2 -1
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@@ -304,7 +304,8 @@ enum {
const char *aspeed_soc_cpu_type(const char * const *valid_cpu_types);
qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev);
bool aspeed_soc_uart_realize(AspeedSoCState *s, Error **errp);
bool aspeed_soc_uart_realize(MemoryRegion *memory, SerialMM *smm,
const hwaddr addr, Error **errp);
void aspeed_soc_uart_set_chr(SerialMM *uart, int dev, int uarts_base,
int uarts_num, Chardev *chr);
bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp);